Foxconn n15235 K8t890m2aa-Rs2h. Foxconn n15235 K8t890m2aa-Rs2h

1
http://www.bufanxiu.com
Cover Sheet
Block Diagram
1
2
K8T890A01 Version 1.0
Clock & Power Delivery Map 3 VIA K8T890 CF + VT8237/ R / R Plus Chipset
GPIO List 4 AMD AM2 Processor
Clock Gen ICS 953201 BF 5
VRM ISL6566 CR 6
AM2_1 Hyper Transport 7 CPU:
AM2_2 DDRII -1 & AM2_2 DDRII -2 8-9 AMD AM2
AM2_ 3 MISC 10 System Chipset:
AM2_4 Power 11 VIA K8T890 CF (North Bridge)
DDRII SDRAM DIMM1 & DIMM2 12 VIA VT8237 / R / R Plus (South Bridge)
DDRII Terminator Part 13 On Board Chipset:
NORTH BRIDGE (K8M890) 1-3 14 - 16 BIOS -- LPC EEPROM
SOUTH BRIDGE (VT8237) 1-3 17 - 19 Audio Codec -- AC97 ALC653
LPC Super I/O -- IT8716 CX/DX
PCIe-16X & 1X Slot 20
LAN --PCI LAN (10/100M) RTL8100C / PCI LAN (Giga) 8110SC
PCI Slot1 & Slot2 21 CLOCK --ICS 953201 BF
ATX & Front Panel & FAN 22
A A
SIO IT8716-CX / DX 23 Main Memory:

Reserved Page 24 Dual Channel DDRII DIMM * 2
DDRII Power Module 25
PCI LAN RTL8100C / 8110SC 26 Expansion Slots:
ATA IDE & BIOS ROM 27
PCIe 16X SLOT * 1
Audio ALC653 28
PCIe 1X SLOT * 2
USB CONNECTOR 29 PCI SLOT *3
ACPI Controller Fintek Tiger One 30
VRM:
EMI Part & Front Audio & MH 31
Controller: Intersill ISL6566 CR
Change History List 32
FOXCONN PCEG
Title
Cover Sheet
Size Document Number Rev
C K8M890M01 A
Date: Friday, August 04, 2006 Sheet 1 of 32

1
A B C D E
Block Diagram(Micro ATX) http://www.bufanxiu.com
4 4
VCORE
Intersill ISL6566 CR
AMD M2
DDR2
DDR2
SLOT
SLOT
Channel A Channel B
Memory BUS Memory BUS CLOCK
Processor GENERATOR
940-Pin SOCKET ICS953201BF
HT BUS
PCI-E x16 PCI-E x16 SLOT x1

3 3
VGA RGB
K8M890CE PCI-E x1 PCI-E x1 SLOT x1
V-LINK
IDE BUS IDE X2

USB PORTS X8 USB 2.0
AC97/Azalia AC97/HD VT8237R_Plus PCI BUS PCI SLOT X2

VT8237A
KB/MOUSE SATA SATA X2
2 2
PCI LAN
RTL8100C/8110SC LPC BUS
FLOPPY
PCI 1394A LPT PORT

VT6308P
SUPER I/O
IT8716 AX
COM 1/COM2
BIOS
1 1
FOXCONN PCEG
Title
Block Diagram
C K8M890M01 A

A B C D E
5 4 3 2 1
P4M800 PRO PLATFORM CLOCK GENERATOR MAP
3.3V 5V 5VSB 12V
D P4M800 PRO PLATFORM POWER DELIVERY MAP D
Intel LG775 Processor PROCESSOR VCCP

VRM
CPU HOST PROCESSOR 1.2V
CLK
1.2V VREG
North Bridge DCLKI

66MHZ DCLKO
1.5V VREG
P4M890 PRO
NORTH BRIDGE VTT
1.5V VREG NORTH BRIDGE AGP
NORTH BRIDGE +1.5V

3VSB VREG NORTH BRIDGE SYSEM MEMORY
VCC_DDR
DDRI/II DIMM Slot1~4 NORTH BRIDGE RESUME 1.5V_SB

MEM CLK CLOCK 1.5VSB VREG
BUFFER
C C
DDR 2.6V
VREG DDR DIMM1 / DIMM2 2.6V
CLOCK GENERATOR
14.318MHZ
VTT 1.3V VREG DDR VTT 1.3V
APIC
Sorth Bridge
66MHZ 2.5V VREG
VT8237 SOUTH BRIDGE +2.5V
48MHZ
SOUTH BRIDGE VCC3
PCI CLK 2.5VSB VREG SOUTH BRIDGE RESUME 2.5V_SB
SOUTH BRIDGE RESUME VCC3_SB
PCI CLK 0~3 PCI Slot 1~2 SOUTH BRIDGE RTC 3.3V
LAN VCC3_SB , 2.5V

PCI CLK RTL PCI LAN 3.3V VREG
1394 3.3V
B PCI CLK LPC BIOS 3.3V B

ROM
48MHZ
ITE LPC SUPER I/O 3.3V
PCI CLK
IT8712F/JX LPC SUPER I/O VCC5
CLK 3.3V
100M
PCIE Slot DDR BUFFER +2.5V
14.318M
AC97 VDD5 AC97 VDD5
AC'97 VREG
CODEC
A A
FOXCONN PCEG
Title
Dirgram
C K8M890M01 A

5 4 3 2 1
5 4 3 2 1
South Bridge Super I/O
*
D
* D
*
*
*
*
*
*
*
*
*
*
*
C
* C
*
*
*
*
*
*
*
*
*
*
*
*
B
* B
*
*
*
*
*
*
*
*
*
*
*
A
* A
FOXCONN PCEG
Title
GPIO List
C K8M890M01 A

5 4 3 2 1
5 4 3 2 1
Clock Synthesizer
D
Delete RN26 , RN27 D
cpu nb dampping check value & layout location

VCC3 +3.3VCLK
ICS CRB & VIA CRB bom value different ICS CRB & VIA CRB bom value
*
L22 U18 CPUCLK+R172 261 CPUCLK-
different
** **
1 2 1 56 CPU_CLK+ R169 47.5 R0603 CPUCLK+ R0603 +/-1%
VDDA CPUCLK8T0 CPU_CLKIN_H 10
FB L0805 60 Ohm 3 55 CPU_CLK- R174 47.5 R0603 CPUCLK-
VDDREF CPUCLK8C0 CPU_CLKIN_L 10
HCLK+
* C187
* C221
* C212
* C198
* C197
* C209 10 C199 10pFC0603
**
10uF 0.1uF 10nF 10nF 10nF 10nF VDDPCI1 H_CLK+ R180 15 R0603 HCLK+ HCLK- C205 10pFC0603
16 VDDPCI2 CPUCLK8T1 53 HCLK+ 16
C1206 C0603 C0603 C0603 C0603 C0603 20 52 H_CLK- R182 15 R0603 HCLK-
VDD CPUCLK8C1 HCLK- 16
21 RN21
VDD48
26
39
VDDAGP PCIEXT0 47
46
PECLKNB+
PECLKNB-
*1 2
PECLK_NB+
PECLK_NB-
PECLK_NB+
PECLK_NB-
15
15
VDDPCIEX1 PCIEXC0 3 4
* C233
10nF * C240
10nF * C232
10nF
45
51
VDDPCIEX2
VDDCPU PCIEXT1 44 PECLK_1+ 5
7
6
8
PECLK1+
PECLK1-
PECLK1+
PECLK1-
20
20
C0603 C0603 C0603 43 PECLK_1- RN22
PCIEXC1
+3.3VCLK 2 42 PECLK_3+
RN24
47
*+/-5% PECLK3+ PECLK3+ 20
PECLK_NB+
PECLK_NB-
*1 2
L23 GND PCIEXT2 PECLK_3- 1 2
8p4r0603h7 PECLK3- PECLK3- 20 PECLK1+ 3 4
8 GNDREF PCIEXC2 41 3 4 5 6
1 2 15 PECLK2+ PECLK1-
GNDPCI1 5 6 PECLK2+ 20 7 8
X_FB L0805 60 Ohm
* C229 *
C215
19
24
GNDPCI2
GND48
PCIEXT3
PCIEXC3
38
37
PECLK_2+
PECLK_2- 7 8
PECLK2-
PECLK2- 20
RN25 47
change to 51ohm
CP2003 10nF
X_COPPER
0.1uF
C0603 C0603
30
32
GNDAGP
36
47
+/-5%
PECLK3+
PECLK3-
*+/-5%
1 2
8p4r0603h7
GNDPCIEX1 PCIEXT4 8p4r0603h7 PECLK2+ 3 4
40 GNDPCIEX2 PCIEXC4 35 5 6
PECLK2-
dummy
50
54
GND
34
RN&R change to 22ohm 7 8
GNDCPU PCIEXT5 47
PCIEXC5 33
+/-5% Place these components
** *
R235 22 31 29 R236 22+/-5% R0603 8p4r0603h7
12,18,20,26,30 SMBCLK SCLK AGPCLK0 VCLK_NB 16 close to their respective
**
R188
R0603 22 48 28 FS4
12,18,20,26,30 SMBDATA SDATA FS4/AGPCLK1 series damping resistor of
C R0603 +/-5% 27 R232 22+/-5% R0603 C
AGPCLK2 VCLK_SB 19
VCC3 +/-5% FS2 R201 22+/-5% R0603 the clock ouput.
LAN_CLK 26
*
*
R195 10K 9 11 R204 22+/-5% R0603
VTTPWRGD/PD# FS2/PCI0 PCICLK3 21
R0603 +/-5% 12 FS3 RN23
FS3/PCI1
10,16,19,22,30 -RESET_CLK 25 RESET# PCI2 13
14
*1 2 SB_CLK
PCICLK2
19
21
R187 475 PCI3 3 4
49 IREF PCI4 17 5 6 PCICLK1 21 CHECK VIA
*
R0603 +/-1% 18
PCI5 7 8 PCICLKSIO 23
ICS CRB &
*
C195 56pF 14MHZX1 6 R0603
***
C0603 X1 FS0 R181 47 22+/-5%SIO_OSC
4 SB_OSC 18
FS0/REF0 VIA CRB
1
50V, NPO, +/-5% XTAL 14.31818MHz 5 FS1 +/-5% 8p4r0603h7

+/-30ppm FS1/REF1 R220 33R0603
USBCLK 17 bom value
*
X3 22 48MHZSEL R223 10K
48MHz
*
C196 56pF 14MHZX2 7 23 48MHZSEL R219 22+/-5% R0603

SIOCLK 23 different R0603 +/-5%
2
C0603 50V, NPO, +/-5% X2 SEL24_48#/24_48MHz

ICS953201BF R186 22
AC_14M 28
*
R0603
** * *
ICS CRB & VIA CRB bom value different 1崩2惠单 +/-5% R173
R0603
8.2K
+/-5%
VCC3 FS0
R207 R0603 SIO_OSC R179 10K
*
22+/-5% R0603 +/-5%
BIOS_CLK 27 CN2
R185 8.2K PCICLKSIO 7 8
R0603 +/-5% VCC3 FS1 PCICLK1 5 6
FS1 R183 10K PCICLK2 3 4 Dummy
FS[4:0] CPU PCIEX AGP PCI FS[4:0] CPU PCIEX AGP PCI R0603 +/-5% SB_CLK 1 2
00000 100.90 100.90 67.27 33.63 10000 100.00 100.00 66.67 33.33 VCC3 X_8P4C-10P50N
**
R194 10K FS2
00001 133.90 100.43 66.95 33.48 10001 133.00 100.00 66.67 33.33 R0603 +/-5%
FS2 R206 8.2K
00010 168.00 100.80 67.20 33.60 10010 166.66 104.16 69.44 34.72 R0603 +/-5%
00011 202.00 101.00 67.33 33.67 10011 200.00 100.00 66.67 33.33 VCC3 CN3
**
R200 10K LAN_CLK 7 8
00100 100.20 100.20 66.80 33.40 10100 103.00 103.00 68.67 34.33 R0603 +/-5% FS3 PCICLK3 5 6
FS3 R205 8.2K BIOS_CLK 3 4 Dummy
B B
00101 133.50 100.13 66.75 33.38 10101 137.33 103.00 68.66 34.33 R0603 +/-5% 1 2
00110 166.70 100.02 66.68 33.34 10110 171.66 103.00 68.66 34.33 VCC3 X_8P4C-10P50N
**
FS4 R239 10K
00111 200.40 100.20 66.80 33.40 10111 206.00 103.00 68.67 34.33 R0603 +/-5% FS4
TABLE 禬繵 R233 8.2K
01000 160.00 100.00 66.67 33.33 11000 208.00 104.00 69.33 34.67 R0603 +/-5% AC_14M C756 X_10pF
C0603
* * * * *
01001 202.00 101.00 67.33 33.67 11001 210.00 105.00 70.00 35.00
check clock table
Place these components close to SIOCLK C757 X_10pF
C0603
01010 210.00 105.00 70.00 35.00 11010 215.00 107.50 71.67 35.83 their respective series damping
01011 212.00 106.00 70.67 35.33 11011 220.00 110.00 73.33 36.67 resistor of the clock ouput. USBCLK C758 X_10pF
C0603
01100 270.00 101.25 67.50 33.75 11100 226.00 113.00 75.33 37.67
VCLK_NBC759 X_10pF
C0603
01101 225.00 112.50 75.00 37.50 11101 230.00 115.00 76.67 38.33 Set FS[4:0] value at 10011 for
01110 266.67 100.00 66.67 33.33 11110 240.00 120.00 80.00 40.00 default frequencies as below: VCLK_SBC760 X_10pF
C0603
01111 300.00 112.50 75.00 37.50 11111 250.00 125.00 83.33 41.67 CPU PCIEX AGP PCI
200.00 100.00 66.67 33.33
A A
FOXCONN PCEG
Title
Clock Gen
C K8M890M01 A

5 4 3 2 1
5 4 3 2 1
12V_VIN L21 Choke 1.1uH 12V_VRM

emi 12V_VIN
PWR2
*
C138 C136 C140
C698 C120 C114 C121 C115 C157
* 0.1uF
* 0.1uF
* 0.1uF
2
* 4.7uF * 1500uF * 1500uF *1500uF *
1500uF
* 4.7uF C176
16V, Y5V, +80%/-20%
C1206 16V, +/-20% 16V, +/-20% 16V, +/-20% 16V, +/-20%
16V, Y5V, +80%/-20%
C1206
C0603
dummy
C0603
dummy
C0603
dummy * 10nF 5
25V, Y5V, +80%/-20% 25V, Y5V, +80%/-20% C0603

25V, Y5V, +80%/-20%
1
VCC5 ATX12V_P1_2X2
D D
1
VCC3 D7
B120
12V_VIN
10U/1206 CHANGE TO 1U/0805
2
VCC3
* R274 C253 12V_VRM
10K
+/-5% * 4.7uF
10V, Y5V, +80%/-20% *R261
2.2
bom change to 10uF
R271 R0603 32PIN 5x5QFN C0805 +/-5%
7
U19 R0805
HIGH(>1.24V) 1K 38 33
* C137
* C850
VCC
10 VREG_VID4
*
* VID4 PVCC1
* *
ENABLE VRM +/-1% 39 30 R273 2.2 C277 R148 1uF 1uF L29 600nH@100KHz
*
D
10 VREG_VID3 VID3 BOOT1
R0603 40 R0805 1uF 10K C0805 C1206
10 VREG_VID2 VID2 dummy
1 C267 C0805 +/-5% Q19
10 VREG_VID1 VID1
2 0.1uF R0603
10 VREG_VID0
*
VID0 C0603 R149 1 +/-5%
3 DACSEL/VID5 UGATE1 31 G
35 R0805 AOD436 +V_CPU
22,30 VRM_GD PGOOD Orig 2.2R 0603 L28 +V_CPU
37
*
30 VRM_EN
S
C282 C270 ENLL
PHASE1 29
VRM_EN > 0.6V ENABLE
* 0.1uF
* 0.1uF
D
R160
*
*
C0603 C0603 R258 1.8K Q20 Q23 2.2 600nH@100KHz C223 C222
ISEN1 32
R0603 +/-5% +/-5%
* *3300uF * *3300uF
*
34 1PHASE_LGATE R151 0 +/-5% G G R0805
*
R245 10K +/-5% C247 5.6nF LGATE1 R0805 AOD438 AOD438 6.3V, +/-20% 6.3V, +/-20% C218 X_560uF
8 C171
*
COMP
* **
R0603 C0603 12V_VIN C182 4V, +/-20% dummy
S
R244 22nF
* 1nF C202 X_560uF
*
C244 47pF C0603 Dummy 4V, +/-20% dummy
*
C0603 50V, X7R, +/-10% C0603

9 FB
*2.2 12V_VRM C204 X_560uF dummy
+/-5% 4V, +/-20%
+V_CPU R0805
*
R240
R0603
1K+/-1% 10 VDIFF PVCC2/EN_PH3 24
* C246 * C135
1uF * C851
1uF
*
Orig 2K
*R226 26 R256 2.2 1uF
*R145 C0805 C1206
D
BOOT2/NC
C 51
+/-5%
R0805
C256 * C0805 10K
+/-5% Q18
L27
dummy
600nH@100KHz C
R0603 0.1uF R0603
*
27 C0603 R142 1 +/-5% G
*
C241 R225 100 +/-5% OVL UGATE2/PWM3 R0805 AOD436

10 CPU_VDD_RUN_FB_H 12 VSEN L26
Orig 2.2R 0603
* X_1nF R0603
*
S
PHASE2/NC 28
10 CPU_VDD_RUN_FB_L C0603 11
D
dummy RGND R158
*
*
600nH@100KHz
*R234 C242 25 R249 1.8K Q14 Q15 2.2
*
ISEN2/ISEN3
51
* X_1nF
VCC5
R255 X_150K+/-1% 6 R0603 +/-5% +/-5% C220 C225
*
+/-5% R0603 dummy R257 OFST R124 0 +/-5% R0805
R0603 C0603 51K * LGATE2/NC 23
R0805
C145
G
AOD438
G
AOD438 * *3300uF* *X_3300uF +V_CPU
+10mV +/-5% 12V_VIN C191 6.3V, +/-20% 6.3V, +/-20%
S
OFFSET R0603 R229 22nF
* 1nF C250 10uF
**
C0603 Dummy C1206
dummy 50V, X7R, +/-10% C0603 C249 10uF
36 FS
*2.2 dummy C1206
+/-5%
R272 5 R0805
* 120K REF
PVCC3 18 12V_VRM
+/-5%
R0603
*
C264
10nF R237 * 2.2 * C238
1uF
21
*R154 L25 600nH@100KHz
D
BOOT3
V1.0 bom change to 1K/1% C0603
4 VRM10
R0805
C243 * C0805 10K
+/-5% Q21 * C139
1uF * C852
1uF dummy
0.1uF R0603 C0805 C1206
*
*
R224 2.2K +/-5% 13 20 C0603 R157 1 +/-5% G
R0603 OCSET UGATE3 R0805 AOD436
Orig 2.2R 0603 L24
*
S
14 ICOMP PHASE3 22
D
*R164 C226 C224
*
R230 1.8K Q17 Q16 2.2 600nH@100KHz

15 ISUM ISEN3 19
R0603 +/-5% +/-5% * *3300uF * *3300uF
GND
*
+V_CPU
*
C239 0.1uF 16 17 R126 0 +/-5% G G R0805 6.3V, +/-20% 6.3V, +/-20%

C0603 IREF LGATE3 R0805 AOD438 AOD438
C148
ISL6566CR C188 C275 10uF
S
41
******
22nF
* 1nF C1206
*
B B
C0603 Dummy C295 10uF
50V, X7R, +/-10% C0603 C1206
C294 10uF
BOTTOM PAD CONNECT TO C1206
GND THROUGH 10vias C280 10uF
C1206
C251 10uF
Orig 33K C1206
C252 10uF
*
***
R227 13.3K R214 24K +/-1% C1206

R0603 +/-1% R0603
R215 24K +/-1%
R0603
C235 47nF R216 24K +/-1%
*
C0603 R0603
OVL Orig 47nF Y5V Orig 33K
*R300 R301 R302

6.49K *3.24K *1.62K *R303
1.62K *R304
1.62K
+/-1% +/-1% +/-1% +/-1% +/-1%
R0603 R0603 R0603 R0603 R0603
need modify need modify
23 PWM_GIOP1
23 PWM_GIOP2 V1.0 CHANGE BOM VALUE
23 PWM_GIOP3
23 PWM_GIOP4
23 PWM_GIOP5
VCORE over VID CKT
A A
FOXCONN PCEG
Title
Vcore ISL6559 + ISL6614 + ISL6612
C K8M890M01 A

5 4 3 2 1
5 4 3 2 1
U22A
HYPERTRANSPORT
14 HT_RC_CPU_CLK_H1 N6 L0_CLKIN_H(1) L0_CLKOUT_H(1) AD5 HT_CPU_RC_CLK_H1 14
14 HT_RC_CPU_CLK_L1 P6 L0_CLKIN_L(1) L0_CLKOUT_L(1) AD4 HT_CPU_RC_CLK_L1 14
14 HT_RC_CPU_CLK_H0 N3 L0_CLKIN_H(0) L0_CLKOUT_H(0) AD1 HT_CPU_RC_CLK_H0 14
+1.2V_HT N2 AC1 HT_CPU_RC_CLK_L0 14
14 HT_RC_CPU_CLK_L0 L0_CLKIN_L(0) L0_CLKOUT_L(0)
R283 49.9 r0603h6 +/-1% HT_CPU_CTLIN_H1 V4 Y6 HT_CPU_CTLOUT_H1 1 TP3
R282 49.9 r0603h6 +/-1% HT_CPU_CTLIN_L1
L0_CTLIN_H(1) L0_CTLOUT_H(1) HT_CPU_CTLOUT_L1 TP2
V5 L0_CTLIN_L(1) L0_CTLOUT_L(1) W6 1
D 14 HT_RC_CPU_CTL_H0 U1 L0_CTLIN_H(0) L0_CTLOUT_H(0) W2 HT_CPU_RC_CTL_H0 14 D
GND
14 HT_RC_CPU_CTL_L0 V1 L0_CTLIN_L(0) L0_CTLOUT_L(0) W3 HT_CPU_RC_CTL_L0 14
HT_RC_CPU_CAD_H15 U6 Y5 HT_CPU_RC_CAD_H15
14 HT_RC_CPU_CAD_H[15..0] L0_CADIN_H(15) L0_CADOUT_H(15) HT_CPU_RC_CAD_H[15..0] 14
HT_RC_CPU_CAD_L15 V6 Y4 HT_CPU_RC_CAD_L15
14 HT_RC_CPU_CAD_L[15..0] L0_CADIN_L(15) L0_CADOUT_L(15) HT_CPU_RC_CAD_L[15..0] 14
HT_RC_CPU_CAD_H14 T4 AB6 HT_CPU_RC_CAD_H14
HT_RC_CPU_CAD_L14
L0_CADIN_H(14) L0_CADOUT_H(14) HT_CPU_RC_CAD_L14
T5 L0_CADIN_L(14) L0_CADOUT_L(14) AA6
HT_RC_CPU_CAD_H13 R6 AB5 HT_CPU_RC_CAD_H13
HT_RC_CPU_CAD_L13
T6 L0_CADIN_L(13) L0_CADOUT_L(13) AB4
HT_RC_CPU_CAD_H12 P4 AD6 HT_CPU_RC_CAD_H12
HT_RC_CPU_CAD_L12
P5 L0_CADIN_L(12) L0_CADOUT_L(12) AC6
HT_RC_CPU_CAD_H11 M4 AF6 HT_CPU_RC_CAD_H11
HT_RC_CPU_CAD_L11
M5 L0_CADIN_L(11) L0_CADOUT_L(11) AE6
HT_RC_CPU_CAD_H10 L6 AF5 HT_CPU_RC_CAD_H10
HT_RC_CPU_CAD_L10
M6 L0_CADIN_L(10) L0_CADOUT_L(10) AF4
HT_RC_CPU_CAD_H9 K4 AH6 HT_CPU_RC_CAD_H9
HT_RC_CPU_CAD_L9
K5 L0_CADIN_L(9) L0_CADOUT_L(9) AG6
HT_RC_CPU_CAD_H8 J6 AH5 HT_CPU_RC_CAD_H8
HT_RC_CPU_CAD_L8
K6 L0_CADIN_L(8) L0_CADOUT_L(8) AH4
HT_RC_CPU_CAD_H7 U3 Y1 HT_CPU_RC_CAD_H7
HT_RC_CPU_CAD_L7
U2 L0_CADIN_L(7) L0_CADOUT_L(7) W1
HT_RC_CPU_CAD_H6 R1 AA2 HT_CPU_RC_CAD_H6
HT_RC_CPU_CAD_L6
T1 L0_CADIN_L(6) L0_CADOUT_L(6) AA3
HT_RC_CPU_CAD_H5 R3 AB1 HT_CPU_RC_CAD_H5
HT_RC_CPU_CAD_L5
R2 L0_CADIN_L(5) L0_CADOUT_L(5) AA1
HT_RC_CPU_CAD_H4 N1 AC2 HT_CPU_RC_CAD_H4
HT_RC_CPU_CAD_L4
P1 L0_CADIN_L(4) L0_CADOUT_L(4) AC3
HT_RC_CPU_CAD_H3 L1 AE2 HT_CPU_RC_CAD_H3
HT_RC_CPU_CAD_L3
M1 L0_CADIN_L(3) L0_CADOUT_L(3) AE3
HT_RC_CPU_CAD_H2 L3 AF1 HT_CPU_RC_CAD_H2
HT_RC_CPU_CAD_L2
L2 L0_CADIN_L(2) L0_CADOUT_L(2) AE1
HT_RC_CPU_CAD_H1 J1 AG2 HT_CPU_RC_CAD_H1
HT_RC_CPU_CAD_L1
K1 L0_CADIN_L(1) L0_CADOUT_L(1) AG3
HT_RC_CPU_CAD_H0 J3 AH1 HT_CPU_RC_CAD_H0
HT_RC_CPU_CAD_L0
J2 L0_CADIN_L(0) L0_CADOUT_L(0) AG1
C C
B B
A1 A31
Layout: Add stitching caps if crossing plane split
HyperTransport Net Naming Convention

M2
HT_"link driver"_"link receiver"_"function"_"polarity"_"number" Top View
AL1
A A
FOXCONN PCEG
Title
M2 HyperTransport
C K8M890M01 A

5 4 3 2 1
5 4 3 2 1
U22B
MEMORY INTERFACE A
12,13 MEM_MA0_CLK_H2 AG21 MA0_CLK_H(2) MA_DATA(63) AE14 MEM_MA_DATA63 MEM_MA_DATA[63..0] 12
12,13 MEM_MA0_CLK_L2 AG20 MA0_CLK_L(2) MA_DATA(62) AG14 MEM_MA_DATA62
12,13 MEM_MA0_CLK_H1 G19 MA0_CLK_H(1) MA_DATA(61) AG16 MEM_MA_DATA61
12,13 MEM_MA0_CLK_L1 H19 MA0_CLK_L(1) MA_DATA(60) AD17 MEM_MA_DATA60
12,13 MEM_MA0_CLK_H0 U27 MA0_CLK_H(0) MA_DATA(59) AD13 MEM_MA_DATA59
12,13 MEM_MA0_CLK_L0 U26 MA0_CLK_L(0) MA_DATA(58) AE13 MEM_MA_DATA58
D MA_DATA(57) AG15 MEM_MA_DATA57 D
12,13 MEM_MA0_CS_L1 AC25 MA0_CS_L(1) MA_DATA(56) AE16 MEM_MA_DATA56
12,13 MEM_MA0_CS_L0 AA24 MA0_CS_L(0) MA_DATA(55) AG17 MEM_MA_DATA55
MA_DATA(54) AE18 MEM_MA_DATA54
12,13 MEM_MA0_ODT0 AC28 MA0_ODT(0) MA_DATA(53) AD21 MEM_MA_DATA53
MA_DATA(52) AG22 MEM_MA_DATA52
AE20 MA1_CLK_H(2) MA_DATA(51) AE17 MEM_MA_DATA51
AE19 MA1_CLK_L(2) MA_DATA(50) AF17 MEM_MA_DATA50
G20 MA1_CLK_H(1) MA_DATA(49) AF21 MEM_MA_DATA49
G21 MA1_CLK_L(1) MA_DATA(48) AE21 MEM_MA_DATA48
V27 MA1_CLK_H(0) MA_DATA(47) AF23 MEM_MA_DATA47
W27 MA1_CLK_L(0) MA_DATA(46) AE23 MEM_MA_DATA46
MA_DATA(45) AJ26 MEM_MA_DATA45
AD27 MA1_CS_L(1) MA_DATA(44) AG26 MEM_MA_DATA44
AA25 MA1_CS_L(0) MA_DATA(43) AE22 MEM_MA_DATA43
MA_DATA(42) AG23 MEM_MA_DATA42
AC27 MA1_ODT(0) MA_DATA(41) AH25 MEM_MA_DATA41
MA_DATA(40) AF25 MEM_MA_DATA40
12,13 MEM_MA_CAS_L AB25 MA_CAS_L MA_DATA(38) AJ29 MEM_MA_DATA38
12,13 MEM_MA_WE_L AB27 MA_WE_L MA_DATA(37) AF29 MEM_MA_DATA37
12,13 MEM_MA_RAS_L AA26 MA_RAS_L MA_DATA(36) AE26 MEM_MA_DATA36
12,13 MEM_MA_BANK2 N25 MA_BANK(2) MA_DATA(34) AH27 MEM_MA_DATA34
12,13 MEM_MA_BANK1 Y27 MA_BANK(1) MA_DATA(33) AG29 MEM_MA_DATA33
12,13 MEM_MA_BANK0 AA27 MA_BANK(0) MA_DATA(32) AF27 MEM_MA_DATA32
MA_DATA(31) E29 MEM_MA_DATA31
L27 MA_CKE(1) MA_DATA(30) E28 MEM_MA_DATA30
12,13 MEM_MA_CKE0 M25 MA_CKE(0) MA_DATA(29) D27 MEM_MA_DATA29
MA_DATA(28) C27 MEM_MA_DATA28
MEM_MA_ADD15 M27 G26 MEM_MA_DATA27
12,13 MEM_MA_ADD[15..0] MA_ADD(15) MA_DATA(27)
MEM_MA_ADD14 N24 F27 MEM_MA_DATA26
MEM_MA_ADD13 AC26
MA_ADD(14) MA_DATA(26)
MA_ADD(13) MA_DATA(25) C28 MEM_MA_DATA25
MEM_MA_ADD12 N26 E27 MEM_MA_DATA24
MEM_MA_ADD11 P25
MA_ADD(11) MA_DATA(23) F25 MEM_MA_DATA23
MEM_MA_ADD10 Y25 E25 MEM_MA_DATA22
MEM_MA_ADD9
N27 MA_ADD(9) MA_DATA(21) E23 MEM_MA_DATA21
MEM_MA_ADD8 R24 D23 MEM_MA_DATA20
MEM_MA_ADD7
C P27 MA_ADD(7) MA_DATA(19) E26 MEM_MA_DATA19 C
MEM_MA_ADD6 R25 C26 MEM_MA_DATA18
MEM_MA_ADD5
R26 MA_ADD(5) MA_DATA(17) G23 MEM_MA_DATA17
MEM_MA_ADD4 R27 F23 MEM_MA_DATA16
MEM_MA_ADD3
T25 MA_ADD(3) MA_DATA(15) E22 MEM_MA_DATA15
MEM_MA_ADD2 U25 E21 MEM_MA_DATA14
MEM_MA_ADD1
T27 MA_ADD(1) MA_DATA(13) F17 MEM_MA_DATA13
MEM_MA_ADD0 W24 G17 MEM_MA_DATA12
MA_DATA(11) G22 MEM_MA_DATA11
MEM_MA_DQS_H7AD15 F21 MEM_MA_DATA10
12 MEM_MA_DQS_H[7..0] MA_DQS_H(7) MA_DATA(10)
MEM_MA_DQS_L7AE15 G18 MEM_MA_DATA9
12 MEM_MA_DQS_L[7..0] MA_DQS_L(7) MA_DATA(9)
MEM_MA_DQS_H6AG18 E17 MEM_MA_DATA8
MEM_MA_DQS_L6AG19
MA_DQS_H(6) MA_DATA(8)
MA_DQS_L(6) MA_DATA(7) G16 MEM_MA_DATA7
MEM_MA_DQS_H5AG24 E15 MEM_MA_DATA6
MEM_MA_DQS_L5AG25
MA_DQS_L(5) MA_DATA(5) G13 MEM_MA_DATA5
MEM_MA_DQS_H4AG27 H13 MEM_MA_DATA4
MEM_MA_DQS_L4AG28
MA_DQS_L(4) MA_DATA(3) H17 MEM_MA_DATA3
MEM_MA_DQS_H3 D29 E16 MEM_MA_DATA2
MEM_MA_DQS_L3 C29
MA_DQS_L(3) MA_DATA(1) E14 MEM_MA_DATA1
MEM_MA_DQS_H2 C25 G14 MEM_MA_DATA0
MEM_MA_DQS_L2 D25
MEM_MA_DQS_H1 E19
MA_DQS_L(2)
MA_DQS_H(1) MA_DQS_H(8) J28 MEM_MA_DQS_H8 12
MEM_MA_DQS_L1 F19 J27
MA_DQS_L(1) MA_DQS_L(8) MEM_MA_DQS_L8 12
MEM_MA_DQS_H0 F15
MEM_MA_DQS_L0 G15
MA_DQS_H(0)
MA_DQS_L(0) MA_DM(8) J25 MEM_MA_DM8 12
MEM_MA_DM7 AF15 K25 MEM_MA_CHECK7
12 MEM_MA_DM[7..0] MA_DM(7) MA_CHECK(7) MEM_MA_CHECK[7..0] 12
MEM_MA_DM6 AF19 J26 MEM_MA_CHECK6
MEM_MA_DM5 AJ25
MA_DM(6) MA_CHECK(6) MEM_MA_CHECK5
MA_DM(5) MA_CHECK(5) G28
MEM_MA_DM4AH29 G27 MEM_MA_CHECK4
MEM_MA_DM3 B29
MA_DM(3) MA_CHECK(3) L24
MEM_MA_DM2 E24 K27 MEM_MA_CHECK2
MEM_MA_DM1 E18
MA_DM(1) MA_CHECK(1) H29
MEM_MA_DM0 H15 H27 MEM_MA_CHECK0
MA_DM(0) MA_CHECK(0)
B B
A A
FOXCONN PCEG
Title
M2- 2 DDR -1
C K8M890M01 A

5 4 3 2 1
5 4 3 2 1
U22C
MEMORY INTERFACE B
12,13 MEM_MB0_CLK_H2 AJ19 MB0_CLK_H(2) MB_DATA(63) AH13 MEM_MB_DATA63 MEM_MB_DATA[63..0] 12
12,13 MEM_MB0_CLK_L2 AK19 MB0_CLK_L(2) MB_DATA(62) AL13 MEM_MB_DATA62
12,13 MEM_MB0_CLK_H1 A18 MB0_CLK_H(1) MB_DATA(61) AL15 MEM_MB_DATA61
12,13 MEM_MB0_CLK_L1 A19 MB0_CLK_L(1) MB_DATA(60) AJ15 MEM_MB_DATA60
12,13 MEM_MB0_CLK_H0 U31 MB0_CLK_H(0) MB_DATA(59) AF13 MEM_MB_DATA59
12,13 MEM_MB0_CLK_L0 U30 MB0_CLK_L(0) MB_DATA(58) AG13 MEM_MB_DATA58
MB_DATA(57) AL14 MEM_MB_DATA57
12,13 MEM_MB0_CS_L1 AE30 MB0_CS_L(1) MB_DATA(56) AK15 MEM_MB_DATA56
12,13 MEM_MB0_CS_L0 AC31 MB0_CS_L(0) MB_DATA(55) AL16 MEM_MB_DATA55
D MB_DATA(54) AL17 MEM_MB_DATA54 D
12,13 MEM_MB0_ODT0 AD29 MB0_ODT(0) MB_DATA(53) AK21 MEM_MB_DATA53
AL19 MB1_CLK_H(2) MB_DATA(51) AH15 MEM_MB_DATA51
AL18 MB1_CLK_L(2) MB_DATA(50) AJ16 MEM_MB_DATA50
C19 MB1_CLK_H(1) MB_DATA(49) AH19 MEM_MB_DATA49
D19 MB1_CLK_L(1) MB_DATA(48) AL20 MEM_MB_DATA48
W29 MB1_CLK_H(0) MB_DATA(47) AJ22 MEM_MB_DATA47
W28 MB1_CLK_L(0) MB_DATA(46) AL22 MEM_MB_DATA46
AE29 MB1_CS_L(1) MB_DATA(44) AK25 MEM_MB_DATA44
AB31 MB1_CS_L(0) MB_DATA(43) AJ21 MEM_MB_DATA43
MB_DATA(42) AH21 MEM_MB_DATA42
AD31 MB1_ODT(0) MB_DATA(41) AH23 MEM_MB_DATA41
MB_DATA(40) AJ24 MEM_MB_DATA40
12,13 MEM_MB_CAS_L AC29 MB_CAS_L MB_DATA(38) AK27 MEM_MB_DATA38
12,13 MEM_MB_WE_L AC30 MB_WE_L MB_DATA(37) AH31 MEM_MB_DATA37
12,13 MEM_MB_RAS_L AB29 MB_RAS_L MB_DATA(36) AG30 MEM_MB_DATA36
12,13 MEM_MB_BANK2 N31 MB_BANK(2) MB_DATA(34) AL26 MEM_MB_DATA34
12,13 MEM_MB_BANK1 AA31 MB_BANK(1) MB_DATA(33) AJ30 MEM_MB_DATA33
12,13 MEM_MB_BANK0 AA28 MB_BANK(0) MB_DATA(32) AJ31 MEM_MB_DATA32
MB_DATA(31) E31 MEM_MB_DATA31
M31 MB_CKE(1) MB_DATA(30) E30 MEM_MB_DATA30
12,13 MEM_MB_CKE0 M29 MB_CKE(0) MB_DATA(29) B27 MEM_MB_DATA29
MB_DATA(28) A27 MEM_MB_DATA28
MEM_MB_ADD15 N28 F29 MEM_MB_DATA27
12,13 MEM_MB_ADD[15..0] MB_ADD(15) MB_DATA(27)
MEM_MB_ADD14 N29 F31 MEM_MB_DATA26
MEM_MB_ADD13
MB_ADD(14) MB_DATA(26)
AE31 MB_ADD(13) MB_DATA(25) A29 MEM_MB_DATA25
MEM_MB_ADD12 N30 A28 MEM_MB_DATA24
MEM_MB_ADD11
P29 MB_ADD(11) MB_DATA(23) A25 MEM_MB_DATA23
MEM_MB_ADD10 AA29 A24 MEM_MB_DATA22
MEM_MB_ADD9
P31 MB_ADD(9) MB_DATA(21) C22 MEM_MB_DATA21
MEM_MB_ADD8 R29 D21 MEM_MB_DATA20
MEM_MB_ADD7
R28 MB_ADD(7) MB_DATA(19) A26 MEM_MB_DATA19
MEM_MB_ADD6 R31 B25 MEM_MB_DATA18
MEM_MB_ADD5
R30 MB_ADD(5) MB_DATA(17) B23 MEM_MB_DATA17
C MEM_MB_ADD4 T31 A22 MEM_MB_DATA16 C
MEM_MB_ADD3
T29 MB_ADD(3) MB_DATA(15) B21 MEM_MB_DATA15
MEM_MB_ADD2 U29 A20 MEM_MB_DATA14
MEM_MB_ADD1
U28 MB_ADD(1) MB_DATA(13) C16 MEM_MB_DATA13
MEM_MB_ADD0 AA30 D15 MEM_MB_DATA12
MB_DATA(11) C21 MEM_MB_DATA11
MEM_MB_DQS_H7AK13 A21 MEM_MB_DATA10
12 MEM_MB_DQS_H[7..0] MB_DQS_H(7) MB_DATA(10)
MEM_MB_DQS_L7AJ13 A17 MEM_MB_DATA9
12 MEM_MB_DQS_L[7..0] MB_DQS_L(7) MB_DATA(9)
MEM_MB_DQS_L6AJ17
MB_DQS_H(6) MB_DATA(8)
MB_DQS_L(6) MB_DATA(7) B15 MEM_MB_DATA7
MEM_MB_DQS_L5AL23
MB_DQS_L(5) MB_DATA(5) E13 MEM_MB_DATA5
MEM_MB_DQS_H4AL28 F13 MEM_MB_DATA4
MEM_MB_DQS_L4AL29
MB_DQS_L(4) MB_DATA(3) C15 MEM_MB_DATA3
MEM_MB_DQS_H3 D31 A15 MEM_MB_DATA2
MEM_MB_DQS_L3 C31
MB_DQS_L(3) MB_DATA(1) A13 MEM_MB_DATA1
MEM_MB_DQS_H2 C24 D13 MEM_MB_DATA0
MEM_MB_DQS_L2 C23
MEM_MB_DQS_H1 D17
MB_DQS_L(2)
MB_DQS_H(1) MB_DQS_H(8) J31 MEM_MB_DQS_H8 12
MEM_MB_DQS_L1 C17 J30
MB_DQS_L(1) MB_DQS_L(8) MEM_MB_DQS_L8 12
MEM_MB_DQS_H0 C14
MEM_MB_DQS_L0 C13
MB_DQS_H(0)
MB_DQS_L(0) MB_DM(8) J29 MEM_MB_DM8 12
MEM_MB_DM7 AJ14 K29 MEM_MB_CHECK7
12 MEM_MB_DM[7..0] MB_DM(7) MB_CHECK(7) MEM_MB_CHECK[7..0] 12
MEM_MB_DM6 AH17 K31 MEM_MB_CHECK6
MEM_MB_DM5
MB_DM(6) MB_CHECK(6) MEM_MB_CHECK5
AJ23 MB_DM(5) MB_CHECK(5) G30
MEM_MB_DM4 AK29 G29 MEM_MB_CHECK4
MEM_MB_DM3
C30 MB_DM(3) MB_CHECK(3) L29
MEM_MB_DM2 A23 L28 MEM_MB_CHECK2
MEM_MB_DM1
B17 MB_DM(1) MB_CHECK(1) H31
MEM_MB_DM0 B13 G31 MEM_MB_CHECK0
MB_DM(0) MB_CHECK(0)
B B
A A
FOXCONN PCEG
Title
M2- 2 DDR -2
C K8M890M01 A

5 4 3 2 1
5 4 3 2 1
CPU Controlhttp://www.bufanxiu.com
CP2001
Level translation buffers
& Debug Interfaces

X_COPPER
Assuming system devices VDDA_25
Do not provide VDDIO L38
compatible voltage levels X_FB
dummyL0805 200 Ohm CPU_VDDA_RUN
1 2
C362 dummy C349 C339 C338

Note:V1.0 CHANGE SCH. * 22uF
* 4.7uF
* 3.3nF
* 0.22uF
C1206 C0805 C0603 C0603
16V, NPO, +/-5%

10V, Y5V, +80%/-20%
6.3V, X5R, +/-10%
10V, X7R, +/-10%

+2.5V
dummy Required for compatibility
VCC3 VCC3_SB
with future processors
R329 R600 R605
Keep trace to resistor
680 680 680 VCC_DDR
+/-5% +/-5% +/-5%
less than 600mils from CPU pin and VCC_DDR
D D
r0603h6 r0603h6 r0603h6
trace to AC caps less than 1250mils R314 R315 R309
R328 C317 3.9nF C0603 50V, X7R, +/-10% 300 300 300
* U22D +/-5%
*
D
1K Q31 VCC_DDR MISC
* * * See Note 1
1
3
5
7
8P4R0603
*
+/-5% 2N7002 5 CPU_CLKIN_H
C10 VDDA1 300
R0603 SOT23_GSD
*R308 D10 VDDA2 RN30 Voltage translation to meet VIH min of regulator
2
4
6
8
7.5 Ohm Vgs=10V
22 CPU_PWRGD G
*R323
300 *R321
300 *R291
300
169
+/-1% CPU_CLKIN_SC_H A8 CLKIN_H
+/-5% +/-5% +/-5%
R0603 R0603 R0603 dummy
+/-5% +/-5% +/-5% R0603 CPU_CLKIN_SC_L B8
*
R0603 R0603 R0603 5 CPU_CLKIN_L C314 3.9nF C0603 50V, X7R, +/-10% CLKIN_L
CPU_ALL_PWROK C9 D2 CPU_VID5 1 TP10
+2.5V CPU_LDTSTOP_L
PWROK VID(5) CPU_VID4
D8 LDTSTOP_L VID(4) D1 VREG_VID4 6
VCC3 VCC3_SB CPU_HT_RESET_L C7 C1 CPU_VID3
D
Q32 RESET_L VID(3) CPU_VID2
VREG_VID3 6
VID(2) E3 VREG_VID2 6
R307 R601 R606 2N7002 CPU_PRESENT_L AL3 E2 CPU_VID1
680 680 680 SOT23_GSD VCC_DDR CPU_PRESENT_L VID(1) CPU_VID0
VREG_VID1 6
VID(0) E1 VREG_VID0 6
2.5 R306 +/-5% +/-5% +/-5% CPU_PWRGD_G
G 7.5 Ohm Vgs=10V
1K *r0603h6 r0603h6r0603h6
*R293 *R295 CPU_SIC AL6 AK7CPU_THERMTRIP_L CPU_THERMTRIP* 22
D
+/-5% Q29 Q30 300 300 CPU_SID SIC THERMTRIP_L
AK6 AL7CPU_PROCHOT_L_1.8
S
R0603 2N7002 2N7002 +/-5% +/-5% SID PROCHOT_L
SOT23_GSD SOT23_GSD R0603 R0603 CPU_TDI AL10 CPU_TDO
AK10
7.5 Ohm Vgs=10VLDTSTOP_L_G 7.5 Ohm Vgs=10V dummy dummy CPU_TRST_L
TDI TDO
14 LDTSTOP_L G G 23 CPU_SIC AJ10 TRST_L
CPU_TCK AH10
23 CPU_SID CPU_TMS
TCK
AL9
D
S
S
Q28 TMS
VCC3 VCC3_SB
2N7002 *R294
300 CPU_DBREQ_L A5 DBREQ_L DBRDY B6 CPU_DBRDY
+2.5V SOT23_GSD +/-5%
PCIRST#_GG 7.5 Ohm Vgs=10V R0603 6 CPU_VDD_RUN_FB_H G2 AK11 CPU_VDDIO_SUS_FB_H
R284 R602 R607 VDD_FB_H VDDIO_FB_H CPU_VDDIO_SUS_FB_L
6 CPU_VDD_RUN_FB_L G1 VDD_FB_L VDDIO_FB_L AL11
680 680 680 GND
S
+/-5% +/-5% +/-5% TP6 1 CPU_VTT_SUS_SENSE E12 F1 CPU_PSI_L 1 TP8 +1.2V_HT
R285 r0603h6 r0603h6 r0603h6 VTT_SENSE PSI_L
*
D
1K Q26 VCC_DDR CPU_M_VREF_SUS

+/-5% 2N7002 F12 V8 CPU_HTREF1 R296 44.2 r0603h6 +/-1% Keep trace to resistors
**
R0603 SOT23_GSD R318 39.2 R0603 +/-1% M_VREF HTREF1 R297 44.2 r0603h6 +/-1%
G 7.5 Ohm Vgs=10V
Keep trace to resistors less R317 39.2 R0603 +/-1%
M_ZN
M_ZP
AH11
AJ11
M_ZN HTREF0 V7 CPU_HTREF0
less than 1.5" from CPU pin
17,22,23 PCIRST# M_ZP
than 1.5" from CPU pin
C CPU_TEST25_H A10 C11 CPU_TEST29_H C
S
CPU_TEST25_L
TEST25_H TEST29_H CPU_TEST29_L GND
B10 D11
**
GND R312 300 R0603 +/-5% TEST25_L TEST29_L R324
F10 TEST19
dummy R313 300 R0603 +/-5% 80.6
E9 Route as 80-Ohm differential impedance
D
TEST18
Q27 +/-5% Erratum 133, Revision Guide for AJ7 TEST13
+/-1%
2N7002 r0603h6
SOT23_GSD
R0603 AMD NPT 0Fh Processors F6 TEST9 Keep trace to resistor less than 1" from CPU pin
5,16,19,22,30 ALL_PWRGD G 7.5 Ohm Vgs=10V * 0
R322
GND
TP11 1 CPU_TEST17 GND
D6 TEST17 TEST24 AK8 CPU_TEST24 1 TP18
TP17 1 CPU_TEST16 E7 AH8 CPU_TEST23 1 TP22
TP26 CPU_TEST15
TEST16 TEST23 CPU_TEST22 TP24
1 F8 AJ9 1
S
TP13 CPU_TEST14
TEST15 TEST22 CPU_TEST21
1 C5 TEST14 TEST21 AL8
TP23 1 CPU_TEST12 AH9 AJ8 CPU_TEST20 1 TP4
Note 1 TEST12 TEST20
E5 TEST7 TEST28_H J10
AJ5 TEST6 TEST28_L H9
5-bit VID Implementation: These signals must be 23 CPU_THERMDC
CPU_THERMDC
CPU_THERMDA
AG9
AG8
THERMDC TEST27 AK9
AK5 CPU_TEST26
23 CPU_THERMDA THERMDA TEST26
VID4:0 connects to VID4:0 of regulator* driven low during S3 AH7 TEST3 TEST10 G7
AJ6 D4
VID5 should be left unconnected. and S5 states, including
TEST2 TEST8
VID1 should be pulled up to VDDIO for compatibility with

future processors * state transitions, to meet
Translation may be needed to meet the input requirements HT I/O Link Specification
CPU_DBREQ_L 1 TP1
of the regulator inputs (See datasheet for processor Voh CPU_DBRDY 1 TP16
VCC3_SB TP25
specs & regulator datasheet for Vih min requirements) CPU_TCK
CPU_TMS
1
1 TP19
U22E CPU_TDI 1 TP29
6-bit VID Implementation: * C800

0.1uF L25 RSVD1
INTERNAL MISC
RSVD17 E20
CPU_TRST_L
CPU_TDO
1
1
TP27
TP12
C0603 L26 B19
VID5:0 directly connects to VID5:0 of regulator. dummy L31
RSVD2 RSVD18
RSVD3
VID1 should be pulled up to VDDIO for compatibility with
14
L30 RSVD4 RSVD19 AL4

U58A AK4
RSVD20
future processors 22 CPU_PWRGD 1 RSVD21 AK3
3 CPU_PWRGD_G
B NOTE: There is an incompatibility between the 5-bit VID 2 F2
B
5,16,19,22,30 ALL_PWRGD RSVD22
code & 6-bit VID code x11111b. VID code 11111b is 慜FF SN74LVC00APWR W26
RSVD23 F3
7
RSVD5
for 5-bit VID controllers & a valid VID code for 6-bit VID W25 RSVD6 RSVD24 G4
AE27 G3
controllers (011111b is 775mv & 111111b is 375mv). These U24
RSVD7
RSVD8
RSVD25
RSVD26 G5
are not planned to be operating VID抯 for non-mobile V24 RSVD9
Erratum 133, Revision Guide for
AE28 AD25 VCC_DDR
processors so no adverse system implications will occur VCC3_SB RSVD10 RSVD27
AE24 AMD NPT 0Fh Processors
RSVD28
AE25
*
RSVD29
using a 5-bit VID or 6-bit controller in non-mobile RSVD30 AJ18 CPU_TEST26 R298 300 R0603 +/-5% CPU_VDDA_RUN
14
AJ20
implementations. Please see AMD Socket M2 Motherboard U58B RSVD31
C18 1 TP28
RSVD32 R299 1K r0603h6 +/-5%
Design Guide, PID #33165 for more details. 14 LDTSTOP_L 4
6 LDTSTOP_L_G
Y31
Y30
RSVD11 RSVD33 C20
G24
CPU_PRESENT_L
CPU_TEST25_H R311 510 r0603h6 +/-1% CPU_CLKIN_H 1 TP7
CPUHS RSVD12 RSVD34 CPU_CLKIN_L TP9
HEATSINK_SOCKET_940_M2 5 AG31 RSVD13 RSVD35 G25 1
V31 H25 CPU_TEST25_L R310 510 r0603h6 +/-1%
BGA940_M2_1_27MM_HEATSINK SN74LVC00APWR RSVD14 RSVD36 CPU_VDD_RUN_FB_H TP2005
W31 V29 1
7
RSVD15 RSVD37 CPU_VDD_RUN_FB_L TP2004

AF31 W30 1
*
RSVD16 RSVD38 CPU_TEST21 R316 300 R0603 +/-5%
5 MTG1 MTG3 21
6 MTG1 MTG3 22 CPU_TEST29_H 1 TP2029
7 MTG1 MTG3 23 CPU_TEST29_L 1 TP5
8 MTG1 MTG3 24 Erratum 133, Revision Guide for
9 25 VCC3_SB CPU_VDDIO_SUS_FB_H 1 TP31
10
MTG1
MTG1
MTG3
MTG3 26 AMD NPT 0Fh Processors GND CPU_VDDIO_SUS_FB_L 1 TP30
11 MTG1 MTG3 27
TP2030
14
12 28 CPU_ALL_PWROK 1
MTG1 MTG3
U58C
1
2
13
EMI
EMI
EMI
EMI
3
4
29
17,22,23 PCIRST# 9
10
8 PCIRST#_G CPU_M_VREF_SUS CPU_LDTSTOP_L
CPU_HT_RESET_L
1
1
TP20
TP15
MTG2 MTG4
14 30 SN74LVC00APWR CPU_THERMTRIP_L 1 TP21
7
MTG2 MTG4
15 MTG2 MTG4 31
16 MTG2 MTG4 32 VCC_DDR
17 MTG2 MTG4 33
18 MTG2 MTG4 34
A 19 MTG2 MTG4 35 R320 A
20 MTG2 MTG4 36 16.9
+/-1% CPU_M_VREF_SUS
r0603h6
I118
R319 C322
C323
GND
VCC3_SB 16.9
+/-1% * 0.1uF * 1nF
Layout: Place near CPU socket
14
U58D r0603h6 C0603 C0603

12 FOXCONN PCEG
11
13 Title
SN74LVC00APWR GND M2- 3 MISC

7

C K8M890M01 A

5 4 3 2 1
5 4 3 2 1
Processor Power & Ground
D D
VLDT_RUN_B is connected to the VLDT_RUN power

supply through the package or on the die. It is only connected
+V_CPU on the board to decoupling near the CPU package.
U22F
VDD1 +V_CPU U22I VLDT_RUN_B
A4 A3 U22G +V_CPU U22H +1.2V_HT VDDIO
10V, Y5V, +80%/-20%

VDD1 VSS1 C291
A6 VDD2 VSS2 A7 VDD2 VDD3 AJ4 VLDT_A1 VLDT_B1 H6
AA8
AA10
VDD3
VDD4
VSS3
VSS4
A9
A11
L14
L16
VDD1
VDD2
VSS1
VSS2
AK20
AK22
AA20
AA22
VDD1
VDD2
VSS1
VSS2
N17
N19
AJ3
AJ2
VLDT_A2
VLDT_A3
VLDT_B2
VLDT_B3
H5
H2
* 4.7uF
C0805
Bottomside Decoupling
AA12 VDD5 VSS5 AA4 L18 VDD3 VSS3 AK24 AB13 VDD3 VSS3 N21 AJ1 VLDT_A4 VLDT_B4 H1
AA14 AA5 M2 AK26 AB15 N23 VTT_DDR VTT_DDR
VDD6 VSS6 VDD4 VSS4 VDD4 VSS4
AA16 VDD7 VSS7 AA7 M3 VDD5 VSS5 AK28 AB17 VDD5 VSS5 P2 D12 VTT1 VTT5 AK12
GND
AA18 VDD8 VSS8 AA9 M7 VDD6 VSS6 AK30 AB19 VDD6 VSS6 P3 C12 VTT2 VTT6 AJ12
AB7 VDD9 VSS9 AA11 M9 VDD7 VSS7 AL5 AB21 VDD7 VSS7 P8 B12 VTT3 VTT7 AH12
AB9 AA13 M11 B4 AB23 P10 VCC_DDR A12 AG12
VDD10 VSS10 VDD8 VSS8 VDD8 VSS8 VTT4 VTT8 +V_CPU
AB11 VDD11 VSS11 AA15 M13 VDD9 VSS9 B9 AC12 VDD9 VSS9 P12 VTT9 AL12
AC4 VDD12 VSS12 AA17 M15 VDD10 VSS10 B11 AC14 VDD10 VSS10 P14 AB24 VDDIO1
AC5 VDD13 VSS13 AA19 M17 VDD11 VSS11 B14 AC16 VDD11 VSS11 P16 AB26 VDDIO2 VSS1 K24
AC8 AA21 M19 B16 AC18 P18 AB28 K26 C696 C714 C699 C729 C728 C706 C715 C704 C692 C695 C727 C726 C705 C713 C716
VDD14 VSS14 VDD12 VSS12 VDD12 VSS12 VDDIO3 VSS2
AC10
AD2
VDD15 VSS15 AA23
AB2
N8
N10
VDD13 VSS13 B18
B20
AC20
AC22
VDD13 VSS13 P20
P22
AB30
AC24
VDDIO4 VSS3 K28
K30
* 22uF
C1206 * 22uF
C1206 * 22uF
C1206 * 22uF
C1206 * 22uF
C1206 * 22uF
C1206 * 22uF
C1206 * 22uF
C1206 * 22uF
C1206 * 22uF
C1206 * 22uF
C1206 * 22uF
C1206 * 22uF
C1206 * 22uF
C1206 * 22uF
C1206
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%

AD3 VDD17 VSS17 AB3 N12 VDD15 VSS15 B22 AD11 VDD15 VSS15 R7 AD26 VDDIO6 VSS5 L7
AD7 VDD18 VSS18 AB8 N14 VDD16 VSS16 B24 AD23 VDD16 VSS16 R9 AD28 VDDIO7 VSS6 L9
AD9 VDD19 VSS19 AB10 N16 VDD17 VSS17 B26 AE12 VDD17 VSS17 R11 AD30 VDDIO8 VSS7 L11
AE10 VDD20 VSS20 AB12 N18 VDD18 VSS18 B28 AF11 VDD18 VSS18 R13 AF30 VDDIO29 VSS8 L13
GND
AF7 VDD21 VSS21 AB14 P7 VDD19 VSS19 B30 L20 VDD19 VSS19 R15 M24 VDDIO9 VSS9 L15
AF9 VDD22 VSS22 AB16 P9 VDD20 VSS20 C3 L22 VDD20 VSS20 R17 M26 VDDIO10 VSS10 L17
AG4 VDD23 VSS23 AB18 P11 VDD21 VSS21 D14 M21 VDD21 VSS21 R19 M28 VDDIO11 VSS11 L19
C AG5 AB20 P13 D16 M23 R21 M30 L21 @back @back @back @back @back @back @back @back @back @back @back @back @back @back @back C
AG7 VDD25 VSS25 AB22 P15 VDD23 VSS23 D18 N20 VDD23 VSS23 R23 P24 VDDIO13 VSS13 L23
AH2 VDD26 VSS26 AC7 P17 VDD24 VSS24 D20 N22 VDD24 VSS24 T8 P26 VDDIO14 VSS14 M8
AH3 VDD27 VSS27 AC9 P19 VDD25 VSS25 D22 P21 VDD25 VSS25 T10 P28 VDDIO15 VSS15 M10
B3 VDD28 VSS28 AC11 R4 VDD26 VSS26 D24 P23 VDD26 VSS26 T12 P30 VDDIO16 VSS16 M12
B5 VDD29 VSS29 AC13 R5 VDD27 VSS27 D26 R22 VDD27 VSS27 T14 T24 VDDIO17 VSS17 M14
B7 VDD30 VSS30 AC15 R8 VDD28 VSS28 D28 T23 VDD28 VSS28 T16 T26 VDDIO18 VSS18 M16
C2 VDD31 VSS31 AC17 R10 VDD29 VSS29 D30 U22 VDD29 VSS29 T18 T28 VDDIO19 VSS19 M18
C4 VDD32 VSS32 AC19 R12 VDD30 VSS30 E11 V23 VDD30 VSS30 T20 T30 VDDIO20 VSS20 M20
C6 VDD33 VSS33 AC21 R14 VDD31 VSS31 F4 W22 VDD31 VSS31 T22 V25 VDDIO21 VSS21 M22
C8 VDD34 VSS34 AC23 R16 VDD32 VSS32 F14 Y23 VDD32 VSS32 U4 V26 VDDIO22 VSS22 N4
D3 VDD35 VSS35 AD8 R18 VDD33 VSS33 F16 VSS33 U5 V28 VDDIO23 VSS23 N5
D5 VDD36 VSS36 AD10 R20 VDD34 VSS34 F18 VSS34 U7 V30 VDDIO24 VSS24 N7
D7 VDD37 VSS37 AD12 T2 VDD35 VSS35 F20 VSS35 U9 Y24 VDDIO25 VSS25 N9
D9 VDD38 VSS38 AD14 T3 VDD36 VSS36 F22 VSS36 U11 Y26 VDDIO26 VSS26 N11
E4 VDD39 VSS39 AD16 T7 VDD37 VSS37 F24 VSS37 U13 Y28 VDDIO27 VSS27 N13
E6 AD20 T9 F26 U15 Y29 N15 VCC_DDR
VDD40 VSS40 VDD38 VSS38 VSS38 VDDIO28 VSS28
E8 VDD41 VSS41 AD22 T11 VDD39 VSS39 F28 VSS39 U17
E10 VDD42 VSS42 AD24 T13 VDD40 VSS40 F30 VSS40 U19
F5 AE4 T15 G9 U21 C531 C532 C738 C533 C539 C545 C541 C538 C537
VDD43 VSS43 VDD41 VSS41 VSS41 GND
F7 VDD44 VSS44 AE5 T17 VDD42 VSS42 G11 VSS42 U23
* 22uF
C1206 * 22uF
C1206 * 4.7uF
C0805 * 4.7uF
C0805 * 0.22uF
C0603 * 0.22uF
C0603 * 0.22uF
C0603 * 10nF
C0603 * 180pF
C0603
50V, X7R, +/-10%

F9 AE9 T19 H8 V2
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%

VDD45 VSS45 VDD43 VSS43 VSS43
10V, X7R, +/-10%
10V, X7R, +/-10%
10V, X7R, +/-10%
50V, X7R, +/-10%

F11 VDD46 VSS46 AE11 T21 VDD44 VSS44 H10 VSS44 V3
G6 VDD47 VSS47 AF2 U8 VDD45 VSS45 H12 VSS45 V10
GND
H7 VDD51 VSS51 AF12 U16 VDD49 VSS49 H22 VSS49 V18
J8 AF18 V9 H28 W9 @back @back @back @back @back @back @back @back @back
J12 VDD55 VSS55 AF20 V11 VDD53 VSS53 H30 VSS53 W11
J14 VDD56 VSS56 AF22 V13 VDD54 VSS54 J4 VSS54 W13
J22 VDD60 VSS61 AG10 V21 VDD58 VSS58 J11 VSS58 W21
B
J24
K7
VDD61
VDD62
VSS62
VSS63
AG11
AH14
W4
W5
VDD59
VDD60
VSS59
VSS60
J13
J15
VSS59
VSS60
W23
Y8
Decoupling Between Processor and DIMMs B
K9 AH16 W8 J17 Y10

K11
K13
VDD63
VDD64
VSS64
VSS65 AH18
AH20
W10
W12
VDD61
VDD62
VSS61
VSS62 J19
J21
VSS61
VSS62 Y12
W7
Place as close to processor as possible. Decoupling Between Processor and DIMMs
K15 VDD66 VSS67 AH22 W14 VDD64 VSS64 J23 VSS64 Y20
K17 AH24 W16 K2 Y22 VCC_DDR
K19 VDD68 VSS69 AH26 W18 VDD66 VSS66 K3
K21 VDD69 VSS70 AH28 W20 VDD67 VSS67 K8
GND C467 C506 C508 C474
K23 VDD70 VSS71 AH30 Y2 VDD68 VSS68 K10
L4
L5
VDD71 VSS72 AK2
AK14
Y3
Y7
VDD69 VSS69 K12
K14
* 4.7uF
C0805
10V, Y5V, +80%/-20%
* 4.7uF
C0805 * 0.22uF
C0603 * 0.22uF
C0603
10V, Y5V, +80%/-20%

VDD72 VSS73 VDD70 VSS70
10V, X7R, +/-10%
10V, X7R, +/-10%

L8 VDD73 VSS74 AK16 Y9 VDD71 VSS71 K16
L10 VDD74 VSS75 AK18 Y11 VDD72 VSS72 K18
L12 VDD75 VSS240 Y14 Y13 VDD73 VSS73 K20 VCC_DDR A1 A31
Y17 VDD150 VSS241 Y16 Y15 VDD74 VSS74 K22
GND
Y19 VDD151 Y21 VDD75 VSS75 Y18
C519 C466
GND
GND * 180pF
C0603 * 180pF
C0603
50V, X7R, +/-10%
50V, X7R, +/-10%

VTT_DDR
GND M2
C348 C354 C332 C347 C381 C328 C576 C334
Top View
* 4.7uF
C0805 * 4.7uF
C0805 * 0.22uF
C0603 * 0.22uF
C0603 * 1nF
C0603
50V, X7R, +/-10%
* 1nF
C0603 * 180pF
C0603 * 180pF
C0603
50V, X7R, +/-10%

10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, X7R, +/-10%
10V, X7R, +/-10%
50V, X7R, +/-10%
50V, X7R, +/-10%

GND
AL1
Place near processor on VLDT pour.
+1.2V_HT
A A
VTT_DDR
C307 C308 C303 C304 C306 C305
* 4.7uF
C0805 * 4.7uF
C0805 * 0.22uF
C0603 * 0.22uF
C0603 * 180pF
C0603 * 180pF
C0603 C335 C592 C333 C331 C388 C327 C330 C409
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
* 4.7uF
* 4.7uF
* 0.22uF
* 0.22uF
* 1nF
* 1nF
* 180pF
* 180pF
10V, X7R, +/-10%
10V, X7R, +/-10%
50V, X7R, +/-10%
50V, X7R, +/-10%
C0805 C0805 C0603 C0603 C0603 C0603 C0603 C0603

50V, X7R, +/-10%
50V, X7R, +/-10%

10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, X7R, +/-10%
10V, X7R, +/-10%
50V, X7R, +/-10%
50V, X7R, +/-10%
GND FOXCONN PCEG

GND Title
M2- 4 Power
C K8M890M01 A

5 4 3 2 1
5 4 3 2 1
SMB_MEM BUS ADDRESS
DIMM 0 1010 000

DIMM 1 1010 001
DIMM 2 1010 010
DIMM 3 1010 011
DIMMA0 First Logical DDR2 DIMM

D
VCC_DDR
DIMMB0 D
VCC3 VCC_DDR VCC3
172
178
184
187
189
197
170
175
181
191
194
238
172
178
184
187
189
197
170
175
181
191
194
238
DIMM1 DIMM2
53
59
64
67
69
51
56
62
72
75
78
53
59
64
67
69
51
56
62
72
75
78
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDSPD
VDDQ10
VDDQ11
VDDSPD
164 236 MEM_MA_DATA63 164 236 MEM_MB_DATA63
8 MEM_MA_DM8 DQS17_H DQ63 MEM_MA_DATA[63..0] 8 9 MEM_MB_DM8 DQS17_H DQ63 MEM_MB_DATA[63..0] 9
MEM_MA_DM7
DQS17_L DQ62 MEM_MA_DATA61 MEM_MB_DM7
DQS17_L DQ62 MEM_MB_DATA61
8 MEM_MA_DM[7..0] 232 DQS16_H DQ61 230 9 MEM_MB_DM[7..0] 232 DQS16_H DQ61 230
MEM_MA_DM6
223 DQS15_H DQ59 117 223 DQS15_H DQ59 117
MEM_MA_DM5
211 DQS14_H DQ57 111 211 DQS14_H DQ57 111
MEM_MA_DM4
202 DQS13_H DQ55 227 202 DQS13_H DQ55 227
MEM_MA_DM3
155 DQS12_H DQ53 218 155 DQS12_H DQ53 218
MEM_MA_DM2
146 DQS11_H DQ51 108 146 DQS11_H DQ51 108
MEM_MA_DM1
134 DQS10_H DQ49 99 134 DQS10_H DQ49 99
MEM_MA_DM0
125 DQS9_H DQ47 215 125 DQS9_H DQ47 215
DQS9_L DQ46 MEM_MA_DATA45
8 MEM_MA_DQS_H8 46 DQS8_H DQ45 209 9 MEM_MB_DQS_H8 46 DQS8_H DQ45 209
8 MEM_MA_DQS_L8 MEM_MA_DQS_H7
9 MEM_MB_DQS_L8 MEM_MB_DQS_H7
8 MEM_MA_DQS_H[7..0] 114 DQS7_H DQ43 96 9 MEM_MB_DQS_H[7..0] 114 DQS7_H DQ43 96
MEM_MA_DQS_L7 113 95 MEM_MA_DATA42 MEM_MB_DQS_L7 113 95 MEM_MB_DATA42
8 MEM_MA_DQS_L[7..0] MEM_MA_DQS_H6
9 MEM_MB_DQS_L[7..0] MEM_MB_DQS_H6
105 DQS6_H DQ41 90 105 DQS6_H DQ41 90
MEM_MA_DQS_H5
DQS6_L DQ40 MEM_MA_DATA39 MEM_MB_DQS_H5
93 DQS5_H DQ39 206 93 DQS5_H DQ39 206
MEM_MA_DQS_H4
C 84 DQS4_H DQ37 200 84 DQS4_H DQ37 200 C
MEM_MA_DQS_H3
37 DQS3_H DQ35 87 37 DQS3_H DQ35 87
MEM_MA_DQS_H2
28 DQS2_H DQ33 81 28 DQS2_H DQ33 81
MEM_MA_DQS_H1
16 DQS1_H DQ31 159 16 DQS1_H DQ31 159
MEM_MA_DQS_H0
7 DQS0_H DQ29 153 7 DQS0_H DQ29 153
DQS0_L DQ28 MEM_MA_DATA27 VCC3 DQS0_L DQ28 MEM_MB_DATA27
DQ27 40 DQ27 40
SA2 DQ26 MEM_MA_DATA25
SA2 DQ26 MEM_MB_DATA25
240 SA1 DQ25 34 240 SA1 DQ25 34
GND SA0 DQ24 MEM_MA_DATA23
SA0 DQ24 MEM_MB_DATA23
5,18,20,26,30 SMBCLK 120 SCL DQ23 150 5,18,20,26,30 SMBCLK 120 SCL DQ23 150
5,18,20,26,30 SMBDATA SDA DQ22 5,18,20,26,30 SMBDATA SDA DQ22
54 144 MEM_MA_DATA21 GND 54 144 MEM_MB_DATA21
8,13 MEM_MA_BANK2 BA2 DQ21 MEM_MA_DATA20
9,13 MEM_MB_BANK2 BA2 DQ21 MEM_MB_DATA20
8,13 MEM_MA_BANK1 190 BA1 DQ20 143 9,13 MEM_MB_BANK1 190 BA1 DQ20 143
8,13 MEM_MA_BANK0 BA0 DQ19 MEM_MA_DATA18
9,13 MEM_MB_BANK0 BA0 DQ19 MEM_MB_DATA18
DQ18 30 DQ18 30
MEM_MA_ADD15 173 25 MEM_MA_DATA17 MEM_MB_ADD15 173 25 MEM_MB_DATA17
8,13 MEM_MA_ADD[15..0] MEM_MA_ADD14
A15 DQ17 MEM_MA_DATA16
9,13 MEM_MB_ADD[15..0] MEM_MB_ADD14
A15 DQ17 MEM_MB_DATA16
174 A14 DQ16 24 174 A14 DQ16 24
MEM_MA_ADD12
A13 DQ15 MEM_MA_DATA14 MEM_MB_ADD12
176 A12 DQ14 140 176 A12 DQ14 140
MEM_MA_ADD10
70 A10 DQ12 131 70 A10 DQ12 131
MEM_MA_ADD8
179 A8 DQ10 21 179 A8 DQ10 21
MEM_MA_ADD6
A7 DQ9 MEM_MB_DATA8
180 A6 DQ8 12 180 A6 DQ8 12
MEM_MA_ADD4
A5 DQ7 MEM_MB_DATA6
61 A4 DQ6 128 61 A4 DQ6 128
MEM_MA_ADD2
A3 DQ5 MEM_MB_DATA4
63 A2 DQ4 122 63 A2 DQ4 122
MEM_MA_ADD0
A1 DQ3 MEM_MB_DATA2
188 A0 DQ2 9 188 A0 DQ2 9
4 MEM_MA_DATA1 4 MEM_MB_DATA1
MEM_MA_CHECK7
DQ1 MEM_MA_DATA0 MEM_MB_CHECK7
DQ1 MEM_MB_DATA0
B 8 MEM_MA_CHECK[7..0] 168 CB7 DQ0 3 9 MEM_MB_CHECK[7..0] 168 CB7 DQ0 3 B
MEM_MA_CHECK6 167 MEM_MB_CHECK6 167
MEM_MA_CHECK5
CB6 MEM_MB_CHECK5
CB6
162 CB5 WE_L 73 MEM_MA_WE_L 8,13 162 CB5 WE_L 73 MEM_MB_WE_L 9,13
MEM_MA_CHECK4 161 MEM_M_VREF_SUS MEM_MB_CHECK4 161 MEM_M_VREF_SUS
MEM_MA_CHECK3
CB4 MEM_MB_CHECK3
CB4
49 CB3 VREF 1 49 CB3 VREF 1
MEM_MA_CHECK1
CB2 MEM_MB_CHECK1
CB2
43 CB1 TEST 102 43 CB1 TEST 102
CB0 CB0
ODT0 195 MEM_MA0_ODT0 8,13 ODT0 195 MEM_MB0_ODT0 9,13
8,13 MEM_MA0_CLK_H0 185 CK0_H ODT1 77 9,13 MEM_MB0_CLK_H0 185 CK0_H ODT1 77
8,13 MEM_MA0_CLK_L0 186 CK0_L 9,13 MEM_MB0_CLK_L0 186 CK0_L
8,13 MEM_MA0_CLK_H1 137 CK1_H ERR_OUT_L 55 9,13 MEM_MB0_CLK_H1 137 CK1_H ERR_OUT_L 55
138 68 138 68 GND
8,13 MEM_MA0_CLK_L1 CK1_L PAR_IN GND 9,13 MEM_MB0_CLK_L1 CK1_L PAR_IN
8,13 MEM_MA0_CLK_H2 220 CK2_H 9,13 MEM_MB0_CLK_H2 220 CK2_H
8,13 MEM_MA0_CLK_L2 221 CK2_L NC1 19 9,13 MEM_MB0_CLK_L2 221 CK2_L NC1 19
18 RESET_L 18 RESET_L
MEM_MA_CKE0 52 52
8,13 MEM_MA_CKE0 CKE0 9,13 MEM_MB_CKE0 CKE0
171 CKE1 171 CKE1
8,13 MEM_MA_RAS_L 192 RAS_L 9,13 MEM_MB_RAS_L 192 RAS_L
8,13 MEM_MA_CAS_L 74 CAS_L 9,13 MEM_MB_CAS_L 74 CAS_L
8,13 MEM_MA0_CS_L0
8,13 MEM_MA0_CS_L1
193
76
S0_L
S1_L MEM_M_VREF_SUS 9,13 MEM_MB0_CS_L0
9,13 MEM_MB0_CS_L1
193
76
S0_L
S1_L
VCC_DDR
121 CON_DDR2_240_STD 240
*R417 C523
+/-1% * 1
59
R0603
0.1uF
C0603
MEM_M_VREF_SUS 120
A A
*R418 C524
C522
+/-1% * *
59 1nF
0.1uF
R0603 C0603 C0603
Layout: Place near DIMM sockets

GND FOXCONN PCEG
Title
DDR SDRAM DIMM 1 - 2
C K8M890M01 A

5 4 3 2 1
5 4 3 2 1
DDR2 http://www.bufanxiu.com
Termination
VTT_DDR
VTT_DDR
D D
47
MEM_MA_ADD[15..0] MEM_MA_ADD15 RN72D 7

*
47
847 8p4r0402h5
8,12 MEM_MA0_CLK_H2 C387 9,12 MEM_MB_ADD[15..0]
MEM_MB_ADD15 RN71B 3
MEM_MB_ADD14 RN71D 7
*
*
447 8p4r0402h5
847 8p4r0402h5
8,12 MEM_MA_ADD[15..0] MEM_MA_ADD14 RN72A 1
MEM_MA_ADD13 RN65B 3
*
*
247 8p4r0402h5
447 8p4r0402h5
* 1.5pF
50V, NPO, +/-0.25pF
MEM_MB_ADD13 RN65A 1
MEM_MB_ADD12 RN69B 3
*
*
247 8p4r0402h5
447 8p4r0402h5
MEM_MA_ADD12 RN70D 7
MEM_MA_ADD11 RN70A 1
*
*
847 8p4r0402h5
247 8p4r0402h5
C0603 MEM_MB_ADD11 RN73B 3
MEM_MB_ADD10 RN62A 1
*
*
447 8p4r0402h5
247 8p4r0402h5
8,12 MEM_MA0_CLK_L2
MEM_MA_ADD10 RN64C
MEM_MB_ADD0
MEM_MA_ADD9 RN71C 5
5 *
*
647 8p4r0402h5
647 8p4r0402h5
MEM_MB_ADD9 RN69D 7
MEM_MB_ADD8 RN60A 1
*
*
847 8p4r0402h5
247 8p4r0402h5
MEM_MA_ADD8 RN69A 1
MEM_MA_ADD7 RN70C 5
*
*
247 8p4r0402h5
647 8p4r0402h5
8,12 MEM_MA0_CLK_H1 C386
MEM_MB_ADD7 RN73D 7
MEM_MB_ADD6 RN60C 5
*
*
847 8p4r0402h5
647 8p4r0402h5
MEM_MA_ADD6 RN69C 5
MEM_MA_ADD5 RN73A
MEM_MB_ADD5
1
*
*
647 8p4r0402h5
247 8p4r0402h5
* 1.5pF
50V, NPO, +/-0.25pF
MEM_MB_ADD5 RN73C
MEM_MB_ADD4 RN61A 1
5 *
MEM_MA_ADD5
*
647 8p4r0402h5
247 8p4r0402h5
MEM_MA_ADD4 RN60B 3
MEM_MA_ADD3 RN60D 7
*
*
447 8p4r0402h5
847 8p4r0402h5
C0603 MEM_MB_ADD3 RN61B 3
MEM_MB_ADD2 RN64A
*
*
MEM_MA_ADD2
1
447 8p4r0402h5
247 8p4r0402h5
8,12 MEM_MA0_CLK_L1
MEM_MA_ADD2 RN64B
MEM_MB_ADD2
MEM_MA_ADD1 RN61D 7
3 *
*
447 8p4r0402h5
847 8p4r0402h5
MEM_MB_ADD1 RN61C 5
MEM_MB_ADD0 RN64D
*
*
MEM_MA_ADD0
7
647 8p4r0402h5
8 8p4r0402h5
MEM_MA_ADD0 RN63A
MEM_MA_ADD10
1 * 2 8p4r0402h5
47 8,12 MEM_MA0_CLK_H0 C457 RN67C 5*
47
647 8p4r0402h5
9,12 MEM_MB0_ODT0
7* 1*
8,12 MEM_MA0_ODT0
9,12 MEM_MB_WE_L
RN67D
RN68D 7*
847 8p4r0402h5
847 8p4r0402h5
* 1.5pF
50V, NPO, +/-0.25pF 9,12 MEM_MB_CAS_L
8,12 MEM_MA_WE_L
RN67A
RN68B 3*
247 8p4r0402h5
4 8p4r0402h5
8,12 MEM_MA_RAS_L
RN62B 3* 4 8p4r0402h5 C0603 47
47
8,12 MEM_MA0_CLK_L0 9,12 MEM_MB_BANK2
RN70B 3* 447 8p4r0402h5
8,12 MEM_MA_BANK2
RN72C 5* 647 8p4r0402h5 9,12 MEM_MB_BANK1
RN63C 5* 647 8p4r0402h5
8,12 MEM_MA_BANK1
RN63B 3* 447 8p4r0402h5 9,12 MEM_MB_BANK0
RN62C 5* 6 8p4r0402h5
8,12 MEM_MA_BANK0
RN63D 7* 8 8p4r0402h5 9,12 MEM_MB0_CLK_H2
47
C377 RN71A 1* 2 8p4r0402h5
8,12 MEM_MA_CKE0
RN72B 3*
47
4 8p4r0402h5
* 1.5pF
50V, NPO, +/-0.25pF 9,12 MEM_MB_CKE0
R474 47 r0603h6 +/-5%
C0603 47
RN68A 1*
47
2 8p4r0402h5
9,12 MEM_MB0_CLK_L2 8,12 MEM_MA_CAS_L
RN67B 3* 4 8p4r0402h5
9,12 MEM_MB_RAS_L 47
47
9,12 MEM_MB0_CLK_H1 9,12 MEM_MB0_CS_L1
RN65C 5* 647 8p4r0402h5
8,12 MEM_MA0_CS_L1
RN65D 7* 847 8p4r0402h5 C366
9,12 MEM_MB0_CS_L0
RN68C 5* 6 8p4r0402h5
7*
8,12 MEM_MA0_CS_L0
RN62D 8 8p4r0402h5
* 1.5pF
50V, NPO, +/-0.25pF
C C0603 C
9,12 MEM_MB0_CLK_L1
VCC_DDR
**************** *** ***

VCC_DDR MEM_MB_ADD15 C515 22pF C0603
9,12 MEM_MB0_CLK_H0
**************** *** ***
MEM_MA_ADD15 C487 22pF C0603 C454 MEM_MB_ADD14 C502 22pF C0603

MEM_MA_ADD14
MEM_MA_ADD13
C472
C475
22pF
22pF
C0603
C0603 * 1.5pF
50V, NPO, +/-0.25pF
MEM_MB_ADD13
MEM_MB_ADD12
C490
C514
22pF
22pF
C0603
C0603
MEM_MA_ADD12 C486 22pF C0603 C0603 MEM_MB_ADD11 C500 22pF C0603
MEM_MA_ADD11 C470 22pF C0603 MEM_MB_ADD10 C494 22pF C0603
MEM_MA_ADD10 C518 22pF C0603 9,12 MEM_MB0_CLK_L0 MEM_MB_ADD9 C513 22pF C0603
MEM_MA_ADD0 C480 22pF C0603
MEM_MB_CAS_L C477 22pF C0603
MEM_MA_CAS_L C476 22pF C0603 MEM_MB_WE_L C492 22pF C0603
MEM_MA_WE_L C491 22pF C0603 MEM_MB_RAS_L C520 22pF C0603
MEM_MA_RAS_L C517 22pF C0603
MEM_MB_BANK2 C501 22pF C0603
MEM_MA_BANK2 C471 22pF C0603 MEM_MB_BANK1 C521 22pF C0603
MEM_MA_BANK1 C479 22pF C0603 MEM_MB_BANK0 C493 22pF C0603
MEM_MA_BANK0 C478 22pF C0603
B B
Layout: Spread out on VTT pour

VTT_DDR
*C567 *C575 *C565 *C577 *C586 *C583 *C581 *C579 *C587 *C605 *C584 *C585 *C588 *C551 *C578 *C582
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
C0603 C0603 C0603 C0603 C0603 C0603 C0603 C0603 C0603 C0603 C0603 C0603 C0603 C0603 C0603 C0603
50V, Y5V, +80%/-20%
50V, Y5V, +80%/-20%
50V, Y5V, +80%/-20%
50V, Y5V, +80%/-20%
50V, Y5V, +80%/-20%
50V, Y5V, +80%/-20%
50V, Y5V, +80%/-20%
50V, Y5V, +80%/-20%
50V, Y5V, +80%/-20%
50V, Y5V, +80%/-20%
50V, Y5V, +80%/-20%
50V, Y5V, +80%/-20%
50V, Y5V, +80%/-20%
50V, Y5V, +80%/-20%
50V, Y5V, +80%/-20%
50V, Y5V, +80%/-20%
GND
VTT_DDR VCC_DDR
A A
*C566 *C555 *C556 *C557 *C558 *C553 *C554 *C552 *C550 *C568 *C559 *C560 *C561 *C564 *C562 *C563
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
C0603 C0603 C0603 C0603 C0603 C0603 C0603 C0603 C0603 C0603 C0603 C0603 C0603 C0603 C0603 C0603
50V, Y5V, +80%/-20%
50V, Y5V, +80%/-20%
50V, Y5V, +80%/-20%
50V, Y5V, +80%/-20%
50V, Y5V, +80%/-20%
50V, Y5V, +80%/-20%
50V, Y5V, +80%/-20%
50V, Y5V, +80%/-20%
50V, Y5V, +80%/-20%
50V, Y5V, +80%/-20%
50V, Y5V, +80%/-20%
50V, Y5V, +80%/-20%
50V, Y5V, +80%/-20%
50V, Y5V, +80%/-20%
50V, Y5V, +80%/-20%
50V, Y5V, +80%/-20%
FOXCONN PCEG
Title
DDR II terminator
C K8M890M01 A

5 4 3 2 1
A B C D E
+1.2V_HT VDDNB
U21D
U21A D21 A29
VCC12HT VCC15
7 HT_RC_CPU_CAD_H0 V2 HTTCAD0+ HTRCAD0+ A21 HT_CPU_RC_CAD_H0 7 D22 VCC12HT VCC15 B29
7 HT_RC_CPU_CAD_L0 V3 HTTCAD0- HTRCAD0- A20 HT_CPU_RC_CAD_L0 7 D23 VCC12HT VCC15 C29
7 HT_RC_CPU_CAD_H1 U1 HTTCAD1+ HTRCAD1+ C19 HT_CPU_RC_CAD_H1 7 D24 VCC12HT VCC15 D29
7 HT_RC_CPU_CAD_L1 T1 HTTCAD1- HTRCAD1- B19 HT_CPU_RC_CAD_L1 7 E1 VCC12HT VCC15 E29
7 HT_RC_CPU_CAD_H2 T2 HTTCAD2+ HTRCAD2+ A19 HT_CPU_RC_CAD_H2 7 E2 VCC12HT VCC15 F26
7 HT_RC_CPU_CAD_L2 T3 HTTCAD2- HTRCAD2- A18 HT_CPU_RC_CAD_L2 7 E3 VCC12HT VCC15 F27
7 HT_RC_CPU_CAD_H3 R1 HTTCAD3+ HTRCAD3+ C17 HT_CPU_RC_CAD_H3 7 E4 VCC12HT VCC15 F28
7 HT_RC_CPU_CAD_L3 P1 HTTCAD3- HTRCAD3- B17 HT_CPU_RC_CAD_L3 7 E5 VCC12HT VCC15 F29
7 HT_RC_CPU_CAD_H4 N1 HTTCAD4+ HTRCAD4+ C15 HT_CPU_RC_CAD_H4 7 E6 VCC12HT VCC15 G29
7 HT_RC_CPU_CAD_L4 M1 HTTCAD4- HTRCAD4- B15 HT_CPU_RC_CAD_L4 7 E7 VCC12HT VCC15 H29
7 HT_RC_CPU_CAD_H5 M2 HTTCAD5+ HTRCAD5+ A15 HT_CPU_RC_CAD_H5 7 E8 VCC12HT VCC15 J29
7 HT_RC_CPU_CAD_L5 M3 HTTCAD5- HTRCAD5- A14 HT_CPU_RC_CAD_L5 7 E9 VCC12HT VCC15 K10
4 7 HT_RC_CPU_CAD_H6 L1 HTTCAD6+ HTRCAD6+ C13 HT_CPU_RC_CAD_H6 7 E10 VCC12HT VCC15 K11 4
K1 B13 E11 K12 +1.2V_HT VDDNB

7 HT_RC_CPU_CAD_L6 HTTCAD6- HTRCAD6- HT_CPU_RC_CAD_L6 7 VCC12HT VCC15 VCC3
K2 A13 E12 K13 +3.3VHT1
7 HT_RC_CPU_CAD_H7 HTTCAD7+ HTRCAD7+ HT_CPU_RC_CAD_H7 7 VCC12HT VCC15
K3 A12 E21 K14 C342 50V, X7R, +/-10% C686 25V, Y5V, +80%/-20%
7 HT_RC_CPU_CAD_L7 HT_CPU_RC_CAD_L7 7
******
****
HTTCAD7- HTRCAD7- VCC12HT VCC15 1nF C0603 0.1uF C0603 L36
*
FB L0603 80 Ohm
7 HT_RC_CPU_CAD_H8 V5 HTTCAD8+ HTRCAD8+ C20 HT_CPU_RC_CAD_H8 7 E22 VCC12HT VCC15 K15
U5 D20 E23 K16 C351 50V, X7R, +/-10% C717 C0603
7 HT_RC_CPU_CAD_L8 HTTCAD8- HTRCAD8- HT_CPU_RC_CAD_L8 7 VCC12HT VCC15
7
7
HT_RC_CPU_CAD_H9
HT_RC_CPU_CAD_L9
U4
U3
HTTCAD9+
HTTCAD9-
HTRCAD9+
HTRCAD9-
E20
E19
HT_CPU_RC_CAD_H9
HT_CPU_RC_CAD_L9
7
7
E24
F1
VCC12HT
VCC12HT
VCC15
VCC15
K17
K18
1nF
C320
C0603
C0603
10nF
C685
50V, X7R, +/-10%
C0603
C313
10uF * *C312
0.1uF*
C311
1nF
T5 C18 F2 K19 10nF 50V, X7R, +/-10% 0.1uF 25V, Y5V, +80%/-20% 10V, Y5V, +80%/-20% C0603 50V, X7R, +/-10%
R5 D18 F3 K20 C680 C0603 C690 C0603 C0805 C0603
R4 E18 F4 K21 10nF 50V, X7R, +/-10% 10nF 50V, X7R, +/-10% 25V, Y5V, +80%/-20%
R3 E17 F5 K22 C298 C0603
N4 E16 F6 K23 10nF 50V, X7R, +/-10%
7 HT_RC_CPU_CAD_H12 HTTCAD12+ HTRCAD12+ HT_CPU_RC_CAD_H12 7 VCC12HT VCC15 VCC3
N3 E15 F7 K24 C687 C0603 C732 C0603 +3.3VHT2
7 HT_RC_CPU_CAD_L12 HT_CPU_RC_CAD_L12 7
******************************
HTTCAD12- HTRCAD12- VCC12HT VCC15 +V_CPU 10nF 50V, X7R, +/-10% 10nF 50V, X7R, +/-10%
7 HT_RC_CPU_CAD_H13 M5 HTTCAD13+ HTRCAD13+ C14 HT_CPU_RC_CAD_H13 7 F8 VCC12HT VCC15 K25 *
L5 D14 F9 K29 C684 C429 25V, Y5V, +80%/-20% L34 FB L0603 80 Ohm
L4 E14 F10 L10 0.1uF C0603
7 HT_RC_CPU_CAD_L14 L3 E13 HT_CPU_RC_CAD_L14 7 F11 L25
* * C300 25V, Y5V, +80%/-20% C712 C0603 C260
* *C269
0.1uF*
C286
****
HTTCAD14- HTRCAD14- VCC12HT VCC15 C344 0.1uF C0603 10nF 50V, X7R, +/-10% 10uF 1nF
7 HT_RC_CPU_CAD_H15 K5 HTTCAD15+ HTRCAD15+ C12 HT_CPU_RC_CAD_H15 7 F12 VCC12HT VCC15 L29
J4 D12 F13 M10 0.1uF C336 25V, Y5V, +80%/-20% C425 25V, Y5V, +80%/-20% 10V, Y5V, +80%/-20% C0603 50V, X7R, +/-10%
F16 M25 0.1uF C0603 0.1uF C0603 0.1uF C0603 C0805 C0603
VCC12HT VCC15 C0603 C352 25V, Y5V, +80%/-20% C1217 C0603 25V, Y5V, +80%/-20%
7 HT_RC_CPU_CLK_H0 P2 HTTCLK0+ HTRCLK0+ A17 HT_CPU_RC_CLK_H0 7 F17 VCC12HT VCC15 N10
P3 A16 F18 N25 0.1uF C0603 10nF 50V, X7R, +/-10%
7 HT_RC_CPU_CLK_L0 HTTCLK0- HTRCLK0- HT_CPU_RC_CLK_L0 7 VCC12HT VCC15
P5 C16 F21 P10 25V, Y5V, +80%/-20% C343 25V, Y5V, +80%/-20% C720 25V, Y5V, +80%/-20%
7 HT_RC_CPU_CLK_H1 HTTCLK1+ HTRCLK1+ HT_CPU_RC_CLK_H1 7 VCC12HT VCC15
N5 D16 F22 P25 25V, Y5V, +80%/-20% 0.1uF C0603 0.1uF C0603
7 HT_RC_CPU_CLK_L1 HTTCLK1- HTRCLK1- HT_CPU_RC_CLK_L1 7 VCC12HT VCC15
F23 R10 C675 C0603
VCC12HT VCC15 10nF 50V, X7R, +/-10%
7 HT_RC_CPU_CTL_H0 J1 HTTCTL+ HTRCTL+ C11 HT_CPU_RC_CTL_H0 7 F24 VCC12HT VCC15 R25
H1 B11 F25 T10 C436 16V, Y5V, +80%/-20% C731 25V, Y5V, +80%/-20%
7 HT_RC_CPU_CTL_L0 HT_CPU_RC_CTL_L0 7
*******************
HTTCTL- HTRCTL- VCC12HT VCC15 0.22uF C0603 0.1uF C0603
G1 VCC12HT VCC15 T25
-HTSTOPSB V1 W1 -HTSTOPNB G2 U10 C700 16V, Y5V, +80%/-20% C719 16V, Y5V, +80%/-20% +1.2V_HT
19 SLP# HTSTOPI# HTSTOPO# VCC12HT VCC15
G3 U25 0.22uF C0603 1uF C0603 HTRCOMPN R290 R0603
VCC12HT VCC15
*
+1.2V_HT B9 HTRCOMPP G4 V10 C676 16V, Y5V, +80%/-20% C407 25V, Y5V, +80%/-20% 51 +/-5%
HTRCOMPP HTRCOMPN VCC12HT VCC15 0.22uF C0603 0.1uF C0603
A2 VCC12HT HTRCOMPN A9 G5 VCC12HT VCC15 V25
A3 G6 W10 C689 16V, Y5V, +80%/-20% C430 C0603 HTRTCOMP R289 +/-5%
VCC12HT HTRTCOMP VCC12HT VCC15 1uF C0603 10nF 50V, X7R, +/-10% 100 r0603h6
A4 VCC12HT HTRTCOMP A8 H4 VCC12HT VCC15 W25
A5 H5 Y10 C688 16V, Y5V, +80%/-20% C396 25V, Y5V, +80%/-20% HTRCOMPP R288 +/-5%
VCC12HT VCC12HT VCC15 1uF C0603 0.1uF C0603 51 R0603
A6 H6 Y25
*
VCC12HT VCC12HT VCC15 C693 16V, Y5V, +80%/-20% C382 16V, Y5V, +80%/-20%
A7 VCC12HT VCCA33HT1 A10 +3.3VHT1 J5 VCC12HT VCC15 AA10
3 A22 J6 AA25 1uF C0603 1uF C0603 3
A23 VCC12HT GNDAHT1 B10 K6 VCC12HT VCC15 AB10
A24 L6 AB25 4.7uF C0805 0.1uF C0603
VCC12HT VCC12HT VCC15 C701 25V, Y5V, +80%/-20% C424 C0603
B1 VCC12HT L11 VCC12HT VCC15 AC10
B2 H3 +3.3VHT2 L12 AC25 22nF C0603 10nF 50V, X7R, +/-10% +2.5V
VCC12HT VCCA33HT2 VCC12HT VCC15 C278 C0603 C449 25V, Y5V, +80%/-20%
B3 VCC12HT L13 VCC12HT VCC15 AD10
B4 J3 L14 AD25 10nF 50V, X7R, +/-10% 0.1uF C0603 -HTSTOPSB R248 680
VCC12HT GNDAHT2 VCC12HT VCC15
*
B5 L15 AE10 C299 C0603 C426 C0603 R0603 +/-5%
VCC12HT VCC12HT VCC15 10nF 50V, X7R, +/-10% 10nF 50V, X7R, +/-10%
B6 L16 AE11
D
B7 VCC12HT L17 VCC12HT VCC15 AE12
B8 L18 AE13 0.1uF C0603 0.1uF C0603 Q25
B21 VCC12HT L19 VCC12HT VCC15 AE14
B22 L20 AE15 0.1uF C0603 0.1uF C0603 -PWRON G
VCC12HT VCC12HT VCC15 22,30,31 PS_ON#
B23 AK13 M11 AE16 C389 25V, Y5V, +80%/-20% C448 25V, Y5V, +80%/-20% 2N7002
VCC12HT GND VCC12HT VCC15 0.1uF C0603 0.1uF C0603
B24 AK15 N11 AE17
S
VCC12HT GND VCC12HT VCC15 C710 25V, Y5V, +80%/-20% C391 25V, Y5V, +80%/-20%
C1 VCC12HT GND AK17 P6 VCC12HT VCC15 AE18
C2 AK19 P11 AE19 22nF C0603 0.1uF C0603
C3 VCC12HT GND AK21 R6 VCC12HT VCC15 AE20
C4 AK23 R11 AE21 22nF C0603 0.1uF C0603 DELETE R246
C5 VCC12HT GND AK25 T11 VCC12HT VCC15 AE22
C6 AK28 U11 AE23 22nF C0603 0.1uF C0603
C7 VCC12HT GND AK29 V6 VCC12HT VCC15 AE24
C8 AL10 V11 AE25 22nF C0603 0.1uF C0603
C9 VCC12HT GND AL12 W3 VCC12HT
C10 AL14 W4 AM30 22nF C0603 0.1uF C0603
VCC12HT GND VCC12HT GND C677 16V, Y5V, +80%/-20% C724 25V, Y5V, +80%/-20%
C21 VCC12HT GND AL16 W5 VCC12HT GND AM31
C22 AL18 W6 AN9 1uF C0603 0.1uF C0603
VCC12HT GND VCC12HT GND C385 25V, Y5V, +80%/-20%
C23 VCC12HT GND AL20 W11 VCC12HT GND AN31
C24 AL22 Y1 AN32 0.1uF C0603
D1 VCC12HT GND AL24 Y2 VCC12HT GND AP12
D2 AL26 Y3 AP14 0.1uF C0603
D3 VCC12HT GND AC21 Y4 VCC12HT GND AP16
D4 AC22 Y5 AP18 0.1uF C0603
D5 VCC12HT GND AC23 Y6 VCC12HT GND AP20
D6 AC34 Y11 AP22 0.1uF C0603 2
VCC12HT GND VCC12HT GND
D7 VCC12HT GND AD24 AA1 VCC12HT GND AP24
D8 VCC12HT GND AC17 AA2 VCC12HT GND AP26
D9 VCC12HT GND AC18 AA3 VCC12HT GND AP32
2
D10 VCC12HT GND AC19 AA4 VCC12HT GND AP33 2
D11 VCC12HT GND AC20 AA5 VCC12HT GND AD31

AA6 VCC12HT GND AE34
K8T890-CF_K8M890CE AF32
GND
K8T890-CF_K8M890CE
1
NB Heatsink
7 HT_RC_CPU_CAD_H[15..0] HT_RC_CPU_CAD_H[15..0] 7 HT_CPU_RC_CAD_H[15..0] HT_CPU_RC_CAD_H[15..0]
7 HT_RC_CPU_CAD_L[15..0] HT_RC_CPU_CAD_L[15..0] 7 HT_CPU_RC_CAD_L[15..0] HT_CPU_RC_CAD_L[15..0]
+2.5V
-HTSTOPNB R247 r0603h6

680 +/-5%
R260 +/-5%
0 r0603h6
*
-HTSTOPSB LDTSTOP_L
19 SLP# LDTSTOP_L 10
*
-HTSTOPNB
R259 +/-5%
X_0X_0
r0603h6
opt
1 1
VIA Confidential
<OrgAddr1> VIA TECHNOLOGIES INC.
Title
NORTH BRIDGE K8T890/K8M890 (HT)
C A
K8M890M01
A B C D E
A B C D E
20
20
20
20
PE0TX0+
PE0TX0-
PE0TX1+
PE0TX1-
AP11
AN11
AN12
AM12
AP13
U21B
PE0TX0+
PE0TX0-
PE0TX1+
PE0TX1-
PE0RX0+//PDVP0D11
PE0RX0-//PDVP0D10
PE0RX1+//PDVP0D9
PE0RX1-//PDVP0D8
AM11
AL11
AK12
AJ12
AM13
PE0RX0+ 20
PE0RX0- 20
PE0RX1+ 20
PE0RX1- 20
VCC3
AD12
AD13
AD14
AD15
U21E
VCC33
VCC33
VCC33
VCC33PE
VCC33PE
VCC33PE
W24
W29
W30
Y24
VCC3
Note:
K8M890 support 1 X1 Lane PCI Express
.
K8T890 support 4 X1 Lane PCI Express.
20 PE0TX2+ PE0TX2+ PE0RX2+//PDVP0D7 PE0RX2+ 20 VCC33 VCC33PE
20 PE0TX2- AN13 PE0TX2- PE0RX2-//PDVP0D6 AL13 PE0RX2- 20 AD16 VCC33 VCC33PE Y29
20 PE0TX3+ AN14 PE0TX3+ PE0RX3+//PDVP0CLK AK14 PE0RX3+ 20 AD17 VCC33 VCC33PE Y30
20 PE0TX3- AM14 PE0TX3- PE0RX3-//PTVCLKR AJ14 PE0RX3- 20 AD18 VCC33 VCC33PE Y31
20 PE0TX4+ AP15 PE0TX4+ PE0RX4+//PDVP0D5 AM15 PE0RX4+ 20 AD19 VCC33 VCC33PE AA24
20 PE0TX4- AN15 PE0TX4- PE0RX4-//PDVP0D4 AL15 PE0RX4- 20 AD20 VCC33 VCC33PE AA29
AN16 AK16 AD21 AA30 PE0REXT0 R275 10.7K
AM16 AJ16 AD22 AA31 r0603h6 +/-1%
20 PE0TX5- PE0TX5- PE0RX5-//PDVP0D2 PE0RX5- 20 VCC33 VCC33PE
AP17 AM17 AD23 AB24 PE0REXT1 R338 10.7K
AN17 AL17 AJ7 AB29 r0603h6 +/-1%
20 PE0TX6- PE0RX6- 20
**
4
PE0TX6- PE0RX6-//PDVP0D0 VCC33 VCC33PE PE0COMP0 R262 249
4
20 PE0TX7+ AN18 PE0TX7+ PE0RX7+//PDVP0DE AK18 PE0RX7+ 20 AJ8 VCC33 VCC33PE AB30
AM18 AJ18 AJ9 AB31 R0603 +/-1%
20 PE0TX7- PE0TX7- PE0RX7-//PDVP0HS PE0RX7- 20 VCC33 VCC33PE
AP19 AM19 AJ10 AC24 PE0COMP1 R343 249
AN19 AL19 AJ27 AC29 R0603 +/-1%
20 PE0TX9+ AN20 PE0TX9+ PE0RX9+//PDVP1D9 AK20 PE0RX9+ 20 AK6 VCC33 VCC33PE AD29 PCIEx16 compensations
20 PE0TX9- AM20 PE0TX9- PE0RX9-//PDVP1D8 AJ20 PE0RX9- 20 AK7 VCC33 VCC33PE AE29
20 PE0TX10+ AP21 PE0TX10+ PE0RX10+//PDVP1D7 AM21 PE0RX10+ 20 AK8 VCC33 VCC33PE AE30
20 PE0TX10- AN21 PE0TX10- PE0RX10-//PDVP1D6 AL21 PE0RX10- 20 AK9 VCC33 VCC33PE AF29
20 PE0TX11+ AN22 PE0TX11+ PE0RX11+//PDVP1CLK AK22 PE0RX11+ 20 AK10 VCC33 VCC33PE AF30
AM22 AJ22 AK27 AF31 R361 249
20 PE0TX11- PE0RX11- 20
*
PE0TX11- PE0RX11-//PDVP1D5 VCC33 VCC33PE PE1COMP0 r0603h6 +/-1%
20 PE0TX12+ AP23 PE0TX12+ PE0RX12+//PDVP1D4 AM23 PE0RX12+ 20 AL5 VCC33 VCC33PE AG29
AN23 AL23 AL6 AG30 PE1REXT0 R362 10.7K
AN24 AK24 AL7 AG31 R0603 +/-1%
20 PE0TX13- AM24 PE0TX13- PE0RX13-//PDVP1D1 AJ24 PE0RX13- 20 AL8 VCC33 VCC33PE AH29
20 PE0TX14+ AP25 PE0TX14+ PE0RX14+//PDVP1D0 AM25 PE0RX14+ 20 AL9 VCC33 VCC33PE AH30
20 PE0TX14- AN25 PE0TX14- PE0RX14-//PDVP1DE AL25 PE0RX14- 20 AL27 VCC33 VCC33PE AH31 PCIEx1 compensations
20 PE0TX15+ AN26 PE0TX15+ PE0RX15+//PDVP1HS AK26 PE0RX15+ 20 AL28 VCC33 VCC33PE AH32
20 PE0TX15- AM26 PE0TX15- PE0RX15-//PDVP1VS AJ26 PE0RX15- 20 AM5 VCC33 VCC33PE AH33
AM6 VCC33 VCC33PE AH34
AM7 VCC33 VCC33PE AJ29
W33 AJ15 PE0REXT0 AM8 AJ30
5 PECLK_NB+ PECLK+ PE0REXT0 VCC33 VCC33PE VCC3
W34 AJ21 PE0REXT1 AM27 AJ31
5 PECLK_NB- PECLK- PE0REXT1 VCC33 VCC33PE
AM28 VCC33 VCC33PE AJ32
AP9 AJ13 PE0COMP0 AM29 AJ33
17,21 PIRQ#H INTR# PE0COMP0 VCC33 VCC33PE
PEDET AP8 AJ19 PE0COMP1 AN4 AJ34
NC15PEDET PE0COMP1 VCC33 VCC33PE -AGP8XDET R250 4.7K
AM9 NC16/PDVPDET AN5 VCC33 VCC33PE AK30
*
AN6 AK31 R0603 +/-5%
VCC33 VCC33PE VCC3
18,20 -PEWAKE G34 PEWAKE# VCCA33PE W32 +3.3VPE AN7 VCC33 VCC33PE AK32
18 PEPMESCI F33 PEPMESCI# GNDAPE W31 AN27 VCC33 VCC33PE AK33
F34 AN28 AK34 PEDET R203 4.7K
18,19 PEHPSCI PEHPSCI# VCC33 VCC33PE
*
AN29 AL31 R0603 +/-5%
VCC33 VCC33PE
VCCA33PE00 AH15 +3.3VPE00 AN30 VCC33 VCC33PE AL32
AP10 NC17/(GPIO2/DICPCLKI) GNDAPE00 AH16 AP3 VCC33 VCC33PE AL33
AM10 NC19/(GPIO3/DISPCLKO) AP4 VCC33 VCC33PE AL34
AP5 VCC33 VCC33PE AM32
AN10 NC18/PDVP0VS VCCA33PE01 AH22 +3.3VPE01 AP6 VCC33 VCC33PE AM33
AN3 NC/SPD1 GNDAPE01 AJ23 AP7 VCC33 VCC33PE AM34
3 AP2 AP27 AN33 AGPVREF R305 100K 3
NC/SPCLK1 VCC33 VCC33PE
*
AP28 AN34 R0603 +/-5%
VCC33 VCC33PE
VSUS15PE0 AH14 VSUSNB AP29 VCC33 VCC33PE AP34
-AGP8XDET AN8 AH21 AP30
BISTEN#/NC VSUS15PE1 VCC33
AH23 NC VSUS15PE2 AD30 AP31 VCC33
AGPVREF AJ17 NC K8T890-CF_K8M890CE
V1.0 CHANGE SCH. AF33 AG32 V1.0 CHANGE SCH.

C1265 PE1TX0+/NC PE1RX0+/NC
AF34 PE1TX0-/NC PE1RX0-/NC AG33
0.1uF AD33 AE32
20 PE1TX0+ PE1TX1+ PE1RX1+ PE1RX0+ 20
20 PE1TX0- AD34 PE1TX1- PE1RX1- AE33 PE1RX0- 20
C1264 0.1uF AB33 AC32
PE1TX2+/NC PE1RX2+/NC
AB34 PE1TX2-/NC PE1RX2-/NC AC33
20 PE1TX3+ Y33 PE1TX3+/NC PE1RX3+/NC AA32 PE1RX3+ 20
0.1uF C1280 Y34 AA33
20 PE1TX3- PE1TX3-/NC PE1RX3-/NC PE1RX3- 20
0.1uF C1316
PE1REXT0 AD32 AC31 +3.3VPE1

PE1COMP0 PE1REXT0 VCCA33PE1
AE31 PE1COMP0 GNDAPE1 AC30
K8T890-CF_K8M890CE VCC3 VCC3
C707 0.1uF C254 10nF
*********
******
C0603 25V, Y5V, +80%/-20% C0603 50V, X7R, +/-10%
C364 0.1uF C297 10nF
C0603 25V, Y5V, +80%/-20% C0603 50V, X7R, +/-10%
C420 0.1uF C694 0.1uF
C0603 25V, Y5V, +80%/-20% C0603 25V, Y5V, +80%/-20%
C421 0.1uF C681 0.1uF
C0603 25V, Y5V, +80%/-20% C0603 25V, Y5V, +80%/-20%
C398 0.1uF C679 0.1uF
C0603 25V, Y5V, +80%/-20% C0603 25V, Y5V, +80%/-20%
C365 0.1uF C678 1uF
C0603 25V, Y5V, +80%/-20% C0603 16V, Y5V, +80%/-20%
C397 0.1uF
VCC3 +3.3VPE1 VCC3 +3.3VPE01 VSUSNB C0603 25V, Y5V, +80%/-20%
C718 C368 0.1uF C721 1uF
*
* *
2 L41 FB L0603 80 Ohm L40 FB L0603 80 Ohm
* 1uF C0603 25V, Y5V, +80%/-20% C0603 16V, Y5V, +80%/-20% 2
10V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C411 C412 C401 C379 C711 C378 16V, Y5V, +80%/-20% C737 0.1uF
* 10uF 0.1uF
C0603 * 1nF
50V, X7R, +/-10% * 10uF 0.1uF
* * 1nF
50V, X7R, +/-10%
C0603 C0603 25V, Y5V, +80%/-20%
C0805 C0603 C0805 C0603 C0603
VCC3 +3.3VPE VCC3 +3.3VPE00
L42
*
FB L0603 80 Ohm L35
*
FB L0603 80 Ohm
10V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C419 C402 C403 C289 C290 C691

* 10uF 0.1uF
C0603 * 1nF
50V, X7R, +/-10% *10uF 0.1uF
* * 1nF
50V, X7R, +/-10%
C0805 C0603 C0805 C0603 C0603
1 1

Title
NORTH BRIDGE K8T890/K8M890 (PCI-E&PWR/GND)
C A
K8M890M01
A B C D E
A B C D E
VLAD[15:0]
19 VLAD[15:0] VCC3
U21F +3.3VHCK
U21C A11 U12
VLAD0 GND GND L37
*
FB L0603 80 Ohm
P34 VD0 HCLK+ B25 HCLK+ 5 B12 GND GND U13
10V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%

VLAD1 R34 A25 B14 U14
VD1 HCLK- HCLK- 5 GND GND
VLAD2
VLAD3
M33
L32
VD2
VD3 VCCA33HCK D25 +3.3VHCK
B16
B18
GND
GND
GND
GND
U15
U16
* C350
10uF * C360
0.1uF * C355
1nF
VLAD4 T32 E25 B20 U17 C0805 C0603 C0603
VLAD5 VD4 GNDAHCK GND GND 50V, X7R, +/-10%
R32 VD5 NC AC5 B27 GND GND U18
VLAD6 K33 AC6 C25 U19
VLAD7 VD6 NC GND GND
L34 VD7 D13 GND GND U20
VLAD8 T33 C28 D15 U21 VCC3 +3.3VVCK
VD8 VCLK VCLK_NB 5 GND GND
VLAD9 U32 D17 U22
VLAD10 VD9 GND GND L39
*
FB L0603 80 Ohm
K32 VD10 VCCA33GCK D28 +3.3VVCK D19 GND GND U23
10V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%

VLAD11 J32 E28 E27 U33
VLAD12 VD11 GNDAGCK GND GND
VLAD13
U34
V33
VD12
VD13
NC
NC
AJ11
AK11
VSUSNB E33
ALL_PWRGD 5,10,19,22,30F14
GND
GND
GND
GND
V4
V12
* C725
10uF * C375
0.1uF * C722
1nF
VLAD14 J34 R0805 F15 V13 C0805 C0603 C0603
4
VLAD15 VD14 R0805 GND GND 50V, X7R, +/-10%
4
J33 H34 PWROK_NB# 18 F19 V14
**
VD15 VSUS15 R358 X_0 GND GND
F20 GND GND V15
M32 G32 R374 0 H2 V16
19 UPSTB UPSTB+ PWROK GND GND
19 UPSTB# N32 UPSTB- RESET# H32 -RESET_NB 23 H33 GND GND V17
SUSST# G33 SUSST# 18 J2 GND GND V18
19 DNSTB N34 DNSTB+ AGPBUSY#/BUSY# E34 AGPBZ# 19 K4 GND GND V19
N33 E32 -TESTIN L2 V20
19 DNSTB# DNSTB- TESTIN# GND GND
F32 -DFTIN L33 V21
DFTIN# TCLK GND GND
19 UPCMD K34
M34
UPCMD TCLK D34 M4
M6
GND GND V22
V23
DELETE R331,R333,R332,R337,R336,R335,R334
19 DNCMD DNCMD GND GND
TCLK600 B28 TCLK600 M12 GND GND V32 Add RN117
R33 A28 DEBUG M13 W2
19 VBE0 VBE# DEBUG GND GND
T34 A26 RESERVED0 M14 W12
19 VPAR VPAR RSVD0 GND GND
B26 RESERVED1 M15 W13
LCOMPP RSVD1 RESERVED2 GND GND
V34 C26 M16 W14
** *
VLCOMPP RSVD2 RESERVED3 GND GND TCLK R367 4.7K
RSVD3 D26 M17 GND GND W15
LVREF_NB P32 E26 RESERVED4 M18 W16 R0603 +/-5%
VLVREF RSVD4 RESERVED5 GND GND TCLK600 R346 1K +/-5%
RSVD5 A27 M19 GND GND W17
C27 RESERVED6 M20 W18 DEBUG R349 1K R0603
RSVD6 RESERVED7 GND GND R0603 +/-5%
RSVD7 D27 M21 GND GND W19
AF2
M22
M23
GND GND W20
W21
RESERVED4
RESERVED6
*1 2 1K
NC/AR GND GND RESERVED5 3 4 RN31
NC/AG AF1 N2 GND GND W22 5 6 +/-5%
VDDNB AE1 N6 W23 RESERVED7
NC/AB GND GND 7 8
NC4/HSYNC AG1 N12 GND GND Y12
A30 AG2 N13 Y13 8P4R0603
VCC15VL NC/VSYNC GND GND
A31 VCC15VL NC5/SPCLK2 AH1 N14 GND GND Y14
A32 VCC15VL NC6/SPD2 AH2 N15 GND GND Y15
A33 N16 Y16 +/-5%
VCC15VL GND GND
A34
B30
VCC15VL NC7/XIN AJ1 N17
N18
GND GND Y17
Y18
RESERVED0
RESERVED1
*1 2 1K
VCC15VL GND GND RESERVED2 3 4
B31 VCC15VL NC3/RSET AF3 N19 GND GND Y19 5 6
B32 AG3 R263 N20 Y20 RESERVED3 RN117
*
VCC15VL NC/BISTIN 0 GND GND 7 8
B33 VCC15VL NC8/INTA# AJ2 PIRQ#A 17,21 N21 GND GND Y21
B34 AJ3 N22 Y22 8P4R0603
VCC15VL NC9/GPO0 GND GND
C30 VCC15VL NC/GPOUT AH3 N23 GND GND Y23
C31 VCC15VL P4 GND GND Y32
3 C32 VCC15VL NC/CONFIG1 AM3 P12 GND GND AA12 RSVD0 VLINK Bus 3
C33 VCC15VL NC/CONFIG2 AM4 P13 GND GND AA13 0=enable(default)

C34 VCC15VL NC/CONFIG3 AN2 P14 GND GND AA15 1=disable
D30 VCC15VL NC/ENVDD AP1 P15 GND GND AA14
D31 VCC15VL NC/ENBLT AN1 P16 GND GND AA16
D32 VCC15VL P17 GND GND AA17 RSVD1 EPLL test mode
D33 VCC15VL NC0/VCCA33PLL1 AC1 P18 GND GND AA18 0=disable(default)
E30 VCC15VL NC1/GNDAPLL1 AC2 P19 GND GND AA19 1=enable
E31 VCC15VL NC2/VCCA33PLL2 AC3 P20 GND GND AA20
F30 VCC15VL NC/GNDAPLL2 AC4 P21 GND GND AA21
F31 VCC15VL NC/VCCA33PLL3 AD1 P22 GND GND AA22 RSVD2 PE0 configuration
G30 VCC15VL NC/GNDAPLL3 AD2 P23 GND GND AA23 0= x16(default)
G31 VCC15VL NC/VCCA33DAC1 AE2 P33 GND GND AA34 1= x8 + x8
H30 VCC15VL NC/GNDADAC1 AE3 R2 GND GND AB1
H31 VCC15VL NC/VCCA33DAC2 AD3 R12 GND GND AB2
J30 VCC15VL NC/GNDADAC2 AD4 R13 GND GND AB3
J31 VCC15VL NC/GNDADAC3 AE4 R14 GND GND AB4 RSVD3 VLINK 4X reference voltage
K30 VCC15VL R15 GND GND AB5 initial value
K31 VCC15VL R16 GND GND AB6 0= 0.75V
L21 VCC15VL NC/(TVD0/DVP0D0) AH4 R17 GND GND AB12 1= 0.9V
L22 VCC15VL NC/(TVD1/DVP0D1) AJ4 R18 GND GND AB13
L23 VCC15VL NC12/(TVD2/DVP0D2) AK3 R19 GND GND AB14
L31 VCC15VL NC/(TVD5/DVP0D5) AK4 R22 GND GND AB17
M24 VCC15VL NC13/(TVD6/DVP0D6) AL1 R23 GND GND AB18
M29 AL2 T4 AB19 VDDNB
VCC15VL NC14/(TVD7/DVP0D7) GND GND
M30 VCC15VL NC/(TVD8/DVP0D8) AH5 T6 GND GND AB20
M31 AH6 T12 AB21 VDDNB
VCC15VL NC/(TVD9/DVP0D9) GND GND
N24 VCC15VL NC/(TVD10/DVP0D10) AJ5 T13 GND GND AB22
N29 VCC15VL NC/(TVD11/DVP0D11) AJ6 T14 GND GND AB23 * R380 -TESTIN R366 4.7K
**
N30
N31
VCC15VL
VCC15VL NC/(TVVS/DVP0VS) AM1
T15
T16
GND
GND
GND
GND
AB32
AC12
1.4K
+/-1% * C423
0.1uF
R0603
-DFTIN R365
+/-5%
4.7K
P24 AL3 T17 AC13 r0603h6 25V, Y5V, +80%/-20% R0603 +/-5%
VCC15VL NC/(TVHS/DVP0HS) GND GND LVREF_NB C0603
P29 AM2 T18 AC14
*
VCC15VL NC/(TVCLK/DVP0CLK) GND GND LCOMPP R364 360
P30 T19 AC15
P31
VCC15VL
VCC15VL NC/(TVDE/DVP0DE) AL4 T20
GND
GND
GND
GND AC16 * R363 * C404 R0603 +/-1%
R24 AK5 T21 AG34 1K 0.1uF
VCC15VL NC/(TVCLKR/DVP0DET) GND GND 25V, Y5V, +80%/-20%
2
R29 VCC15VL T22 GND GND AJ25 +/-1%
2
R30 AA11 T23 AJ28 C0603

VCC15VL NC/VCC33GFX GND GND R0603
R31 VCC15VL NC/VCC33GFX AB11 U2 GND GND AL29
T24 VCC15VL NC/VCC33GFX AC11 U6 GND GND AL30
T29 VCC15VL NC/VCC33GFX AD5
T30 AD6 K8T890-CF_K8M890CE LVREF_NB = 0.625V
VCC15VL NC/VCC33GFX
T31 VCC15VL NC/VCC33GFX AD11
U24 VCC15VL NC/VCC33GFX AE5
U29 VCC15VL NC/VCC33GFX AE6
U30 VCC15VL NC/VCC33GFX AF4
U31 VCC15VL NC/VCC33GFX AF5
V24 VCC15VL NC/VCC33GFX AF6
V29 VCC15VL NC/VCC33GFX AG4
K8T890-CF_K8M890CE
1 1

Title
NORTH BRIDGE K8T890 (VLINK&GFX)
C A
K8M890M01
A B C D E
A B C D E
VCC3
VCC3
VCC3_SB
W10
W11
W17
W18
W19
W21
H10
H11
H12
R19
U19
V19
V21
Y21
T19
W9
W8
M8
H9
N8
R8
U8
VCC3_SB
K8
P8
V8
T8
L8
J8
21,26 AD[31..0]
U28A
AD0 C745 C751 C741 C740 C742
G2
* * * * *
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
VCC33
AD1 AD0 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
J4 AD1 USBVDD A22
AD2 J3 B22 C0603 C0603 C0603 C0603 C0603
4
AD3 AD2 USBVDD 4
H3 AD3 USBVDD C22
AD4 F1 D22
AD5
AD6
G1
H4
AD4
AD5
AD6
USBVDD
USBVDD
USBVDD
E22
F22
Dummy for VT8237A
AD7
AD8
F2
E1
AD7 USBVDD J13
J14
VT8237A has internal
AD8 USBVDD
AD9
AD10
G3 AD9 USBVDD J15 pull down resistors
E3 AD10 USBVDD J16
AD11 D1 J17 +2.5V_SB
AD12 AD11 USBVDD
G4 AD12 USBVDD J18
AD13 C750
AD14
D2
D3
AD13
AD14
* 0.1uF USB1-
RN34
2 1
15K
* +/-5%
AD15 F3 C0603 USB1+
AD16 AD15 USB0- 4 3
K3 AD16 6 5
AD17 L3 C24 CP8 X_CP +2.5V USB0+
AD18 AD17 USBSUS25 near SB 8 7
K2 AD18
AD19 K1 8P4R0603
AD20 AD19 USBVCCA L45
* X_FB L0603 120 Ohm RN38 15K
M4 AD20 PLLVDDA1 A23
AD21
AD22
L2
N4
AD21 PLLVDDA2 B23
* C450
10uF CP9 X_CP * C746
0.1uF
USB3-
USB3+ 2 * +/-5%
1
AD23 AD22 6.3V, Y5V, +80%/-20% C0603 USB2- 4 3
L1 AD23 PLLGNDA1 D23 * 6 5
AD24 M2 C23 USBGNDA C0805 L44 X_FB L0603 120 Ohm USB2+
AD25 AD24 PLLGNDA2 8 7
M1 AD25
AD26 P4 E20 USB0+ 8P4R0603
AD27 AD26 USBP0+ USB0- USB0+ 29 RN35 15K
N3 AD27 USBP0- D20 USB0- 29
AD28
AD29
N2
N1
AD28 USBP1+ A20
B20
USB1+
USB1- USB1+ 29
USB5-
USB5+ 2 * +/-5%
1
AD30 AD29 USBP1- USB2+ USB1- 29 USB4+ 4 3
P1 AD30 USBP2+ E18 USB2+ 29 6 5
AD31 P2 D18 USB2- USB4-
21,26 C_BE#[3..0] AD31 USBP2- USB2- 29 8 7
A18 USB3+
C_BE#0 USBP3+ USB3- USB3+ 29 8P4R0603
E2 CBE0 USBP3- B18 USB3- 29
C_BE#1 C1 D16 USB4+ RN36 15K
CBE1 USBP4+ USB4+ 29
C_BE#2
C_BE#3
L4
M3
CBE2 USBP4- E16
A16
USB4-
USB5+ USB4- 29
USB7-
USB7+ 2 * +/-5%
1
CBE3 USBP5+ USB5- USB5+ 29 USB6+ 4 3
USBP5- B16 USB5- 29 6 5
FRAME# J1 D14 USB6+ USB6-
21,26 FRAME# FRAME USBP6+_NC USB6+ 29 8 7
DEVSEL# H2 E14 USB6-
21,26 DEVSEL# DEVSEL USBP6-_NC USB6- 29
3 IRDY# J2 A14 USB7+ 8P4R0603 3
21,26 IRDY# IRDY USBP7+_NC USB7+ 29
TRDY# H1 B14 USB7-
21,26 TRDY# TRDY USBP7-_NC USB7- 29
STOP# K4
21,26 STOP# STOP
SERR# C2
21,26 SERR# PAR SERR
21,26 PAR F4 PAR USBOC0 C26 OC#0_3 29
PERR# C3 D24
21,26 PERR# PERR USBOC1
PCIRST# R1 B26
10,22,23 PCIRST# PCIRST USBOC2
USBOC3 C25
PIRQ#A A4 B24
16,21 PIRQ#A INTA USBOC4 OC#4_7 29
PIRQ#B B4 A24 near
21 PIRQ#B INTB USBOC5
PIRQ#C B5 A26
21 PIRQ#C
PIRQ#D C4
INTC USBOC6_NC
A25 CHANGE TO 6.04K chipset
21,26 PIRQ#D INTD USBOC7_NC
PIRQ#E D4
21 PIRQ#E INTE/GPIO12 USBCLK 5
PIRQ#F E4 E23 USBCLK
21 PIRQ#F INTF/GPIO13 USBCLK
PIRQ#G A3
21 PIRQ#G
**
PIRQ#H INTG/GPIO14 USBREXT R397 5.62K +/-1% R0603
15,21 PIRQ#H B3 INTH/GPIO15 USB REXT B25
PREQ#0 A5 D26 R402 UDPWR 10K +/-5% R0603 GPI9 20

21 PREQ#0
*
PREQ#1 REQ0 UDPWR/GPI9_NC R399 10K +/-5% R0603
21 PREQ#1 B6 REQ1 UDPWREN/GPO9_NC D25
PREQ#2 C5
21 PREQ#2 REQ2
PREQ#3 D5
21 PREQ#3 REQ3
PREQ#4 P3 W3
21,26 PREQ#4 REQ4 KBCK/KA20G KBCLK# 19
PREQ#5 R3 V1
21 PREQ#5 REQ5/GPI7 KBDT/KBRC KBDAT# 19
MSCK/IRQ1 W1 MSCLK# 19
PGNT#0 A6 W2
21 PGNT#0 GNT0 MSDT/IRQ12 MSDAT# 19
PGNT#1 D6
21 PGNT#1 GNT1
PGNT#2 C6
21 PGNT#2 GNT2
PGNT#3 E5
21 PGNT#3 GNT3
PGNT#4 R4
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
USBGND
21,26 PGNT#4 GNT4
PGNT#5 R2
21 PGNT#5 GNT5/GPO7
GND
GND
GND
GND
GND
GND
GND
GND
GND
VT8237RPLUS
A1
A2
B1
B2
E8
F25
H23
J21
J25
A13
A15
A17
A19
A21
B13
B15
B17
B19
B21
C13
C14
C15
C16
C17
C18
C19
C20
C21
D13
D15
D17
D19
D21
E13
E15
E17
E19
E21
H13
H14
H15
H16
H17
H18
2 2
1 1
FOXCONN PCEG
Title
VT8237 part1
C K8M890M01 A

A B C D E
A B C D E
* C526
* C747
+2.5V
*C748 C749 C744

0.1uF 0.1uF 0.1uF* 0.1uF * 0.1uF
C0603 C0603 C0603 C0603 C0603
change from 0 ohm to 2.7k ohm
VCC3
+2.5V VCC3_SB +2.5V_SB R441
* R438
X_2.2K
SW2 bit1 *R0603 0
PDCS3# VKCOMP for Vlink at 4X mode +/-5%
V1.0 CHANGE TO dummy
M18
AA4
AB4
AB5
AB6
N18
R18
U18
P18
V10
V11
V12
V13
V14
V15
V16
V17
V18
*
T18
L18
J10
J11
J12
4 4
M9
N9
R9
U9
U4
U28B 0 0.75V PDA0 R439 X_0
K9
P9
V9
T9
T4
L9
J9
27 PDD[0..15] 1 0.9V RN43 2.7K
*
PDD0 AA22 PDA2 R440 0
*1
VSUS33-1
VSUS33-2
VSUS33-3
VSUS33-4
VSUS25-1
VSUS25-2
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
PDD1 PDD0 2
Y24 PDD1 R17 3 4 VCC3
PDD2 AA26 PDA1
*
PDD3 PDD2 PDCS3# 5 6
AA25 PDD3 7 8
PDD4 AB26 T1 AC_BITCLK SW3 bit2
PDD5 AC26
PDD4
PDD5
ACBITCLK
ACSDIN0 U3 AC_SDIN0
AC_BITCLK
AC_SDIN0
28
28 GPIOD GTL pullup *0 8P4R0603
PDD6 AC23 V2 AC_SDIN1 0 Enable R975 0
PDD7 PDD6 ACSDIN1 AC_SDIN2 1 Disable
AD25 PDD7 ACSDIN2/GPIO20/PCS0 U1
PDD8 AD26 V3 AC_SDIN3
***
PDD9 PDD8 ACSDIN3/SLP_BTN/GPIO21/PCS1 ACSYNC R415 R0603 33+/-5% AC_SYNC SW3 bit3
AC24 PDD9 ACSYNC[ ] T2 AC_SYNC 28
PDD10 AC25 U2 ACSDO R421 R0603 22+/-5% AC_SDOUT GPIOB IOQ Depth GPIOA GPIOC
PDD10 ACSDO[SOE] AC_SDOUT 28
PDD11 AB24 T3 ACRST R416 R0603 22+/-5% AC_RST# 0 8 Level 0 0 100MHz
PDD11 ACRST AC_RST# 28
PDD12 AB23 1 1 Level
1 0 133MHz
*
PDD13 PDD12 R383 X_0 -PEWAKE
AA24 PDD13 WAKE Y5
PDD14 Y26 W4 PCI_PME# R383 for VT8237A 0 1 200MHz
PDD15 PDD14 PME BATLOW# PCI_PME# 21,23,26
AA23 PDD15 BATLOW/GPI5 V4 1 1 Auto Mode
Y1 -PEPMESCI SEEDI R398 4.7K VCC3 PD_A0 Vlink auto compensation
CPUMISS/GPI17 PEPMESCI 15 19 SEEDI
**
Y23 Y2 RING# R0603 +/-5%
27 PDREQ
V24
PDDREQ RING/GPI3
Y3 SUSST# R396 X_4.7K check VIA Pull-down is Auto mode
27 PDACK# PDDACK[ ] SUSST1/GPO3 SUSST# 16 Pull-high is Manual mode
W26 Y4 THERM# R0603 +/-5%
27 PDIOR# PDIOR AOLGPI/GPI18/THRM THERM# 23 0/1:Disable/Enable LAN shadow EEPROM
Y25 AA1 SD_DET
27 PDIOW# PDIOW EXTSMI/GPI2 SD_DET 27
Y22 AB1 SMBALT#
*
27 PDRDY PDRDY SMBALRT PD_DET
27 PDCS1# V22 PDCS1[ ] LID/GPI4 AC1 R446 R0603 22+/-5%
PD_DET 27
V23 AD2 PWRBTN# ACSYNC R419 4.7K
27 PDCS3# PDCS3[SDCS3] PWRBTN PWRBTN# 22 VCC3
**
W23 AF1 PWROK_NB# R0603 +/-5%
27 PDA0 PDA0[SDA0] PWROK PWROK_NB# 16
V25 AB7 CLKRUN# R420 X_4.7K
27 PDA1 PDA1[SDA1] CLKRUN CPUSTP# R0603 +/-5%
27 PDA2 W24 PDA2[SDA2] CPUSTP/GPO5 AC7
AD24 AD6 PCISTP# 0/1:Enable/disable LPC FWH command RN55 4.7K
27 SDD[0..15] 27 IRQ14R IRQ14 PCISTP/GPO6
SDD0 AC20 AE1 INTRUDER ACSDO R422 4.7K
GPIOD
GPIOC
*1 2 +/-5%
SDD0/TBC1_SDD0 INTRUDER/GPI16 VCC3 3 4
**
SDD1 AB20 R0603 +/-5% GPIOA
SDD2 SDD1/VALID_SDD1 SUS_CLK R429 X_4.7K GPIOB 5 6
AC21 SDD2 SUSCLK/GPO4 AB3 7 8
SDD3 AE18 R0603 +/-5%
SDD4 SDD3/RXD2_SDD3 SMBCLK 8P4R0603
AF18 SDD4/RXD3_SDD4 SMBCK1 AC4 SMBCLK 5,12,20,26,30
SDD5 AD18 AB2 SMBDATA 0/1:Enable/disable auto reboot
SDD5/RXD4_SDD5 SMBDT1 SMBDATA 5,12,20,26,30
3 SDD6 AD19 3
SDD7 SDD6/RBC0_SDD6 SMBCK2
AF19 SDD7/RBC1_SDD7 SMBCK2/GPIO27 AC3
SDD8 AE20 AD1 SMBDT2 SPKR R466 4.7K
SDD8/RXD5_SDD8 SMBDT2/GPIO26 22 SPKR VCC3
**
SDD9 AF20 R0603 +/-5% PDCS1# R444 2.2K
SDD9/RXD6_SDD9 VCC3
**
SDD10 AD20 AA2 SUSA# R467 X_1K R0603 +/-5%
SDD11 SDD10/RXD7_SDD10 SUSA/GPO2_GPO1 SLP_S3# R0603 +/-5% R443 X_2.2K
AE21 SDD11/RXD8_SDD11 SUSB/NC_GPO2 AD3 SLP_S3# 22 R386 for VT8237R
SDD12 AF21 AF2 SLP_S5# SLP_S5# 30
0/1:Enable/disable CPU FREQ strapping R0603 +/-5%
SDD13 SDD12/RXD9_SDD12 SUSC
AD21
**
SDD14 SDD13/TXD0_SDD13 GPI0 R386 0
AD22 SDD14/TXD1_SDD14 GPI0 AE2 -PEWAKE 15,20
SDD15 AF22 AC2 -PEWAKE_AC2 R387 X_0 0/1:Enable/disable SATA Master/Slave mode
SDD15/TXD2_SDD15 GPI1 CPU_THERMTRIP*_SB 22,23
AA3 GPO0
GPO0 GPO0 22
AD17 AE3 GPO1 PDACK# R436 2.2K VCC3_SB
27 SDREQ SDDRQ/RXD1_SDDRQ GPO1_NC VCC3
*
AD23 AE5 GPIOA R387 for VT8237A R0603 +/-5%
27 SDACK# SDDACK/TBC0_SDDACK GPIOA/GPIO24[SA17]_GPO17[SA17] GPIOB Disable External SATA PHY VCC3
27 SDIOR# AF23 SDIOR/TXD4_SDIOR GPIOB/GPIO25[SA18]_GPO18[SA18] AD5
AE23 AF5 GPIOC RN44 4.7K
27 SDIOW# SDIOW/TXD3_SDIOW GPIOC/GPIO30[SA16]_GPO16[SA16]
27 SDRDY AF17
AF25
SDRDY/RXD0_SDRDY GPIOD/GPIO31[SA19]_GPO19[SA19] AC6 GPIOD
CLKRUN#
RN77
*1
4.7K SUS_CLK
SUSA#
*1 2 +/-5%
27 SDCS1# SDCS1/TXD8_SDCS1[ ] SERIRQ 2 +/-5% PEPMESCI 3 4
27 SDCS3# AF26 SDCS3/TXD9_SDCS3[ ] SERIRQ AD9 SERIRQ 23 3 4 5 6
AF24 AF8 SPKR CPUSTP# THERM#
27 SDA0 SDA0/TXD6_SDA0[ ] SPKR[ ] PCISTP# 5 6 7 8
27 SDA1 AC22 SDA1/TXD5_SDA1[ ] OSC AB8 7 8
TP12 AE24 SB_OSC 5 VCC3_SB 8P4R0603
27 SDA2 SDA2/TXD7_SDA2[ ] TPO 8P4R0603 RN45 4.7K
27 IRQ15R AE26 IRQ15 TPO AF9
X_0.1uF
TEST AE9 TEST RN47
*1
4.7K RING#
*1 2
*
C549 SIDEVREF AC19 SMBCK2 SUSST# +/-5%

+/-1% SVREF_NC VDDA0 SMBCLK 2 +/-5% BATLOW# 3 4
AC10
*
R487 x_360 SIDECOMP VDDA0_NC SMBDT2 3 4 PCI_PME# 5 6

AB21 SCOMPP_NC 5 6 7 8
AB10 GNDA0 SMBDATA
STXP_1 C640 C0603 10nF STXP1 GNDA0_NC 7 8 8P4R0603
AB13
* * * *
STXN_1 C638 C0603 10nF STXN1 STXP1_NC SREXT 8P4R0603 RN48 4.7K
AC13 AD11
* * * *
STXN1_NC SREXT_NC
SRXN_1 C627 C0603 1.2nF SRXN1 AF13 AE10 SATA_CLKO TPO R468 X_4.7K
PD_DET
SD_DET
*1 2 +/-5%
SRXN1_NC SXO_NC[SOE] VCC3 3 4
**
SRXP_1 C624 C0603 1.2nF SRXP1 AE13 R0603 +/-5% SMBALT# swap RN36 pin1 & pin3
SRXP1_NC SATA_CLKI SERIRQ R465 4.7K GPO0 5 6 12/06/05
SXI_NC[ROMCS] AF10 7 8
STXP_2 C641 C0603 10nF STXP2 AB15 R0603 +/-5%
STXN_2 C639 C0603 10nF STXN2 STXP2_NC VDDA33 RN42 4.7K 8P4R0603
AC15 STXN2_NC VDDA33_NC AE11
TEST
*1 2
GPO1 R451 4.7K
*
SRXN_2 C628 C0603 1.2nF SRXN2 AF15 AF11 GNDA33 AC_SDIN1 +/-5% R0603 +/-5%
SRXP_2 C625 C0603 1.2nF SRXP2 SRXN2_NC GNDA33_NC SATA_CLKO AC_SDIN3 3 4
AE15
**
2 SRXP2_NC AC_SDIN2 5 6 PWROK_NB# R452 10K 2
GND W5 7 8
W12 V5 SATA_CLKI X6 R0603 +/-5%
near chipset VDDATS_NC1 GND 8P4R0603 15,19 PEHPSCI PEHPSCI R433 10K
W13 VDDATS_NC2 GND M16 1 2
W14 N11 XTAL-25MHz +/-5%
VDDATS_NC3 GND -PEWAKE R167 4.7K
W15 VDDATS_NC4 GND N12
*
W16 VDDATS_NC5 GND N13
* * AC_SDIN0 R423 X_4.7K R0603 +/-5%
GNDATS_NC10
GNDATS_NC11
GNDATS_NC12
GNDATS_NC13
C590 C591
*
N14 R0603 +/-5%
GNDATS_NC1
GNDATS_NC2
GNDATS_NC3
GNDATS_NC4
GNDATS_NC5
GNDATS_NC6
GNDATS_NC7
GNDATS_NC8
GNDATS_NC9
**
GND
GNDAS_NC1
GNDAS_NC2
GNDAS_NC3
GNDAS_NC4
AC17 N15 18pF 18pF GPI0 R463 1M +3.3VBAT

VDDAS_NC1 GND C0603 C0603 R0603 +/-5%
AC11 VDDAS_NC2 GND N16
AB17 INTRUDER R464 1M
+2.5VSATA VDDAS_NC3 R0603 +/-5%
AB11
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
C753 VDDAS_NC4 SLP_S3# R449 X_4.7K
*
* C755
* 1uF R0603 +/-5%
*
0.1uF VT8237RPLUS SREXT R469 4.7K
AB14
AC14
AD12
AD13
AD14
AD15
AD16
AE12
AE14
AE16
AF12
AF14
AF16
AC16
AC12
AB16
AB12
F6
F7
J5
K5
P5
R5
L11
L12
L13
L14
L15
L16
M11
M12
M13
M14
M15
K18
C0603 C0603 R0603 +/-1%
near chipset VCC3_SB

GNDSATA
CP10 X VCC3 R450 SATA_1 SATA_2

CP11 X CP12 X 4.7K 1 1
VDDA33 L46
* X_FB L0603 120 Ohm
* +/-5% STXP_1 2 STXP_2 2
VDDA0 L48
* X_FB L0603 120 Ohm +2.5V +2.5VSATA L47
* X_FB L0603 120 Ohm +2.5V R0603 STXN_1 3 8 STXN_2 3 8
*
C593 C433 PWRBTN#
* 0.1uF * 0.1uF
* C754
* C752
R391
R0603
68
+/-5% PWRBTIN 22,31 SRXN_1
4
5 9 SRXN_2
4
5 9
C530
C0603 C0603 0.1uF
C0603
0.1uF
C0603 * 0.1uF
SRXP_1 6
7
SRXP_2 6
7
C0603
SATA SATA
1 1
FOXCONN PCEG
Title
VT8237 part2
C K8M890M01 A

A B C D E
A B C D E
+2.5V
C743
0.1uF
VCC3
VCC3 VCC3
*
C444
C0603
*
**
0.1uF PWRGD_SB R484 4.7K
C0603 R0603 +/-5%
VGATE R485 4.7K
VLAD[15:0] R0603 +/-5%
16 VLAD[15:0]
+2.5V +2.5V_SB VCC3_SB
+2.5VSBPLL CP13 X
+2.5V
RN76 4.7K
DPSLP#
*1 * C528
M21
M22
M23
M24
M25
M19
N21
N22
N23
N24
N25
N26
N19
D12
VCC3
K21
P22
P23
P24
P25
P26
P19
E12
E10
E11
2
L23
L21
L19
D9
VRDSLP +/-5% 0.1uF
E9
4
U28C LDRQ1# 3 4 C0603 4
VLAD0 AGPBZ# 5 6 GND_SBPLL CP14 X
H25
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
VCCVK
MIISUS25-1
MIISUS25-2
MIIVCC1
MIIVCC2
MIIVCC3
MIIVCC4
16 VLAD0 VD0 7 8
VLAD1 G26 A11
16 VLAD1 VD1 MCRS
VLAD2 K26 B11 8P4R0603
16 VLAD2 VD2 MCOL
VLAD3 J23
16 VLAD3
*
VLAD4 VD3 MTEX R414 10K VRDSLP R491 X_4.7K
16 VLAD4 F26 VD4 MTXENA C11
VLAD5 G25 A10 R0603 +/-5% 22 VRDSLP R0603 +/-5%
16 VLAD5 VD5 MTXD0
VLAD6 K22 B10
16 VLAD6
*
VLAD7 VD6 MTXD1 RSMRST# R454 10K
16 VLAD7 K24 VD7 MTXD2 B9 VCC3_SB
VLAD8 E24 A9 R0603 +/-5%
16 VLAD8 VD8_NC MTXD3
VLAD9 G23 C10 C542
16 VLAD9 VD9_NC MTXCLK
VLAD10
16
16
VLAD10
VLAD11
VLAD11
L26
L25
VD10_NC
VD11_NC MRXER D10
* 1uF
VLAD12 E26 C9 C0603

16 VLAD12 VD12_NC MRXCLK
VLAD13 E25 D8
16 VLAD13 VD13_NC MRXDV
VLAD14 L24 C8
16 VLAD14 VD14_NC MRXD0
VLAD15 M26 B8
16 VLAD15 VD15_NC MRXD1
MRXD2 A8
VBE0 G24 C7
16 VBE0 VBE MRXD3
*
UPCMD K23 A7 VCOMPP R413 360 +/-5%
16 UPCMD
*
DNCMD UPCMD MDCK MMDIO R407 1.5K VCC3_SB R0603
16 DNCMD K25 DNCMD MDIO B7
F8 R0603 +/-5%
UPSTB PHYPWRDN +2.5V
16 UPSTB J26 UPSTB PHYRST_NC D7 TP14
UPSTB# J24
16 UPSTB# UPSTB
EECS D11
DNSTB H26 B12 R404
16 DNSTB DNSTB EEDO
DNSTB# H24 A12 SEEDI 3K
16 DNSTB# DNSTB EEDI[SDCS1] SEEDI 18 *
+2.5V C12 +/-1%
*
R409 4.7K EECK +2.5V R0603
*
R0603 VPAR F24 E7 +2.5VRAM R408 2.2 +/-5%
16 VPAR VPAR RAMVCC
LVREF_SB H22 VLREF
C460
0.1uF * R0805 LVREF_SB
GND_RAM C459
VCOMPP J22
RAMGND E6 C0603 +2.5V * R403
412
* C463
1uF * 0.1uF
* **
VCOMPP FERR# R442 R0603 1K+/-5% C0603 C0603
FERR U24 +/-1%
5 VCLK_SB L22 U26 A20M# R435 4.7K
VCLK A20M R0603 +/-5% check with VIA R0603
3
IGNNE T24 3
R26 VCC3
INIT INTR R434 4.7K LVREF_SB=0.3 volt
F23 VIOUT_NC INTR T25
T26 R0603 +/-5%
NMI
G22 VIIN_NC SMI U25
STPCLK R24
V26 SLP#
SLP SLP# 14
LPC_AD0 AD8 R22 BIOS_WP#
23,27 LPC_AD0 LAD0 GHI/GPIO22 BIOS_WP# 27
LPC_AD1 AF7 P21 DPSLP#
23,27 LPC_AD1 LAD1 DPSLP/GPIO23
LPC_AD2 AE7
23,27 LPC_AD2 LAD2
LPC_AD3 AD7 AC9 VGATE
23,27 LPC_AD3 LAD3 VGATE/GPIO8_NC VCC3 VCC3_SB
VIDSEL/GPIO28 AC8 SATALED# 22
LPC_FRAME# AB9 VRDSLP
23,27 LPC_FRAME# VRDSLP/GPIO29 check with VIA
AD10 AGPBZ#
AGPBZ/GPI6 AGPBZ# 16
LPC_DRQ#0
23 LPC_DRQ#0 AF6
AE6
LFRM
LREQ0
*R431 R437
X_1K *X_1K
LDRQ1# AE8 +/-5% +/-5%
**
LREQ1_NC
5,10,16,22,30 ALL_PWRGD
R482 X_0 R0603
+/-5%
PCICLK R23 SB_CLK R0603 R0603
SB_CLK 5
*
PWRGD_SB 0 AC5 U23 APIC_CLK R432 0
22 PWRGD_SB PWRGD APICCLK/GPI19_NC PEHPSCI 15,18
R483 R0603 +/-5%
**
RSMRST# AD4 R25 APICD0 R430 R0603 1K+/-5%
30 RSMRST# RSMRST APICD0/GPIO10_NC APICD1 R424 R0603 1K+/-5%
APICD1/GPIO11_NC T23 +2.5V
+3.3VBAT AF4 T22 +2.5VSBPLL
VBAT PLLVCC
RTCX1 AE4 U22 GND_SBPLL
RTCX1 PLLGND
RTCX2 AF3
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
RTCX2
VT8237RPLUS
P11
P12
P13
P14
P15
P16
R11
R12
R13
R14
R15
R16
R21
T11
T12
T13
T14
T15
T16
W22
W25
AA21
AB19
AB22
AB25
AC18
AE17
AE19
AE22
AE25
AA9
AB18
T21
AA10
K19
RTCX1 C548 10pF

*
Y1_1 C0603
*
*R462
10M
X5
XTAL-32.768kHz
+/-5%
2 2
R0603
Crystal Retainer
RTCX2 C535 10pF
*
C0603
VT8237A Need 12Pf
+3.3VBAT
*R540
100
+/-5%
Q46 R0603 R539
PS2 KEYBOARD & MOUSE CONNECTOR
*
VCC5_SB R534 1K+/-5% 1 Reserved CLR_CMOS
*
*
KB_VCC R110 X_0 R0603 3 3 3 CLR_CMOS(2-3)
R1206 +/-5% R521 2 +3.3VBAT X_100 2 2
CP20 X * 3K 1 1 Jumper_2P-Black
F3 +/-5%
* C645
*
BAT54C C647
R76
R0805
X_0 +/-5%
* 5VDUAL
R0603 10uF
C0805 * 10nF *R541
X_100 *R538
100
Header_1X3
* C60
0.1uF * C88
0.1uF
F1813_2.6A * R510
1K 6.3V, Y5V, +80%/-20%
C0603 +/-5%
R0603
+/-5%
R0603
C0603 C0603 R0603
Reserved
+/-5%
RN14 Clone Spec TF Spec
4.7K
2
4
6
8
+/-5% Clear CMOS Clear CMOS

8P4R0603 D12
*
* 13
5
7
R517 1K+/-5% C A BAT_1 1-2 Clear 1-2 Normal

VBAT0
KB/MS R0603
13 B120 2-3 Normal 2-3 Clear
1
MSCLK# L18
*
FB L0603 80 Ohm MSCLK1# 16 LITHIUM BATT
17 MSCLK# Battery Holder CR2032
MSDAT# L15
*
FB L0603 80 Ohm MSDAT1# MSCLK1# 11 5 KBCLK1# BAT1
17 MSDAT#
9 3 Battery
2
1 MSDAT1# 7 1 KBDAT1# 1
KBCLK# L17
*
FB L0603 80 Ohm KBCLK1# 8 14
17 KBCLK#
* 10 2
KBDAT# L11 FB L0603 80 Ohm KBDAT1# 12 4
17 KBDAT#
6
17
RN3
220pF 15
Install for TF ,Dummy for Clone
8P4R0603 UP DOWN
* PS2-KBMS-2
FOXCONN PCEG
Title
Install for Colone, Dummy for TF
VT8237 part3
C K8M890M01 A

A B C D E
5 4 3 2 1
J8,J9: 1-2 short (PORT 31)

2-3 short (PORT 25)
Connector combine R.M.
12V ===> 5.5A for x16 slot ,75 Watt
3.3V===> 3A PCI-E-1X
PCI-E(16X) 3.3Vaux==>375mA
PCI-E1(16X) VCC3 VCC3
D D
VCC3 VCC3 VCC3_SB +12V PCI-E1 +12V
1
VCC3_SB +12V +12V
PCI_Express_x16 B1 A1
1
12V_A PRSNT1*
B1 +12V PRSNT1# A1 B2 12V_B 12V_C A2
B2 +12V +12V A2 B3 12V_D 12V_E A3
B3 RSVD1 +12V A3 B4 GND1 GND2 A4
B4 GND GND A4 B5 SMCLK JTAG2 A5
B5 A5 5,12,18,26,30 SMBCLK B6 A6
5,12,18,26,30 SMBCLK SMCLK JTAG2 5,12,18,26,30 SMBDATA SMDAT JTAG3
B6 SMDAT JTAG3 A6 B7 GND3 JTAG4 A7
5,12,18,26,30 SMBDATA B7 A7 B8 A8
GND JTAG4 3.3V_A JTAG5
B8 +3.3 JTAG5 A8 B9 JTAG1 3.3V_B A9
B9 JTAG1 +3.3V A9 B10 3.3VAUX 3.3V_C A10
B10 A10 -PEWAKE B11 A11 -PERST1
3.3VAUX +3.3V WAKE# PWRGD -PERST1 22
15,18 -PEWAKE -PEWAKE B11 A11 -PERST1 ________ KEY ________
WAKE# PERST#
B12 RSVD_A GND4 A12
Mechanical Key B13 A13
GND5 REFCLK_+_H PECLK2+ 5
B12 RSVD2 GND A12 15 PE1TX0+ B14 HSOP0_H REFCLK_-_L A14 PECLK2- 5
B13 GND REFCLK+ A13 PECLK1+ 5 15 PE1TX0- B15 HSON0_L GND6 A15
C210 0.1uFPE0TX_0+ B14 A14 B16 A16
15 PE0TX0+ PECLK1- 5 PE1RX0+ 15
**
C213 0.1uFPE0TX_0- PETP0 REFCLK- -PE1PRT2 GND7 HSIP0_H
15 PE0TX0- B15 PETN0 GND A15 B17 PRSNT2# HSIN0_L A17 PE1RX0- 15
B16 GND PERP0 A16 PE0RX0+ 15 B18 GND8 GND9 A18
-PE0PRT2 B17 A17
PRSNT2#1 PERN0 PE0RX0- 15
B18 A18 PCIE-X1_SLOT
GND GND Reserved
C216 0.1uFPE0TX_1+ End of the x1 Connector
15 PE0TX1+
** ** ** B19 PETP1 RSVD5 A19
C217 0.1uFPE0TX_1- B20 A20
15 PE0TX1- PETN1 GND
B21 GND PERP1 A21 PE0RX1+ 15
B22 GND PERN1 A22 PE0RX1- 15
C219 0.1uFPE0TX_2+ B23 A23
15 PE0TX2+ PETP2 GND
C228 0.1uFPE0TX_2- B24 A24
C234 0.1uFPE0TX_3+ B27 A27
C236 0.1uFPE0TX_3- B28 A28
B30 RSVD3 PERN3 A30 PE0RX3- 15
-PE0PRT2 B31 A31
PRSNT2#2 GND
C B32 GND RSVD6 A32 C
C245 0.1uFPE0TX_4+ End of the x4 Connector

15 PE0TX4+ B33 A33
** ** ** **
C248 0.1uFPE0TX_4- PETP4 RSVD7

15 PE0TX4- B34 PETN4 GND A34
B35 GND PERP4 A35 PE0RX4+ 15 PCI-E-1X
C257 0.1uFPE0TX_5+ B37 A37
C261 0.1uFPE0TX_5- B38 A38 VCC3 VCC3
B39 A39 VCC3_SB +12V PCI-E2 +12V
GND PERP5 PE0RX5+ 15
1
C284 0.1uFPE0TX_6+ B41 A41 B1 A1
1
15 PE0TX6+ PETP6 GND 12V_A PRSNT1*
C283 0.1uFPE0TX_6- B42 A42 B2 A2
15 PE0TX6- PETN6 GND 12V_B 12V_C
B43 GND PERP6 A43 PE0RX6+ 15 B3 12V_D 12V_E A3
B44 GND PERN6 A44 PE0RX6- 15 B4 GND1 GND2 A4
C293 0.1uFPE0TX_7+ B45 A45 B5 A5
15 PE0TX7+ PETP7 GND 5,12,18,26,30 SMBCLK SMCLK JTAG2
C292 0.1uFPE0TX_7- B46 A46 B6 A6
15 PE0TX7- PETN7 GND 5,12,18,26,30 SMBDATA SMDAT JTAG3
B47 GND PERP7 A47 PE0RX7+ 15 B7 GND3 JTAG4 A7
-PE0PRT2 B48 A48 B8 A8
PRSNT2#3 PERN7 PE0RX7- 15 3.3V_A JTAG5
B49 A49 +12V B9 A9
GND GND JTAG1 3.3V_B
B10 3.3VAUX 3.3V_C A10
C310 0.1uFPE0TX_8+ End of the x8 Connector C162 0.1uF 16V, Y5V, +80%/-20% -PEWAKE -PERST1
15 PE0TX8+ B50 A50 B11 A11 -PERST1 22
** ** ** ** ** ** ** **
*
C309 0.1uFPE0TX_8- PETP8 RSVD8 WAKE# PWRGD
15 PE0TX8- B51 PETN8 GND A51 ________ KEY ________
B52 GND PERP8 A52 PE0RX8+ 15 B12 RSVD_A GND4 A12
B53 GND PERN8 A53 PE0RX8- 15 B13 GND5 REFCLK_+_H A13 PECLK3+ 5
C316 0.1uFPE0TX_9+ B54 A54 VCC3 B14 A14
15 PE0TX9+ PETP9 GND C181 15 PE1TX3+ HSOP0_H REFCLK_-_L PECLK3- 5
C315 0.1uFPE0TX_9- B55 A55 1000uF 6.3V, +/-20% B15 A15
15 PE0TX9- PETN9 GND 15 PE1TX3- HSON0_L GND6
B56 GND PERP9 A56 PE0RX9+ 15 B16 GND7 HSIP0_H A16 PE1RX3+ 15
**
B57 A57 -PE2PRT2 B17 A17
GND PERN9 PE0RX9- 15 PRSNT2# HSIN0_L PE1RX3- 15
C321 0.1uFPE0TX_10+ B58 A58 C173 0.1uF 16V, Y5V, +80%/-20% B18 A18
15 PE0TX10+ PETP10 GND GND8 GND9
C325 0.1uFPE0TX_10- B59 A59
B60 A60 PCIE-X1_SLOT
GND PERP10 PE0RX10+ 15
+12V Reserved
C329 0.1uFPE0TX_11+
B61
B62
GND PERN10 A61
A62
PE0RX10- 15 near PEG x16 slot C181 CHANGE 470U TO 1000UF
C337 0.1uFPE0TX_11- B63 A63 C160
B64
B65
GND PERP11 A64
A65
PE0RX11+ 15 * 470uF
16V, +/-20%
GND PERN11 PE0RX11- 15
C340 0.1uFPE0TX_12+ B66 A66 CE35D80H200
C345 0.1uFPE0TX_12- B67 A67
B 15 PE0TX12- PETN12 GND B
C353 0.1uFPE0TX_13+ B70 A70 VCC3_SB VCC3
C359 0.1uFPE0TX_13- B71 A71
B73 A73 PE0RX13- 15
C190 0.1uF 16V, Y5V, +80%/-20%
*
*
C361 0.1uFPE0TX_14+ GND PERN13 C661
15 PE0TX14+ B74 PETP14 GND A74
C363 0.1uFPE0TX_14- B75 A75 0.1uF
B76 GND PERP14 A76 PE0RX14+ 15 16V, Y5V, +80%/-20%
C367 0.1uFPE0TX_15+ B78 A78
C374 0.1uFPE0TX_15- B79 A79
B80 A80 PE0RX15+ 15
*
R371 X_0-PE0PRT2 GND PERP15 VCC3

17 GPI9 B81 PRSNT2#4 PERN15 A81 PE0RX15- 15
B82 RSVD4 GND A82
End of the x16 Connector
***
-PE0PRT2 R370 2.2K

PCI_EXPRESS_X16
-PE1PRT2 R191 2.2K
-PE2PRT2 R987 2.2K
The system board designer determines the pull-up voltage
A A
FOXCONN PCEG
Title
PCIe-16X/1X
C K8M890M01 A

5 4 3 2 1
8 7 6 5 4 3 2 1
PCI SLOT 1
17,26 AD[31..0]
17,26 C_BE#[3..0]
AD[31..0]
C_BE#[3..0]
-12V
PCI SLOT 2
+12V
PCI SLOT 3
PCI2 PCI_SLOT -12V +12V

-12V +12V B1 A1 TRST# PCI3 PCI_SLOT
PCI1 PCI_SLOT TCK -12V TRST# TRST#
B2 TCK +12V A2 B1 -12V TRST# A1
B1 A1 TRST# B3 A3 TMS TCK B2 A2
TCK -12V TRST# GND1 TMS TDI TCK +12V TMS
B2 TCK +12V A2 B4 TDO TDI A4 B3 GND1 TMS A3
B3 A3 TMS B5 A5 B4 A4 TDI
GND1 TMS TDI VCC5 +5V1 +5V2 PIRQ#B TDO TDI
B4 TDO TDI A4 B6 +5V3 INTA# A6 VCC5 B5 +5V1 +5V2 A5
B5 A5 PIRQ#C B7 A7 PIRQ#D B6 A6 PIRQ#C
VCC5 +5V1 +5V2 PIRQ#A PIRQ#A INTB# INTC# PIRQ#B +5V3 INTA# PIRQ#D
B6 +5V3 INTA# A6 B8 INTD# +5V4 A8 VCC5 B7 INTB# INTC# A7
PIRQ#B B7 A7 PIRQ#C B9 A9 PIRQ#A B8 A8
D INTB# INTC# PRSNT1# RSV1 INTD# +5V4 VCC5 D
PIRQ#D B8 A8 B10 A10 B9 A9
INTD# +5V4 VCC5 RSV2 +5V5 PRSNT1# RSV1
B9 A9 B11 A11 VCC3 B10 A10
PRSNT1# RSV1 PRSNT2# RSV3 RSV2 +5V5 VCC3
B10 RSV2 +5V5 A10 B12 GND2 GND3 A12 B11 PRSNT2# RSV3 A11
B11 A11 VCC3 B13 A13 B12 A12
PRSNT2# RSV3 VCC3 GND4 GND5 GND2 GND3
B12 GND2 GND3 A12 B14 RSV4 SB3V A14 VCC3_SB B13 GND4 GND5 A13
B13 A13 B15 A15 PCIRST#2 VCC3 B14 A14
GND4 GND5 GND6 RESET# RSV4 SB3V VCC3_SB
VCC3 B14 A14 B16 A16 B15 A15 PCIRST#2
RSV4 SB3V VCC3_SB 5 PCICLK2 CLK +5V6 GND6 RESET#
B15 A15 PCIRST#2 B17 A17 B16 A16
GND6 RESET# PCIRST#2 23 GND7 GNT# PGNT#1 17 5 PCICLK3 CLK +5V6
B16 A16 PREQ#1 B18 A18 B17 A17
5 PCICLK1 CLK +5V6 REQ# GND8 GND7 GNT# PGNT#3 17
B17 A17 B19 A19 PREQ#3 B18 A18
GND7 GNT# PGNT#0 17 +5V7 PCI_PME# PCI_PME# 18,23,26 REQ# GND8
PREQ#0 B18 A18 B20 A20 B19 A19 PCI_PME#
REQ# GND8 17,26 AD31 AD(31) AD(30) AD30 17,26 +5V7 PCI_PME#
B19 A19 PCI_PME# B21 A21 AD31 B20 A20 AD30
+5V7 PCI_PME# 17,26 AD29 AD(29) +3.3V1 AD(31) AD(30)
AD31 B20 A20 AD30 B22 A22 AD29 B21 A21
AD(31) AD(30) GND9 AD(28) AD28 17,26 AD(29) +3.3V1
AD29 B21 A21 B23 A23 B22 A22 AD28
AD(29) +3.3V1 17,26 AD27 AD(27) AD(26) AD26 17,26 GND9 AD(28)
B22 A22 AD28 B24 A24 AD27 B23 A23 AD26
GND9 AD(28) 17,26 AD25 AD(25) GND10 AD(27) AD(26)
AD27 B23 A23 AD26 B25 A25 AD25 B24 A24
*
AD25 AD(27) AD(26) +3.3V2 AD(24) AD24 R21717,26 330 +/-5% AD17 AD(25) GND10 AD24
B24 A24 17,26 C_BE#3 B26 A26 B25 A25
*
AD(25) GND10 AD24 C/BE#(3) IDSEL R0603 C_BE#3 +3.3V2 AD(24) R666 330 +/-5% AD19
B25 A25 17,26 AD23 B27 A27 B26 A26
*
C_BE#3 +3.3V2 AD(24) R221 330 +/-5% AD16 AD(23) +3.3V3 AD23 C/BE#(3) IDSEL R0603
B26 C/BE#(3) IDSEL A26 B28 GND11 AD(22) A28 AD22 17,26 B27 AD(23) +3.3V3 A27
AD23 B27 A27 R0603 B29 A29 B28 A28 AD22
B28 A28 AD22 B30 A30 AD21 B29 A29 AD20
AD21 B29 A29 AD20 B31 A31 AD19 B30 A30
AD(21) AD(20) +3.3V4 AD(18) AD18 17,26 AD(19) GND12
AD19 B30 A30 B32 A32 B31 A31 AD18
AD(19) GND12 17,26 AD17 AD(17) AD(16) AD16 17,26 +3.3V4 AD(18)
B31 A31 AD18 B33 A33 AD17 B32 A32 AD16
+3.3V4 AD(18) 17,26 C_BE#2 C/BE#(2) +3.3V5 AD(17) AD(16)
AD17 B32 A32 AD16 B34 A34 C_BE#2 B33 A33
AD(17) AD(16) GND13 FRAME# FRAME# 17,26 C/BE#(2) +3.3V5
C_BE#2 B33 A33 B35 A35 B34 A34 FRAME#
C/BE#(2) +3.3V5 17,26 IRDY# IRDY# GND14 GND13 FRAME#
B34 A34 FRAME# B36 A36 IRDY# B35 A35
GND13 FRAME# +3.3V6 TRDY# TRDY# 17,26 IRDY# GND14
IRDY# B35 A35 B37 A37 B36 A36 TRDY#
IRDY# GND14 17,26 DEVSEL# DEVSEL# GND15 +3.3V6 TRDY#
B36 A36 TRDY# B38 A38 DEVSEL# B37 A37
+3.3V6 TRDY# GND16 STOP# STOP# 17,26 DEVSEL# GND15
DEVSEL# B37 A37 LOCK# B39 A39 B38 A38 STOP#
DEVSEL# GND15 STOP# LOCK# +3.3V7 LOCK# GND16 STOP#
B38 GND16 STOP# A38 17,26 PERR# B40 PERR# SDONE A40 B39 LOCK# +3.3V7 A39
LOCK# B39 A39 B41 A41 PERR# B40 A40
PERR# LOCK# +3.3V7 +3.3V8 SBO# PERR# SDONE
B40 PERR# SDONE A40 17,26 SERR# B42 SERR# GND17 A42 B41 +3.3V8 SBO# A41
B41 A41 B43 A43 SERR# B42 A42
+3.3V8 SBO# +3.3V9 PAR PAR 17,26 SERR# GND17
SERR# B42 A42 B44 A44 B43 A43 PAR
SERR# GND17 17,26 C_BE#1 C/BE#(1) AD(15) AD15 17,26 +3.3V9 PAR
B43 A43 PAR B45 A45 C_BE#1 B44 A44 AD15
+3.3V9 PAR 17,26 AD14 AD(14) +3.3V10 C/BE#(1) AD(15)
C_BE#1 B44 A44 AD15 B46 A46 AD14 B45 A45
C/BE#(1) AD(15) GND18 AD(13) AD13 17,26 AD(14) +3.3V10
C AD14 B45 A45 B47 A47 B46 A46 AD13 C
B46 A46 AD13 B48 A48 AD12 B47 A47 AD11
AD12 B47 A47 AD11 B49 A49 AD10 B48 A48
AD(12) AD(11) GND20 AD(9) AD9 17,26 AD(10) GND19
AD10 B48 A48 A50 B50 B49 A49 AD9
AD(10) GND19 AD9 A50 B50 GND20 AD(9)
B49 GND20 AD(9) A49 A51 A51 B51 B51 A50 A50 B50 B50
A50 A50 B50 B50 17,26 AD8 B52 AD(8) C/BE#(0) A52 C_BE#0 17,26 A51 A51 B51 B51
A51 B51 B53 A53 AD8 B52 A52 C_BE#0
A51 B51 17,26 AD7 AD(7) +3.3V11 AD(8) C/BE#(0)
AD8 B52 A52 C_BE#0 B54 A54 AD7 B53 A53
AD(8) C/BE#(0) +3.3V12 AD(6) AD6 17,26 AD(7) +3.3V11
AD7 B53 A53 B55 A55 B54 A54 AD6
AD(7) +3.3V11 17,26 AD5 AD(5) AD(4) AD4 17,26 +3.3V12 AD(6)
B54 A54 AD6 B56 A56 AD5 B55 A55 AD4
+3.3V12 AD(6) 17,26 AD3 AD(3) GND21 AD(5) AD(4)
AD5 B55 A55 AD4 B57 A57 AD3 B56 A56
AD(5) AD(4) GND22 AD(2) AD2 17,26 AD(3) GND21
AD3 B56 A56 B58 A58 B57 A57 AD2
AD(3) GND21 17,26 AD1 AD(1) AD(0) AD0 17,26 GND22 AD(2)
B57 A57 AD2 B59 A59 AD1 B58 A58 AD0
AD1 GND22 AD(2) AD0 ACK#64 +5V8 +5V9 REQ#64_2 AD(1) AD(0)
B58 AD(1) AD(0) A58 B60 ACK64# REQ64# A60 B59 +5V8 +5V9 A59
B59 A59 B61 A61 ACK#64 B60 A60 REQ#64_1
ACK#64 +5V8 +5V9 REQ#64_1 +5V10 +5V11 ACK64# REQ64#
B60 A60 B62 A62 B61 A61
X1
X2
ACK64# REQ64# +5V12 +5V13 +5V10 +5V11
B61 A61 B62 A62
X1
X2
+5V10 +5V11 +5V12 +5V13
B62 A62
X1
X2
X1
X2
+5V12 +5V13
X1
X2
X1
X2
IDSEL = AD17
IDSEL = AD19
IDSEL = AD16 MASTER = PREQ#1
MASTER = PREQ#3
MASTER = PREQ#0 PIRQ#B
PIRQ#C
PIRQ#A
PCI PULL-UP / DOWN RESISTORS
RN37 8.2K +/-5% RN17 2.7K +/-5%

B B
17
17
PREQ#2
PREQ#0
PREQ#2
PREQ#0
*1 2 VCC3 17
16,17
PIRQ#C
PIRQ#A
PIRQ#C
PIRQ#A
*1 2 VCC3
PREQ#3 3 4 PIRQ#D 3 4
17 PREQ#3
PREQ#1 5 6 17,26 PIRQ#D
PIRQ#B 5 6 PCI SLOT DECOUPLING CAPACITORS
17 PREQ#1 7 8 17 PIRQ#B 7 8
8P4R0603 8P4R0603
RN39 8.2K +/-5% VCC5 VCC3 +12V VCC3_SB
RN41 8.2K +/-5%

17 PIRQ#G
PIRQ#G
*1 2
-12V
C185 X_0.1uF
**
3 4
17,26
17
PREQ#4
PGNT#5
PREQ#4
PGNT#5
*1 2 VCC3 17
17
PIRQ#E
PIRQ#F
PIRQ#E
PIRQ#F 5 6 C164 X_0.1uF C237 X_0.1uF C147 X_0.1uF C156 X_0.1uF
C0603
C183 X_0.1uF
***
****
PREQ#5 3 4 7 8 C0603 C0603 C0603 C0603 C0603
17 PREQ#5 5 6
PGNT#2 8P4R0603 C165 X_0.1uF C151 X_0.1uF
17 PGNT#2 7 8 RN28 2.7K +/-5% C0603 C0603
8P4R0603 FRAME#
IRDY#
*1 2 VCC5 C167
C0603
X_0.1uF C150
C0603
X_0.1uF
TRDY# 3 4 C326 X_0.1uF C266 X_0.1uF

*
DEVSEL# 5 6 C0603 C0603

RN40 8.2K +/-5% 7 8
17 PGNT#3 *1 2 VCC3 8P4R0603

RN29 2.7K +/-5%
3 4
17
17
PGNT#0
PGNT#1 5 6
STOP#
LOCK#
*1 2 VCC3 VCC3_SB VCC5 VCC5_SB
17,26 PGNT#4 7 8 PERR# 3 4 C911
5 6
8P4R0603 SERR#
7 8 C623 C186 C346
* 1000uF
VIA recommend to Pull
High All req#&GNT#
8P4R0603 * 1000uF
6.3V, +/-20%
* 1000uF
6.3V, +/-20%
* 1000uF
6.3V, +/-20%
6.3V, +/-20%
ce35d80h140 ce35d80h140 ce35d80h140

V1.0 CHANGE TO POP
CHECK R value
**
REQ#64_1 R325 R0603 4.7K +/-5% VCC5

*
REQ#64_2 R330 R0603 4.7K +/-5% PIRQ#H R545 R0603 4.7K +/-5% VCC3
15,17 PIRQ#H
** ** *
ACK#64 R326 R0603 4.7K +/-5% PIRQ#H R544 R0603 X_4.7K +/-5%
A A
TMS R135 R0603 X_4.7K +/-5% CHECK BOM
TDI R136 R0603 X_4.7K +/-5%
TCK R132 R0603 X_4.7K +/-5%

CHECK 8237A & 8237R DIFF
TRST# R127 R0603 X_4.7K +/-5%
FOXCONN PCEG
Title
PCI 1 & 2 Slot
C K8M890M01 A

8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
VCC5_SB VCC3
ATX Connector
6,30 VRM_GD
VRM_GD 1
U35
1A VCC 14
VCC3
VCC3
*
R488
Check with W.K
X_330
+/-5%
VRM_GD
C589 C569
FP_RST#
VCC3
2
3
1B
1Y 4B 13
R0603
* X_22uF
* 22uF
-5V R475 X_330 12 C1206 C1206

VCC3 4A PCIRST# 10,17,23
* *
30 ATX_PS_ON*
C601
* X_0.1uF
C635
R0603 +/-5% 4
5
2A
2B
4Y 11 PCIRST#1 26,27
VCC5_SB C0603
13
PWR1
+3.3V3 +3.3V1 1
* X_0.1uF
19 PWRGD_SB
PWRGD_SB R481
R0603
33
+/-5%
6 2Y 3B
3A
10
9 PCIRST#
GPO0 18
-12V
* C607
* R998
2.2K
14
15
-12V
GND4
+3.3V2
GND1
2
3
C0603
* C594
0.1uF
7 GND 3Y 8 -PERST1 20
PWRGD_SB
R495 0.1uF R0603 16 4 C0603 74AHC08 R492 Add R for C599
*
D * PSON +5V1 D
2.2K
R0603
C0603
+/-5% 17
18
GND5
GND6
GND2
+5V2
5
6 VCC5
19 VRDSLP Dummy
X_0
PERST1 colay * X_22uF
19 7 C609 K.wang C1206

+/-5% GND7 GND3
20 8
*
C
C610 RSVD PWR0K X_0.1uF CPU_PWRGD
VCC5 21 +5V3 +5V_AUX 9 VCC5_SB CPU_PWRGD 10
18 SLP_S3#
R497 1K B Q43 X_0.1uF
* 22 +5V4 +12V_1 10 +12V
C0603
*
R0603 +/-5% PMBT3904 C634 23 11 C629
+5V5 +12V_2 VCC5R0603
C0603
* 1nF 24 12
* X_0.1uF
E
GND8 +3.3V4
C0603 ATX_2X12 CHECK
PWR24NWP1_HM25 *R519
10K
C0603
R147
+/-5% D11
*
PWR_OK_ATX C A
PWR_OK 30 27 SD_LED
C630
14,30,31 PS_ON# * 1nF
*
C632
1nF 0
*
C631 1N4148W
Q44
C0603 R0603 X_0.1uF 2
19 SATALED#
C0603 +/-5% C0603 3 IDE_LED
R139 27 PD_LED 1
SOT23_123
*
BAT54A
POWOK1 23
X_0
R130
*
Front Panel Connector
VCC5_SBVCC5_SB
X_0
VIN3_5V 23
SYSTEM
*R592
330 * R623
330
R0603
+/-5%
FAN
+/-5% +/-5%
FP1 R0603 R0603
*
R512 330 +/-5% HDD+ 1 2 SLED 30 VCC5

VCC5
R0603 IDE_LED 3 4 PLED 30
5 6
*
C R489 4.7K FP_RST# 7 8 PWRBTIN C

VCC3 PWRBTIN 18,31
R0603 +/-5% C969 C913 +12V
C650
9 X
470pF
* * 470pF *R211
4.7K
5,10,16,19,30 ALL_PWRGD
ALL_PWRGD * 0.1uF Header_2X5_10 C0603
C0603
Standard +/-5%
R0603
C0603 HD_LED_P 1 2 FP PWR/SLP
*R543 C840
*
HD_LED_N 3 4 FP PWR/SLP 510 SYSFAN_PWM
100
+/-5% RST_SW_N 5 6 PWR_SW_P * 0.1uF R1608
R0603 +/-5% SYSFAN_PWM 23
C
-RESET_CLK R0603 RST_SW_P 7 8 PWR_SW_N C0603
5,10,16,19,30 -RESET_CLK RSVD_DNU 9 10 X 25V, Y5V, +80%/-20% D8 R238
1N4148W 4.7K
DUMMY +/-5%
SYS_FAN * R0603
A
4 4
3 SYS_FAN_P3 R231 27K
*
3 SYS_FAN 23
2 SYS_FAN_P2
2 C810 R0603 +/-5%
1 1
Header_1X4 (FAN4P) * 470pF

C0603 * C801
470pF *R228
22K
50V, X7R, +/-10% C0603 +/-5%
Foxconn Front Panel Connector 50V, X7R, +/-10% R0603
+12V
VCC5
BUZ VCC3 C901 C902
SYS_FAN_3P
1 +
POP 4 3 SYS_FAN_P3
* 100uF *100uF
16V, +/-20% 16V, +/-20%
RN79 Dummy R565 SYS_FAN_P2 CE20D50H110 CE20D50H110
BUZZER 2
23 ALARM *1 2
150 +/-5% 2 -
SOT23_BEC * X_10K 1
MMBT3904 +/-5%
3 4 R0603 Header_1X3 (FAN3P)
5 6 Buzzer Q53
PWR_OK_ATX E C
7 8 PWR_OK 30
C
8P4R0603 C723
*
18 SPKR
R536 2.2K +/-5% B Q50
* X_0.1uF
B
R0603 PMBT3904
C648 C0603
E
B B
* X_0.1uFFor EMI *R569
10K
C0603 +/-5%
*
SPEAKER R0603 R685 510
SPK- Dummy R0603 +/-5%
4 4
3 3 New FAN Header Definition
1 SPK+
VCC5
VCC3
dummy
+12V CPU FAN pin1. GND
1 VCC5 pin2. +12V
Header_1X4_2 +12V pin3. Sense
placed near the LM358 pin 8
*R210
4.7K
R684
1K
FOR EMI +/-5% U59A +/-1%
8
R0603 r0603h6 S RN95
2
4
6
8
R795
3 FDT458P 0 +12V
+
IDE_LED PLED HDD+ R700 1 G Q66 8P4R0603 +12V
*
* 13
5
7
C619 C194 C620 10K R0603 +/-5% 2
23 CPUFAN_PWM - +/-5%
* X_1nF
* X_1nF
* X_1nF
LM358M 470 dummy
*
C820
0.1uF
4
C0603 C0603 C0603 C830 r0603h6 R781 R785 25V, Y5V, +80%/-20%
C
*
D 4
10uF
C1206 * * C779
0.1uF
+/-5%
R0805
0 +/-5% D21 4.7K
+/-5%
C0603
DUMMY C0603 * R0603

CPU_FAN 1N4148W
R782
+2.5V_SB VCC3_SB 4 dummy
A
*
4
*
3 CPUFAN-P3 R786
3 CPU_FAN 23
R390 for VT8237A 10V, Y5V, +80%/-20% 2 CPUFAN-P2 27K
25V, Y5V, +80%/-20% 2 +/-5%
VCC_DDR
OVT# 18,23
* R777 28K
R0603
1 1
C778 C805 R0603 *R779
22K
+1.2V_HT * R392
X_0 * R390 V1.0 CHANGE BOM TO DUMMY
20K
+/-1% +/-1%
Header_1X4 (FAN4P)
*10uF
* C836
0.1uF * 470pF
C0603
+/-5%
R0603
X_1K R388 for VT8237R R0603 C1206 C0603
R388
R0603 dummy
*
V1.0 CHANGE BOM TO ADD(POP) PWRBTIN

* *
D
R780 R393 +/-5%

Q34 50V, X7R, +/-10%
X_1K X_1K X_2N7002 X_0 10V, Y5V, +80%/-20%
A R0603 R0603 SOT23_GSD 25V, Y5V, +80%/-20% A
G 7.5 Ohm Vgs=10V
D
+/-5% +/-5%
Q36 R389
PWRBTN# 18 CPU_FAN_3P 紇臫盎代(穦睹铬)
X_2N7002
R395
S
SOT23_GSD X_0 4 3 CPUFAN-P3

*
G 7.5 Ohm Vgs=10V 2 CPUFAN-P2

10 CPU_THERMTRIP* 1
X_0
S
Header_1X3 (FAN3P)
CPU_THERMTRIP*_SB 18,23
FOXCONN PCEG
Title
ATX Connector & Front Panel
C K8M890M01 A

8 7 6 5 4 3 2 1
5 4 3 2 1
VCC5 VCC5_SB VCC5
C201 C141
R900 * 0.1uF
* 0.1uF
VCC5 10 *R899
10
16V, Y5V, +80%/-20%
C0603
16V, Y5V, +80%/-20%
C0603
* +/-5%
HW Monitor
*
R138 X_4.7K Chipset_FAN R0805 R0805
+/-5% Dummy Place near pin4, 35
R0603 C986 C154 +/-5%
Note:
*
VCC5
* 10uF
* 0.1uF *Place CAPs close to pin 67, trace minimum 12 mils +V_CPU VIN0_VCORE
*
10V, Y5V, +80%/-20% 16V, Y5V, +80%/-20% R119 10K +/-1% R0603 C143 0.1uF
VCC5 For FDD: C1206 C0603 C200 C207 22U C999 C825
RN80
VCC5
Place near pin99 * 0.1uF
16V, Y5V, +80%/-20% * 10uF
*10uF
10V, Y5V, +80%/-20%
100uF
10V, Y5V, +80%/-20%
*
16V, +/-20%
**
*1 RDATA_L 4.7K GND_IO C0603 C1206 C1206 CE20D50H110 VCC3 VIN2_3.3V
***
** ** **
2 TRK0_L +/-5% R0603 R117 R125 10K +/-1% R0603 C149 0.1uF
3 4 DSKCHG_L VIN3_5V
35
99
67
5 6 VCC5
4
WRTPRT_L R133 X_680Dummy U17 R129 6.81K +/-1% R0603 R131 10K +/-1%
D 7 8 1K +/-5% +/-5% R0603 C155 0.1uF D
VCC
VCC
VCC
VCCH
8P4R0603 R120 X_680Dummy 16V, Y5V, +80%/-20%
** *
*
R518 1K INDEX_L +/-5% R0603 +12V R0603 VIN4_12V
*
R0603 +/-5% R128 1K RTSB# DCDA# 118 116 PRD7 R137 30K +/-1% R134 10K +/-1%
+/-5% RIA# 119
DCD1# PD7
115 PRD6
OPT
R122 4.7K DTRB# R0603 CTSA# RI1# PD6 PRD5 C158 0.1uF
120 CTS1# PD5 114
+/-5% DTRA# 121 113 PRD4 -12V R141 232K +/-1% VIN5_-12V VREF_SIO
DTR1#/JP1 PD4
Parallel Port
*
R123 X_4.7K RTSB# RTSA# 122 112 PRD3 R163 R144 56K +/-1%
**
RTS1#/JP2 PD3
*
+/-5% Dummy FAN Half Speed DSRA# 123 111 PRD2 THERM#1 0
Serial Port 1/2

DSR1# PD2 THERM# 18
SOUTA 124 110 PRD1 C161 0.1uF
**
SINA SOUT1/JP3 PD1 PRD0 THERM#2 R986 0 R150 Reserved VIN6_DDRPWR Dummy
125 109 VCC_DDR
**
DCDB# SIN1 PD0 RSTB# 10K +/-1% R0603 C163 X_0.1uF
126 108
*
DTRA# R116 X_4.7K JP1 RIB# DCD2# STB# RAFD# Dummy VIN1_VTT_FSB Dummy
VCC5 +/-5% dummy CTSB#
127
128
RI2# IT8712F/KX AFD# 107
106 RERR#
+1.2V_HT
R121 X_10K +/-1% R0603 C146 X_0.1uF
*
X_4.7K R118 RTSA# JP2 DTRB# CTS2# ERR# RINIT#

1 DTR2#/JP4 INIT# 105
RTSB# RSLIN#
DSRB#
2
3
RTS2# SLIN# 104
103 RACK#
check if dummy
SPI I/F,SO2 Enable SOUTB 5
DSR2#
SOUT2
ACK#
BUSY 102 RBUSY
SINB 6 101 RPE
SIN2 PE
SLCT 100 RSLCT
Temperature Monitor
Power-on Control
RN19 To Be Defined K.Wang
VCC3 *1 SI 20
*
2 SO2 JSBB2/GP27 4.7K R161 Choosing method of measuring temperature by either thermistor or diode
3 4 21 JSBB1/GP26 GP40 79 VCC5
SCE# SIO_BEEP 22 78 THERM#1 VREF_SIO +12V
*
5 6 JSBCY/GP25 PWROK2/GP41
Gameport/MIDI
23 77 RN20 ACPI_LED 4.7K R165
7 8 JSBCX/GP24 GP53
27 SI 24 JSAB2/GP23 PSON#/GP42 76 *1 2 VCC5_SB C168 R155 C142
X_4.7K
27 SCK 25
26
JSAB1/GP22 PANSWH#/GP43 75
72
3 4
K.W * X_0.1uF
16V, Y5V, +80%/-20% 10K *R152
X_30.1K * 0.1uF
SPI I/F Pull Hign R159
27
JSACY/GP21
JSACX/GP20
PWRON#GP44
PSIN/GP45 71
5
7
6
8
C0603
* R0603 +/-1% C0603
Change pull high to 3.3V FDC Connector 28 +/-1% R0603
18,22 OVT# MIDI_OUT/GP17 VCC5 VCC3 VCC3
*
FLOPPY 29 SCE# 4.7K
27 SO2 MIDI_IN/GP16 GND_IO
1 1 2 2 0 RESETCON#/CIRTX/GP15 30 SCE# 27 8716 dummy
MISC.
R177
X 4 4 RSMRST#/CIRRX/GP55 85
* * * If Pop , Change to X7R
R166
R168
5 6 DRVEN0 51 66 IRTX
5 6 INDEX_L DENSEL# IRTX/GP47 IRRX R176 +/-5% TMPIN1 SHORT28
7 8 63 70 CPU_THERMDA 10
*
7 8 MTR0_L INDEX# IRRX/GP46 CHASISS 1M R0603 TMPIN2
9 10 52 68 VBAT0
**
9 10 MTRA# COPEN#
330
4.7K
4.7K
11 12 R533 0 R0603 +/-5% DRVBJ 55 X_COPPER
*
11 12 DRVB#
C 13 13 14 14 DSA_L 54 DRVA#
R199 4.7K VCC3
* C
Floppy I/F
15 16 MOTEB_L R520 0 R0603 +/-5% MTRB_L/THRMO_L 53 84 -RESET_NB 16 C179 R162 C175
15 16 MTRB#/THRMO# PCIRST4#/SCRPRES#/GP10 T
SCR I/F
DIR_L
17
19
17 18 18
20 STEP_L
57
58
DIR# PCIRST3#/SCRCLK/GP11 34
33 HD_RST# 27
* 0.1uF
C0603
10K
+/-1% * 3.3nF
*
19 20 WDATA_L STEP# PCIRST2#/SCRIO/GP12 PWROK1 R170 10K R0603 C0603
21 21 22 22 56 WDATA# PWROK1/SCRPFET#/GP13 32 VCC5
23 24 WGATE_L 60 31 +/-5%
23 24 WGATE# PCIRST1#/SCRRST/GP14 PCIRST#2 21
25 26 TRK0_L 62 SHORT29 CPU_THERMDC 10
25 26 WRTPRT_L TRK0# VIN0_VCORE
27 27 28 28 64 WPT# VIN0 98 FOR CPU
29 30 RDATA_L 61 97 VIN1_VTT_FSB X_COPPER
31
29
31
30
32 32 HDSEL_L 59
RDATA#
HDSEL#
VIN1
VIN2 96 VIN2_3.3V K.Wang
PCIRST# 33 34 DSKCHG_L 65 95 VIN3_5V GND_IO
33 34 DSKCHG# VIN3 VIN4_12V
VIN4 94
Header_2X17_3 (FDD) 93 VIN5_-12V
K.Wang
*
VIN5
Hardware Monitoring
R175 4.7K 36 92 VIN6_DDRPWR Place cap close to pin90
K.Wang VCC3
*
C206 LPCPD# VIN6 4.7K R143
10,17,22 PCIRST# 37 LRESET# VIN7 91 VCC3
* x_0.1uF
16V, Y5V, +80%/-20%
19 LPC_DRQ#0 38
39
LDRQ# VREF 90
89 TMPIN1
VREF_SIO
C0603
dummy
19,27 LPC_AD0
18 SERIRQ
19,27 LPC_FRAME#
LPC_AD0
40
41
SERIRQ
LFRAME#
LAD0
TMPIN1
TMPIN2
TMPIN3
88
87
TMPIN2
C169
Print Port
LPC_AD1 THERM#2
19,27 LPC_AD1
LPC_AD2
42
43
LAD1 FAN_CTL3/GP36 12
11 Chipset_FAN * 1uF
16V, Y5V, +80%/-20% PRD7 PRND7
RN13
2.7K +/-5%
LPC I/F
19,27 LPC_AD2 LAD2 FAN_TAC3/GP37
LPC_AD3 44 10 SYSFAN_PWM C0603 RACK# ACK# PE D4
19,27 LPC_AD3 LAD3 FAN_CTL2/GP51 SYSFAN_PWM 22 6 5
47 9 SYS_FAN 22 RBUSY BUSY BUSY SLIN#
5 PCICLKSIO PCICLK FAN_TAC2/GP52 7 4
48 8 CPUFAN_PWM RPE PE PRND7 PRND4
CLKRUN#/GP50 FAN_CTL1 CPUFAN_PWM 22 8 3
49 7 PRD3 PRND3 ACK# PRND5
5 SIOCLK CLKIN FAN_TAC1 CPU_FAN 22 9 2
73 19 PWM_GIOP1 6 PRD4 PRND4 D4 PRND6
18,21,26 PCI_PME# PME#/GP54 VID0/GP30 10 1
*
18 PWM_GIOP2 6 PRD5 PRND5
VID1/GP31 PRD6 PRND6 10P8R0603
17 PWM_GIOP3 6 RN12
**
**
VID2/GP32 RSTB# STB#

VCC3 R193 R0603 0 +/-5% 4.7K +/-5% R0603 R189 45 KRST# VID3/GP33 16 PWM_GIOP4 6 2.7K +/-5%
VCC5 R192 R0603 X_0
+/-5% 4.7K +/-5% R0603 R196 46 14 PWM_GIOP5 6 PRD0 PRND0 PINIT# D4
GA20 VID4/GP34 RAFD# AFD# STB# 6 5 PRND0
80 KDAT VID5/GP35 13 7 4
VCC5_SB *1 81 RERR# ERR# ERR# PRND1
KB/MS
R198 X_0 DRVBJ 2 KCLK PRD1 PRND1 AFD# 8 3 PRND2

82
**
10 CPU_SIC R0603 dummy +/-5% 3 4 MDAT RINIT# PINIT# D4 9 2 PRND3

5 6 83 MCLK VBAT 69 VBAT0 10 1
*
R197 X_0 MTRB_L/THRMO_L C193 PRD2 PRND2
10 CPU_SID 7 8
GNDD
GNDD
GNDD
GNDD
GNDA
R0603 dummy +/-5%
* 1uF
*
C1000 PWROK1
POWOK1 22
RSLIN# SLIN# 10P8R0603
*
RN18 4.7K 1uF
10V, Y5V, +80%/-20% RSLCT SLCT SLCT R71 2.7K +/-5% D4
+/-5% C0603 C0805 R0603
B B
8P4R0603 VIN3_5V
VIN3_5V 22
15
50
74
117
86
Note:
-12VCOM C81 X_0.1uF R0805 Place cap close to pin 69 PRT
*
C0603
*
0 GNDA X7R 13 SLCT

RN8 X_4.7K +/-5% RN4 220pF RN6 220pF 25
*
+12VCOMC85 X_0.1uF R146 RAFD# AFD# ACK# 8P4R0603 PRND0 8P4R0603 12 PE
*
C0603 GND_IO RERR# 8 7 ERR#

6 5 24
RSTB# STB# PRND7 PRND1 11 BUSY
RINIT# 4 3* PINIT#
2 1 23
BUSY PRND2 10 ACK#
8P4R0603
SERIAL PORT 1 PE PRND3
22
PRND7
SERIAL PORT 2 9
*
C152 0.1uF VCC5 RSLCT R70 X_2.7K +/-5%SLCT 21
*
C0603 VCC5 R0603 26 8 PRND6

U3 D5 U15 RN9 X_4.7K +/-5% 27 20
R156
20 1 +12VCOM C A 20 1 +12VCOM PRD3 PRND3 RN7 220pF RN5 220pF 28 7 PRND5

VCC5 VCC +12V +12V VCC +12V * 8 7
*
PRD2 PRND2 SLIN# 8P4R0603 AFD# 8P4R0603 19
RTSA# NRTSA 1N4148W RTSB# NRTSB PRD1 6 5 PRND1 PRND4
16 DA1 DY1 5 16 DA1 DY1 5 ALARM 22 4 3 6
4.7K
DTRA# 15 6 NDTRA DTRB# 15 6 NDTRB PRD0 * PRND0 PRND4 ERR# 18

C
SOUTA DA2 DY2 NSOUTA SOUTB DA2 DY2 NSOUTB 2 1 PRND3

13 8 13 8 5
*
RIA# DA3 DY3 NRIA# RIB# DA3 DY3 NRIB# SIO_BEEP R153 510 Q22 8P4R0603 PRND5 STB# SLIN#
19 RY1 RA1 2 19 RY1 RA1 2 B 17
CTSA# 18 3 NCTSA# CTSB# 18 3 NCTSB# R0603 +/-5% MMBT3904 RN10 X_4.7K +/-5% 4 PRND2
DSRA# RY2 RA2 NDSRA# DSRB# RY2 RA2 NDSRB# RSLIN# SLIN# PRND6 PINIT# PINIT#
17 4 17 4 16
E
SINA RY3 RA3 NSINA SINB RY3 RA3 NSINB PRD4 8 7 PRND4 PRND1
14 RY4 RA4 7 14 RY4 RA4 7 6 5 3
DCDA# 12 9 NDCDA# DCDB# 12 9 NDCDB# PRD5 PRND5 15 ERR#
RY5 RA5 RY5 RA5 PRD6 4 3 PRND6 SLCT C68 220pF PRND0
D4 * 2
*
-12VCOM -12VCOM 2 1 C0603 AFD#
11 GND -12V 10 A C -12V 11 GND -12V 10 14
8P4R0603 1 STB#
GD75232 1N4148W GD75232 RN11 X_4.7K +/-5%
C133 0.1uF RACK# ACK#
IR CONNECTOR
*
C0603 PRD7 8 7 PRND7 PRNT25-M

D1
RBUSY 6 5 BUSY D4
4 3 VCC5 A C
RN2 220pF VCC5 RPE PE
*
2 1
*
NRIA# 8P4R0603 RN15 X_220pF 1N4148W

*
NDCDB# 8P4R0603 COM2 8P4R0603

NCTSA# COM1 10
NSOUTB
A
NDSRA#
10
5
* C178
IR
A
5 NSINB NRIB# 9 0.1uF C0603 Header_1X5_2

NRTSA NRIA# NDTRB 1 H5MO2
9 4
NDTRA 4 NDTRB NCTSB# 8 IRRX
RN1 220pF NCTSA# NSOUTB 3
8 3 4
*
NDTRA 8P4R0603 NSOUTA 3 RN16 X_220pF NRTSB 7 IRTX

5
*
NRTSA 7 NRTSB 8P4R0603 NSINB 2 C177 C172

NSINA NSINA NDSRB#
NDSRA#
2
6 NDSRB# NDCDB#
6
1
* 470pF
16V, Y5V, +80%/-20% * 470PF
16V, Y5V, +80%/-20%
INTR
1 CHASISS
NSOUTA NDCDA# 1
NCTSB#
C0603 C0603 2 FOXCONN PCEG
11
NDCDA# 11 Header_1X2 Title
NRIB# RS232-9
RS232-9
SIO IT8716_AX/BX
C K8M890M01 A

5 4 3 2 1
8 7 6 5 4 3 2 1
D D
VCC5
C129
* 0.1uF
C0603
C C
VCC5
C166
* 0.1uF
C0603
B B
A A
FOXCONN PCEG
Title
VGA Connector
C K8M890M01 A

8 7 6 5 4 3 2 1
5 4 3 2 1
IEEE-1394 http://www.bufanxiu.com
INTF# AD19
Did not support S3
wake-up
D D
5VDUAL
C927
*
L51 * 4.7uF
10V, Y5V, +80%/-20%
C0805
Choke Coil 1.2uH
C860 C861 C918 C885

1500uF * *1500uF* 4.7uF
* 0.1uF
D
16V, +/-20% 10V, Y5V, +80%/-20% 16V, Y5V, +80%/-20%
CE50D100H300 C0805 C0603
PHD45N03LTA VCC_DDR
*
R833 0 G Q71 VCC_DDR
30 VRAM_UGATE R0805 +/-5%
S
C544 C540
*
30 VRAM_OPS
R867
r0603h6
20K
+/-5%
L50 Choke Coil 2.6uH 10uF
* * *
0.1uF
C0603
C736
1uF
D
R555 C1206 16V, Y5V, C0603
+80%/-20%
Q72 *
2.2 C978 C505 C998 C865 C572 C571 C945 dummy
PHD45N03LTA +/-5% 0.1uF
* * 330uF * 330uF * 1000uF * 1000uF * 1000uF
* 4.7uF
*
R825 0 G R0805 16V, Y5V, +80%/-20% 6.3V, +/-20% 6.3V, +/-20% 6.3V, +/-20% 6.3V, +/-20% 10V, Y5V, +80%/-20%
30 VRAM_LGATE R0805 +/-5% C941 C0603 ce35d80h140 CE35D80H200 CE35D80H200 C0805
* 4.7nF 6.3V, +/-20% 10V, Y5V, +80%/-20%
S
50V, X7R, +/-10%
C0603
30 VRAM_FB
C C
R863 432
r0603h6 +/-1%
*R871
300
+/-1%
*
R0603 C955 1nF R550 220
*
C0603 50V, X7R, +/-10% R0603 +/-1%
Dummy Dummy
VCC3_SB
B B
VCC_DDR
U37
**
1 8 R514 0
VIN NC3 R0603 +/-5%
2 7 R860 0
GND NC2
* C921
1uF
R0603 +/-5%
PADDLE
16V, Y5V, +80%/-20% 3 6

C0603 REFEN VCNTL
*
*R493
1K
4 VOUT NC1 5 R477
R0603
0
+/-5% C614 C598 C192
+/-1% RT9173CPSP
* 22uF
* 1uF
* 0.1uF
9
R0603 For W83310DS 16V,

6.3V,
Y5V,
Y5V,
+80%/-20%
+80%/-20%
C1206 C0805 C0603
Dummy VTT_DDR
*R494
+/-1% * * *
1K C970 C604 C914
1nF 0.1uF 1uF
R0603 50V, X7R, +/-10% 16V, Y5V, +80%/-20% 16V, Y5V, +80%/-20%
C0603 C0603 C0603 R500
*
C574
1000uF *
C596
1000uF
* C964 * C922
4.7uF * C923
1uF
* 1K
+/-5%
6.3V, +/-20% 6.3V, +/-20% 4.7uF 10V, Y5V, +80%/-20% 16V, Y5V, +80%/-20% R0603
10V, Y5V, +80%/-20% C1206 C0603
C1206
Reserved
A A
FOXCONN PCEG
Title
VIA1394
C K8M890M01 A

5 4 3 2 1
5 4 3 2 1
Giga Lan Sku check bom with brian & RTL LAN_X1
*
LAN_X2 R51 X_0
R0603 +/-5%
PCI LAN RTL8110S/8100C XTAL-25MHz X2O X1
*
+/-50PPM 1 VDD33 R114 X_0
PIN127[RSET]: 2.49K for 8110S R288 stuff 10K for 93C56 LAN EEPROM VDD33
2 VDD33 R0805 +/-5%
VCC3_SB
R74 X_10K C55 C66
VCC5 5.6K for 8100C R0603 +/-5% U14
* 22pF
* 22pF
*
LAN_X1 LAN_EECS 1 8
LAN_EESK CS VCC
LAN_X2 LAN_EEDI
2 SK NC 7
* C119
C0603 C0603
D *R9
1K LAN_EEDO
3
4
DI
DO
ORG
GND
6
5 0.1uF D
+/-5% C0603
LAN_LINK_UP
R0603 R30 DVDD_A
LINK_100_C
5.6K LAN_RSET AT93C46-2.7V R361 use 3.6k for 3.3v Voltage. 5.6k for 5v voltage
LINK_1000
LAN_ISO +/-1% VDD33 VDD33
DVDD_A
CTRL18
*
AD0
AD1
r0603h6 R79 3.6K 8110SC do not install R419
R24 AVDDH R0603 +/-1% DVDD
15K DVDD_A DVDD V_12P
**
* +/-5% CTRL25 R85 0
*
R0603 R0603 +/-5% R2 0
R40
CTRL18 R84
R0603
X_0
+/-5%
B Q13
BCP69
* 0
R0805 +/-5%
* C19
0.1uF
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
U2 8110SC install R418,Do not install R417 C0603
R0805
4
C
AVDDL +/-5%
Place at pin 24,32,45,54,64,78,99,110,116
EESK
AUX/EEDI
EECS
LWAKE
RSET
NC26
NC27
XTAL2
XTAL1
NC25
NC24
LED0
NC23
LED1
LED2
NC22
NC21
NC20
EEDO
VDD33
AD0
AD1
GND
GND
GND
GND
*
R107 0
C48 R0805 +/-5%
MX0+ AD2
MX0-
1
2
TX+
TX-
AD2
GND
102
101
* C34
10uF * X_0.1uF
* C24
* C26
* C58
* C82
* C105
* C125
* C128
* C75
3 100 6.3V, Y5V, +80%/-20% C0805 C0603
AVDD33 GND X_0.1uF 0.1uF X_0.1uF 0.1uF X_0.1uF 0.1uF 0.1uF 0.1uF
4 GND VDD25 99
MX1+ 5 98 AD3 C0603 C0603 C0603 C0603 C0603 C0603 C0603 C0603
MX1- RX+ AD3 AD4
6 RX- AD4 97
7 96 AD5
CTRL25 AVDD33 AD5 AD6 VDD33
8 CTRL25 AD6 95
FOR RTL8100SB ONLY 9 NC1 VDD33 94
10 93 AD7
E
*
R12 X_0 NC2 AD7 C_BE#0

11 NC3 CBEB0 92
R0603 +/-5% V_12P 12 91 CTRL25 B Q2
AVDD25 GND AD8 X_BCP69_S 8110SC do not install R422
13 NC4 AD8 90
MX2+ 14 89 AD9 Place at pin
RTL8100C-LF
VCC3_SB MX2- NC5 AD9 AVDDL VDD33 AVDDH
15 88 10,120
4
C
*
R4 X_0 NC6 NC19 AD10

16 87 Place at pin 3,7,16,20
*
R0603 +/-5% NC7 AD10 AD11 R22 0 R3 X_0
17 GND AD11 86
MX3+ 18 85 AD12 R0805 +/-5% R0805 +/-5%
8110SC install R421 MX3- NC8 AD12 C9 C10 C2
19 NC9 VDD33 84
AD13 C28 C20 C27 C36 C12
C
20
21
AVDD33(REG)
GND
AD13
AD14
83
82 AD14 6.3V, Y5V, +80%/-20% * *C21 * * * * * * * C
22 81 X_10uF X_0.1uF 0.1uF X_0.1uF 0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF
LAN_ISO NC10 GND C0805 C0603 C0603 C0603 C0603 C0603 C0603 C0603 C0603
23 ISOLATEB GND 80
24 79 AD15
NC11 AD15
17,21 PIRQ#D 25 INTAB VDD25 78
26 77 C_BE#1
VDD33 CBEB1 VDD33
22,27 PCIRST#1 27 PCIRSTB PAR 76 PAR 17,21
5 LAN_CLK 28 75 SERR# 17,21
Place at pin 26,41,56,71,84,94,107
**
PCICLK SERRB R112 X_0
17,21 PGNT#4 29 GNTB NC18 74 SMBDATA 5,12,18,20,30
30 73 R0603 +/-5% C51 C87 C124 C126 C127 C91 C25 C118
17,21 PREQ#4 REQB NC17
18,21,23 PCI_PME# 31
32
PMEB
VDD25
NC16
VDD33
72
71
R111
R0603
X_0
+/-5%
SMBCLK 5,12,18,20,30 * * * * * * * * X_1uF
AD31 33 70 0.1uF X_0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF C0603
AD31 PERRB PERR# 17,21
AD30 34 69 C0603 C0603 C0603 C0603 C0603 C0603 C0603
AD30 STOPB STOP# 17,21
35 GND DEVSELB 68 DEVSEL# 17,21
AD29 36 67
AD29 TRDYB TRDY# 17,21
AD28 37 66
AD28 GND
38 65
FRAMEB
GND CLKRUNB
CBEB3
CBEB2
VDD33
VDD25
VDD33
IRDYB
IDSEL
RTL8110S / RTL8110SB /
NC12
NC13
NC14
NC15
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
RTL8100C RTL8110SC
GND
GND
RTL8169S RTL8169SB
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
AVDDH N/A 3.3AVDD 3.3AVDD 3.3AVDD

AD[31..0]
17,21 AD[31..0]
C_BE#[3..0] V_12P 2.5AVDD N/A 3.3AVDD 3.3AVDD
17,21 C_BE#[3:0]
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
C_BE#3
C_BE#2
AVDDL 3.3AVDD 2.5AVDD 2.5AVDD 1.8AVDD

IRDY# 17,21
FRAME# 17,21
V_DAC N/A 2.5AVDD 2.5AVDD N/A
AD20 R53 100 LAN_IDSEL
R0603 +/-5%
*
DVDD 2.5VDD 1.8VDD 1.2VDD 1.5VDD

B B
IDSEL = AD20 DVDD_A N/A 1.8AVDD 1.2AVDD 1.5AVDD
LINK_1000
MASTER = PREQ#4
V1.0 CHANGE TO dummy
PIRQ#F LAN_LINK_UP
VCC3_SB
LINK_100_C
check with RTL
1- MDIO+ & MDIO- pairs should be R99 NIC_USB
100-ohm differential impedance. VCC3_SB AVDDL 330
Route equal length and
* +/-5%
R108 R0603
symmetrically. Separate every L20 27
pairs. C93 C94 C96 * 22 28
GRN_LED
YLW_LED
* X_0.1uF
* X_0.1uF
* X_0.1uF
X_FB L0603 120 Ohm_S
LAN_LINK_UP 21 29
USB-2
USB-1
X_0 30
U9
C0603 C0603 C0603
* R0805
+/-5%
MX0+ 1 8 MX0+ 9 1 USBVCC2
1 8 MX0+ USBVCC2 19,29
10 5
MX0- 2 7 MX0- MX0- 11
2 7
RJ45-MJ2
MX1+ 12 2 SBD3-
MX1+ MX1+ MX1- SBD2- SBD3- 29
3 3 6 6 13 6
C95 MX2+ 14 SBD2- 29
MX1- MX1-
4 4 5 5
* X_0.1uF MX2-
MX3+
15
16
3
7
SBD3+
SBD2+ SBD3+ 29
X_SLVU2.8-4.TE C0603 MX3- 17 SBD2+ 29
V1.0 CHANGE TO dummy 18 4
8
U13
GRN_LED
MX2+ MX2+
1 8 CHANGE TO 0.01u
*
1 8 R100 330 LINK_1000
VCC3_SB 20 23
MX2- 2 7 MX2- R0603 +/-5% LINK_100_C 19 24
2 7 C3 0.1uF 25
*
MX3+ 3 6 MX3+ C0603 R91 26

****
3 6 R16 R0402 49.9 +/-1% MX0+ X_0_S

A MX3- 4 5 MX3- R15 R0402 49.9 +/-1% MX0-
* +/-5% A
4 5 C13 0.1uF R14 R0402 49.9 +/-1% MX1+ R0603 X_USBX2_RJ45 Gigabit LAN
*
X_SLVU2.8-4.TE C0603 R13 R0402 49.9 +/-1% MX1- USB4X2_RJ45P10_LED
Add ESD protection IC U65,U66 for C4 X_0.1uF_S

*
C0603
****
TF SPEC R11 R0402 X_49.9 +/-1% MX2+

12/2/05 Swain xu C11
R10
X_0.1uF_S R7
R0402
R0402
X_49.9 +/-1%
X_49.9 +/-1%
MX2-
MX3+
FOXCONN PCEG
*
C0603 R6 R0402 X_49.9 +/-1% MX3- Title

RTL8100C
C K8M890M01 A

5 4 3 2 1
8 7 6 5 4 3 2 1
ATA 33/66/100 IDE Connectors

PDD[0..15]
18 PDD[0..15] SDD[0..15]
18 SDD[0..15]
VT8237A Do Not Need Damping Resistors
PIDE
*
HD_RST# R537 33 +/-5% 1 2
23 HD_RST#
PDD_7 R0603 3 4 PDD_8
PDD_6 5 6 PDD_9
PDD_5 7 8 PDD_10
D D
PDD_4 9 10 PDD_11 RN50 22 RN57 22
PDD_3 11 12 PDD_12 PDD14
*1 PDD_14 SDD0
*1 SDD_0
* * * *
PDD_2 PDD_13 PDD1 2 +/-5% PDD_1 SDD1 2 +/-5% SDD_1 PD_REQ R470 5.6K
13 14 3 4 3 4
PDD_1 15 16 PDD_14 PDD13 PDD_13 SDD2 SDD_2 R0603 +/-5%
PDD_0 PDD_15 PDD2 5 6 PDD_2 SDD3 5 6 SDD_3
17 18 7 8 7 8
19 SD_REQ R486 5.6K
X
PD_REQ 21 22 8P4R0603 8P4R0603 R0603 +/-5%
PD_IOW# 23 24
PD_IOR# 25 26 RN51 22 RN56 22 PDD_7 R455 4.7K
PD_RDY 27 28 R526 475 PDD4
*1 2
PDD_4 SDD4
7 8
SDD_4 R0603 +/-5%
*
PD_ACK# 29 30 R0603 +/-1% PDD5 +/-5% PDD_5 SDD5 +/-5% SDD_5
IRQ14_R PDD6 3 4 PDD_6 SDD6 5 6 SDD_6 SDD_7 R490 4.7K
31 32 5 6 3 4
PD_A1 33 34 PD_DET PDD7 PDD_7 SDD7 * SDD_7 R0603 +/-5%
PD_A0 PD_A2 PD_DET 18 7 8 1 2
35 36
PD_CS1# 37 38 PD_CS3# 8P4R0603 8P4R0603
22 PD_LED 39 40
R530
* *R527 *R524 Header_2X20_20 (IDE) *R529
15K PDD12
*1
RN59
2
22
PDD_12 SDD8
RN75
7 8
22
SDD_8
4.7K 8.2K 4.7K +/-5% PDD10 +/-5% PDD_10 SDD9 +/-5% SDD_9
+/-5% +/-5% +/-5% R0603 PDD9 3 4 PDD_9 SDD10 5 6 SDD_10
R0603 R0603 R0603 PDD8 5 6 PDD_8 SDD11 * 3 4 SDD_11
7 8 1 2
VCC5 VCC3
8P4R0603 8P4R0603
VCC5
RN54 22 RN78 22
PDD3
PDD11
*1 2 +/-5%
PDD_3
PDD_11
SDD12
SDD13 7 8
SDD_12
SDD_13
PDD15 3 4 PDD_15 SDD14 5 6 SDD_14
PDD0 5 6 PDD_0 SDD15 3 4 +/-5% SDD_15
SIDE *
*
HD_RST#R542 33 +/-5% 7 8 1 2
1 2
SDD_7 R0603 3 4 SDD_8 8P4R0603 8P4R0603
SDD_6 5 6 SDD_9
SDD_5 7 8 SDD_10
SDD_4 9 10 SDD_11
SDD_3 11 12 SDD_12
SDD_2 13 14 SDD_13 RN46 22 RN58 22
C
SDD_1
SDD_0
15
17
16
18
SDD_14
SDD_15 18 PDA1 *1 2
PD_A1
+/-5% PD_ACK# 18 SDREQ *1 2 +/-5%
SD_REQ
SD_ACK# C
18 PDACK# 3 4 PD_IOR# 18 SDACK# 3 4 SD_IOR#
19 X 18 PDIOR# 5 6 18 SDIOR# 5 6
SD_REQ 21 22 PD_IOW# SD_IOW#
SD_IOW# 18 PDIOW# 7 8 18 SDIOW# 7 8
23 24
SD_IOR# 25 26 8P4R0603 8P4R0603
SD_RDY 27 28 R522 475
*
SD_ACK# 29 30 R0603 +/-1% RN49 22 RN74 22
IRQ15_R
SD_A1
31
33
32
34 SD_DET 18 PDCS3# *1 2
PD_CS3#
+/-5% PD_CS1# 18 SDCS3# *1 2 +/-5%
SD_CS3#
SD_CS1#
SD_A0 SD_A2 SD_DET 18 18 PDCS1# 3 4 PD_A2 18 SDCS1# 3 4 SD_A0
35 36 18 PDA2 5 6 18 SDA0 5 6
SD_CS1# 37 38 SD_CS3# PD_A0 SD_RDY
18 PDA0 7 8 18 SDRDY 7 8
22 SD_LED 39 40
R531
* *R525 *R523 Header_2X20_20 (IDE) *R528
15K
8P4R0603 8P4R0603
4.7K 8.2K 4.7K +/-5% RN52 22 RN53 22

+/-5%
R0603
+/-5%
R0603
+/-5%
R0603
R0603
18 PDRDY *1 2
PD_RDY
+/-5% PD_REQ 18 SDA1 *1 2 +/-5%
SD_A1
SD_A2
18 PDREQ 3 4 IRQ14_R 18 SDA2 3 4 IRQ15_R
VCC5 VCC3 18 IRQ14R 5 6 18 IRQ15R 5 6
VCC5 7 8 7 8
8P4R0603 8P4R0603
VCC5 VCC3_SB
B B
C356 C97 C642 C445

* 0.1uF
* 0.1uF
* X_0.1uF
* X_0.1uF
C0603 C0603 C0603 C0603
LPC DECOUPLING CAPACITORS
VCC3
C170
VCC3
WP_EN(2-3) * 0.1uF
* C888
1uF
Jumper_2P-Black C0603 C0805
SYSTEM ROM (LPC)
*R140
X_3.3K VCC3
+/-5%
VCC3 WP_EN R0603
U26 U16
1 1 BIOS_WP#
Place Cap. as Close to FWH< 350 mil
2 2 23 SI 5 8
*
R381 330 SI VCC

24 INIT# VPP 1 VCC3 3 3 23 SCK 6 SCK
R0603 +/-5% 2 25 7 2
22,26 PCIRST#1 RST# VCC1 HOLD# SO SO2 23
32 Header_1X3 1
VCC2 23 SCE# CE#
FWH_CLK 31 27 BIOS_WP# 3 4
5 BIOS_CLK CLK VCCA WP# GND
PRES4 30
LPC Resistors X_SST25VF020
PRES3 FGPI4 TBL#
3 FGPI3 TBL# 8
PRES2 4 7 BIOS_WP#
FGPI2 WP# BIOS_WP# 19
PRES1 5 default is high RN33 1K +/-5%
FGPI1
PRES0 6 FGPI0 FWH4 23
17
LPC_FRAME# 19,23
LPC_AD3 19,23
PRES2
*1 2 VCC3
FWH3 PRES3 3 4
A 9 ID3 FWH2 15 LPC_AD2 19,23 5 6
A
10 14 PRES4
ID2 FWH1 LPC_AD1 19,23 7 8
11 ID1 FWH0 13 LPC_AD0 19,23
12 8P4R0603
ID0
IC 29
RN32 1K +/-5%
16
26
GND1 RSVD5 22
21
BIOS_WP#
TBL#
*1 2 VCC3
GND2 RSVD4 PRES0 3 4
28 GNDA RSVD3 20 5 6
19 PRES1
RSVD2
RSVD1 18
7
8P4R0603
8 FOXCONN PCEG
Title
PLCC-32-SKT ATA IDE & ROM
C K8M890M01 A

8 7 6 5 4 3 2 1
5 4 3 2 1
*
R78 10K JD1
Standby Mode: +12V LINE2-VREFO AUD-RET-L 31

+/-5%
R0603 * C77
4.7uF
AUD-RET-R 31 @653 10V, Y5V, +80%/-20%
For Power ON/OFF POP Noise AUD-FRONT-R 31
A
D2 MIC2-VREFO @653
VCC5_SB AUDIO1B
*
MIC1-VREFO-L FRONT-R C6 100uF R31 0 L3 FB L0603 600 Ohm LINE_OUT_R5 LINE_OUT_R5
* 25
*
1N4148W CE20D50H110 16V, +/-20% R0603 +/-5% 24 38
1
C42 C40 C39 @ALC880 23 39
C
D3
* R113
* 1uF
* 1nF
* 1uF LINE_OUT_L2 22
*
10 16V, Y5V, +80%/-20% 50V, X7R, +/-10% 16V, Y5V, +80%/-20% FRONT-L C7 100uF R8 0 L1 FB L0603 600 Ohm LINE_OUT_L2
B340B
*
*
Q11 +/-5% C0603 C0603 C0603 CE20D50H110 16V, +/-20% R0603 +/-5% JACK_AUDX3 Vertical
R0805 @ALC653 @ALC653 @ALC653 @ALC880 R1
+5VA 1 3
* *R25 LINE OUT @653
2
OUT IN
Close to Chip AUD-FRONT-L 31
22K
+/-5%
22K
+/-5%
C69
100pF * * C71
100pF
GND
R0603 50V, X7R, +/-10%
R0603 50V, X7R, +/-10%
C107 C131 @653 @653 C0603 C0603
*
* *
D D
* * 0.1uF LM78L05 C113 100uF R64 10K JD0
2
C104 16V, Y5V, +80%/-20% 0.1uF 16V, +/-20% MIC1-VREFO-L +/-5%
10uF
10V, Y5V, +80%/-20%
C0603 16V, Y5V, +80%/-20%
C0603
CE20D50H110
MIC1-VREFO-R
R0603
@653 * C84
4.7uF
10V, Y5V, +80%/-20%
C0805 @ALC880 R50
* 4.7K *R60
4.7K
@653
+/-5% +/-5%
For EMI R0603 R0603 AUDIO1A
861 DUMMY MIC1-R C62 1uF L8 FB L0603 600 Ohm MIC1_R5 MIC1_R5
* 5
* *
+5VA R39 10K CP20021 2 COPPER C0805 16V, Y5V, +80%/-20% 4 36
R0603 +/-5% Dummy 3 37
@ALC880 C41 MIC1-L C74 1uF L14 FB L0603 600 Ohm MIC1_L2 MIC1_L2
close to Codec as possible For Standby Mode (ALC880 Only) * 1nF C0805 16V, Y5V, +80%/-20% * 2
1
50V, X7R, +/-10% @653
C54 1uF @ALC653

C0603
@ALC653 MIC1-VREFO-R
Close to Chip
*R57
4.7K
C38
* * C5 JACK_AUDX3 Vertical
*R73 100pF 100pF
MIC IN
*
31 FMIC2 C0805 16V, Y5V, +80%/-20% +/-5% 22K 50V, X7R, +/-10% 50V, X7R, +/-10%
LINE2-VREFO R0603 +/-5% R49 C0603 C0603
LINE2-VREFO 31
Dummy R0603 *22K
C22 1uF @ALC653 Sense_B MIC2-VREFO MIC1-VREFO-L @653 +/-5%
MIC2-VREFO 31
*
* **
31 FMIC1 C0805 16V, Y5V, +80%/-20% R0603 R83 10K JD2

MIC1-VREFO-L
SIDESURR-JD R26 5.1K
@653 +/-5%
R0603 * C89
4.7uF
R0603 +/-1% C30 4.7uF @653 10V, Y5V, +80%/-20%
*
@ALC880 FRONT-L C0805 10V, Y5V, +80%/-20% +5VA @653
CEN-JD R19 10K AUDIO1C
R0603 +/-1% FRONT-R LINE1-R C49 1uF L6 FB L0603 600 Ohm LINE1_R5 LINE1_R5
* 35
* *
@ALC880 C43 C0805 16V, Y5V, +80%/-20% 34 40
*
31 FRONT-IO-SENSE
R38
R0603
0
+/-5% * 0.1uF
16V, Y5V, +80%/-20% LINE1-L C56 1uF L9 FB L0603 600 Ohm LINE1_L2 LINE1_L2
33
U1
*
36
35
34
33
32
31
30
29
28
27
26
25
32
+5VA @ALC880 C0603 C0805 16V, Y5V, +80%/-20%
Tied at one point only under @653
FRONT-L
FRONT-R
Sense B (JD2)
DCVOL
LINE2-VREFO
MIC2-VREFO
VREF
LINE1-VREFO-L
MIC1-VREFO-L
AVSS1
AVDD1
MIC1-VREFO-R
the codec or near the codec Close to Chip

*R52
22K *R45
22K
C70
100pF * * C72
100pF
JACK_AUDX3 Vertical
+/-5% +/-5%
50V, X7R, +/-10% 50V, X7R, +/-10%
C37 37 24 LINE1-R R0603 R0603 C0603 C0603
C
* 0.1uF LINE1-VREFO-R LINE1-R @653 @653 LINE IN C
16V, Y5V, +80%/-20% 38 23 LINE1-L
C0603 AVDD2 LINE1-L
SURR-L 39 22 MIC1-R
SURR-L MIC1-R
40 21 MIC1-L
* *
JDREF (or NC) MIC1-L R77 0 JD2 SURR-R C57 1uF L10 FB L0603 600 Ohm SURR-R_C
*
* *
SURR-R 41 20 CD_R R0603 +/-5% C0805 16V, Y5V, +80%/-20%
SURR-R CD-R
*R46
20K 42 AVSS2 CD-GND 19 CD_GND R72
@ALC563
0 JD1 SURR-L C47 1uF L5
* FB L0603 600 Ohm SURR-L_C
Close to the Codec +/-1% R0603 +/-5% C0805 16V, Y5V, +80%/-20%
R0603 CEN 43 18 CD_L @ALC563
CEN CD-L
R80
@ALC880
LFE 44 LFE MIC2-R 17 MIC2-R 31
Close to Chip C59
100pF * * C65
100pF
50V, X7R, +/-10% 50V, X7R, +/-10%
JD0 SIDESURR-L 45 16 C0603 C0603
SurrBack-L MIC2-L MIC2-L 31
*
SIDESURR-R 46 15 LINE2-R
0 SurrBack-R LINE2-R LINE2-R 31
R0603 R98 LINE2-L Place close to CODEC LFE C61 1uF L12 FB L0603 600 Ohm LFE_C
47 14 LINE2-L 31 *
* *
+/-5% 0 SPDIFI/EAPD LINE2-L C0805 16V, Y5V, +80%/-20%
* * * *
* +/-5% Sense_A R95 5.1K FRONT-JD
SDATA-OUT
@ALC563 48 13
R0603 31 SPDIF_OUT SPDIFO Sense A (JD1) R0603 +/-1% @ALC880 CEN C73 1uF L13 FB L0603 600 Ohm CEN_C
SDATA-IN
*
PCBEEP
RESET#
BIT-CLK
Reserved C0805 16V, Y5V, +80%/-20%

DVDD1
DVDD2
DVSS1
DVSS2
GPIO0
GPIO1
SYNC
V1.0 CHANGE TO POP R82 10K LINE1-JD

Enabling 14.318MHz R0603 +/-1% @ALC880 Close to Chip C50
100pF * * C53
100pF
C665 ALC880 R96 20K MIC1-JD 50V, X7R, +/-10% 50V, X7R, +/-10%
1
10
11
12
* 0.1uF
16V, Y5V, +80%/-20% Arrangement of Jack Detection Pin:(ALC880)
R0603 +/-1% @ALC880 C0603 C0603
C0603 Sense A for jacks at back panel R106 39.2K SURR-JD

Sense B for jacks at front panel R0603 +/-1% @ALC880
SIDESURR-R C92 1uF L19 FB L0603 600 Ohm SIDESURRBACK-R_C
VCC3 *
* *
C0805 16V, Y5V, +80%/-20%
C122 C99 C101
10uF
6.3V, Y5V, +80%/-20% * * 0.1uF
16V, Y5V, +80%/-20% * 0.1uF
16V, Y5V, +80%/-20%
SIDESURR-L C79
C0805
1uF
16V, Y5V, +80%/-20%
L16
* FB L0603 600 Ohm SIDESURRBACK-L_C
C0805 C0603 C0603

B B
Dummy
*R109
33
AC_RST#
AC_SYNC
18
18
Close to Chip C15
100pF * * C29
100pF
+/-5% 50V, X7R, +/-10% 50V, X7R, +/-10%
DELETE R102 FOR HD CODEC C100 R0603 C0603 C0603
*
* 47pF R104 43 AC_SDIN0 18

*
R115 0 50V, NPO, +/-5% +/-5%

5 AC_14M R0603 +/-5% C0603 R0603
@ALC653
AC_BITCLK 18 6 Azalia Audio Jacks
AUDIOA AUDIOB
LINE1_L2 SURR-L_C
LINE1-JD
32
33 SURR-JD
62
63
Black
Audio Jack
R58
AC_SDOUT 18
*
LINE1_R5
34
35
Light Blue SURR-R_C
64
65
C110
22pF * C103
22pF * * C102
22pF X_0 31 61
LINE IN SURR OUT
50V, NPO, +/-5% 50V, NPO, +/-5% 50V, NPO, +/-5% LINE_OUT_L2 22 CEN_C 52 C F
C0603 C0603 C0603 FRONT-JD 23 CEN-JD 53
(UAJ) (UAJ)
Dummy Dummy Dummy R27 24 54 Orange
*
LINE_OUT_R5 LFE_C LINE OUT CEN/LFE

25
21
Lime 55
51 B E
X_0 (UAJ) (UAJ)
MIC1_L2 2 SIDESURRBACK-L_C 42
For ALC880: No clock input is required MIC1-JD 3 SIDESURR-JD 43 MIC IN SIDE SURR OUT
R18 4 44 A D (UAJ)
(UAJ)
*
MIC1_R5 SIDESURRBACK-R_C
5
1
Pink 45
41
Gray
AUX-IN X_0
JACK_Azalia 6 Ports
AUX_IN JACK_Azalia 6 Ports
LINE2-L C180 1uF @ALC653 1
Right Side Left Side
* *
C0805 16V, Y5V, +80%/-20% 2 5

3 HHPN : JAS3331-H1K2
LINE2-R C174 1uF @ALC653 4 @ALC653
C0805 16V, Y5V, +80%/-20%
JST-CON4-2-White
Close to Chip
A A
CD_L C153 1uF

CD-IN
* * *
C0805 16V, Y5V, +80%/-20% CD_IN

1
CD_GND C144 1uF 2 5
C0805 16V, Y5V, +80%/-20% 3
4
CD_R C134 1uF
C0805 16V, Y5V, +80%/-20% JST-CON4-2-Black FOXCONN PCEG
Close to Chip Title
Realtek ALC880/ALC653 Audio
C K8M890M01 A

5 4 3 2 1
E D C B A
POWER CIRCUIT FOR USB PORT 4,5,6,7
POWER CIRCUIT FOR USB PORT 0,1,2,3
F5
USBVCC3
5VDUAL *
*R406 C525
*R412
+/-5% *
F1813_2.6A C461 2.7K X_1uF X_1K
* 1000uF
6.3V, +/-20% R0603 C0603
+/-5%
R0603
KB_VCC
USBVCC2
USBVCC2 19,26
ce35d80h140 *R93
2.7K C111
U4
17 OC#4_7
OC#4_7
C462 R410
+/-5%
R0603
* 1000uF
6.3V, +/-20%
SBD3+ 1 I/O1 I/O4 6 SBD3-
*
0.1uF *5.1K
17 OC#0_3
* R92 ce35d80h140 2 REF1 REF2 5 USBVCC2
+/-5% C98 5.1K
C0603 R0603
*
0.1uF +/-5%
R0603
C0603
4 4
X_SRV05-4.TCT
R447
F6 0 R1206
*
USBVCC4 USBVCC3
5VDUAL *
X_Fuse 1.5A C573 *R448
X_2.7K
C600 +/-5%
REAR PANEL USB CONNECTOR FOR USB PORT 2,3
* X_1000uF
6.3V, +/-20%
+/-5%
R0603 * X_1uF
ce35d80h140 C0603
OC#4_7
C529
X_0.1uF
* *R445
X_5.1K co_lay for TF SPEC 17 USB3+ 1
U10
2 SBD3+
SBD3+ 26
+/-5%
C0603 R0603 12/2/05 Swain Xu 4 3 SBD3-
17 USB3- SBD3- 26
X_Common Choke 90 Ohm_2L
U11
FRONT PANEL USB CONNECTOR FOR USB PORT 4,5,6,7 1 2 SBD2+
17 USB2+ SBD2+ 26
4 3 SBD2-
U30 17 USB2- SBD2- 26
1 2 SBD4- X_Common Choke 90 Ohm_2L
17 USB4- USBVCC2
4 3 SBD4+ C35
17 USB4+
* 1nF
****
X_Common Choke 90 Ohm_2L USBVCC3 R89 R0603 0 +/-5%
17 USB5+ 1
U29
2 SBD5+ F_USB1 *
C516
1nF
R90
R87
R0603
R0603
0
0
+/-5%
+/-5%
C0603
1 2 C0603 R88 R0603 0 +/-5%

4 3 SBD5- SBD5- 3 4 SBD4-
17 USB5- SBD5+ SBD4+
5 6
X_Common Choke 90 Ohm_2L C995 C987 7 8
50V, X7R,
50V,
+/-10% * *
4.7nF 4.7nF
X7R, +/-10%
X 10 OC#4_7
C993C996
****
3
R426R0603
R425R0603
0
0
+/-5%
+/-5%
C0603 C0603
DummyDummy
Header_2X5_9
50V, 50V,
X7R, X7R,
+/-10% **
4.7nF4.7nF
+/-10% 3
R428R0603 0 +/-5% C0603C0603
R427R0603 0 +/-5% DummyDummy
REAR PANEL USB CONNECTOR FOR USB PORT 0,1
USBVCC3 U5
U31
C924 SBD0+ 1 6 SBD0-
I/O1 I/O4
* 4.7uF
10V, Y5V, +80%/-20%
U12 2 REF1 REF2 5 USBVCC2
C0805 2 5 USBVCC3 1 2 SBD0+
Dummy REF1 REF2 17 USB0+ SBD1+ SBD1-
3 I/O2 I/O3 4
SBD4+ 3 4 SBD4- 4 3 SBD0-
I/O2 I/O3 17 USB0-
X_Common Choke 90 Ohm_2L X_SRV05-4.TCT
X_SRV05-4.TCT
U8
1 2 SBD1+
U32 17 USB1+
1 2 SBD7+ 4 3 SBD1-
17 USB7+ 17 USB1-
4 3 SBD7- X_Common Choke 90 Ohm_2L
17 USB7-
X_Common Choke 90 Ohm_2L
****
U33 USBVCC4 R62 R0603 0 +/-5%
SBD6-
17 USB6- 1 2
F_USB2 * C534
1nF
R75
R86
R0603
R0603
0
0
+/-5%
+/-5%
4 3 SBD6+ 1 2 C0603 R97 R0603 0 +/-5%
17 USB6+ SBD7- SBD6-
3 4
X_Common Choke 90 Ohm_2L SBD7+ 5 6 SBD6+ NEAR USB CONNECTOR
7 8
C906 C907 X 10 OC#4_7
****
R457R0603
R456R0603
0
0
+/-5%
+/-5% 50V, X7R,
50V,
+/-10% * *
4.7nF 4.7nF
X7R, +/-10% Header_2X5_9
C908C909
4.7nF4.7nF
**
USBVCC2
C63
R459R0603
R458R0603
0
0
+/-5%
+/-5%
C0603 C0603
DummyDummy
50V, 50V,
X7R, X7R,
+/-10%
C0603
+/-10%
C0603 * 1nF for RS
10
11
DummyDummy C0603 USB
2 2
8
U34
SBD1+ 7
SBD7+ 1 6 SBD7-
I/O1 I/O4 SBD1- 6
TOP
2 5 USBVCC4
REF1 REF2 USBVCC2 5
SBD6+ 3 4 SBD6-
I/O2 I/O3
X_SRV05-4.TCT 4
BOTTOM
SBD0+ 3
SBD0- 2
1
C916 USBVCC4
* 4.7uF
10V, Y5V, +80%/-20%
C0805 USBX2
12
Dummy
1
Add 10 pcs cap (dummy) 1
FOXCONN PCEG
Title
USB Connectors
C K8M890M01 A

E D C B A
8 7 6 5 4 3 2 1
R810
R0805
VCC5_SB
2.2 *
+12V
VDDNB VCC3
VCC_DDR
For EMI
http://www.bufanxiu.com VDDA_25
1
C937+/-5% VCC3
0.1uF
* D66 D13 C660 0.1uF
***
C0603 1N4148W 1N4148W +9V_SB C0603 25V, Y5V, +80%/-20%
C669 0.1uF C735
* C606
*C536
*
C603
*
C734
* * C358
* C618
C0805
VCC_PWM C0603 25V, Y5V, +80%/-20% 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF C443
* 0.1uF 1uF
2
C919
C668 0.1uF C0603 C0603 C0603 C0603 C0603 0.1uF C0603
1uF
* C926 C0603 25V, Y5V, +80%/-20% 16V, X7R, +/-10% 16V, X7R, +/-10% 16V, X7R, +/-10% C0603 C0603
VDDA_DRV
VDDA_SEN
* 1uF 16V, X7R, +/-10% 16V, X7R, +/-10%
VLDT_DRV
VLDT_SEN
LR2_DRV
LR1_DRV
LR1_SEN
C0805
D D
VCC_DDR
C981
ADD
* C980
* 1uF
* C982 C983
*
C984
*
C985
*
36
35
34
33
32
31
30
29
28
27
26
25
U36 1uF Reserved 1uF 0.1uF 0.1uF 0.1uF VCC5_SB
DUMMY R856 dummy C0603 C0603 C0603 C0603 C0603
LR2_DRV
LR1_DRV
VSB5V
CP
VDDA_DRV
VLDT_DRV
C1
C2
LR1_SEN
GND
VDDA_SEN
VLDT_SEN
dummy
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
VCC3_SB
dummy
* C622
10uF
C637
0.1uF *
VCC3_SB C0603 16V, Y5V, +80%/-20% 10V, Y5V, +80%/-20% C0603
LR2_SEN 37 24 C613 0.1uF Q33 C0805 16V, X7R, +/-10%
*
LR2_SEN SS
r0603h6 +/-5%
R856
VDUAL3V_SEN 38 23 4.7K R635VCC3 R356
VDUAL3V_DRV VDUAL3V_SEN VTT_OPS r0603h6+/-5% dummy
* VSUSNB
39 VDUAL3V_DRV GND 22 VCC3_SB 2 VIN VOUT 3 VSUSNB 200
VCCGATE 40 21
VCCGATE VRAM_UGATE VRAM_UGATE 25
41 20
GND
USBGATE VRAM_LGATE VCC_PWM VRAM_LGATE 25
X_4.7K
DUALGATE 42
43
DUALGATE
GND
TIGER ONE VCC_PWM
VRAM_OPS
19
18 VRAM_OPS 25
C920
0.1uF
* * C415
1uF
* C417 C405
44 17 C0603 C0603 RT9166A-15CXL 1uF R378
* 1uF
1
19 RSMRST# RSMRST# VRAM_FB VRAM_FB 25 C0603 dummy
* Reserved
5,10,16,19,22 ALL_PWRGD 45 PWOK COMP 16 390
46 15 VDDA_SEN VCC3_SB
dummy R861 4.7K VCC3V VTT_FB
VCC3 47 TURBO1# VTT_PWM 14
r0603h6 +/-5% 48 13 R480 2.2 VCC5_SB
*
R552 10K FAULT#/TURBO2# VSB5V r0603h6 +/-5%

+12V
A
PS_ONOUT#
R0603 +/-5% CHECK
VCORE_GD
VCORE_EN
5VDUAL
PS_ONIN#
VCC3 R633 4.7K C570 1N4148W D10 VCC5
PWOKIN
r0603h6 +/-5%
*0.1uF Q39 dummy dummy
*R405
SDATA
VREF
SCLK
PLED
SLED
C0603 49.9
GND
S5#
C930
* * R557 VCC3 R560 4.7K
VCC3_SB
dummy 2 3 dummy +2.5V_SB +/-1% C130 C644
C
VIN VOUT
0.1uF
C0603
3.9K
+/-5%
r0603h6 +/-5% R0603 +2.5V_SB * 1000uF
6.3V, +/-20%
* 1000uF
6.3V, +/-20%
GND
1
2
3
4
5
6
7
8
9
10
11
12
R0603
惠DUMMY
VCC3
R570 4.7K
PWR_OK * C458
1uF * C440
10uF * *R411
200 C465
16V, Y5V, +80%/-20%
1uF
r0603h6 +/-5% DELETE R575,R574 C0603 RT9166A-25PXL 10V, Y5V, +80%/-20% +/-1% 10uF
1
C962
14,22,31 PS_ON# * C0805 R0603
C0805
C0603
22 ATX_PS_ON* 10V, Y5V, +80%/-20%
C C
18 SLP_S5# VRM_GD 6,22

5,12,18,20,26 SMBCLK
5,12,18,20,26 SMBDATA VRM_EN 6 5VDUAL
22 PLED VCC3_SB
22 SLED
22 PWR_OK
PWR_OK * C452
1uF * C636
X_0.1uF* C90
X_0.1uF
C0603 C0603 C0603
* C616
1uF * C383
*
X_0.1uF
C543
X_0.1uF
C0603 C0603 C0603
5VDUAL VCC3
VCC3 VCC5_SB
C939 C972 VDDA_DRV
* 4.7uF
*
0.1uF
10V, Y5V, +80%/-20% C0603 R838
*
C933
4.7uF C963
VCC5
VCCGATE
C0805 * 6.8K C977 * 1000uF
D
PHD45N03LTA +/-5%
* 4.7uF C0805 6.3V, +/-20% PHD45N03LTA PHD45N03LTA
D
S
Q51 G VCCGATE R0603 R872 10V, Y5V, +80%/-20% PHD45N03LTA
*
S
PHD45N03LTA 2.2 Q75 C0805 G
VDUAL3V_DRV G C960 +/-5% DUALGATE G G G
Q47
VCC3 470pF
50V, X7R, +/-10% * R0805 G
2N7002 PHD45N03LTA
S
VDUAL3V_SEN C0603 VDDA_25 VDDA_25 Q77 Q771

VCC3_SB
S
D
C214 Q45 Q12 5VDUAL
D
C621 C943 * 1000uF
*
* 1000uF
6.3V, +/-20% *0.1uF
C0603
6.3V, +/-20% VDDA_SEN R832
R0603
215
+/-1% C612 C938
B
R837 C940 C925 * 1000uF
*0.1uF B
100
+/-1% C932 C917 * 22uF
6.3V, Y5V, +80%/-20% C488
6.3V, +/-20% C0603
1
r0603h6 10uF
16V, X7R, +/-10% * * 4.7uF C1206
10V, Y5V, +80%/-20% *
0.1uF
C0603
* 100uF
16V, +/-20%
+3.3V_DUAL C1206 C0805 CE20D50H110
2
5VDUAL
VDDA
VCC3
惠瞒爵环翴惠絋粄DIODE溃
Q68
S
PHD45N03LTA
G
VCC3
VCC3 VCC3 LR2_DRV
D
LR1_DRV VLDT_DRV
惠 MIL R842
*R808 *R869 * 6.8K C400 C915

6.8K 6.8K C806 +/-5%
* 0.1uF
* 4.7uF
D
+/-5%
*R965 C966 C464 +/-5%
*
4.7uF R0603
*R816 C0603 10V, Y5V, +80%/-20%
D
R0603 2.2
+/-5%
Q35
* 4.7uF * 1000uF
6.3V, +/-20%
R0603
* R384
2.2 Q38
10V, Y5V, +80%/-20%
C0805 C950
2.2
+/-5%
C0805
Dummy
C928
470pF
*
R0805
G
C0805 C967
470pF
*
+/-5%
R0805 G
PHD45N03LTA 470pF
50V, X7R, +/-10% * R0805 G
Q41
50V, X7R, +/-10% 50V, X7R, +/-10% C0603 PHD45N03LTA
S
C0603 PHD45N03LTA C0603 +1.2V_HT
S
VDDNB CO-LAY TO263 LR2_SEN R802 120 +2.5V

A LR1_SEN R800 120 VDDNB VLDT_SEN R870 120 +1.2V_HT r0603h6 +/-1% A
r0603h6 +/-1% r0603h6 +/-1%
*R811 C671 C446

*R807 C434 C296 *R839
160 C527 C968 C504
1
160 C437
**
C438 C380
* * 0.1uF 10uF 240
*
C431 C912
* 10uF
* 0.1uF +/-1% 10uF
** 4.7uF* 1000uF C929
+/-1% 1000uF
R0603 6.3V, +/-20%
1000uF
6.3V, +/-20% * 4.7uF
10V, Y5V, +80%/-20% C1206
+/-1%
R0603
1000uF
6.3V, +/-20% * 4.7uF
10V, Y5V, +80%/-20% C1206
C0603
16V, Y5V, +80%/-20%
R0603 16V, X7R, +/-10%
C1206 C0805
6.3V, +/-20%
* 0.1uF
C0603
2
C0805 dummy C0805 dummy Dummy
10V, Y5V, +80%/-20% C0603 10V, Y5V, +80%/-20%
VDDNB 16V, Y5V, +80%/-20% 1.2VHT_VLDT +2.5V FOXCONN PCEG

Title
ACPI controller
C K8M890M01 A

8 7 6 5 4 3 2 1
5 4 3 2 1
VCC3
*
C265
X_0.1uF
*
C503
X_0.1uF
*
C259
X_0.1uF
*
C184
X_0.1uF
*
C324
X_0.1uF
*
C422
X_0.1uF
*
C670
X_0.1uF
* C211
C0603 C0603 C0603 C0603 C0603 C0603 C0603 0.1uF
C0603
Audio EMI
VCC3 VCC5
VCC_DDR
C656 C659
C663 X_0.1uF J2 J1 0.1uF X_0.1uF
*
D D
C602 X_0.1uF C0603 1 1
*
C0603 2 2 VCC3
X_Header_1X2 X_Header_1X2
C662 X_0.1uF
*** ***
C0603
C547 X_0.1uF C655 X_0.1uF USB Cross moat EMI caps
* *
C0603 C0603
C653 X_0.1uF
C546 X_0.1uF C0603
C0603
C357 X_0.1uF C189 X_0.1uF
*
C0603 C0603
PWRBTIN 18,22
C1 X_0.1uF
VCC3_SB C0603
C608 * X_0.1uF C664 0.1uF C643
C0603 C0603 C0603 0.1uF
0.1uF
* C112 C132 X_0.1uF
*
C0603 PS_ON# 14,22,30
C649 X_0.1uF C611

*
VCC5 C0603 X_0.1uF
C633 X_0.1uF
*
VCC5 C0603
C0603 C0603
X_0.1uF X_0.1uF
* C86 C159 * C777 C652 X_0.1uF
*
X_0.1uF C0603
C C
VCC5 C123 X_0.1uF

*
C0603 C0603
X_0.1uF
* C80
FRONT AUDIO HEADER @ALC653
*
C654 X_0.1uF R5 1.5K +5VA
*
C0603 R541=2.2K @653 R0603 +/-5%

R541=0 @880 C18
Q1
* 4.7uF
**
C657 X_0.1uF C673 X_0.1uF 2 R20 4.7K @ALC880 10V, Y5V, +80%/-20%
* *
VCC5 VCC3 VCC5

*
C0603 C0603 3 R0603 +/-5% C1206 VCC3

28 MIC2-VREFO
1 R36 4.7K @ALC880 R35 R34 Dummy
C666 X_0.1uF @ALC880 R0603 +/-5% 4.7K 4.7K
C0603 BAT54A +/-5%
** +/-5%
FMIC1 28
R0603 R0603 R94 R105
**
C8 100uF R33 2.2K @ALC653 Dummy 0 100K
28 MIC2-L
** **
CE20D50H110 16V, +/-20% @ALC880 R0603 +/-5%

* +/-5%
* +/-5%
C78 100uF R37 0 F_AUDIO1 R0603 R0603
28 MIC2-R
CE20D50H110 16V, +/-20% @ALC880 R0603 +/-5% 1 2 @ALC653 @ALC880
@ALC880 3 4
FMIC2 28
**
**
C117 100uF R603 0 5 6 R41 0
28 LINE2-R AUD-RET-R 28
CE20D50H110 16V, +/-20% @ALC880 R0603 +/-5% 28 FRONT-IO-SENSE 7 X R0603 +/-5% @ALC653
C116 100uF R604 @ALC880
0 9 10 R61 0
28 LINE2-L AUD-RET-L 28
CE20D50H110 16V, +/-20% @ALC880 R0603 +/-5% R0603 +/-5% @ALC653
@ALC880 Header_2X5_8
R81
@ALC880 39.2K * *R44
20K
**
Q4 R29 4.7K Place near AUDIO header +/-1% +/-1% SPDIF_OUT
2 R0603 +/-5% R0603 R0603
28 LINE2-VREFO 3
1
R42
R0603
4.7K
+/-5%
@ALC880 @ALC880
* C106
0.1uF
@ALC880 C33 C23 @ALC880 16V, Y5V, +80%/-20%
B
BAT54A 4.7nF
50V, X7R, +/-10% ** 4.7nF
50V, X7R, +/-10%
C0603
Dummy B
C0603 C0603
Dummy Dummy F_AUDIO1_5-1 F_AUDIO1_9-1
** SPDIF Header
R23 22 SPDIF_OUT
28 AUD-FRONT-R
R0603 +/-5% @ALC653
PLACE NEAR SPDIF HEADER & POP CHANGE TO 470pF
R43 22 Jumper_2P-Blue Jumper_2P-Blue 1 VCC5
28 AUD-FRONT-L 1
R0603 +/-5% @ALC653
@ALC653 @ALC653 3 SPDIF_OUT
3 SPDIF_OUT 28
4 4
Header_1X4_2
Optics Orientation Holes
FD3 FD6 FD4 FD2 FD1 FD5
Optics Optics Optics Optics Optics Optics
Mounting Holes
A A
MH1 MH3 MH2 MH4 MH6 MH5

1 5 1 5 1 5 1 5 1 5 1 5
2 (NPTH) 6 2 (NPTH) 6 2 (NPTH) 6 2 (NPTH) 6 2 (NPTH) 6 2 (NPTH) 6
3 7 3 7 3 7 3 7 3 7 3 7
MH MH MH MH MH MH
4
9
8
4
9
8
4
9
8
4
9
8
4
9
8
4
9
8
FOXCONN PCEG
Title
EMI PART & Front Audio
C K8M890M01 A

5 4 3 2 1
5 4 3 2 1
6.DUMMY PART
CHECK WITH THOMAS BOM
D D
CHECK OVER CPU VOLTAGE BOM VALUE:R300,R301,R302,R303,R304
CHECK CHANGE REASON:C688,C689,C693,C718,C753,C736
CHECK FAB A DUMMY PART

CHECK V1.0 DUMMY PART
C
CHANGE EMI SOLUTION TO BOM ,,CHANGE SI BUG TO BOM C
B B
A A
Title
Change List

C K8M890M01 A

5 4 3 2 1

Foxconn n15235 K8t890m2aa-Rs2h. Foxconn n15235 K8t890m2aa-Rs2h

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1

SIO IT8716-CX / DX 23 Main Memory:

Date: Friday, August 04, 2006 Sheet 1 of 32

Block Diagram(Micro ATX) http://www.bufanxiu.com

PCI-E x16 PCI-E x16 SLOT x1

K8M890CE PCI-E x1 PCI-E x1 SLOT x1

IDE BUS IDE X2

AC97/Azalia AC97/HD VT8237R_Plus PCI BUS PCI SLOT X2

PCI 1394A LPT PORT

Date: Friday, August 04, 2006 Sheet 2 of 32

Intel LG775 Processor PROCESSOR VCCP

North Bridge DCLKI

1.5V VREG NORTH BRIDGE AGP

NORTH BRIDGE +1.5V

DDRI/II DIMM Slot1~4 NORTH BRIDGE RESUME 1.5V_SB

PCI CLK 2.5VSB VREG SOUTH BRIDGE RESUME 2.5V_SB

SOUTH BRIDGE RESUME VCC3_SB

LAN VCC3_SB , 2.5V

B PCI CLK LPC BIOS 3.3V B

Date: Friday, August 04, 2006 Sheet 3 of 32

Date: Friday, August 04, 2006 Sheet 4 of 32

cpu nb dampping check value & layout location

C195 56pF 14MHZX1 6 R0603

50V, NPO, +/-5% XTAL 14.31818MHz 5 FS1 +/-5% 8p4r0603h7

C196 56pF 14MHZX2 7 23 48MHZSEL R219 22+/-5% R0603

C0603 50V, NPO, +/-5% X2 SEL24_48#/24_48MHz

200.00 100.00 66.67 33.33

Date: Friday, August 04, 2006 Sheet 5 of 32

12V_VIN L21 Choke 1.1uH 12V_VRM

25V, Y5V, +80%/-20% 25V, Y5V, +80%/-20% C0603

C0603 50V, X7R, +/-10% C0603

R0603 0.1uF R0603

C241 R225 100 +/-5% OVL UGATE2/PWM3 R0805 AOD436

R230 1.8K Q17 Q16 2.2 600nH@100KHz

C239 0.1uF 16 17 R126 0 +/-5% G G R0805 6.3V, +/-20% 6.3V, +/-20%

R227 13.3K R214 24K +/-1% C1206

OVL Orig 47nF Y5V Orig 33K

*R300 R301 R302

VCORE over VID CKT

Date: Friday, August 04, 2006 Sheet 6 of 32

HyperTransport Net Naming Convention

Date: Friday, August 04, 2006 Sheet 7 of 32

Date: Friday, August 04, 2006 Sheet 8 of 32

Date: Friday, August 04, 2006 Sheet 9 of 32

& Debug Interfaces

C362 dummy C349 C339 C338

16V, NPO, +/-5%

10V, X7R, +/-10%

1K Q26 VCC_DDR CPU_M_VREF_SUS

VID1 should be pulled up to VDDIO for compatibility with

6-bit VID Implementation: * C800

L30 RSVD4 RSVD19 AL4

RSVD15 RSVD37 CPU_VDD_RUN_FB_L TP2004

U58D r0603h6 C0603 C0603

SN74LVC00APWR GND M2- 3 MISC

Size Document Number Rev

Date: Friday, August 04, 2006 Sheet 10 of 32

VLDT_RUN_B is connected to the VLDT_RUN power

10V, Y5V, +80%/-20%

6.3V, X5R, +/-10%

6.3V, X5R, +/-10%

6.3V, X5R, +/-10%

6.3V, X5R, +/-10%

************** * ***