LAB REPORT

Digital Logic Design

Course Code: CSE215

Submitted to,
Ms. Tania Akter Setu
Lecturer, Dept. of CSE, UITS

Submitted by,
Name : Md. Mostofa Kamal
ID : 0432310005101079
Program Name : B.Sc
Department : CSE
Semester : Spring
Section : 3B2
Batch : 53

Submission Date: 20-05-2024

 INDEX

Experimen
Experiment Name Pages
t No

1 Study of BASIC Gates

2 Universal Gates

Study of Full and Half Adder and Subtactor

3
using Gates

4 Study of Full and Subtactor using Gates

5 Study of Multiplexer

6 Study of Demultiplexer