The Islamia University of Bahawalpur

University College of Engineering & Technology

ELEN-01316 Digital Logic Design (3rd Semester)

LAB EXPERIMENT NO.11

Name: Roll No:

To Design and Implement RS Latch

PEFORMANCE OBJECTIVES

Upon successful completion of this experiment, the student will be able to know
 The basic operation of RS Latch.
 Verify the truth table of RS Latch.

EQUIPMENT REQUIRED

 Digital trainer with adapter

 NAND gate (7420)
 NOR gate (7425)

DISCUSSION

 Latch

The memory element used without clocked sequential circuits are

called flip-flop. These circuits are binary cells capable of storing one bit of
information. A latch circuit has two outputs, one for the normal value and one for
the complement value of the bit stored in it. The cross coupled connection from
the output of one gate to the input of the other gate constitutes a feedback path.

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CIRCUIT DIAGRAM

Figure (a) SR Latch Circuit with NOR gates

Figure (b) SR Latch Circuit with NAND gates

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PRELIMINARY PROCEDURE

 Connect the circuit as shown in figure (a).

 Apply Vcc +5V to NOR gate IC. Verify its NOR operation by applying logic
0 and logic 1.
 Apply the inputs for RS Latch and fill the table for NOR gate RS Latch.
 Apply Vcc +5V to NOR gate IC. Verify its NOR operation by applying logic
0 and logic 1.
 Apply the inputs for SR flip flop and fill the table for NAND gate RS Latch.

TASK 1;

R
S (Set) Q Q Remarks
(Reset)
1 0 1 0 -----
0 0 1 0 After S=1;R=0
0 1 0 1 -----
0 0 0 1 After S=0;R=1
1 1 0 0 Forbidden
Table for NOR SR Latch

TASK 2;
R
S (Set) Q Q Remarks
(Reset)
1 0 0 1 -----
1 1 0 1 After S=1;R=0
0 1 1 0 -----
1 1 1 0 After S=0;R=1
0 0 1 1 Forbidden
Table for NAND SR Latch

TEST RSULTS/OBSERVATIONS

___________Results were verified________________________________

_____________________________________________________________________

_____________________________________________________________________

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  Define latching?

An electronic circuit which has two stable states and thereby can store one bit
of information.

 With how many devices latch is stable device?

Latch is stable device with how two devices.

 Why latch are called the memory device and how many data it can store?

Storage elements that operate with signal levels (rather than signal
transitions) are referred to as latches. And it is capable to store two bits.

 How many types of latch are and name them?

Two types of latches are: SR-Latch & D-Latch

Critical Analysis / Conclusion

Lab Assessment

Pre Lab /1
Performance /5
/25
Results /5
Viva /5
Critical Analysis /9
Instructor Signature and Comments

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