1.

Silicon is doped with 5*1016 arsenic atoms/cm3 at room temperature to produce an extrinsic
semiconductor material. The charge carriers mobility is µ=1250cm2/v-s. Given Eg (si) =1.1ev,
B(si)=5.23*1015cm-3 K-3/2, K=1.38*10-23JK-1, qe=1.6*10-19C. Is the material N-type or P-type?
And how much is the electric field required to establish a drift current density of J=160A/cm2?
A. P-type, E=0.1 v/cm
B. P-type, E=16 v/cm
C. N-type, E=0.1 v/cm
D. N-type, E=16 v/cm
2. From the following semiconductor diodes, which one of the following operates in forward bias
only?
A. LED
B. Zener
C. Photodiode
D. None of the above
3. In full-wave rectification, if the input frequency is 50 Hz then output frequency will be
A. 50 Hz
B. 100 Hz
C. 200 Hz
D. 400 Hz
4. The current I3 for the silicon diode network shown in the circuit below is

A. 3.11mA B.0.21mA C. 3.32mA D. 6.22mA

5. A BJT has an Early voltage of 80v. If the collector current is 0.6mA at a collector emitter
voltage of 2v, what will be the value of collector current at VCE=5v.
 A. 0.62mA B. 1.5mA C. 6mA D.3mA
6. If A three-stage amplifiers has ideal individual stages with gains of 3 dB, 5 dB and 4 dB
respectively, then the total gain in dB scale will be;
A. 60 dB B. 5 dB C. 4 dB D. 12 dB

7. In a properly-biased NPN transistor, most of the electrons from the collector

A. Recombine with holes in the base B. Recombine in the collector itself

C. Pass through the base to the emitter D. Are stopped by the junction barrier.

8. For a particular application you are supposed to use N-MOSFET (M1) as a current source, P-
MOSFET (M2) as a load resistor and NPN-BJT (Q) as an amplifier. In which region of
operation should this transistors, M1, M2 and Q respectively biased?
A. Saturation, saturation, and Forward active mode.
B. Saturation, Triode with very low |𝑉DSQ | and Forward active mode.
C. Triode, Triode with high |𝑉DSQ | and Forward active mode.
D. Saturation, Triode with high |𝑉DSQ | and Forward active mode
E. All in saturation.
9. For a square low MOS device to be fabricated in 0.5µm CMOS technology, which of the
parameter(s) is/are under the circuit designer’s control. Neglect body effect.
A. W, L, Cox, and Vth
B. W, L, and Vth
C. W and L
D. Only W
10. For an enhancement MOS transistor, all of the following are true EXCEPT
A. For VGS ≥ Vtn and VDS > 0, channel potential decreases as we go from source to drain.
B. For VGS ≥ Vtn and VDS > 0, channel charge density decreases as we go from source to drain
C. The small signal model of NMOS and PMOS devices is identical.
D. MOS device always turns “ON” in “Saturation Mode” if VDS>0.
E. C and D