Totally Integrated

Automation Portal

kanza-chaimae-reda1 / PLC_1 [CPU 315F-2 PN/DP] / Program blocks

Block_2 [FB3]
Block_2 Properties
General
Name Block_2 Number 3 Type FB Language GRAPH
Numbering Automatic Network lan‐ LAD
guage
Information
Title Author Comment Family
Version 0.1 User-defined ID

Block_2
Name Data type Offset Default value Accessible Writ‐ Visible in Setpoint Supervi‐ Comment
from able HMI engi‐ sion
HMI/OPC from neering
UA/Web API HMI/
OPC
UA/W
eb
API
Input
OFF_SQ Bool 0.0 false False False False False Turn sequence off
INIT_SQ Bool 0.1 false False False False False Set sequence to initial state
ACK_EF Bool 0.2 false False False False False Acknowledge all errors and
faults
S_PREV Bool 0.3 false False False False False Output previous step in pa‐
rameter S_NO
S_NEXT Bool 0.4 false False False False False Indicate next step in parame‐
ter S_NO
SW_AUTO Bool 0.5 false False False False False Automatic mode
SW_TAP Bool 0.6 false False False False False Semiautomatic/switch with
transition
SW_TOP Bool 0.7 false False False False False Semiautomatic/ignore transi‐
tion
SW_MAN Bool 1.0 false False False False False Manual mode
S_SEL Int 2.0 0 False False False False Select step to be output to
S_NO
S_ON Bool 4.0 false False False False False Activate step indicated in
S_NO
S_OFF Bool 4.1 false False False False False Deactivate step indicated
S_NO
T_PUSH Bool 4.2 false False False False False Enable transition to switch in
semi automatic mode
Output
S_NO Int 6.0 0 False False False False Step number
S_MORE Bool 8.0 false False False False False More steps are available and
can be shown in S_NO
S_ACTIVE Bool 8.1 false False False False False Step indicated in S_NO is ac‐
tive
ERR_FLT Bool 8.2 false False False False False Interlock or supervision group
error
AUTO_ON Bool 8.3 false False False False False Automatic mode is active
TAP_ON Bool 8.4 false False False False False Semiautomatic mode/step
with transition enabled
TOP_ON Bool 8.5 false False False False False Semiautomatic mode/ignore
transition enabled
MAN_ON Bool 8.6 false False False False False Manual mode is active
InOut
Static
Trans1 GraphTransition 44.0 False False False True Transition structure
TV Bool 44.0 false False False False False Transition is valid
TT Bool 44.1 false False False False False Transition is satisfied
TS Bool 44.2 false False False False False Transition switches
CF_IV Bool 44.3 True False False False False The CRIT_FLT entry is invalid
TNO Int 46.0 1 False False False False Indicates the user-defined
transition number
CRIT DWord 48.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements of the tran‐
sition in the current process‐
ing cycle
CRIT_OLD DWord 52.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements of the tran‐
sition in the previous process‐
ing cycle
CRIT_FLT DWord 56.0 16#0 False False False False Copy of CRIT if an error occurs
Trans2 GraphTransition 60.0 False False False True Transition structure
TV Bool 60.0 false False False False False Transition is valid
TT Bool 60.1 false False False False False Transition is satisfied
TS Bool 60.2 false False False False False Transition switches
CF_IV Bool 60.3 True False False False False The CRIT_FLT entry is invalid
TNO Int 62.0 2 False False False False Indicates the user-defined
transition number
 Totally Integrated
Automation Portal

Name Data type Offset Default value Accessible Writ‐ Visible in Setpoint Supervi‐ Comment
from able HMI engi‐ sion
HMI/OPC from neering
UA/Web API HMI/
OPC
UA/W
eb
API
CRIT DWord 64.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements of the tran‐
sition in the current process‐
ing cycle
CRIT_OLD DWord 68.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements of the tran‐
sition in the previous process‐
ing cycle
CRIT_FLT DWord 72.0 16#0 False False False False Copy of CRIT if an error occurs
Trans3 GraphTransition 76.0 False False False True Transition structure
TV Bool 76.0 false False False False False Transition is valid
TT Bool 76.1 false False False False False Transition is satisfied
TS Bool 76.2 false False False False False Transition switches
CF_IV Bool 76.3 True False False False False The CRIT_FLT entry is invalid
TNO Int 78.0 3 False False False False Indicates the user-defined
transition number
CRIT DWord 80.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements of the tran‐
sition in the current process‐
ing cycle
CRIT_OLD DWord 84.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements of the tran‐
sition in the previous process‐
ing cycle
CRIT_FLT DWord 88.0 16#0 False False False False Copy of CRIT if an error occurs
Trans4 GraphTransition 92.0 False False False True Transition structure
TV Bool 92.0 false False False False False Transition is valid
TT Bool 92.1 false False False False False Transition is satisfied
TS Bool 92.2 false False False False False Transition switches
CF_IV Bool 92.3 True False False False False The CRIT_FLT entry is invalid
TNO Int 94.0 4 False False False False Indicates the user-defined
transition number
CRIT DWord 96.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements of the tran‐
sition in the current process‐
ing cycle
CRIT_OLD DWord 100.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements of the tran‐
sition in the previous process‐
ing cycle
CRIT_FLT DWord 104.0 16#0 False False False False Copy of CRIT if an error occurs
Trans5 GraphTransition 108.0 False False False True Transition structure
TV Bool 108.0 false False False False False Transition is valid
TT Bool 108.1 false False False False False Transition is satisfied
TS Bool 108.2 false False False False False Transition switches
CF_IV Bool 108.3 True False False False False The CRIT_FLT entry is invalid
TNO Int 110.0 5 False False False False Indicates the user-defined
transition number
CRIT DWord 112.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements of the tran‐
sition in the current process‐
ing cycle
CRIT_OLD DWord 116.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements of the tran‐
sition in the previous process‐
ing cycle
CRIT_FLT DWord 120.0 16#0 False False False False Copy of CRIT if an error occurs
Trans6 GraphTransition 124.0 False False False True Transition structure
TV Bool 124.0 false False False False False Transition is valid
TT Bool 124.1 false False False False False Transition is satisfied
TS Bool 124.2 false False False False False Transition switches
CF_IV Bool 124.3 True False False False False The CRIT_FLT entry is invalid
TNO Int 126.0 6 False False False False Indicates the user-defined
transition number
CRIT DWord 128.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements of the tran‐
sition in the current process‐
ing cycle
CRIT_OLD DWord 132.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements of the tran‐
sition in the previous process‐
ing cycle
CRIT_FLT DWord 136.0 16#0 False False False False Copy of CRIT if an error occurs
Trans7 GraphTransition 140.0 False False False True Transition structure
TV Bool 140.0 false False False False False Transition is valid
TT Bool 140.1 false False False False False Transition is satisfied
TS Bool 140.2 false False False False False Transition switches
CF_IV Bool 140.3 True False False False False The CRIT_FLT entry is invalid
 Totally Integrated
Automation Portal

Name Data type Offset Default value Accessible Writ‐ Visible in Setpoint Supervi‐ Comment
from able HMI engi‐ sion
HMI/OPC from neering
UA/Web API HMI/
OPC
UA/W
eb
API
TNO Int 142.0 7 False False False False Indicates the user-defined
transition number
CRIT DWord 144.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements of the tran‐
sition in the current process‐
ing cycle
CRIT_OLD DWord 148.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements of the tran‐
sition in the previous process‐
ing cycle
CRIT_FLT DWord 152.0 16#0 False False False False Copy of CRIT if an error occurs
Trans8 GraphTransition 156.0 False False False True Transition structure
TV Bool 156.0 false False False False False Transition is valid
TT Bool 156.1 false False False False False Transition is satisfied
TS Bool 156.2 false False False False False Transition switches
CF_IV Bool 156.3 True False False False False The CRIT_FLT entry is invalid
TNO Int 158.0 8 False False False False Indicates the user-defined
transition number
CRIT DWord 160.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements of the tran‐
sition in the current process‐
ing cycle
CRIT_OLD DWord 164.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements of the tran‐
sition in the previous process‐
ing cycle
CRIT_FLT DWord 168.0 16#0 False False False False Copy of CRIT if an error occurs
Trans9 GraphTransition 172.0 False False False True Transition structure
TV Bool 172.0 false False False False False Transition is valid
TT Bool 172.1 false False False False False Transition is satisfied
TS Bool 172.2 false False False False False Transition switches
CF_IV Bool 172.3 True False False False False The CRIT_FLT entry is invalid
TNO Int 174.0 9 False False False False Indicates the user-defined
transition number
CRIT DWord 176.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements of the tran‐
sition in the current process‐
ing cycle
CRIT_OLD DWord 180.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements of the tran‐
sition in the previous process‐
ing cycle
CRIT_FLT DWord 184.0 16#0 False False False False Copy of CRIT if an error occurs
Trans10 GraphTransition 188.0 False False False True Transition structure
TV Bool 188.0 false False False False False Transition is valid
TT Bool 188.1 false False False False False Transition is satisfied
TS Bool 188.2 false False False False False Transition switches
CF_IV Bool 188.3 True False False False False The CRIT_FLT entry is invalid
TNO Int 190.0 10 False False False False Indicates the user-defined
transition number
CRIT DWord 192.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements of the tran‐
sition in the current process‐
ing cycle
CRIT_OLD DWord 196.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements of the tran‐
sition in the previous process‐
ing cycle
CRIT_FLT DWord 200.0 16#0 False False False False Copy of CRIT if an error occurs
Trans11 GraphTransition 204.0 False False False True Transition structure
TV Bool 204.0 false False False False False Transition is valid
TT Bool 204.1 false False False False False Transition is satisfied
TS Bool 204.2 false False False False False Transition switches
CF_IV Bool 204.3 True False False False False The CRIT_FLT entry is invalid
TNO Int 206.0 11 False False False False Indicates the user-defined
transition number
CRIT DWord 208.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements of the tran‐
sition in the current process‐
ing cycle
CRIT_OLD DWord 212.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements of the tran‐
sition in the previous process‐
ing cycle
CRIT_FLT DWord 216.0 16#0 False False False False Copy of CRIT if an error occurs
Trans12 GraphTransition 220.0 False False False True Transition structure
TV Bool 220.0 false False False False False Transition is valid
TT Bool 220.1 false False False False False Transition is satisfied
TS Bool 220.2 false False False False False Transition switches
 Totally Integrated
Automation Portal

Name Data type Offset Default value Accessible Writ‐ Visible in Setpoint Supervi‐ Comment
from able HMI engi‐ sion
HMI/OPC from neering
UA/Web API HMI/
OPC
UA/W
eb
API
CF_IV Bool 220.3 True False False False False The CRIT_FLT entry is invalid
TNO Int 222.0 12 False False False False Indicates the user-defined
transition number
CRIT DWord 224.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements of the tran‐
sition in the current process‐
ing cycle
CRIT_OLD DWord 228.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements of the tran‐
sition in the previous process‐
ing cycle
CRIT_FLT DWord 232.0 16#0 False False False False Copy of CRIT if an error occurs
Step1 GraphStep 268.0 False False False True Step structure
S1 Bool 268.0 false False False False False Step is activated
L1 Bool 268.1 false False False False False interlock leaving state
V1 Bool 268.2 false False False False False Supervision entering state
R1 Bool 268.3 false False False False False Reserved
A1 Bool 268.4 false False False False False Error is acknowledged
S0 Bool 268.5 false False False False False Step is deactivated
L0 Bool 268.6 false False False False False Interlock entering state
V0 Bool 268.7 false False False False False Supervision leaving state
X Bool 269.0 false False False False False Step is active
LA Bool 269.1 false False False False False Interlock is not satisfied
VA Bool 269.2 false False False False False Supervision active
RA Bool 269.3 false False False False False Reserved
AA Bool 269.4 false False False False False Reserved
SS Bool 269.5 false False False False False System-internal
LS Bool 269.6 True False False False False Direct result of the program‐
med interlock
VS Bool 269.7 false False False False False Direct result of the program‐
med supervision
SNO Int 270.0 1 False False False False User step number
T Time 272.0 T#0ms False False False False Total step activation time
U Time 276.0 T#0ms False False False False Step activation time without
disturbance
CRIT_LOC DWord 280.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements in the inter‐
lock in the current processing
cycle
CRIT_LOC_ERR DWord 284.0 16#0 False False False False Copy of CRIT_LOC when the
interlock leaves the state
CRIT_SUP DWord 288.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements in the su‐
pervision in the current pro‐
cessing cycle
SM Bool 292.0 false False False False False System-internal
LP Bool 292.1 false False False False False System-internal
LN Bool 292.2 false False False False False System-internal
VP Bool 292.3 false False False False False System-internal
VN Bool 292.4 false False False False False System-internal
H_IL_ERR Byte 293.0 16#0 False False False False System-internal
H_SV_FLT Byte 294.0 16#0 False False False False System-internal
RESERVED DWord 296.0 16#0 False False False False Reserve
Step2 GraphStep 300.0 False False False True Step structure
S1 Bool 300.0 false False False False False Step is activated
L1 Bool 300.1 false False False False False interlock leaving state
V1 Bool 300.2 false False False False False Supervision entering state
R1 Bool 300.3 false False False False False Reserved
A1 Bool 300.4 false False False False False Error is acknowledged
S0 Bool 300.5 false False False False False Step is deactivated
L0 Bool 300.6 false False False False False Interlock entering state
V0 Bool 300.7 false False False False False Supervision leaving state
X Bool 301.0 false False False False False Step is active
LA Bool 301.1 false False False False False Interlock is not satisfied
VA Bool 301.2 false False False False False Supervision active
RA Bool 301.3 false False False False False Reserved
AA Bool 301.4 false False False False False Reserved
SS Bool 301.5 false False False False False System-internal
LS Bool 301.6 True False False False False Direct result of the program‐
med interlock
VS Bool 301.7 false False False False False Direct result of the program‐
med supervision
SNO Int 302.0 2 False False False False User step number
T Time 304.0 T#0ms False False False False Total step activation time
U Time 308.0 T#0ms False False False False Step activation time without
disturbance
 Totally Integrated
Automation Portal

Name Data type Offset Default value Accessible Writ‐ Visible in Setpoint Supervi‐ Comment
from able HMI engi‐ sion
HMI/OPC from neering
UA/Web API HMI/
OPC
UA/W
eb
API
CRIT_LOC DWord 312.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements in the inter‐
lock in the current processing
cycle
CRIT_LOC_ERR DWord 316.0 16#0 False False False False Copy of CRIT_LOC when the
interlock leaves the state
CRIT_SUP DWord 320.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements in the su‐
pervision in the current pro‐
cessing cycle
SM Bool 324.0 false False False False False System-internal
LP Bool 324.1 false False False False False System-internal
LN Bool 324.2 false False False False False System-internal
VP Bool 324.3 false False False False False System-internal
VN Bool 324.4 false False False False False System-internal
H_IL_ERR Byte 325.0 16#0 False False False False System-internal
H_SV_FLT Byte 326.0 16#0 False False False False System-internal
RESERVED DWord 328.0 16#0 False False False False Reserve
Step3 GraphStep 332.0 False False False True Step structure
S1 Bool 332.0 false False False False False Step is activated
L1 Bool 332.1 false False False False False interlock leaving state
V1 Bool 332.2 false False False False False Supervision entering state
R1 Bool 332.3 false False False False False Reserved
A1 Bool 332.4 false False False False False Error is acknowledged
S0 Bool 332.5 false False False False False Step is deactivated
L0 Bool 332.6 false False False False False Interlock entering state
V0 Bool 332.7 false False False False False Supervision leaving state
X Bool 333.0 false False False False False Step is active
LA Bool 333.1 false False False False False Interlock is not satisfied
VA Bool 333.2 false False False False False Supervision active
RA Bool 333.3 false False False False False Reserved
AA Bool 333.4 false False False False False Reserved
SS Bool 333.5 false False False False False System-internal
LS Bool 333.6 True False False False False Direct result of the program‐
med interlock
VS Bool 333.7 false False False False False Direct result of the program‐
med supervision
SNO Int 334.0 3 False False False False User step number
T Time 336.0 T#0ms False False False False Total step activation time
U Time 340.0 T#0ms False False False False Step activation time without
disturbance
CRIT_LOC DWord 344.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements in the inter‐
lock in the current processing
cycle
CRIT_LOC_ERR DWord 348.0 16#0 False False False False Copy of CRIT_LOC when the
interlock leaves the state
CRIT_SUP DWord 352.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements in the su‐
pervision in the current pro‐
cessing cycle
SM Bool 356.0 false False False False False System-internal
LP Bool 356.1 false False False False False System-internal
LN Bool 356.2 false False False False False System-internal
VP Bool 356.3 false False False False False System-internal
VN Bool 356.4 false False False False False System-internal
H_IL_ERR Byte 357.0 16#0 False False False False System-internal
H_SV_FLT Byte 358.0 16#0 False False False False System-internal
RESERVED DWord 360.0 16#0 False False False False Reserve
Step4 GraphStep 364.0 False False False True Step structure
S1 Bool 364.0 false False False False False Step is activated
L1 Bool 364.1 false False False False False interlock leaving state
V1 Bool 364.2 false False False False False Supervision entering state
R1 Bool 364.3 false False False False False Reserved
A1 Bool 364.4 false False False False False Error is acknowledged
S0 Bool 364.5 false False False False False Step is deactivated
L0 Bool 364.6 false False False False False Interlock entering state
V0 Bool 364.7 false False False False False Supervision leaving state
X Bool 365.0 false False False False False Step is active
LA Bool 365.1 false False False False False Interlock is not satisfied
VA Bool 365.2 false False False False False Supervision active
RA Bool 365.3 false False False False False Reserved
AA Bool 365.4 false False False False False Reserved
SS Bool 365.5 false False False False False System-internal
LS Bool 365.6 True False False False False Direct result of the program‐
med interlock
 Totally Integrated
Automation Portal

Name Data type Offset Default value Accessible Writ‐ Visible in Setpoint Supervi‐ Comment
from able HMI engi‐ sion
HMI/OPC from neering
UA/Web API HMI/
OPC
UA/W
eb
API
VS Bool 365.7 false False False False False Direct result of the program‐
med supervision
SNO Int 366.0 4 False False False False User step number
T Time 368.0 T#0ms False False False False Total step activation time
U Time 372.0 T#0ms False False False False Step activation time without
disturbance
CRIT_LOC DWord 376.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements in the inter‐
lock in the current processing
cycle
CRIT_LOC_ERR DWord 380.0 16#0 False False False False Copy of CRIT_LOC when the
interlock leaves the state
CRIT_SUP DWord 384.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements in the su‐
pervision in the current pro‐
cessing cycle
SM Bool 388.0 false False False False False System-internal
LP Bool 388.1 false False False False False System-internal
LN Bool 388.2 false False False False False System-internal
VP Bool 388.3 false False False False False System-internal
VN Bool 388.4 false False False False False System-internal
H_IL_ERR Byte 389.0 16#0 False False False False System-internal
H_SV_FLT Byte 390.0 16#0 False False False False System-internal
RESERVED DWord 392.0 16#0 False False False False Reserve
Step5 GraphStep 396.0 False False False True Step structure
S1 Bool 396.0 false False False False False Step is activated
L1 Bool 396.1 false False False False False interlock leaving state
V1 Bool 396.2 false False False False False Supervision entering state
R1 Bool 396.3 false False False False False Reserved
A1 Bool 396.4 false False False False False Error is acknowledged
S0 Bool 396.5 false False False False False Step is deactivated
L0 Bool 396.6 false False False False False Interlock entering state
V0 Bool 396.7 false False False False False Supervision leaving state
X Bool 397.0 false False False False False Step is active
LA Bool 397.1 false False False False False Interlock is not satisfied
VA Bool 397.2 false False False False False Supervision active
RA Bool 397.3 false False False False False Reserved
AA Bool 397.4 false False False False False Reserved
SS Bool 397.5 false False False False False System-internal
LS Bool 397.6 True False False False False Direct result of the program‐
med interlock
VS Bool 397.7 false False False False False Direct result of the program‐
med supervision
SNO Int 398.0 5 False False False False User step number
T Time 400.0 T#0ms False False False False Total step activation time
U Time 404.0 T#0ms False False False False Step activation time without
disturbance
CRIT_LOC DWord 408.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements in the inter‐
lock in the current processing
cycle
CRIT_LOC_ERR DWord 412.0 16#0 False False False False Copy of CRIT_LOC when the
interlock leaves the state
CRIT_SUP DWord 416.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements in the su‐
pervision in the current pro‐
cessing cycle
SM Bool 420.0 false False False False False System-internal
LP Bool 420.1 false False False False False System-internal
LN Bool 420.2 false False False False False System-internal
VP Bool 420.3 false False False False False System-internal
VN Bool 420.4 false False False False False System-internal
H_IL_ERR Byte 421.0 16#0 False False False False System-internal
H_SV_FLT Byte 422.0 16#0 False False False False System-internal
RESERVED DWord 424.0 16#0 False False False False Reserve
Step6 GraphStep 428.0 False False False True Step structure
S1 Bool 428.0 false False False False False Step is activated
L1 Bool 428.1 false False False False False interlock leaving state
V1 Bool 428.2 false False False False False Supervision entering state
R1 Bool 428.3 false False False False False Reserved
A1 Bool 428.4 false False False False False Error is acknowledged
S0 Bool 428.5 false False False False False Step is deactivated
L0 Bool 428.6 false False False False False Interlock entering state
V0 Bool 428.7 false False False False False Supervision leaving state
X Bool 429.0 false False False False False Step is active
LA Bool 429.1 false False False False False Interlock is not satisfied
VA Bool 429.2 false False False False False Supervision active
 Totally Integrated
Automation Portal

Name Data type Offset Default value Accessible Writ‐ Visible in Setpoint Supervi‐ Comment
from able HMI engi‐ sion
HMI/OPC from neering
UA/Web API HMI/
OPC
UA/W
eb
API
RA Bool 429.3 false False False False False Reserved
AA Bool 429.4 false False False False False Reserved
SS Bool 429.5 false False False False False System-internal
LS Bool 429.6 True False False False False Direct result of the program‐
med interlock
VS Bool 429.7 false False False False False Direct result of the program‐
med supervision
SNO Int 430.0 6 False False False False User step number
T Time 432.0 T#0ms False False False False Total step activation time
U Time 436.0 T#0ms False False False False Step activation time without
disturbance
CRIT_LOC DWord 440.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements in the inter‐
lock in the current processing
cycle
CRIT_LOC_ERR DWord 444.0 16#0 False False False False Copy of CRIT_LOC when the
interlock leaves the state
CRIT_SUP DWord 448.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements in the su‐
pervision in the current pro‐
cessing cycle
SM Bool 452.0 false False False False False System-internal
LP Bool 452.1 false False False False False System-internal
LN Bool 452.2 false False False False False System-internal
VP Bool 452.3 false False False False False System-internal
VN Bool 452.4 false False False False False System-internal
H_IL_ERR Byte 453.0 16#0 False False False False System-internal
H_SV_FLT Byte 454.0 16#0 False False False False System-internal
RESERVED DWord 456.0 16#0 False False False False Reserve
Step7 GraphStep 460.0 False False False True Step structure
S1 Bool 460.0 false False False False False Step is activated
L1 Bool 460.1 false False False False False interlock leaving state
V1 Bool 460.2 false False False False False Supervision entering state
R1 Bool 460.3 false False False False False Reserved
A1 Bool 460.4 false False False False False Error is acknowledged
S0 Bool 460.5 false False False False False Step is deactivated
L0 Bool 460.6 false False False False False Interlock entering state
V0 Bool 460.7 false False False False False Supervision leaving state
X Bool 461.0 false False False False False Step is active
LA Bool 461.1 false False False False False Interlock is not satisfied
VA Bool 461.2 false False False False False Supervision active
RA Bool 461.3 false False False False False Reserved
AA Bool 461.4 false False False False False Reserved
SS Bool 461.5 false False False False False System-internal
LS Bool 461.6 True False False False False Direct result of the program‐
med interlock
VS Bool 461.7 false False False False False Direct result of the program‐
med supervision
SNO Int 462.0 7 False False False False User step number
T Time 464.0 T#0ms False False False False Total step activation time
U Time 468.0 T#0ms False False False False Step activation time without
disturbance
CRIT_LOC DWord 472.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements in the inter‐
lock in the current processing
cycle
CRIT_LOC_ERR DWord 476.0 16#0 False False False False Copy of CRIT_LOC when the
interlock leaves the state
CRIT_SUP DWord 480.0 16#0 False False False False Status of the maximum 32
LAD/FBD elements in the su‐
pervision in the current pro‐
cessing cycle
SM Bool 484.0 false False False False False System-internal
LP Bool 484.1 false False False False False System-internal
LN Bool 484.2 false False False False False System-internal
VP Bool 484.3 false False False False False System-internal
VN Bool 484.4 false False False False False System-internal
H_IL_ERR Byte 485.0 16#0 False False False False System-internal
H_SV_FLT Byte 486.0 16#0 False False False False System-internal
RESERVED DWord 488.0 16#0 False False False False Reserve
S_DISPLAY Int 580.0 0 False False False False Internal display of output pa‐
rameter S_NO
S_SEL_OLD Int 582.0 0 False False False False Previous value in S_SEL
S_DISPIDX Byte 584.0 16#0 False False False False Index of the step in S_NO
T_DISPIDX Byte 585.0 16#0 False False False False Index of the transition dis‐
played in T_NO
MOP Struct 590.0 False False False False Mode
AUTO Bool 590.0 true False False False False Status: automatic mode
 Totally Integrated
Automation Portal

Name Data type Offset Default value Accessible Writ‐ Visible in Setpoint Supervi‐ Comment
from able HMI engi‐ sion
HMI/OPC from neering
UA/Web API HMI/
OPC
UA/W
eb
API
MAN Bool 590.1 false False False False False Status: manual mode
TAP Bool 590.2 false False False False False Status: semi automatic/switch
with transition
TOP Bool 590.3 false False False False False Status: semi automatic/ignore
transition
ACK_S Bool 590.4 false False False False False Request: acknowledge step at
parameter S_NO
REG_S Bool 590.5 false False False False False Request: register step indica‐
ted in S_NO
T_PREV Bool 590.6 false False False False False Request: output previous valid
transition in T_NO
T_NEXT Bool 590.7 false False False False False Request: output next valid
transition in T_NO
LOCK Bool 591.0 true False False False False Status: interlocks activated
SUP Bool 591.1 true False False False False Status: supervisions activated
ACKREQ Bool 591.2 true False False False False Status: acknowledgment re‐
quired
SSKIP Bool 591.3 false False False False False Status: "Skip steps" enabled
OFF Bool 591.4 false False False False False Request: deactivate all steps
INIT Bool 591.5 true False False False False Request: set sequence to ini‐
tial state
HALT Bool 591.6 false False False False False Status: sequence halted
TMS_HALT Bool 591.7 false False False False False Status: all internal timers held
OPS_ZERO Bool 592.0 false False False False False Status: set all operands pro‐
cessed with N, L, D instruc‐
tions to 0
SACT_DISP Bool 592.1 true False False False False Status: display active steps on‐
ly
SEF_DISP Bool 592.2 false False False False False Status: display only steps with
errors and disrupted steps
SALL_DISP Bool 592.3 false False False False False Status: display all steps
S_PREV Bool 592.4 false False False False False Request: output previous step
to S_NO
S_NEXT Bool 592.5 false False False False False Request: Output next step at
S_NO parameter
S_SELOK Bool 592.6 false False False False False Request: output step number
from S_SEL to S_NO
S_ON Bool 592.7 false False False False False Request: activate step indica‐
ted in S_NO
S_OFF Bool 593.0 false False False False False Request: deactivate step at pa‐
rameter S_NO
T_PUSH Bool 593.1 false False False False False Request: transition switching
enabled
REG Bool 593.2 false False False False False Request: register all interlock
and supervision errors
ACK Bool 593.3 false False False False False Request: acknowledge all in‐
terlock and supervision errors
IL_PERM Bool 593.4 false False False False False Status: permanent processing
of all interlocks
T_PERM Bool 593.5 false False False False False Status: permanent processing
of all transitions
ILP_MAN Bool 593.6 false False False False False Status: permanent processing
of all interlocks in manual
mode
TICKS Struct 594.0 False False False False Clock speeds
DELTA Time 594.0 T#0ms False False False False Time difference between cy‐
cles
OLD Time 598.0 T#0ms False False False False 10 ms clock counter value in
last cycle
NEW Time 602.0 T#0ms False False False False 10 ms clock counter value in
this cycle
SQ_FLAGS Struct 606.0 False False False False Sequence bit memory
ERR_FLT Bool 606.0 false False False False False Interlock and supervision
group error
ERROR Bool 606.1 false False False False False Interlock group error
FAULT Bool 606.2 false False False False False Supervision group error
RT_FAIL Bool 606.3 false False False False False Runtime error
NO_SNO Bool 606.4 false False False False False Requested step number not
found
NF_OFL Bool 606.5 false False False False False Overflow: too many ON or
OFF requests
SA_OFL Bool 606.6 false False False False False Overflow: too many steps ac‐
tive
TV_OFL Bool 606.7 false False False False False Overflow: too many valid tran‐
sitions
MSG_OFL Bool 607.0 false False False False False Overflow: not enough system
resources for ALARM_S
NO_SWI Bool 607.1 false False False False False Do not switch in this cycle
CYC_OP Bool 607.2 false False False False False Cyclic execution of the se‐
quence after initialization
AS_MSG Bool 607.3 true False False False False Alarms during runtime ena‐
bled or disabled by instruction
 Totally Integrated
Automation Portal

Name Data type Offset Default value Accessible Writ‐ Visible in Setpoint Supervi‐ Comment
from able HMI engi‐ sion
HMI/OPC from neering
UA/Web API HMI/
OPC
UA/W
eb
API
AS_SEND Bool 607.4 false False False False False Send alarms from WR_USMSG
or only enter in diagnostics
buffer
SQ_BUSY Bool 607.5 false False False False False Internal edge memory bit for
sequence processing
SA_BUSY Bool 607.6 false False False False False Internal edge memory bit for
sequence processing
AS_SIG Bool 607.7 false False False False False Edge memory bit for alarms
from Alarm_S and Alarm_SQ
Temp
Constant

Alarms
Enable alarms True

Category Category enabler Display class

Error 0
Warning 0
Info 0
Category 4 0
Category 5 0
Category 6 0
Category 7 0
Category 8 0

Category for inter‐ Error Subcategory 1 for in‐ Subcategory 2 for in‐
locks terlocks terlocks

Category for supervi‐ Error Subcategory 1 for su‐ Subcategory 2 for su‐
sions pervisions pervisions

Sequences (1)
1:

T5

T6

T10

T11

T12

T4

S1
Step1

T1 T3 T2 T7 T8 T9
Trans1 Trans3 Trans2 Trans7 Trans8 Trans9

S2 S3 S4 S5 S6 S7
Step2 Step3 Step4 Step5 Step6 Step7
T4 T5 T6 T10 T11 T12
Trans4 Trans5 Trans6 Trans10 Trans11 Trans12

S1 S1 S1 S1 S1 S1