- Voltage on Ocnx pin is output of PWM : needs to be configured as output (DDRx)

- Behavior determined by COMnx1:0 bits

Peripheral Features : ̶ Six PWM Channels

~3

~5
~ 11
~6 ~ 10
~9
WGM00:WGM01=11 CS00:CS02=001
Registres :

• Bits 7:6 – COM0A1:0: Compare Match Output A Mode

• Bits 1:0 – WGM01:0: Waveform Generation Mode

Combined with the WGM02 bit found in the TCCR0B Register,
• Bit 7 – FOC0A: Force Output Compare A
The FOC0A bit is only active when the WGM bits specify a non-PWM mode.
• Bits 2:0 – CS02:0: Clock Select
AnalogWrite(pin, value);
~6 et ~5 : OC0A et OC0B : fréquence ≈ 980 Hz
Fast PWM Mode

Prédiviseur du timer 0 (registre TCCR0B)

1 8 64 256 1024
Mode Fast PWM 62.5 kHz 7.8125 kHz 976.6 Hz 244.1 Hz 61 Hz
Phase Correct 31.3725 kHz 3.9216 kHz 490.2 Hz 122.5 Hz 30.6 Hz
PWM

Phase Correct PWM Mode

16-bit Timer/Counter1 with PWM
Accessing 16-bit Registers
The TCNT1, OCR1A/B, and ICR1 are 16-bit registers
The 16-bit register must be byte accessed using two read or write operations.
Each 16-bit timer has a single 8-bit register for temporary storing of the high byte of the 16-bit
access.
To do a 16-bit write, the high byte must be written before the low byte. For a 16-bit read, the
low byte must be read before the high byte.
...
; Set TCNT1 to 0x01FF
ldi r17,0x01
ldi r16,0xFF
out TCNT1H,r17
out TCNT1L,r16
; Read TCNT1 into r17:r16
in r16,TCNT1L
in r17,TCNT1H
...
Counter Unit
Timer/Counter is the bi-directional and programmable 16-bit register

Signal description (internal signals):

Count Increment or decrement TCNT1 by 1.
Direction Select between increment and decrement.
Clear Clear TCNT1 (set all bits to zero).
clkT1 Timer/Counter clock.
TOP Signalize that TCNT1 has reached maximum value.
BOTTOM Signalize that TCNT1 has reached minimum value (zero).