Professional Documents
Culture Documents
02 Estream.2015.7119493
02 Estream.2015.7119493
V. Maþaitis R. Navickas
Computer Engineering Department Computer Engineering Department
Vilnius Gediminas Technical University Vilnius Gediminas Technical University
Lithuania Lithuania
vytmacaitis@gmail.com romualdas.navickas@vgtu.lt
I. INTRODUCTION
Fig. 1. Block diagram of classical phase-locked loop (PLL).
Over time, wireless technology is improving so rapidly,
that more and more attention is appointed to high
Commonly two types of VCOs: ring oscillators (Ring-
performance, low cost, low power and small area transceivers.
VCOs) and LC oscillators (LC-VCOs) are used in high-
Currently, wireless communications applied to many areas
frequency PLL. The Ring-VCOs take a small area on a chip
such as wireless local area networks (WLAN), Global System
and can provide very wide tuning range but their phase noise
for Mobile Communications (GSM), Global Positioning
performance is very poor when compared to LC-VCOs. LC-
System (GPS) and etc. Transceiver is the main part of the
VCOs can operate in high frequency, but their tuning range is
wireless system and its main function is to receive and
relatively small and on-chip inductors occupy a lot of chip
transmit data. The basic transceiver consists of the following
area.
blocks: low noise amplifier (LNA), power amplifier (PA),
down-conversion mixer, up-conversion mixer, filters and The schematic of basic LC-VCO is shown in Fig. 2. The
frequency synthesizer. In transceivers the phase locked loop LC-VCO consists of the following parts: high-quality inductor
(PLL) is mainly used as the frequency synthesizer. (L), varactors block, switched capacitors block, cross-coupled
transistors (M1, M2) and current control block. The inductor
PLL is a signal control system that generates an output
with varactors and the switched capacitors block form a LC
signal whose phase is comparable to the phase of an input
tank. The negative resistance of the LC-VCO is given by the
signal. The classical PLL consists of five basic components:
transconductance of the cross coupled M1 and M2 NMOS or
phase frequency detector (PFD), charge pump (CP), low pass
PMOS transistors. They generate the negative resistance to
filter (LPF), voltage-controlled oscillator (VCO), and
cancel the loss in the LC tank so that the circuit can enable
frequency divider (÷N), as shown in Figure 1 [1] further. The
sustained oscillation.
PFD detects the difference in frequency and phase between the
FREF and feedback FDIV inputs and generates an UP or DN
control signal based on whether the feedback frequency is A. Switched Capacitor Block
lagging or leading the FREF frequency. If the CP receives an First, confirm that you have the correct template for your
UP signal, current is driven into the LPF filter. If the CP Frequency calibration is consisted by two steps of fine tuning
receives a DN signal, current is drawn from LPF. In next and coarse tuning to widen the operating frequency range. The
operation LPF converts these signals to a control voltage that coarse tuning is obtained using the switched capacitor block.
is used to control the VCO. Therefore, the principle of A switched capacitor block is used in classic design. The
operation is as follow: if the PFD generates an UP signal, then block consists of capacitors arrays connected in parallel,
the VCO frequency increases; a DN signal decreases the VCO which can be turned on or off depending on the required
frequency. The VCO stabilizes only when FREF and FDIV capacity. When the blocks are switched on, the capacity is
frequency and phase coincides. Under these conditions, the reduced, when the blocks are switched off, the capacity
PLL is locked. Thus, the VCO is the key component that increases. Switches in the LC-VCOs is realized using NMOS
controls the frequency of the PLL. or PMOS transistors or capacitors.
CN
en bit N
CN
C. Current Control Block
The last component of the LC-VCO is the current control
block. In this block bias current is controlled by several bits.
As can be seen in Fig. 2, ictrl is a binary array of several
B C1 Vt une C1 independent control signals for corresponding bias current
switches. Therefore, by choosing ictrl signals, the LC-VCO
C2 C2
can get various bias current values, which means that LC-
Vout- Vout+ VCO can adjust its power consumption to the optimum.
Compared with bandgaps reference current biasing this
CN CN
structure has the advantage of simplicity and power
consumption selection flexibility [2-4].
The paper is organized as follows: section II describes the
VSS
analysis of the LC-VCOs overview; conclusions are
VDD summarized in section III.
L