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Coa Exp2
Coa Exp2
Apparatus Used: Simulator.io is an online CAD tool for logic circuits. We will use this platform to
implement and verify the Half adder and Full Adder Implementations.
Theory:
Half Adder:
The logic circuit which performs the addition of 2 bits is called Half- Adder. It is a kind of combinational
circuit. It contains two binary inputs "augend" and "addend" and two binary outputs Sum and Carry.
The Sum bit (S) and the Carry bit (C) are given according to the rules of Binary Addition which can be
summarized in the form of truth table as,
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
K-Map Simplification
We use K-Map to obtain the expression for Sum and Carry bit which is as,
Full Adder
Full Adder is an arithmetic circuit which performs the arithmetic sum of 3 -input bits. It consists of 3
inputs and 2 outputs. One additional input is the Carry bit (C) in which represents the carry from the
previous significant position.
Similarly, as in Half-Adder, we have two outputs Sum (S) and Carry (C), which can be obtained using
the rules of Binary Addition and can be summarized in a Truth Table as,
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
K-Map Simplification
We use K-Map to obtain the expression for Sum and Carry bit which is as,
SUM = A ⊕ B ⊕ C
CARRY = AB + (A ⊕ B). C
A Full Adder can also be implemented using two half adders and one OR gate.
Procedure:
1. Place elements on the board like XOR gates, AND Gates, HA, FA, OR Gate.
2. There are several input/output elements to interact with the user during the simulation (likes
buttons or displays).
4. Verify the Truth Table of Half adder and Full adder by switching the inputs.
Results: The Truth Tables of Half adder and Full adder are verified.
Precautions: