Addressing Mode full in one go

All question covered

Data Transfer Instruction

Instruction used to transfer data of register , memory or address to register / memory location
/port

MOV XCHG PUSH POP IN OUT

Generally it has two inputs source and destination source where data or register name is mention
and destination is specified by register name and address and port address

The size should be a either a byte or a word. A 8-bit data can only be moved to 8-bit register/
memory and a 16-bit data can be moved to 16-bit register/ memory.

MOV reg2/ mem, reg1/ mem MOV reg2, reg1 MOV mem,reg1 MOV reg2, mem (reg2) (reg1)
(mem)(reg1) (reg2)(mem) MOV reg/ mem, data MOV reg, data MOV mem, data (reg) data
(mem)data XCHG reg2/ mem, reg1 XCHG reg2, reg1 XCHG mem, reg1 (reg2) (reg1)
(mem)(reg1)

PUSH reg16 PUSH mem (SP) (SP) –2 MAS = (SS) x 1610+ SP (MAS; MAS+ 1)(reg16) (SP) (SP) –2
MAS = (SS) x 1610+ SP (MAS; MAS+ 1)(mem) POP reg16/ mem POP reg16 POP mem MAS = (SS) x
1610+ SP (reg16) (MAS; MAS+ 1) (SP) (SP) + 2 MAS = (SS) x 1610+ SP (mem) (MAS; MAS+ 1)
(SP) (SP) +2

IN A, [DX] IN AL, [DX] IN AX, [DX] PORTaddr= (DX) (AL) (PORT) PORTaddr= (DX) (AX) (PORT) IN A,
addr8 IN AL, addr8 IN AX, addr8 (AL) (addr8) (AX) (addr8) OUT [DX], A OUT [DX], AL OUT [DX],
AX PORTaddr= (DX) (PORT) (AL) PORTaddr= (DX) (PORT) (AX) OUT addr8, A OUT addr8, AL OUT
addr8, AX (addr8) (AL) (addr8) (AX)

2. Arithmetic Instructions Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…

ADD reg2/ mem, reg1/mem ADC reg2, reg1 ADC reg2, mem ADC mem, reg1 (reg2) (reg1) + (reg2)
(reg2)(reg2) + (mem) (mem)(mem)+(reg1) ADD reg/mem, data ADD reg,data ADD mem, data
(reg) (reg)+ data (mem)(mem)+data ADD A, data ADDAL, data8 ADD AX, data16 (AL)(AL)+
data8 (AX)(AX) +data

ADC reg2/ mem, reg1/mem ADC reg2, reg1 ADC reg2, mem ADC mem, reg1 (reg2) (reg1) +
(reg2)+CF (reg2)(reg2) + (mem)+CF (mem)(mem)+(reg1)+CF ADC reg/mem, data ADC reg,data
ADC mem, data (reg) (reg)+ data+CF (mem)(mem)+data+CF ADDC A, data ADDAL, data8 ADD
AX, data16 (AL)(AL)+ data8+CF (AX)(AX) +data16+CF
In computer architecture, addressing modes specify how the operand (data) for an instruction
is located in memory. The CPU uses the addressing mode to determine the effective address,
which is the actual memory location where the data resides. Here are some common
addressing modes, each with an explanation and example:

1. Implicit Addressing (1 mark):

• Concept: The operand is directly implied by the instruction itself. No additional

operand field is needed.
• Example: Increment register A (INC A). The instruction implicitly specifies that the
operand is register A, and it will be incremented by 1.

2. Immediate Addressing (1 mark):

• Concept: The operand is included as a constant value within the instruction itself.
• Example: Load the value 45 into register B (MOV B, 45). The value 45 is the
immediate operand that will be loaded into register B.

3. Register Addressing (1 mark):

 • Concept: The operand is located in a CPU register. The instruction specifies the
register number.
• Example: Add the value in register A to the value in register B and store the result in
register C (ADD B, A). Registers A and B are the operands, and their values are
added.

4. Direct Addressing (1 mark):

• Concept: The memory address of the operand is explicitly specified in the

instruction.
• Example: Load the value from memory location 100 into register D (LOAD D, 100).
The address 100 points to the operand's location in memory.

5. Indirect Addressing (1 mark):

• Concept: The address of the operand is stored in a memory location, and the
instruction specifies the address of that memory location.
• Example: Load the value from the memory location pointed to by the value in
register X into register E (LOAD E, (X)). The value in register X holds the address of
the memory location that actually stores the operand.

6. Indexed Addressing (1 mark):

• Concept: The operand's address is calculated by adding a base address and an index
value.
• Example: Add the value from the memory location whose address is the sum of
register B and 4 to register C (ADD C, [B+4]). The base address is in register B, and 4
is the index value added to it to get the final memory address of the operand.

7. Base-Register Addressing (1 mark):

• Concept: Similar to indexed addressing, but the base address is stored in a specific
register designated for this purpose (e.g., base register).
• Example: Add the value from the memory location whose address is the sum of the
base register and the value in register X to register Y (ADD Y, [BaseReg + X]). The
base register holds the base address, and the value in register X is added to it for the
final operand address.

8. Relative Addressing (1 mark):

• Concept: The operand's address is calculated relative to the current program counter
(PC), which holds the address of the next instruction to be executed.
• Example: Jump to the instruction located 10 bytes ahead in the program (JMP +10).
The PC is incremented by 10 to get the address of the target instruction.