Digital Control Systems

Lecture-13
Digital Controller Design

Dr. Mountasser Mohamed Ramadan

email: mountasser.m.r@gmail.com

1
 Lecture Outline
• Introduction.
• Control System Specifications.
• Compensation.
• Phase-Lag Compensation.
• Phase-Lead Compensation.
• Lag-lead compensation
• Design by Root Locus.

2
 Introduction

• Now some simple design problems

were considered: for example, the
determination of gains required to
meet steady state error specifications.

3
 Control System Specifications
• The design of a control system involves the changing
of system parameters and/or the addition of
subsystems (called compensators) to achieve certain
desired system characteristics.
• The desired characteristics, performance
specifications, generally relate to steady state
accuracy, transient response, relative stability,
sensitivity to change in system parameters, and
disturbance rejection.
4
 Control System Specifications
• Steady State Accuracy: Steady state accuracy is
increased if poles at 𝑧 = 1 are added to the open
loop function, and/or if the open loop gain is
increased.
• However, added poles at 𝑧 = 1 in the open loop
function introduce phase lag into the open loop
frequency response, resulting in reduced stability
margins.
• Thus control system design is usually a trade-off
between steady accuracy and acceptable relative
stability (acceptable stability margins) 5
 Compensation
• Define the transfer function of the digital compensator as
𝑘𝑑 (𝑧 − 𝑧𝑜 )
𝐷 𝑧 =
𝑧 − 𝑧𝑝
• For designing in frequency domain we define 𝐷(𝑤) as:
𝐷 𝑤 = 𝐷(𝑧) 𝑇 𝑇
𝑧= 1+ 𝑤 /[1− 𝑤]
2 2
• Or
1 + 𝑤 𝜔𝑤𝑜
𝐷 𝑤 = 𝑎𝑜
1 + 𝑤 𝜔𝑤𝑝
• Where 𝜔𝑤𝑜 is the zero location, 𝜔𝑤𝑝 is the pole location,
in the w-plane and 𝑎𝑜 is the compensator dc gain.
6
 Compensation
• To realize the compensator, the transfer function must be
𝑘𝑑 (𝑧−𝑧𝑜 )
expressed in z as: 𝐷 𝑧 = , from
𝑧−𝑧𝑝
𝑤
1+
𝜔𝑤𝑜
𝐷 𝑤 = 𝑎𝑜 𝑤
1+
𝜔𝑤𝑝
𝑤= 2 𝑇 𝑧−1 𝑧+1
2/𝑇 − 𝜔𝑤𝑜
𝜔𝑤𝑝 𝜔𝑤𝑜 + 2 𝑇 𝑧 − 2/𝑇 + 𝜔𝑤𝑜
= 𝑎𝑜
𝜔𝑤𝑜 𝜔𝑤𝑝 + 2 𝑇 2/𝑇 − 𝜔𝑤𝑝
𝑧−
2/𝑇 + 𝜔𝑤𝑝
• Hence,
𝜔𝑤𝑝 𝜔𝑤𝑜 +2 𝑇 2/𝑇−𝜔𝑤𝑜 2/𝑇−𝜔𝑤𝑝
𝐾𝑑 = 𝑎𝑜 , 𝑧𝑜 = , 𝑧𝑝 =
𝜔𝑤𝑜 𝜔𝑤𝑝 +2 𝑇 2/𝑇+𝜔𝑤𝑜 2/𝑇+𝜔𝑤𝑝
7
 Compensation
• The compensator

1+𝑤 𝜔𝑤𝑜
𝐷 𝑤 = 𝑎𝑜
1+𝑤 𝜔𝑤𝑝

is classified by the location of the zero, 𝜔𝑤𝑜 , relative

to that of the pole 𝜔𝑤𝑝 .

• If 𝜔𝑤𝑜 < 𝜔𝑤𝑝 , the compensation is called phase lead.

• If 𝜔𝑤𝑜 > 𝜔𝑤𝑝 , the compensation is called phase lag.
8
 Phase-Lag Compensation
• For 𝜔𝑤𝑜 > 𝜔𝑤𝑝 , the frequency response of 𝐷(𝑤)
exhibits a negative phase angle, or phase lag.

• The frequency response of 𝐷(𝑤), as given by a Bode

plot as shown in the following figure...\New folder
(2)\Phase-Lag Compensation.pptx

• The high frequency gain is

𝑎𝑜 𝜔𝑤𝑝
high frequency gain 𝑑𝐵 = 20 log
𝜔𝑤𝑜
• The phase characteristic is also shown in the figure.
9
 Phase-Lag Compensation

10
 Phase-Lag Compensation
• The maximum phase shift is denoted as ∅𝑀 , and has a value
between 0 and −90𝑜, depending on the ratio 𝜔𝑤𝑜 /𝜔𝑤𝑝 .
• For the system shown in the following figure

• The characteristic equation is given by

1+𝐷 𝑧 𝐺 𝑧 =0
1 − 𝑒 −𝑇𝑠
𝐺 𝑧 =𝓏 𝐺𝑝 (𝑠)
11
𝑠
 Phase-Lag Compensation
• Phase lag filters reduce the high-frequency gain
relative to the low-frequency gain.
• Phase lag tends to destabilize a system (rotates the
Nyquist diagram toward the -1 point) the break
frequencies, 𝜔𝑤𝑝 and 𝜔𝑤𝑜 , must be chosen such that
the phase lag does not occur in the vicinity of 180𝑜
crossover point of the plant frequency response
𝐺 𝑗𝜔𝑤 , where
1 − 𝑒 −𝑇𝑠
𝐺 𝑤 =𝓏 𝐺𝑝 (𝑠)
𝑠 𝑧= 1+ 𝑇/2 𝑤 / 1− 𝑇/2 𝑤

12
 Phase-Lag Compensation
• Phase lag filters reduce the high-frequency gain relative to
the low-frequency gain and introduce phase lag.
• Since, in general, Phase lag tends to destabilize a system
(rotates the Nyquist diagram toward the -1 point) the break
frequencies, 𝜔𝑤𝑝 and 𝜔𝑤𝑜 , must be chosen such that the
phase lag does not occur in the vicinity of 180𝑜 crossover
point of the plant frequency response 𝐺 𝑗𝜔𝑤 , where
1 − 𝑒 −𝑇𝑠
𝐺 𝑤 =𝓏 𝐺𝑝 (𝑠)
𝑠 𝑧= 1+ 𝑇/2 𝑤 / 1− 𝑇/2 𝑤

• Thus, both 𝜔𝑤𝑝 and 𝜔𝑤𝑜 , must be much smaller than the of
180𝑜 crossover frequency.
• The following figure illustrates design by phase-lag
13
compensation, where the compensator dc gain is unity.
 Phase-Lag Compensation

14
 Phase-Lag Compensation
• Note, that both the system gain margin and the
system Phase margin ∅𝑚 have been increased by the
compensation, increasing relative stability.
• In addition, the low-frequency gain has not been
reduced, and thus steady-state errors and low-
frequency sensitivity have not been increased to
attain the improved relative stability.
• The bandwidth has been decreased, which generally
result in slower system time.
15
 Phase-Lag Compensation
• The design steps:
1. Determine the dc gain 𝑎𝑜 from the system
specification (to satisfy the requirement on the
given static velocity error constant).
𝐾𝑣 = lim 𝑤𝐷 𝑤 𝐺 𝑤
𝑤→0
2. Determine the frequency 𝜔𝑤1 , at which the phase
angle of 𝐺(𝑗𝜔𝑤1 ) is approximately
−180𝑜 + ∅𝑚 + 50 .
16
 Phase-Lag Compensation
• The design steps:
3. Choose 𝜔𝑤0 = 0.1𝜔𝑤1
To ensure that little phase lag is introduced at
𝜔𝑤1 . Actually, the compensator will introduce
approximately 50 phase lag, which has been
accounted for in step 2
𝑎𝑜 𝜔𝑤𝑝 𝑎𝑜 𝜔𝑤𝑝 1
𝐺(𝑗𝜔𝑤1 ) = 1 ⇒ =
𝜔𝑤𝑜 𝜔𝑤𝑜 𝐺(𝑗𝜔𝑤1 )
Solving the last two equations for 𝜔𝑤𝑝 , yields
0.1𝜔𝑤1
𝜔𝑤𝑝 =
17 𝑎𝑜 𝐺(𝑗𝜔𝑤1 )
 Example#
• Consider the system shown in the following figure.

• The open-loop transfer function is given by

1
𝐺𝑝 𝑠 =
𝑠 𝑠 + 1 0.5𝑠 + 1
• It is desired to design a unity dc gain phase lag compensator
(𝑎0 = 1) to achieve a phase margin of 55°. The sampling
period is specified as 0.05 sec, or 𝑇 = 0.05 𝑠𝑒𝑐.
18
 Example#
• Solution:
• The 𝑧 transform of the plant that is preceded by a zero-
order hold is
1 − 𝑒 −𝑇𝑠 1
𝐺 𝑧 =𝓏
𝑠 𝑠(𝑠 + 1)(0.5𝑠 + 1)
𝑧−1 1 −1.5 2 −0.5
= 𝓏 2 + + +
𝑧 𝑠 𝑠 𝑠+1 𝑠+2
𝑧 − 1 0.005𝑧 1.5𝑧 2𝑧 0.5𝑧
= 2
− + −
𝑧 𝑧−1 𝑧 − 1 𝑧 − 0.9512 𝑧 − 0.9048
• The frequency response as the following
19
 Example#

20
 Example#
• Then, using the foregoing procedure, we see that the
frequency 𝜔𝑤1 occurs where the phase of 𝐺(𝑗𝜔𝑤 )is
−180𝑜 + 55𝑜 + 5𝑜 = −120𝑜 , or 𝜔𝑤1 ≈ 0.36 . At
this frequency, 𝐺(𝑗𝜔1 ) = 2.57.
• Then
𝜔𝑤0 = 0.1𝜔𝑤1 = 0.036
• And
0.1𝜔𝑤1 0.036
𝜔𝑤𝑝 = = = 0.014
𝑎𝑜 𝐺(𝑗𝜔𝑤1 ) 1(2.57)
𝑤
1+
0.036
• Then 𝐷 𝑤 = 𝑤
1+
0.014
0.3891(𝑧−0.998202) 0.3891𝑧−003884
• And 𝐷 𝑧 = =
21 (𝑧−0.9993) 𝑧−0.9993
 Example#

22
 Phase-Lag Compensation
In summary, some possible advantages of phase-lag compensation
are:
1. The low-frequency characteristics are maintained or improved.
2. the stability margins are improved.
3. The bandwidth is reduced, which is an advantage if high-frequency
noise is a problem. Also, for other reasons, reduced bandwidth may
be an advantage.
Some possible disadvantages are:
1. The reduced bandwidth may be a problem in some systems.
2. The system transient response will have one very slow term.
3. Numerical
23
problems with filter coefficients may result.
 Phase-Lead Compensation
• For phase lead compensation, 𝜔𝑤𝑜 < 𝜔𝑤𝑝 , and the
compensator frequency response is shown in the
following figure,

24
 Phase-Lead Compensation
• The maximum phase shift is 𝜃𝑀 , occurs at a frequency 𝜔𝑤𝑚
is the geometric mean of 𝜔𝑤𝑜 and 𝜔𝑤𝑝 , that is
𝜔𝑤𝑚 = 𝜔𝑤𝑜 𝜔𝑤𝑝

• A plot of 𝜃𝑀 versus 𝜔𝑤𝑝 /𝜔𝑤𝑜 is given in the following

the ratio For the system shown in the following figure

25
 Phase-Lead Compensation
• This plot is obtained through the following
development.
1+𝑤 𝜔𝑤𝑜
• We express 𝐷 𝑤 = 𝑎𝑜 as
1+𝑤 𝜔𝑤𝑝

𝑗𝜃
1 + 𝑗(𝜔𝑤 /𝜔𝑤𝑜 )
𝐷 𝑗𝜔𝑤 = 𝐷(𝑗𝜔𝑤 ) 𝑒 = 𝑎𝑜
1 + 𝑗(𝜔𝑤 /𝜔𝑤𝑝 )
• Then

−1
𝜔𝑤 −1
𝜔𝑤
tan 𝜃 = tan tan − tan = tan 𝛼 − 𝛽
𝜔𝑤𝑜 𝜔𝑤𝑝
26
 Phase-Lead Compensation
• Thus
𝜔𝑤 𝜔𝑤
−
tan 𝛼 − tan 𝛽 𝜔𝑤𝑜 𝜔𝑤𝑝
tan 𝜃 = = 2 𝜔 𝜔
1 + tan 𝛼 tan 𝛽 1 + 𝜔𝑤 𝑤𝑜 𝑤𝑝
• Then

1 𝜔𝑤𝑝 𝜔𝑤𝑜
tan 𝜃𝑀 = −
2 𝜔𝑤𝑜 𝜔𝑤𝑝

• From this equation, 𝜃𝑀 is seen to be a function only of

𝜔𝑤𝑝
the ratio .
𝜔𝑤𝑜
27
 Phase-Lead Compensation
• Note also that

1 + 𝜔𝑤 𝜔𝑤𝑜 2
𝐷 𝑗𝜔𝑤𝑚 = 𝑎𝑜
2
1 + 𝜔𝑤 𝜔𝑤𝑝
𝜔𝑤𝑚

1 + 𝜔𝑤𝑝 𝜔𝑤𝑜 𝜔𝑤𝑝

= 𝑎𝑜 = 𝑎𝑜
1 + 𝜔𝑤𝑜 𝜔𝑤𝑝 𝜔𝑤𝑜

28
 Phase-Lead Compensation

• Phase lead compensation introduces phase lead,

which stabilizing effect, but also increasing the
high-frequency gain relative to the low-frequency
gain, which is a destabilize effect.
• Design using phase lead compensation illustrated
in the following figure

29
 Phase-Lead Compensation

30
 Phase-Lead Compensation
• The phase lead is introduced in the vicinity of plant’s
180𝑜 crossover frequency, in order to increase the
system stability margin.
• Note that system bandwidth is also increased ,
resulting in faster time response.
• For the last figure, the compensator dc gain is unity.

31
 Phase-Lead Compensation
• Phase-Lead design procedure:
• This procedure will yield a specified phase margin in a discrete
control system, provided that the designed system is stable.
• The procedure will set the gain and phase of open-loop
function to specified values at a given frequency, and choose
the specified gain to be 0 𝑑𝐵 and the specified phase to be
180𝑜 + ∅𝑚 , where ∅𝑚 is the desired phase margin.
• The procedure does not determine the gain margin, and may
in fact result in an unstable system.
• Then, as a later step in the procedure, it will necessary to
check the gain margin to insure that is adequate.
32
 Phase-Lead Compensation
• Phase-Lead design procedure:
• Determine 𝐷(𝑤) such that, at some frequency 𝜔𝑤1 ,

𝐷(𝑗𝜔𝑤1 )G 𝑗𝜔𝑤1 = 1 180𝑜 + ∅𝑚

• And, in addition, the system possesses in adequate
gain margin.
• Let D(w) expressed as

𝑎1 𝑤 + 𝑎𝑜 1 + 𝑤 𝑎𝑜 𝑎1
𝐷 𝑤 = = 𝑎𝑜
𝑏1 𝑤 + 1 1 + 𝑤 𝑏1 −1
33
 Phase-Lead Compensation
• Phase-Lead design procedure:

𝑎1 𝑤 + 𝑎𝑜 1 + 𝑤 𝑎𝑜 𝑎1
𝐷 𝑤 = = 𝑎𝑜
𝑏1 𝑤 + 1 1 + 𝑤 𝑏1 −1
• Where 𝑎𝑜 is the compensator dc gain. Then
𝑎0 1
𝜔𝑤0 = , 𝜔𝑤𝑝 =
𝑎1 𝑏1

• From
𝐷(𝑗𝜔𝑤1 )G 𝑗𝜔𝑤1 = 1 180𝑜 + ∅𝑚

34
 Phase-Lead Compensation
• Phase-Lead design procedure:
1
𝐷(𝑗𝜔𝑤1 ) =
𝐺 𝑗𝜔𝑤1
• And
𝜃 = 𝐷 𝑗𝜔𝑤1 = 180𝑜 + ∅𝑚 − G 𝑗𝜔𝑤1

• Solving these two equation yields:

1−𝑎0 𝐺 𝑗𝜔𝑤1 cos 𝜃
𝑎1 =
𝜔𝑤1 𝐺 𝑗𝜔𝑤1 sin 𝜃

cos 𝜃 − 𝑎0 𝐺 𝑗𝜔𝑤1
𝑏1 =
35
𝜔𝑤1 sin 𝜃
 Phase-Lead Compensation
• Phase-Lead design procedure:
• Note that 𝜃 > 0 yields that:
1. 𝐺 𝑗𝜔𝑤1 < 180𝑜 + ∅𝑚 also 𝐷(𝑗𝜔𝑤1 ) > 𝑎0
2. 𝐺(𝑗𝜔𝑤1 ) < 1 𝑎0 , the coefficient 𝑏1 positive, to
ensure a stable controller.
3. cos 𝜃 > 𝑎0 𝐺(𝑗𝜔𝑤1 )
• Hence, the phase margin frequency 𝜔𝑤1 must be
chosen to satisfy these three constraints.
36
 Example#
• Consider the system shown in the following figure.

• The open-loop transfer function is given by

1
𝐺𝑝 𝑠 =
𝑠 𝑠 + 1 0.5𝑠 + 1
• It is desired to design a unity dc gain phase lead compensator
(𝑎0 = 1) to achieve a phase margin of 55°. The sampling
period is specified as 0.05 sec, or 𝑇 = 0.05 𝑠𝑒𝑐.
37
 Example#
• Solution:
• The 𝑧 transform of the plant that is preceded by a
zero-order hold is

1 − 𝑒 −𝑇𝑠 1
𝐺 𝑧 =𝓏
𝑠 𝑠(𝑠 + 1)(0.5𝑠 + 1)
𝑧−1 1 −1.5 2 −0.5
= 𝓏 2 + + +
𝑧 𝑠 𝑠 𝑠+1 𝑠+2
𝑧 − 1 0.005𝑧 1.5𝑧 2𝑧
= 2
− +
38 𝑧 𝑧−1 𝑧 − 1 𝑧 − 0.9512
 Example#
• Solution:
• We must choose a frequency 𝜔𝑤1 such that
𝐺 𝑗𝜔𝑤1 < −125𝑜 and 𝐺(𝑗𝜔𝑤1 ) < 1
• We rather arbitrarily choose 𝜔𝑤1 = 1.2 𝑟𝑎𝑑/𝑠𝑒𝑐 .
𝐺 𝑗𝜔𝑤1 = 0.4576 − 172.9𝑜
• Then
𝜃 = 180𝑜 + 55𝑜 − −172.9𝑜 = 407.9𝑜 = 47.9𝑜
cos 47.9𝑜 = 0.67 > 0.4576
• The frequency response as the following
39
 Example#

40
 Example#
• Hence,

1−(1)(0.4576) cos(47.9𝑜 )
𝑎1 = = 1.701
(1.2)(0.4576) sin(47.9𝑜 )

cos(47.9𝑜 ) − (1)(0.4576)
𝑏1 = 𝑜
= 0.2387
(1.2) sin(47.9 )

• And ,
1 + 1.701𝑤 1 + 𝑤/0.5879
𝐷(𝑤) = =
1 − 0.2387𝑤 1 − 𝑤/4.187
• we obtain 𝐷(𝑧),
6.539(𝑧 − 0.971)
𝐷(𝑧) =
41
𝑧 − 0.8106
 Example#

• The bode diagram of compensated system is

shown in the following figure

• we obtain a phase margin of 55𝑜 and a gain

margin of 12.3 𝑑𝐵

42
 Example#

43
 Phase-Lead Compensation

44
 Lag-lead compensation
• A lag-lead compensation characteristic shown in
the following figure

45
 Lag-lead compensation
• The purpose of :
• The lag section is to increase the low-frequency
gain, and
• The lead section increases the bandwidth and the
stability margins.

46
 Example#
• Consider the system shown in the following figure.

• The open-loop transfer function is given by

1
𝐺𝑝 𝑠 =
𝑠 𝑠 + 1 0.5𝑠 + 1
• It is desired to design a lag-lead compensator to achieve a
steady state error to a unit ramp input of 0.5 and a phase
margin of 55°. The sampling period is specified as 0.05 sec, or
𝑇 = 0.05 𝑠𝑒𝑐.
47
 Example#
• Solution:
𝑇
𝑒𝑠𝑠 𝑘𝑇 =
lim 𝑧 − 1 𝐺(𝑧)
𝑧→1
𝑧−1 2 0.005𝑧 1.5𝑧 2𝑧 0.5𝑧
lim 𝑧 − 1 𝐺(𝑧)=lim − + − = 0.05
𝑧→1 𝑧→1 𝑧 𝑧−1 2 𝑧−1 𝑧−0.9512 𝑧−0.9048

0.05
𝑒𝑠𝑠 𝑘𝑇 = =1
0.05
• We will choose the zero-pole of lag compensation as the first
example
𝐾𝑑 (𝑧−0.998202)
lim 𝐷1 (𝑧)=lim 𝑧 =2
48 𝑧→1 𝑧→1 (𝑧−0.9993)
 Example#
• Solution:
• Then 𝐾𝑑 = 0.7786
0.7786(𝑧−0.998202)
• And 𝐷1 𝑧 =
(𝑧−0.9993)

• To design the lead compensator we rather arbitrarily choose

𝜔𝑤1 = 1.2 𝑟𝑎𝑑/𝑠𝑒𝑐 . Then

𝐷2 (𝑤)𝐺 𝑗𝑤 = 0.365 − 173.9𝑜

𝑤=𝑗1.2

And
𝜃 = 180𝑜 + 55𝑜 − −173.9𝑜 = 408.9𝑜 = 48.9𝑜
49
49
 Example#
• Hence,

1−(1)(0.365) cos(48.9𝑜 ) 1
𝑎1 = = 2.303 =
(1.2)(0.365) sin(48.9𝑜 ) 0.434

cos(48.9𝑜 ) − (1)(0.365) 1
𝑏1 = 𝑜
= 0.3233 =
(1.2) sin(48.9 ) 3.093

• And ,
1 + 𝑤/0.434
𝐷2 (𝑤) =
1 − 𝑤/3.093
• we obtain 𝐷(𝑧),
6.68(𝑧 − 0.9785)
𝐷2 (𝑧) =
50
𝑧 − 0.857
 Example#
• The overall transfer function of the compensator is

0.7786(𝑧 − 0.998202) 6.68(𝑧 − 0.9785)

𝐷 𝑧 = 𝐷1 𝑧 𝐷2 (𝑧) =
(𝑧 − 0.9993) 𝑧 − 0.857

5.2(𝑧−0.998202)(𝑧−0.9785)
𝐷 𝑧 = 𝐷1 𝑧 𝐷2 (𝑧) =
(𝑧−0.9993)(𝑧−0.857)

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 Design by Root Locus.
• Consider the system shown in the following figure

• The characteristic equation is given by

1+𝐷 𝑧 𝐺 𝑧 =0

52
 Design by Root Locus.

bellow

53
 Design by Root Locus.

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Phase lag compensation

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 Phase lag compensation

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 Phase lead compensation

57