UNIT I

Linear IC – Operational amplifier

LinearIC-Operationalamplifier:IntroductiontolinearICs–Operationalamplifier IC741 – Block
diagram and characteristics – DC and AC performance – Open loop configurations–
Feedbackconfigurations–Inverting,NoninvertingandDifferential amplifier – Summer,
Subtractor, Integrator, Differentiator – Zero crossing detector – Schmitttrigger–
Windowdetector–AstableandMonostableMultivibrators,V-IandI-V Converters. Filter and its
types – Instrumentation amplifier – Precision rectifiers - Logarithmic and antilog amplifiers –
Multiplier

1.1 Introduction to Linear IC’s

 The integrated circuit or IC is a miniature low cost electronic circuit consisting of active and
passive components that are joined together on a single crystal chip of silicon.
 The active components are transistors and diodes and passive components are resistors
and capacitors.

Advantages of IC are over discrete components:

1. Small size and low cost.

2. Low power consumption and high reliability.
3. Simpler design and less weight.
4. Battery operated systems due to low power supply requirement.
5. Improved functional performance.
6. Increased operating speeds.

Classification

IC’s can be classified as

 Digital IC’s(logic gates,flipflop)
 Linear IC’s(op-amp,voltage comparator)

Based upon the above requirements, two distinctly different IC technologies are,
 Monolithic technology
 Hybrid technology

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Monolithic Integrated circuit:
 All circuit components, both active and passive elements and their interconnections are
manufactured into or on top of a single chip of silicon.

Hybrid circuit:
 Separate component parts are attached to a ceramic substrate and interconnected by
means of either metallization pattern or wire bonds.

1.2 Operational Amplifier (OP-AMP)

 An operational amplifier is a DC-coupled high-gain electronic voltage amplifier with a

differential input and, usually, a single-ended output.
 An op-amp produces an output voltage that is typically hundreds of thousands times larger
than the voltage difference between its input terminals.
 It was originally designed for performing mathematical operations such as addition,
subtraction, multiplication and integration and is abbreviated as op-amp.

Basic Information of Op-Amp

Circuit symbol:

Fig .1.1 Op-amp symbol representation

 The Fig 1.1 shows, schematiccircuit of an op-amp is a triangle. It has two input terminals
and one output terminal.
 Op-amps have 5 basic terminals. 2 inputs 1 outputs and 2 power supply terminals. The
terminal with a (-) sign is called inverting input terminal and (+) sign is called non-inverting
input terminal.

Vo = A( V1 - V2 )

Where Vo is output of op-amp

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 V1is non-inverting input
V2is inverting input
A is Voltage gain of op-amp

Packages:
Three popular packages available are

1. Dual in line package (DIP).

2. Metal can package (TO).
3. Flat package.
 Op-amp packages may contain single, dual or quad op-amps. Typical packages have 8,
10 or 14 terminals. The widely used very popular type µA741 is a single op-amp
available as an 8 pin can, DIP or 10 pin flat pack shown in Fig 1.2

Fig 1.2 Pin Diagrams of IC 555

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Power supply Connections:

Fig 1.3 Power supply connections

The V+ and V- power supply terminals are connected to two dc voltage sources.The V+ is
connected to the positive terminal of one sourceand the V- is connected to the negative terminal
of other source. Where the two sources are 15 v batteries each.

1.3 IC 741

Pin Diagram of IC 741:

Fig 1.4 Pin Diagram of IC 741

Manufacturer’s Designation for Linear IC’s:

 Each manufacturer uses a specific code and assigns a specific type number IC’s e.g. 741
an internally compensated op-amp originally manufactured by fair child is sold as µA 741.
 Where µA represent the identifying initials.
 Initials used by some well known manufacturers are

National Semiconductor LM, LH, LF

Fair child µA, µAF
Motorola MC
Texas Instruments SN

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1.3 BLOCK DIAGRAM OF IC 741

InputStage

 The input stage is a Dual input balanced output differential amplifier.

 The two amplifiers are applied at inverting or non inverting terminals.
 This stage provides most of voltage gain of the op-amp and decides input resistance
valueR1.

IntermediateStage

 This is usually another differential amplifier. It is driven by output of the input stage. This
stage is dual input unbalance output differential amp.
 This stage provides additional voltage gain to the input signals.

Level shifting stage

 This is third stage in the block diagram of op-amp. Due to direct coupling between first two
stages the input of level shifting stage is an amplifying system with non-zero DC level.
 Level shifting stage is used to bring this DC level to a zero volt with respect to ground.

Output Stage

 This is normally complementary output stage. It increases magnitude of voltage and rises
the current supplying capacity of the op-amp.
 It also provides low output resistance. The output stage is a push pull of two transistors

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1.4 EQUIVALENT CIRCUIT OF OP-AMP

Fig 1.5 Equivalent Circuit Of Op-Amp Circuit

Fig 1.5 above shows the equivalent circuit of op-amp. It includes

Vo is output voltage of op-amp Ri input resistance
V1is non-inverting input R0 output resistance
V2is inverting input
A is Voltage gain of op-amp
Vid = V1 - V2 input differential voltage

Vo = AVid = A( V1 - V2 )

1.5 DC AND AC PERFORMANCE OR PARAMETERS OF OP-AMP:

A DC Characteristics:

An ideal op-amp draws no current from source and its response is independent
of temperature.
 Practical op-amp has some dc voltage at the output even with both the inputs
are grounded.
 The non-ideal dc characteristics that add error components to the dc output
voltage are
1. Input bias current
2. Input offset voltage
3. Input offset current
4. Thermal drift

Input bias current:

 A practical op-amp conduct a small value of dc current to bias the input transistors.
 The base current entering into the inverting and non-inverting terminals are IB- and
IB+ respectively. IB- and IB+ are not exactly equal due to internal imbalance between
the two inputs.
 Input bias current IB is defined as the average value of the base currents entering
into the terminals of an op-amp during the input bias current.

IB = (IB+ + IB-)/2

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  For 741 bipolar op-amp IB is 500 nA and fet op-amp is 50 pA at room
temperature. Input bias current can be compensated using resistor Rcomp between the
non-inverting input

𝑅1 𝑅𝐹
= 𝑅𝐶𝑂𝑀𝑃
𝑅1 +𝑅𝐹

Input offset current:

 Bias current compensation will work efficiently if both the bias currents IB+ IB- are equal.
 The input transistors cannot be made identical hence there will be some difference
between IB+ and IB-. This difference is called offset current IOS.

|IOS| = IB+ - IB-

 The absolute value indicates that there is no way to predict which of the current is larger.
 IOS for BJT op-amp is 200 nA and for FET is 10 pA.The effect of I OS can be minimized by
keeping feedback resistance small.

Input offset voltage:

 In spite of the use of the above compensation techniques, it is found that the output
voltage may still not be zero with zero input voltage.
 This is due to unavoidable imbalances inside the op-amp and one may have to apply a
small voltage at the input terminals to make output voltage zero.
 This voltage is called input offset voltage Vios. This is the voltage required to be applied
at the input for making output voltage to zero volts.

By voltage divider rule V2 is given by,

(𝑅1 𝑉0. )
𝑉2=
(𝑅1. + 𝑅𝑓).

(𝑅1. + 𝑅𝑓). 𝑉2 )
𝑉𝑜=
(𝑅1. )

𝑅𝑓.
𝑉𝑜= (1 + )𝑉
𝑅1. 2.

Vos= Vi=V2 ,

We know that, Vi=0

Vos= 0-V2

Vos= V2

Therefore to make input offset voltage to be zero Vos= V2

Thermal drift:

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  Bias current, offset current and offset voltage change with temperature.
 A circuit carefully nulled at 250 C may not remain so when the temperature rises.
This is drift.
 Offset current drift is expressed in nA/0C and offset voltage drift in mV/0C.
 Thermal drift is defined as the average rate of change of input offset voltage or
offset current or bias current per unit change in temperature.

Input resistance:

 This is the differential input resistance as seen either of input terminals with the
other terminal connected to the ground.
 For the 741c, the input resistance is 2Mohms.

Input capacitance:

 It is the equivalent capacitance that can be measured at either of the input

terminal with the other terminal connected to the ground.
 A typical value of Ci is 1.4pF.

Input voltage:
 This is the common mode voltage that can be applied to both input terminals without
disturbing the performance of an op-amp. For the 741c, their range is(+ or -)13V

Supply voltage rejection ratio: (SVRR)

 The change in an op amp’s input offset voltage due to variations in supply voltage is
called supply voltage rejection ratio.
 It is expressed in micro volts per volts or in decibels. For 741c, the value is 150uV\V. It
is also called as power supply rejection ratio.

∆𝑉𝑖𝑜
𝑆𝑉𝑅𝑅 =
∆𝑉

Where ∆𝑉 = change in supply voltage

∆𝑉𝑖𝑜 = change in input offset voltage
Lower the SVRR, better the op-amp performance

Common Mode Rejection Ratio (CMRR)

 It is the ratio of differential mode voltage gain and common mode voltage gain.It is the
ability of op-amp to reject the signal common to both the inputs.
 Generally, it is high. For 741c, the value is 90db

𝐴𝑑
𝐶𝑀𝑅𝑅 =
𝐴𝑐𝑜𝑚𝑚𝑜𝑛

𝐴𝑑 = differential mode voltage gain

𝐴𝑐𝑜𝑚𝑚𝑜𝑛 = common mode voltage gain

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Generally 𝐴𝑐𝑜𝑚𝑚𝑜𝑛 is very small and 𝐴𝑑 is very large. Hence CMRR is very large.it is expressed
in dB.

Large Signal Voltage Gain

𝑜𝑢𝑡𝑝𝑢𝑡 𝑣𝑜𝑙𝑡𝑎𝑔𝑒
𝑣𝑜𝑙𝑡𝑎𝑔𝑒 𝑔𝑎𝑖𝑛 =
𝑑𝑖𝑓𝑓𝑒𝑟𝑛𝑡𝑖𝑎𝑙 𝑖𝑛𝑝𝑢𝑡 𝑣𝑜𝑙𝑡𝑎𝑔𝑒

 Because the output signal amplitude is much larger than the input signal, the voltage
gain is commonly called as large signal voltage gain.

Output Voltage Swing

 The output voltage swing between -13V to +13V

Output resistance:

 It is the resistance measured at the output terminal of op amp with respect to ground for
741c, the value is 75 ohms.

Power consumption:

 It is the quiescent power consumed by the op amp for its operation. For 741c, the value
is 85mv.

Output short circuit current:

 This is the current that may flow if an op amp get shorted accidentally. For 741c, the
value is 85mv.

Supply Current

 The current drawn by the op-amp from the power supplyIs= 2.8mA

B AC Characteristics:

 For small signal sinusoidal ac applications the ac characteristics such as frequency

response and slew rate are to be considered.

Frequency Response:

 An ideal op-amp have infinite bandwidth .i.e. if its open loop gain is 90dB. With dc signal
its gain should remain the same 90dB through audio and onto high radio frequency.
 But practically op-amp gain decreases at high frequency. This is due to capacitive
component in the equivalent circuit of op-amp.
 For an op-amp with only one break frequency all the capacitor effects can be
represented by a single capacitor C as shown in Fig1.6

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Fig 1.6High Frequency model of an op-amp with single corner frequency representation Circuit

 Due to R0C, the gain decreases by 20 db per decay and the frequency is said to be
“brake or corner frequency”. The corner or break frequency is given by

1
𝐹1 =
2𝜋𝑅0 𝐶

The magnitude of the open loop voltage gain is defined as,

𝐴𝑂𝐿
𝐴 = 𝑓
√(1 + (𝑓 )2
1

𝑓
∅ = −𝑡𝑎𝑛−1 ( )
𝑓1

Fig 1.7 Open loop magnitude characteristics

From the above figure 1.7,

i).For frequency f<<f1, the magnitude of gain is 20log AOL in db.

ii).At frequency f=f1, the gain is 3 db down from the dc value of AOL in db. This frequency f1 is
called corner frequency.

iii).For f>>f1, the gain rolls-off at the rate of -20 db/decade.

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The voltage transfer function in s-domain can be written as,

𝐴𝑂𝐿 𝜔1
𝐴=
(𝑆 + 𝜔1 )

A practical op-amp has number of stages and each stage produces a number of different
break frequencies.

Slew rate:

 The slew rate is defined as the maximum rate of change of output voltage caused by a
step input voltage and is usually specified in V/µs.
 For e.g. A 1V/µs slew rate means that the output rises or falls by 1V in one 1µs.
 Ideal slew rate is infinite meaning that op-amp output voltage should change
instantaneously in response to input step voltage.
 Practical op-amps have specified slew rates from 0.1V/µs to 100V/µs. Slew rate
improves with higher closed loop gain and dc supply voltage.

Causes of Slew Rate

 A capacitor is added internally or externally to op-amp. This capacitor prevents the

output changes immediately to a fast changing input.
 The rate at which the voltage across the capacitor VC increases is given by

𝑑𝑉𝑐 𝐼
|𝑚𝑎𝑥 =
𝑑𝑡 𝐶
𝑑𝑉𝑐 𝐼𝑚𝑎𝑥
𝑆𝑅 = |𝑚𝑎𝑥 =
𝑑𝑡 𝐶

For 741 IC ,

SR = Imax/C = 15µA/30pf = 0.5V/µs

 SR limits the response speed of all large signal wave shapes.

 For e.g. consider a voltage follower whose input is large amplitude, high frequency sine
wave.

v+
vi +
v-
vo


Rf
Fig 1.8 Voltage FollowerCircuit

If VS = Vm sinшt

then V0 = Vm sinωt
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The rate of change of output is given by dV0/dt = Vm ωcosωt

The maximum rate of change of output occurs when cosωt = 1.

i.e.
𝑑𝑉0
𝑆𝑅 = | = 𝑉𝑚 𝜔
𝑑𝑡 𝑚𝑎𝑥

therefore, SR = 2πfVm V/s = 2πfVm/106 V/µs

 If the frequency is less than the SR of op-amp, the output will be undistorted.
 If the frequency of input signal is increased to exceed SR, the output will be distorted.
 The maximum input frequency(fmax) at which we can obtain an undistorted output voltage
of peak value Vm is given by,

𝑆𝑅
𝐹𝑚𝑎𝑥 = ∗ 106
6.28 ∗ 𝑉𝑚

1.6 IDEAL OP-AMP:

Fig 1.9 Ideal Op-Amp Circuit

An ideal op-amp exhibit the following characteristics,

Open loop voltage gain AOL = ∞

Input impedance Ri =∞
Output impedance R0 = 0
Bandwidth BW =∞
Zero offset i.e. Vo = 0 When V1=V2=0
CMRR Infinite
Input offset voltage 0
Input offset current 0
Slew rate Infinite

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Characteristic Curve Of Ideal Op-Amp Or Ideal Voltage Transfer

 These properties cannot be realized in practice. However the use of ideal op-amp model
simplifies the mathematics involved in op-amp circuits.
 Practical op-amp can be made to approximate some of these characteristics.

1.7 OPEN LOOP CONFIGURATION:

 The simplest and possible way to use an op-amp is in the open loop mode.

Fig 1.10 Open loop Non –Inverting Amplifier Circuit

 The supply dc voltage is applied to the op-amp are Vcc and –VEE and the output varies
between Vcc and –VEE.
 Gain is very large in open loop condition, the output voltage Vo is either at its positive
saturation voltage (+Vsat) or negative saturation voltage (-Vsat) as V1>V2 or V2>V1
respectively as shown in above Fig 1.10
 Very small noise voltage present at the input also gets amplified due to its high open
loop gain and op-amp gets saturated.

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  From the above figure 1.10 it shows that the only for small range of input signal (from
point a to b), it behaves linearily.
 This range is very small and practically due to high open loop gain, op-amp either shows
+Vsat or -Vsat level.
 Due to inability of op-amp to work as a linear small signal amplifier in the open loop
mode, so op-amp cannot be generally used in open loop configuration.
 It is rarely used in some applications like voltage comparator, Zero crossing detector etc.

1.8 FEEDBACK CONFIGURATIONS OR CLOSED LOOP CONFIGURATIONS OF OP-

AMP:

Fig 1.11 Closed Loop Configurations of Op-Amp Circuit

 The utility of op-amp increases considerably if it is used in a closed loop mode.The

closed loop mode is possible using feedback.
 The feedback allows feed some part of the output back to the input. In linear applications
the op-amp is used with negative feedback.
 The negative feedback is possible by adding a feedback resistor (Rf).
 The feedback is said to be negative as the Rf connects to the output to the inverting
input terminal.
 The gain resulting with feedback is called closed loop gain of op-amp.Due to Rf, the gain
is reduced.
 The closed loop gain is much less than the open loop gain and is independent of it.

The advantages of negative feedback are,

a) It reduces the gain and makes it controllable.

b) It increases the input resistance.

c) It increases the bandwidth

d) It reduces the possibility of distortion and noise

e) Changes the input and output impedance

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Disadvantage:Reduces the voltage gain

1.9 INVERTING AMPLIFIER:

 This is the most widely used of all the op-amp circuits. The circuit is shown in Fig1.12
 The output voltage v0 is fed back to the inverting input terminal through the Rf-R1
network where Rf is the feedback resistor.
 Input signal vi is applied to the inverting input terminal through R1 and non-inverting
input terminal of op-amp is grounded.

Fig 1.12 Inverting Amplifier Circuit

Assume an ideal op-amp as vd = 0, node ‘a’ is at ground potential and the current i1 through R1
is
𝑉𝑖
𝑖1 =
𝑅1

Also since op-amp draws no current, all the current flowing through R1 must flow through Rf .
The output voltage,
𝑉𝑖 𝑅𝑓
𝑉0 = −𝑖1 𝑅𝑓 = −
𝑅1

Hence , the gain of the inverting amplifier(also referred as closed loop gain) is,

𝑉0 𝑅𝑓
𝐴𝐶𝐿 = =−
𝑉𝑖 𝑅1

Alternative the nodal equation at the node ‘a’

𝑉𝑎− 𝑉𝑖 𝑉𝑎− 𝑉0
+ =0
𝑅1 𝑅𝑓

where va is the voltage at node ‘a’. Since node ‘a’ is at virtual ground va = 0. Therefore we get,
𝑉0 𝑅𝑓
𝐴𝐶𝐿 = =−
𝑉𝑖 𝑅1

The negative sign indicates a phase shift of 180° between vi and v0.

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1.10 NON INVERTING AMPLIFIER:

 If a signal is applied to the non-inverting input terminal and feed back is given as shown
in Fig.1.13
 The circuit amplifies without inverting the input signal. Such a circuit is called non-
inverting amplifier.
 It may also be noted that it is also a negative feed-back system as output is being fed
back to the inverting input terminal.

Fig 1.13 Non –Inverting Amplifier Circuit

 As the differential voltage vd at the input terminal of op-amp is zero, the voltage at node
‘a’is vi, same as the input voltage applied to non-inverting input terminal.
 Now RF and R1 forms a potential divider. Hence

𝑉0 𝑅1
𝑉𝑖=
𝑅1 + 𝑅𝑓

As no current flows into the op-amp.

𝑉0 𝑅1 + 𝑅𝑓 𝑅𝑓
= =1+
𝑉𝑖 𝑅1 𝑅1

Thus for non inverting amplifier the voltage gain,

𝑉0 𝑅𝑓
= 𝐴𝐶𝐿 = 1 +
𝑉𝑖 𝑅1

The gain can be adjusted to unity or more, by proper selection of resistors Rf and R1

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1.11 DIFFERENTIAL AMPLIFIER:

 A circuit that amplifies the

difference between two signals is
called differential amplifier.It is used
in instrumentation circuits.

Fig 1.14 Differential Amplifier Circuit

The nodal equation at node ‘a’ is V3

𝑉3 − 𝑉2 𝑉3 − 𝑉0
+ =0
𝑅1 𝑅2

At node ‘b’ is

𝑉3 − 𝑉1 𝑉3
+ =0
𝑅1 𝑅2

Rearrange we get,(From node a)

1 1 𝑉2 𝑉0
𝑉3 ( + ) − =
𝑅1 𝑅2 𝑅1 𝑅2

From node b,

1 1 𝑉1
𝑉3 ( + ) − =0
𝑅1 𝑅2 𝑅1

Subtract above two equations we get the output voltage is,

𝑅2
(𝑉1 − 𝑉2 ) = 𝑉0
𝑅1

Such a circuit is very useful in detecting very small differences in signals, since the gain R2/R1
can be choosen to be very large.

Common mode Rejection Ratio:

𝐴𝐷𝑀
=𝜌
𝐴𝐶𝑀

 It is the ratio between the differential mode gain to common mode gain.
 For better op-amp, CMRR value is high.(ACM=0)

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1.12 SUMMER:

Op-amp may be designed to sum several input signals either at inverting or non-
inverting input terminal. Such a circuit is called Summer or Summing amplifier.
A. Inverting summing amplifier:

 A typical summing amplifier with three

input voltage V1, V2 and V3, three resistors R1,
R2 and R3 and a Rf as shown in Fig.1.15

Fig 1.15 Inverting summing amplifier Circuit

Analysis:

 Since the input bias current is assumed to be zero, there is no voltage drop across
Rcomp hence positive input terminal is at ground potential and voltage at node ’a’ is
zero.

By KCL the nodal equation is,

𝑉1 𝑉2 𝑉3 𝑉0
+ + + =0
𝑅1 𝑅2 𝑅3 𝑅𝑓

𝑅𝑓 𝑉1 𝑅𝑓 𝑉2 𝑅𝑓 𝑉3
𝑉𝑜 = −( + + )
𝑅1 𝑅2 𝑅3

Thus the output is an inverted weighted sum of inputs

If R1 = R2 = R3 = Rf then

V0 = - (V1+V2+V3)

And also, R1 = R2 = R3 =3 Rf

𝑉1 +𝑉2 +𝑉3
𝑉𝑜 = −( )
3

Output is the average sum of input signal.

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 B. Non Inverting Summing Amplifier:

Fig 1.16 Non Inverting Summing Amplifier Circuit

Let voltage at negative terminal is Va and voltage at positive terminal is also Va.

Nodal equation at node a,

𝑉1 − 𝑉𝑎 𝑉2 − 𝑉𝑎 𝑉3 − 𝑉𝑎
+ + =0
𝑅1 𝑅2 𝑅3

𝑉1 𝑉2 𝑉
𝑅1
+ 𝑅2
+ 𝑅3
3
𝑉𝑎 = 1 1 1
+ +
𝑅1 𝑅2 𝑅3
The op-amp and two resistors Rf and R form a non-inverting amplifier with,
𝑅𝑓
𝑉0 = (1 + )𝑉𝑎
𝑅
1𝑉 𝑉2 𝑉3
𝑅𝑓 𝑅1 + 𝑅2
+
𝑅3
𝑉0 = (1 + ) 1 1 1
𝑅 + +
𝑅1 𝑅2 𝑅3

The output is non-inverted weighted sum of inputs.

Let R1=R2=R3=R=Rf/2
𝑉1 +𝑉2 +𝑉3
2𝑅𝑓 𝑅
𝑉0 = 1 + ( 3 )
𝑅𝑓
𝑅

𝑉1 + 𝑉2 + 𝑉3
𝑉0 = 3 ( )
3

𝑉0 = 𝑉1 + 𝑉2 + 𝑉3

V0 is equal to sum of input signal.

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1.13 SUBTRACTOR:

 Basic differential amplifier can be

used as a subtractor.
 All resistor values are equal. So
output voltage can be derived by using super
position principle.

Fig 1.17 Subtractor Circuit

To find output V01 due toV1 alone and make

V2=0.

The above circuit is non-inverting amplifier with input is V1/2 and output is

𝑉1 𝑅
𝑉01 = 1+ = 𝑉1
2 𝑅

𝑉01 = 𝑉1

To find V02,make V1=0(since amplifier is in inverting mode)

Vo2=-V1

Total output voltage V0=V01+V02=V1-V2

1.14 DIFFERENTIATOR

 Op-amp circuit that contains capacitor at the input is the differentiating amplifier or
differentiator.
 The differentiator is a circuit whose output is proportional to rate of change of its
input signal.

 This means that a fast change to the input voltage signal, the greater the output
voltage change in response.

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  As a differentiator circuit has an output that is proportional to the input change, some
of the standard waveforms such as sine waves, square waves and triangular waves
give very different waveforms at the output of the differentiator circuit.

Fig 1.18 Differentiator Circuit

Analysis:
The node N is a virtual ground potential i.e. VN=0. The current through the capacitor is

𝐶(𝑑 𝑉𝑖− 𝑉𝑁 )
𝑉01= 𝐼𝑐 =
𝑑𝑡
𝐶𝑑 𝑉𝑖
𝑉01= 𝐼𝑐 =
𝑑𝑡

Ic=If
Current If =- V0/Rf
Nodal equation at node N is
𝑉0 𝐶𝑑 𝑉𝑖
+ =0
𝑅𝑓 𝑑𝑡

𝑑 𝑉𝑖𝑛
𝑉0 = −𝑅𝐶
𝑑𝑡

Thus the output voltage V0 is constant ( - R C) times the derivative of the input voltage Vi and
the circuit is a differentiator.

21 MVIT
 Fig 1.19 Differentiator Waveform

APPLICATIONS:

 The differentiator circuit has many applications in a number of areas of electronic

design.
 The op amp differentiator is particularly easy to use and therefore is possibly one
of the most widely used versions.
 The circuit is used in analogue computers where it is able to provide a
differentiation manipulation on the input analogue voltage.
 Possibly the differentiator circuit is used most widely in process instrumentation

1.15 INTEGRATOR:

 An op-amp circuit with capacitor as the feed back element is an integrator circuit.
Integrator is a circuit whose output is proportional to the integral of input
waveform.
 Integrator is obtained by using a basic inverting amplifier configuration if the
feedback resistor Rf is repeated by a Capacitor.
 As its name implies, the Op-amp Integrator is an Operational Amplifier circuit
that performs the mathematical operation of Integration.

 That causes the output to respond to changes in the input voltage over time as
the op-amp integrator produces an output voltage which is proportional to the
integral of the input voltage.

Fig 1.20 Integrator Circuit

The nodal equation at node N is

𝐶𝑓 𝑑𝑉𝑜 𝑉𝑖
+ =0
𝑑𝑡 𝑅1

𝑑𝑉𝑜 −𝑉𝑖
=
𝑑𝑡 𝑅1 𝐶𝑓

22 MVIT
integrating on both sides,

𝑡 𝑡
−1
𝑑𝑉0 = 𝑉𝑖 𝑑𝑡
0 𝑅1 𝐶𝑓 0

𝑡
−1
𝑉0 (𝑡) = 𝑉𝑖 𝑑𝑡 + 𝑉0 (0)
𝑅1 𝐶𝑓 0

Where V0(0) is the intial output voltage.

Fig 1.21 Integrator Waveforms

APPLICATIONS:

 The integrator circuit is mostly used in analog computers, analog-to-digital

converters .
 Wave-shaping circuits. A common wave-shaping use is as a charge amplifier .
 They are usually constructed using an operational amplifier though they can use
high gain discrete transistor configurations.

COMPARISON OF INTEGRATOR AND DIFFERENTIATOR:

WAVEFORM DIFFERENTIATOR INTEGRATOR

Square waveform Spike waveform is obtained Triangular waveform is

as input waveform. obtained as input waveform.

Sine waveform -cos waveform +cos waveform

Cos waveform +Sine waveform -sine waveform

1.16 ZERO CROSSING DETECTOR USING 741 IC

 The zero crossing detector circuit is an important application of the op-amp comparator
circuit. It can also be called as the sine to square wave converter.

23 MVIT
 Anyone of the inverting or non-inverting comparators can be used as a zero-crossing
detector.
 The only change to be brought in is the reference voltage with which the input voltage is
to be compared, must be made zero (Vref = 0V).
 An input sine wave is given as Vin. These are shown in the circuit diagram Fig 1.22 and
input and output waveforms of an inverting comparator with a 0V reference voltage.

Fig 1.22Zero-Crossing Detector Using UA741 op-amp IC

 As shown in Fig 1.23, for a reference voltage 0V, when the input sine wave passes
through zero and goes in positive direction, the output voltage Vout is driven into
negative saturation.
 Similarly, when the input voltage passes through zero and goes in the negative
direction, the output voltage is driven to positive saturation.
 The diodes D1 and D2 are also called clamp diodes. They are used to protect the op-
amp from damage due to increase in input voltage.
 They clamp the differential input voltages to either +0.7V or -0.7V.

 In certain applications, the input voltage may be a low frequency waveform. This means
that the waveform only changes slowly.
 This causes a delay in time for the input voltage to cross the zero- level. This causes
further delay for the output voltage to switch between the upper and lower saturation
levels.
 At the same time, the input noises in the op-amp may cause the output voltage to switch
between the saturation levels.
 Thus zero crossing is detected for noise voltages in addition to the input voltage.
 These difficulties can be removed by using a regenerative feedback circuit with a
positive feedback that causes the output voltage to change faster thereby eliminating the
possibility of any false zero crossing due to noise voltages at the op-amp input.

24 MVIT
 Fig 1.23 Zero-Crossing Detector Using 741IC –Waveforms
 Zero-crossing Detector as Time Marker Generator For an input sine wave, the output of
the zero-crossing detector being a square wave, is further passed through an RC series
circuit. This is shown in the Fig 1.24

Fig 1.24 Zero-Crossing Detector Using Timing Marker Generator

 If the time constant RC is very small compared to the period T of the input sine wave,
then the voltage across R of the RC circuit network called Vr will be a series of positive
and negative pulses.
 If the voltage Vr is applied to a clipper circuit using a diode D, the load voltage V will
have only positive pulses and will clip away the negative pulses.
 Thus, a zero-crossing detector whose input is a sign wave has been converted into a
train of positive pulses at interval T by adding a RC network and a clipping circuit.

25 MVIT
 Fig 1.25 Time Marker Generator Waveform
Zero-crossing Detector as Phase meter
 A zero-crossing detector can be used for the measurement of phase angle between two
voltages.
 The working will be the same as explained in the above circuit. A train of pulses in the
positive and negative cycles are obtained and the time interval between the pulse of sine
wave voltage and that of second sine wave voltage is measured.
 This interval of time is proportional to the phase difference between the two input sine
wave voltages. The range of use of phase meter for measurement is 0° to 360°.

1.17 SCHMITT TRIGGER- REGENERATIVE COMPARATOR:

 If positive feedback is added to the comparator, gain can be increased greatly,

consequently the transfer curve becomes more close to ideal curve.
 For practical circuits it is not possible to maintain loop gain exactly equal to unity
due to power supply & temperature variations.
 Schmitt Trigger is a circuit which converts sine wave to a square wave and saw-
tooth waves and saw-tooth wave into a pulse
 This is also called regenerative comparator. The input voltage VIN triggers
(changes the state of) the output VO every time it exceeds certain voltage levels
called upper threshold voltage VUT and lower threshold voltage VLT.

26 MVIT
 Fig 1.26 Inverting trigger using OP-AMP

 The threshold voltages are obtained by using the voltage divider R1~R2, where the
voltage across R2 is feedback to positive input.When VO = +VSAT ,
 The voltages across R1 is called upper threshold voltage, VUT. VIN>VSAT to cause VO to
switch from +VSAT to –VSAT.

Fig 1.27 Waveform representation of Schmitt trigger

Using voltage divider rule

R1
VUT = ———— * VSAT
R1+R2
If VO = -VSAT, voltage across R1 is called lower threshold voltage VLT. VIN must be slightly more
negative than VLT in order to cause VO to switch from –VSAT + +VSAT
R1
VLT = ——— * (-VSAT)
R1 + R2
 The positive feedback because of its regenerative action will make VO switch faster
between +VSAT and –VSAT. The resistance R3 is used to minimize the offset problem.

27 MVIT
1.18 WINDOW DETECTOR

 To mask the instant at which an unknown input is between two threshold levels can be
achieved by a window detector circuit.
 There are 3 indicators yellow (LED 3) for input too low(<3V), Green (LED 2) for safe
input(3-6V) and red (LED 1) for input >6V.
 They are turned on and off as shown. The unknown input is identified with the help of the
Fig 1.28.

Fig 1.28 Window Detector Circuit

Three Level Comparator with LED Specification

Input (Volts) Yellow LED 3 Green LED 2 Red LED 1

Less than 3V ON OFF OFF

B/W 3& 6V OFF ON OFF

Greater than 6V OFF OFF ON

28 MVIT
1.19 SQUARE WAVE GENERATOR (ASTABLE MULTIVIBRATOR)

Fig 1.29OP-Amp Square –Wave Generator

 A simple op-amp square wave generator is also called a free running oscillator.
 The principle of generation of square wave output is to force an op-amp to operate in the
saturation region.
 Fraction β = R2/(R1+R2) of the output is fed back to the (+) input terminal.
 Thus the reference voltage Vref is βV0 and may take values as +βVsat or – βVsat.The
output is also fed back to the (-) input terminal after integrating by means of a low pass
RC combination.
 Whenever input at the (-) input terminal just exceeds Vref switching takes place resulting
in a square wave output .In astable multivibrator, both the states are quasi stable.

Fig 1.30 Output and Capacitor Voltage Waveforms

 Consider an instant of time when the output is at Vsat.

 The capacitor now starts charging towards +Vsat through resistance R.

29 MVIT
  The voltage at the (+) input terminal is held at +βVsat by R1 and R2 combination.
 This condition continues as the charge on C rises until it has just exceeded +βVsat, the
reference voltage.
 When the voltage at the (-) input terminal becomes greater than this reference volt, the
output is driven to –Vsat.
 At this instant, the voltage on the capacitor is +βVsat.It begins to discharge through R,
that is, charges more and more negatively until voltage just exceeds –βVsat .The output
switches back to +Vsat.
 The frequency is determined by the time it takes the capacitor to charge from –βVsat to
+ βVsat and vice versa.The voltage across the capacitor as a function of time is given by

TIME PERIOD (T):

Voltage across the capacitor as a function of time,

𝑉𝑐(𝑡) = 𝑉𝑓 + (𝑉𝑖 − 𝑉𝑓) 𝑒 − 𝑡/𝑅𝐶 --------------(1) Where Vf is the final voltage(i.e) 𝑉𝑓 = 𝑉𝑠𝑎𝑡.

Vi= initial voltage.

(i.e) 𝑉𝑖 = −𝛽𝑉𝑠𝑎𝑡

At the time 𝑡 = 𝑇1, Voltage across capacitor reaches + βVsat and switching takes place

𝑉𝑐(𝑡) = 𝛽𝑉𝑠𝑎𝑡

Substitute the values in (1)

𝛽𝑉𝑠𝑎𝑡 = 𝑉𝑠𝑎𝑡 + −𝛽𝑉𝑠𝑎𝑡 – 𝑉𝑠𝑎𝑡 𝑒 −𝑇1/𝑅𝐶

𝛽𝑉𝑠𝑎𝑡 = 𝑉𝑠𝑎𝑡 1 − 𝛽 + 1 𝑒 −𝑇1/𝑅𝐶

𝛽 − 1 = −(𝛽 + 1)𝑒 −𝑇1/𝑅𝐶

1 − 𝛽 = (1 + 𝛽)𝑒 −𝑇1/𝑅𝐶

(1 − 𝛽)
= 𝑒 −𝑇1/𝑅𝐶
(1 + 𝛽)

𝑇𝑎𝑘𝑖𝑛𝑔 𝑙𝑛 𝑜𝑛 𝑏𝑜𝑡𝑕 𝑠𝑖𝑑𝑒𝑠

(1 − 𝛽)
ln = −𝑇1/𝑅𝐶
(1 + 𝛽)

(1 + 𝛽)
ln = 𝑇1/𝑅𝐶
(1 − 𝛽)

(1 + 𝛽)
𝑇1 = 𝑅𝐶 ln
(1 − 𝛽)

(1 + 𝛽)
𝑇 = 2𝑇1 = 2𝑅𝐶 ln
(1 − 𝛽)

30 MVIT
 𝐼𝑓 𝑅1 = 𝑅2 , 𝛽 = 0.5

𝑇 = 2𝑅𝐶 𝑙𝑛(1.5/0.5)

Hence time period of astable multivibrator is

T=2.197RC

Frequency of astable multivibrator

f= 1/2 RfC

1.20 MONOSTABLE MULTIVIBRATOR

 A monostable multivibrator (MMV) has one stable state and one quasi-stable state.
 The circuit remains in its stable state till an external triggering pulse causes a transition
to the quasi-stable state.
 The circuit comes back to its stable state after a time period T.
 Thus it generates a single output pulse in response to an input pulse and is referred to
as a one-shot or single shot.

Fig 1.31 Monostable Circuit and Negative Trigger Pulse

Waveform of Vc

Output Waveform of
31 MVIT Pulse Generator
  Monostable multivibrator circuit illustrated in Fig is obtained by modifying the astable
multivibrator circuit by connecting a diode D1 across capacitor C so as to clamp vc at vd
during positive excursion.
 Under steady-state condition, this circuit will remain in its stable state with the output
VOUT = + VOUT or + Vz and the capacitor C is clamped at the voltage VD (on-voltage of
diode VD = 0.7 V).
 The voltage VD must be less than β VOUT for vin< 0. The circuit can be switched to the
other state by applying a negative pulse with amplitude greater than β VOUT – VD to the
non-inverting (+) input terminal.
 When a trigger pulse with amplitude greater than β VOUT – VD is applied, vin goes positive
causing a transition in the state of the circuit to -Vout.
 The capacitor C now charges exponentially with a time constant τ = RfC toward — VOUT
(diode Dl being reverse-biased).
 When capacitor voltage vc becomes more negative than – β VOUT, vin becomes negative
and, therefore, output swings back to + VOUT (steady- state output).
 The capacitor now charges towards + VOUT till vc attain VD and capacitor C becomes
clamped at VD. The trigger pulse, capacitor voltage waveform and output voltage
waveform are shown in figures respectively.
 The width of the trigger pulse T must be much smaller than the duration of the output
pulse generated i.e. TP « T. For reliable operation the circuit should not be triggered
again before T.

During the quasi-stable state, the capacitor voltage is given as

The voltage across the capacitor is given by:

𝑉𝑐(𝑡) = 𝑉𝑓 + (𝑉𝑖 – 𝑉𝑓) 𝑒 – 𝑡/𝑅𝐶 ______________ ( 1 )

where Vf – final voltage

Vi – initial voltage

substitute 𝑣𝑓 = −𝑉𝑠𝑎𝑡 ; 𝑉𝑖 = 𝑉𝐷 ; 𝑉𝑐(𝑡) = − 𝛽 𝑉𝑠𝑎𝑡 ; 𝑡 = 𝑇 in equation (1)

𝑇1
−𝛽 𝑉𝑠𝑎𝑡 = −𝑉𝑠𝑎𝑡 + 𝑉𝐷 + 𝑉𝑠𝑎𝑡 𝑒 −𝑅𝐶

𝑉𝑠𝑎𝑡 = 𝑉𝑠𝑎𝑡 [ −1 + ( 1 + 𝑉𝐷 / 𝑉𝑠𝑎𝑡 ) 𝑒 −𝑇1/𝑅𝐶 ]

−𝛽 = −1 + ( 1 + 𝑉𝐷/𝑉𝑠𝑎𝑡) 𝑒 −𝑇1/𝑅𝐶

1 − 𝛽 = ( 1 + 𝑉𝐷/𝑉𝑠𝑎𝑡) 𝑒 −𝑇1/𝑅𝐶

Taking ln on both the sides ,

32 MVIT
 𝑉𝐷
𝑙𝑛 ( 1 − 𝛽 ) = 𝑙𝑛 ( 1 + ) − 𝑇/𝑅𝐶
𝑉𝑠𝑎𝑡
𝑉𝐷
𝑙𝑛 ( 1 − 𝛽 ) − 𝑙𝑛 ( 1 + ) = − 𝑇/𝑅𝐶
𝑉𝑠𝑎𝑡
𝑉𝐷
𝑙𝑛 [ ( 1 − 𝛽 ) / ( 1 + ) ] = − 𝑇/𝑅𝐶
𝑉𝑠𝑎𝑡
𝑉𝐷
𝑙𝑛 [ ( 1 − 𝛽 ) / ( 1 + ) ] 𝑅𝐶 = −𝑇
𝑉𝑠𝑎𝑡
𝑉𝐷
𝑇 = 𝑅𝐶 𝑙𝑛 [ ( 1 + )/(1−𝛽)]
𝑉𝑠𝑎𝑡

𝐼𝑓 𝑉𝑠𝑎𝑡 >> 𝑉𝐷 ; 𝑅1 = 𝑅2 ; 𝛽 = 0.5 𝑎𝑛𝑑 𝑛𝑒𝑔𝑙𝑒𝑐𝑡 𝑉𝐷 / 𝑉𝑠𝑎𝑡 , 𝑇𝑕𝑒𝑛

T = 0.69 RC

1.21 VOLTAGE TO CURRENT CONVERTER

 In many applications, we have to convert voltage signal to a proportional output current

.for this, there are two types of circuits are 1) V-I converter with floating load and 2) V-
I converter with grounded load

A) V-I Converter With Floating Load

Fig 1.32 V-I converter with floating load

The above figure1.32 shows the V to I converter in which load ZL is floating .

Voltage at node ‘a’ is Vi

Therefore
𝑉𝑖 = iL R1
(since IB=0)
Vi
iL =
R1

33 MVIT
  This means that in the circuit shown in the figure1.32 gives an input voltage Vin is
converted into an output current of Vin/R1 .
 In other words ,input voltage Vin appears across R1.If R1 is a precision resistor ,the
V
output current( iL = R i ) will be precisely fixed .
1
 The voltage to current converter can be used in such applications as low –voltage dc
and ac voltmeters, diode match finders,light emitting diodes (LEDs) and zener diode
testers.
B) V-I Converter With grounded load

Fig 1.33 V-I Converter With grounded load circuit

Apply KVL 𝑖1 + 𝑖2 = 𝑖𝐿

Vi − V1 Vo − V1
iL = +
𝑅 𝑅
𝑅𝑉𝐿 = 𝑉𝑜 + 𝑉𝑖 − 2V1
𝑉𝑜 + 𝑉𝑖 − iL R
Vi =
2

Op-amp is used in non-inverting mode, the gain is 1+R/R=2; Vo/V1=2, VO=2V,

Vo =2V1=𝑉𝑜 + 𝑉𝑖 − iL R

𝑉𝑖 = iL R
Vi
iL =
𝑅
The input impedance of a non-Inverting amplifier is very high , and the circuit is having the
advantage of drawing very little current from the source.It is used for low voltage dc and ac
voltmeter, LED & Zener diode tester.

34 MVIT
1.22 CURRENT TO VOLTAGE CONVERTER

 Photo diode, Photocell, Photo voltaic cell gives an output current that is proportional to
incident energy or light.
 So these output are converted to voltage by using Ito V converters

Fig 1.34 Current to Voltage Converter

 The negative terminal is virtual ground ,so there will not be current flow happens
through Rs and current Iin flows trough Rf.

Output Voltage

𝑉𝑜 = −𝐼in R f

 The Cf is sometimes shunt with Rf and the Cf is used to reduce high frequency noise
and oscillation.

1.23 FILTER AND ITS TYPE

 Electric filters are circuit that passes the electric signals of specified band of frequencies
and attenuates the signal f frequencies outside the band.
 They are used in circuits which require the separation of signals according to their
frequencies.
 Filters are widely used in communication and signal processing and in one form or
another in almost all sophisticated electronic instruments.
 Such filters can be built from 1) passive RLS components ii) crystal or iii) resistors,
capacitors and op-amps (active filters).
 Active filters are in its low – pass, high –pass, band-pass, band rejection filters.

ACTIVE FILTERS AND PASSIVE FILTERS

 Passive filters are built by using passive components like resistors, capacitors, inductors.
They are suitable for high frequencies i.e.
 Radio frequencies. However, at audio frequencies, inductors become problematic, as
the inductor become large, heavy and expensive.

35 MVIT
  For low frequency application, more number of turns of wire must be used which in turn
adds to series resistance degrading inductor’s performance i. ,low Q, resulting in high
power dissipation.
 The active filter overcomes the aforementioned problems if the passive filters.
 They use op-amp as the active elements, and resistors and capacitors as the passive
elements.
 The active filters, by enclosing a capacitor in the feedback loop, avoid using inductors, in
this way, inductor less active RC filters can be obtained.

Advantage of Op-amp filters:

 It provides high gain, offers high input impedance and low output impedance. Improved
load drive capacity
A. FIRST ORDER LOW PASS FILTER

Fig 1.35 First Order Low Pass Filter

Fig 1.36 Frequency Response

 A first order filter consist of a single RC network connected to the non – inverting
terminal of a non- op-amplifier and is shown in Fig1.35
 Resistors Ri and RF determine the gain of the filter pass band.

The voltage V1 across the capacitor C in the s- domain is

36 MVIT
 1
𝑠𝐶
𝑉1 𝑠 = 1 𝑉𝑖 𝑠 … … . .eq 1
𝑅+
𝑠𝐶

𝑉1 𝑠 1
= …….eq 2
𝑉𝑖 𝑠 𝑅𝐶𝑠 + 1

Where 𝑉(𝑠) is the Laplace transform of v in time domain.

The closed loop gain A0 of the op-amp is 𝐴0 =

𝑉0 𝑠 𝑅𝐹
𝐴0 = = 1+ …….eq 3
𝑉1 𝑠 𝑅𝑖

So, the overall transfer function H(s)

𝑉0 𝑠 𝑉0 𝑠 𝑉1 𝑠 𝐴0
𝐻 𝑠 = = =
𝑉𝑖 𝑠 𝑉1 𝑠 𝑉𝑖 𝑠 𝑅𝐶𝑠 + 1

𝐴0
𝐻 𝑠 = …….eq 4
𝑅𝐶𝑠 + 1
1
Let 𝜔𝑕 = 𝑅𝐶

𝐴 𝜔
Therefore 0 𝑕
𝐻 𝑠 = 𝑠+𝜔 …….eq 5 This is the standard form of transfer function of a first order
𝑕
low pass system.

Put 𝑠 = 𝑗𝜔 in equation 4

𝐴0
𝐻 𝑗𝜔 =
𝑅𝐶 𝑗𝜔 + 1

𝐴0
=
𝑅𝐶 𝑗2𝜋𝑓 + 1
1
Where 𝑓𝑕 = 2𝜋𝑅𝐶

𝐴0
𝐻 𝑗𝜔 = 𝑓
……..eq 6
𝑗𝑓 +1
𝑕

Case 1: At low frequency 𝒇 ≪ 𝒇𝒉

𝐻 𝑗𝜔 ≈ 𝐴0

Case 2: At 𝒇 = 𝒇𝒉

𝐴0
𝐻 𝑗𝜔 = = 0.707 𝐴0 ……..eq 7
√2

Case 3: At very high frequency 𝒇 ≫ 𝒇𝒉

37 MVIT
 𝐻 𝑗𝜔 ≪ 𝐴0

At f=0, gain 𝐴0 is maximum

At 𝑓𝑕 , gain 𝐴0 falls to0.707 𝐴0

The frequency between 0 to 𝑓𝑕 is called pass band of low pass filter

𝑓 > 𝑓𝑕 the gain A0 decreases at constant rate of -20 dB/ decade stop band

Filter design:

1. Choose fH cut off frequency

2. Select C≤ 1µF

3. Calculate R using
1
𝑓𝑕 =
2𝜋𝑅𝐶
4. Select values of R1 and Rf depending on the desired pass band gain Af using

Af = 1+ (Rf /R1)

SECOND ORDER ACTIVE FILTER or Sallen key filter

 Improved filter response can be obtained by a second order active filter. It consists of
two RC pairs and has a roll of -40db/decade

Fig 1.37 Second Order Active Filter Circuit

 The gain of the second order filter is set by R1 and Rf while the high cut off frequency
is set by R2,R3,C2,C3, as follows

1
𝑓𝑕 =
2𝜋 𝑅2 𝑅3 𝐶2 𝐶3

 Further more for a second order Butter worth response, the voltage gain magnitude
equation is

38 MVIT
 𝑣𝑜 𝐴
=
𝑣𝑖𝑛 𝑓 4
1+ 𝑓𝑕

Where
𝑅𝐹
𝐴=1+ = a pass band gain of the filter
𝑅1

f = frequency of the input signal

Fig 1.38 Second order low –pass active filter response for different damping (unity gain Ao=1)

A. HIGH PASS FILTER

 High passes filer is the complement of Low pass filter. It can be obtained by
interchanging R and C in low Pass configuration

First Order High Passs Filter

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 Fig 1.39 First Order High Pass Filter Circuit

The voltage V1 across the capacitor C in the s- domain is

𝑅
𝑉1 𝑠 = 1 𝑉𝑖 𝑠 … … . .eq 1
𝑅 + 𝑠𝐶

𝑉1 𝑠 𝑠𝐶𝑅
= …….
𝑉𝑖 𝑠 𝑅𝐶𝑠 + 1

The closed loop gain A0 of the op-amp is 𝐴0 =

𝑉0 𝑠 𝑅𝐹
𝐴0 = = 1+ …….eq 3
𝑉1 𝑠 𝑅𝑖

So, the overall transfer function H(s)

𝑉0 𝑠 𝑉0 𝑠 𝑉1 𝑠 𝐴0 𝑠𝐶𝑅
𝐻 𝑠 = = =
𝑉𝑖 𝑠 𝑉1 𝑠 𝑉𝑖 𝑠 𝑅𝐶𝑠 + 1

𝐴0 𝑠𝐶𝑅
𝐻 𝑠 = …….eq 4
𝑅𝐶𝑠 + 1

Put 𝑠 = 𝑗𝜔 in equation 4

𝐴0 𝑗𝜔𝐶𝑅 𝐴0 𝑗2𝜋𝑓𝐶𝑅
𝐻 𝑗𝜔 = =
𝑅𝐶 𝑗𝜔 + 1 𝑅𝐶 𝑗2𝜋𝑓 + 1
1
Let 𝑓𝐿 = 2𝜋𝑅𝐶
lower cut off frequency

𝑓
𝐴0 (𝑗 )
𝑓𝐿
𝐻 𝑗𝜔 = 𝑓
……..eq 6
𝑗𝑓 +1
𝐿

Case 1: At low frequency 𝒇 ≪ 𝒇𝒉

𝐻 𝑗𝜔 ≪ 𝐴0 ≈ 0

Case 2: At 𝒇 = 𝒇𝒉

𝐴0
𝐻 𝑗𝜔 = = 0.707 𝐴0 ……..eq 7
√2

Case 3: At very high frequency 𝒇 ≫ 𝒇𝒉

𝐻 𝑗𝜔 ≈ 𝐴0

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 Fig 1.40 Magnitude response of first order high pass filter

SECOND ORDER HIGH PASS ACTIVE FILTER or Sallen key filter

 Improved filter response can be obtained by a second order active filter. It consists of
two RC pairs and has a roll of -40db/decade

Fig 1.41 Second Order High Pass Active Filter Circuit

The gain of the second order filter is set by R1 and Rf while the low cut off frequency is set
by R2,R3,C2,C3, as follows

1
𝑓𝐿 =
2𝜋 𝑅2 𝑅3 𝐶2 𝐶3

Further more for a second order Butter worth response, the voltage gain magnitude equation is

𝑣𝑜 𝐴
=
𝑣𝑖𝑛 𝑓𝐿 4
1+
𝑓

Where
𝑅𝐹
𝐴=1+ = a pass band gain of the filter
𝑅1

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 f = frequency of the input signal

Fig 1.42 Comparison of magnitude response of first order and second order high pass filter

B. BAND PASS FILTER

 A BPF has a pass band between 2 cut off frequency fH and fL such that fH > fC. Any input
frequency outside this band is attenuated.

Basically there are 2 types of BPF namely

1) Wideband pass (Quality factor Q<10)

2) Narrow band pass(Q>10) where Q is a measure of selectivity ,higher the value of Q, the
more selective is t he filter or its bandwidth is narrower.
The relationship between Q , 3dB bandwidth and centre frequency fC is given by

𝑓𝐶 𝑓𝐶
𝑄= =
𝐵𝑊 𝑓𝑕 − 𝑓𝑙

For wide band –pass filter the centr frequency fc can be defined as

𝑓𝐶 = 𝑓𝑕 𝑓𝑙

Where 𝑓𝑕 = high cut off frequency

𝑓𝑙 = low cut off frequency

In narrow band-pass filter, the output voltage peaks at the centre frequency

1. NARROW BAND-PASS FILTER

This filter use 2 feedback paths and the OP AMP is used in the inverting mode. Narrow
BPF is designed for specific value of center frequency fc , Q.

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 Fig 1.43 Narrow Band-Pass Filter Circuit

Design Calculation:

Choose C1 = C2 = C
𝑄
𝑅1 =
2𝛱𝑓𝐶 𝐶 𝐴𝑓

𝑄
𝑅2 =
2𝛱𝑓𝐶 𝐶(2𝑄 2 − 𝐴𝑓 )

𝑄
𝑅3 =
𝛱𝑓𝐶 𝐶

Where gain is given by

𝑅3
𝐴𝑓 =
2𝑅1

And gain should satisfy

𝐴𝑓 < 2𝑄 2

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2. WIDE BAND PASS FILTER

Fig 1.44 Wide band pass filter

 A wide bandpass filter can be formed by simply cascading high-pass and low-pass
sections and is generally the choice for simplicity of design and performance though
such a circuit can be realized by a number of possible circuits.
 To form a ± 20 db/ decade bandpass filter, a first-order high-pass and a first-order low-
pass sections are cascaded.
 For a ± 40 db/decade bandpass filter, second-order high- pass filter and a second-order
low-pass filter are connected in series, and so on.
 It means that, the order of the bandpass filter is governed by the order of the high-pass
and low-pass filters.

Fig 1.45 Frequency Response Wide band pass filter

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C. BAND REJECT FILTER:
 The band-pass fil-ter passes one set of frequen-cies while reject-ing all others. The
band-stop filter does just the opposite.
 It rejects a band of frequencies, while passing all others.
 This is also called a band-reject or band-elimination filter. Like band-pass filters, band-
stop filtersmay also be classified as (i) wide-band and (ii) narrow band reject filters.
 The narrow band reject filter is also called a notch filter. Because of its higher Q, which
exceeds 10, the bandwidth of the narrow band reject filter is much smaller than that of a
wide band reject filter.

1. WIDE BAND REJECT FILTER:

Fig 1.46 Wide Band Reject Filter Circuit And FrequencyResponse

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 A wide band-stop filter using a low-pass filter, a high-pass filter and a summing amplifier
is shown in Fig1.46
 For a proper band reject response, the low cut-off frequency fL of high-pass filter must
be larger than the high cut-off frequency fH of the low-pass filter.
 In addition, the pass-band gain of both the high-pass and low-pass sections must be
equal.
1. NARROW BAND REJECT FILTER

Fig 1.47 Narrow Band Reject Filter Circuit

Fig 1.48 Twin T Notch Passive Filter

 This is also called a notch filter. It is commonly used for attenuation of a single frequency
such as 60 Hz power line frequency hum.
 The most widely used notch filter is the twin-T network illustrated in fig. (a). This is a
passive filter composed of two T-shaped networks.
 One T-network is made up of two resistors and a capacitor, while the other is made of
two capacitors and a resistor.One drawback of above notch filter (pas-sive twin-T
network) is that it has relatively low figure of merit Q.

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  However, Q of the network can be increased significantly if it is used with the voltage
follower, as illustrated in fig. (a).
 Here the output of the volt-age follower is supplied back to the junction of R/2 and 2 C.
The frequency response of the active notch filter is shown in fig (b).
 Notch filters are most commonly used in communications and biomedical instruments for
eliminating the undesired frequencies.
 A mathematical analysis of this circuit shows that it acts as a lead-lag circuit with a
phase angle, shown in fig. (b).
 Again, there is a frequency fc at which the phase shift is equal to 0°. In fig. (c), the
voltage gain is equal to 1 at low and high frequencies.
 In between, there is a frequency fc at which voltage gain drops to zero. Thus such a
filter notches out, or blocks frequencies near fc.
 The frequency at which maximum attenuation occurs is called the notch-out frequency
given by

1
𝑓𝐶 =
2𝜋𝑅𝐶

 Notice that two upper capacitors are C while the capacitor in the centre of the network is
2 C.
 Similarly, the two lower resistors are R but the resistor in the centre of the network is 1/2
R. This relationship must always be maintained.

Fig1.49 Twin T Active Notch Filter

1.24 INSTRUMENTATION AMPLIFIER

 In many industrial and consumer applications the measurement and control of physical
conditions are very important.
 For example. ,Measurement of temperature and humidity inside a dairy or meat plant
permit the operator to make necessary adjustment to maintain product quality.
 Similarly precise temperature control plastic furnace is needed to produce a particular
type of plastic.

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  Generally, s transducer is used at measuring site to obtain the required information
easily and safely.
 The transducer is a device that converts one form of energy into another.
 An instrumentation system is used to measure the output signal produced by a
transducer and often to control the physical signal producing it.

Fig 1.50 Block diagram of Instrumentation Amplifier

 The input stage is composed of a pre-amplifier and some sort of transducer, depending
on the physical quantity to be measured.
 The output stage may use devices such as meters, oscilloscope, charts, or magnetic
recorders.

Important features of insrtrumentation amplifier are

1. High gain accuracy

2. High gain CMRR
3. High gain stability with low temperature coefficient
4. Low dc offset
5. Low output impedance

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 Fig 1.51 Instrumentation Amplifier Circuit Diagram

The output of instrumentation amplifier is given by

𝑅2
𝑉𝑜 = − 𝑉 ′ − 𝑉2 ′
𝑅1 1

Since no current flows into op-amp , the current I flowing (upwards) in Ris given by

𝑉1 ′ − 𝑉2 ′
𝐼=
𝑅

and passes through R’

𝑅′
𝑉1 ′ = 𝐼𝑅 ′ + 𝑉1 = 𝑅
𝑉1 − 𝑉2 + 𝑉1

𝑅′
𝑉2 ′ = −𝐼𝑅 ′ + 𝑉2 = − 𝑉 − 𝑉2 + 𝑉2
𝑅 1

Putiing 𝑉1 ′ , 𝑉2 ′ in Vo , we obtain

𝑅2 𝑅 ′ 𝑅′
𝑉𝑜 = − 𝑉 − 𝑉2 + 𝑉1 + 𝑉 − 𝑉2 − 𝑉2
𝑅1 𝑅 1 𝑅 1

𝑅2 𝑅′
𝑉𝑜 = − 2 𝑉 − 𝑉2 + 𝑉1 − 𝑉2
𝑅1 𝑅 1

𝑅2 𝑅′
𝑉𝑜 = − 1+2 𝑉1 − 𝑉2
𝑅1 𝑅

If 𝑅2 = 𝑅1 = 𝑅 ′

𝑉𝑜 = −3(𝑉1 − 𝑉2 )

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 Fig 1.52 Instrumentation amplifier with Transducer Bridge

 The practical circuit to measure the variation in a physical quantity is shown in Figure
above.
 Initially, the bridge is balanced to get the output to be zero.
 As the physical quantity varies, the resistance in one arm is varied,
therefore V 1 ≠ V 2 and as a consequence, the output shown in the display device is not
equal to zero

1.25 LOGARITHMIC AMPLIFIER:

Fig 1.53 Logarithmic Amplifier Circuit

 The fundamental log-amp circuit is shown in the Fig 1.53 where a grounded base
transistor is placed in the feedback path.
 Since the collector is held at virtual ground and the base is also grounded, the
transistor’s voltage-current relationship becomes that of a diode and is given by

𝐼𝐸 = 𝐼𝑆 𝑒 𝑞𝑉𝑒 𝑘𝑇
− 1 ………………………….eq 1

SinceIC = IEfor a grounded base transistor

𝐼𝐶 = 𝐼𝑆 (𝑒 𝑞𝑉𝑒 𝑘𝑇
− 1) ………………………… eq 2

IS = emitter saturation current ≈ 10-13 A

k = Boltzman’s constant
T= absolute temperature(in o K)
𝐼𝐶
= 𝑒 𝑞𝑉𝑒 𝑘 𝑇 − 1 … … … … … eq 3
𝐼𝑆

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 or

𝐼𝐶
𝑒 𝑞𝑉𝑒 𝑘𝑇
= +1
𝐼𝑆
𝐼
≈ 𝐼𝐶
𝑆

Taking natural log on both sides

𝑘𝑇 𝐼
𝑉𝑒 = 𝑞
ln (𝐼𝐶 ) ……. eq 4
𝑆

Also from Fig 1.53

𝑉 𝑖𝑛
𝐼𝐶 = 𝑅1
…………………eq 5

Since transistor in feedback loop is npn transistor and base is grounded. VE = -VO

𝑘𝑇 𝑉𝑖𝑛 𝑘𝑇 𝑉𝑖𝑛
𝑉𝑜 = − ln ( ) = − ln ( ) … … … … … … … … … … .eq 6
𝑞 𝐼𝑆 𝑅1 𝑞 𝑉𝑟𝑒𝑓

Where 𝑉𝑟𝑒𝑓 = 𝐼𝑆 𝑅1

 Thus output voltage is proportional to the logarithm of input voltage. although the circuit
gives natural log (ln), on can find 𝑙𝑜𝑔10 by proper scaling

𝑙𝑜𝑔10 𝑋 = 0.4343 ln 𝑋

Drawback

 The drawback of this circuit is IS varies from transistor to transistor and with temperature,
hence a stable reference voltage 𝑉𝑟𝑒𝑓 can’t be obtained.
 This is eliminated by temperature compensation technique.
 The input is applied to one log-amp while a reference voltage is applied to another log-
amp.
 The 2 transistors are integrated close together in the same silicon wafer. This provides a
close match of saturation currents and ensures good thermal tracking.

Fig 1.54 Logarithmic Amplifier Circuit with two transistors

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 Log-amp with saturation and temperature compensation technique

At stage 1

Assume 𝐼𝑆1 = 𝐼𝑆2 = 𝐼𝑆 ……………..eq 7

𝑘𝑇 𝑉𝑖
And 𝑉1 = − ln ( ) ……………. eq 8
𝑞 𝐼 𝑆 𝑅1

𝑘𝑇 𝑉𝑟𝑒𝑓
𝑉2 = − ln ( ) … … … … … … … … .eq 9
𝑞 𝐼𝑆 𝑅1

At stage 2

𝑘𝑇 𝑉𝑖 𝑉𝑟𝑒𝑓
𝑉0 = 𝑉1 − 𝑉2 = ln − ln⁡( ]
𝑞 𝐼𝑆 𝑅1 𝐼𝑆 𝑅1

𝑘𝑇 𝑉𝑖
𝑉0 = ln ………….eq 10
𝑞 𝑉 𝑟𝑒𝑓

At stage 3

𝑅2 𝑘𝑇 𝑉𝑖
𝑉0 = 1 + ln … . . eq 11
𝑅𝑇𝐶 𝑞 𝑉𝑟𝑒𝑓

1.26 ANTILOG AMPLIFIER:

Fig 1.55 Antilog Amplifier Circuit

52 MVIT
  The input Vi is fed into the temperature compensating voltage divider R2 and RTC
and then to the emitter of Q2.
 The output VO of the anti-log amplifier is fed back to the inverting input of A1
through resistor R1. VBE of transistor Q1 and Q2 can be given by

𝑘𝑇 𝑉𝑜
𝑉𝑄1 𝐵−𝐸 = ln ( ) … … … … … … .eq 1
𝑞 𝐼𝑆 𝑅1

𝑘𝑇 𝑉𝑟𝑒𝑓
𝑉𝑄2 𝐵−𝐸 = ln ( ) … … … … … … .eq 2
𝑞 𝐼𝑆 𝑅1

Since the base Q1 is tied to ground, we get

𝑘𝑇 𝑉𝑜
𝑉𝐴 = −𝑉𝑄1 𝐵−𝐸 =− ln ( ) … … … … … … .eq 3
𝑞 𝐼𝑆 𝑅1

The base voltage𝑉𝐵 of Q2

𝑅𝑇𝐶
𝑉𝐵 = 𝑉
𝑅𝑇𝐶 + 𝑅2 𝑖

the voltage at emitter of Q2 is

VQ2 E= VB + VQ2 E-B

𝑅𝑇𝐶 𝑘𝑇 𝑉 𝑟𝑒𝑓
Or 𝑉𝑄2 𝐸 = 𝑅𝑇𝐶 + 𝑅2
𝑉𝑖 − 𝑞
ln ( 𝐼 )
𝑆 𝑅1

But the emitter voltage of Q2 is VA i.e VA =VQ2 E

𝑘𝑇 𝑉𝑜 𝑅𝑇𝐶 𝑘𝑇 𝑉
Or , − 𝑞
ln ( 𝐼 ) = 𝑉𝑖 − ln ( 𝐼 𝑟𝑒𝑓 )
𝑆 𝑅1 𝑅𝑇𝐶 + 𝑅2 𝑞 𝑅
𝑆 1

𝑅𝑇𝐶 𝑘𝑇 𝑉0 𝑉𝑟𝑒𝑓
𝑉𝑖 = − ln − ln⁡
( ]
𝑅𝑇𝐶 + 𝑅2 𝑞 𝐼𝑆 𝑅1 𝐼𝑆 𝑅1

−𝑞 𝑅𝑇𝐶 𝑉𝑜
𝑉𝑖 = ln( )
𝑘𝑇 𝑅𝑇𝐶 + 𝑅2 𝑉𝑟𝑒𝑓

Taking antilog

𝑉𝑜 = 𝑉𝑟𝑒𝑓 𝑎𝑛𝑡𝑖𝑙𝑜𝑔 (−𝐾 𝑉𝑖𝑛 )

−𝑞 𝑅𝑇𝐶
Where K= 𝑘𝑇 𝑅𝑇𝐶 + 𝑅2

1.27 MULTIPLIER:

The application of multiplier are

 Frequency doubling
 Frequency shifting
 Phase angle detection

53 MVIT
  Real power computations
 Multiplying two signals
 Dividing and squaring of signals

 A basic multiplier with 2 input signals Vx and Vy is shown below. The output is the
product of 2 inputs divided by a reference voltage Vref.

Fig 1.56 Multiplier Circuit

𝑉 𝑉𝑦
ie𝑉𝑜 = 𝑉𝑥
𝑟𝑒𝑓

if Vref = 10 volts

hence VO = VxVy/ 10

As long as Vx<Vref and Vy<Vref , then the output of the multiplier will not saturate.

 If both inputs are positive, IC is said to be one quadrant multiplier.

 A Two quadrant multiplier will function properly if one input is held positive and the
other is allowed to swing both positive and negative.
 If both inputs may be either positive or negative then IC is a four quadrant multiplier.
 One commonly used technique to make multiplier circuit is log-antilog method.
 The log-antilog method relies on the mathematical relationship that the sum of 2
numbers equals the log of product of those numbers.
 (lnVx+lnVy)=ln(VxVy) This is shown in Fig 1.57

Fig 1.57 Log-antilog technique for multiplier

54 MVIT
 Fig 1.58 Some of the multiplier IC are AD533 and AD534.

Application of Multiplier - Frequency doubling

 The multiplication of two sine waves of the same frequency, but of possibly different
amplitudes and phase allows to double the frequency and to directly measure the real
power

𝑣𝑥 = 𝑉𝑥 sin 𝜔𝑡

𝑣𝑦 = 𝑉𝑦 sin(𝜔𝑡 + 𝜃)

 Where 𝜃 is the phase difference between the two signasl.

 Applying these signals to the input of a four quadrant multilplier will yield an output as

𝑉𝑥 sin 𝜔𝑡 𝑉𝑦 sin(𝜔𝑡 + 𝜃)
𝑉𝑜 =
𝑉𝑟𝑒𝑓

𝑉𝑥 𝑉𝑦 sin 𝜔𝑡 (sin 𝜔𝑡 𝑐𝑜𝑠𝜃 + 𝑠𝑖𝑛 𝜃 cos 𝜔𝑡)

𝑉𝑜 =
𝑉𝑟𝑒𝑓

𝑉𝑥 𝑉𝑦 ( sin2 𝜔𝑡 𝑐𝑜𝑠𝜃 + sin 𝜔𝑡 𝑠𝑖𝑛 𝜃 cos 𝜔𝑡)

=
𝑉𝑟𝑒𝑓

but 𝑠𝑖𝑛2 𝑎 = 1 − 𝑐𝑜𝑠 2 𝑎

and

1 1
𝑐𝑜𝑠 2 𝑎 = + cos 2𝑎
2 2
then

1 1
𝑠𝑖𝑛2 𝑎 = 1 − − cos 2𝑎
2 2
1 1
𝑠𝑖𝑛2 𝑎 = − cos 2𝑎
2 2
𝑉𝑥 𝑉𝑦 1 1
So 𝑉𝑜 = 𝑉 (( 2 − 2 cos 2𝜔𝑡) 𝑐𝑜𝑠𝜃 + sin 𝜔𝑡 𝑠𝑖𝑛 𝜃 cos 𝜔𝑡)
𝑟𝑒𝑓

1
But, sin 𝑎 cos 𝑎 = sin 2𝑎
2

55 MVIT
 𝑉𝑥 𝑉𝑦
𝑉𝑜 = ( 𝑐𝑜𝑠 𝜃 − cos 2𝜔𝑡 cos 𝜃 + sin 2 𝜔𝑡 𝑠𝑖𝑛 𝜃 )
2𝑉𝑟𝑒𝑓

𝑉𝑥 𝑉𝑦 𝑉𝑥 𝑉𝑦
𝑉𝑜 = 𝑐𝑜𝑠 𝜃 − (cos 2𝜔𝑡 cos 𝜃 + sin 2 𝜔𝑡 𝑠𝑖𝑛 𝜃 )
2𝑉𝑟𝑒𝑓 2𝑉𝑟𝑒𝑓

 The first term is a DC and is set by the magnitude of the signal and phase difference and
the second term varies with the time , but at the twice the frequency of the input (2𝜔)

1.28 PRECISION RECTIFIER (VOLTAGE REGULATOR)

 The major limitation of ordinary diode is that it cannot rectify voltages below 0.6 V
 A circuit acts like an idela diode can be designed by placing dioed in feedback loop
of an op-amp as shown in fig 1.59(a) . It is also known as super diode
 Here the cut in voltage is divide by the open loop gain AOL (~104) of the op-amp so
that 0.6V is virtually eliminated.
 When Vin> 0.6 V / AOL then the ouput Voa of op-amp exceeds 0.6V and diode D
conducts
 This the circuit acts like a coltage follower for input Vin > 0.6V/AOL and ouptu follows
the input voltage Vin during positive half cycles as shown in fig 1.59(b)
 When Vin is negative or less than 0.6V/AOL, the diode D is off and no current is
deliverd to the load RL except for small bias current of the op-amp and the reverse
saturation current. Of the diode. This is called as the precision rectifier and is capbe
of rectifying input signals of the order of mV.

Fig 1.59 (a) Precision diode (b) input and output waveforms

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HALF WAVE- RECTIFIER

Fig 1.60 (a) ideal half wave rectifier (b) input/ output waveforms

 An inverting amplifier can be converter into ideal half-wave rectifier adding two diodes as
shown in fig 1.60(a).
 When Vin is positive, diode D1 conducts causing Voa to go to negative by one diode
drop (~0.6V)
 Hence D2 is reverse biased. The output voltage V0 is zero, because for all practical
purpose, no current flow through Rf and the input current flows through D1.
 For negative input ie Vin <0, Diode D2 conducts and D1 is OFF.
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  The negative input V1 forces the op-amp output Voa positive and causes D2 to conduct.
The circuit then acts like an inverter for Rf=R1 and output vo becomes positive.
 The input and output waveforms are shown in fig 1.60(b).
 The op-amp in the circuit 1.60 (a) must be a high speed op-amp since it alternates
between open loop and closed loop operations, the principal limitation of this circuit is
the slew rate of the op-amp.
 As the input passes through zero, the op-amp output Voa must change from 0.6V to -
0.6V or vice-versa as quickly as possible on order to switch over the conduction from
one diode to the other.

FULL WAVE RECTIFIER

 A full wave rectifier or absolute value circuit is shown in fig 1.61 (a)
 For positive input, i.e Vi>0, diode D1 is ON and D2 is OFF. Both the op-amps A1 and A2
act as inverter as shown in equivalent circuit in fig 1.61(b). it can be seen that Vo=Vi
 For negative input, i.e Vi<0, diode D1 is OFF and D2 is ON. The equivalent circuit is
shown in fig 1.61(c).
 Let the output voltage of op-ampA1 be V and since the different input A2 is zero, the
inverting input terminal is also at voltage v.

KCL at node ‘a’ gives

𝑉𝑖𝑛 𝑣 𝑣
+ + =0
𝑅 2𝑅 𝑅

Or

2
𝑣 = − 𝑣𝑖
3

The equivalent circuit of fig 1.61 ( c) is non-inverting amplifier as shown in fig fig 1.61 ( d). the
output is Vo

𝑅 2
𝑣𝑜 = 1 + − 𝑣𝑖 = 𝑣𝑖
2𝑅 3

Hence for vi<0, the output positive. The input and output waveforms are shown in fig 1.61(e)

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Fig 1.62 (a) Precision full wave rectifier (b) equivalent circuit for Vi>0

Fig 1.63 (c ) equivalen circuit for Vi<0 (d) equivalent circuit of (c)

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1.61( e) input and output waveforms

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