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First Quadrant Chua Diode I-V Characteristic and Its

Chaotic Dynamics in Chua’s Circuit


Troy Coleman and Todd Wey
Department of Electrical and Computer Engineering
Lafayette College
Easton, Pennsylvania, 18042 USA
Email: colemant@lafayette.edu , weyt@lafayette.edu

Abstract— A negative differential conductance circuit which transistor differential pair structure is described in [9]. Chua
features unipolar power supply operation and first quadrant diodes and circuits with I-V characteristics described by
current-voltage “n-shaped” conductance characteristic is hyperbolic trigonometric functions have also been of interest
presented. The circuit consists of readily available inexpensive with a recent example in [10]. A commonality in all of these
components and provides a smooth current-voltage characteristic works are Chua diodes that operate symmetrically about the
which can be modeled with a polynomial expression, allowing the origin of its I-V characteristic, so in the first and third
circuit to be evaluated theoretically, with behavioral simulation quadrants as a minimum.
models, and experimentally. In this work, the circuit
architecture and current-voltage characteristic is described and In this work, an n-shaped conductance circuit is presented
its application as the Chua diode in Chua’s circuit is which is similar to the Chua diode in general shape but with
demonstrated both behaviorally from a polynomial current- intended region of operation exclusively in the first quadrant
voltage model and verified with experimental hardware results. of its I-V characteristic, which is similar to existing
semiconductor devices such as the tunnel diode [11].
Keywords— Chua’s circuit, chaotic oscillator, n-shaped I-V Additionally, the experimental characteristic of this circuit is
characteristic, negative differential resistance, negative differential well described by a polynomial model. Its performance in a
conductance. chaotic Chua circuit oscillator is demonstrated with both a
behavioral simulation model incorporating the mathematical I-
I. INTRODUCTION V description and with the experimental hardware.
Since Professors Takashi Matsumoto and Leon Chua The organization of this paper is as follows. In Section II,
showed experimental demonstrations of chaotic dynamics in the circuit embodiment of the proposed Chua diode is
the mid 1980’s [1,2], both theoretical and experimental presented with its experimental I-V curve and polynomial
investigations into chaotic circuits and systems have received model. In Section III, behavioral simulation results of the
abundant research attention. Chua’s circuit [1,2] in particular chaotic Chua circuit with the polynomial model is provided;
and its variations have been a popular vehicle for experimental and the results from the experimental circuit prototype is
chaos investigations [3]. This circuit has the benefit of a presented in Section IV.
relatively low architectural complexity and is realized with
inexpensive and readily available electronic components. An
important feature of the circuit is the 3-segment piecewise
linear resistor [1,2], or Chua diode. This nonlinear resistor II. PROPOSED CHUA DIODE CIRCUIT
emulator has three regions of negative differential In this work, a Chua type diode with n-shaped
conductance (NDC) symmetric about the origin of its current- conductance in the first quadrant of the I-V characteristic,
voltage (I-V) characteristic and has been of research interest in similar to the tunnel diode [11], is developed with an
both its physical construction and mathematical description. architecture proposed in [12] and shown in Fig. 1. In this
In [4], the author considers an extension to Chua’s original design, the power supply to the MP6024 opamps from
nonlinearity design with improvement to controlling piecewise Microchip and the CD4007 inverter IC from Texas Instruments
breakpoints and local NDC values. In a more recent work [5], is 4 volts and associated VMID is 2 volts. Resistors R1 and R2
a Chua diode embodiment allows for the interchange of the are selected to provide an I-V characteristic with a differential
higher and low negative conductance regions. A cubic conductance at the inflection point approximately equal to the
polynomial model for the NDC circuit realized in hardware maximum negative conductance value of -756 µmho in the
with analog multipliers is proposed in [6]. An integrated Chua diode design in [4]. The resulting I-V characteristic for
circuit (IC) embodiment of the Chua diode based on this design is provided in Fig 2 with an overlay of a ninth-order
operational transconductance amplifiers is proposed in [7] polynomial fit given in (1) as well as the resulting small-signal
with suggestion of follow-on design with single supply differential conductance profile. The polynomial fit can be
operation. An interesting four CMOS transistor design with a readily used for theorical modeling and comparison to
CD4007 IC is presented in [8] which gives a smooth “cubic- prototype hardware. Additionally, it should be noted that a
like” I-V characteristic and a similar characteristic with SPICE simulation using models for the integrated circuits

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works as well, but the transistor models for the CD4007 IC iL
must be tuned to the device in hand due to the sensitivity of the
L R i = g (v )
chaotic circuit to both biasing and differential conductance of + +
the circuit.
+ C2 vC 2 C1 vC1
VBIAS
i = g (v) = 2.61⋅ (v + 0.50v 2 − 2.55v3 + 2.31v 4 − 0.98v5 −
(1)
+ 0.0209v6 − 0.01667v7 − 0.001v8 + 0.000185v9 ) mA − −

Fig. 3. Chua’s circuit [4]


R1

6.2k
CD4007-M2 R2
1 1
5k
CD4007-M1
vC1 =
RC1
(
vC2 − vC1 −
C1
g vC1) ( )
1 1
vC2 =
RC2
(
vC1 − vC2 +
C2
iL ) (2)
MCP6024
10k 1
IIN
+ 10k
(
iL = VBIAS − vC2
L
)
+ -
-
VIN VMID +
MCP6024 VBIAS − VC1
- IL = (3)
R

To bias the design for chaotic behavior, the DC load line


Fig. 1. Proposed Chua diode circuit
technique in Fig. 4 is evaluated with resistance values and
corresponding bias voltage requiring an intersection of the
load line thru the inflection point of the I-V curve. For chosen
values of L=11.7mH, C1=6.5nF and C2=65nF, it is found that
the circuit demonstrates a double scroll chaotic pattern for a
resistance of R=1.6kΩ and corresponding VBIAS of 2.952V.
The three DC equilibrium points in Fig. 4 have small-signal
differential conductance of -370µmho, -744µmho, and -436
µmho respectively. The DC equilibrium at the I-V inflection
point gives a linearized small-signal model with a positive real
root and decaying complex conjugate roots. The outer DC
equilibrium points gives small-signal dynamics of a decaying
real root with unstable complex conjugate roots.

Fig. 2. Proposed Chua diode I-V experimental characteristic (orange) with 9th
order polynomial fit overlay (blue) and differential small-signal conductance
(gray) on second y-axis.

III. CHUA’S CIRCUIT BEHAVIORAL SIMULATION RESULTS


The polynomial model for the proposed Chua diode of (1)
is implemented in Chua’s chaotic circuit shown in Fig. 3 with
a DC voltage bias to accommodate the first quadrant
nonlinearity. The behavioral circuit is mathematically
described by the state equations of (2), which is equivalent to
those in [4] with the DC bias source included. The dynamics
of the system can be anticipated from the linearized small-
signal models at the DC equilibrium points in (2) where the Fig. 4. DC Load line current with R=1.6kΩ and VBIAS=2.952V giving three
equilibrium points correspond to the DC load line expression unstable DC equilibrium solutions at intersections with Chua diode I-V
in (3) and its intersections with the Chua diode I-V characteristic leading to chaotic double scroll circuit dynamics.
characteristic in the iL-vC1 DC plane.

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The double scroll behavioral simulation results are shown
in the iL-vC1 phase plane of Fig. 5 as an overlay to show the
chaotic dynamics of the inductor current about the Chua diode
I-V characteristic.

Fig. 7. DC Load line current with R=1.65kΩ and VBIAS=2.96V giving three
unstable DC equilibrium solutions at intersections with Chua diode I-V
characteristic leading to chaotic Rossler type circuit dynamics.

Fig. 5. Double scroll behavioral simulation result in iL-vC1 phase plane with
Chua diode I-V characteristic overlay to show the dynamic operation about
the characteristic

The double scroll results are presented in the vC2-vC1 phase


plane of Fig. 6 for comparison to experimentally captured
results in the next section.

Fig. 8. Rossler type behavioral simulation result in iL-vC1 phase plane with
Chua diode I-V characteristic overlay to show the dynamic operation about the
characteristic.

Fig. 6. Behaviorally simulated double scroll attractor in vC2-vC1 phase plane for
comparison to experimental measurements.

For resistance R=1.65kΩ and VBIAS of 2.96V, the DC


steady state solutions are given by the load line intersections in
Fig. 7. The inductor and capacitor values are the same as in the
previous double scroll case. The left DC equilibrium point has
Fig. 9. Behaviorally simulated Rossler type attractor in vC2-vC1 phase plane for
a decaying real root and unstable complex conjugate roots in comparison to experimental measurements.
the linearized circuit model. The DC equilibrium points to the
right both have an unstable real pole and decaying complex
conjugate roots in the linearized characteristic equation. For
these circuit values, the Rossler type attractor [4] shown in the IV. HARDWARE PROTOTYPE RESULTS OF THE PROPOSED
phase portraits of Figs. 8 and 9 is obtained. It is important to CHUA DIODE AND CHUA’S CIRCUIT
note that changes to the bias voltage alone for a fixed Chua’s circuit was implemented with the proposed
resistance can also lead to adequate shift in the load line to Chua diode hardware with data given in section II and with
show either the Rossler type or double scroll attractors. measured L=11.7mH, C1=6.5nF, and C2=65nF. At a measured
resistance of R=1.59kΩ and VBIAS=2.97, the experimental

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double scroll behavior is captured from a Lecroy waveRunner V. CONCLUSION
44Xi oscilloscope as an x-y mode picture file in the vC2-vC1 In this work, an n-shaped conductance circuit with
phase plane is shown in Fig. 10. The experimental phase plane target operation in the first quadrant of its I-V characteristic is
results are in excellent agreement with the simulation results proposed as the Chua diode in Chua’s circuit. This nonlinear
shown in Fig 6. The peak-to-peak vC1 range from the conductance circuit is implemented with readily available off
simulation is approximately 1.2V and about 250mV for the the shelf components and is easily modeled with a polynomial
peak-to-peak vC2 range. Measurements taken from the scope expression fit to the experimental I-V data. Designing the
image is approximately the same. Chua circuit for chaotic oscillation requires selection of the
circuit resistance and bias voltage required for proper load line
placement. The polynomial model can be used for theoretical
analysis and behavioral simulation and gives an excellent
prediction of the observed dynamics in the prototype hardware
with the predicted components values. In addition, interesting
modulation and control techniques based on the bias voltage
can be explored.

REFERENCES

[1] T. Matsumoto, “A Chaotic Attractor from Chua’s Circuit,” IEEE Trans.


On Circuits and Systems, Dec. 1984, vol. CAS-31, no. 12, pp. 1055-
1058.
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797-818.
[3] L. Fortuna, M. Frasca, M. G. Xibilia, Chua’s Circuit Implementations:
Yesterday, Today and Tomorrow. Hackensack, NJ, World Scientific
Publishing Co. Pte. Ltd., 2009.
Fig. 10. The double scroll chaotic dynamics from the experimental circuit. vC1 [4] M. P. Kennedy, “Robust Implementation of Chua’s Circuit,” Frequenz,
is on the x-axis with voltage scale of 200mV/div, and vC2 is on the y-axis with Mar. 1992, vol. 46, no. 3, pp. 66-80.
voltage scale of 50mV/div. [5] B. C Bao, P. Jiang, Q. Xu, M. Chen, “Hidden attractors in a practical
Chua’s circuit based on a modified Chua’s diode,” Electronics Letters,
Jan, 2016, vol. 52, no. 1, pp. 23-25.
[6] G. Q. Zhong, “Implementation of Chua’s Circuit with a Cubic
At a measured resistance of R=1.64kΩ and Nonlinearity,” IEEE Transactions on Circuits Systems-I: Fundamental
VBIAS=3.02Volts, the experimental Rossler behavior is Theories and Applications, Dec. 1994, vol. 41, no. 12, pp. 934-941.
captured from the Lecroy oscilloscope in the vC2-vC1 phase [7] J. M. Cruz and L. O. Chua, “A CMOS IC Nonlinear Reistor for Chua’s
plane shown in Fig. 11. Again, the results are in excellent Circuit,” IEEE Trans. On Circuits and Systems – I: Fundamental
agreement with those predicted from the behavioral simulation Theory and Applilcations, Dec. 1992, vol. 39, no. 12, pp. 985-995.
result. [8] K. O’Donoghue, M. P. Kennedy, P. Forbes, “A fast and simple
implementation of Chua’s oscillator using a ‘cubic-like’ Chua diode,”
Proceedings of the 2005 European Conference on Circuit Theory and
Design,” Cork, Ireland, Sept. 2005.
[9] B. Srisuchinwong and W. San-Um, “A Chua’s Chaotic Oscillator Based
on a Coursely Cubic-Like CMOS Resistor,” Proceedings of IEEE Asia-
Pacific Conference on Communications, Bangkok, Thailand, Oct. 2007.
[10] T. Fozin, et. al. “On the dynamics of a simplified canonical Chua’s
oscillator with smooth hyperbolic sine nonlinearity: Hyperchaos,
multistability, and multistability control,” Chaos, Nov. 2019,
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[11] L. Chua, C. Desoer, and E. Kuh, Linear and Nonlinear Circuits, New
York, NY: McGraw Hill, 1987.
[12] T. Wey, “An N-Shaped I-V Characteristic Circuit with Mem-impedance
Feature,” Proceedings of the 61st Midwestern Symposium on Circuits
and Systems, Windsor, ON, Canada, Aug. 2018.

Fig. 11. The Rossler chaotic dynamics from the experimental circuit. vC1 is on
the x-axis with voltage scale of 200mV/div, and vC2 is on the y-axis with
voltage scale of 50mV/div.

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