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FQA24N50
FQA24N50
FQA24N50
June 2014
FQA24N50
N-Channel QFET® MOSFET
500 V, 24 A, 200 mΩ
Features Description
• 24 A, 500 V, RDS(on) = 200 mΩ (Max.) @ VGS = 10 V, ID = 12 A These N-Channel enhancement mode power field effect
• Low Gate Charge (Typ. 90 nC) transistors are produced using Fairchild’s proprietary, planar
stripe, DMOS technology.
• Low Crss (Typ. 55 pF)
This advanced technology has been especially tailored to
• 100% Avalanche Tested minimize on-state resistance, provide superior switching
• RoHS compliant performance, and withstand high energy pulse in the avalanche
and commutation mode. These devices are well suited for high
efficiency switch mode power supply, power factor correction,
electronic lamp ballast based on half bridge.
G
G
D TO-3PN
S
S
Thermal Characteristics
Symbol Parameter Typ. Max. Unit
RθJC Thermal Resistance, Junction-to-Case -- 0.43 °C/W
RθCS Thermal Resistance, Case-to-Sink 0.24 -- °C/W
RθJA Thermal Resistance, Junction-to-Ambient -- 40 °C/W
Off Characteristics
BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 μA 500 -- -- V
ΔBVDSS/ Breakdown Voltage Temperature Coeffi-
ID = 250 μA, Referenced to 25°C -- 0.53 -- V/°C
ΔTJ cient
IDSS VDS = 500 V, VGS = 0 V -- -- 1 μA
Zero Gate Voltage Drain Current
VDS = 400 V, TC = 125°C -- -- 10 μA
IGSSF Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA
IGSSR Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA
On Characteristics
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 μA 3.0 -- 5.0 V
RDS(on) Static Drain-Source
VGS = 10 V, ID = 12 A -- 0.156 0.2 Ω
On-Resistance
gFS Forward Transconductance VDS = 50 V, ID = 12 A -- 22 -- S
Dynamic Characteristics
Ciss Input Capacitance VDS = 25 V, VGS = 0 V, -- 3500 4500 pF
Coss Output Capacitance f = 1.0 MHz -- 520 670 pF
Crss Reverse Transfer Capacitance -- 55 70 pF
Switching Characteristics
td(on) Turn-On Delay Time -- 80 170 ns
VDD = 250 V, ID = 24 A,
tr Turn-On Rise Time -- 250 500 ns
RG = 25 Ω
td(off) Turn-Off Delay Time -- 200 400 ns
(Note 4)
tf Turn-Off Fall Time -- 155 320 ns
Qg Total Gate Charge VDS = 400 V, ID = 24 A, -- 90 120 nC
Qgs Gate-Source Charge VGS = 10 V -- 23 -- nC
Qgd Gate-Drain Charge (Note 4) -- 44 -- nC
VGS
Top : 15 V
10 V
8.0 V
7.0 V
6.5 V
6.0 V
Bottom : 5.5 V 10
1
1
10 150℃
25℃
10
0
-55℃
0
10 ※ Notes :
※ Notes :
1. 250μs Pulse Test 1. VDS = 50V
2. TC = 25℃ 2. 250μs Pulse Test
-1
10
10
-1
10
0
10
1
2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
0.6
IDR , Reverse Drain Current [A]
Drain-Source On-Resistance
0.5
VGS = 10V
0.4 10
1
RDS(on) [Ω],
VGS = 20V
0.3
0.2 10
0
150℃ 25℃
※ Notes :
0.1 1. VGS = 0V
※ Note : TJ = 25℃ 2. 250μs Pulse Test
0.0 -1
0 20 40 60 80 100 120 10
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
ID , Drain Current [A] VSD , Source-Drain Voltage [V]
7000 12
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd VDS = 100V
6000
10
VDS = 250V
VGS, Gate-Source Voltage [V]
4000 Coss
6
3000
4
2000 ※ Notes :
Crss 1. VGS = 0 V
2. f = 1 MHz
2
1000
※ Note : ID = 24 A
0 0
-1 0 1 0 20 40 60 80 100
10 10 10
QG, Total Gate Charge [nC]
VDS, Drain-Source Voltage [V]
1.2 3.0
Drain-Source Breakdown Voltage
2.5
Drain-Source On-Resistance
1.1
BVDSS, (Normalized)
RDS(ON), (Normalized)
2.0
1.0 1.5
1.0
0.9 ※ Notes :
1. VGS = 0 V ※ Notes :
2. ID = 250 μA 0.5 1. VGS = 10 V
2. ID = 12 A
0.8 0.0
-100 -50 0 50 100 150 200 -100 -50 0 50 100 150 200
o o
TJ, Junction Temperature [ C] TJ, Junction Temperature [ C]
25
Operation in This Area
is Limited by R DS(on)
10
2 20
10 μs
ID, Drain Current [A]
100 μs
1 ms 15
10
1 10 ms
DC
10
0
10
※ Notes :
o 5
1. TC = 25 C
o
2. TJ = 150 C
3. Single Pulse
-1
10 0
10
0
10
1
10
2 3
10 25 50 75 100 125 150
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs. Case Temperature
D = 0 .5
Zθ JC(t), Thermal Response
※ N o te s :
-1
10 0 .2 1 . Z θ J C ( t) = 0 .4 3 ℃ /W M a x .
2 . D u ty F a c t o r , D = t 1 /t 2
3 . T J M - T C = P D M * Z θ J C ( t)
0 .1
0 .0 5
PDM
0 .0 2
t1
0 .0 1
t2
-2
10 s in g le p u ls e
-5 -4 -3 -2 -1 0 1
10 10 10 10 10 10 10
t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ]
VGS
Same Type
50KΩ
as DUT Qg
12V 200nF
300nF 10V
VDS
VGS Qgs Qgd
DUT
IG = const.
3mA
Charge
RL VDS
VDS 90%
VGS VDD
RG
10%
VGS
V
10V
GS
DUT
td(on) tr td(off)
tf
t on t off
L 1 BVDSS
VDS EAS = ---- L IAS2 --------------------
2 BVDSS - VDD
BVDSS
ID
IAS
RG
VDD ID (t)
V
10V
GS
GS DUT VDD VDS (t)
tp
tp Time
DUT +
VDS
I SD
L
Driver
RG
Same Type
as DUT VDD
IRM
VSD VDD
Body Diode
Forward Voltage Drop
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE
RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY
PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY
THEREIN, WHICH COVERS THESE PRODUCTS.
Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Rev. I68
©2000 Fairchild Semiconductor Corporation 8 www.fairchildsemi.com
FQA24N50 Rev. C0