Digital Logic Design

Assignment # 5
Due on Monday 9th January, 2023

Submission Guidelines:
• Submit your handwritten document in my office.
• Mention your Name, Roll No and Section.
• Plagiarism is heavily penalized and so are late submissions.

Q1: The waveforms in the following Figure are applied to the comparator as shown. Determine
the output (A = B) waveform.

Q2: For each set of binary numbers, determine the output states for the comparator of Figure.

(a) A3A2A1A0 = 1010

B3B2B1B0 = 1101

(b) A3A2A1A0 = 1101

B3B2B1B0 = 1101

(c) A3A2A1A0 = 1001

B3B2B1B0 = 1000

Q3: Show the decoding logic for each of the following codes if an active-HIGH (1) output is
required:
(a) 101010 (b) 111110 (c) 000101 d) 1110110
Q4: Simplify the BCD to 7-Segment display decoder using k-map and also draw the circuit
diagram.