Download as pdf or txt
Download as pdf or txt
You are on page 1of 3

All Rights Reserved

Department of Technical Education and Training

NVQ Level 05 Written Examination – December 2021 (April/May 2022) (Semester I)

National Diploma in Electronic Technology

Electronics I 5S1NVQ314 Three hours

Instructions: Answer any five (05) questions.


(This paper consists of 03 pages.)

1. (i) Write five types of diodes. (05 Marks)


(ii) Draw the complete structural figures and the circuit diagrams to show the diodes
biasing methods. (06 Marks)
(iii) Identify the following terms regarding diodes. (05 Marks)
(a) If (d) Tj
(b) Vf (e) CT
(c) PIV
(iv) Draw the characteristics for Zener diode and name them. (04 Marks)

2. (i) Center tapped transformer is used to have an output of 20V AC from each tap.
Concern the diode drop as well.

Find,
(a) Load voltage, current, and power dissipation. (03 Marks)
(b) Current flow through each diode. (02 Marks)
(c) Recalculate the above values when the load is connected with a capacitor. (05 Marks)
(ii) Consider a capacitor-connected bridge full-wave rectification circuit with a 100ohms load
resistor.
(a) Draw the circuit diagram with correct symbols and name them. (02 Marks)
(b) Draw the output waveforms according to the input waveform and name
them. (03 Marks)
(c) Do the calculation (a) (iii) again for this circuit as well. (05 Marks)

1
3. (i) Tabulate the mode of BJT in operation according to biasing modes in emitter-base
and collector-base junctions. (04 Marks)
(ii) A three-stage low-frequency amplifier has an operating voltage of 12V. The base
biases are produced by means of voltage dividers. A collector current of 25mA flows
in the transistor. The input voltage at the base-emitter is 730mV and the base current is
140uA. Collector-Emitter voltage is 6.9V.

Find,
(a) Voltage drop and power dissipation across load resistor R3. (04 Marks)
(b) Emmiter resistance R4 . (04 Marks)
(c) Shunt current flow though R2. (04 Marks)
(d) Current gain (04 Marks)

4. (i) Categorize the FETs under the types with symbols. (05 Marks)
(ii) Compare JFET Vs MOSFETS. (04 Marks)
(iii) Draw the structure and characteristics curves of each type of MOSFETS. (06 Marks)
(iv) State the five applications of MOSFETS. (05 Marks)

5. (i) Tabulate universal gates with names, symbols and the relevant logic
expressions. (04 Marks)
(ii) Build up the AND, OR gates using diodes and draw the relevant truth tables
for them. (04 Marks)
(iii) (a) Draw the logical element of OR gate realized with NAND gates and
obtained the truth table. (04 Marks)
(b) Draw the logical element of AND gate realized with NOR gates and
obtained the truth table. (04 Marks)
(iv) Draw the NOR & NAND latch circuits with the truth tables by naming the steps
of special cases. (04 Marks)

2
6. In a paint manufacturing factory four machines named A, B, C, D can be operated at the
same time. An alarm bell [Q] rings if the total operating power of four machines
exceed 52kW. The operating power of each machine is 10kW, 15kW, 20kW, 35kW
respectively. Considering this system.
(i) Write down the truth table in operation. (05 Marks)
(ii) Build up the equation and minimize the equation using K’MAP. (05 Marks)
(iii) Draw the circuit using standard symbols to operated the alarm bell. (05 Marks)
(iv) Resetup the circuit using NAND gates only. (05 Marks)

- ✤✤✤ -

You might also like