EE595S: Class Lecture Notes

Chapter 13: Fully Controlled 3-Phase Bridge

Converters

S.D. Sudhoff

Fall 2005
 13.2 Fully Controlled 3-Phase
Bridge Converter

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 One Phase Leg

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 Phase Leg Equivalent Circuits

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Phase Leg Voltages and Currents
Switch On Current Direction vxg ixdc

Upper Positive vdc − vsw ixs

Negative vdc + vd ixs

Zero vdc ixs

Lower Positive −vd 0

Negative vsw 0

Zero 0 0

Neither Positive −vd 0

Negative vdc + vd ixs

Zero vdc / 2 0

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Line-to-Line Voltage and DC Current

• Line-to-Line Voltages
¾ vabs = vag − vbg (13.2-1)
¾ vbcs = vbg − vcg (13.2-2)
¾ vcas = vcg − vag (13.2-3)

• DC Current
¾ idc = iadc + ibdc + icdc (13.2-4)

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 Line-to-Neutral Voltage

• From Fig. 13.2-1

¾ vag = vas + vng (13.2-5)
¾ vbg = vbs + vng (13.2-6)
¾ vcg = vcs + vng (13.2-7)
• Adding
1 1
¾ vng = (vag + vbg + vcg ) − (vas + vbs + vcs ) (13.2-8)
3 3
• Or
1
¾ vng = (vag + vbg + vcg ) − v0s (13.2-9)
3
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 Line-to-Neutral Voltage

• IFF (IFF!)

• Then
¾ 1
vng = (vag + vbg + vcg ) (13.2-10)
3

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 Line-to-Neutral Voltage

Backsubstitution of (13.2-10) into (13.2-5)-

(13.2-7) yields
2 1 1
¾ as
v = v ag − vbg − vcg (13.2-11)
3 3 3

2 1 1
¾ vbs = 3 vbg − 3 vag − 3 vcg (13.2-12)

2 1 1
¾ vcs = 3 vcg − 3 vag − 3 vbg (13.2-13)

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 Calculation of QD Voltages

• We do not need line-to-neutral voltages to

find QD voltages !

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 13.3 180o Voltage Source
Inverter (VSI) Operation
• Comments:
¾ Six-step operation
¾ 120o VSI used at one time
¾
¾
¾

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 Line-to-Line Voltages

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 Line-to-Neutral Voltages
(for v0s=0)

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 Voltage Spectrum

• Line-to-line voltage
¾ 2 3 π (13.3-1)
vabs = vdc cos(θ c + ) +
π 6
2 3 ∞⎛ 1 π 1 π ⎞
vdc ∑ ⎜ − cos((6 j − 1)(θc + )) + cos((6 j + 1)(θc + )) ⎟
π j =1⎝ 6 j − 1 6 6 j +1 6 ⎠
• Line-to-neutral voltage
∞ ⎛ (−1) j +1 (−1) j ⎞
¾ 2 2
vas = vdc cosθc + vdc ∑
π π ⎜
⎜ cos((6 j − 1)θc ) + cos((6 j + 1)θc ) ⎟
⎟
j =1 ⎝ 6 j − 1 6 j +1 ⎠

(13.3-2)
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 Voltage Spectrum

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 An Example

• Load: Balanced, wye-connected, series RL

¾R = 2 Ω
¾L = 1 mH
• DC Voltage: 100 V
• Fundamental Frequency: 100 Hz

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 ABC Variables for 180o VSI

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 QD Variables

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 QD Inverter Analysis of 180o
VSI
• QD Voltages
∞ 2(−1) j
¾ c 2 2
vqs = vdc − vdc ∑ cos(6 jθc ) (13.3-3)
π π 2
j =1 36 j − 1

2 ∞ 12 j
¾ c
vds = vdc ∑ sin(6 jθ c ) (13.3-4)
π 2
j =1 36 j − 1

• Average-Value Analysis
c = 2v
¾ vqs (13.3-5)
dc
π
c =0
¾ vds (13.3-6)

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 Calculation of DC Current
• We have
¾ Pin = idc vdc (13.3-7)
¾ 3
Pout = (vqs iqs + vds ids ) (13.3-8)
2
• Thus 3
(vqs iqs + vds ids )
¾ idc = 2 (13.3-9)
vdc
• So
3 ⎛⎜ vqs iqs + vds ids ⎞⎟
¾ idc = (13.3-10)
2 ⎜⎝ vdc ⎟
⎠
• Approximately
¾ (13.3-11)
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 Return to Previous Example

• Change resistance to 1 Ohm

• Find DC Current
• Voltages
¾vqs= 63.7 V
¾vds = 0.0 V
• Currents

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 Return to Previous Example

• Results
¾iqs=45.6 A
¾ids=28.7 A
¾idc=43.6 A
• Exact Answer
¾idc=43.9 A

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 13.4 Pulse-Width Modulation

• Current Capability

• Desire

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 Pulse-Width Modulation

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 Waveforms for Pulse-Width
Modulation

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 Analysis

• Comparitor output
∞
¾ c = d + 2d ∑ sinc( kd ) cos kθ sw (13.4-1)
k =1
• Where
¾ pθ sw = ω sw (13.4-2)
• Multiplying (13.4-1) by (13.3-2) yields
¾(next page)

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 Ahhhh….
2dvdc ⎛⎜ ∞ ⎛ ( −1) j +1 (−1) j ⎞⎞
• vas =
π ⎜⎝
cosθc + ∑ ⎜
⎜
j =1 ⎝ 6 j − 1
cos((6 j − 1)θ c ) +
6 j +1
cos((6 j + 1)θc ⎟ ⎟
⎟⎟
(13.4-3)
⎠⎠
2d ∞
Vdc ∑ sinc(kd ) cos(kθ sw − θc ) +
π k =1

2dvdc ∞ ∞ ⎛ (−1) j +1 (−1) j ⎞

∑ sin( kd ) ∑ ⎜ cos( kθ − ( 6 j − 1)θ ) + cos( kθ − ( 6 j + 1)θ ) ⎟
π k =1 ⎜
j =1 ⎝ 6 j − 1
sw c
6 j + 1
sw c ⎟
⎠
2d ∞
+ Vdc ∑ sinc(kd ) cos(kθ sw + θc ) +
π k =1

2dvdc ∞ ∞ ⎛ (−1) j +1 (−1) j ⎞

∑ sin(kd ) ∑ ⎜ cos(kθ sw + (6 j − 1)θc ) + cos(kθ sw + (6 j + 1)θc ) ⎟
π k =1 ⎜
j =1 ⎝ 6 j − 1 6 j + 1 ⎟
⎠

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 Points of Interest

• Fundamental Component
2
¾ vas fund = d vdc cos θ c (13.4-4)
π

• QD Voltages
c 2
¾ vqs =
π
dvdc (13.4-5)
¾ c
vds =0 (13.4-6)

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 An Example

• Load: Balanced, wye-connected, series RL

¾R = 2 Ω
¾L = 1 mH
• DC Voltage: 100 V
• Fundamental Frequency: 100 Hz
• Duty Cycle: 0.628
• Switching Frequency:3000 Hz

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 ABC Variables for 180o VSI

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 ABC Variables for Duty-Cycle
Modulation

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 Pulse Width Modulation
Summary
• Good News

• Bad News

• Applications

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 13.5 Sine-Triangle Modulation

• Features
¾Adjustable Voltage Magnitude
¾Adjustable Frequency
¾Low Low-Frequency Harmonic Content
• Comments
¾Originally Meant for Analog Implementation
¾Digital Equivalents Exist

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 Gate Signal Controls

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 Operation of A-Phase Leg

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 Analysis

• Important Concept: The Fast Average

1
¾ xˆ (t ) = ∫ x(t )dt
t

t −Tsw
(13.5-1)
T sw

• We can show that

1
¾ vˆag = (1 + d a )vdc (13.5-2)
2
1
¾ vˆbg = (1 + db )vdc (13.5-3)
2
1
¾ vˆcg = (1 + d c )vdc (13.5-4)
2

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 Analysis (2)

• Lets specify duty cycles as

¾ d a = d cos θ c (13.5-5)
2π
¾ d b = d cos(θ c − ) (13.5-6)
3
¾ d c = d cos(θ c + 2π ) (13.5-7)
3

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 Analysis (3)

• Thus
c = 1 dv
¾ vˆqs
2
dc (13.5-14)
c =0
¾ vˆds (13.5-15)

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 An Example

• Load: Balanced, wye-connected, series RL

¾R = 2 Ω
¾L = 1 mH
• DC Voltage: 100 V
• Fundamental Frequency: 100 Hz
• Duty Cycle: 0.4
• Switching Frequency: 3000 Hz

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 ABC Variables for Duty-Cycle
Modulation (d=0.628)

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 Sine-Triangle Modulation

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 Limitations of Sine-Triangle
Modulation
• Sine Triangle Modulation
¾Range for duty cycle:
¾Range for peak voltage (of fund):

• Duty Cycle Modulation:

¾Range for duty cycle:
¾Range for peak voltage (of fund.):

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 Overmodulation

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 Analysis of Overmodulation

• Line-to-ground voltage

⎧vdc da > 1
⎪1
¾ vag = ⎨ (1 + d a )vdc − 1 < da < 1 (13.5-16)
⎪2
⎩0 da < 1

vdc 2vdc
¾ vag = + f ( d ) cos θ c (13.5-17)
avg + fund 2 π
2
1 ⎛1⎞ 1 ⎛ ⎛ 1 ⎞⎞
¾ f (d ) = 1 − ⎜ ⎟ + d ⎜ π − 2 arccos⎜ ⎟ ⎟ (13.5-18)
2 ⎝d ⎠ 4 ⎝ ⎝ d ⎠⎠
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 Analysis of Overmodulation (2)

• Thus we have

c 2vdc
¾ vqs = f (d ) d ≥ 1 (13.5-20)
π
¾ c =0 d ≥0
vds (13.5-21)

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 Overmodulation (d=2)

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 13.6 Third-Harmonic Injection

• Objective …

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 The Plan

• Suppose
¾ d a = d cos(θ c ) − d3 cos(3θ c ) (13.6-1)
2π
¾ db = d cos(θc − ) − d3 cos(3θc ) (13.6-2)
3
2π
¾ dc = d cos(θc + ) − d3 cos(3θc ) (13.6-3)
3

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 Results

• Working for a little bit …

• Therefore
c 1
¾ vˆqs = dvdc (13.5-14)
2
c = 0
¾ ds
vˆ (13.5-15)

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 So What ?

• Consider this

• Thus
2
¾ d≤ (13.6-12)
3
• Result
¾ 15% Increase in Available Voltage
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 Space Vector Modulation

• General Comments
¾About Same Performance as Sine-Triangle
(with 3rd)
¾
¾

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 Modulation Indices

• Instantaneous
¾ mqs = vˆqs / vdc (13.7-1)
¾ mds = vˆds / vdc (13.7-2)

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 Space-Vector Diagram

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 Space Vector Diagram
Table 13.7-1 Modulation indexes versus state.

State T1 / T 4 T 2/T5 T3/ T6 mq, x md , x

1 1 0 0 2 / 3 cos(0 o ) − 2 / 3 sin(0 o )

2 1 1 0 2 / 3 cos(60 o ) − 2 / 3 sin(60 o )

3 0 1 0 2 / 3 cos(120 o ) − 2 / 3 sin(120o )

4 0 1 1 2 / 3 cos(180 o ) − 2 / 3 sin(180o )

5 0 0 1 2 / 3 cos(240 o ) − 2 / 3 sin(240 o )

6 1 0 1 2 / 3 cos(300o ) − 2 / 3 sin(300 o )

7 1 1 1 0 0

8 0 0 0 0 0

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Space Vector Modulation Algorithm

• Step 1 – Compute Commanded Indices

¾ mqs* = vqs* / vdc (13.7-3)
¾ mds* = vds* / vdc (13.7-4)
• Step 2 – Compute Commanded Magnitude
¾ m* = (mqs* ) 2 + (mds* ) 2 (13.7-5)

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Space Vector Modulation Algorithm

• Step 3 – Limit Magnitude of Command

1
¾ mmax = (13.7-6)
3
⎧ m* m* ≤ mmax
q
⎪
⎪
¾ mq*' = ⎨ mq* (13.7-7)
⎪mmax * m* > mmax
⎪⎩ |m |
⎧ m* m* ≤ mmax
*' ⎪ d
¾ md = ⎨ md* (13.7-8)
⎪mmax * m* > mmax
⎩ |m |
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Space Vector Modulation Algorithm

• Step 4 – Compute Sector

⎛ angle(m*' − jm*' )3 ⎞
Sector = ceil⎜
q d ⎟
• ⎜ π ⎟ (13.7-9)
⎝ ⎠
• Step 5 – Compute State Sequence

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Space Vector Modulation Algorithm
Table 13.7-2. State Sequence

Sector Initial State ( α ) 2 nd State ( β ) 3 rd State ( γ ) Final State ( δ )

1 7 2 1 8

2 7 2 3 8

3 7 4 3 8

4 7 4 5 8

5 7 6 5 8

6 7 6 1 8

1 8 1 2 7

2 8 3 2 7

3 8 3 4 7

4 8 5 4 7

5 8 5 6 7

6 8 1 6 7

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 State Vector Modulation Algorithm

• Before continuing
tβ tγ
¾ mˆ q = mq, β + mq,γ (13.7-10)
Tsw Tsw
tβ tγ
¾ mˆ d = md , β + md ,γ (13.7-11)
Tsw Tsw
• Step 5 – Compute Time in Each State
¾ D = mq, β md ,γ − mq,γ md , β (13.7-14)
¾ tβ = T sw (md ,γ m*'
q − m *' ) / D
q,γ d
m (13.7-12)
¾ tγ = Tsw (−md , β mq*' + mq, β m*'
d )/ D (13.7-13)

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 State Vector Modulation Algorithm

• Step 6 – Compute Transition Times

¾ t A = (Tsw − tβ − tγ ) / 2 (13.7-15)
¾ t B = t A + tβ (13.7-16)
¾ tC = t B + tγ (13.7-17)

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 Modeling Space Vector Modulation

• Comments:

• Thus
s = m**v
¾ vˆqs q dc (13.7-18)
s = m**v
¾ vˆds d dc (13.7-19)

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 Hysteresis Modulation

• The Good
¾Current Source Based Method
¾High Bandwidth Control
¾Readily Implements Current Limiting

• The Bad
¾No Control Over Switching Frequency

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 State Transition Diagram

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 Typical Waveform

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 An Example

• Load: Balanced, wye-

connected, series RL
¾R = 2 Ω
¾ L = 1 mH
• DC Voltage: 100 V
• Fundamental
Frequency: 100 Hz
*
• ias = 19.1 cos(θ c − 17.4o )

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 Typical Waveforms

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 Limitations of Hysteresis
Modulation
• Voltage Constraints
¾
¾
¾Thus
vdc
¾ vspk <
3
(13.8-1)

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 Delta Modulation

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 13.10 Open Loop Voltage and
Current Control
• Given
¾Commanded q- and d-axis voltages
¾DC Voltage
¾Position of Synchronous Reference Frame
• Find
¾d
¾ θc

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 Open Loop Voltage Control for
Duty Cycle PWM
• Consider

⎡v e ⎤ ⎡ cos θ c ⎤
sin θ ce ⎤ ⎡vqs
⎢ qs ⎥ = ⎢ ce
⎥ ⎢ ⎥ (13.10-1)
⎢⎣vds
e ⎥ − sin θ ce cos θ ce ⎦ ⎢v c ⎥
⎦ ⎣ ⎣ ds ⎦

• Where

θce = θc − θe (13.10-2)

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 Open Loop Voltage Control for
Duty Cycle PWM
• Now
⎡v e* ⎤ ⎡ cosθ sin θce ⎤ ⎡ 2 dvdc ⎤
⎢ qs ⎥ = ⎢ ce
⎥ ⎢π ⎥ (13.10-3)
⎢⎣vds
e* ⎥ − sin θce cosθce ⎦ ⎢ 0 ⎥
⎦ ⎣ ⎣ ⎦

• Manipulating

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 Open Loop Voltage Control for
Duty Cycle PWM

• Thus

d=
π
2vdc
( ) ( )
e* 2 e*
vqs + vds
2
(13.10-4)

e* − jve* )
θce = angle(vqs ds (13.10-5)
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 Open Loop Voltage Control for
Duty Cycle PWM

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 Open Loop Voltage Control for
Sine-Triangle PWM (with 3rd)

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 Open Loop Voltage Control for
Space Vector Modulation
• From the frame-to-frame transformation

s* = v e* cosθ + v e* sin θ
vqs qs e ds e (13.10-6)

s* = −v e* sin θ + v e* cosθ
vds qs e ds e (13.10-7)

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 Open Loop Current Control

• From inverse transformation

−1
* e
iabcs = K s iqde*
0s (13.10-8)

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 Closed-Loop Current Control

• Current Source Based Current Control

• Voltage Source Based Current Control

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 Closed Loop Current Source Based
Current Control

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 Analysis
• Start with

• Thus

1 (13.11-3)
f qe* = f qe** − f qe,err
τ r s +1

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 Closed Loop Voltage Source Based
Current Control

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 Analysis

• Assumed Load
e = ω L i e + L pi e + e
vqs (13.11-7)
e T ds T qs qT
e = −ω L i e + L pi e + e (13.11-8)
vds e T qs T ds dT

• Thus
K r (τ r s + 1)iqse* − τ r seqT
e

iqse =
⎛ 2 Kr Kr ⎞
LTτ r ⎜⎜ s + s+ ⎟⎟ (13.11-9)
⎝ LT LTτ r ⎠
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 Pole Placement

• Note that
K r = LT ( s1 + s2 ) (13.11-10)
1 1
τr = + (13.11-11)
s1 s2

• One choice
π f sw
s1 = s2 ≈ (13.12-12)
5

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