Department of Electronics and Telecommunication Engineering

Digital Electronics

Classification of Logic Families

The logic families are the logic circuits having identical electrical parameters. It is a
group of compatible ICs with the same logic levels and supply voltages for performing
various logic functions. They are fabricated using a specific circuit configuration
which is referred to as a Logic family

Comparison between RTL, DTL, and TTL Logic Families

Logic gates are the main components of any digital circuit. Almost all digital circuits
are made of logic gates. These logic gates are made of transistors and other active or
passive components. There are different classes or types of logic families according
to which logic gates are built.

Resistor-Transistor Logic (RTL)

The resistor-transistor logic (RTL) is the first digital circuit to construct the logic
gates. It is also known as Transistor-Resistor Logic or TRL. Here, the resistor and
transistor are used to make the logic gates
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 Department of Electronics and Telecommunication Engineering

Advantages of RTL Logic

1. It is the simplest digital circuit.
2. The minimum number of transistors are required to
build the logic circuit than other logic families.
3. The operation of this circuit is very simple.
Disadvantages of RTL Logic
1. Very poor response time, high propagation delay.
2. Power dissipation is high due to the resistor.

Diode-Transistor Logic (DTL)

In the diode transistor logic, the logic gates are built with PN junction diodes and
transistors. Here, diodes are used as input components and transistors are used as
output components. It has two input terminals and one output terminal. Let's take a
condition to understand its working principle. You can see in both the diodes are
connected in reverse bias. So, when both input is
low the Vcc at the input side of the transistor will
be grounded through the diodes and resistor. So,
the transistor will be in the cutoff condition and
the output of the circuit will be high.

Advantages of DTL Logic

1. Very low power dissipation.
2. Response time is better than RTL logic.
3. Fast in operation.
Disadvantages of DTL Logic
1. Types of logic gates built by DTL logic are
limited.

Transistor-Transistor Logic (TTL)

In a transistor-transistor logic, logic gates are built with bipolar junction transistors.
Here, one transistor works for amplifying while another works for switching. Almost,
all types of logic gates are possible to build with transistor-transistor logic.

TTL gate has three different types of output

configurations:
• Open collector output
• Totem-pole output
• Three state (or tristate) output
Totem pole provides less power dissipation,
higher speed of operation and high fanout.
Standard TTL series of logic family starts with
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 Department of Electronics and Telecommunication Engineering

suffix 74.
For example: 7404, 74S86 and 74ALS161

Advantages of TTL Logic

1. Provides higher reliability than other logic families.
2. Low power loss.
3. Provides amplification with switching.

Comparison between RTL, DTL, and TTL

SL
RTL Logic DTL Logic TTL Logic
NO.
Built with Resistor Built with Diode and
1 Built with Transistors
and Transistor Transistor
Much better than RTL
2 Slow Response Better than RTL Logic
and DTL
3 High Power Loss Low Power Loss Low Power Loss
Very simple in Simple in Complex in
4 construction and construction and construction and
operation operation operation
All the modern digital
DTL logic is used in circuits and
RTL Logic used in old
5 basic digital circuits, integrated Circuits
computers
switching circuits are mostly built with
TTL Logic

ECL | Emitter Coupled Logic

ECL is based on use of current steering switch realised using differential transistor
pair. ECL eliminates saturation and improves speed but uses more power than other
logic families such as TTL and CMOS.ECL is fastest logic family among all and this is
due to avoidance of saturation region for application.

CMOS | Complementary Metal Oxide Semiconductor

Following are the typical features of CMOS logic family:
• lowest power dissipation
• Excellent noise immunity
• High packing density
• Wide range of supply voltage
• High speed
• Highest fan out among all logic families

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 Department of Electronics and Telecommunication Engineering

Difference between TTL and CMOS and ECL

Following table mentions difference between TTL and CMOS and ECL logic families.

Specification TTL ECL CMOS

Basic gate NAND OR/NOR NAND/NOR

Fanout 10 25 >50

Power per gate(mWatt) 1-22 4-55 1 @ 1MHz

Noise Immunity Very Good Good Excellent

tPD (ns) 1.5-33 1-4 1-200

Characteristics of Logic Families

Fan-in:
 The fan in is defined as the number of inputs a gate has. For example, a two-
input gate will have a fan-in equal to 2.
Fan-out:
 Fan-out is defined as the maximum number of inputs of the same IC family that
a gate can drive without falling outside the specified output voltage limits.
 Higher the fan-out, the higher the current supplying capacity of a gate. For
example, a fan-out of 5 indicates that the gate can drive (supply current to) at
the most 5 inputs of the same IC family.
As shown in the figure, the fan-out of the
driver gate which is driving the N
number of the gate is N.
 Fan-out is also called the loading
factor. If the specified fan out of a
gate is 10 then we should not load
it with more than 10 gates.
Because then the output logic level
voltages cannot be guaranteed.
 Fan out depends on the nature of the input devices that are connected to an
output.
 Unless a different logic family is specified as the load device, fan-out is assumed
to be referred to load device of the same family as the driving device.

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 Department of Electronics and Telecommunication Engineering

Noise Margin:
To understand the meaning of the term “Noise Margin” or “Noise Immunity“, refer
to the input and
output
voltage
profiles
shown in the
figure.

Noise is unwanted electrical disturbances that may induce some voltage in the
connecting wires used between two gates or from a gate output to load.

Noise immunity is defined as the ability of a logic circuit to tolerate the noise
without causing any unwanted changes in the output.A quantitative measure of noise
immunity is called noise margin.

In order to avoid the effect of noise voltage, the voltage levels VOH(min) and VIH(min) are
adjusted to different levels with some difference between them as shown in the
above figure.

The difference between VOH(min) and VIH(min) is known as high-level noise margin VNH.

similarly, the difference between VIL(max) and VOL(max) is called the low-
level noise margin VNL.

High-Level Noise Margin, VNH = VOH(min) – VIH(min)

Low Level Noise Margin, VNL = VIL(max) – VOL(max)

When a high logic output is driving a logic circuit input, any negative noise spike
greater than VNH can cause the voltage to drop into the invalid range. Similarly, when

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a low logic output s driving a logic circuit input, any positive spikes greater than
VNL can cause the voltage to go into the invalid range.

Propagation delay
It is the time interval between the application of the input pulse and the occurrence
of the output. It is an important characteristic of the digital logic family. If the
propagation delay is less, then the speed at which the IC operates will be faster. Let
THL is the propagation delay when the output changes from logic 0 to 1 and TLH is the
delay when the output changes from logic 1 to 0. The maximum value of THL and TLH
is considered as the propagation delay for that logic gate.

Propagation Dissipation:

As a result of applied voltage and currents flowing through the logic families (ICs),
some power will be dissipated in it in the form of heat. The amount of power that IC
dissipates is determined by average supply current ICC, that it draws from VCC.
Another importance of power dissipation is that the product of power dissipation
and propagation time is always constant. The power drawn by an IC from the power
supply is given by, P = VCC X ICC

In the below figure (a), a NAND gate IC with all its outputs is high. the current drawn
from the source under such conditions is denoted by ICCH.

The below figure (b), shows another extreme condition where the outputs al all the
NAND gates are “0”. The current drawn from the source under such conditions is
denoted by ICCL.

ICCH and ICCL are different values, so an

average value of them is generally
considered to calculate average power
dissipation.

ICC(avg) = (ICCH + ICCL / 2)

PD(avg) = VCC X ICC(avg)

Figure of merit

The figure of merit of a logical family is the product of power dissipation and
propagation delay. It is called the speed-power product. The speed is specified in
seconds and power is specified in watts.

Figure if Merit = Propagation delay time x Power dissipation

Practically, the value of the figure of merit should be as low as possible.
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 Department of Electronics and Telecommunication Engineering

Standard 2-input TTL NAND Gate

It has four transistors Q1, Q2, Q3 and Q4. Transistor Q3, Q4, diode D and current
limiting resistor R3 form the totem-pole output configuration of TTL.

There are a few advantages of using this configuration. When the output switches
from LOW to a HIGH state, the output transistor Q4 goes from saturation to cut off.
During this transition, the load capacitance across Q3 charges exponentially from low
to a high voltage level.Due to the low output impedance of both transistors Q3 and Q4,
the output voltage can change quickly from LOW to HIGH value as the capacitance
charge and discharge quickly.

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