Nanosecond Transient Thermoreflectance Imaging of

Snapback in Semiconductor Controlled Rectifiers

Kerry Maize*, Dustin Kendig, and Ali Shakouri
Baskin School of Engineering
University of California, Santa Cruz
Santa Cruz, CA, USA
*kerry@soe.ucsc.edu

Vladislav Vashchenko
National Semiconductor Corp.
Santa Clara, CA, USA

Abstract—Transient thermoreflectance imaging method has been
applied for the first time to reveal current distribution in ESD
protection devices through the surface temperature change due
to self heating. Experimentally calibrated temperature images
are obtained of a multiple finger, 80 square micron 100V
NLDMOS-SCR device in snapback operation regimes for
different current levels (1.15-1.47A) and at different times
ranging between 100 nanoseconds to one millisecond after the
ESD pulse. The novel applied methodology demonstrates a
practical and straightforward way to characterize non-uniform
temperature and current distribution in ESD structures,
revealing effects of non-simultaneous triggering of individual
fingers on the multiple finger SCR device.
Keywords-electrostatic discharge; SCR; thermal imaging;
thermoreflectance; snapback.
I. INTRODUCTION
This On-chip local ESD protection is typically implemented
using ESD clamps engineered to provide ESD current level
according to package or system level standards. Typical clamp
design includes distributed multifinger device that provides
operation in conductivity modulation mode [1]. Many designs
attempt to increase current uniformity, robustness, and area
efficiency through multiple finger layouts. It is helpful to
characterize such multiple finger designs during operation to
improve efficiency or identify undesired behavior. For
example, one possible problem is that individual fingers can
turn on (trigger into snapback) prematurely, resulting in current
crowding and thermal failure in a single finger or other local
hot spot [2].
Optimization of ESD protection designs can be assisted
with visual characterization tools. Over recent years the method
of backside laser transient interferometry (TIM) [3] has been
used to inspect current distribution problems in ESD devices
during snapback [4,5]. The purpose of this study is to solve the
same problem using the simpler alternative method of topside
thermoreflectance thermography, which exploits the change in
material reflectivity with temperature [6,7]. Thermoreflectance
methods that use CCD cameras [8] capture megapixel thermal
images much faster than earlier scanned laser
thermoreflectance methods and at lower external illumination
levels. Temperature resolution of 10mK has been demonstrated
[9]. Recent pulsed illumination techniques have improved CCD
thermoreflectance temporal resolution to 100 nanoseconds [10]
and even sub-nanosecond, allowing for the first time
thermoreflectance CCD imaging of fast transient effects such
as snapback in ESD devices. Both thermoreflectance and
backside interferometry can measure heating through the
sample’s substrate using near infrared illumination. However,
thermoreflectance can also obtain thermal images directly from
the topside of the device using visible wavelength illumination.
Topside thermoreflectance with visible light offers better
diffraction limited spatial resolution (250nm) than backside
infrared methods (1.5-3µm.) The thermoreflectance method has
a comparatively simple experiment setup, requiring only a
standard optical microscope, LED illumination, CCD camera,
timing instruments, and sample biasing instruments. No
interferometer is required and the sample does not require
special preparation such as backside polishing, thinning, or
application of infrared antireflection coating. The main
drawback is that, since the thermoreflectance coefficient is
small, one cannot do single shot measurements, and averaging
(from seconds to minutes) is required. One should note that
typically the thermoreflectance coefficient is calibrated for
small temperature variations. When temperature rise is several
hundreds of degrees, the nonlinear dependence of the reflection
coefficient as a function of ambient temperature should be
taken into account. Thus more accurate calibrations are
necessary in order to quantify the exact temperature rise.
However the measured transient reflectance map should
provide some information about the current non-uniformity in
the device.
This paper presents transient thermoreflectance CCD
images of the surface temperature on a multiple finger n-type
lateral diffused MOS based silicon controlled rectifier
(NLDMOS-SCR) implemented for 100V node protection using
0.5µm biCMOS-DMOS process technology. Thermal images
have been captured to analyze non-destructive current
localization over the first 300 ns in response ESD like pulses.

This work was supported in part by a grant from UC Discovery and

National Semiconductor.

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978-1-4244-9111-7/11/$26.00 ©2011 IEEE EL.4.1 IRPS11-725
 controlled by a unified labview program and custom designed
(a)
hardware trigger board. Repeated square wave voltage pulses
are applied to the SCR at 1% duty cycle. For this study, the
width of the excitation pulse was varied between 300
nanoseconds to one millisecond to inspect SCR heating under
different duration pulses. For each excitation cycle, the pulse
causes a temperature rise in the SCR, which in turn induces a
change in the optical reflectance (R) at the SCR surface.
Images of the SCR surface reflectance during the excited (on)
and unexcited (off) states are recorded in the CCD camera. The
Reflectance change in reflectance amplitude (ΔR/R) produces a two-
Microscope dimension thermoreflectance map across the SCR surface.
Thermoreflectance image maps are then converted to
temperature maps by applying a thermoreflectance coefficient
(CTH), which describes a material’s change in optical
reflectivity in response to a temperature change. The
thermoreflectance change for most materials is very small, on
DUT the order of 10-4. However, by averaging over many device
excitation cycles signal to noise ratios can be sufficient to yield
temperature resolution down to the aforementioned 10mK.
Typical averaging time for the images in this study varied
between seconds to several minutes.
Calibration of the SCR thermoreflectance coefficient for the
(b) Excitation pulse N
… Excitation pulse N+1 silicon substrate and aluminum interconnects was performed in
a separate experiment step. The calibration procedure involved
heating the entire chip uniformly using an external
thermoelectric stage. The thermoreflectance change across the
Device full sample is recorded by the CCD while the temperature is
Voltage measured simultaneously using a type E microthermocouple.
The calibration image and thermocouple measurements are
Reflect- correlated to produce CTH values for each material region on
ance the chip. Material thermoreflectance depends on the
wavelength of external illumination [9]. For this reason a blue
LED 470nm LED was used with the SCR sample due to its relatively
pulse τ
high CTH for both aluminum and silicon.
Thermoreflectance imaging can be performed using time
Time based or frequency based analysis. Time based methods are
easily adapted to measure transient thermal effects. In this
Figure 1. (a) Thermoreflectance CCD imaging and device pulsing approach the “on” and “off” images are subtracted directly.
configuration. (b) Simplified timing diagram showing relationship between Furthermore, by pulsing the external LED synchronously with
device voltage pulse, optical thremoreflectance, and LED exposure pulse. device excitation, individual time windows in the device
thermal transient can be extracted [11]. The temporal resolution
Submicron transient thermal images show isolated single finger is determined by the minimum width of the LED pulse, which
triggering in the SCR with hot spots that move to different for this experiment was 50 nanoseconds. Fig. 1b shows the
locations on the device in 100’s of nanosecond time scale. In simplified timing diagram for time domain transient
addition, dominant heating is shown to alternate between active thermoreflectance CCD imaging. The relationship is shown
fingers at different snapback current levels. between device excitation, thermoreflectance change, and LED
exposure pulse. Good thermoreflectance signal to noise is
achieved by averaging over multiple excitation cycles.
II. EXPERIMENT
Different time windows in the thermal transient are obtained by
A. Transient Thermoreflectance CCD Imaging adjusting the delay (τ) of the LED pulse relative to the rising
edge of the device excitation pulse.
Fig. 1a shows a diagram of the thermoreflectance CCD
imaging setup used to acquire transient thermal images of the B. Device Pulsing Method and I-V Characteristics
MOS-SCR under ESD like electrical pulses. The topside of the
SCR chip is illuminated under a reflectance microscope using a An optical image of the NLDMOS-SCR ESD protection
narrow-band LED light source. The light reflected from the cell is shown in Fig. 3a. The 80 micron square layout consists
SCR surface is recorded on a variable frame rate, 12-bit of three anode fingers and two cathode fingers. The electrodes
scientific grade Dalsa CCD camera with 1024x1024 pixel are aluminum. The region surrounding the featured SCR is
resolution. Camera operation and device excitation timing is silicon. Electrical probing and thermal imaging were performed

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IRPS11-726 EL.4.2
 (a) MOS-SCR contact pads near the device (not shown). The other two probes
pulsing circuit High simultaneously measured the voltage waveform across the
Bandwidth SCR, which was recorded on a high bandwidth 3.5GHz
Oscilloscope LeCroy oscilloscope. Fig. 2a shows a diagram of the pulsing
circuit with voltage measurement probes indicated. Device
Voltage excitation was supplied by a commercial Berkeley Nucleonics
pulser voltage pulser rated to 300V and five amperes into a 50 ohm
MOS-SCR
50Ω load. Pulse rise times during excitation were observed to be
less than 5 nanoseconds. Pulse current was measured from the
1% duty
cycle transient voltage across the 50 ohm terminator. These
specifications enabled loading of the SCR with pulse
waveforms comparable to those produced by transmission line
pulsers in the context of human body model and machine
model ESD testing [12], or pulses on the order of 3A for 100
(b) MOS-SCR electrical transient for 300 nanosecond pulse nanoseconds with rise time less than 5 nanoseconds.
VBR
Fig. 2b shows a typical SCR electrical waveform for a 300
nanosecond long pulse using the described test setup. When
2
100 supplied with a voltage pulse of sufficient fast rise time and
II amplitude in excess of the breakdown voltage (VBR,) drain-gate
Snapback V
V capacitive coupling triggers the SCR into snapback operating
“quasi- mode. The structure enters breakdown (VBR=106V)
VSCR [V]

ISCR [A]
steady state”
approximately 10 nanoseconds into the ESD pulse, undergoes
an unstable period (t=10-100 nanoseconds) of changing device
internal resistance, then stabilizes at a holding voltage (VH) and
0 0 current after 100 nanoseconds. All thermal images in this study
showing SCR self heating in snapback mode were acquired
during this “quasi steady-state” part of the electrical waveform
after 100 nanoseconds.
0 100 200 300 400 500 The pulsed I-V curve for the SCR is shown in fig. 2c.
Time [ns] Values are included to show both the open circuit behavior of
the SCR for pulses below the breakdown voltage and also the
current sourced while in snapback at the holding voltage. The
(c) MOS-SCR pulsed I-V and DC gate leakage snapback currents were measured from the quasi-steady state
Leakage Current portion of the pulse waveform. Also shown in fig. 2c is gate
leakage current, which was checked using 100V direct current
1.E-12 1.E-10 1.E-8 1.E-6 1.E-4 1.E-2 after every pulse to ensure the SCR was not damaged. For
4
thermoreflectance imaging, SCR snapback current levels were
chosen between 1.15 and 1.47 amperes and pulse widths were
3 chosen between 100 nanoseconds to one millisecond. The
Pulsed Current [A]

influence of photogenerated carriers on SCR device triggering

Pulsed I-V
2 DC current @ 100V
1
VH
VBR
0 the electrical waveform showed any dependence on whether
0 40 80
Pulsed Voltage [V]
Figure 2. (a) MOS-SCR pulsing circuit. (b) Electrical waveform showing
SCR voltage and current for a 300 nanosecond ESD pulse. Thermal images
and snapback holding voltage and current were acquired during the “quasi-
steady state” region of the waveform. (c) SCR pulsed IV both below
breakdown voltage and at snapback holding voltage. DC gate leakage current
was measured after each pulsed measurement.
in-situ on a wafer sample. Two high speed, high current probes
were used to force the ESD-like pulse at anode and cathode
is assumed negligible due to the low intensity of the external
LED illumination. (Unlike scanning imaging methods, which
focus the illumination to a high intensity spot, camera based
thermoreflectance methods distribute the illumination over the
full device.) This assumption is supported by the observation
during experiment that neither the SCR breakdown voltage nor
120 the external LED was enabled or disabled.
An optical image of the ESD NLDMOS-SCR is shown in
fig. 3a. The 80 micron square layout has three aluminum anode
fingers and two cathode fingers. In pulsed mode the snapback
device is triggered by drain-gate capacitive coupling in
response to ESD pulses with sufficient amplitude and rise time.
The NLDMOS-SCR structure enters breakdown (VBR=106V)
approximately 10 nanoseconds into the ESD pulse, undergoes
an unstable period (t=10-100 nanoseconds) of changing device
internal resistance, then stabilizes at holding voltage and
current after 100 nanoseconds. All thermal images in this study
showing SCR self heating in snapback were acquired during

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EL.4.3 IRPS11-727
 this “quasi steady-state” part of the electrical waveform after (a) Anode 25µm
100 nanoseconds.
Thermal images have been captured to analyze non-
destructive current localization over the first 300 ns in response
ESD like pulses. Submicron transient thermal images show
isolated single finger triggering in the SCR with hot spots that a a’
move to different locations on the device in 100’s of
Cathode
nanosecond time scale. In addition, dominant heating is shown
to alternate between active fingers at different snapback current
levels.
(b)
III. RESULTS I=1.28A

A. SCR snapback heating at different current levels

Temperature rise distribution in the SCR was studied for
increasing current levels while in snapback mode. In snapback,
the SCR maintains a constant reference or “holding” voltage ΔT [K]
that is effectively independent of the current through the diode. 20
Fig. 3b shows transient thermoreflectance CCD images of the
MOS-SCR for snapback current levels I=1.22 and 1.33 15
amperes. The images were acquired at time = 300 nanoseconds
after the rising edge of the excitation pulse. Snapback holding 10
voltage is constant (VH=3.4V.) The thermal images at 300
nanoseconds revealed dominant heating confined to a 20 5
I=1.33A
micron region of the cathode finger near the cathode pad metal.
Fig. 3c shows thermoreflectance temperature change profiles 0
perpendicular to the SCR fingers (profile a-a’) for snapback
current levels I=1.15 through 1.47A. Between I=1.15A (onset
of snapback) and I=1.28A, hot spots occur only in the left
cathode finger and the maximum temperature change is 17K.
At I=1.33A, dominant heating switches to the right cathode
finger, and temperature increases by two degrees. At the next
current level, I=1.41A, no hot spot is seen and measured self
heating decreases almost to the level of the background
thermoreflectance noise level. One possible explanation for the
apparent “turn-off” of heating at I=1.41A is that the current
filamentation threshold has been exceeded. At lower current,
power and heating is concentrated in a single cathode finger. If (c) 20
higher currents produce a more uniform power distribution, for I=1.15
I=1.15A
example across both cathode fingers, then localized self heating I=1.19
I=1.19A

is reduced. 15 I=1.22
I=1.22A
I=1.28
I=1.28A
Temperature Change [K]

I=1.33
I=1.33A
B. Time dependence of SCR snapback self heating I=1.41
I=1.41A
10
Thermoreflectance images of heating in the SCR during I=1.47
I=1.47A
snapback were obtained at several different times in the
thermal transient ranging between 300 nanoseconds and one 5
millisecond. A clear time dependence was observed in both
magnitude and spatial distribution of the temperature change
across the SCR. Bias conditions were constant for all images in
0
the thermal transient, with snapback current = 1.22A, and
holding voltage = 3.4V. Three characteristic time regimes
became apparent in the SCR self heating transient. During the
a a’
first 300-1000 nanoseconds (for a 300 nanosecond square Distance along profile
pulse) temperature change was less than 20K and heating was
confined to a single cathode finger (fig. 3b.) Fig. 4 shows the Figure 3. (a) Optical image of MOS-SCR ESD protection device. (b)
thermoreflectance images and temperature change profiles at Thermoreflectance CCD images of SCR for snapback currents 1.28 and
30 and 170 microseconds. In this time regime maximum self 1.33A. Time = 300 nanoseconds. (c) Thermoreflectance surface temperature
profiles for the indicated line a-a’ across the three anode fingers and two
heating increases to ΔT=400K and dominant heating appears to cathode fingers for snapback currents 1.15-1.47A.
switch from left cathode finger to right cathode finger. This

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IRPS11-728 EL.4.4
 30µs 170µs ΔT [K] 1ms ΔT [K]
600 600

400 400

a a’ 200 a a’
200
0
0
600
600
30µs
Temperature Change [K]

170µs

Temperature Change [K]

400 400

200 200

0 0
a Distance along profile a’
a Distance along profile a’

Figure 4. SCR thermoreflectance images and temperature profiles
at 30 and 170 microseconds. Snapback current =1.22A for both
images.
phenomenon might be explained by high speed current
localization or non-simultaneous triggering of different finger
junctions. Fig. 5 shows SCR heating one millisecond into the
transient, when device heating appears to reach thermal steady
state. Heating is observed to spread to the anode fingers and
become symmetric with respect to the device fingers, favoring
neither the left nor right side of the SCR.
Current localization and thermal induced changes in the
material and device properties should be the cause of heat
switching fingers during the microsecond portion of the
thermal transient for the SCR in snapback. One should note
that typically thermoreflectance coefficient is calibrated for
small temperature variations. When temperature rise is several
hundreds of degrees, the nonlinear dependence of the reflection
coefficient as a function of ambient temperature should be
taken into account. Thus more accurate calibrations are
necessary in order to quantify the exact temperature rise.
However the measured transient reflectance map should
provide some information about the current non-uniformity in
the device.
IV. CONCLUSION
A new methodology has been developed and applied
toward indirect measurement of the current distribution in ESD
devices during pulsed operation. The methodology includes
transient thermoreflectance images capturing [1] and provides
informative characteristics for the transient ESD current
distribution during ESD event.
Experimental validation of the new approach is presented
for a multiple finger NLDMOS-SCR ESD protection device.
The experimental data have demonstrated both non-
simultaneous, nonuniform triggering of individual device
Figure 5. SCR thermoreflectance image and temperature profiles at
one millisecond.Snapback current =1.22A.
fingers as a function of snapback current levels and at different
times in the thermal transient.
SCR temperature change during the first 300 nanoseconds
of device excitation has been measured in excess of 15K. This
demonstrates transient CCD thermoreflectance may be useful
in analyzing device current distribution during ESD-like
events. In the microsecond time domain temperature increase
up to 400K has been observed.
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EL.4.5 IRPS11-729
 [12] H. Geiser, “Methods for the characterization of integrated circuits Universitaet Muenchen TUM, Shaker-Verlag, Aachen, Germany, 1999.
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IRPS11-730 EL.4.6