5 4 3 2 1

01
INTEL Comet Lake - H SYSTEM DIAGRAM STACKUP
D
TOP D

NVIDIA N18P-G62/G61 VRAM gDDR6 x 4pcs

GND
SODIMM1 DDR4 2666MHz
PCIE
X8 Lane 50W Max-P IN1
Max. 16GB 256M x32
STD PG.17
Channel A INTEL Package 29 x 29mm
4GHz
PG.24~25
IN2
PG.19~23
SODIMM2 RSV DDR4 2666MHz Comet Lake - H redriver
VCC
PG.18 27MHz
Max. 16GB Channel B PAGE 21 IN3
IT66317FN USB Type C PD
USB-C
Processor : Hexa Core / Quad Core redriver
TPS65987SDJ CONN GND
Power : 35 (Watt)
Package : BGA1440
TUSB546 HDMI v2.0 BOT
Size : 42 x 28 (mm) eDP
mini DP 1.4
Die Size : 13.6 x 9.1 (mm) 15.6" eDP Panel USB3/DP
HD/FHD/UHD DP MUX
PG.26
DMI
SATA 6GB/s USB 3.0 PORT4

SATA & PCIE SSD SATA1A PORT1 PORT2 PORT3

C
M.2 2280-D5 redriver redriver
C

LANE9-12
PG.32 PCIEx4 32GB/s
INTEL PCH USB 3.1 Gen1
Type A
PTN36001 PTN36001
PG.30
CML USB 3.1 board USB 3.1 board
HD CAM IR CAM
Charger Gen1 Type A Gen1 Type A
TPS2546 PG.26 PG.26
PCIEx4 32GB/s
Intel Optane
M.2 2280-D5 PG.33
LANE 21-24 USB 2.0 PORT1 PORT2 PORT3 PORT6 PORT4 PORT5

Power : Watt PCI-E x 1 Gen1 PORT7 PORT8

Package : FCBGA837
Size : 23 x 23 (mm) LANE14 LANE16 LANE15

LAN Card Reader board WLAN/ BT

I2C / SMB RTL8118ASH-CG 10 /100 / 1G Genesy GL9750 PG.33 LGA1216 PG.33
Touch PAD
B SPI B

ROM RJ45 SD
PS2 PG.12 CONN CONN
HDA CNVI
SPI
TPM
SLB9670VQ2.0
PAGE 34 HDA

KBC
ITE ITE5570 PG.37 LPC AUDIO CODEC I2S SPK AMP
ALC1309H
ALC3315-CG PG.29
I2C
Keyboard K/B FAN PG.28
26+9 pin RGB Backlit
PG.38 PG.38 PG.38

DMIC HP / MIC Combo Jack SPK*2

PG.28
A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
C 1A
Block Diagram
NB5 Date: Wednesday, April 08, 2020 Sheet 1 of 106
5 4 3 2 1
 5 4 3 2 1

Processor pull-up (CPU)

H_PROCHOT#

JTAG_TDO_PCH
R1554

R1583
1K_5%_2

51_5%_4
+VCCSTG

+1.05V
Host CLK:
Trace length < 11000 mils
Trace spacing = 15 / 20 mils, Impendence 85 ohm
CML-H Processor (CLK,MISC,JTAG)

UX1E
CFG[4] Ra
2
CLK_CPU_BCLKP B31 BN25 CFG0
[11] CLK_CPU_BCLKP CLK_CPU_BCLKN BCLKP CFG_0 TP1026 EDP Output from DGPU Hi Non Stuff
A32 BN27 CFG1
JTAGX_PCH [11] CLK_CPU_BCLKN BCLKN CFG_1 TP1024
R1581 51_5%_4 BN26 CFG2 *
D CPU_PCI_BCLKP D35 CFG_2 BN28 CFG3 D
[11] CPU_PCI_BCLKP *
CPU_PCI_BCLKN C36 PCI_BCLKP CFG_3 BR20 CFG4
[11] CPU_PCI_BCLKN PCI_BCLKN CFG_4 EDP Output from iGPU Low Stuff
BM20 CFG5
CLK_DPLL_NSCCLKP E31 CFG_5 BT20 CFG6
[11] CLK_DPLL_NSCCLKP CLK_DPLL_NSCCLKN D31 CLK24P CFG_6 BP20 CFG7
[11] CLK_DPLL_NSCCLKN CLK24N CFG_7 BR23 TP1098
CFG8
JTAG_TDO_PCH CFG_8 BR22 TP1016
JTAG_TDO_PCH [10] CFG9 *
JTAG_TMS_PCH CFG_9 BT23 TP1023
CFG10
PROCHOT# (50ohm) JTAG_TDI_PCH JTAG_TMS_PCH
JTAG_TDI_PCH
[10]
[10]
CFG_10 BT22 CFG11
*
* TP1017
Processor Strapping Switchable or Optimus CFG4 need stuff
JTAGX_PCH CFG_11 BM19 CFG12
Trace Length <11 inches JTAGX_PCH [10] CFG_12 BR19 CFG13 *
CFG_13 BP19 CFG14
Cb need placment near VR H_CPU_SVIDALRT# BH31 CFG_14 BT19 CFG15
TP1100 The CFG signals have a default value of '1' if not terminated on the board.
VR_SVID_CLK_R BH32 VIDALERT# CFG_15 TP1099
*
H_CPU_SVIDDAT BH29 VIDSCK BN23 CFG16 * TP1025
H_PROCHOT#_R BR30 VIDSOUT CFG_17 BP23 CFG17
H_PROCHOT#_R PROCHOT# CFG_16 BP22 TP1015
82,88,105] H_PROCHOT# R1555 499_1%_2 CFG18 * 0 Enable; SET DFX ENABLED BIT IN DEBUG
DDR_VTT_CNTL BT13 CFG_19 BN22 TP1096
CFG19 *
[18] DDR_VTT_CNTL DDR_VTT_CNTL CFG_18 TP1097
C1928
* 1 , Disable;
Cb BR27 XDP_BPM0
*
CFG3
*47p/25V_2 R1584 *1K_5%_2
BPM#_0 BT27 XDP_BPM1 TP1095
BPM#_1 BM31 XDP_BPM2 TP1094
* TP1018
H_VCCST_PWRGD H13 BPM#_2 BT30 XDP_BPM3 * TP1092
VCCST_PWRGD BPM#_3 CFG2 R1586 1K_5%_2
*
H_PWRGD BT31
Layout Notes: [10] H_PWRGD CPU_PLTRST#R BP35 PROCPWRGD BT28 JTAG_TDO_PCH
*
CFG4
[11] CPU_PLTRST#R RESET# PROC_TDO TP1027
R1599 Ra 1K_5%_2
BM34 BL32 JTAG_TDI_PCH
[11] PM_SYNC PM_SYNC PROC_TDI TP1004
H_PWRGD (50ohm) R1099 20_1%_2 H_PM_DOWN_R BP31 BP28 JTAG_TMS_PCH * CFG5 R1603 1K_5%_2
[11] H_PM_DOWN EC_PECI BT34 PM_DOWN PROC_TMS BR28 JTAGX_PCH TP1014
*
C Trace Length: 1~11 inches [11,42] EC_PECI PM_THRMTRIP# J31 PECI PROC_TCK
*
TP1022
CFG6 R1600 *1K_5%_2 C
THERMTRIP# BP30 XDP_TRST# * XDP_TRST# [15]
SKTOCC_N_R R1071 *0_4/S SKTOCC_N BR33 PROC_TRST# BL30 XDP_PREQ# CFG10 R1594 *1K_5%_2
CPU_PLTRST# (50ohm) [13] SKTOCC_N_R PROC_SEL# BN1 SKTOCC# PROC_PREQ# BP27 XDP_PRDY# XDP_PREQ# [15]
Trace Length: 10~17 inches PROC_SELECT# PROC_PRDY# XDP_PRDY# [15]
CFG12 R1605 *1K_5%_2
+VCCSTPLL R1573 *10K_5%_2 CATERR# BM30
CATERR# BT25 CFG_RCOMP R1588 49.9_1%_2 CFG13 R1606 *1K_5%_2
PM_SYNC (50ohm) 8/7 PH to +VCCSTPLL AT13 CFG_RCOMP
Trace Length: 1~11.25 inches 09/17 R1099, R1573 change to 0201 AW13 ZVM#
MSM#
AU13
Design Note(CFG_RCOMP):
AY13 RSVD#AU13 DEFENSIVE DESIGN 50-OHM FOR R40PR (SV REQ)
RSVD#AY13

CPU CORE SVID 5 OF 13

Configuration Signals: The CFG signals have a default value of '1' if not terminated on the board.
*CPU_CFL-H_1440P
Layout note:
1.Need routing together CFG[0] Stall reset sequence after PCU PLL Note that some of the Intel reference designs board might connect CFG[0] to
lock until de-asserted HOOK[2]. This route is not needed on a OxM board.
2.ALERT need between CLK and DATA.
x1 = Normal operation
CFG[2] PCI Express Static Lane Reversal
+VCCSTPLL x0 = Lane numbers reversed
8/7 PH to +VCCSTPLL
x1 = Disabled
PLACE THE PU RESISTORS Close to CPU CFG[4] eDP enable
CLOSE TO VR x0 = Enabled
PULL UP IS IN THE VR MODULE R1051 x00 = 1 x8 & 2 x4 PCI Express
*54.9/F_4
B SVID CLK x01 = reserved B
CFG[6:5] PCI Express Bifurcation
VR_SVID_CLK_R R1054 *0_5%_2/S x10 = 2 x8 PCI Express
VR_SVID_CLK [88]

x11 = 1 x16 PCI Express

THERMTRIP# (50ohm)
Trace Length: 1.1~12 inches x1 = PEG train follow RESETB de-asseted
CFG[7] PEG defer training
Rb need placment near PCH x0 = PEG wait for BIOS fro training
+VCCSTPLL
8/7 PH to +VCCSTPLL
Close to CPU
CLOSE TO CPU PM_THRMTRIP#
PLACE THE PU RESISTORS R1055
[11,42] PM_THRMTRIP#
Rb
56.2_1%_2 SVID ALERT R1273 1K_5%_2
CPU VDDQ
H_CPU_SVIDALRT# +VCCSTPLL +1.05V
R1047 220_5%_2 VR_SVID_ALERT# [88] Note: please keep plane is enough for VDDQ 2.8A
8/7 PH to +VCCSTPLL
HWPD
Placement close to CPU.
R1110 +1.2VSUS
Ra close to CPU side
1K_5%_2
H_VCCST_PWRGD trace 0.3" - 1.5" C1466 0.1u/16V_4

Ra C1502 *0.1U/16V_4
+VCCSTPLL D1004
CLOSE TO CPU PROC_SEL# H_VCCST_PWRGD_R
8/7 PH to +VCCSTPLL 1 2 R1117 60.4_1%_2 H_VCCST_PWRGD
A PLACE THE PU RESISTORS [10,42,86,87,92,93] HWPG A

Close to CPU RB500V-40 C1355

*10p/25V_2
R1048 R1613
100_1%_2 *0_5%_2
SVID DATA PROJECT : G3BE
H_CPU_SVIDDAT [6,10,17,18,51,87,93,95] +1.2VSUS
R1044 *0_5%_2/S VR_SVID_DATA [88] [6,10,92] +1.05V
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
CFL 1/7 (JTAG/MISC)
NB5 Date: Wednesday, April 08, 2020 Sheet 2 of 106
5 4 3 2 1
 5 4 3 2 1

CFL-H Processor (DMI,PEG,FDI)

+1.2VSUS
+3VS5
+3V
[2,6,10,17,18,51,87,93,95]
[10,12,14,23,31,35,38,42,47,48,51,82,86,88,92,93,95,104,105]
[9,10,11,13,16,17,18,21,28,30,31,33,34,36,38,39,41,42,48,50,51,52,82,88,91,95,98,99,101,105]

UX1C
3
E25 B25
D25 PEG_RXP_0 PEG_TXP_0 A25
PEG_RXN_0 PEG_TXN_0
E24 B24
F24 PEG_RXP_1 PEG_TXP_1 C24
PEG_RXN_1 PEG_TXN_1
D E23 B23 D
D23 PEG_RXP_2 PEG_TXP_2 A23
PEG_RXN_2 PEG_TXN_2
E22 B22
F22 PEG_RXP_3 PEG_TXP_3 C22
PEG_RXN_3 PEG_TXN_3
E21 B21
D21 PEG_RXP_4 PEG_TXP_4 A21
PEG_RXN_4 PEG_TXN_4
E20 B20
F20 PEG_RXP_5 PEG_TXP_5 C20
PEG_RXN_5 PEG_TXN_5
E19 B19
D19 PEG_RXP_6 PEG_TXP_6 A19
PEG_RXN_6 PEG_TXN_6
dGPU E18
F18 PEG_RXP_7 PEG_TXP_7
B18
C18
PEG_RXN_7 PEG_TXN_7

[19] PEG_RXP7
D17
E17 PEG_RXP_8 PEG_TXP_8
A17 PEG_TXP7_C
B17 PEG_TXN7_C
C1982
C1985
0.22u/6.3V_2
0.22u/6.3V_2
PEG_TXP7 [19]
dGPU
[19] PEG_RXN7 PEG_RXN_8 PEG_TXN_8 PEG_TXN7 [19]

[19] PEG_RXP6 F16 C16 PEG_TXP6_C C1987 0.22u/6.3V_2

E16 PEG_RXP_9 PEG_TXP_9 B16 PEG_TXN6_C PEG_TXP6 [19]
[19] PEG_RXN6 C1986 0.22u/6.3V_2
PEG_RXN_9 PEG_TXN_9 PEG_TXN6 [19]
D15 A15 PEG_TXP5_C C1988 0.22u/6.3V_2
[19] PEG_RXP5 PEG_RXP_10 PEG_TXP_10 PEG_TXP5 [19]
[19] PEG_RXN5 E15 B15 PEG_TXN5_C C1991 0.22u/6.3V_2
PEG_RXN_10 PEG_TXN_10 PEG_TXN5 [19]
F14 C14 PEG_TXP4_C C1996 0.22u/6.3V_2
[19] PEG_RXP4 PEG_RXP_11 PEG_TXP_11 PEG_TXP4 [19]
[19] PEG_RXN4 E14 B14 PEG_TXN4_C C1992 0.22u/6.3V_2
PEG_RXN_11 PEG_TXN_11 PEG_TXN4 [19]
D13 A13 PEG_TXP3_C C1995 0.22u/6.3V_2
[19] PEG_RXP3 PEG_RXP_12 PEG_TXP_12 PEG_TXP3 [19]
E13 B13 PEG_TXN3_C C1999 0.22u/6.3V_2
[19] PEG_RXN3 PEG_RXN_12 PEG_TXN_12 PEG_TXN3 [19]
F12 C12 PEG_TXP2_C C2006 0.22u/6.3V_2
[19] PEG_RXP2 PEG_RXP_13 PEG_TXP_13 PEG_TXP2 [19]
E12 B12 PEG_TXN2_C C2000 0.22u/6.3V_2
[19] PEG_RXN2 PEG_RXN_13 PEG_TXN_13 PEG_TXN2 [19]
C C
[19] PEG_RXP1 D11 A11 PEG_TXP1_C C2007 0.22u/6.3V_2
E11 PEG_RXP_14 PEG_TXP_14 B11 PEG_TXN1_C PEG_TXP1 [19]
[19] PEG_RXN1 C2008 0.22u/6.3V_2
PEG_RXN_14 PEG_TXN_14 PEG_TXN1 [19]
F10 C10 PEG_TXP0_C C2011 0.22u/6.3V_2
[19] PEG_RXP0 PEG_RXP_15 PEG_TXP_15 PEG_TXP0 [19]
Layout Note: PEG_RCOMP [19] PEG_RXN0 E10 B10 PEG_TXN0_C C2010 0.22u/6.3V_2
PEG_RXN_15 PEG_TXN_15 PEG_TXN0 [19]

Max Trace length = 600 MILS +VCCIO R1617 24.9_1%_2 PEG_COMP G2

PEG_RCOMP
Min Trace width = 5 MILS
Trace spacing to others = 15 MILS
D8 B8
[9] DMI_RXP0 E8 DMI_RXP_0 DMI_TXP_0 A8 DMI_TXP0 [9]
[9] DMI_RXN0 DMI_RXN_0 DMI_TXN_0 DMI_TXN0 [9]
E6 C6 DMI_TXP1 [9]
[9] DMI_RXP1 DMI_RXP_1 DMI_TXP_1
F6 B6
[9] DMI_RXN1
D5
DMI_RXN_1 DMI_TXN_1
B5
DMI_TXN1 [9]
DMI
DMI [9]
[9]
DMI_RXP2
DMI_RXN2
E5 DMI_RXP_2
DMI_RXN_2
DMI_TXP_2
DMI_TXN_2
A5
DMI_TXP2
DMI_TXN2
[9]
[9]
J8 D4
[9] DMI_RXP3 DMI_RXP_3 DMI_TXP_3 DMI_TXP3 [9]
J9 B4 DMI_TXN3 [9]
[9] DMI_RXN3 DMI_RXN_3 3 OF 13 DMI_TXN_3
*CPU_CFL-H_1440P

B B

UX1D

K36 D29 INT_eDP_TXP0

DDI1_TXP_0 EDP_TXP_0 INT_eDP_TXN0 INT_eDP_TXP0 [28]
K37 E29 INT_eDP_TXN0 [28]
J35 DDI1_TXN_0 EDP_TXN_0 F28 INT_eDP_TXP1
DDI1_TXP_1 EDP_TXP_1 INT_eDP_TXN1 INT_eDP_TXP1 [28]
J34 E28 INT_eDP_TXN1 [28]
H37 DDI1_TXN_1 EDP_TXN_1 A29 INT_eDP_TXP2
H36
J37
DDI1_TXP_2
DDI1_TXN_2
EDP_TXP_2
EDP_TXN_2
B29
C28
INT_eDP_TXN2
INT_eDP_TXP3
INT_eDP_TXP2
INT_eDP_TXN2
[28]
[28] eDP
DDI1_TXP_3 EDP_TXP_3 INT_eDP_TXN3 INT_eDP_TXP3 [28]
J38 B28 INT_eDP_TXN3 [28]
DDI1_TXN_3 EDP_TXN_3
D27 C26 INT_eDP_AUXP
DDI1_AUXP EDP_AUXP INT_eDP_AUXN INT_eDP_AUXP [28]
E27 B26
DDI1_AUXN EDP_AUXN INT_eDP_AUXN [28]
H34
H33 DDI2_TXP_0
F37 DDI2_TXN_0 A33 EDP_DISP_UTIL
DDI2_TXP_1 EDP_DISP_UTIL TP1091
G38
F34 DDI2_TXN_1
*
F35 DDI2_TXP_2 D37 EDP_RCOMP R1101 24.9_1%_2
DDI2_TXN_2 DISP_RCOMP +VCCIO
E37
DDI2_TXP_3
E36 Layout Note: DISP_RCOMP
DDI2_TXN_3
F26 Max Trace length = 600 MILS
E26 DDI2_AUXP
DDI2_AUXN Min Trace width = 5 MILS
C34
DDI3_TXP_0
Isolation Spacing = 20 MILS
D34
B36 DDI3_TXN_0
B34 DDI3_TXP_1
F33 DDI3_TXN_1
E33 DDI3_TXP_2
A DDI3_TXN_2 A
C33 09/17 R124682 change to 0201
B33 DDI3_TXP_3
DDI3_TXN_3
12/10 R124682 change to mount
G27 AUD_AZACPU_SCLK
A27 PROC_AUDIO_CLK G25 AUD_AZACPU_SDO_R AUD_AZACPU_SCLK [10]
DDI3_AUXP PROC_AUDIO_SDI AUD_AZACPU_SDI_R AUD_AZACPU_SDO_R [10]
B27 G29 R124682 20_1%_2
DDI3_AUXN PROC_AUDIO_SDO AUD_AZACPU_SDI [10]
4 of 13

*CPU_CFL-H_1440P

PROJECT : G3BE
R12167 R12168 12/10 R12167, R12168 change to unmount
*2K_1%_2 *2K_1%_2 Quanta Computer Inc.
Size Document Number Rev
Custom CFL 2/7 (DMI/EDP/PEG) 1A
NB5 Date: Wednesday, April 08, 2020 Sheet 3 of 106
5 4 3 2 1
 5 4 3 2 1

CFL-H Processor (DDR4)

Interleave / butterfly 4
[18] M_B_DQ[63:0]
UX1B
M_B_DQ0 BT11 AM9
M_B_DQ1 DDR1_DQ_0/DDR0_DQ_16 DDR1_CKP_0/DDR1_CKP_0 M_B_CLKP0 [18]
UX1A BR11 AN9
[17] M_A_DQ[63:0] M_A_DQ0 M_B_DQ2 DDR1_DQ_1/DDR0_DQ_17 DDR1_CKN_0/DDR1_CKN_0 M_B_CLKN0 [18]
BR6 AG1 BT9 AM7
M_A_DQ1 DDR0_DQ_0/DDR0_DQ_0 DDR0_CKP_0/DDR0_CKP_0 M_A_CLKP0 [17] M_B_DQ3 DDR1_DQ_2/DDR0_DQ_18 DDR1_CKP_1/DDR1_CKP_1 M_B_CLKP1 [18]
D BT6 AG2 BR8 AM8 D
M_A_DQ2 DDR0_DQ_1/DDR0_DQ_1 DDR0_CKN_0/DDR0_CKN_0 M_A_CLKN0 [17] M_B_DQ4 DDR1_DQ_3/DDR0_DQ_19 DDR1_CKN_1/DDR1_CKN_1 M_B_CLKN1 [18]
BP3 AK2 BP11 AM11
M_A_DQ3 DDR0_DQ_2/DDR0_DQ_2 DDR0_CKP_1/DDR0_CKP_1 M_A_CLKP1 [17] M_B_DQ5 DDR1_DQ_4/DDR0_DQ_20 NC/DDR1_CKP_2
BR3 AK1 BN11 AM10
DDR0_DQ_3/DDR0_DQ_3 DDR0_CKN_1/DDR0_CKN_1 M_A_CLKN1 [17] DDR1_DQ_5/DDR0_DQ_21 NC/DDR1_CKN_2
M_A_DQ4 BN5 AL3 M_B_DQ6 BP8 AJ10
M_A_DQ5 BP6 DDR0_DQ_4/DDR0_DQ_4 NC/DDR0_CKP_2 AK3 M_B_DQ7 BN8 DDR1_DQ_6/DDR0_DQ_22 NC/DDR1_CKP_3 AJ11
M_A_DQ6 BP2 DDR0_DQ_5/DDR0_DQ_5 NC/DDR0_CKN_2 AL2 M_B_DQ8 BL12 DDR1_DQ_7/DDR0_DQ_23 NC/DDR1_CKN_3
M_A_DQ7 BN3 DDR0_DQ_6/DDR0_DQ_6 NC/DDR0_CKP_3 AL1 M_B_DQ9 BL11 DDR1_DQ_8/DDR0_DQ_24 AT8
M_A_DQ8 DDR0_DQ_7/DDR0_DQ_7 NC/DDR0_CKN_3 M_B_DQ10 DDR1_DQ_9/DDR0_DQ_25 DDR1_CKE_0/DDR1_CKE_0 M_B_CKE0 [18]
BL4 BL8 AT10
DDR0_DQ_8/DDR0_DQ_8 DDR1_DQ_10/DDR0_DQ_26 DDR1_CKE_1/DDR1_CKE_1 M_B_CKE1 [18]
M_A_DQ9 BL5 AT1 M_B_DQ11 BJ8 AT7
M_A_DQ10 DDR0_DQ_9/DDR0_DQ_9 DDR0_CKE_0/DDR0_CKE_0 M_A_CKE0 [17] M_B_DQ12 DDR1_DQ_11/DDR0_DQ_27 DDR1_CKE_2/DDR1_CKE_2
BL2 AT2 BJ11 AT11
M_A_DQ11 DDR0_DQ_10/DDR0_DQ_10 DDR0_CKE_1/DDR0_CKE_1 M_A_CKE1 [17] M_B_DQ13 DDR1_DQ_12/DDR0_DQ_28 DDR1_CKE_3/DDR1_CKE_3
BM1 AT3 BJ10
M_A_DQ12 BK4 DDR0_DQ_11/DDR0_DQ_11 DDR0_CKE_2/DDR0_CKE_2 AT5 M_B_DQ14 BL7 DDR1_DQ_13/DDR0_DQ_29 AF11
M_A_DQ13 DDR0_DQ_12/DDR0_DQ_12 DDR0_CKE_3/DDR0_CKE_3 M_B_DQ15 DDR1_DQ_14/DDR0_DQ_30 DDR1_CS#_0/DDR1_CS#_0 M_B_CS#0 [18]
BK5 BJ7 AE7
DDR0_DQ_13/DDR0_DQ_13 DDR1_DQ_15/DDR0_DQ_31 DDR1_CS#_1/DDR1_CS#_1 M_B_CS#1 [18]
M_A_DQ14 BK1 AD5 M_B_DQ16 BG11 AF10
M_A_DQ15 DDR0_DQ_14/DDR0_DQ_14 DDR0_CS#_0/DDR0_CS#_0 M_A_CS#0 [17] M_B_DQ17 DDR1_DQ_16/DDR0_DQ_48 NC/DDR1_CS#_2
BK2 AE2 BG10 AE10
M_A_DQ16 DDR0_DQ_15/DDR0_DQ_15 DDR0_CS#_1/DDR0_CS#_1 M_A_CS#1 [17] M_B_DQ18 DDR1_DQ_17/DDR0_DQ_49 NC/DDR1_CS#_3
BG4 AD2 BG8
M_A_DQ17 BG5 DDR0_DQ_16/DDR0_DQ_32 NC/DDR0_CS#_2 AE5 M_B_DQ19 BF8 DDR1_DQ_18/DDR0_DQ_50 AF7
M_A_DQ18 DDR0_DQ_17/DDR0_DQ_33 NC/DDR0_CS#_3 M_B_DQ20 DDR1_DQ_19/DDR0_DQ_51 DDR1_ODT_0/DDR1_ODT_0 M_B_DIM0_ODT0 [18]
BF4 BF11 AE8
M_A_DQ19 DDR0_DQ_18/DDR0_DQ_34 M_B_DQ21 DDR1_DQ_20/DDR0_DQ_52 NC/DDR1_ODT_1 M_B_DIM0_ODT1 [18]
BF5 AD3 BF10 AE9
M_A_DQ20 DDR0_DQ_19/DDR0_DQ_35 DDR0_ODT_0/DDR0_ODT_0 M_A_DIM0_ODT0 [17] M_B_DQ22 DDR1_DQ_21/DDR0_DQ_53 NC/DDR1_ODT_2
BG2 AE4 BG7 AE11
M_A_DQ21 DDR0_DQ_20/DDR0_DQ_36 NC/DDR0_ODT_1 M_A_DIM0_ODT1 [17] M_B_DQ23 DDR1_DQ_22/DDR0_DQ_54 NC/DDR1_ODT_3
BG1 AE1 BF7
M_A_DQ22 BF1 DDR0_DQ_21/DDR0_DQ_37 NC/DDR0_ODT_2 AD4 M_B_DQ24 BB11 DDR1_DQ_23/DDR0_DQ_55 AH10
M_A_DQ23 DDR0_DQ_22/DDR0_DQ_38 NC/DDR0_ODT_3 M_B_DQ25 DDR1_DQ_24/DDR0_DQ_56 DDR1_CAB_3/DDR1_MA_16 M_B_RAS# [18]
BF2 BC11 AH11 M_B_WE# [18]
M_A_DQ24 BD2 DDR0_DQ_23/DDR0_DQ_39 AH5 M_B_DQ26 BB8 DDR1_DQ_25/DDR0_DQ_57 DDR1_CAB_2/DDR1_MA_14 AF8
M_A_DQ25 DDR0_DQ_24/DDR0_DQ_40 DDR0_CAB_4/DDR0_BA_0 M_A_BA0 [17] M_B_DQ27 DDR1_DQ_26/DDR0_DQ_58 DDR1_CAB_1/DDR1_MA_15 M_B_CAS# [18]
BD1 AH1 BC8
M_A_DQ26 DDR0_DQ_25/DDR0_DQ_41 DDR0_CAB_6/DDR0_BA_1 M_A_BA1 [17] M_B_DQ28 DDR1_DQ_27/DDR0_DQ_59
BC4 AU1 BC10 AH8
M_A_DQ27 DDR0_DQ_26/DDR0_DQ_42 DDR0_CAA_5/DDR0_BG_0 M_A_BG#0 [17] M_B_DQ29 DDR1_DQ_28/DDR0_DQ_60 DDR1_CAB_4/DDR1_BA_0 M_B_BA0 [18]
BC5 BB10 AH9
M_A_DQ28 DDR0_DQ_27/DDR0_DQ_43 M_B_DQ30 DDR1_DQ_29/DDR0_DQ_61 DDR1_CAB_6/DDR1_BA_1 M_B_BA1 [18]
BD5 AH4 BC7 AR9
DDR0_DQ_28/DDR0_DQ_44 DDR0_CAB_3/DDR0_MA_16 M_A_RAS# [17] DDR1_DQ_30/DDR0_DQ_62 DDR1_CAA_5/DDR1_BG_0 M_B_BG#0 [18]
M_A_DQ29 BD4 AG4 M_B_DQ31 BB7
M_A_DQ30 DDR0_DQ_29/DDR0_DQ_45 DDR0_CAB_2/DDR0_MA_14 M_A_WE# [17] M_B_DQ32 DDR1_DQ_31/DDR0_DQ_63 M_B_A[13:0] [18]
BC1 AD1 M_A_CAS# [17] AA11 AJ9 M_B_A0
C M_A_DQ31 BC2 DDR0_DQ_30/DDR0_DQ_46 DDR0_CAB_1/DDR0_MA_15 M_B_DQ33 AA10 DDR1_DQ_32/DDR1_DQ_16 DDR1_CAB_9/DDR1_MA_0 AK6 M_B_A1 C
M_A_DQ32 DDR0_DQ_31/DDR0_DQ_47 M_A_A0 M_A_A[13:0] [17] M_B_DQ34 DDR1_DQ_33/DDR1_DQ_17 DDR1_CAB_8/DDR1_MA_1
AB1 AH3 AC11 AK5 M_B_A2
M_A_DQ33 AB2 DDR0_DQ_32/DDR1_DQ_0 DDR0_CAB_9/DDR0_MA_0 AP4 M_A_A1 M_B_DQ35 AC10 DDR1_DQ_34/DDR1_DQ_18 DDR1_CAB_5/DDR1_MA_2 AL5 M_B_A3
M_A_DQ34 AA4 DDR0_DQ_33/DDR1_DQ_1 DDR0_CAB_8/DDR0_MA_1 AN4 M_A_A2 M_B_DQ36 AA7 DDR1_DQ_35/DDR1_DQ_19 NC/DDR1_MA_3 AL6 M_B_A4
M_A_DQ35 AA5 DDR0_DQ_34/DDR1_DQ_2 DDR0_CAB_5/DDR0_MA_2 AP5 M_A_A3 M_B_DQ37 AA8 DDR1_DQ_36/DDR1_DQ_20 NC/DDR1_MA_4 AM6 M_B_A5
M_A_DQ36 AB5 DDR0_DQ_35/DDR1_DQ_3 NC/DDR0_MA_3 AP2 M_A_A4 M_B_DQ38 AC8 DDR1_DQ_37/DDR1_DQ_21 DDR1_CAA_0/DDR1_MA_5 AN7 M_B_A6
M_A_DQ37 AB4 DDR0_DQ_36/DDR1_DQ_4 NC/DDR0_MA_4 AP1 M_A_A5 M_B_DQ39 AC7 DDR1_DQ_38/DDR1_DQ_22 DDR1_CAA_2/DDR1_MA_6 AN10 M_B_A7
M_A_DQ38 AA2 DDR0_DQ_37/DDR1_DQ_5 DDR0_CAA_0/DDR0_MA_5 AP3 M_A_A6 DDR1_DQ_39/DDR1_DQ_23 DDR1_CAA_4/DDR1_MA_7
M_A_DQ39 AA1 DDR0_DQ_38/DDR1_DQ_6 DDR0_CAA_2/DDR0_MA_6 AN1 M_A_A7 M_B_DQ40 W8 AN8 M_B_A8
M_A_DQ40 V5 DDR0_DQ_39/DDR1_DQ_7 DDR0_CAA_4/DDR0_MA_7 AN3 M_A_A8 M_B_DQ41 W7 DDR1_DQ_40/DDR1_DQ_24 DDR1_CAA_3/DDR1_MA_8 AR11 M_B_A9
M_A_DQ41 V2 DDR0_DQ_40/DDR1_DQ_8 DDR0_CAA_3/DDR0_MA_8 AT4 M_A_A9 M_B_DQ42 V10 DDR1_DQ_41/DDR1_DQ_25 DDR1_CAA_1/DDR1_MA_9 AH7 M_B_A10
M_A_DQ42 U1 DDR0_DQ_41/DDR1_DQ_9 DDR0_CAA_1/DDR0_MA_9 AH2 M_A_A10 M_B_DQ43 V11 DDR1_DQ_42/DDR1_DQ_26 DDR1_CAB_7/DDR1_MA_10 AN11 M_B_A11
M_A_DQ43 U2 DDR0_DQ_42/DDR1_DQ_10 DDR0_CAB_7/DDR0_MA_10 AN2 M_A_A11 M_B_DQ44 W 11 DDR1_DQ_43/DDR1_DQ_27 DDR1_CAA_7/DDR1_MA_11 AR10 M_B_A12
M_A_DQ44 V1 DDR0_DQ_43/DDR1_DQ_11 DDR0_CAA_7/DDR0_MA_11 AU4 M_A_A12 M_B_DQ45 W 10 DDR1_DQ_44/DDR1_DQ_28 DDR1_CAA_6/DDR1_MA_12 AF9 M_B_A13
M_A_DQ45 V4 DDR0_DQ_44/DDR1_DQ_12 DDR0_CAA_6/DDR0_MA_12 AE3 M_A_A13 M_B_DQ46 V7 DDR1_DQ_45/DDR1_DQ_29 DDR1_CAB_0/DDR1_MA_13 AR7
M_A_DQ46 DDR0_DQ_45/DDR1_DQ_13 DDR0_CAB_0/DDR0_MA_13 M_B_DQ47 DDR1_DQ_46/DDR1_DQ_30 DDR1_CAA_9/DDR1_BG_1 M_B_BG#1 [18]
U5 AU2 V8 AT9
M_A_DQ47 DDR0_DQ_46/DDR1_DQ_14 DDR0_CAA_9/DDR0_BG_1 M_A_BG#1 [17] M_B_DQ48 DDR1_DQ_47/DDR1_DQ_31 DDR1_CAA_8/DDR1_ACT# M_B_ACT# [18]
U4 AU3 R11
M_A_DQ48 DDR0_DQ_47/DDR1_DQ_15 DDR0_CAA_8/DDR0_ACT# M_A_ACT# [17] M_B_DQ49 DDR1_DQ_48/DDR1_DQ_48
R2 P11 AJ7
DDR0_DQ_48/DDR1_DQ_32 DDR1_DQ_49/DDR1_DQ_49 NC/DDR1_PAR M_B_PARITY [18]
M_A_DQ49 P5 AG3 M_B_DQ50 P7 AR8
M_A_DQ50 DDR0_DQ_49/DDR1_DQ_33 NC/DDR0_PAR M_A_PARITY [17] M_B_DQ51 DDR1_DQ_50/DDR1_DQ_50 NC/DDR1_ALERT# M_B_ALERT# [18]
R4 AU5 R8
M_A_DQ51 DDR0_DQ_50/DDR1_DQ_34 NC/DDR0_ALERT# M_A_ALERT# [17] M_B_DQ52 DDR1_DQ_51/DDR1_DQ_51
P4 R10
DDR0_DQ_51/DDR1_DQ_35 DDR1_DQ_52/DDR1_DQ_52 M_B_DQSN[7:0] [18]
M_A_DQ52 R5 M_B_DQ53 P10 BN9 M_B_DQSN0
M_A_DQ53 DDR0_DQ_52/DDR1_DQ_36 M_A_DQSN0 M_A_DQSN[7:0] [17] M_B_DQ54 DDR1_DQ_53/DDR1_DQ_53 DDR1_DQSN_0/DDR0_DQSN_2 M_B_DQSN1
P2 BR5 R7 BL9
M_A_DQ54 R1 DDR0_DQ_53/DDR1_DQ_37 DDR0_DQSN_0/DDR0_DQSN_0 BL3 M_A_DQSN1 M_B_DQ55 P8 DDR1_DQ_54/DDR1_DQ_54 DDR1_DQSN_1/DDR0_DQSN_3 BG9 M_B_DQSN2
M_A_DQ55 P1 DDR0_DQ_54/DDR1_DQ_38 DDR0_DQSN_1/DDR0_DQSN_1 BG3 M_A_DQSN2 M_B_DQ56 L11 DDR1_DQ_55/DDR1_DQ_55 DDR1_DQSN_2/DDR0_DQSN_6 BC9 M_B_DQSN3
M_A_DQ56 M4 DDR0_DQ_55/DDR1_DQ_39 DDR0_DQSN_2/DDR0_DQSN_4 BD3 M_A_DQSN3 M_B_DQ57 M11 DDR1_DQ_56/DDR1_DQ_56 DDR1_DQSN_3/DDR0_DQSN_7 AC9 M_B_DQSN4
M_A_DQ57 M1 DDR0_DQ_56/DDR1_DQ_40 DDR0_DQSN_3/DDR0_DQSN_5 AA3 M_A_DQSN4 M_B_DQ58 L7 DDR1_DQ_57/DDR1_DQ_57 DDR1_DQSN_4/DDR1_DQSN_2 W9 M_B_DQSN5
M_A_DQ58 L4 DDR0_DQ_57/DDR1_DQ_41 DDR0_DQSN_4/DDR1_DQSN_0 U3 M_A_DQSN5 M_B_DQ59 M8 DDR1_DQ_58/DDR1_DQ_58 DDR1_DQSN_5/DDR1_DQSN_3 R9 M_B_DQSN6
M_A_DQ59 L2 DDR0_DQ_58/DDR1_DQ_42 DDR0_DQSN_5/DDR1_DQSN_1 P3 M_A_DQSN6 M_B_DQ60 L10 DDR1_DQ_59/DDR1_DQ_59 DDR1_DQSN_6/DDR1_DQSN_6 M9 M_B_DQSN7
M_A_DQ60 M5 DDR0_DQ_59/DDR1_DQ_43 DDR0_DQSN_6/DDR1_DQSN_4 L3 M_A_DQSN7 M_B_DQ61 M10 DDR1_DQ_60/DDR1_DQ_60 DDR1_DQSN_7/DDR1_DQSN_7
B M_A_DQ61 M2 DDR0_DQ_60/DDR1_DQ_44 DDR0_DQSN_7/DDR1_DQSN_5 M_B_DQ62 M7 DDR1_DQ_61/DDR1_DQ_61 BP9 M_B_DQSP0 M_B_DQSP[7:0] [18] B
M_A_DQ62 DDR0_DQ_61/DDR1_DQ_45 M_A_DQSP0 M_A_DQSP[7:0] [17] M_B_DQ63 DDR1_DQ_62/DDR1_DQ_62 DDR1_DQSP_0/DDR0_DQSP_2 M_B_DQSP1
L5 BP5 L8 BJ9
M_A_DQ63 L1 DDR0_DQ_62/DDR1_DQ_46 DDR0_DQSP_0/DDR0_DQSP_0 BK3 M_A_DQSP1 DDR1_DQ_63/DDR1_DQ_63 DDR1_DQSP_1/DDR0_DQSP_3 BF9 M_B_DQSP2
DDR0_DQ_63/DDR1_DQ_47 DDR0_DQSP_1/DDR0_DQSP_1 BF3 M_A_DQSP2 AW 11 DDR1_DQSP_2/DDR0_DQSP_6 BB9 M_B_DQSP3
BA2 DDR0_DQSP_2/DDR0_DQSP_4 BC3 M_A_DQSP3 AY11 NC/DDR1_ECC_0 DDR1_DQSP_3/DDR0_DQSP_7 AA9 M_B_DQSP4
BA1 NC/DDR0_ECC_0 DDR0_DQSP_3/DDR0_DQSP_5 AB3 M_A_DQSP4 AY8 NC/DDR1_ECC_1 DDR1_DQSP_4/DDR1_DQSP_2 V9 M_B_DQSP5
AY4 NC/DDR0_ECC_1 DDR0_DQSP_4/DDR1_DQSP_0 V3 M_A_DQSP5 AW 8 NC/DDR1_ECC_2 DDR1_DQSP_5/DDR1_DQSP_3 P9 M_B_DQSP6
AY5 NC/DDR0_ECC_2 DDR0_DQSP_5/DDR1_DQSP_1 R3 M_A_DQSP6 AY10 NC/DDR1_ECC_3 DDR1_DQSP_6/DDR1_DQSP_6 L9 M_B_DQSP7
BA5 NC/DDR0_ECC_3 DDR0_DQSP_6/DDR1_DQSP_4 M3 M_A_DQSP7 AW 10 NC/DDR1_ECC_4 DDR1_DQSP_7/DDR1_DQSP_7
BA4 NC/DDR0_ECC_4 DDR0_DQSP_7/DDR1_DQSP_5 AY7 NC/DDR1_ECC_5 AW 9
AY1 NC/DDR0_ECC_5 AY3 AW 7 NC/DDR1_ECC_6 DDR1_DQSP_8/DDR1_DQSP_8 AY9
AY2 NC/DDR0_ECC_6 DDR0_DQSP_8/DDR0_DQSP_8 BA3 NC/DDR1_ECC_7 DDR1_DQSN_8/DDR1_DQSN_8
1 OF 13
NC/DDR0_ECC_7 DDR0_DQSN_8/DDR0_DQSN_8
DDR CHANNEL A *CPU_CFL-H_1440P

Notice : BIOS need change setting to IL R1616 121_1%_2 SM_RCOMP_0 G1

SM_RCOMP_1 H1 DDR_RCOMP_0 DDR_VREF_CA
BN13 SM_VREF
SM_VREF [17]
R1615 75_1%_2 BP13
SM_RCOMP_2 J2 DDR_RCOMP_1 DDR0_VREF_DQ BR13 SMDDR_VREF_DQ1_M3 TP1034
R1614 100_1%_2 2 OF 13 * SMDDR_VREF_DQ1_M3 [18]
DDR_RCOMP_2 DDR1_VREF_DQ
DDR CHANNEL B *CPU_CFL-H_1440P

Layout Note: Please Close to CPU

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
CFL 3/7 (DDR4 I/F)
NB5 Date: Wednesday, April 08, 2020 Sheet 4 of 106
5 4 3 2 1
 5 4 3 2 1

SKYLAKE Processor (POWER)

From CFL-H Power Map
+VCCGT Iccmax = 32A Need Check BIOS
+VCCGT
+1.2VSUS
[88,91]
5
[2,6,10,17,18,51,87,93,95]
+VCCGT +VCCGT
+VCCGT IccPL2 = 25A UX1K
AT14 BD35
AT31 VCCGT1 VCCGT80 BD36
D AT32 VCCGT2 VCCGT81 BE31 D
AT33 VCCGT3 VCCGT82 BE32
AT34 VCCGT4 VCCGT83 BE33
C1102 C1937 C10740 C1127 C1128 C1113 C1948 AT35 VCCGT5 VCCGT84 BE34
22u/6.3V_6 22U/6.3V_6 22U/6.3V_6 22u/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 AT36 VCCGT6 VCCGT85 BE35
AT37 VCCGT7 VCCGT86 BE36
AT38 VCCGT8 VCCGT87 BE37
AU14 VCCGT9 VCCGT88 BE38
AU29 VCCGT10 VCCGT89 BF13
AU30 VCCGT11 VCCGT90 BF14
AU31 VCCGT12 VCCGT91 BF29
AU32 VCCGT13 VCCGT92 BF30
C1936 C1377 C1217 C1949 C1357 AU35 VCCGT14 VCCGT93 BF31
10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 AU36 VCCGT15 VCCGT94 BF32
AU37 VCCGT16 VCCGT95 BF35
AU38 VCCGT17 VCCGT96 BF36
AV29 VCCGT18 VCCGT97 BF37
AV30 VCCGT19 VCCGT98 BF38
AV31 VCCGT20 VCCGT99 BG29
AV32 VCCGT21 VCCGT100 BG30
C1125 C1935 C1950 C1130 C1946 AV33 VCCGT22 VCCGT101 BG31
10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 AV34 VCCGT23 VCCGT102 BG32
AV35 VCCGT24 VCCGT103 BG33
AV36 VCCGT25 VCCGT104 BG34
AW 14 VCCGT26 VCCGT105 BG35
AW 31 VCCGT27 VCCGT106 BG36
AW 32 VCCGT28 VCCGT107 BH33
AW 33 VCCGT29 VCCGT108 BH34
AW 34 VCCGT30 VCCGT109 BH35
C1934 C1358 C1338 C1339 C1340 C1378 AW 35 VCCGT31 VCCGT110 BH36
C 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 AW 36 VCCGT32 VCCGT111 BH37 C
AW 37 VCCGT33 VCCGT112 BH38
AW 38 VCCGT34 VCCGT113 BJ16
AY29 VCCGT35 VCCGT114 BJ17
AY30 VCCGT36 VCCGT115 BJ19
AY31 VCCGT37 VCCGT116 BJ20
AY32 VCCGT38 VCCGT117 BJ21
C1116 C1947 C1117 C10739 C1925 C1944 AY35 VCCGT39 VCCGT118 BJ23
1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 AY36 VCCGT40 VCCGT119 BJ24
AY37 VCCGT41 VCCGT120 BJ26
AY38 VCCGT42 VCCGT121 BJ27
BA13 VCCGT43 VCCGT122 BJ37
BA14 VCCGT44 VCCGT123 BJ38
BA29 VCCGT45 VCCGT124 BK16
BA30 VCCGT46 VCCGT125 BK17
BA31 VCCGT47 VCCGT126 BK19
BA32 VCCGT48 VCCGT127 BK20
C10036 C1112 C1922 BA33 VCCGT49 VCCGT128 BK21
47U/6.3VS_8 47U/6.3VS_8 47U/6.3VS_8 BA34 VCCGT50 VCCGT129 BK23
BA35 VCCGT51 VCCGT130 BK24
BA36 VCCGT52 VCCGT131 BK26
BB13 VCCGT53 VCCGT132 BK27
BB14 VCCGT54 VCCGT133 BL15
BB31 VCCGT55 VCCGT134 BL16
BB32 VCCGT56 VCCGT135 BL17
BB33 VCCGT57 VCCGT136 BL23
BB34 VCCGT58 VCCGT137 BL24
BB35 VCCGT59 VCCGT138 BL25
BB36 VCCGT60 VCCGT139 BL26
BB37 VCCGT61 VCCGT140 BL27
B BB38 VCCGT62 VCCGT141 BL28 B
BC29 VCCGT63 VCCGT142 BL36
BC30 VCCGT64 VCCGT143 BL37
BC31 VCCGT65 VCCGT144 BM15
BC32 VCCGT66 VCCGT145 BM16
BC35 VCCGT67 VCCGT146 BM17
BC36 VCCGT68 VCCGT147 BM36
BC37 VCCGT69 VCCGT148 BM37
BC38 VCCGT70 VCCGT149 BN15
BD13 VCCGT71 VCCGT150 BN16
BD14 VCCGT72 VCCGT151 BN17
BD29 VCCGT73 VCCGT152 BN36
BD30 VCCGT74 VCCGT153 BN37
BD31 VCCGT75 VCCGT154 BN38
BD32 VCCGT76 VCCGT155 BP15
BD33 VCCGT77 VCCGT156 BP16
BD34 VCCGT78 VCCGT157 BP17
BP37 VCCGT79 VCCGT158 BR37
BP38 VCCGT159 VCCGT164 BT15
BR15 VCCGT160 VCCGT165 BT16
BR16 VCCGT161 VCCGT166 BT17
BR17 VCCGT162 VCCGT167 BT37
VCCGT163 VCCGT168

AH37
VSSGT_SENSE VSSGT_SENSE [88]
AH38
11 OF 13 VCCGT_SENSE VCCGT_SENSE [88]
*CPU_CFL-H_1440P

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
CFL 4/7 (POWER)
NB5 Date: Wednesday, April 08, 2020 Sheet 5 of 106
5 4 3 2 1
 5 4 3 2 1

+VCCSA [88,91]

+VCCIO

+1.2VSUS
[3,52,93]

[2,10,17,18,51,87,93,95] Follow CFL-H Power Map 45W(GT2): VCCSA=11.1A

+VCCSA +1.2VSUS
Follow CFL-H Power Map 45W: VDDQ=11.5A 6
UX1L

J30
11.1 A 11.5A AA6
K29 VCCSA1 VDDQ1 AE12
D C10037 C10039 C10038 C1943 C1910 K30 VCCSA2 VDDQ2 AF5 C1493 C1507 C1497 C1506 D
47U/6.3VS_8 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 K31 VCCSA3 VDDQ3 AF6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6
K32 VCCSA4 VDDQ4 AG5
K33 VCCSA5 VDDQ5 AG9
K34 VCCSA6 VDDQ6 AJ12
K35 VCCSA7 VDDQ7 AL11
L31 VCCSA8 VDDQ8 AP6
L32 VCCSA9 VDDQ9 AP7
L35 VCCSA10 VDDQ10 AR12 C1511 C1495 C1492 C1505 C1481 C10040
C1932 C1915 C1099 C1086 C1109 C1124 C1923 L36 VCCSA11 VDDQ11 AR6 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4
10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 L37 VCCSA12 VDDQ12 AT12
L38 VCCSA13 VDDQ13 AW6
M29 VCCSA14 VDDQ14 AY6
M30 VCCSA15 VDDQ15 J5
M31 VCCSA16 VDDQ16 J6
C1227 M32 VCCSA17 VDDQ17 K12 C1516 C1508 C1483 C1489 C1494
1u/10V_2 M33 VCCSA18 VDDQ18 K6 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4
M34 VCCSA19 VDDQ19 L12
M35 VCCSA20 VDDQ20 L6
M36 VCCSA21 VDDQ21 R6
+VCCIO VCCSA22 VDDQ22 T6
Follow CFL-H Power Map45W: VCCIO = 6.4A VDDQ23 W6
VDDQ24 Y12
AG12
6.4A VDDQ25
G15 VCCIO1
C10041 C1329 C1342 G17 VCCIO2
10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 G19 VCCIO3 BH13
VCCIO4 VCCPLL_OC1 +VCCPLL_OC
G21 0.15A VCCPLL_OC2 BJ13
H15 VCCIO5 G11 +VCCSTPLL
H16 VCCIO6 VCCPLL_OC3
C H17 VCCIO7 H30 C
H19 VCCIO8 0.06A VCCST
H20 VCCIO9 H29 C1251
VCCIO10 VCCSTG2 +VCCSTG
H21 0.02A 1u/10V_2
C1326 C1273 C1259 H26 VCCIO11 G30
10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 H27 VCCIO12 VCCSTG1
J15 VCCIO13 H28 +VCCIO
VCCIO14 VCCPLL1 +VCCPLL
J16 0.15 A J28
J17 VCCIO15 VCCPLL2
J19 VCCIO16 R1121
J20 VCCIO17 M38
VCCIO18 VCCSA_SENSE VCCSA_SENSE [88] *100_5%_4
J21 M37
VCCIO19 VSSSA_SENSE VSSSA_SENSE [88]
J26
J27 VCCIO20 H14 VCCIO_VCCSENSE
VCCIO21 VCCIO_SENSE VCCIO_VSSSENSE VCCIO_VCCSENSE [93]
J14
12 OF 13 VSSIO_SENSE VCCIO_VSSSENSE [93]

*CPU_CFL-H_1440P R1123
*100_5%_4
For C10
9/14 Sense connect to PWR IC and no stuff PH/PD Res.

Close CPU
Under CPU +VCCIO +VCCPLL
B B
+VCCSTG +VCCPLL_OC SI : 0830 Add C1011
For C10
9/14 Del R1202,R1089

C1279 C1203 C10011

C1197 C1401 1u/10V_2 1u/10V_2 47U/6.3VS_8
C1399
1u/10V_2 1u/10V_2 1u/10V_2

+VCCPLL_OC +1.2V_VCCPLL_OC

R1208 *0_6/S

7/12 change to main on power rail.

+1.05V
+VCCSTPLL

R1093 *0_4/S

A A

+VCCPLL
R1098 *0_4/S

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
CFL 5/7 (POWER&GND )
NB5 Date: Wednesday, April 08, 2020 Sheet 6 of 106
5 4 3 2 1
 5 4 3 2 1

+VCC_CORE [88,89,90]

7
+VCC_CORE
+VCC_CORE +VCC_CORE +VCC_CORE
D D
Follow CFL-H Power Map 6 + 2 45W 80A UX1I
AA13 AH13 UX1J
AA31 VCC#AA13 VCC#AH13 AH14
AA32 VCC#AA31 VCC#AH14 AH29 K14 W35
C1093 C1105 C1134 C1916 C1131 C1919 AA33 VCC#AA32 VCC#AH29 AH30 C1404 C1402 C1320 C1221 C1245 C1140 C10694 C10683 C10688 C10693 C10695 C10696 L13 VCC#K14 VCC#W35 W36
22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 AA34 VCC#AA33 VCC#AH30 AH31 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 L14 VCC#L13 VCC#W36 W37
AA35 VCC#AA34 VCC#AH31 AH32 N13 VCC#L14 VCC#W37 W38
AA36 VCC#AA35 VCC#AH32 AJ14 N14 VCC#N13 VCC#W38 Y29
AA37 VCC#AA36 VCC#AJ14 AJ29 N30 VCC#N14 VCC#Y29 Y30
AA38 VCC#AA37 VCC#AJ29 AJ30 N31 VCC#N30 VCC#Y30 Y31
AB29 VCC#AA38 VCC#AJ30 AJ31 N32 VCC#N31 VCC#Y31 Y32
AB30 VCC#AB29 VCC#AJ31 AJ32 N35 VCC#N32 VCC#Y32 Y33
C1133 C1918 C1348 C1952 C1933 C1095 AB31 VCC#AB30 VCC#AJ32 AJ33 C1272 C1288 C1321 C10015 C1354 C1290 C10686 C10698 C10684 C10699 C10682 C10691 N36 VCC#N35 VCC#Y33 Y34
22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 AB32 VCC#AB31 VCC#AJ33 AJ34 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 N37 VCC#N36 VCC#Y34 Y35
AB35 VCC#AB32 VCC#AJ34 AJ35 N38 VCC#N37 VCC#Y35 Y36
AB36 VCC#AB35 VCC#AJ35 AJ36 P13 VCC#N38 VCC#Y36
AB37 VCC#AB36 VCC#AJ36 AK31 P14 VCC#P13
AB38 VCC#AB37 VCC#AK31 AK32 P29 VCC#P14
AC13 VCC#AB38 VCC#AK32 AK33 P30 VCC#P29
AC14 VCC#AC13 VCC#AK33 AK34 P31 VCC#P30
C1940 C1917 C1911 C1220 C1092 C1222 AC29 VCC#AC14 VCC#AK34 AK35 P32 VCC#P31
10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 AC30 VCC#AC29 VCC#AK35 AK36 C1218 C1405 C1380 C1334 C10534 C1292 C10685 C10690 C10692 C10687 C10697 C10689 P33 VCC#P32
AC31 VCC#AC30 VCC#AK36 AK37 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 P34 VCC#P33
AC32 VCC#AC31 VCC#AK37 AK38 P35 VCC#P34
AC33 VCC#AC32 VCC#AK38 AL13 P36 VCC#P35
AC34 VCC#AC33 VCC#AL13 AL29 R13 VCC#P36
AC35 VCC#AC34 VCC#AL29 AL30 R31 VCC#R13
AC36 VCC#AC35 VCC#AL30 AL31 R32 VCC#R31
C1914 C1942 C1931 C1921 C1242 C1403 AD13 VCC#AC36 VCC#AL31 AL32 R33 VCC#R32
C 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 AD14 VCC#AD13 VCC#AL32 AL35 R34 VCC#R33 C
AD31 VCC#AD14 VCC#AL35 AL36 C10532 C10537 C10024 C10536 C10533 C10538 C10676 C10679 C10681 C10678 C10677 C10680 R35 VCC#R34
AD32 VCC#AD31 VCC#AL36 AL37 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 R36 VCC#R35
AD33 VCC#AD32 VCC#AL37 AL38 R37 VCC#R36
AD34 VCC#AD33 VCC#AL38 AM13 R38 VCC#R37
AD35 VCC#AD34 VCC#AM13 AM14 T29 VCC#R38
AD36 VCC#AD35 VCC#AM14 AM29 T30 VCC#T29
C1941 C1132 C1118 C1938 C1126 C1364 AD37 VCC#AD36 VCC#AM29 AM30 T31 VCC#T30
10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 AD38 VCC#AD37 VCC#AM30 AM31 T32 VCC#T31
AE13 VCC#AD38 VCC#AM31 AM32 T35 VCC#T32
AE14 VCC#AE13 VCC#AM32 AM33 T36 VCC#T35
AE30 VCC#AE14 VCC#AM33 AM34 T37 VCC#T36
AE31 VCC#AE30 VCC#AM34 AM35 T38 VCC#T37
VCC#AE31 VCC#AM35 C10700 VCC#T38
AE32 AM36 U29
AE35 VCC#AE32 VCC#AM36 AN13 U30 VCC#U29

+
C1138 C1081 C1939 AE36 VCC#AE35 VCC#AN13 AN14 U31 VCC#U30
10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 AE37 VCC#AE36 VCC#AN14 AN31 *330u/2.5V_3528H1.9 U32 VCC#U31
AE38 VCC#AE37 VCC#AN31 AN32 U33 VCC#U32
AF29 VCC#AE38 VCC#AN32 AN33 U34 VCC#U33
AF30 VCC#AF29 VCC#AN33 AN34 U35 VCC#U34
AF31 VCC#AF30 VCC#AN34 AN35 U36 VCC#U35
AF32 VCC#AF31 VCC#AN35 AN36 V13 VCC#U36
AF33 VCC#AF32 VCC#AN36 AN37 V14 VCC#V13
AF34 VCC#AF33 VCC#AN37 AN38 V31 VCC#V14
AF35 VCC#AF34 VCC#AN38 AP13 V32 VCC#V31
AF36 VCC#AF35 VCC#AP13 AP30 V33 VCC#V32
C10014 C10013 C10654 C1397 C1362 AF37 VCC#AF36 VCC#AP30 AP31 V34 VCC#V33
47u/6.3VS_6 47u/6.3VS_6 47u/6.3VS_6 47u/6.3VS_6 47u/6.3VS_6 AF38 VCC#AF37 VCC#AP31 AP32 V35 VCC#V34
AG14 VCC#AF38 VCC#AP32 AP35 V36 VCC#V35
AG31 VCC#AG14
VCC#AG31
VCC#AP35
VCC#AP36
AP36 +VCC_CORE Sense resistor should be placed within 2 V37 VCC#V36
VCC#V37
B AG32
AG33 VCC#AG32 VCC#AP37
AP37
AP38 inches (50.8 mm) of the processor socket V38
W13 VCC#V38
B

AG34 VCC#AG33 VCC#AP38 K13 W14 VCC#W13

AG35 VCC#AG34 VCC#K13 R1559 Trace Impendence 50 ohm W29 VCC#W14
AG36 VCC#AG35 W30 VCC#W29
VCC#AG36 100_5%_2 VCC#W30 10 OF 13
W31
C10663 C10662 C10660 C10658 C10661 C10659 W32 VCC#W31
10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 VCC#W32
AG37 VCC_SENSE *CPU_CFL-H_1440P
9 OF 13 VCC_SENSE VSS_SENSE VCC_SENSE [88]
AG38
VSS_SENSE VSS_SENSE [88]
C10669 C10667 C10665 C10664 C10668 C10666 *CPU_CFL-H_1440P
10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 R1560
100_5%_2

C10675 C10674 C10672 C10670 C10673 C10671

10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4

VCC_SENSE R1562 *49.9_1%_2 VSS_SENSE

C10656 C10657 C10655
47u/6.3VS_6 47u/6.3VS_6 47u/6.3VS_6

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
CFL 6/7 (POWER&GND )
NB5 Date: Wednesday, April 08, 2020 Sheet 7 of 106
5 4 3 2 1
 5 4 3 2 1

A10
A12
UX1F
VSS_1 VSS_82
AK4
AL10
AW 5
AY12
UX1G
VSS_163 VSS_244
BJ15
BJ18
BN4
BN7
UX1H
VSS_325 VSS_409
F15
F17
8
A16 VSS_2 VSS_83 AL12 AY33 VSS_164 VSS_245 BJ22 BP12 VSS_326 VSS_410 F19
A18 VSS_3 VSS_84 AL14 AY34 VSS_165 VSS_246 BJ25 BP14 VSS_327 VSS_411 F2
A20 VSS_4 VSS_85 AL33 B9 VSS_166 VSS_247 BJ29 BP18 VSS_328 VSS_412 F21
A22 VSS_5 VSS_86 AL34 BA10 VSS_167 VSS_248 BJ30 BP21 VSS_329 VSS_413 F23 UX1M
D A24 VSS_6 VSS_87 AL4 BA11 VSS_168 VSS_249 BJ31 BP24 VSS_330 VSS_414 F25 D
A26 VSS_7 VSS_88 AL7 BA12 VSS_169 VSS_250 BJ32 BP25 VSS_331 VSS_415 F27
A28 VSS_8 VSS_89 AL8 BA37 VSS_170 VSS_251 BJ33 BP26 VSS_332 VSS_416 F29 TP1102 E2
A30 VSS_9 VSS_90 AL9 BA38 VSS_171 VSS_252 BJ34 BP29 VSS_333 VSS_417 F3 E3 RSVD_TP5
A6 VSS_10 VSS_91 AM1 BA6 VSS_172 VSS_253 BJ35 BP33 VSS_334 VSS_418 F31 E1 IST_TRIG
A9 VSS_11 VSS_92 AM12 BA7 VSS_173 VSS_254 BJ36 BP34 VSS_335 VSS_419 F36 D1 RSVD_TP4
AA12 VSS_12 VSS_93 AM2 BA8 VSS_174 VSS_255 BK13 BP7 VSS_336 VSS_420 F4 * RSVD_TP3
AA29 VSS_13 VSS_94 AM3 BA9 VSS_175 VSS_256 BK14 BR12 VSS_337 VSS_421 F5 BR1 BK28
AA30 VSS_14 VSS_95 AM37 BB1 VSS_176 VSS_257 BK15 BR14 VSS_338 VSS_422 F8 BT2 RSVD_TP1 RSVD11 BJ28
AB33 VSS_15 VSS_96 AM38 BB12 VSS_177 VSS_258 BK18 BR18 VSS_339 VSS_423 F9 RSVD_TP2 RSVD10
AB34 VSS_16 VSS_97 AM4 BB2 VSS_178 VSS_259 BK22 BR21 VSS_340 VSS_424 G10 BN35
AB6 VSS_17 VSS_98 AM5 BB29 VSS_179 VSS_260 BK25 BR24 VSS_341 VSS_425 G12 RSVD15
AC1 VSS_18 VSS_99 AN12 BB3 VSS_180 VSS_261 BK29 BR25 VSS_342 VSS_426 G14 J24
AC12 VSS_19 VSS_100 AN29 BB30 VSS_181 VSS_262 BK6 BR26 VSS_343 VSS_427 G16 H24 RSVD28
AC2 VSS_20 VSS_101 AN30 BB4 VSS_182 VSS_263 BL13 BR29 VSS_344 VSS_428 G18 BN33 RSVD27
AC3 VSS_21 VSS_102 AN5 BB5 VSS_183 VSS_264 BL14 BR34 VSS_345 VSS_429 G20 BL34 RSVD14
AC37 VSS_22 VSS_103 AN6 BB6 VSS_184 VSS_265 BL18 BR36 VSS_346 VSS_430 G22 RSVD13
AC38 VSS_23 VSS_104 AP10 BC12 VSS_185 VSS_266 BL19 BR7 VSS_347 VSS_431 G23 N29
AC4 VSS_24 VSS_105 AP11 BC13 VSS_186 VSS_267 BL20 BT12 VSS_348 VSS_432 G24 R14 RSVD30
AC5 VSS_25 VSS_106 AP12 BC14 VSS_187 VSS_268 BL21 BT14 VSS_349 VSS_433 G26 AE29 RSVD31
AC6 VSS_26 VSS_107 AP33 BC33 VSS_188 VSS_269 BL22 BT18 VSS_350 VSS_434 G28 AA14 RSVD#AE29
AD10 VSS_27 VSS_108 AP34 BC34 VSS_189 VSS_270 BL29 BT21 VSS_351 VSS_435 G4 AP29 RSVD1
AD11 VSS_28 VSS_109 AP8 BC6 VSS_190 VSS_271 BL33 BT24 VSS_352 VSS_436 G5 AP14 RSVD5
AD12 VSS_29 VSS_110 AP9 BD10 VSS_191 VSS_272 BL35 BT26 VSS_353 VSS_437 G6 R1112 0_5%_2 A36 RSVD4
AD29 VSS_30 VSS_111 AR1 BD11 VSS_192 VSS_273 BL38 BT29 VSS_354 VSS_438 G8 VSS_A36
AD30 VSS_31 VSS_112 AR13 BD12 VSS_193 VSS_274 BL6 BT32 VSS_355 VSS_439 G9 R1113 0_5%_2 A37
AD6 VSS_32 VSS_113 AR14 BD37 VSS_194 VSS_275 BM11 BT5 VSS_356 VSS_440 H11 VSS_A37
AD8 VSS_33 VSS_114 AR2 BD6 VSS_195 VSS_276 BM12 C11 VSS_357 VSS_441 H12 PCH_2_CPU_TRIGGER H23
VSS_34 VSS_115 VSS_196 VSS_277 VSS_358 VSS_442 [15] PCH_2_CPU_TRIGGER PROC_TRIGIN
AD9 AR29 BD7 BM13 C13 H18
[15] CPU_2_PCH_TRIGGER R1109 30_1%_2 CPU_2_PCH_TRIGGER_R J23
AE33 VSS_35 VSS_116 AR3 BD8 VSS_197 VSS_278 BM14 C15 VSS_359 VSS_443 H22 PROC_TRIGOUT
C AE34 VSS_36 VSS_117 AR30 BD9 VSS_198 VSS_279 BM18 C17 VSS_360 VSS_444 H25 F30 C
AE6 VSS_37 VSS_118 AR31 BE1 VSS_199 VSS_280 BM2 C19 VSS_361 VSS_445 H32 RSVD24
AF1 VSS_38 VSS_119 AR32 BE2 VSS_200 VSS_281 BM21 C21 VSS_362 VSS_446 H35
AF12 VSS_39 VSS_120 AR33 BE29 VSS_201 VSS_282 BM22 C23 VSS_363 VSS_447 J10 E30
AF13 VSS_40 VSS_121 AR34 BE3 VSS_202 VSS_283 BM23 C25 VSS_364 VSS_448 J18 RSVD23
AF14 VSS_41 VSS_122 AR35 BE30 VSS_203 VSS_284 BM24 C27 VSS_365 VSS_449 J22
AF2 VSS_42 VSS_123 AR36 BE4 VSS_204 VSS_285 BM25 C29 VSS_366 VSS_450 J25 B30 BL31
AF3 VSS_43 VSS_124 AR37 BE5 VSS_205 VSS_286 BM26 C31 VSS_367 VSS_451 J32 C30 RSVD7 RSVD12 AJ8
AF4 VSS_44 VSS_125 AR38 BE6 VSS_206 VSS_287 BM27 C37 VSS_368 VSS_452 J33 RSVD21 RSVD3 G13
AG10 VSS_45 VSS_126 AR4 BF12 VSS_207 VSS_288 BM28 C5 VSS_369 VSS_453 J36 RSVD25
AG11 VSS_46 VSS_127 AR5 BF33 VSS_208 VSS_289 BM29 C8 VSS_370 VSS_454 J4 G3
AG13 VSS_47 VSS_128 AT29 BF34 VSS_209 VSS_290 BM3 C9 VSS_371 VSS_455 J7 J3 RSVD26 C38
AG29 VSS_48 VSS_129 AT30 BF6 VSS_210 VSS_291 BM33 D10 VSS_372 VSS_456 K1 RSVD29 RSVD22 C1
AG30 VSS_49 VSS_130 AT6 BG12 VSS_211 VSS_292 BM35 D12 VSS_373 VSS_457 K10 RSVD20 BR2
AG6 VSS_50 VSS_131 AU10 BG13 VSS_212 VSS_293 BM38 D14 VSS_374 VSS_458 K11 BR35 RSVD17 BP1
AG7 VSS_51 VSS_132 AU11 BG14 VSS_213 VSS_294 BM5 D16 VSS_375 VSS_459 K2 BR31 RSVD19 RSVD16 B38
AG8 VSS_52 VSS_133 AU12 BG37 VSS_214 VSS_295 BM6 D18 VSS_376 VSS_460 K3 BH30 RSVD18 RSVD8 B2
AH12 VSS_53 VSS_134 AU33 BG38 VSS_215 VSS_296 BM7 D20 VSS_377 VSS_461 K38 RSVD9 RSVD6
AH33 VSS_54 VSS_135 AU34 BG6 VSS_216 VSS_297 BM8 D22 VSS_378 VSS_462 K4 13 OF 13
AH34 VSS_55 VSS_136 AU6 BH1 VSS_217 VSS_298 BM9 D24 VSS_379 VSS_463 K5
AH35 VSS_56 VSS_137 AU7 BH10 VSS_218 VSS_299 BN12 D26 VSS_380 VSS_464 K7 *CPU_CFL-H_1440P
AH36 VSS_57 VSS_138 AU8 BH11 VSS_219 VSS_300 BN14 D28 VSS_381 VSS_465 K8
AH6 VSS_58 VSS_139 AU9 BH12 VSS_220 VSS_301 BN18 D3 VSS_382 VSS_466 K9
AJ1 VSS_59 VSS_140 AV37 BH14 VSS_221 VSS_302 BN19 D30 VSS_383 VSS_467 L29
AJ13 VSS_60 VSS_141 AV38 BH2 VSS_222 VSS_303 BN2 D33 VSS_384 VSS_468 L30
AJ2 VSS_61 VSS_142 AW 1 BH3 VSS_223 VSS_304 BN20 D6 VSS_385 VSS_469 L33
AJ3 VSS_62 VSS_143 AW 12 BH4 VSS_224 VSS_305 BN21 D9 VSS_386 VSS_470 L34
AJ37 VSS_63 VSS_144 AW 2 BH5 VSS_225 VSS_306 BN24 E34 VSS_387 VSS_471 M12
AJ38 VSS_64 VSS_145 AW 29 BH6 VSS_226 VSS_307 BN29 E35 VSS_388 VSS_472 M13
AJ4 VSS_65 VSS_146 AW 3 BH7 VSS_227 VSS_308 BN30 E38 VSS_389 VSS_473 N10
B AJ5 VSS_66 VSS_147 AW 30 BH8 VSS_228 VSS_309 BN31 E4 VSS_390 VSS_474 N11 B
AJ6 VSS_67 VSS_148 AW 4 BH9 VSS_229 VSS_310 BN34 E9 VSS_391 VSS_475 N12
W4 VSS_68 VSS_149 U6 T2 VSS_230 VSS_311 P38 N3 VSS_392 VSS_476 N2
W5 VSS_69 VSS_150 V12 T3 VSS_231 VSS_312 P6 N33 VSS_393 VSS_477 BT8
Y10 VSS_70 VSS_151 V29 T33 VSS_232 VSS_313 R12 N34 VSS_394 VSS_478 BR9
Y11 VSS_71 VSS_152 V30 T34 VSS_233 VSS_314 R29 N4 VSS_395 VSS_479
Y13 VSS_72 VSS_153 A14 T4 VSS_234 VSS_315 AY14 N5 VSS_396 A3
Y14 VSS_73 VSS_154 AD7 T5 VSS_235 VSS_316 BD38 N6 VSS_397 VSS_A3 A34
Y37 VSS_74 VSS_155 V6 T7 VSS_236 VSS_317 R30 N7 VSS_398 VSS_A34 A4
Y38 VSS_75 VSS_156 W1 T8 VSS_237 VSS_318 T1 N8 VSS_399 VSS_A4 B3
Y7 VSS_76 VSS_157 W 12 T9 VSS_238 VSS_319 T10 N9 VSS_400 VSS_B3 B37
Y8 VSS_77 VSS_158 W2 U37 VSS_239 VSS_320 T11 P12 VSS_401 VSS_B37 BR38
Y9 VSS_78 VSS_159 W3 U38 VSS_240 VSS_321 T12 P37 VSS_402 VSS_BR38 BT3
AK29 VSS_79 VSS_160 W 33 BJ12 VSS_241 VSS_322 T13 M14 VSS_403 VSS_BT3 BT35
AK30 VSS_80 VSS_161 W 34 BJ14 VSS_242 VSS_323 T14 M6 VSS_404 VSS_BT35 BT36
VSS_81 VSS_162 VSS_243 VSS_324 N1 VSS_405 VSS_BT36 BT4
*CPU_CFL-H_1440P F11 VSS_406 VSS_BT4 C2
6 OF 13 7 OF 13
*CPU_CFL-H_1440P F13 VSS_407 VSS_C2 D38
VSS_408 VSS_D38
*CPU_CFL-H_1440P
8 OF 13

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
CFL 7/7 (GND)
NB5 Date: Wednesday, April 08, 2020 Sheet 8 of 106
5 4 3 2 1
 5 4 3 2 1

[3]
[3]
[3]
[3]
DMI_TXN0
DMI_TXP0
DMI_RXN0
DMI_RXP0
K34
J35
C33
B33
US1B
DMI0_RXN
DMI0_RXP
DMI0_TXN
USB2N_1
USB2P_1
USB2N_2
J3
J2
N13
N15
USBP1-
USBP1+
USBP2-
[34]
[34]
[34]
USB2 MB
USB2 DB-1
9
DMI0_TXP USB2P_2 USBP2+ [34] +3V
[3] DMI_TXN1 G33 K4
DMI1_RXN USB2N_3 USBP3- [34]
[3] DMI_TXP1 F34 K3 USB2 DB-2
DMI1_RXP USB2P_3 USBP3+ [34]
[3] DMI_RXN1 C32 M10
DMI1_TXN USB2N_4 USBP4- [46,47]
B32 L9
[3] DMI_RXP1 DMI1_TXP USB2P_4 USBP4+ [46,47] USB2.0 For Type C DGPU_PWR_EN
[3] DMI_TXN2 K32 M1 RS2 10K_5%_2
DMI2_RXN USB2N_5 USBP5- [28] DGPU_PWROK_Q
[3] DMI_TXP2 J32 L2 IR CAMERA RS3 10K_5%_2
DMI2_RXP USB2P_5 USBP5+ [28]
D USB 2.0 PORT [3] DMI_RXN2 C31 K7 D
DMI2_TXN USB2N_6 USBP6- [28]
[3] DMI_RXP2 B31 K6 CAMERA
DMI2_TXP USB2P_6 USBP6+ [28] GC6FBEN_Q
PORT1 USB2 MB [3] DMI_TXN3 G30 L4 RS6 10K_5%_2
DMI3_RXN USB2N_7 USBP7- [35]
[3] DMI_TXP3 F30 L3 WLAN
DMI3_RXP USB2P_7 USBP7+ [35] +3V_DEEP_SUS
PORT2 USB2 DB-1 [3] DMI_RXN3 C29 G4
DMI3_TXN USB2N_8 USBP8- [48]
[3] DMI_RXP3 B29 G5 KB MCU
DMI3_TXP USB2P_8 USBP8+ [48]
PORT3 USB2 DB-2 A25 M6
B25 DMI7_TXP USB2N_9 N8 USB_OC4# RS7 10K_5%_2
P24 DMI7_TXN USB2P_9 H3 USB_OC5# RS8 10K_5%_2
PORT4 USB2.0 For Type C R24 DMI7_RXP USB2N_10 H2 USB_OC6# RS9 10K_5%_2
C26 DMI7_RXN USB2P_10 R10 PCH_AOCS# RS10 10K_5%_2
PORT5 NC B26 DMI6_TXP USB2N_11 P9
F26 DMI6_TXN USB2P_11 G1
PORT6 CAMERA G26 DMI6_RXP USB2N_12 G2 GFX Present
B27 DMI6_RXN USB2P_12 N3
PORT7 WLAN C27 DMI5_TXP USB2N_13 N2
L26 DMI5_TXN USB2P_13 E5 DIS only Rb Ra +3V
PORT8 KB MCU M26 DMI5_RXP USB2N_14 F6
D29 DMI5_RXN USB2P_14 RS11 *100K_5%_2 GPU_EVENT# RS12 10K_5%_2
PORT9-14 NC E28 DMI4_TXP AH36 DGPU_HOLD_RST#
DMI4_TXN GPP_E9/USB2_OC0# DGPU_HOLD_RST# [19]
K29 AL40 GPU_EVENT#
M29 DMI4_RXP GPP_E10/USB2_OC1# AJ44 DGPU_PWR_EN
GPU_EVENT#
DGPU_PWR_EN
[21]
[22]
BOM:UMA only BOM:DIS and Optimus
DMI4_RXN GPP_E11/USB2_OC2# AL41 DGPU_PWROK_Q
GPP_E12/USB2_OC3# DGPU_PWROK_Q [21,42]
G17 AV47 USB_OC4#
F16 PCIE1_RXN/USB31_7_RXN GPP_F15/USB2_OC4# AR35 USB_OC5#
PCIE1_RXP/USB31_7_RXP GPP_F16/USB2_OC5# SG(Default) UMA
A17 AR37 USB_OC6#
B17 PCIE1_TXN/USB31_7_TXN GPP_F17/USB2_OC6# AV43 PCH_AOCS#
PCIE1_TXP/USB31_7_TXP GPP_F18/USB2_OC7# Stuff Ra Rb
R21
P21 PCIE2_RXN/USB31_8_RXN F4 USB2_COMP RS13 113_1%_2
PCIE2_RXP/USB31_8_RXP USB2_COMP NC Rb Ra
B18 F3 RS15 1K_5%_2
C18 PCIE2_TXN/USB31_8_TXN USB2_VBUSSENSE U13
K18 PCIE2_TXP/USB31_8_TXP RSVD1 G3 RS14 1K_5%_2
J18 PCIE3_RXN/USB31_9_RXN USB2_ID
B19 PCIE3_RXP/USB31_9_RXP BE41 GPD_7
C C
C19 PCIE3_TXN/USB31_9_TXN GPD7
N18 PCIE3_TXP/USB31_9_TXP G45
R18 PCIE4_RXN/USB31_10_RXN PCIE24_TXP G46
PCIE_SATA_TXP24
PCIE_SATA_TXN24
[36]
[36]
If OTG is not implemented on the platform,
PCIE4_RXP/USB31_10_RXP PCIE24_TXN
D20
C20 PCIE4_TXN/USB31_10_TXN PCIE24_RXP
Y41
Y40
PCIE_SATA_RXP24 [36] then USB2_ID and USB2_VBUSSENSE should both
PCIE_SATA_RXN24 [36]
F20 PCIE4_TXP/USB31_10_TXP
PCIE5_RXN
PCIE24_RXN
PCIE23_TXP
G48 PCIE_SATA_TXP23 [36] be connected to ground.
G20 G49 PCIE_SATA_TXN23 [36]
B21 PCIE5_RXP PCIE23_TXN W44
PCIE5_TXN PCIE23_RXP PCIE_SATA_RXP23 [36]
A22 W43 PCIE_SATA_RXN23 [36]
K21 PCIE5_TXP PCIE23_RXN H48 DGPU_HOLD_RST#
PCIE6_RXN PCIE22_TXP PCIE_SATA_TXP22 [36] [9,19] DGPU_HOLD_RST#
J21 H47
PCIE6_RXP PCIE22_TXN PCIE_SATA_TXN22 [36]
D21 U41
C21 PCIE6_TXN PCIE22_RXP U40
PCIE_SATA_RXP22 [36] SSD2 PCIE x4 LANE R1818
B23 PCIE6_TXP PCIE22_RXN F46
PCIE_SATA_RXN22
PCIE_SATA_TXP21
[36]
[36]
BOM:DIS Only 100K_5%_2
C23 PCIE7_TXP PCIE21_TXP G47
PCIE7_TXN PCIE21_TXN PCIE_SATA_TXN21 [36]
J24 R44
PCIE7_RXP PCIE21_RXP PCIE_SATA_RXP21 [36]
L24 T43
PCIE7_RXN PCIE21_RXN PCIE_SATA_RXN21 [36]
F24
G24 PCIE8_RXN
B24 PCIE8_RXP
C24 PCIE8_TXN
PCIE8_TXP 2 OF 13
USB 3.0 PORT PCH_CFL-H_874P
PORT1 USB3 MB AOU
GPD_7 Reserved
PORT2 USB3.0 DB1
External pull-up is required. Recommend 100K.
PORT3 USB3.0 DB2 This strap should sample HIGH. There should NOT be
any on-board device driving it to opposite direction
during strap sampling

US1F XTAL INPUT +3V_DEEP_SUS

B
F9
For eSPI B
[34] USB30_TX1- USB31_1_TXN HIGH -> DIFFERENTIAL
F7 BB39 ESPI_0_R RS525 10_5%_2
[34] USB30_TX1+ USB31_1_TXP GPP_A1/LAD0/ESPI_IO0 ESPI_1_R
ESPI_0 [42] LOW -> SINGLE ENDED
D11 AW37 RS515 10_5%_2
USB3.0 (M/B) [34] USB30_RX1-
C11 USB31_1_RXN GPP_A2/LAD1/ESPI_IO1 AV37 ESPI_2_R RS516 10_5%_2
ESPI_1
ESPI_2
[42]
[42] RS229
[34] USB30_RX1+ USB31_1_RXP GPP_A3/LAD2/ESPI_IO2 ESPI_3_R
BA38 RS517 10_5%_2 ESPI_3 [42] 100K_5%_2
C3 GPP_A4/LAD3/ESPI_IO3
[34] USB30_TX2- USB31_2_TXN ESPI_CS#_R
D4 BE38 RS518 *0_5%_2/S

、RS519 change to short pad

[34] USB30_TX2+ USB31_2_TXP GPP_A5/LFRAME#/ESPI_CS0# ESPI_CS# [42]
B9 AW35 ESPI_CS1# GPD_7
USB3.0 DB1 [34] USB30_RX2-
C9 USB31_2_RXN GPP_A6/SERIRQ/ESPI_CS1# BA36 ESPI_ALERT0# 12/05 RS518
[34] USB30_RX2+ USB31_2_RXP GPP_A7/PIRQA#/ESPI_ALERT0# EC_RCIN#
BE39
C17 GPP_A0/RCIN#/ESPI_ALERT1# BF38 ESPI_RESET#_R RS519 *0_5%_2/S RS212
USB31_6_TXN GPP_A14/SUS_STAT#/ESPI_RESET# ESPI_RESET# [42]
C16 *10K_5%_2
G14 USB31_6_TXP
F14 USB31_6_RXN BB36 ESPI_CLK_R RS520 33_4
USB31_6_RXP GPP_A9/CLKOUT_LPC0/ESPI_CLK ESPI_CLK [42]
BB34
C15 GPP_A10/CLKOUT_LPC1 ECS1
B15 USB31_5_TXN T48
USB31_5_TXP GPP_K19/SMI# EMI(near PCH)
J13 T47
K13 USB31_5_RXN GPP_K18/NMI# 18p/25V_2
USB31_5_RXP
G12 AH40
[34] USB30_TX3+ USB31_3_TXP GPP_E6/SATA_DEVSLP2
F11 AH35 DEVSLP0 DEVSLP0 [36]
[34] USB30_TX3- USB31_3_TXN GPP_E5/SATA_DEVSLP1 GC6FBEN_Q
C10 AL48
USB3.0 DB2 [34] USB30_RX3+
B10 USB31_3_RXP GPP_E4/SATA_DEVSLP0 AP47
GC6FBEN_Q [21]
[34] USB30_RX3- USB31_3_RXN GPP_F9/SATA_DEVSLP7 EC_RCIN#
AN37 For eSPI RS521 10K_5%_2 +1.8V_DEEP_SUS
C14 GPP_F8/SATA_DEVSLP6 AN46 ESPI_ALERT0# RS522 10K_5%_2
[47] USB30_TX4+ USB31_4_TXP GPP_F7/SATA_DEVSLP5 ESPI_CS1#
B14 AR47 RS523 10K_5%_2
[47] USB30_TX4- USB31_4_TXN GPP_F6/SATA_DEVSLP4
USB3.0 (Type C) [47] USB30_RX4+
J15
K16 USB31_4_RXP 6 OF 13 GPP_F5/SATA_DEVSLP3
AP48 DEVSLP1 DEVSLP1 [36]
[47] USB30_RX4- USB31_4_RXN
PCH_CFL-H_874P

A [10,12,13,14,16,18,93] +3V_DEEP_SUS A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
PCH 1/7 (DMI/USB/PCIE)
NB5 Date: Wednesday, April 08, 2020 Sheet 9 of 106
5 4 3 2 1
 5 4 3 2 1

HDA Bus(CLG)
[9,12,13,14,16,18,93] +3V_DEEP_SUS
US1D
RS20 33_5%_2 ACZ_BCLK ACZ_BCLK BD11 BF36 BM_BUSY#
[39] BIT_CLK_AUDIO ACZ_RST# HDA_BCLK/I2S0_SCLK GPP_A12/BM_BUSY#/ISH_GP6/SX_EXIT_HOLDOFF#
RS24 *33_5%_2 BE11 AV32 CLKRUN#
For eSPI

10
[39] ACZ_RST#_AUDIO ACZ_SDOUT [39] ACZ_SDIN0 ACZ_SDOUT HDA_SDI0/I2S0_RXD GPP_A8/CLKRUN#
RS21 33_5%_2 BF12
[39] ACZ_SDOUT_AUDIO ACZ_SYNC [16] ACZ_SDOUT ACZ_SYNC HDA_SDO/I2S0_TXD LAN_DISABLE
RS22 33_5%_2 CS3 BG13 BF41
[39] ACZ_SYNC_AUDIO HDA_SYNC/I2S0_SFRM GPD11/LANPHYPC TPX23
*10p/25V_2
ACZ_RST# BE10 BD42 * TPX24
BF10 HDA_RST#/I2S1_SCLK GPD9/SLP_WLAN#
RS23 RS451 BE12 HDA_SDI1/I2S1_RXD BB46 DDR4_DRAMRST# * DDR4_DRAMRST# [17,18]
*1M_5%_2 *1M_5%_2 BD12 I2S1_TXD/SNDW2_DATA DRAM_RESET# BE32 GPP_B2
I2S1_SFRM/SNDW2_CLK GPP_B2/VRALERT# BF33
GPP_B1/GSPI1_CS1#/TIME_SYNC1 BE29 CNVi_EN#
12/10 RS25, RS27 change to mount GPP_B0/GSPI0_CS1# CNVi_EN# [35]
D RS25 30_4 AUD_AZACPU_SDO AM2 R47 D
[3] AUD_AZACPU_SDO_R AUD_AZACPU_SDI AN3 HDACPU_SDO GPP_K17/ADR_COMPLETE AP29
+3V_DEEP_SUS [3] AUD_AZACPU_SDI AUD_AZACPU_SCLK_R AM3 HDACPU_SDI GPP_B11/I2S_MCLK SYS_PWROK
RS27 30_4 AU3
[3] AUD_AZACPU_SCLK HDACPU_SCLK SYS_PWROK
CS4 *22P/50V_4 +1.2VSUS
BB47 PCIE_WAKE#
SMB_ME0_CLK WAKE# SLP_A# PCIE_WAKE# [33,34,35]
RS29 2.2K_5%_2 AV18 BE40
SMB_ME0_DAT GPP_D8/I2S2_SCLK GPD6/SLP_A# TPS1 DDR4_DRAMRST#
RS30 2.2K_5%_2 AW18 BF40 RS28 470_1%_2
RS31 2.2K_5%_2 SMB_ME1_CLK MODEM_CLKREQ BA17 GPP_D7/I2S2_RXD SLP_LAN# BC28 PCH_SLP_S0ix#
SMB_ME1_DAT [35] MODEM_CLKREQ CNV_RF_RESET# GPP_D6/I2S2_TXD/MODEM_CLKREQ GPP_B12/SLP_S0# SLP_S3# PCH_SLP_S0ix# [88]
RS33 2.2K_5%_2 BE16 BF42
SMB_PCH_CLK [35] CNV_RF_RESET# PCH_DIGITAL_D1 GPP_D5/I2S2_SFRM/CNV_RF_RESET# GPD4/SLP_S3# SLP_S4# SLP_S3# [42,48]
RS35 2.2K_5%_2 BF15 BE42 +3V
SMB_PCH_DAT [28] PCH_DIGITAL_D1 PCH_DIGITAL_CLK GPP_D20/DMIC_DATA0/SNDW4_DATA GPD5/SLP_S4# SLP_S5# SLP_S4# [42,48]
RS37 2.2K_5%_2 BD16 BC42
RF_OFF_PCH [28] PCH_DIGITAL_CLK GPP_D19/DMIC_CLK0/SNDW4_CLK GPD10/SLP_S5# TPS3 SYS_RESET#
RS39 10K_5%_2 AV16 RS32 10K_5%_2
AW15 GPP_D18/DMIC_DATA1/SNDW3_DATA BE45 SUSCLK_32K 9/13 Change net name
Matt connection CLK and DAT to PCH-0808 GPP_D17/DMIC_CLK1/SNDW3_CLK GPD8/SUSCLK SUSCLK_32K [35]
+1.8V_DEEP_SUS BF44 BATLOW# GPP_B2 RS36 10K_5%_2
GPD0/BATLOW# BE35 SUSACK# RS38 *0_5%_2/S SUSWARN#
RS40 *10K_5%_2 SUSWARN# RTC_RST# BE47 GPP_A15/SUSACK# BC37 SUSWARN#
RS41 *10K_5%_2 SUSACK#
For eSPI SRTC_RST# BD46 RTCRST# GPP_A13/SUSWARN#/SUSPWRDNACK
SRTCRST#
AY42 BG44 RF_OFF_PCH
[42] EC_PWROK PCH_PWROK GPD2/LAN_WAKE# AC_PRESENT_EC
RSMRST# BA47 BG42
[42] RSMRST# RSMRST# GPD1/ACPRESENT AC_PRESENT_EC [42]
RS42 1K_5%_2 ACZ_SDOUT BD39 SLP_SUS#_EC
TPS44
[42] GPIO33_EC SLP_SUS# BE46 DNBSWON#
DSWROK_EC_R GPD3/PWRBTN# SYS_RESET# DNBSWON# [42]
AW41 AU2
SMLALERT# BE25 DSW_PWROK SYS_RESET# AW29 ACZ_SPKR
[16] SMLALERT# SMB_PCH_CLK GPP_C2/SMBALERT# GPP_B14/SPKR H_PWRGD ACZ_SPKR [16,39]
BE26 AE3
SMB_PCH_DAT GPP_C0/SMBCLK CPUPWRGD H_PWRGD [2]
RSMRST# CS5 *220p/25V_2 BF26
EC_PWROK CS6 *220p/25V_2 SML0ALERT# BF24 GPP_C1/SMBDATA AL3 ITP_PMODE RS43 1K_5%_2 +1.05V_DEEP_SUS
[12] SML0ALERT# SMB_ME0_CLK GPP_C5/SML0ALERT# ITP_PMODE JTAGX_PCH
BF25 AH4
SMB_ME0_DAT BE24 GPP_C3/SML0CLK PCH_JTAGX AJ4 JTAG_TMS_PCH JTAGX_PCH [2]
BIT_CLK_AUDIO CS7 SML1ALERT#_R BD33 GPP_C4/SML0DATA PCH_JTAG_TMS AH3 JTAG_TDO_PCH JTAG_TMS_PCH [2]
*33p/25V_2 [12] SML1ALERT#_R SMB_ME1_CLK BF27 GPP_B23/SML1ALERT#/PCHHOT# PCH_JTAG_TDO AH2 JTAG_TDI_PCH JTAG_TDO_PCH [2]
SMB_ME1_DAT BE27 GPP_C6/SML1CLK PCH_JTAG_TDI AJ3 JTAG_TCK_PCH JTAG_TDI_PCH [2]
C GPP_C7/SML1DATA 4 OF 13 PCH_JTAG_TCK TPS45 C
EMI
PCH_CFL-H_874P SLP_S3# CS73 0.033u/10V_4
SLP_S4# CS74 0.033u/10V_4
SLP_SUS#_EC CS75 *0.033u/10V_4

9/6 add CS73,CS74,CS75

System PWR_OK(CLG)
For DS3 Sequence
RS51
SYS_PWROK EC_PWROK

*0_5%_2/S
01/30 RS51 change to mount RSMRST# RS52 *0_5%_2/S DSWROK_EC_R

RS53
10K_1%_2 01/30 RS52 change to mount

+3V

+3VS5
2

+3V RS55 4.7K_5%_2

1 6 SMB_PCH_DAT
B [17,18,38] SMB_RUN_DAT B
QS6600B 2N7002KDW
Touch Pad RS58 1K_5%_2 PCIE_WAKE#
For HWPG Sequence
5

+3V RS56 4.7K_5%_2 XDP +3VS5

For eSPI
[17,18,38] SMB_RUN_CLK
4 3 SMB_PCH_CLK DDR4
QS6600A 2N7002KDW +5VS5 +1.8V_DEEP_SUS

RS60 RS526 100K_5%_2 BM_BUSY#

*10K_5%_2 RS62 10K_5%_2 CLKRUN#
+1.05V
RS61
RTC Circuitry(RTC) 100K_5%_2 HWPG
HWPG [2,42,86,87,92,93]
+BAT_RTC
For Power Sequence.

3
RS65
J1001 +1.05V_PWRGD_G2 2
30mils *SOLDERJUMPER-2 15K_5%_2 QS1
Main BAT -->Ra RS64 1 2 RTC_RST# 2N7002K RS67 RSMRST# RS68 10K_5%_2
Coin BAT -->Rb (default) *0_4/S RS66 100K_5%_2

1
RTC_RST# +1.05V_PWRGD_G1 2 QS3
METR3904-G
3

1
20K_1%_2 QS2 2 CS8 RS72
EC_RTC_RST [42]
RTC Power trace width 20mils. CX204 0.1u/16V_4 100K_5%_2
1u/6.3V_2 2N7002K
1

RS71
RS70 10K_5%_2
2 1 +3V_RTC_D SRTC_RST#
+3VPCU
D8532 SDM20U30-7
20K_1%_2
A A
CS9 CS10
1u/6.3V_2 1u/6.3V_2

For Power Sequence, pull high reuest

+3VS5 PROJECT : G3BE
Quanta Computer Inc.
BATLOW# RS75 10K_5%_2 Size Document Number Rev
Custom PCH 2/7 (HDA/SMBUS) 1A
NB5 Date: Wednesday, April 08, 2020 Sheet 10 of 106
5 4 3 2 1
 5 4 3 2 1

11
* US1C
TP9188 * AR2
TP9189 * AT5 CL_CLK G36
CL_DATA PCIE9_RXN PCIE_SATA_RXN9 [36]
TP9190 AU4 F36
CL_RST# PCIE9_RXP PCIE_SATA_RXP9 [36]
C34
P48 PCIE9_TXN D34
PCIE_SATA_TXN9 [36] SSD PCIE x4 (SATA0A) LANE
GPP_K8 PCIE9_TXP PCIE_SATA_TXP9 [36]
HSIO MUX PORT V47
V48 GPP_K9 K37
GPP_K10 PCIE10_RXN PCIE_SATA_RXN10 [36]
W47 J37
PCIE1-4 NC GPP_K11 PCIE10_RXP C35
PCIE_SATA_RXP10 [36]

PCIE5 NC L47 PCIE10_TXN B35

PCIE_SATA_TXN10 [36] SSD PCIE x4 LANE
GPP_K0 PCIE10_TXP PCIE_SATA_TXP10 [36]
L46
U48 GPP_K1 F44 PCIE_RXN15_WLAN [35]
D PCIE6 NC U47 GPP_K2 PCIE15_RXN/SATA2_RXN E45 PCIE_RXP15_WLAN [35]
D

N48 GPP_K3 PCIE15_RXP/SATA2_RXP B40

PCIE7 NC N47 GPP_K4 PCIE_15_SATA_2_TXN C40
PCIE_TXN15_WLAN [35] WLAN
GPP_K5 PCIE15_TXP/SATA2_TXP PCIE_TXP15_WLAN [35]
PCIE8 NC P47
R46 GPP_K6 L41 PCIE_RXN16_CARD [34]
GPP_K7 PCIE16_RXN/SATA3_RXN M40 PCIE_RXP16_CARD [34]
PCIE9 C36 PCIE16_RXP/SATA3_RXP B41
[36] PCIE_SATA_TXP11
B36 PCIE11_TXP/SATA0A_TXP PCIE16_TXN/SATA3_TXN C41
PCIE_TXN16_CARD [34] CardReader
PCIE10 [36] PCIE_SATA_TXN11
F39 PCIE11_TXN/SATA0A_TXN PCIE16_TXP/SATA3_TXP PCIE_TXP16_CARD [34]
SSD PCIE * 4 SSD PCIE x4 LANE [36] PCIE_SATA_RXP11
G38 PCIE11_RXP/SATA0A_RXP K43
PCIE11 [36] PCIE_SATA_RXN11 PCIE11_RXN/SATA0A_RXN PCIE17_RXN/SATA4_RXN K44 +3V
AR42 PCIE17_RXP/SATA4_RXP A42
PCIE12 near device AR48 GPP_F10/SATA_SCLOCK PCIE17_TXN/SATA4_TXN B42
AU47 GPP_F11/SATA_SLOAD PCIE17_TXP/SATA4_TXP SATAGP0 RS76 10K_5%_2
PCIE13 NC AU46 GPP_F13/SATA_SDATAOUT0 P41
Thunderbolt (NA) 9/5 update net name
GPP_F12/SATA_SDATAOUT1 PCIE18_RXN/SATA5_RXN R40
PCIE14 LAN CS78 0.1u/16V_2 PCIE_TXN14_LAN_C C39 PCIE18_RXP/SATA5_RXP C42
[33] PCIE_TXN14_LAN
CS77 0.1u/16V_2 PCIE_TXP14_LAN_C D39 PCIE14_TXN/SATA1B_TXN PCIE18_TXN/SATA5_TXN D42
NUMPAD_ID: +3V
PCIE15 WLAN [33] PCIE_TXP14_LAN
D46 PCIE14_TXP/SATA1B_TXP PCIE18_TXP/SATA5_TXP without Numpad => High
LAN [33] PCIE_RXN14_LAN
C47 PCIE14_RXN/SATA1B_RXN AK48
PCIE16 Cardreader [33] PCIE_RXP14_LAN PCIE14_RXP/SATA1B_RXP GPP_E8/SATA_LED# with Numpad => Low GPIO35 RS78 10K_5%_2
PCIE17-20 TBT B38 AH41 SATAGP0 GPIO36 RS301 10K_5%_2
C38 PCIE13_TXN/SATA0B_TXN
PCIE13_TXP/SATA0B_TXP
GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
AJ43 GPIO35 GPIO35 [36] BOM:SSD only PCH_DPST_PWM RS512 *10K_5%_2
PCIE21-24 SSD2 PCIE * 4 C45 AK47
C46 PCIE13_RXN/SATA0B_RXN GPP_E2/SATAXPCIE2/SATAGP2 AN47
NUMPAD_ID [48] For SSD Det (SATA0A)
PCIE13_RXP/SATA0B_RXP GPP_F0/SATAXPCIE3/SATAGP_3 AM46
GPP_F1/SATAXPCIE4/SATAGP4
10/03 Add NUMPAD_ID GPIO36 [36]
E37 AM43 PCH_LVDS_BLON RS510 *100K_5%_2
[36] PCIE_SATA_TXP12
D38 PCIE12_TXP/SATA1A_TXP GPP_F2/SATAXPCIE5/SATAGP5 AM47
GPIO35/36: PCH_DISP_ON RS511 *100K_5%_2
SSD PCIE x4 LANE [36]
[36]
PCIE_SATA_TXN12
PCIE_SATA_RXP12 J41 PCIE12_TXN/SATA1A_TXN GPP_F3/SATAXPCIE6/SATAGP6 AM48 For SSD Det SSD SATA IF => High
H42 PCIE12_RXP/SATA_1A_RXP GPP_F4/SATAXPCIE7/SATAGP7
[36] PCIE_SATA_RXN12 PCIE12_RXN/SATA1A_RXN AU48 PCH_DPST_PWM
SSD PCIE IF => Low
GPP_F21/EDP_BKLTCTL PCH_DPST_PWM [28]
B44 AV46 PCH_LVDS_BLON PCH_LVDS_BLON [28]
C
A44 PCIE20_TXP/SATA7_TXP GPP_F20/EDP_BKLTEN AV44 PCH_DISP_ON C
R37 PCIE20_TXN/SATA7_TXN GPP_F19/EDP_VDDEN
09/17 RS476 change to 0201
PCH_DISP_ON [28] 7/13 RS79 change to 13 ohm
R35 PCIE20_RXP/SATA7_RXP AD3 PM_THRMTRIP#_P RS476 620_5%_2
PCIE20_RXN/SATA7_RXN THRMTRIP# PM_THRMTRIP# [2,42]
D43 AF2 EC_PECI_PCH RS79 13_1%_4
Thunderbolt (NA) C44 PCIE19_TXP/SATA6_TXP PECI AF3 PM_SYNC_R RS80 30_1%_2
EC_PECI [2,42]
PCIE19_TXN/SATA6_TXN PM_SYNC PM_SYNC [2]
N42 AG5 CPU_PLTRST# RS81 *0_5%_2/S
M44 PCIE19_RXP/SATA6_RXP PLTRST_CPU# AE2 H_PM_DOWN
CPU_PLTRST#R [2] Ra
PCIE19_RXN/SATA6_RXN 3 OF 13 PM_DOWN H_PM_DOWN [2]
12/05 RS81 change to shor pad RS82 CS11
PCH_CFL-H_874P PM_THRMTRIP#_P 0.3-2 inches *4.7K_5%_2 *47p/25V_2

Please follow Intel CFL-H DG 571391 to meet Layout Requirment Ca

"12.3.224 MHz Input Clock Routing Guidelines"
XTAL24_IN_R
H_PECI (50ohm)
CS12 27p/25V_2 Trace Length: <0.5 iches
Ra,Ca need placement close to PCH.
2
1

RS83 33_5%_2 XTAL24_IN US1G

YS1 RS84 TPS39 GPP_A16 BE33
24MHZ/20ppm 200K_5%_2 RS85 33_5%_2 XTAL24_OUT GPP_A16/CLKOUT_48 Y3 CK_XDP_N_R
CLKOUT_ITPXDP TPS9
* D7 Y4 CK_XDP_P_R
[2] CLK_DPLL_NSCCLKP CLKOUT_CPUNSSC_P CLKOUT_ITPXDP_P TPS10
[2] CLK_DPLL_NSCCLKN C6 *
4
3

CLKOUT_CPUNSSC B6 *
CPU_PCI_BCLKN [2]
CS13 27p/25V_2 B8 CLKOUT_CPUPCIBCLK A6
[2] CLK_CPU_BCLKP CLKOUT_CPUBCLK_PCLKOUT_CPUPCIBCLK_P CPU_PCI_BCLKP [2] +3V
[2] CLK_CPU_BCLKN C8
XTAL24_OUT_R CLKOUT_CPUBCLK AJ6
XTAL24_OUT U9 CLKOUT_PCIE_N0 AJ7
XTAL24_IN U10 XTAL_OUT CLKOUT_PCIE_P0
XTAL_IN AH9 PCIE_CLKREQ_WLAN# RS87 10K_5%_2
CLKOUT_PCIE_N1 CLK_PCIE_LANN [33]
XCLK_RBIAS T3 AH10
B
Crystal Components with Surrounding 10 mil Wide GND Shield Trace XCLK_BIASREF CLKOUT_PCIE_P1 CLK_PCIE_LANP [33] LAN PCIE_CLKREQ_LAN# RS88 10K_5%_2
B

Break Out:4-10 mil Wide GND Shield Trace RTC_X1

RTC_X2
BA49
RTCX1 CLKOUT_PCIE_N2
AE14 CLK_PCIE_WLANN [35]
PCIE_CLKREQ_CR#
RS86 BA48 AE15 CLK_PCIE_WLANP [35] WLAN RS89 10K_5%_2
60.4_1%_2 RTCX2 CLKOUT_PCIE_P2
PCIE_CLKREQ0# BF31 AE6 PCIE_CLKREQ_VGA# RS90 10K_5%_2
[33] PCIE_CLKREQ_LAN#
PCIE_CLKREQ_LAN# BE31 GPP_B5/SRCCLKREQ0#
GPP_B6/SRCCLKREQ1#
CLKOUT_PCIE_N3
CLKOUT_PCIE_P3
AE7
CLK_PCIE_CRN
CLK_PCIE_CRP
[34]
[34] Card Reader BOM:DIS only
PCIE_CLKREQ_WLAN# AR32 PCIE_CLKREQ0# RS91 10K_5%_2
[35] PCIE_CLKREQ_WLAN# GPP_B7/SRCCLKREQ2#
PCIE_CLKREQ_CR# BB30 AC2
[34] PCIE_CLKREQ_CR# GPP_B8/SRCCLKREQ3# CLKOUT_PCIE_N4 CLK_VGA_N [19]
PCIE_CLKREQ_VGA# BA30 AC3 PCIE_CLKREQ_SSD# RS92 10K_5%_2
[19] PCIE_CLKREQ_VGA#
PCIE_CLKREQ_SSD# AN29 GPP_B9/SRCCLKREQ4# CLKOUT_PCIE_P4 CLK_VGA_P [19] VGA BOM:SSD only
[36] PCIE_CLKREQ_SSD# PCIE_CLKREQ_TBT# GPP_B10/SRCCLKREQ5# PCIE_CLKREQ_TBT#
AE47 AB2 RS93 10K_5%_2
PCIE_CLKREQ_SSD1# GPP_H0/SRCCLKREQ6# CLKOUT_PCIE_N5 CLK_PCIE_SSDN [36]
[36] PCIE_CLKREQ_SSD1# AC48 AB3 CLK_PCIE_SSDP [36] SSD1
AE41 GPP_H1/SRCCLKREQ7# CLKOUT_PCIE_P5 PCIE_CLKREQ_SSD1# RS508 10K_5%_2
AF48 GPP_H2/SRCCLKREQ8# W4
AC41 GPP_H3/SRCCLKREQ9# CLKOUT_PCIE_N6 W3
AC39 GPP_H4/SRCCLKREQ10# CLKOUT_PCIE_P6 Thunderbolt (NA)
RTC Clock 32.768KHz AE39
AB48
GPP_H5/SRCCLKREQ11#
GPP_H6/SRCCLKREQ12# CLKOUT_PCIE_N7
W7
W6
CLK_PCIE_SSD1N [36]
CS14 18p/25V_2 RS197 0_5%_4 RTC_X1 AC44 GPP_H7/SRCCLKREQ13# CLKOUT_PCIE_P7 CLK_PCIE_SSD1P [36] SSD2
AC43 GPP_H8/SRCCLKREQ14# AC14
GPP_H9/SRCCLKREQ15# CLKOUT_PCIE_N8
1

AC15
YS2 V2 CLKOUT_PCIE_P8
V3 CLKOUT_PCIE_N15 U2
32.768KHZ/20ppm CLKOUT_PCIE_P15 CLKOUT_PCIE_N9 U3
RS99 T2 CLKOUT_PCIE_P9
10M_5%_4 T1 CLKOUT_PCIE_N14 AC9
CLKOUT_PCIE_P14 CLKOUT_PCIE_N10 AC11
2

CS15 18p/25V_2 RS198 0_5%_4 RTC_X2 AA1 CLKOUT_PCIE_P10

Y2 CLKOUT_PCIE_N13 AE9
CLKOUT_PCIE_P13 CLKOUT_PCIE_N11
02/12 LS1 change to short pad
11/29 CS14, CS15 change to 18pF AE11
AC7 CLKOUT_PCIE_P11
AC6 CLKOUT_PCIE_N12 R6 PULSAR_38P4M_REFCLK_R LS1 *0_4/S
A CLKOUT_PCIE_P12 7 OF 13 CLKIN_XTAL PULSAR_38P4M_REFCLK [35] A
RS197 RS198 for Debug used. 9/8 Add CS76,RS454 / RS258 --> LS1
Please do not change to Short pad PCH_CFL-H_874P L < 5" 4.7pF
5" < L < 9" 2.2pF to 3.3pF
RS454 9" < L < 10" 1pF to 2.2pF
10K_5%_2 CS76
2.2p/25V_2

Close to PCH PROJECT : G3BE

Quanta Computer Inc.
Size Document Number Rev
Custom 1A
PCH 3/7 (SATA/LPC/CLK)
NB5 Date: Wednesday, April 08, 2020 Sheet 11 of 106
5 4 3 2 1
 5 4 3 2 1

US1A
AV29 PLTRST#
PCI_PME# BE36 GPP_B13/PLTRST# PLTRST# [19,33,34,35,36,38,48]
For eSPI RS524 100K_5%_2

12
+1.8V_DEEP_SUS GPP_A11/PME#/SD_VDD2_PW R_EN#
R15 Y47 RS452
R13 RSVD#R15 GPP_K16/GSXCLK Y46
RSVD#R13 GPP_K12/GSXDOUT *100K_5%_2
Y48
GPP_K13/GSXSLOAD W 46 9/6 Reserve RS452 on PLTEST#
AL37 GPP_K14/GSXDIN AA45
AN35 VSS GPP_K15/GSXSRESET#
TP#AN35
For Thunderbolt used only
PCH_SPI1_SI AU41 AL47
[38] PCH_SPI1_SI

D
PCH SPI ROM(CLG) [38] PCH_SPI1_SO
PCH_SPI1_SO
PCH_SPI_CS0#
PCH_SPI1_CLK
BA45
AY47
AW 47
SPI0_MOSI
SPI0_MISO
SPI0_CS0#
GPP_E3/CPU_GP0
GPP_E7/CPU_GP1
GPP_B3/CPU_GP2
AM45
BF32
BC33
INT_BT_OFF#_R RS527 *0_5%_2/S INT_BT_OFF# [35] D
[38] PCH_SPI1_CLK SPI0_CLK GPP_B4/CPU_GP3
AW 48
PCH_SPI_CS0#_R SPI0_CS1# AE44
TPS25 GPP_H18/SML4ALERT#
09/24 Add RS527 & INT_BT_OFF# connect to PCH
PCH_SPI1_CLK_R PCH_SPI_IO2 AY48 AJ46 12/05 RS527 change to short pad
TPS26 PCH_SPI1_SI_R PCH_SPI_IO3 BA46 SPI0_IO2 GPP_H17/SML4DATA AE43
TPS27* PCH_SPI1_SO_R SPI_TPM_CS# AT40 SPI0_IO3 GPP_H16/SML4CLK AC47 SML3ALERT#
TPS28* BIOS_WP#
[38] SPI_TPM_CS# SPI0_CS2# GPP_H15/SML3ALERT# AD48
TPS29* GPP_D1 BE19 GPP_H14/SML3DATA AF47
HOLD# TPS24
TPS30* BF19 GPP_D1/SPI1_CLK/SBK1_BK1 GPP_H13/SML3CLK AB47
* * SML2ALERT#
TPM_PIRQ# BF18 GPP_D0/SPI1_CS#/SBK0_BK0 GPP_H12/SML2ALERT# AD47
*
Place to TOP [38]
[28]
TPM_PIRQ#
OLED_ID
BE18 GPP_D3/SPI1_MOSI/SBK3_BK3
GPP_D2/SPI1_MISO/SBK2_BK2
GPP_H11/SML2DATA
GPP_H10/SML2CLK
AE48
BC17
PCH_SPI_CS0#_R BD17 GPP_D22/SPI1_IO3 BB44 SM_INTRUDER# RS482 1M_5%_2
[42] PCH_SPI_CS0#_R GPP_D21/SPI1_IO2 INTRUDER# +BAT_RTC
PCH_SPI1_CLK_R RS528 1 OF 13
[42] PCH_SPI1_CLK_R PCH_SPI1_SI_R
[42] PCH_SPI1_SI_R 100K_5%_2 PCH_CFL-H_874P
PCH_SPI1_SO_R 10/04 Add OLED_ID, RS528 and delete RS109
[42] PCH_SPI1_SO_R

PCH_SPI1_CLK RS453 100K_5%_2 DB SI stuff WSON8 SOCKETwith BIOS ROM

9/6 Add RS453 = 100K ohm on PCH_SPI1_CLK
Vender Size P/N
+3VS5 RS121 *0_4
GigaDevice 16MB AKE2DF00Q00(GD25B127DWIGR)
+3V_DEEP_SUS RS123 *0_4/S
Socket DG008000012
US3
PCH_SPI_CS0# RS127 15_1%_2 PCH_SPI_CS0#_R 1 8 +3VSPI
PCH_SPI1_CLK RS129 PCH_SPI1_CLK_R CE# VDD +3VSPI
15_1%_2 6
PCH_SPI1_SI RS125 15_1%_2 PCH_SPI1_SI_R 5 SCK RS480 *1K_5%_2
PCH_SPI1_SO RS126 15_1%_2 PCH_SPI1_SO_R 2 SI 7 HOLD# RS479 15_1%_2 PV stuff SOP8 BIOS ROM only
SO HOLD# CS18
C 3 4 PCH_SPI_IO3
Vender Size P/N C
0.1u/16V_4
CS17 W P# VSS ESPI FLASH SHARING MODE
MAX 16MB AKE3DZN0Z03 (MX25L12873FM2I-10G)
22P/50V_4 W25Q64FVSSIQ This signal has a weak internal pull-down.
AKE3DF-KN01 Winbond 16MB AKE3DF-KN01 (W25Q128JVSIQ) 0 = Master Attached Flash Sharing (MAFS) enabled
CX205 1u/6.3V_2 +3VSPI RS478 *1K_5%_2 09/25 US3 change footprint to GigaDevice 16MB AKE3DZN0Q02 (GD25B127DSIGR) (Default)
PCH_SPI_IO2 BIOS_WP#
50951-0084n-v01-8p-socket 1 = Slave Attached Flash Sharing (SAFS) enabled.
RS477 15_1%_2 10/02 US3 change footprint to 91960-0084L-8P-SOCKET Notes:
01/21 US3 P/N change to AKE3DF-KN01 1. The internal pull-down is disabled after RSMRST#
de-asserts.
2. This signal is in the primary well.

BOOT SELECT STRAP RESERVED RESERVED +3V_DEEP_SUS

This Signal has a weak internal pull-down. External pull-up is required. Recommend 100K if pulled This signal has an internal pull-down.
This field determines the destination of accesses to the up to 3.3V or 75K if pulled up to 1.8V. 0 = Disable IntelR DCI-OOB (Default)
BIOS memory range. Also controllable using Boot BIOS This strap should sample HIGH. There should NOT be 1 = Enable IntelR DCI-OOB RS208
Destination bit (Bus0, Device31, Function0, offset DCh, any on-board device driving it to opposite direction *100K_5%_2
bit 6). during strap sampling. +3V_DEEP_SUS +3V_DEEP_SUS
+3V_DEEP_SUS SML2ALERT#
HIGH:LPC
LOW: SPI. (Default)
RS200 RS230
RS262 100K_5%_2 *4.7K_5%_2
*4.7K_5%_2
B B
PCH_SPI1_SI
SML1ALERT#_R
GPP_B22 [10] SML1ALERT#_R
[13] GPP_B22
RS232
*20K_1%_2
RESERVED
External pull-up is required. Recommend 100K if pulled
up to 3.3V or 75K if pulled up to 1.8V.
This strap should sample HIGH. There should NOT be
any on-board device driving it to opposite direction
during strap sampling.
ESPI/LPC SELECT STRAP RESERVED RESERVED
HIGH:eSPI Is selected for EC. (Default) External pull-up is required. Recommend 100K if pulled External pull-up is required. Recommend 100K if pulled
+3V_DEEP_SUS
LOW: LPC Is selected for EC. up to 3.3V or 75K if pulled up to 1.8V. up to 3.3V or 75K if pulled up to 1.8V.
This strap should sample HIGH. There should NOT be This strap should sample HIGH. There should NOT be
any on-board device driving it to opposite direction
+3V_DEEP_SUS
any on-board device driving it to opposite direction during strap sampling. +3V_DEEP_SUS RS204
during strap sampling. +3V_DEEP_SUS 100K_5%_2

RS233 RS203 PCH_SPI_IO3

For eSPI 4.7K_5%_2 RS213 100K_5%_2
100K_5%_2
RS205
SML0ALERT# PCH_SPI_IO2 *100K_5%_2
A
[10] SML0ALERT# A
SML3ALERT#
8/22 no stuff RS205
RS119
*4.7K_5%_2

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
PCH 4/7 (GPIO/MISC)
NB5 Date: Wednesday, April 08, 2020 Sheet 12 of 106
5 4 3 2 1
 5 4 3 2 1

[9,10,12,14,16,18,93] +3V_DEEP_SUS

US1M US1K
13
GPP_B22 BA26
AW13 BD4 CNV_WR_CLK_DN [12] GPP_B22 BD30 GPP_B22/GSPI1_MOSI BA20
GPP_G0/SD_CMD CNV_WR_CLKN CNV_WR_CLK_DP CNV_WR_CLK_DN [35] PCI_SERR#_R GPP_B21/GSPI1_MISO GPP_D9/ISH_SPI_CS#/GSPI2_CS0#
BE9 BE3 [42] PCI_SERR# RS135 100_5%_2 AU26 BB20
GPP_G1/SD_D0 CNV_WR_CLKP CNV_WR_CLK_DP [35] GPP_B20/GSPI1_CLK GPP_D10/ISH_SPI_CLK/GSPI2_CLK SPK_ID
BF8 AW26 BB16
GPP_G2/SD_D1 CNV_WR_LANE0_DN GPP_B19/GSPI1_CS0# GPP_D11/ISH_SPI_MISO/GP_BSSB_CLK/GSPI2_MISO BT_OFF SPK_ID [41]
D BF9 BB3 CNV_WR_LANE0_DN [35] AN18 D
BG8 GPP_G3/SD_D2 CNV_WR_D0N BB4 CNV_WR_LANE0_DP BE30 GPP_D12/ISH_SPI_MOSI/GP_BSSB_DI/GSPI2_MOSI
GPP_G4/SD_D3 CNV_WR_D0P CNV_WR_LANE1_DN CNV_WR_LANE0_DP [35] GPP_B18/GSPI0_MOSI
BE8 BA3
CNV_WR_LANE1_DN [35] [17,18] PM_EXTTS#0 RS136 *0_5%_2 PM_EXTTS#0_R BD29 BF14
BD8 GPP_G5/SD_CD# CNV_WR_D1N BA2 CNV_WR_LANE1_DP TPS42 EXTTS#1 BF29 GPP_B17/GSPI0_MISO GPP_D16/ISH_UART0_CTS#/CNV_WCEN AR18
GPP_G6/SD_CLK CNV_WR_D1P CNV_WR_LANE1_DP [35] GPP_B16/GSPI0_CLK GPP_D15/ISH_UART0_RTS#/GSPI2_CS1#/CNV_WFEN
AV13 TP_INTH# BB26 BF17 Codec Output
GPP_G7/SD_WP CNV_WT_CLK_DN [38,42] TP_INTH# GPP_B15/GSPI0_CS0# GPP_D14/ISH_UART0_TXD/I2C2_SCL
BC5 BE17 GPP_D11
CNV_WT_CLKN CNV_WT_CLK_DP CNV_WT_CLK_DN [35] GPP_D13/ISH_UART0_RXD/I2C2_SDA
BB6 GPIO SPK_ID
CNV_WT_CLKP CNV_WT_CLK_DP [35]
AP3 BB24 Hi : SABLE
AP2 GPP_I11/M2_SKT2_CFG0 BE6 CNV_WT_LANE0_DN BE23 GPP_C9/UART0_TXD Definition Low : VECO
GPP_I12/M2_SKT2_CFG1 CNV_WT_D0N CNV_WT_LANE0_DP CNV_WT_LANE0_DN [35] GPP_C8/UART0_RXD
AN4 BD7 AP24
GPP_I13/M2_SKT2_CFG2 CNV_WT_D0P CNV_WT_LANE1_DN CNV_WT_LANE0_DP [35] GPP_C11/UART0_CTS#
03/13 Add RS529 AM7 BG6 BA24
GPP_I14/M2_SKT2_CFG3 CNV_WT_D1N CNV_WT_LANE1_DP CNV_WT_LANE1_DN [35] GPP_C10/UART0_RTS#
BF6 AG45
CNV_WT_D1P CNV_WT_LANE1_DP [35] GPP_H20/ISH_I2C0_SCL
BA1 BD21 AH46
9/14 add CNV_WT_RCOMP AW24 GPP_C15/UART1_CTS#/ISH_UART1_CTS# GPP_H19/ISH_I2C0_SDA
For C10 PCIECOMP_N GPP_C14/UART1_RTS#/ISH_UART1_RTS#
AV6 B12 RS139 100_1%_2 AP21
CPU_VCCIO_PWR_GATE# AY3 GPP_J0/CNV_PA_BLANKING PCIE_RCOMPN A13 PCIECOMP_P AU24 GPP_C13/UART1_TXD/ISH_UART1_TXD AH47
RS529 75K_1%_2 AR13 GPP_J1/CPU_VCCIO_PWR_GATE# PCIE_RCOMPP BE5 SD_RCOMP_1P8 RS141 200_1%_2 RS140 GPP_C12/UART1_RXD/ISH_UART1_RXD GPP_H22/ISH_I2C1_SCL AH48
AV7 GPP_J11/A4WP_PRESENT SD_RCOMP_1P8 BE4 SD_RCOMP_3P3 RS142 200_1%_2 150_1%_2 [42] SIO_EXT_SCI# AV21 GPP_H21/ISH_I2C1_SDA
GPP_J10 SD_RCOMP_3P3 SIO_EXT_SCI# GPP_C23/UART2_CTS#
AW3 BD1 AW21
AT10 GPP_J_2 GPPJ_RCOMP_1P81 BE1 TPS37 UART2_TXD BE20 GPP_C22/UART2_RTS# AV34 BOARD_ID6
CNV_BRI_DT AV4 GPP_J_3 GPPJ_RCOMP_1P82 BE2 RS143 200_1%_2 TPS38 UART2_RXD BD20 GPP_C21/UART2_TXD GPP_A23/ISH_GP5 AW32 BOARD_ID5
[16,35] CNV_BRI_DT CNV_BRI_RSP AY2 GPP_J_4_CNV_BRI_DT_UART0_RTSB GPPJ_RCOMP_1P83 GPP_C20/UART2_RXD GPP_A22/ISH_GP4 BOARD_ID4
[35] CNV_BRI_RSP BA33
CNV_RGI_DT BA4 GPP_J5/CNV_BRI_RSP/UART0_RXD Y35 BE21 GPP_A21/ISH_GP3 BE34 BOARD_ID3
[16,35] CNV_RGI_DT CNV_RGI_RSP AV3 GPP_J6/CNV_RGI_DT/UART0_TXD RSVD2 [38] TP_SCL GPP_C19/I2C1_SCL GPP_A20/ISH_GP2 BOARD_ID2
[35] CNV_RGI_RSP Y36 BF21 BD34
GPP_J7/CNV_RGI_RSP/UART0_CTS# RSVD3 [38] TP_SDA GPP_C18/I2C1_SDA GPP_A19/ISH_GP1 BOARD_ID1
AW2 BC22 BF35
GPP_J9 AU9 GPP_J8/CNV_MFUART2_RXD BC1 BF23 GPP_C17/I2C0_SCL GPP_A18/ISH_GP0 BD38 BOARD_ID0
[16] GPP_J9 GPP_J9/CNV_MFUART2_TXD RSVD#BC1 GPP_C16/I2C0_SDA GPP_A17/SD_VDD1_PWR_EN#/ISH_GP7
AL35 TPS34
13 OF 13 TP BE15
For C10
9/14 add +1.8V_DEEP_SUS +3V_DEEP_SUS BE14 GPP_D4/ISH_I2C2_SDA/I2C3_SDA/SBK4_BK4
11 OF 13
PCH_CFL-H_874P *
GPP_D23/ISH_I2C2_SCL/I2C3_SCL +3V_DEEP_SUS
Matt change power source to +VCCPRIM_1P8Af-0731
C PCH_CFL-H_874P C
+1.8V_DEEP_SUS

+VCCPRIM_1P8A R30099
100K_5%_2 BT_OFF RS145 10K_5%_2
CNV_BRI_RSP RS456 20K_1%_2 R30098
*100K_5%_2 SPK_ID RS148 10K_5%_2

2
CNV_RGI_RSP RS458 20K_1%_2 Q9078 DMG1012T-7
TP_INTH# RS151 10K_5%_2
CPU_VCCIO_PWR_GATE# 1 3 PWR_GATE#
PWR_GATE# [93]
SIO_EXT_SCI# RS154 10K_5%_2

UART2_TXD RS137 49.9K_1%_2

+1.8V_DEEP_SUS RS455
For eSPI UART2_RXD RS138 49.9K_1%_2
*2.2K_5%_2

RS485 *10K_5%_2BOARD_ID0 RS496 10K_5%_2

RS486 10K_5%_2 BOARD_ID1 RS497 *10K_5%_2 Board ID

RS149 10K_5%_2 BOARD_ID2 RS491 *10K_5%_2
Model OLED_ID Board ID [6:5] Board ID [4] Board ID [3] Board ID [2:1:0]
RS494 10K_5%_2 BOARD_ID3 RS492 *10K_5%_2 GPP_D2 ID6;ID5 ID4 ID3 ID2;ID1;ID0
RS487 *10K_5%_2BOARD_ID4 RS498 10K_5%_2
+3V
RS495 10K_5%_2 BOARD_ID5 RS493 *10K_5%_2 Definition 100 : N18E-G0 80W Max-P 000 : N18P-G61
0 : Normal 00 : Reserve 0: PV 0 : No Support Thunderbolt PCI_SERR# RS165 10K_5%_2
B RS488 10K_5%_2 BOARD_ID6 RS499 *10K_5%_2
101 : N18E-G1R 80W Max-P 001 : N18P-G62 B
1 : OLED_LCD 1: PV2/MV 1 : Thunderbolt
110 : N18E-G2R 80W Max-Q 010 : Reserve
03/30 RS487 change to unmount, RS498 change to mount
TP_SCL RS483 4.7K_5%_2
111 : N18E-G3R 80W Max-Q 011 : Reserve
TP_SDA RS484 4.7K_5%_2

US1E
AL13 DDPC_CTRLCLK
GPP_I5/DDPB_CTRLCLK AR8 DDPC_CTRLDATA GPP_I6 / DDPB_CTRLDATA:
GPP_I6/DDPB_CTRLDATA
TypeC1_DDI1_HPD_Q
DP_HPD_PCH_Q
AT6
GPP_I0/DDPB_HPD0/DISP_MISC0 GPP_I7/DDPC_CTRLCLK
AN13 SDVO_CLK
SDVO_DATA
This signal has a weak internal pull-down. +3V
AN10 AL10
HDMI_HPD_Q AP9 GPP_I1/DDPC_HPD1/DISP_MISC1 GPP_I8/DDPC_CTRLDATA AL9 DDPD_CTRLCLK 0 = Port B is not detected. (Default)
GPP_I2/DPPD_HPD2/DISP_MISC2 GPP_I9/DDPD_CTRLCLK
TPS43 AL15
GPP_I3/DPPE_HPD3/DISP_MISC3 GPP_I10/DDPD_CTRLDATA
AR3
AN40
DDPD_CTRLDATA 1 = Port B is detected. SDVO_CLK RS505 *2.2K_5%_2
GPP_F23/DDPF_CTRLDATA AT49 SDVO_DATA RS502 *2.2K_5%_2
GPP_F22/DDPF_CTRLCLK GPP_I8 / DDPC_CTRLDATA:
HPD0 ---> TBT AP41 SKTOCC_N_R This signal has a weak internal Pull-down.
GPP_F14/EXT_PWR_GATE#/PS_ON#
HPD1 ---> mini DP [28] CPU_EDP_HPD
CPU_EDP_HPD AN6
GPP_I4/EDP_HPD/DISP_MISC4
SKTOCC_N_R [2]
0 = Port C is not detected. (Default) DDPC_CTRLCLK
M45 RS506 *2.2K_5%_2
CPU_EDP_HPD HPD2 ---> HDMI GPP_K23/IMGCLKOUT1 L48 1 = Port C is detected.
GPP_K22/IMGCLKOUT0
HPD4-->eDP GPP_K21
T45
T46
DDPC_CTRLDATA RS503 *2.2K_5%_2

RS179 GPP_K20 AJ47 GPP_I10 /DDPD_CTRLDATA: DDPD_CTRLCLK RS507 *2.2K_5%_2

GPP_H23/TIME_SYNC0
100K_1%_2 5 OF 13
This signal has a weak internal pull-down. DDPD_CTRLDATA
PCH_CFL-H_874P RS504 *2.2K_5%_2
0 = Port D is not detected. (Default)
+3V +3V +3V
1 = Port D is detected.
A A

R30128 R124622 R124623

1M_5%_2 1M_5%_2 1M_5%_2
12/05 RS513 change to short pad
2

2
[46,47] TBTA_HPD
RS513 *0_5%_2/S 3 1 TypeC1_DDI1_HPD_Q
[21,31] DP_HPD_PCH 3 1 DP_HPD_PCH_Q
[21,30] HDMI_HPD 3 1 HDMI_HPD_Q PROJECT : G3BE
QS7006 QS6 QS7005
Quanta Computer Inc.
2N7002K 2N7002K 2N7002K Size Document Number Rev
Custom 1A
PCH 5/7 (GPIO)
NB5 Date: Wednesday, April 08, 2020 Sheet 13 of 106
5 4 3 2 1
 5 4 3 2 1

VCCPRIM_3P3
Without CNVi = Icc = 0mA
With CNVi = 582mA
14
Chipset will use this power rail to internal
LDO and output 1.24V for CNVi used.
**Layout Note: +VCCPRIM_1P5 total :5.42A**
+1.05V_DEEP_SUS
+VCCPRIM_3P3
D US1H D
AA22 AW9
AA23 VCCPRIM_1P051 VCCPRIM_3P32
AB20 VCCPRIM_1P052 BF47
VCCPRIM_1P053 DCPRTC1 DCPRTC
CS19 AB22 BG47 CS20 1u/6.3V_2
1u/6.3V_2 AB23 VCCPRIM_1P054 DCPRTC2
AB27 VCCPRIM_1P055 V23
VCCPRIM_1P056 VCCPRIM_3P35 +VCCPRIM_3P3
AB28
AB30 VCCPRIM_1P057 AN44 +VCCSPI RS185 *0_4/S
VCCPRIM_1P058 VCCSPI +3V_DEEP_SUS
AD20
AD23 VCCPRIM_1P059 BC49 +VCCRTC RS509 *0_4/S
VCCPRIM_1P0510 VCCRTC1 +BAT_RTC
AD27 BD49
AD28 VCCPRIM_1P0511 VCCRTC2 CS21 1u/6.3V_2
AD30 VCCPRIM_1P0512 AN21 12/06 RS188 change to 0 ohm CS22 0.1u/16V_4
AF23 VCCPRIM_1P0513 VCCPGPPG_3P3
VCCPRIM_1P0516
01/30 RS188 change to short pad
AF27 AY8 +VCCPRIM_3P33 RS188 *0_4/S
+1.05V_DEEP_SUS VCCPRIM_1P0517 VCCPRIM_3P33 +3V_DEEP_SUS
AF30 BB7 CS23 1u/6.3V_2
VCCPRIM_1P0518 VCCPRIM_3P34 CS47 4.7U/6.3V_4
U26 AC35
U29 VCCPRIM_1P0523 VCCPGPPHK1 AC36
CS24 VCCPRIM_1P0524 VCCPGPPHK2 +3V_DEEP_SUS
V25 AE35 CS25 0.1u/16V_4
22U/6.3V_6 CS26 V27 VCCPRIM_1P0525 VCCPGPPEF1 AE36 CS27 0.1u/16V_4
1u/6.3V_2 V28 VCCPRIM_1P0526 VCCPGPPEF2
V30 VCCPRIM_1P0527 AN24 +VCCP RS228 *0_4/S
VCCPRIM_1P0528 VCCPGPPD +3V_DEEP_SUS
V31 AN26
VCCPRIM_1P0529 VCCPGPPBC1 AP26
VCCPGPPBC2
12/05 RS514 change to short pad
AD31 CS84 0.1u/16V_4 +VCCPRIM_3P3 +3V_DEEP_SUS
+1.05V_DEEP_SUS VCCPRIM_1P0514 AN32 RS514 *0_4/S
AE17 VCCPGPPA +1.8V_DEEP_SUS For eSPI
VCCPRIM_1P0515
RS217 *0_4/S +VCCDUSB W22 AT44 RS236 *0_6/S
+1.05V_DEEP_SUS VCCDUSB_1P051 VCCPRIM_3P31 +VCCPRIM_3P3
W23
8/4 Add CS38/CS39/CS40/CS41/CS42 VCCDUSB_1P052 BE48 +VCCDSW3P3 RS190 *0_4/S
VCCDSW_3P31 +3VS5
RS218 *0_5%_4 +VCCDSW BG45 BE49 CS28 0.1u/16V_4
+1.05V_DEEP_SUS VCCDSW_1P051 VCCDSW_3P32
CS82 1u/6.3V_2 BG46
VCCDSW_1P052 BB14
+VCCPRIM_MPHY W31 VCCHDA +V3.3DX_1.5DX_ADO
+1.05V_DEEP_SUS RS257 *0_4/S
CS38 1u/6.3V_2 VCCPRIM_MPHY_1P05 AG19
D1 VCCPRIM_1P83 AG20 +VCCPRIM_1P8A RS237 *0_5%_4 +1.8V_DEEP_SUS
+1.05V_DEEP_SUS VCCPRIM_1P0521 VCCPRIM_1P84 +V3.3DX_1.5DX_ADO +3V_DEEP_SUS
4.7u/6.3V_4 CS40 E1 AN15 CS29 4.7U/6.3V_4
VCCPRIM_1P0522 VCCPRIM_1P85 AR15
C
RS219 *0_6/S +VCCAMPHYPLL C49 VCCPRIM_1P86 BB11 CS30 1u/6.3V_2 C
+1.05V_DEEP_SUS VCCAMPHYPLL_1P051 VCCPRIM_1P87
1u/10V_2 CS31 D49
*22U/6.3V_6 CS41 E49 VCCAMPHYPLL_1P052 AF19 +VCCPRIM_1P8B RS238 *0_4/S +VCCPRIM_1P8A
VCCAMPHYPLL_1P053 VCCPRIM_1P81 +VCCPRIM_1P8A
AF20 CS37 4.7U/6.3V_4 01/30 RS238 change to short pad
RS224 *0_6/S +VCCA_XTAL P2 VCCPRIM_1P82 RS459 *0_4/S
+1.05V_DEEP_SUS VCCA_XTAL_1P051
22U/6.3V_6 CS42 P3 AG31
22U/6.3V_6 CS80 W19 VCCA_XTAL_1P052 VCCPRIM_1P0520 AF31 +VCCPRIM_1P0520 RS239 *0_4/S
+VCCA_SRC VCCA_SRC_1P051 VCCPRIM_1P0519 +1.05V_DEEP_SUS
RS225 *0_4/S W20
+1.05V_DEEP_SUS VCCA_SRC_1P052 AK22 +VCCDPHY_1P24_P1 CS43 1u/6.3V_2
C1 VCCPRIM_1P241 AK23 RS260 *0_4/S
C2 VCCAPLL_1P054
VCCAPLL_1P055
VCCPRIM_1P242 Need Check
AJ22 +VCCDPHY_1P24_P2 CS44 1u/6.3V_2
RS226 *0_4/S SI : Add CS46 +VCCA_BCLK V19 VCCDPHY_1P241 AJ23 RS261 *0_5%_4
+1.05V_DEEP_SUS VCCA_BCLK_1P05 VCCDPHY_1P242
1u/6.3V_2 CS46 BG5 +VCCDPHY_1P24_P3 CS45 4.7U/6.3V_4
RS227 *0_4/S +VCCAPLL B1 VCCDPHY_1P243
+1.05V_DEEP_SUS VCCAPLL_1P051
B2 K47
B3 VCCAPLL_1P052 VCCMPHY_SENSE K46 TPS35
1u/6.3V_4 CS32
VCCAPLL_1P053 8 OF 13 VSSMPHY_SENSE TPS36
*
*22u/6.3V_6 CS79 PCH_CFL-H_874P *

*22u/6.3V_6 CS83
VCCPRIM_1P8
Without CNVi = Icc = 0mA
When you use external Power to provide 1.24V to CNVi, With CNVi = 582mA
Please connect here Chipset will use this power rail to internal
LDO and output 1.24V for CNVi used.

Please follow below table to check Layout

+3VS5 +3V_DEEP_SUS

B B
RS475 *0_5%_8/S

A A
[9,10,12,13,16,18,93] +3V_DEEP_SUS

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
PCH 6/7 (POWER)
NB5 Date: Wednesday, April 08, 2020 Sheet 14 of 106
5 4 3 2 1
 5 4 3 2 1

15
US1I US1L
A2 AL12 BG3 M24 US1J
D A28 VSS_1 VSS_73 AL17 BG33 VSS_145 VSS_196 M32 Y14 D
A3 VSS_2 VSS_74 AL21 BG37 VSS_146 VSS_197 M34 RSVD#Y14 Y15
A33 VSS_3 VSS_75 AL24 BG4 VSS_147 VSS_198 M49 RSVD#Y15
A37 VSS_4 VSS_76 AL26 BG48 VSS_148 VSS_199 M5 U37
A4 VSS_5 VSS_77 AL29 C12 VSS_149 VSS_200 N12 RSVD#U37 U35
A45 VSS_6 VSS_78 AL33 C25 VSS_150 VSS_201 N16 RSVD#U35
A46 VSS_7 VSS_79 AL38 C30 VSS_151 VSS_202 N34 N32
A47 VSS_8 VSS_80 AM1 C4 VSS_152 VSS_203 N35 RSVD#N32 R32
A48 VSS_9 VSS_81 AM18 C48 VSS_153 VSS_204 N37 RSVD#R32
A5 VSS_10 VSS_82 AM32 C5 VSS_154 VSS_205 N38 AH15
A8 VSS_11 VSS_83 AM49 D12 VSS_155 VSS_206 P26 RSVD#AH15 AH14
AA19 VSS_12 VSS_84 AN12 D16 VSS_156 VSS_207 P29 RSVD#AH14
AA20 VSS_13 VSS_85 AN16 D17 VSS_157 VSS_208 P4
AA25 VSS_14 VSS_86 AN34 D30 VSS_158 VSS_209 P46 10 OF 13 AL2
VSS_15 VSS_87 VSS_159 VSS_210 PREQ# XDP_PREQ# [2]
AA27 AN38 D33 R12 AM5
VSS_16 VSS_88 VSS_160 VSS_211 PRDY# XDP_PRDY# [2]
AA28 AP4 D8 R16 AM4
VSS_17 VSS_89 VSS_161 VSS_212 CPU_TRST# XDP_TRST# [2]
AA30 AP46 E10 R26 AK3 PCH_2_CPU_TRIGGER_RRS259 30_1%_2 PCH_2_CPU_TRIGGER
VSS_18 VSS_90 VSS_162 VSS_213 TRIGGER_OUT CPU_2_PCH_TRIGGER PCH_2_CPU_TRIGGER [8]
AA31 AR12 E13 R29 AK2
AA49 VSS_19 VSS_91 AR16 E15 VSS_163 VSS_214 R3 TRIGGER_IN CPU_2_PCH_TRIGGER [8]
AA5 VSS_20 VSS_92 AR34 E17 VSS_164 VSS_215 R34 PCH_CFL-H_874P
AB19 VSS_21 VSS_93 AR38 E19 VSS_165 VSS_216 R38
AB25 VSS_22 VSS_94 AT1 E22 VSS_166 VSS_217 R4
AB31 VSS_23 VSS_95 AT16 E24 VSS_167 VSS_218 T17
AC12 VSS_24 VSS_96 AT18 E26 VSS_168 VSS_219 T18
AC17 VSS_25 VSS_97 AT21 E31 VSS_169 VSS_220 T32
AC33 VSS_26 VSS_98 AT24 E33 VSS_170 VSS_221 T4
AC38 VSS_27 VSS_99 AT26 E35 VSS_171 VSS_222 T49
AC4 VSS_28 VSS_100 AT29 E40 VSS_172 VSS_223 T5
AC46 VSS_29 VSS_101 AT32 E42 VSS_173 VSS_224 T7
AD1 VSS_30 VSS_102 AT34 E8 VSS_174 VSS_225 U12
C AD19 VSS_31 VSS_103 AT45 F41 VSS_175 VSS_226 U15 C
AD2 VSS_32 VSS_104 AV11 F43 VSS_176 VSS_227 U17
AD22 VSS_33 VSS_105 AV39 F47 VSS_177 VSS_228 U21
AD25 VSS_34 VSS_106 AW 10 G44 VSS_178 VSS_229 U24
AD49 VSS_35 VSS_107 AW 4 G6 VSS_179 VSS_230 U33
AE12 VSS_36 VSS_108 AW 40 H8 VSS_180 VSS_231 U38
AE33 VSS_37 VSS_109 AW 46 J10 VSS_181 VSS_232 V20
AE38 VSS_38 VSS_110 B47 J26 VSS_182 VSS_233 V22
AE4 VSS_39 VSS_111 B48 J29 VSS_183 VSS_234 V4
AE46 VSS_40 VSS_112 B49 J4 VSS_184 VSS_235 V46
AF22 VSS_41 VSS_113 BA12 J40 VSS_185 VSS_236 W 25
AF25 VSS_42 VSS_114 BA14 J46 VSS_186 VSS_237 W 27
AF28 VSS_43 VSS_115 BA44 J47 VSS_187 VSS_238 W 28
AG1 VSS_44 VSS_116 BA5 J48 VSS_188 VSS_239 W 30
AG22 VSS_45 VSS_117 BA6 J9 VSS_189 VSS_240 Y10
AG23 VSS_46 VSS_118 BB41 K11 VSS_190 VSS_241 Y12
AG25 VSS_47 VSS_119 BB43 K39 VSS_191 VSS_242 Y17
AG27 VSS_48 VSS_120 BB9 M16 VSS_192 VSS_243 Y33
AG28 VSS_49 VSS_121 BC10 M18 VSS_193 VSS_244 Y38
AG30 VSS_50 VSS_122 BC13 M21 VSS_194 VSS_245 Y9
AG49 VSS_51 VSS_123 BC15 VSS_195 VSS_246
AH12 VSS_52 VSS_124 BC19 12 OF 13
AH17 VSS_53 VSS_125 BC24 PCH_CFL-H_874P
AH33 VSS_54 VSS_126 BC26
AH38 VSS_55 VSS_127 BC31
AJ19 VSS_56 VSS_128 BC35
AJ20 VSS_57 VSS_129 BC40
AJ25 VSS_58 VSS_130 BC45
AJ27 VSS_59 VSS_131 BC8
AJ28 VSS_60 VSS_132 BD43
B AJ30 VSS_61 VSS_133 BE44 B
AJ31 VSS_62 VSS_134 BF1
AK19 VSS_63 VSS_135 BF2
AK20 VSS_64 VSS_136 BF3
AK25 VSS_65 VSS_137 BF48
AK27 VSS_66 VSS_138 BF49
AK28 VSS_67 VSS_139 BG17
AK30 VSS_68 VSS_140 BG2
AK31 VSS_69 VSS_141 BG22
AK4 VSS_70 VSS_142 BG25
AK46 VSS_71 9 OF 13
VSS_143 BG28
VSS_72 VSS_144
PCH_CFL-H_874P

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
PCH 7/7 (GND)
NB5 Date: Wednesday, April 08, 2020 Sheet 15 of 106
5 4 3 2 1
 5 4 3 2 1

TOP SWAP OVERRIDE STRAP

The signal has a weak internal pull-down.
0 = Disable “Top Swap” mode. (Default)
1 = Enable “Top Swap” mode. This inverts an address
+3V
D D
RS240
TLS CONFIDENTIALITY ENABLED
This signal has a weak internal pull-down.
0 = Disable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (no confidentiality). (Default)
1 = Enable Intel ME Crypto Transport Layer Security
16
(TLS) cipher suite (with confidentiality). Must be
pulled up to support Intel AMT with TLS.
+3V_DEEP_SUS

*150K/F_4

[10,39] ACZ_SPKR ACZ_SPKR

RS241
*4.7K_5%_2

SMLALERT#
[10] SMLALERT#
09/17 RS243 change to 0201
RS243
*20K_1%_2

This signal has a weak internal pull-down.

NO REBOOT IF SAMPLED HIGH 0 = Enable security measures defined in the Flash
The signal has a weak internal pull-down. Descriptor. (Default)
0 = Disable “No Reboot” mode. (Default) 1 = Disable Flash Descriptor Security (override). This
1 = Enable “No Reboot” mode (PCH will disable the strap should only be asserted high using external
TCO Timer system reboot feature). This function is Pull-up in manufacturing/debug environments
ONLY. +3V_DEEP_SUS
useful when running ITP/XDP.
C C

RS133
*1K_5%_2
ACZ_SDOUT
[10] ACZ_SDOUT

RS134
*1K_5%_2

Matt change power source to +VCCPRIM_1P8Af-0731

B B

GPP_J9 1.8V VCCPSPI:

XTAL Frequency Select The signal has a weak internal pull-down
M.2 CNVi Mode Select This signal has a weak internal pull-down. 0 = VCCSPI is connected to 3.3V rail
An external pull-up or pull-down is required. An external pull-up is required on this strap since 38.4 1 = VCCSPI is connected to 1.8V rail
0 = Integrated CNVi enable. +VCCPRIM_1P8A MHz XTAL is not supported on the PCH. +VCCPRIM_1P8A Note: If VCCSPI is connected to 1.8V rail, this pin
1 = Integrated CNVi disable. 0 = 38.4 XTAL frequency selected. (Default) strap must be a ‘1’ for the proper functionality
1 = 24MHz XTAL frequency selected. of the SPI (Flash) I/Os +VCCPRIM_1P8A

RS245 RS246
20K_1%_2 10K_5%_2
RS247
*10K_5%_2
CNV_RGI_DT CNV_BRI_DT
[13,35] CNV_RGI_DT [13,35] CNV_BRI_DT
GPP_J9
RS248 RS249 [13] GPP_J9
*10K_5%_2 *10K_5%_2
RS211
10K_5%_2

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
APS
NB5 Date: Wednesday, April 08, 2020 Sheet 16 of 106
5 4 3 2 1
 5 4 3 2 1

M_A_DQ[63:0] [4]

17
JDIM1001A +1.2VSUS
[4] M_A_A[13:0] M_A_A0 M_A_DQ1 JDIM1001B
144 8
M_A_A1 133 A0 DQ0 7 M_A_DQ0 111
M_A_A2 132 A1 DQ1 20 M_A_DQ3 112 VDD1
M_A_A3 131 A2 DQ2 21 M_A_DQ2 2.48A 117 VDD2
M_A_A4 128 A3 DQ3 4 M_A_DQ4 118 VDD3 255
M_A_A5 126 A4 DQ4 3 M_A_DQ5
0 123 VDD4 VDDSPD +3V
M_A_A6 127 A5 DQ5 16 M_A_DQ7 Reference G3Z schematic 124 VDD5
M_A_A7 122 A6 DQ6 17 M_A_DQ6 129 VDD6 257
M_A_A8 A7 DQ7 M_A_DQ10 VDD7 VPP1 +2.5V_SUS
125 28 130 259
M_A_A9 121 A8 DQ8 29 M_A_DQ11 135 VDD8 VPP2
M_A_A10 146 A9 DQ9 41 M_A_DQ15 136 VDD9
D M_A_A11 120 A10/AP DQ10 42 M_A_DQ13 141 VDD10 258 D
M_A_A12 119 A11 DQ11 24 M_A_DQ14 142 VDD11 VTT DDR_VTT
M_A_A13 158 A12 DQ12 25 M_A_DQ8
1 147 VDD12
151 A13 DQ13 38 M_A_DQ12 148 VDD13
[4] M_A_WE# A14/W E# DQ14 M_A_DQ9 VDD14 +SMDDR_VREF_DQ0
156 37 153 164
[4] M_A_CAS# A15/CAS# DQ15 M_A_DQ21 VDD15 VREFCA
152 50 154
[4] M_A_RAS# A16/RAS# DQ16 VDD16
49 M_A_DQ20 159
TP1082 162 DQ17 62 M_A_DQ22 160 VDD17
TP1068 165 CS2#/C0/NC DQ18 63 M_A_DQ19 163 VDD18
CS3#/C1/NC DQ19 46 M_A_DQ17 VDD19
*PAD
*PAD
DQ20 45 M_A_DQ16
2
114 DQ21 58 M_A_DQ23 1 2

DDR4 SODIMM 260 PIN

[4] M_A_ACT# 143 ACT# DQ22 59 M_A_DQ18 5 VSS1 VSS48 6
R1439 240_1%_2
+1.2VSUS [4] M_A_PARITY 116 PARITY DQ23 70 M_A_DQ29 9 VSS2 VSS49 10
PM_EXTTS#0 [4] M_A_ALERT# 134 ALERT# DQ24 71 M_A_DQ25 15 VSS3 VSS50 14
[13,18] PM_EXTTS#0 EVENT# DQ25 M_A_DQ26 VSS4 VSS51
108 83 19 18
[10,18] DDR4_DRAMRST# RESET# DQ26 VSS5 VSS52
84 M_A_DQ27 23 22
DQ27 66 M_A_DQ28 27 VSS6 VSS53 26 +2.5V_SUS

DDR4 SODIMM 260 PIN

C1817 *0.1U/16V_4
DQ28 67 M_A_DQ24
3 31 VSS7 VSS54 30
DQ29 79 M_A_DQ31 35 VSS8 VSS55 36 C1761 1u/6.3V_2
DQ30 80 M_A_DQ30 39 VSS9 VSS56 40
DQ31 174 M_A_DQ32 43 VSS10 VSS57 44 C1783 1u/6.3V_2
DQ32 173 M_A_DQ36 47 VSS11 VSS58 48
DQ33 187 M_A_DQ35 51 VSS12 VSS59 52 C1703 10U/6.3V_6
DQ34 186 M_A_DQ39 57 VSS13 VSS60 56
DQ35 170 M_A_DQ33 61 VSS14 VSS61 60
DQ36 169 M_A_DQ37
4 65 VSS15 VSS62 64
C1688 10U/6.3V_6
DQ37 183 M_A_DQ34 69 VSS16 VSS63 68

(260P)
DQ38 182 M_A_DQ38 73 VSS17 VSS64 72 +1.2VSUS
DQ39 195 M_A_DQ40 77 VSS18 VSS65 78
C 150 DQ40 194 M_A_DQ44 81 VSS19 VSS66 82 C1825 10U/6.3V_6 C
[4] M_A_BA0 BA0 DQ41 M_A_DQ46 VSS20 VSS67
145 207 85 86
[4] M_A_BA1 BA1 DQ42 M_A_DQ43 VSS21 VSS68
115 208 89 90 C1770 10U/6.3V_6
[4] M_A_BG#0 BG0 DQ43 M_A_DQ45 VSS22 VSS69

(260P)
113 191 5 93 94
[4] M_A_BG#1 BG1 DQ44 M_A_DQ41 VSS23 VSS70
190 99 98 C1768 10U/6.3V_6
+3V 149 DQ45 203 M_A_DQ47 103 VSS24 VSS71 102
[4] M_A_CS#0 CS0# DQ46 M_A_DQ42 VSS25 VSS72
157 204 107 106 C1766 10U/6.3V_6
[4] M_A_CS#1 CS1# DQ47 M_A_DQ49 VSS26 VSS73
109 216 167 168
[4] M_A_CKE0 CKE0 DQ48 VSS27 VSS74
110 215 M_A_DQ54 171 172 C1821 10U/6.3V_6
[4] M_A_CKE1 CKE1 DQ49 M_A_DQ55 VSS28 VSS75
228 175 176
R1394 R1401 R1417 137 DQ50 229 M_A_DQ53 181 VSS29 VSS76 180 C1822 10U/6.3V_6
[4] M_A_CLKP0 CK0 DQ51 M_A_DQ48 VSS30 VSS77
*10K_5%_2 *10K_5%_2 *10K_5%_2 139 211 6 185 184
[4] M_A_CLKN0 CK0# DQ52 M_A_DQ52 VSS31 VSS78
138 212 189 188 C1824 10U/6.3V_6
CHA_SA0 CHA_SA1 CHA_SA2 [4] M_A_CLKP1 CK1 DQ53 M_A_DQ50 VSS32 VSS79
140 224 193 192
[4] M_A_CLKN1 CK1# DQ54 M_A_DQ51 VSS33 VSS80
225 197 196 C1777 10U/6.3V_6
155 DQ55 237 M_A_DQ61 201 VSS34 VSS81 202
[4] M_A_DIM0_ODT0 ODT0 DQ56 M_A_DQ63 VSS35 VSS82
R1397 R1406 R1440 161 236 205 206 C1812 1u/6.3V_2
[4] M_A_DIM0_ODT1 ODT1 DQ57 M_A_DQ59 VSS36 VSS83
10K_5%_2 10K_5%_2 10K_5%_2 249 209 210
253 DQ58 250 M_A_DQ62 213 VSS37 VSS84 214 C1772 1u/6.3V_2
[10,18,38] SMB_RUN_CLK SCL DQ59 M_A_DQ56 VSS38 VSS85
254 232 7 217 218
[10,18,38] SMB_RUN_DAT SDA DQ60 233 M_A_DQ57 +1.2VSUS 223 VSS39 VSS86 222 C1773 1u/6.3V_2
CHA_SA0 256 DQ61 245 M_A_DQ60 227 VSS40 VSS87 226
CHA_SA1 260 SA0 DQ62 246 M_A_DQ58 231 VSS41 VSS88 230 C1776 1u/6.3V_2
+1.2VSUS CHA_SA2 166 SA1 DQ63 235 VSS42 VSS89 234
SA2 M_A_DQSP0 M_A_DQSP[7:0] [4] VSS43 VSS90
EZIW 13 239 238 C1819 1u/6.3V_2
R1436 *240_1%_2 M_A_CB0 92 DQS0 34 M_A_DQSP1 R1376 243 VSS44 VSS91 244
R1374 *240_1%_2 M_A_CB1 91 CB0/NC DQS1 55 M_A_DQSP2 240_1%_2 247 VSS45 VSS92 248 C1807 1u/6.3V_2
R1377 *240_1%_2 M_A_CB2 101 CB1/NC DQS2 76 M_A_DQSP3 251 VSS46 VSS93 252
R1378 *240_1%_2 M_A_CB3 105 CB2/NC DQS3 179 M_A_DQSP4 M_A_DQSP8 VSS47 VSS94 C1760 1u/6.3V_2
Place these Caps near So-Dimm0. R1435 *240_1%_2 M_A_CB4 88 CB3/NC DQS4 200 M_A_DQSP5
B R1373 *240_1%_2 M_A_CB5 87 CB4/NC DQS5 221 M_A_DQSP6 B
CB5/NC DQS6 263
R1437 *240_1%_2 M_A_CB6 100 242 M_A_DQSP7 263 261
+SMDDR_VREF_DQ0 R1438 *240_1%_2 M_A_CB7 104 CB6/NC DQS7 97 M_A_DQSP8 264 GND#1 262
CB7/NC DQS8 +1.2VSUS GND#2
M_A_DQSN[7:0] [4] 264
C1820 *0.1U/16V_4 12 11 M_A_DQSN0
+1.2VSUS 33 DM0_n/DBI0_n DQS#0 32 M_A_DQSN1
DM1_n/DBI1_n DQS#1 D4AR0-26010-1P40
C1805 *2.2U/10V_4 54 53 M_A_DQSN2
75 DM2_n/DBI2_n DQS#2 74 M_A_DQSN3
178 DM3_n/DBI3_n DQS#3 177 M_A_DQSN4 DDR_VTT
+3V 199 DM4_n/DBI4_n DQS#4 198 M_A_DQSN5 R1375
220 DM5_n/DBI5_n DQS#5 219 M_A_DQSN6 240_1%_2 +1.2VSUS C1798 1u/6.3V_2
C1787 0.1U/16V_4 241 DM6_n/DBI6_n DQS#6 240 M_A_DQSN7 M_A_DQSN8
96 DM7_n/DBI7_n DQS#7 95 M_A_DQSN8 C1748 1u/6.3V_2
C1788 2.2U/10V_4 DBI8# DQS#8 C10514 1u/6.3V_2
D4AR0-26010-1P40 C10515 1u/6.3V_2 C1738 1u/6.3V_2
C10516 1u/6.3V_2
C10517 1u/6.3V_2 C1794 1u/6.3V_2
C10518 1u/6.3V_2
C10519 1u/6.3V_2 C1778 10U/6.3V_6
C10520 1u/6.3V_2
C10521 1u/6.3V_2 C1767 10U/6.3V_6
C10522 1u/6.3V_2
C10523 1u/6.3V_2
C10524 1u/6.3V_2
+1.2VSUS C10525 1u/6.3V_2
C10526 1u/6.3V_2 Place these Caps near So-Dimm0.

R1408
1K_5%_2 +1.2VSUS [2,6,10,18,51,87,93,95]
A A
+3V [9,10,11,13,16,18,21,28,30,31,33,34,36,38,39,41,42,48,50,51,52,82,88,91,95,98,99,101,105]
+SMDDR_VREF_DQ0 +2.5V_SUS [18,87]
[4] SM_VREF R1415 2/F_6
DDR_VTT [18,87]

R1407
C1808 1K_5%_2
0.022U/25V_4 PROJECT : G3BE
R1421 24.9_1%_2 Quanta Computer Inc.
Size Document Number Rev
Custom 1A
DDR4 DIMM0-RVS(4.0H)
NB5 Date: Wednesday, April 08, 2020 Sheet 17 of 106
5 4 3 2 1
 5 4 3 2 1

JDIM1000A M_B_DQ[63:0] [4]

[4] M_B_A[13:0] M_B_A0 M_B_DQ0
144 8 +1.2VSUS

18
M_B_A1 133 A0 DQ0 7 M_B_DQ5 JDIM1000B
M_B_A2 132 A1 DQ1 20 M_B_DQ6 111
M_B_A3 131 A2 DQ2 21 M_B_DQ3 2.48A 112 VDD1
M_B_A4 128 A3 DQ3 4 M_B_DQ1 117 VDD2
M_B_A5 126 A4 DQ4 3 M_B_DQ4
0 118 VDD3 255
Reference G3Z schematic M_B_A6 127 A5 DQ5 16 M_B_DQ7 123 VDD4 VDDSPD +3V
M_B_A7 122 A6 DQ6 17 M_B_DQ2 124 VDD5
M_B_A8 125 A7 DQ7 28 M_B_DQ10 129 VDD6 257
M_B_A9 A8 DQ8 M_B_DQ9 VDD7 VPP1 +2.5V_SUS
121 29 130 259
M_B_A10 146 A9 DQ9 41 M_B_DQ13 135 VDD8 VPP2
M_B_A11 120 A10/AP DQ10 42 M_B_DQ11 136 VDD9
D M_B_A12 119 A11 DQ11 24 M_B_DQ14 1 141 VDD10 258
+1.2VSUS
D
M_B_A13 A12 DQ12 M_B_DQ8 VDD11 VTT DDR_VTT
158 25 142
151 A13 DQ13 38 M_B_DQ15 147 VDD12 C1684 1u/6.3V_2
[4] M_B_WE# A14/W E# DQ14 VDD13
156 37 M_B_DQ12 148
[4] M_B_CAS# A15/CAS# DQ15 M_B_DQ17 VDD14 +SMDDR_VREF_DQ1
152 50 153 164 C1754 1u/6.3V_2
[4] M_B_RAS# A16/RAS# DQ16 M_B_DQ22 VDD15 VREFCA
49 154
TP1062 162 DQ17 62 M_B_DQ23 159 VDD16 C1792 1u/6.3V_2
TP1047 165 CS2#/C0/NC DQ18 63 M_B_DQ21 160 VDD17
CS3#/C1/NC DQ19 46 M_B_DQ18 163 VDD18
*PAD
*PAD
DQ20 45 M_B_DQ16
2 VDD19
C1699 1u/6.3V_2

114 DQ21 58 M_B_DQ19 C1685 1u/6.3V_2

[4] M_B_ACT# ACT# DQ22 M_B_DQ20
143 59 1 2

DDR4 SODIMM 260 PIN

[4] M_B_PARITY 116 PARITY DQ23 70 M_B_DQ25 5 VSS1 VSS48 6 C1753 1u/6.3V_2
[4] M_B_ALERT# PM_EXTTS#0 134 ALERT# DQ24 71 M_B_DQ30 9 VSS2 VSS49 10
[13,17] PM_EXTTS#0 EVENT# DQ25 M_B_DQ26 VSS3 VSS50
108 83 15 14 C1755 1u/6.3V_2
[10,17] DDR4_DRAMRST# RESET# DQ26 M_B_DQ24 VSS4 VSS51
84 19 18
DQ27 66 M_B_DQ27 23 VSS5 VSS52 22

DDR4 SODIMM 260 PIN

C1741 *0.1U/16V_4
DQ28 67 M_B_DQ28
3 27 VSS6 VSS53 26
C1759 1u/6.3V_2
DQ29 79 M_B_DQ31 31 VSS7 VSS54 30 C1686 10U/6.3V_6
DQ30 80 M_B_DQ29 35 VSS8 VSS55 36 C1692 10U/6.3V_6
DQ31 174 M_B_DQ39 39 VSS9 VSS56 40
DQ32 173 M_B_DQ34 43 VSS10 VSS57 44 C1742 10U/6.3V_6
DQ33 187 M_B_DQ32 47 VSS11 VSS58 48 C1712 10U/6.3V_6
DQ34 186 M_B_DQ33 51 VSS12 VSS59 52
DQ35 170 M_B_DQ38 57 VSS13 VSS60 56
DQ36 169 M_B_DQ35 4 61 VSS14 VSS61 60 +SMDDR_VREF_DQ1
C1693
C1726
10U/6.3V_6
10U/6.3V_6
DQ37 183 M_B_DQ36 65 VSS15 VSS62 64
DQ38 182 M_B_DQ37 69 VSS16 VSS63 68

(260P)
C1746 *0.1U/16V_4 C1757 10U/6.3V_6
DQ39 195 M_B_DQ45 73 VSS17 VSS64 72 C1758 10U/6.3V_6
150 DQ40 194 M_B_DQ41 77 VSS18 VSS65 78 C1722 *2.2U/10V_4
[4] M_B_BA0 BA0 DQ41 M_B_DQ47 VSS19 VSS66
C 145 207 81 82 C
[4] M_B_BA1 BA1 DQ42 M_B_DQ42 VSS20 VSS67
115 208 85 86
[4] M_B_BG#0 BG0 DQ43 M_B_DQ44 VSS21 VSS68 DDR_VTT

(260P)
113 191 5 89 90
[4] M_B_BG#1 BG1 DQ44 M_B_DQ40 VSS22 VSS69
190 93 94
149 DQ45 203 M_B_DQ46 99 VSS23 VSS70 98
[4] M_B_CS#0 CS0# DQ46 M_B_DQ43 VSS24 VSS71
157 204 103 102 C1743 1u/6.3V_2
+3V [4] M_B_CS#1 CS1# DQ47 M_B_DQ54 VSS25 VSS72
109 216 107 106
[4] M_B_CKE0 CKE0 DQ48 M_B_DQ48 VSS26 VSS73
110 215 167 168 C1744 1u/6.3V_2
[4] M_B_CKE1 CKE1 DQ49 VSS27 VSS74
228 M_B_DQ53 171 172
137 DQ50 229 M_B_DQ50 175 VSS28 VSS75 176 C1786 1u/6.3V_2
[4] M_B_CLKP0 CK0 DQ51 M_B_DQ52 VSS29 VSS76
139 211 6 181 180
[4] M_B_CLKN0 CK0# DQ52 M_B_DQ51 VSS30 VSS77 +2.5V_SUS
138 212 185 184 C1803 1u/6.3V_2
[4] M_B_CLKP1 CK1 DQ53 M_B_DQ49 VSS31 VSS78
R1288 R1307 R1324 140 224 189 188
[4] M_B_CLKN1 CK1# DQ54 M_B_DQ55 VSS32 VSS79
*10K_5%_2 10K_5%_2 *10K_5%_2 225 193 192 C1674 1u/6.3V_2 C1747 10U/6.3V_6
155 DQ55 237 M_B_DQ59 197 VSS33 VSS80 196
CHB_SA0 CHB_SA1 CHB_SA2 [4] M_B_DIM0_ODT0 ODT0 DQ56 M_B_DQ60 VSS34 VSS81
161 236 201 202 C1687 1u/6.3V_2 C1756 10U/6.3V_6
[4] M_B_DIM0_ODT1 ODT1 DQ57 M_B_DQ57 VSS35 VSS82
249 205 206
253 DQ58 250 M_B_DQ58 209 VSS36 VSS83 210 C1765 10U/6.3V_6
[10,17,38] SMB_RUN_CLK SCL DQ59 M_B_DQ56 VSS37 VSS84
R1282 R1308 R1349 254 232 7 213 214
[10,17,38] SMB_RUN_DAT SDA DQ60 M_B_DQ62 VSS38 VSS85
10K_5%_2 *10K_5%_2 10K_5%_2 233 217 218 C1781 10U/6.3V_6
CHB_SA0 256 DQ61 245 M_B_DQ61 223 VSS39 VSS86 222
CHB_SA1 260 SA0 DQ62 246 M_B_DQ63 227 VSS40 VSS87 226 +3V
+1.2VSUS CHB_SA2 166 SA1 DQ63 +1.2VSUS 231 VSS41 VSS88 230
SA2 13 M_B_DQSP0 M_B_DQSP[7:0] [4] 235 VSS42 VSS89 234 C1709 0.1U/16V_4
R1346 *240_1%_2 M_B_CB0 92 DQS0 34 M_B_DQSP1 239 VSS43 VSS90 238
R1358 *240_1%_2 M_B_CB1 91 CB0/NC DQS1 55 M_B_DQSP2 243 VSS44 VSS91 244 C1700 2.2U/10V_4
R1359 *240_1%_2 M_B_CB2 101 CB1/NC DQS2 76 M_B_DQSP3 247 VSS45 VSS92 248
R1325 *240_1%_2 M_B_CB3 105 CB2/NC DQS3 179 M_B_DQSP4 R1357 251 VSS46 VSS93 252
R1350 *240_1%_2 M_B_CB4 88 CB3/NC DQS4 200 M_B_DQSP5 VSS47 VSS94
CB4/NC DQS5 240_1%_2
R1351 *240_1%_2 M_B_CB5 87 221 M_B_DQSP6
B R1347 *240_1%_2 M_B_CB6 100 CB5/NC DQS6 242 M_B_DQSP7 M_B_DQSP8 B
R1348 *240_1%_2 M_B_CB7 104 CB6/NC
CB7/NC
DQS7
DQS8
97 M_B_DQSP8 263
263
GND#1
261 Place these Caps near So-Dimm1.
+1.2VSUS 264 262
M_B_DQSN0 M_B_DQSN[7:0] [4] GND#2
12 11
+1.2VSUS 33 DM0_n/DBI0_n
DM1_n/DBI1_n
DQS#0
DQS#1
32 M_B_DQSN1
264 1uF/10uF 4pcs on each side of connector
54 53 M_B_DQSN2
DM2_n/DBI2_n DQS#2 D4AS0-26010-1P40 +1.2VSUS
75 74 M_B_DQSN3
178 DM3_n/DBI3_n DQS#3 177 M_B_DQSN4 R1361
199 DM4_n/DBI4_n DQS#4 198 M_B_DQSN5 240_1%_2
VREF DQ1 M1 Solution
220 DM5_n/DBI5_n DQS#5 219 M_B_DQSN6
241 DM6_n/DBI6_n DQS#6 240 M_B_DQSN7 M_B_DQSN8 R1316
96 DM7_n/DBI7_n DQS#7 95 M_B_DQSN8
DBI8# DQS#8 1K_5%_2

D4AS0-26010-1P40
SMDDR_VREF_DQ1_M3 R1322 2/F_6 +SMDDR_VREF_DQ1
[4] SMDDR_VREF_DQ1_M3

C1728 R1317
+1.2VSUS 0.022U/25V_4 1K_5%_2
+3V_DEEP_SUS

R1332
24.9_1%_2

R327 R328 R329

*47K_1%_2 *47K_1%_2 *47K_1%_2
+3V [9,10,11,13,16,17,21,28,30,31,33,34,36,38,39,41,42,48,50,51,52,82,88,91,95,98,99,101,105]
+1.2VSUS [2,6,10,17,51,87,93,95]
2

A +3V_DEEP_SUS [9,10,12,13,14,16,93] A
+2.5V_SUS [17,87]
DDR_VTT [17,87]
1 3 DDR_VTT_PG_CTRL R331 *0_5%_2
[2] DDR_VTT_CNTL DDR_VTT_PG_CTRL_R [87]

Q8
*DRC5144E0L PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
DDR4 DIMM1-STD(4.0H)
NB5 Date: Wednesday, April 08, 2020 Sheet 18 of 106
5 4 3 2 1
 5 4 3 2 1

PEX_VDD

DG:1.8V 1.0V

Jason changen QG1 FP 1012

1V8_AON

JS-N18-0705 Del
WAKE is not required for NB design
UG1A

1/17 PCI_EXPRESS
Under GPU
N17P:1u x 4pcs
N18P:1u x 6pcs,4.7u x 3pcs
4.7U/6.3V_4 CG3
Near GPU
N17P:4.7u x 2pcs,10u x 1pcs,22u x 1pcs
N18P:10u x 3pcs,22u x 2pcs
[21,22,23,24,25,98,101,105]
[21,105]
[20,21,22,30,105]
[20,22,23,24,25,101]
1V8_AON
PEX_VDD
1V8_MAIN
FBVDDQ_MEM 19
RG1 AJ11 PEX_WAKE 4.7U/6.3V_4 CG4 22U/6.3VS_6 CG5
[21,22] DGPU_PWROK
10K_5%_2 PEX_DVDD AG21 4.7U/6.3V_4 CG6 22U/6.3VS_6 CG7

2
PEGX_RST# AJ12 PEX_RST PEX_DVDD AG22
PEX_DVDD AG24 10U/6.3V_4 CG8
3 1 AK12 PEX_CLKREQ PEX_DVDD AH25 1U/6.3V_2 CG9 10U/6.3V_4 CG1
[11] PCIE_CLKREQ_VGA#
PEX_CVDD AG19 1U/6.3V_2 CG10 10U/6.3V_4 CG11
PJA138K [11] AL13 PEX_REFCLK PEX_CVDD AH21 1U/6.3V_2 CG12
D CLK_VGA_P D
QG1 AK13 PEX_REFCLK 1U/6.3V_2 CG13
[11] CLK_VGA_N
1U/6.3V_2 CG14
0.22u/6.3V_2 CG2 PEG_RXP0_C AK14 1U/6.3V_2 CG15
[3]
[3]
PEG_RXP0
PEG_RXN0 0.22u/6.3V_2 CG16 PEG_RXN0_C AJ14
PEX_TX0
PEX_TX0
1.8V
1V8_MAIN
AN12 PEX_RX0
[3] PEG_TXP0
[3] PEG_TXN0
AM12 PEX_RX0 PEX_HVDD AG13
AG15
0.22u/6.3V_2 CG17 PEG_RXP1_C AH14 PEX_TX1
PEX_HVDD
PEX_HVDD AG16 Near GPU
[3] PEG_RXP1 PEG_RXN1_C
0.22u/6.3V_2 CG18 AG14 PEX_TX1 PEX_HVDD AG18
[3] PEG_RXN1
PEX_HVDD AG25 N17P:1u x 4pcs N17P:4.7u x 2pcs,10u x 2pcs,22u x 1pcs
AN14 AH15
[3] PEG_TXP1
AM14
PEX_RX1 PEX_HVDD
AH18
N18P:1u x 7pcs,4.7u x 3pcs N18P:10u x 3pcs,22u x 2pcs
[3] PEG_TXN1 PEX_RX1 PEX_HVDD
PEX_HVDD AH26 4.7U/6.3V_4 CG19
0.22u/6.3V_2 CG20 PEG_RXP2_C AK15 PEX_TX2 PEX_HVDD AH27 4.7U/6.3V_4 CG21 22U/6.3VS_6 CG22
[3] PEG_RXP2 PEG_RXN2_C
0.22u/6.3V_2 CG23 AJ15 PEX_TX2 PEX_HVDD AJ27 4.7U/6.3V_4 CG24 22U/6.3VS_6 CG25
[3] PEG_RXN2
PEX_HVDD AK27
AP14 AL27 10U/6.3V_4 CG26
[3] PEG_TXP2
AP15
PEX_RX2
PEX_RX2
PEX_HVDD
PEX_HVDD AM28 1U/6.3V_2 CG27
Under GPU 10U/6.3V_4 CG28
[3] PEG_TXN2
PEX_HVDD AN28 1U/6.3V_2 CG29 10U/6.3V_4 CG30
0.22u/6.3V_2 CG31 PEG_RXP3_C AL16 PEX_TX3 1U/6.3V_2 CG32
[3] PEG_RXP3 PEG_RXN3_C
0.22u/6.3V_2 CG33 AK16 PEX_TX3 1U/6.3V_2 CG34
[3] PEG_RXN3
1U/6.3V_2 CG35
AN15 PEX_RX3 1U/6.3V_2 CG36
[3] PEG_TXP3
[3] PEG_TXN3
AM15 PEX_RX3 1U/6.3V_2 CG37

0.22u/6.3V_2 CG38 PEG_RXP4_C AK17 PEX_TX4

[3] PEG_RXP4 PEG_RXN4_C
[3] PEG_RXN4 0.22u/6.3V_2 CG39 AJ17 PEX_TX4

AN17 PEX_RX4
[3] PEG_TXP4
AM17
[3] PEG_TXN4 PEX_RX4
1.8V
0.22u/6.3V_2 CG40 PEG_RXP5_C AH17 PEX_TX5
1V8_MAIN
[3] PEG_RXP5 PEG_RXN5_C
0.22u/6.3V_2 CG41 AG17 PEX_TX5
[3] PEG_RXN5 PEX_PLL_HVDD*0_5%_2/S
PEX_PLL_HVDD AH12 RG2
AP17 PEX_RX5
[3] PEG_TXP5
AP18 PEX_RX5 12/05 RG2 change to short pad
C [3] PEG_TXN5 C

0.22u/6.3V_2 CG42 PEG_RXP6_C AK18 CG43

[3] PEG_RXP6
0.22u/6.3V_2 CG44 PEG_RXN6_C AJ18
PEX_TX6
PEX_TX6 1U/6.3V_2
N17P: 0.1u x 1pcs
[3] PEG_RXN6
N18P: 1u x 1pcs
[3] PEG_TXP6
AN18 PEX_RX6
[3] PEG_TXN6 AM18 PEX_RX6

0.22u/6.3V_2 CG45 PEG_RXP7_C AL19 PEX_TX7

[3] PEG_RXP7 PEG_RXN7_C
0.22u/6.3V_2 CG46 AK19 PEX_TX7
[3] PEG_RXN7

[3] PEG_TXP7 AN20 PEX_RX7

AM20 PEX_RX7
[3] PEG_TXN7
AK20 PEX_TX8
AJ20 PEX_TX8

AP20 PEX_RX8
AP21 PEX_RX8

AH20 PEX_TX9
AG20 PEX_TX9

AN21 PEX_RX9
AM21 PEX_RX9

AK21 PEX_TX10
AJ21 PEX_TX10

AN23 PEX_RX10
AM23 PEX_RX10

AL22 PEX_TX11
AK22 PEX_TX11

AP23 PEX_RX11
AP24 PEX_RX11
B B
AK23 PEX_TX12
AJ23 PEX_TX12

AN24 PEX_RX12
AM24 PEX_RX12

AH23 PEX_TX13
AG23 PEX_TX13

AN26 PEX_RX13
AM26 PEX_RX13

AK24 PEX_TX14
AJ24 PEX_TX14

AP26 PEX_RX14
AP27 PEX_RX14

AL25 PEX_TX15
AK25 PEX_TX15

AN27 PEX_RX15 PEX_TERMP AP29

PEX_TERMP RG3 2.49K_1%_2
AM27 PEX_RX15

N18P/GB4D-128_960P

GPU RST# 02/18 RG244 change to short pad

1V8_AON
RG244 *0_5%_2/S
+1.8V_DEEP_SUS
A RG243 *0_5%_2 Jason Add RG243 1115 A

CG47 0.1U/16V_4
UG2
5

NL17SZ08DFT2G
[9] DGPU_HOLD_RST# 1
4 PEGX_RST#
PEGX_RST# [21,22]
2
[12,33,34,35,36,38,48] PLTRST#
PROJECT : G3BE
3

RG5
100K_5%_2 Quanta Computer Inc.
Size Document Number Rev
Custom 1A
N18P-G62-1/7 (PCIE)
NB5 Date: Wednesday, April 08, 2020 Sheet 19 of 106
5 4 3 2 1
 5 4 3 2 1

Reference X3BA schematic

[19,21,22,30,105]
[22,23,24,25,101]
1V8_MAIN
FBVDDQ_MEM

20
UG1B UG1C
2/17 FBA 3/17 FBB
D D
VMA_DQ[63:0]
[24] VMA_DQ[63:0] [25] VMB_DQ[63:0]

VMA_DQ0 L28 FBA_D0

VMB_DQ0 G9 FBB_D0
VMA_DQ1 M29 VMB_DQ1 E9
VMA_DQ2 L29
FBA_D1
0.4A VMB_DQ2 G8
FBB_D1

VMA_DQ3
VMA_DQ4
M28
N31
FBA_D2
FBA_D3
FBA_D4
1.8V Under GPU VMB_DQ3
VMB_DQ4
F9
F11
FBB_D2
FBB_D3
FBB_D4
VMA_DQ5 P29 FBA_D5 FB_REFPLL_AVDD K27 FBA_PLL_AVDD VMB_DQ5 G11 FBB_D5
VMA_DQ6 R29 FBA_D6 VMB_DQ6 F12 FBB_D6
VMA_DQ7 P28 FBA_D7
VMB_DQ7 G12 FBB_D7
VMA_DQ8 J28 FBA_D8 C214 VMB_DQ8 G6 FBB_D8
VMA_DQ9 H29 FBA_D9 1u/6.3V_2 VMB_DQ9 F5 FBB_D9
VMA_DQ10 J29 FBA_D10
VMB_DQ10 E6 FBB_D10
VMA_DQ11 H28 FBA_D11 VMB_DQ11 F6 FBB_D11
VMA_DQ12 G29 FBA_D12 VMB_DQ12 F4 FBB_D12
VMA_DQ13 E31 FBA_D13
VMB_DQ13 G4 FBB_D13
VMA_DQ14 E32 FBA_D14 VMB_DQ14 E2 FBB_D14
VMA_DQ15 F30 FBA_D15
VMB_DQ15 F3 FBB_D15
VMA_DQ16 C34 FBA_D16 VMB_DQ16 C2 FBB_D16
VMA_DQ17 D32 FBA_D17
VMB_DQ17 D4 FBB_D17
VMA_DQ18 B33 FBA_D18
VMB_DQ18 D3 FBB_D18
VMA_DQ19 C33 FBA_D19
VMB_DQ19 C1 FBB_D19
VMA_DQ20 F33 FBA_D20 VMB_DQ20 B3 FBB_D20
VMA_DQ21 F32 FBA_D21 VMB_DQ21 C4 FBB_D21
VMA_DQ22 H33 FBA_D22 VMB_DQ22 B5 FBB_D22
VMA_DQ23 H32 FBA_D23
VMB_DQ23 C5 FBB_D23
VMA_DQ24 P34 FBA_D24 VMB_DQ24 A11 FBB_D24
VMA_DQ25 P32 FBA_D25 VMB_DQ25 C11 FBB_D25
VMA_DQ26 P31 FBA_D26
VMB_DQ26 D11 FBB_D26
VMA_DQ27 P33 FBA_D27
VMB_DQ27 B11 FBB_D27
VMA_DQ28 L31 FBA_D28
VMB_DQ28 D8 FBB_D28
VMA_DQ29 L34 FBA_D29 VMB_DQ29 A8 FBB_D29
VMA_DQ30 L32 FBA_D30 VMB_DQ30 C8 FBB_D30
VMA_DQ31 L33 FBA_D31
VMB_DQ31 B8 FBB_D31
VMA_DQ32 AG28 FBA_D32 VMB_DQ32 F24 FBB_D32
C VMA_DQ33 AF29 FBA_D33 FBA_CMD0 U30 FBA_CMD0 VMB_DQ33 G23 FBB_D33 FBB_CMD0 D13 FBB_CMD0 C
VMA_DQ34 FBA_CMD1 FBA_CMD[33:0] [24] VMB_DQ34 FBB_CMD1 FBB_CMD[33:0] [25]
AG29 FBA_D34 FBA_CMD1 T31 E24 FBB_D34 FBB_CMD1 E14
VMA_DQ35 AF28 FBA_D35 FBA_CMD2 U29 FBA_CMD2 VMB_DQ35 G24 FBB_D35 FBB_CMD2 F14 FBB_CMD2
VMA_DQ36 AD30 FBA_D36 FBA_CMD3 R34 FBA_CMD3 VMB_DQ36 D21 FBB_D36 FBB_CMD3 A12 FBB_CMD3
VMA_DQ37 AD29 FBA_D37 FBA_CMD4 R33 FBA_CMD4 VMB_DQ37 E21 FBB_D37 FBB_CMD4 B12 FBB_CMD4
VMA_DQ38 AC29 FBA_D38 FBA_CMD5 U32 FBA_CMD5 VMB_DQ38 G21 FBB_D38 FBB_CMD5 C14 FBB_CMD5
VMA_DQ39 AD28 FBA_D39 FBA_CMD6 U33 FBA_CMD6 VMB_DQ39 F21 FBB_D39 FBB_CMD6 B14 FBB_CMD6
VMA_DQ40 AJ29 FBA_D40 FBA_CMD7 U28 FBA_CMD7 VMB_DQ40 G27 FBB_D40 FBB_CMD7 G15 FBB_CMD7
VMA_DQ41 AK29 FBA_D41 FBA_CMD8 V28 FBA_CMD8 VMB_DQ41 D27 FBB_D41 FBB_CMD8 F15 FBB_CMD8
VMA_DQ42 AJ30 FBA_D42 FBA_CMD9 V29 FBA_CMD9 VMB_DQ42 G26 FBB_D42 FBB_CMD9 E15 FBB_CMD9
VMA_DQ43 AK28 FBA_D43 FBA_CMD10 V30 FBA_CMD10 VMB_DQ43 E27 FBB_D43 FBB_CMD10 D15 FBB_CMD10
VMA_DQ44 AM29 FBA_D44 FBA_CMD11 U34 FBA_CMD11 VMB_DQ44 E29 FBB_D44 FBB_CMD11 A14 FBB_CMD11
VMA_DQ45 AM31 FBA_D45 FBA_CMD12 U31 FBA_CMD12 VMB_DQ45 F29 FBB_D45 FBB_CMD12 D14 FBB_CMD12
VMA_DQ46 AN29 FBA_D46 FBA_CMD13 V34 FBA_CMD13 VMB_DQ46 E30 FBB_D46 FBB_CMD13 A15 FBB_CMD13
VMA_DQ47 AM30 FBA_D47 FBA_CMD14 V33 FBA_CMD14 VMB_DQ47 D30 FBB_D47 FBB_CMD14 B15 FBB_CMD14
VMA_DQ48 AN31 FBA_D48 FBA_CMD15 Y32 FBA_CMD15 VMB_DQ48 A32 FBB_D48 FBB_CMD15 C17 FBB_CMD15
VMA_DQ49 AN32 FBA_D49 FBA_CMD16 AA31 FBA_CMD16 VMB_DQ49 C31 FBB_D49 FBB_CMD16 D18 FBB_CMD16
VMA_DQ50 AP30 FBA_D50 FBA_CMD17 AA29 FBA_CMD17 VMB_DQ50 C32 FBB_D50 FBB_CMD17 E18 FBB_CMD17
VMA_DQ51 AP32 FBA_D51 FBA_CMD18 AA28 FBA_CMD18 VMB_DQ51 B32 FBB_D51 FBB_CMD18 F18 FBB_CMD18
VMA_DQ52 AM33 FBA_D52 FBA_CMD19 AC34 FBA_CMD19 VMB_DQ52 D29 FBB_D52 FBB_CMD19 A20 FBB_CMD19
VMA_DQ53 AL31 FBA_D53 FBA_CMD20 AC33 FBA_CMD20 VMB_DQ53 A29 FBB_D53 FBB_CMD20 B20 FBB_CMD20
VMA_DQ54 AK33 FBA_D54 FBA_CMD21 AA32 FBA_CMD21 VMB_DQ54 C29 FBB_D54 FBB_CMD21 C18 FBB_CMD21
VMA_DQ55 AK32 FBA_D55 FBA_CMD22 AA33 FBA_CMD22 VMB_DQ55 B29 FBB_D55 FBB_CMD22 B18 FBB_CMD22
VMA_DQ56 AD34 FBA_D56 FBA_CMD23 Y28 FBA_CMD23 VMB_DQ56 B21 FBB_D56 FBB_CMD23 G18 FBB_CMD23
VMA_DQ57 AD32 FBA_D57 FBA_CMD24 Y29 FBA_CMD24 VMB_DQ57 C23 FBB_D57 FBB_CMD24 G17 FBB_CMD24
VMA_DQ58 AC30 FBA_D58 FBA_CMD25 W31 FBA_CMD25 VMB_DQ58 A21 FBB_D58 FBB_CMD25 F17 FBB_CMD25
VMA_DQ59 AD33 FBA_D59 FBA_CMD26 Y30 FBA_CMD26 VMB_DQ59 C21 FBB_D59 FBB_CMD26 D16 FBB_CMD26
VMA_DQ60 AF31 FBA_D60 FBA_CMD27 AA34 FBA_CMD27 VMB_DQ60 B24 FBB_D60 FBB_CMD27 A18 FBB_CMD27
VMA_DQ61 AG34 FBA_D61 FBA_CMD28 Y31 FBA_CMD28 VMB_DQ61 C24 FBB_D61 FBB_CMD28 D17 FBB_CMD28
VMA_DQ62 AG32 FBA_D62 FBA_CMD29 Y34 FBA_CMD29 VMB_DQ62 B26 FBB_D62 FBB_CMD29 A17 FBB_CMD29
VMA_DQ63 AG33 FBA_D63 FBA_CMD30 Y33 FBA_CMD30 VMB_DQ63 C26 FBB_D63 FBB_CMD30 B17 FBB_CMD30
FBA_CMD31 V31 FBA_CMD31 FBB_CMD31 E17 FBB_CMD31
FBA_CMD32 R28 FBA_CMD32 FBB_CMD32 G14 FBB_CMD32
FBA_DBI0 P30 FBA_DQM0 FBA_CMD33 AC28 FBA_CMD33 FBB_DBI0 E11 FBB_DQM0 FBB_CMD33 G20 FBB_CMD33
[24] FBA_DBI[7:0] FBA_DBI1 F31 R32 FBA_DEBUG0 [25] FBB_DBI[7:0] FBB_DBI1 E3 C12 FBB_DEBUG0
FBA_DQM1 FBA_CMD34 FBB_DQM1 FBB_CMD34 TP12
FBA_DBI2 F34 FBA_DQM2 FBA_CMD35 AC32 FBA_DEBUG1 TP71 FBB_DBI2 A3 FBB_DQM2 FBB_CMD35 C20 FBB_DEBUG1 TP8
FBA_DBI3 M32 FBA_DQM3 TP19 FBB_DBI3 C9 FBB_DQM3
FBA_DBI4 AD31 FBA_DQM4 FBB_DBI4 F23 FBB_DQM4
B FBA_DBI5 AL29 FBB_DBI5 F27 B
FBA_DQM5 FBB_DQM5
FBA_DBI6 AM32 FBA_DQM6 FBB_DBI6 C30 FBB_DQM6
FBA_DBI7 AF34 FBA_DQM7
FBB_DBI7 A24 FBB_DQM7

FBA_EDC0 M31 FBA_DQS_WP0 FBB_EDC0 D10 FBB_DQS_WP0

[24] FBA_EDC[7:0] FBA_EDC1 G31 [25] FBB_EDC[7:0] FBB_EDC1 D5
FBA_DQS_WP1 FBB_DQS_WP1
FBA_EDC2 E33 FBA_DQS_WP2 FBA_CLK0 R30 FBB_EDC2 C3 FBB_DQS_WP2 FBB_CLK0 D12
FBA_EDC3 VMA_CLK0 [24] FBB_EDC3 VMB_CLK0 [25]
M33 FBA_DQS_WP3 FBA_CLK0 R31 B9 FBB_DQS_WP3 FBB_CLK0 E12
FBA_EDC4 VMA_CLK0# [24] FBB_EDC4 VMB_CLK0# [25]
AE31 FBA_DQS_WP4 FBA_CLK1 AB31 E23 FBB_DQS_WP4 FBB_CLK1 E20
FBA_EDC5 VMA_CLK1 [24] FBB_EDC5 VMB_CLK1 [25]
AK30 FBA_DQS_WP5 FBA_CLK1 AC31 E28 FBB_DQS_WP5 FBB_CLK1 F20
FBA_EDC6 VMA_CLK1# [24] FBB_EDC6 VMB_CLK1# [25]
AN33 FBA_DQS_WP6 B30 FBB_DQS_WP6
FBA_EDC7 AF33 FBA_DQS_WP7
FBB_EDC7 A23 FBB_DQS_WP7

FBA_WCK01 K31 FBB_WCK01 F8

L30 VMA_WCK01 [24] E8 VMB_WCK01 [25]
FBA_WCK01 VMA_WCK01# [24] FBB_WCK01 VMB_WCK01# [25]
FBA_WCK23 H34 FBB_WCK23 A5
VMA_WCK23 [24] VMB_WCK23 [25]
FBA_WCK23 J34 FBB_WCK23 A6
AG30 VMA_WCK23# [24] D24 VMB_WCK23# [25]
FBA_WCK45 VMA_WCK45 [24] FBB_WCK45 VMB_WCK45 [25]
FBA_WCK45 AG31 FBB_WCK45 D25
AJ34 VMA_WCK45# [24] B27 VMB_WCK45# [25]
N17P/N18P co-lay FBA_WCK67
FBA_WCK67 AK34 VMA_WCK67
VMA_WCK67#
[24]
[24]
FBB_WCK67
FBB_WCK67 C27 VMB_WCK67
VMB_WCK67#
[25]
[25]
FBA_WCKB01 J30 FBB_WCKB01 D6
J31 VMA_WCKB01 [24] D7 VMB_WCKB01 [25]
R831 FBA_WCKB01
FBA_WCKB23 J32 VMA_WCKB01# [24] FBB_WCKB01
FBB_WCKB23 C6 VMB_WCKB01# [25]
VMA_WCKB23 [24] VMB_WCKB23 [25]
FBVDDQ_MEM FBVDDQ_MEM N18P =>49.9 FBA_WCKB23 J33
VMA_WCKB23# [24] FBB_WCKB23 B6
VMB_WCKB23# [25]
AH31 F26
N17P =>floating FBA_WCKB45
FBA_WCKB45 AJ31 VMA_WCKB45
VMA_WCKB45#
[24]
[24]
FBVDDQ_MEM FBVDDQ_MEM
FBB_WCKB45
FBB_WCKB45 E26 VMB_WCKB45
VMB_WCKB45#
[25]
[25]
09/17 R531, R159, R535, R534 change to 0201 FBA_WCKB67 AJ32 1V8_MAIN FBB_WCKB67 A26
AJ33 VMA_WCKB67 [24] A27 VMB_WCKB67 [25]
FBA_WCKB67 VMA_WCKB67# [24] L19 FBB_WCKB67 VMB_WCKB67# [25]
R531 R159 09/17 R419, R339, R355, R323 change to 0201
10K_5%_2 10K_5%_2 R831 49.9_1%_2 H31 FB_VREF FBA_PLL_AVDD U27 FBA_PLL_AVDD 1 2 FBB_PLL_AVDD H17 FBA_PLL_AVDD
HCB1005KF-330T30 R419 R339
FBA_CMD7 10K_5%_2 10K_5%_2
FBA_CMD33
N18P/GB4D-128_960P
0.4A FBB_CMD7 N18P/GB4D-128_960P
A C199 A
FBA_CMD2 C1115 C239 C904 C1114 FBB_CMD33 1u/6.3V_2
FBA_CMD18 4.7U/6.3V_6 4.7U/6.3V_6 22U/6.3VS_6 1u/6.3V_2
FBB_CMD2
Under GPU FBB_CMD18

R535 R534
10K_5%_2 10K_5%_2

C1285 C1286
FBA_PLL_AVDD

C1287
Near GPU R355 R323
0.47u/6.3V_2 0.47u/6.3V_2 0.47u/6.3V_2 10K_5%_2 10K_5%_2
PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
N18P-G62-2/7 (Memory)
NB5 Date: Wednesday, April 08, 2020 Sheet 20 of 106
5 4 3 2 1
 5 4 3 2 1

[19,105] PEX_VDD
UG1M [19,22,23,24,25,98,101,105] 1V8_AON
UG1K 6/17 IFPC HDMI [19,20,22,30,105] 1V8_MAIN 1V8_MAIN +3V +3V

21
[10,32,34,35,42,43,46,48,51,82,86,88,104,106] +3VPCU
5/17 IFPAB [22] CORE_PLLVDD
IFPC_RSET AF8
RG187 1K_5%_2
IFPCD_RSET Jason changen QG2 FP 1015
DVI DP UG1N
HDMI DP
SL/DL
8/17 IFPE RG193 RG192 RG12
AN6 AG2 10K_1%_2 10K_1%_2 10K_1%_2
TXC/TXC
TXC/TXC
IFPA_L3
IFPA_L3 AM6
DP1_D3#
DP1_D3
[47]
[47]
0.4A 1.8V IFPC_AUX_SDA
IFPC_AUX_SCL AG3
GPU_DDCDATA
GPU_DDCCLK
[30]
[30]
IFPE_RSET AD6
IFPE_RSET

6
IFPAB_RSET AJ8 RG190 1K_5%_2
RG268 1K_5%_2
IFPAB_RSET
Under GPU HDMI DP QG2B
IFPA_L2 AN3 IFPC_L3 AG4 2 PJT138K
TXD0/0 DP1_D2# [47] TXC GPU_CLK# [30]

3
AP3 CORE_PLLVDD AF7 AG5 AB4 INT_DP_AUXN
TXD0/0 IFPA_L2 DP1_D2 [47] IFPCD_PLLVDD TXC IFPC_L3 GPU_CLK [30] IFPE_AUX_SDA
CORE_PLLVDD AB8 AB3 INT_DP_AUXP QG2A
IFPE_PLLVDD IFPE_AUX_SCL
CORE_PLLVDD AH8 CG57 AH4 CG54 1U/6.3V_2 5
IFPAB_PLLVDD TXD0 IFPC_L2 GPU_D0# [30] PJT138K

1
AM5 1U/6.3V_2 AH3 CG55
TXD1/1
TXD1/1
IFPA_L1
IFPA_L1 AN5
DP1_D1#
DP1_D1
[47]
[47] DP for Type C TXD0 IFPC_L2 GPU_D0 [30]
Under GPU IFPE_L3 AC5
DP_D3# [31] 0.01u/50V_4
CG56 IFPC AJ2 N17P: 0.1u
TXC AC4
HDMI IFPC_L1 GPU_D1# [30] TXC IFPE_L3 DP_D3 [31]

4
TXD1 AJ3
1U/6.3V_2 IFPC_L1
AK6
TXD1 GPU_D1 [30] N18P: 1u AC3
TXD2/2 IFPA_L0
AL6
DP1_D0# [47] N17P: 0.1u AJ1
TXD0 IFPE_L2
AC2
DP_D2# [31]

D
N17P: 0.1u
TXD2/2 IFPA_L0 DP1_D0 [47]
1.0V
PEX_VDD
N18P: 1u TXD2
TXD2
IFPC_L0
IFPC_L0 AK1
GPU_D2#
GPU_D2
[30]
[30]
TXD0 IFPE_L2

AC1
DP_D2 [31]
MIni-DP D
IFPE_L1
N18P: 1u IFPA_AUX_SDA AH6 AF6 IFP_IOVDD
GPU_DDCDATA TXD1
IFPE_L1 AD1
DP_D1# [31]
DP1_AUXN [47] GPU_DDCCLK TXD1 DP_D1 [31]
AJ6
Under GPU IFPA_AUX_SCL DP1_AUXP [47] 0.4A TXD2 IFPE_L0 AD3
DP_D0# [31] QG3A QG3B

2
AG6 IFP_IOVDD TXD2 IFPE_L0 AD2 2N7002KDW 2N7002KDW
DP_D0 [31]
IFPB_L3 AH9
TXC INT_DP_AUXN
PEX_VDD IFPB_L3 AJ9 RG188 RG189 PEX_VDD 4 3 1 6
TXC INT_DP_AUXN_Q [31] INT_DP_AUXP_Q [31]
*100K_1%_2 *100K_1%_2
AG8 IFP_IOVDD CG62 CG63 CG64 CG65 AC7 IFP_IOVDD
AP5 DP1_AUXP *0.1U/10V_2 4.7U/6.3V_4 UG1L
N18P/GB4D-128_960P AC8
TXD0/3 IFPB_L2
DP1_AUXN 1U/6.3V_2 1U/6.3V_2 IFP_IOVDD
AG9 IFP_IOVDD IFPB_L2 AP6 7/17 IFPD
TXD0/3
RG21
N17P: 0.1u x2 N18P/GB4D-128_960P 100K_1%_2
CG58 CG59 TXD1/4 IFPB_L1 AL7
4.7U/6.3V_4 1U/6.3V_2 TXD1/4 IFPB_L1 AM7 RG264 RG265 N18P: 1u x1 HDMI DP CG66 CG67 CG68 CG69
100K_1%_2 100K_1%_2 *0.1U/10V_2 4.7U/6.3V_4
Under GPU IFPD_AUX_SDA AK2
1U/6.3V_2 1U/6.3V_2
INT_DP_AUXP
IFPB_L0 AM8 IFPD_AUX_SCL AK3
TXD2/5
AN8
TXD2/5 IFPB_L0 N17P: 0.1u x2
TXC IFPD_L3 AK5 N18P: 1u x1
CG60 CG61 AL8 IFPD AK4 RG191
*0.1U/10V_2 1U/6.3V_2
IFPB_AUX_SDA
IFPB_AUX_SCL AK8
TXC IFPD_L3
Under GPU 100K_1%_2 MIni-DP/Re-Driver_G-SYNC
IFPD_L2 AL4
TXD0
IFPD_L2 AL3
TXD0

IFPAB TXD1 IFPD_L1 AM4

N17P: 0.1u x2 TXD1 IFPD_L1 AM3
N18P/GB4D-128_960P
N18P: 1u x1 IFPD_L0 AM2
TXD2
IFPD_L0 AM1
TXD2
Under GPU

N18P/GB4D-128_960P

PEGX_RST#
PEGX_RST# [19,21,22]GPU_FW_EC

LOW= VR I2C from GPU (Defaule)

RG251 2K_1%_2
HI= VR I2C from EC
GFx SMBus
C Isolation(for EC) C

3
2
PEGX_RST# 2N7002K GPU_FW_EC [42,98]
1V8_AON
PEGX_RST# [19,21,22]
QG18

1
Jason-MV-change net name

5
10/17 update VRAM QB P/N RG194 RG195
VRAM Table for G1/G2 GDDR6

5
2K_1%_2 3 4 I2CC_SCL_GFX
2K_1%_2 [98] MBCLK1_GPU
RAMCFG QG17A PJT138K
3 4 GFx_SCL
[2:0] DESCRIPTION Vendor Vendor P/N TOP P/N QB P/N [38,42,48] GPUT_CLK

2
QG4A PJT138K
0x1 MT61K256M32JE(DC1940) Micron MT61K256M32JE-14:A TBD AKG5QGDTL09

2
6 1 I2CC_SDA_GFX
[98] MBDATA1_GPU
0x0 K4Z80325BC-HC14(DC2001) Samsung K4Z80325BC-HC14 TBD AKG58G0T516 Default QG17B PJT138K
6 1 GFx_SDA
[38,42,48] GPUT_DATA
QG4B PJT138K

1V8_AON
1V8_AON

RG218 RG219 RG220 RG215 RG222 RG223 UG1O

*100K_1%_2 *100K_1%_2 *100K_1%_2 100K_1%_2 *100K_1%_2 *100K_1%_2 10/17 MISC1
CG859 RG198 RG197 1V8_AON
STRAP0 N17P: NC 1U/6.3V_2 2K_1%_2 2K_1%_2
STRAP1
STRAP2 N18P: Stuff I2CS_SCL T4
GFx_SCL
TS_AVDD AG10 GFx_SDA
STRAP3
1V8_AON *0_5%_2/S RG254 TS_AVDD I2CS_SDA T3
STRAP4
M1 I2CC_SCL_GFX
STRAP5 12/05 RG254 change to short pad OVERT# OVERT I2CC_SCL R2 RG199 RG196
I2CC_SDA_GFX
I2CC_SDA R3 2K_1%_2 2K_1%_2
TP4 TS_VREF AP9 TS_VREF
I2CB_SCL_G
I2CB_SCL R7
K4 I2CB_SDA_G 1V8_AON
TP5 THERMDN THERMDN I2CB_SDA R6
RG212 RG213 RG214 RG221 RG216 RG217
100K_1%_2 100K_1%_2 100K_1%_2 *100K_1%_2 100K_1%_2 100K_1%_2 TP6 THERMDP K3 THERMDP
RG182 10K_5%_2 GPUEVENT# RG176 10K_5%_2
P6 NVVDD_PWM_GPU 1V8_MAIN_EN_GPU RG177 10K_5%_2
GPIO0 NVVDD_PWM_GPU [98]
JTAG_TCK AM10 M3 GC6FBEN
JTAG_TCK GPIO1 GC6FBEN [22]
JTAG_TMS AP11 L6 GPUEVENT# NVVDD_PSI RG178 *10K_5%_2
JTAG_TMS GPIO2
B JTAG_TDI AM11 P5 THER_ALERT# RG179 10K_5%_2 B
TP7 JTAG_TDO AP12
JTAG_TDI GPIO3
P7 1V8_MAIN_EN_GPU Jason change net name from 1V8_MAIN _EN to 1V8_MAIN _EN_GPU PV stage 0107 PWR_LEVEL RG201 100K_1%_2
JTAG_TDO GPIO4 1V8_MAIN_EN_GPU [22]
JTAG_TRST# AN11 L7

UG1P
Check with Nvidia TP9 JTAG_SEL AK11
JTAG_TRST
NVJTAG_SEL
GPIO5
GPIO6
GPIO7
M7
N8
NVVDD_PSI
NVVDD_PSI [98]
ADC_MUX_SEL
FBVDD_PSI
RG257
RG175
2.2K_5%_2
10K_5%_2
12/17 MISC2 *0_5%_2/S RG255 GPU_ADC_INP_R AN9 ADC_IN GPIO8 L3 MEM_VDD_CTRL RG181 10K_5%_2
[104] GPU_ADC_INP
*0_5%_2/S RG256 GPU_ADC_INN_R AM9 ADC_IN GPIO9 M2 THER_ALERT#
MEM_VDD_CTRL [101]
[104] GPU_ADC_INN L1 MEM_VREF_CTL
GPIO10 RG200 100K_1%_2
N17P: NC GPIO11 M5
N3 PWR_LEVEL
GPIO12
ROM_CS H6 ROM_CS N18P: Stuff GPIO13 M4
MEM_VREF_CTL [24,25]
12/05 RG255, RG256 change to short pad N4 GPIO14_IFPA_HPD
GPIO14
H5 ROM_SI P2
ROM_SI
H7 ROM_SO Jason changen 1023 GPIO15
R8
ROM_SO
ROM_SCLK NV suggestion delete CG853 and CG854 GPIO16
STRAP0 J2 H4 M6
STRAP1 J7
STRAP0 ROM_SCLK GPIO17
R1 GPIO18_IFPE_HPD Jason delete FGC6 net 1023
STRAP2 J6
STRAP1
STRAP2
GPIO18
GPIO19 P3 FGC6 is not required on MSHybrid design.
STRAP3 J5 P4 NB_FGC6 RG180 10K_5%_2
STRAP3 GPIO20
STRAP4 J3 STRAP4 GPIO21 P1
STRAP5 J1 P8 ADC_MUX_SEL
STRAP5 GPIO22 ADC_MUX_SEL [104]
GPIO23
T8
GPIO24 L2
R4 FBVDD_PSI 1V8_AON
E1 BUFRST
Description Size P/N GPIO25
R5 GPIO26_FP_FUSE FBVDD_PSI [101]
BUFRST TP13 GPIO26 GPIO26_FP_FUSE [23]
1V8_AON U3 GPIO27_IFPC_HPD
N18P GD25LQ80CTIGR 8Mb AKE5GF00Q01 GPIO27

2
* 1V8_AON DMG1012T-7 QG5
MX25U8033EM1I-12G 8Mb AKE5GFP0Z02 N18P/GB4D-128_960P Jason changen 1023 DGPU_PWROK_Q 3 1
NV suggestion delete TP17,TP9,TP10,TP18,TP12 [9,42] DGPU_PWROK_Q DGPU_PWROK [19,22]
RG57
10K_5%_2
RG79 RG210 RG207 1V8_AON
*100K_1%_2 *100K_1%_2 *100K_1%_2
Jason changen QG5/QG6 FP 1011
ROM_SI ROM_SI 33.2_1%_2 RG61 ROM_SI_R 5
UG3
8
N17P: NC 1V8_AON
+3V
N18P/GB4D-128_960P ROM_SO
ROM_SCLK ROM_CS 33.2_1%_2 RG62
ROM_SO
ROM_CS_R
2
1
SPI_SI
SPI_SO
VCC
N18P: Stuff PWR_LEVEL 1 3
ROM_SCLK ROM_SCLK_R CS# WP#_3 RG64 JTAG_TMS GC6FBEN_Q [9] DGPU_PROCHOT_EC# [42,82,105]
33.2_1%_2 RG63 6 3 10K_5%_2 RG226 *10K_5%_2
SPI_SCK WP# RG68
RG227 *10K_5%_2 JTAG_TDI 10K_5%_2 QG6 DMG1012T-7
TP9171

2
RG209 RG208 RG211 * 4 7 Hold#_7 RG69 10K_5%_2 GPIO12 AC detect
TP9172 GND SPI_HOLD JTAG_TRST# Jason changen QG7 FP 1012

3
100K_1%_2 10K_5%_2 100K_1%_2 TP9173 RG224 10K_5%_2 AC high
SPI_FLASH 2 DC low
TP9192 TP9193 JTAG_TCK 2N7002K 1V8_AON GPU_EVENT#
sop8-5_99-1_27 CG70 RG228 *10K_5%_2 GPUEVENT# 2 1
Jason-MV-ADD test point TP9194
QG7
GPU_EVENT# [9]
0.1U/10V_2 Nvidia :
AKE5GFP0Z02 RG225 10K_5%_2 JTAG_SEL RB500V-40 DG1
suggest to

1
Throttle

3
IC FLASH (8P) MX25U8033EM1I-12G (8-SOP)
GC6FBEN 2 QG8
connect this Jason change DG1 FP 1011 Event
pin to EC only

A
1V8_AON Check with Nvidia Jason changen RG208 1024 1V8_AON
DMG1012T-7
1V8_AON A

1
N17P: 100k For N18P, ROM_SI and ROM_SCLK pull down 100K, ROM_SO pull down 10K. Jason changen QG8 FP 1011
RG204 N18P: 10k FOR RG208 For N17P,ROM_SO pull down 100K, ROM_SI/ROM_SCLK pull up 100K.
Jason change QG9 FP 1011 PEGX_RST# [19,21,22]

10K_1%_2 RG258 RG261 1V8_AON RG72 10K_5%_2

10K_1%_2 10K_1%_2 RG73 10K_5%_2 1V8_AON

2
QG9 DMG1012T-7
GPIO27_IFPC_HPD TYPE-C HPD OVERT# 1 3 DGPU_OVT#
GPIO14_IFPA_HPD GPIO18_IFPE_HPD Mini-DP HPD DGPU_OVT# [22,42]
HDMI-HPD
RG74 *0_5%_2
3

2 GPIO27_IFPC_HPD_Q RG75 HDMI_HPD

3

3
QG10 100K_5%_2
HDMI_HPD [13,30] 2 GPIO14_IFPA_HPD_Q RG259 DP1_HPD 2 GPIO18_IFPE_HPD_Q RG262 DP_HPD_PCH
DMG1012T-7 QG22 100K_5%_2 QG23 100K_5%_2
DP1_HPD [47] DP_HPD_PCH [13,31]
DMG1012T-7 DMG1012T-7
1

RG203 CG856 CG857 PROJECT : G3BE

1

1
100K_5%_2 *220p/25V_2 *220p/25V_2 RG260 CG860 CG861 RG263 CG862 CG863 Overt shutdown
100K_5%_2 *220p/25V_2 *220p/25V_2 100K_5%_2 *220p/25V_2 *220p/25V_2 Quanta Computer Inc.
GND Size Document Number Rev
Custom 1A
GND GND GND GND GND N18P-G62-3/7(Display)
GND GND GND GND GND GND NB5 Date: Wednesday, April 08, 2020 Sheet 21 of 106
5 4 3 2 1
 5 4 3 2 1

UG1E
9/17 XVDD [21] CORE_PLLVDD
UG1F

22
[19,21,23,24,25,98,101,105] 1V8_AON
CONFIGURABLE 16/17 GND_2/2 [19,20,21,30,105] 1V8_MAIN
POWER NVVDD UG1D
[20,23,24,25,101] FBVDDQ_MEM
CHANNELS 15/17 GND_1/2 G25 GND GND P18
U4 AG11 AL18 G28 P20
XVDD
XVDD
XVDD
U5
U6
A2
A30
GND
GND
GND
GND
GND
GND
AL2
AL20
G3
G30
GND
GND
GND
GND
GND
GND
P22
P24
Overt temp ckt for NVVDD
XVDD U7 A33 GND GND AL21 G32 GND GND R12
XVDD U8 A9 GND GND AL23 G33 GND GND R14 FBVDDQ_MEM
V1 AA11 AL24 G5 R16

Under GPU Near GPU

XVDD GND GND GND GND [21,42] DGPU_OVT#
XVDD V2 AA13 GND GND AL26 G7 GND GND R19
XVDD V3 AA15 GND GND AL28 H30 GND GND R21
XVDD V4 AA17 GND GND AL30 K2 GND GND R23
AA18 GND GND AL32 K28 GND GND T11
AA20 GND GND AL33 K30 GND GND T13 CG74 10U/6.3V_4 CG75 10U/6.3V_4
XVDD V5 AA22 GND GND AL5 K32 GND GND T15 CG76 10U/6.3V_4 CG77 10U/6.3V_4
V6 AA24 AM13 K33 T17 [19,21] PEGX_RST#
XVDD GND GND GND GND CG78 10U/6.3V_4 Jason change DG2 FP 1011
D XVDD V7 AB12 GND GND AM16 K5 GND GND T18 CG79 10U/6.3V_4 D
V8 AB14 AM19 K7 T2 1V8_AON +1.8V_DEEP_SUS

1
XVDD GND GND GND GND CG80 22U/6.3V_6
XVDD W2 AB16 GND GND AM22 L12 GND GND T20 CG81 22U/6.3V_6 RG80 DG2
XVDD W3 AB19 GND GND AM25 L14 GND GND T22 CG82 22U/6.3V_6 10K_5%_2 RB500V-40
W4 AB2 AM34 L16 T24 CG83 1U/6.3V_2 CG84 22U/6.3V_6
XVDD
W5 AB21
GND GND
AN1 L19
GND GND
T28 CG85 1U/6.3V_2 CG86 22U/6.3V_6 RG81 RG250
Jason Add RG250 1115 Jason change DG3 FP 1011
XVDD GND GND GND GND

2
3
XVDD W7 AB23 GND GND AN10 L21 GND GND T32 CG87 1U/6.3V_2 10K_5%_2 *10K_5%_2 2
NVVDD_PG_LOOP_OVT NVVDD_CORE1_EN [98]
AB28 GND GND AN13 L23 GND GND T5 CG88 1U/6.3V_2 2 QG12 RB500V-40 1 DG3
AB30 GND GND AN16 M11 GND GND T7 CG89 1U/6.3V_2 DMG1012T-7
XVDD W8 AB32 GND GND AN19 M13 GND GND U12 CG90 1U/6.3V_2 RG82 1K_5%_2
Y1 AB5 AN22 M15 U14 [22,98] NVVDD_PGOOD
XVDD GND GND GND GND CG91 1U/6.3V_2

1
3
Y2 AB7 AN25 M17 U16 CG92 1U/6.3V_2 RG83 CG93
XVDD GND GND GND GND Jason changen QG12 FP 1011

6
XVDD Y3 AC11 GND GND AN30 M18 GND GND U19 CG94 1U/6.3V_2 *1.21K_4 820p/50V_4
XVDD Y4 AC13 GND GND AN34 M20 GND GND U21 CG95 1U/6.3V_2 5 QG13A
XVDD Y5 AC15 GND GND AN4 M22 GND GND U23 CG96 1U/6.3V_2 2 QG13B
XVDD Y6 AC17 GND GND AN7 Y23 GND GND V12 CG97 1U/6.3V_2 DMN5L06DWK-7
XVDD Y7 AC18 GND GND AP2 M24 GND GND V14 DMN5L06DWK-7 10/07 RG84 change to mount

4
Y8 AC20 AP33 M30 V16
XVDD GND GND GND GND Jason change DG4 FP 1011

1
AC22 GND GND B1 M34 GND GND V19
AC24 GND GND B10 N12 GND GND V21 1 2
[22,105] 1V8_MAIN_EN PEXVDD_EN1 [22]
XVDD AA1 AD12 GND GND B2 N14 GND GND V23 DG4 RB500V-40
XVDD AA2 AD14 GND GND B22 N16 GND GND W11 PV-Brian-1227 09/17 RG84 change to 0201 Jason change net name from PEXVDD_EN_U to PEXVDD_EN1 1023
AA3 AD16 B23 N19 W13 [21] GC6FBEN
XVDD GND GND GND GND RG84 200K_5%_2
XVDD AA4 AD19 GND GND B25 N2 GND GND W15 Jason change net name from NVVDD_CORE1 to 1V8_MAIN_EN 1023 RG85
XVDD AA5 AD21 GND GND B28 N21 GND GND W17 1 2 *12.1K/F_4 CG107 PV-Brian-1227
PEX_EN_1 [105]
XVDD AA6 AD23 GND GND B31 N23 GND GND W18 DG7 0.01u/50V_4
AA7 AE2 B34 N28 W20 RB500V-40
NVVDD POWER GOOD LOOPBACK
XVDD GND GND GND GND
XVDD AA8 AE28 GND GND B4 N30 GND GND W22
AE30 B7 N32 W24
AE32
GND GND
C10 N33
GND GND
W28
Jason Add DG7 1115
GND GND GND GND
AE33 GND GND C13 N5 GND GND Y12
AE5 GND GND C19 N7 GND GND Y14
AE7 GND GND C22 P11 GND GND Y16
AF30 C25 P13 Y19
AF32
AH10
GND
GND
GND
GND
GND
GND
C28
C7
P15
P17
GND
GND
GND
GND
GND Y21 for GC602/18 RG247 change to short pad +1.8V
For Power off sequence
N18P/GB4D-128_960P AH13 GND GND D2 RG247 *0_5%_2/S 1V8_AON
AH16 D22 C16
AH19
GND
GND
GND
GND D28
GND_OPT
GND_OPT W32
Jason remove those FGC6 1023 RG248 *0_5%_2 +1.8V

5
AH2 GND GND D31
AH22 GND GND D33 CG111 2
AH24 D9 1V8_AON 4 DGPU_PWR_EN [9,22]
0.1U/16V_4
AH28
GND GND
E10
Optional CMD GNDs (2) Jason Add RG248 1115 [105] 1V8_AON_EN 1
GND GND NC for 4-Lyr cards NVVDD_PGOOD [22,98]
AH29 GND GND E22 *10K_5%_2 RG86 U54
AH30 E25 N18P/GB4D-128_960P UG5 74LVC1G32GW
C GND GND PV-Brian-1227 C

3
5
AH32 E34 74LVC1G32GW
GND GND
AH33 GND GND E4 2
[105] PEX_VDD_PG
AH5 GND GND E5 4
FBVDD_EN [101]
AH7 E7 GC6FBEN 1 02/18 RG245 change to short pad
AJ7
GND
GND
GND
GND F28 Note: +1.8V RG245 *0_5%_2/S
AK10 F7
GND GND Jason Add RG245 1115

3
AK31 G10 RG246 *0_5%_2
AK7
GND GND
G13
Jason change UG5 FP 1015 1V8_AON
GND GND
AL12 GND GND G16
AL14 GND GND G19

5
AL15 GND GND G2
AL17 GND GND G22 2
4 DGPU_PWR_EN [9,22]
[105] PEXVDD_EN
1
PEXVDD_EN1 [22]
N18P/GB4D-128_960P If N18P only, connect these pin to GND U55 NL17SZ08DFT2G

3
If N17P/N18P co-layout, leave these pin NC
PV-Brian-1227
If N17P only, leave these pin NC 1V8_AON

+1.8V

5
09/17 R931 change to 0201 2
4 DGPU_PWR_EN [9,22] Jason add For Power off sequence 1023
[22,105] 1V8_MAIN_EN
R931 1
1V8_MAIN_EN_GPU [21]
*10K_5%_2
U57 NL17SZ08DFT2G

3
1V8_MAIN_EN

UG1J
4/17 NC

AC6 NC NC AK9
AD4 NC NC AL10
AD5 AL11 UG1Q
AE3
NC NC
AL9 1V8_MAIN GC6_1V8_MAIN_EN GC6FBEN NB_FGC6 1V8_AON 1V8_MAIN NVVDD PEX_VDD FBVDDQ
NC NC 11/17 XTAL_PLL
B AE4 AN2 B
NC NC
AF1 AP8 LG2 1 2HCB1005KF-330T30 CORE_PLLVDD AD8
AF2
NC NC
C15 H26
XSN_PLLVDD POWER ON 1 0 0 ON ON ON ON ON
AF3
AF4
NC
NC
NC
NC D19
D20
0.4A CG112 CG113 CG114 CG115
CORE_PLLVDD AE8
GPCPLL_AVDD
SP_PLLVDD

AF5
NC
NC
NC
NC D23 N17P: Stuff *0.1U/10V_2 1U/6.3V_2 4.7U/6.3V_4 22U/6.3V_6 AD7 VID_PLLVDD
GC6 0 1 0 ON OFF OFF OFF ON
N17P: Stuff AG1 NC NC D26 N18P: NC
AG26 L8 VDD18 *0_5%_2 RG99
N18P: NC AG7
NC NC
M8
1V8_MAIN
CG116 CG117
FGC6 0 1 1 ON ON OFF ON ON
NC NC
*0_5%_2 RG242 AH11 NC NC V32 *0.1U/10V_2 1U/6.3V_2
AJ26 U2
AJ28
NC NC
U1 N17P: 0.1u x2 XTALSSIN H1 J4 XTALOUTBUFF
AJ4
NC NC
N18P: 1u x1 N17P: 0.1u x2 EXT_REFCLK_FL XTAL_OUTBUFF

AJ5
NC N17P: Stuff N18P: 1u x1
AK26
NC
NC N18P: NC Near GPU Under GPU VGA_XTALIN H3 XTAL_IN XTAL_OUT H2 VGA_XTALOUT
GPU All power good
CG199 *1U/10V_2 N18P/GB4D-128_960P

CG200 *4.7U/6.3V_4
Under GPU 1V8_AON
Jason Add RG249 1115
90 ohms +/- 15% 1V8_AON
RG91
CG204 *0.1U/10V_2
Differential Impedance 10K_5%_2
VGA_XTALIN DG6
N18P/GB4D-128_960P CG205 *0.1U/10V_2
NVVDD_PGOOD 1 1V8_AON +1.8V_DEEP_SUS
VGA_XTALOUT XTALOUTBUFF 3 RG92
N17P: Stuff Under GPU XTALSSIN 2 10K_5%_2
YG1 [31,101] PS_FBVDD_PGOOD
N18P: NC
2 4 RG95 RG249
1 3 BAT54AW-L 10K_5%_2 *10K_5%_2 DGPU_PWROK
DGPU_PWROK [19,21]
RG93 RG94 Jason changen DG6 FP 1015
27MHZ/10ppm

3
10K_5%_2 10K_5%_2
CG118 CG119
10P/50V_4 12P/50V_4 5 QG14A

6
DMN5L06DWK-7
CG120

4
2 QG14B *0.1U/16V_4

DMN5L06DWK-7

1
A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
N18P-G62-4/7 (MISC)
NB5 Date: Wednesday, April 08, 2020 Sheet 22 of 106
5 4 3 2 1
 5 4 3 2 1

NVVDD
Under GPU
Near GPU
NVVDD

AA12
AA14
AA16
UG1G
13/17 NVVDD
VDD
VDD
VDD
VDD
VDD
VDD
P12
P14
P16
NVVDD FBVDDQ_MEM

AA27
AA30
UG1H
14/17 FBVDDQ

FBVDDQ
FBVDDQ
CG121
CG122
CG124
CG127
CG130
CG133
10U/6.3V_4
10U/6.3V_4
10U/6.3V_4
10U/6.3V_4
10U/6.3V_4
10U/6.3V_4
CG125
CG128
CG131
CG134
1U/6.3V_2
1U/6.3V_2
1U/6.3V_2
1U/6.3V_2
CG123
CG126
CG129
CG132
CG135
22U/6.3V_6
22U/6.3V_6
22U/6.3V_6
22U/6.3V_6
22U/6.3V_6
[22,98,99] NVVDD

23
AA19 VDD VDD P19 AB27 FBVDDQ CG136 10U/6.3V_4 CG137 1U/6.3V_2 CG138 22U/6.3V_6
AA21 VDD VDD P21 AB33 FBVDDQ CG139 10U/6.3V_4 CG140 1U/6.3V_2 CG141 22U/6.3V_6
AA23 VDD VDD P23 AC27 FBVDDQ CG142 10U/6.3V_4 CG143 1U/6.3V_2 CG144 22U/6.3V_6
AB11 VDD VDD R11 AD27 FBVDDQ CG145 10U/6.3V_4 CG146 1U/6.3V_2 CG147 22U/6.3V_6
D AB13 VDD VDD R13 AE27 FBVDDQ CG148 10U/6.3V_4 CG149 1U/6.3V_2 CG150 22U/6.3V_6 D
AB15 VDD VDD R15 AF27 FBVDDQ CG151 10U/6.3V_4 CG152 1U/6.3V_2 CG153 22U/6.3V_6
AB17 VDD VDD R17 AG27 FBVDDQ CG154 10U/6.3V_4 CG155 1U/6.3V_2 CG156 22U/6.3V_6
AB18 VDD VDD R18 B13 FBVDDQ CG157 10U/6.3V_4 CG158 1U/6.3V_2 CG159 22U/6.3V_6
AB20 VDD VDD R20 B16 FBVDDQ CG160 10U/6.3V_4 CG161 1U/6.3V_2 CG162 22U/6.3V_6
AB22 VDD VDD R22 B19 FBVDDQ CG173 10U/6.3V_4 CG163 22U/6.3V_6
AB24 VDD VDD R24 E13 FBVDDQ CG164 10U/6.3V_4
AC12 VDD VDD T12 E16 FBVDDQ CG165 10U/6.3V_4
AC14 VDD VDD T14 E19 FBVDDQ CG166 10U/6.3V_4 CG174 *10u/6.3V_6
AC16 VDD VDD T16 H10 FBVDDQ CG167 10U/6.3V_4 CG168 *10u/6.3V_6
AC19 VDD VDD T19 H11 FBVDDQ CG169 10U/6.3V_4 CG170 *10u/6.3V_6
AC21 VDD VDD T21 H12 FBVDDQ CG171 10U/6.3V_4 CG172 *10u/6.3V_6
AC23 VDD VDD T23 H13 FBVDDQ CG175 10U/6.3V_4 CG176 *10u/6.3V_6
AD11 VDD VDD U11 H14 FBVDDQ CG177 10U/6.3V_4 CG178 *10u/6.3V_6
AD13 VDD VDD U13 H15 FBVDDQ CG179 10U/6.3V_4
AD15 VDD VDD U15 H16 FBVDDQ CG180 10U/6.3V_4
AD17 VDD VDD U17 H18 FBVDDQ CG181 10U/6.3V_4 CG182 *4.7U/6.3V_4
AD18 VDD VDD U18 H19 FBVDDQ CG183 10U/6.3V_4 CG184 *4.7U/6.3V_4
AD20 VDD VDD U20 H20 FBVDDQ CG185 10U/6.3V_4
AD22 VDD VDD U22 H21 FBVDDQ CG186 10U/6.3V_4
AD24 VDD VDD U24 H22 FBVDDQ CG187 10U/6.3V_4 CG188 *330u/2.5V_3528
L11 VDD VDD V11 H23 FBVDDQ CG189 10U/6.3V_4

+
L13 VDD VDD V13 H24 FBVDDQ CG190 10U/6.3V_4
L15 VDD VDD V15 H8 FBVDDQ CG191 10U/6.3V_4
L17 V17 H9
L18
VDD
VDD
VDD
VDD V18 L27
FBVDDQ
FBVDDQ
N17P: 22u x 10pcs, 10u x 11pcs
L20 V20 M27
L22
VDD VDD
V22 N27
FBVDDQ
4.7u x 2pcs, 330u x 1pcs
L24
VDD
VDD
VDD
VDD V24 P27
FBVDDQ
FBVDDQ
N17P: 10u x 21pcs N18P: 22u x 15pcs
M12 W12 R27
M14
VDD
VDD
VDD
VDD W14 T27
FBVDDQ
FBVDDQ
N18P: 10u x 34pcs
C M16 VDD VDD W16 T30 FBVDDQ
C
M19 VDD VDD W19 T33 FBVDDQ
M21 VDD VDD W21 V27 FBVDDQ
M23 VDD VDD W23 W27 FBVDDQ
N11 VDD VDD Y11 W30 FBVDDQ
N13 VDD VDD Y13 W33 FBVDDQ
N15 VDD VDD Y15 Y27 FBVDDQ
N17 VDD VDD Y17
N18 VDD VDD Y18
N20 VDD VDD Y20
N22 VDD VDD Y22
N24 VDD VDD Y24

FBVDDQ_SENSE F1 FBVDDQ_SENSE
FBVDDQ_SENSE [101]
PROBE_FB_GND F2
FB_GND_SENSE
FB_GND_SENSE [101]
FB_CAL_PD_VDDQ J27
FB_CAL_PD_VDDQ RG96 40.2_1%_2 FBVDDQ_MEM

FB_CAL_PU_GND H27 FB_CAL_PU_GND RG97 40.2_1%_2

FB_CALTERM_GND H25
FB_CAL_TERM_GND RG98 40.2_1%_2

N17P: 60.4 ohm 1V8_AON

Under GPU
N18P/GB4D-128_960P N18P: 40.2 ohm UG1I
N17P: 0.1u x2pcs
17/17 1V8_AON
N18P: 1u x 2pcs
CG192 1U/6.3V_2
CG193 1U/6.3V_2
B B
1V8_AON J8
1V8_AON K8

FP_FUSE_SRC AG12 FP_FUSE_GPU

VDD_SENSE L4 VGPU_CORE_SENSE [98]

GND_SENSE L5 VSS_GPU_SENSE [98] CG196 1U/6.3V_2 Near GPU

CG197 1U/6.3V_2 N17P: 1u x 1pcs
CG198 1U/6.3V_2
N18P/GB4D-128_960P 1V8_AON N18P: 1u x 3pcs

UG11
CG288 1 6 FP_FUSE_GPU
2 IN#1 OUT CG201 4.7U/6.3V_4
2.2U/10V_4
+3VS5
9 IN#2
IN#3/EPAD
N18P/GB4D-128_960P CG202 4.7U/6.3V_4 Near GPU
CG289 RG252 CG203 4.7U/6.3V_4 N17P: 4.7u x 1pcs
3 2.2U/10V_4 2.21K_1%_2
VBIAS N18P: 4.7u x 3pcs
4 5
CG855 ON GND
0.1u/16V_4 AOZ1335DI_2

[21] GPIO26_FP_FUSE N17P: NC

N18P: Stuff
A RG253 A
10K_5%_2

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
N18P-G62-5/7 (Power)
NB5 Date: Wednesday, April 08, 2020 Sheet 23 of 106
5 4 3 2 1
 5 4 3 2 1

MEMORY: FBA Partition 31..0

FBVDDQ_MEM
1V8_AON
[20,22,23,25,101]
[19,21,22,23,25,98,101,105]
Reference X3BA schematic [20,24] FBA_DBI[7:0]
40OHM_NETCLASS1

FBA_DBI0
FBA_DBI1
[20,24] FBA_EDC[7:0]
40OHM_NETCLASS1

FBA_EDC0
FBA_EDC1
FBVDDQ_MEM FBVDDQ_MEM
JS-N18-0706

FBVDDQ_MEM
24
FBA_DBI2 FBA_EDC2 CG417 CG418 CG419 CG420 CG421 CG422 CG423 CG424 CG425 CG426 CG427 CG428
FBA_DBI3 FBA_EDC3
*0.47u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 1u/6.3V_2 *0.47u/6.3V_2 1u/6.3V_2 *0.47u/6.3V_2 1u/6.3V_2 *0.47u/6.3V_2 1u/6.3V_2
FBA_DBI4 FBA_EDC4
FBVDDQ_MEM FBA_DBI5 FBA_EDC5 RG125
VRAM3A FBA_DBI6 FBA_EDC6 *549/F_4 VREFC_VMA1 0.4MM=16mils
A11 FBA_DBI7 FBA_EDC7
A13 VSS#A11 FBA_VREFC
VSS#A13 FBA_VREFC [24]
A2 A1
A4 VSS#A2 VDD#A1 A14 [20,24] FBA_CMD[33:0]
B1 VSS#A4 VDD#A14 E10 RG127 RG126
B14 VSS#B1 VDD#E10 E5 *931/F_4 CG429
C10 VSS#B14 VDD#E5 H13 1K/F_2 *820p/50V_4
C12 VSS#C10 VDD#H13 H2
C3 VSS#C12 VDD#H2 L13
D VSS#C3 VDD#L13 [20] VMA_DQ[31:0] D
C5 L2
D1 VSS#C5 VDD#L2 P10

M11

MEM_VREF_CTL_QA
D12 VSS#D1 VDD#P10 P5
D14 VSS#D12 VDD#P5 V1 VRAM3D
D3 VSS#D14 VDD#V1 V14
JS-N18-0709 swap VREFC IS NOT USED IN
E11 VSS#D3
VSS#E11
VDD#V14
VRAM3B
VRAM3C FBA_CMD13
FBA_CMD15
H3
CA0_A VREFC
K1 FBA_VREFC
FBA_VREFC [24]
FBVDDQ_MEM FBVDDQ_MEM x16 CONFIGURATION
E4 G11 Around DRAM Around DRAM
F1 VSS#E4 B10 NORMAL FBA_CMD0 G4 CA1_A 1K OHM PULL-DOWN IS
VSS#F1 VDDQ#B10 CA2_A
F12
VSS#F12 VDDQ#B5
B5
VMA_DQ6
NORMAL VMA_DQ28
VMA_DQ31
N2
DQ0_B/DQ6_B
FBA_CMD9
FBA_CMD11
H12
CA3_A IN PLACE OF THE 1.33K
F14 C1 G2 P3 H5 CG430 CG431 CG432
F3 VSS#F14 VDDQ#C1 C11 VMA_DQ0 B3 DQ0_A/DQ7_A VMA_DQ30 M2 DQ1_B/DQ4_B FBA_CMD12 H10 CA4_A CG433 CG434 CG435 FOR R104
G1
G12
G14
VSS#F3
VSS#G1
VSS#G12
VDDQ#C11
VDDQ#C14
VDDQ#C4
C14
C4
E1 QD0~7
VMA_DQ5
VMA_DQ4
VMA_DQ2
F2
E3
B4
DQ1_A/DQ2_A
DQ2_A/DQ6_A
DQ3_A/DQ4_A
QD24~31 VMA_DQ29
VMA_DQ26
VMA_DQ27
P2
U3
V3
DQ2_B/DQ7_B
DQ3_B/DQ5_B
DQ4_B/DQ2_B
FBA_CMD3
FBA_CMD4
FBA_CMD6
J12
J11
J4
CA5_A
CA6_A
CA7_A
22u/6.3V_6 22u/6.3V_6 22u/6.3V_6
22u/6.3V_6 22u/6.3V_6 22u/6.3V_6

3
G3 VSS#G14 VDDQ#E1 E14 VMA_DQ1 B2 DQ4_A/DQ0_A VMA_DQ25 U4 DQ5_B/DQ1_B FBA_CMD5 J3 CA8_A MEM_VREF_CTL 2 QG20
VSS#G3 VDDQ#E14 VMA_DQ7 DQ5_A/DQ3_A VMA_DQ24 DQ6_B/DQ0_B FBA_CMD8 CA9_A [21,25] MEM_VREF_CTL
H11 F11 E2 U2 J5 *PJC138K
H4 VSS#H11 VDDQ#F11 F4 VMA_DQ3 A3 DQ6_A/DQ5_A DQ7_B/DQ3_B FBA_CMD7 G10 CABI_n_A N5 SNN_FBA_TCK0 TPG20
L11 VSS#H4 VDDQ#F4 H1 DQ7_A/DQ1_A FBA_EDC3 T2 CKE_n_A TCK F10 SNN_FBA_TDI0 TPG21

1
L4 VSS#L11 VDDQ#H1 H14 FBA_EDC0 C2 FBA_DBI3 R2 EDC0_B TDI N10 SNN_FBA_TDO0 TPG22
M1 VSS#L4 VDDQ#H14 J13 FBA_DBI0 D2 EDC0_A DBI0_N_B FBA_CMD10 L3 TDO F5 SNN_FBA_TMS0 TPG23
M12 VSS#M1 VDDQ#J13 J2 DBI0_N_A VMA_WCKB23 R4 FBA_CMD1 M11 CA0_B TMS
M14 VSS#M12 VDDQ#J2 K13 VMA_WCK01 D4 [20] VMA_WCKB23 VMA_WCKB23# R5 WCK_t_B/NC FBA_CMD32 M4 CA1_B FBVDDQ_MEM FBVDDQ_MEM
VSS#M14 VDDQ#K13 [20] VMA_WCK01 VMA_WCK01# D5 WCK_t_A [20] VMA_WCKB23# WCK_c_B/NC FBA_CMD14 CA2_B
M3 K2 L12 Close to DRAM Close to DRAM
N1 VSS#M3 VDDQ#K2 L1 [20] VMA_WCK01# WCK_c_A FBA_CMD11 L5 CA3_B
N12 VSS#N1 VDDQ#L1 L14 FBA_CMD12 L10 CA4_B
N14 VSS#N12 VDDQ#L14 N11 X16 X8 VMA_DQ20 P13 FBA_CMD3 K12 CA5_B J14 FBA_ZQ_1_A 121_1%_2 RG128 CG436 CG437 CG438 CG439 CG440 CG441
N3 VSS#N14 VDDQ#N11 N4 VMA_DQ8 B11 VMA_DQ19 U13 DQ8_B/DQ13_B FBA_CMD4 K11 CA6_B ZQ_A K14
P11 VSS#N3 VDDQ#N4 P1 VMA_DQ13 G13 DQ8_A NC VMA_DQ23 M13 DQ9_B/DQ11_B FBA_CMD6 K4 CA7_B ZQ_B 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6
P4
R1
R12
VSS#P11
VSS#P4
VSS#R1
VSS#R12
VDDQ#P1
VDDQ#P14
VDDQ#T1
VDDQ#T11
P14
T1
T11
QD8~15 VMA_DQ14
VMA_DQ15
VMA_DQ12
VMA_DQ10
E13
F13
E12
DQ9_A/DQ15_A
DQ10_A/DQ13_A
DQ11_A/DQ14_A
DQ12_A
NC
NC
NC
QD16~23 VMA_DQ22
VMA_DQ17
VMA_DQ21
VMA_DQ16
N13
U12
P12
DQ10_B/DQ15_B
DQ11_B/DQ14_B
DQ12_B/DQ10_B
DQ13_B/DQ12_B
FBA_CMD5
FBA_CMD8
FBA_CMD7
K3
K5
M10
CA8_B
CA9_B
CABI_n_B
CKE_n_B
FBA_ZQ_1_B 121_1%_2 RG129

R14 T14 B12 NC V12

R3 VSS#R14 VDDQ#T14 T4 VMA_DQ9 B13 DQ13_A/DQ10_A NC VMA_DQ18 U11 DQ14_B/DQ9_B
T10 VSS#R3 VDDQ#T4 U10 VMA_DQ11 A12 DQ14_A/DQ11_A NC DQ15_B/DQ8_B FBA_CMD2 J1
T12 VSS#T10 VDDQ#U10 U5 DQ15_A/DQ9_A NC FBA_EDC2 T13 RESET_n G5 SNN_FBA_RFU_G5 TPG24
T3 VSS#T12 VDDQ#U5 FBA_EDC1 C13 FBA_DBI2 R13 EDC1_B NC#G5 M5 SNN_FBA_RFU_M5 TPG25
T5 VSS#T3 1V8_AON FBA_DBI1 D13 EDC1_A GND DBI1_n_B VMA_CLK0# K10 NC#M5
VSS#T5 DBI1_n_A VMA_WCK23 R11 [20] VMA_CLK0# VMA_CLK0 CK_c 1V8_AON
U1 NC J10
U14 VSS#U1 A10 VMA_WCKB01 D11 [20] VMA_WCK23 VMA_WCK23# R10 WCK1_t_B [20] VMA_CLK0 CK_t
VSS#U14 VPP#A10 [20] VMA_WCKB01 WCK1_t_A [20] VMA_WCK23# WCK1_c_B option
V11 A5 VMA_WCKB01# D10 NC
VSS#V11 VPP#A5 [20] VMA_WCKB01# WCK1_c_A K4Z80325BC-HC14(DC2001)
V13 V10 NC
VSS#V13 VPP#V10 K4Z80325BC-HC14(DC2001)
V2 V5 K4Z80325BC-HC14(DC2001)
V4 VSS#V2 VPP#V5 CG442 CG443 CG444 CG445 CG446
VSS#V4
4.7u/6.3V_6 *0.47u/6.3V_2 1u/6.3V_2 *0.47u/6.3V_2 1u/6.3V_2

K4Z80325BC-HC14(DC2001)
CHANGE FBVDDQ TO FBVDDQ_MEM
C C

FBVDDQ_MEM FBVDDQ_MEM
Right under DRAM Right under DRAM FBVDDQ_MEM FBVDDQ_MEM
Close to DRAM Close to DRAM

CG459 CG460 CG461 CG462 CG463 CG464 CG465 CG466 CG467 CG468 CG469 CG470
1u/6.3V_2 1u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 1u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 CG447 CG448 CG449 CG450 CG451 CG452 CG453 CG454 CG455 CG456 CG457 CG458
1u/6.3V_2 *0.47u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 *0.47u/6.3V_2 1u/6.3V_2 *0.47u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 *0.47u/6.3V_2

MEMORY: FBA Partition 63..32

FBVDDQ_MEM FBVDDQ_MEM
40OHM_NETCLASS1 40OHM_NETCLASS1
[20,24] FBA_DBI[7:0] [20,24] FBA_EDC[7:0]
FBA_DBI0 FBA_EDC0
FBVDDQ_MEM FBA_DBI1 FBA_EDC1
VRAM4A FBA_DBI2 FBA_EDC2
A11 FBA_DBI3 FBA_EDC3 CG471 CG472 CG473 CG474 CG475 CG476 CG477 CG478 CG479 CG480 CG481 CG482
A13 VSS#A11 FBA_DBI4 FBA_EDC4
VSS#A13 *0.47u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 1u/6.3V_2 1u/6.3V_2 *0.47u/6.3V_2 1u/6.3V_2 *0.47u/6.3V_2 1u/6.3V_2 1u/6.3V_2
A2 A1 FBA_DBI5 FBA_EDC5
A4 VSS#A2 VDD#A1 A14 FBA_DBI6 FBA_EDC6
B1 VSS#A4 VDD#A14 E10 FBA_DBI7 FBA_EDC7
B14 VSS#B1 VDD#E10 E5
C10 VSS#B14 VDD#E5 H13
C12 VSS#C10 VDD#H13 H2
C3 VSS#C12 VDD#H2 L13 [20,24] FBA_CMD[33:0]
B C5 VSS#C3 VDD#L13 L2 B
D1 VSS#C5 VDD#L2 P10
VSS#D1 VDD#P10 [20] VMA_DQ[63:32]
D12 P5
D14 VSS#D12 VDD#P5 V1
D3 VSS#D14 VDD#V1 V14
E11 VSS#D3 VDD#V14
E4
F1
F12
VSS#E11
VSS#E4
VSS#F1
VSS#F12
VDDQ#B10
VDDQ#B5
B10
B5
M12 JS-N18-0709 swap VRAM4C VRAM4D
F14 C1 VREFC_VMA1 0.4MM=16mils
F3 VSS#F14 VDDQ#C1 C11 FBVDDQ_MEM FBVDDQ_MEM
G1 VSS#F3 VDDQ#C11 C14 VRAM4B NORMAL FBA_CMD29 H3 K1 FBA_VREFC
VSS#G1 VDDQ#C14 CA0_A VREFC FBA_VREFC [24] Around DRAM Around DRAM
G12 C4 VMA_DQ54 N2 FBA_CMD31 G11
G14 VSS#G12 VDDQ#C4 E1 NORMAL VMA_DQ52 P3 DQ0_B/DQ6_B FBA_CMD16 G4 CA1_A
G3 VSS#G14 VDDQ#E1 E14 VMA_DQ46 G2 VMA_DQ55 M2 DQ1_B/DQ4_B FBA_CMD25 H12 CA2_A CG483 CG484 CG485
H11
H4
VSS#G3
VSS#H11
VDDQ#E14
VDDQ#F11
F11
F4
VMA_DQ42
VMA_DQ47
B3
F2
DQ0_A/DQ7_A
DQ1_A/DQ2_A QD56~63 VMA_DQ53
VMA_DQ48
P2
U3
DQ2_B/DQ7_B
DQ3_B/DQ5_B
FBA_CMD22
FBA_CMD21
H5
H10
CA3_A
CA4_A
CG489
*820p/50V_4 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6
CG486 CG487 CG488

L11
L4
M1
VSS#H4
VSS#L11
VSS#L4
VSS#M1
VDDQ#F4
VDDQ#H1
VDDQ#H14
VDDQ#J13
H1
H14
J13
QD32~39 VMA_DQ45
VMA_DQ40
VMA_DQ43
VMA_DQ44
E3
B4
B2
DQ2_A/DQ6_A
DQ3_A/DQ4_A
DQ4_A/DQ0_A
DQ5_A/DQ3_A
VMA_DQ49
VMA_DQ50
VMA_DQ51
V3
U4
U2
DQ4_B/DQ2_B
DQ5_B/DQ1_B
DQ6_B/DQ0_B
DQ7_B/DQ3_B
FBA_CMD24
FBA_CMD23
FBA_CMD26
FBA_CMD17
J12
J11
J4
CA5_A
CA6_A
CA7_A
CA8_A Matt change to unmount-1025
22u/6.3V_6 22u/6.3V_6 22u/6.3V_6

M12 J2 E2 J3
M14 VSS#M12 VDDQ#J2 K13 VMA_DQ41 A3 DQ6_A/DQ5_A FBA_EDC6 T2 FBA_CMD30 J5 CA9_A
M3 VSS#M14 VDDQ#K13 K2 DQ7_A/DQ1_A FBA_DBI6 R2 EDC0_B FBA_CMD33 G10 CABI_n_A N5 SNN_FBA_TCK1 TPG26
N1 VSS#M3 VDDQ#K2 L1 FBA_EDC5 C2 DBI0_N_B CKE_n_A TCK F10 SNN_FBA_TDI1 TPG27
N12 VSS#N1 VDDQ#L1 L14 FBA_DBI5 D2 EDC0_A VMA_WCK67 R4 TDI N10 SNN_FBA_TDO1 TPG28
VSS#N12 VDDQ#L14 DBI0_N_A [20] VMA_WCK67 VMA_WCK67# WCK_t_B/NC FBA_CMD27 TDO SNN_FBA_TMS1 FBVDDQ_MEM FBVDDQ_MEM
N14 N11 R5 L3 F5 TPG29
N3 VSS#N14 VDDQ#N11 N4 VMA_WCKB45 D4 [20] VMA_WCK67# WCK_c_B/NC FBA_CMD28 M11 CA0_B TMS
VSS#N3 VDDQ#N4 [20] VMA_WCKB45 WCK_t_A CA1_B Close to DRAM Close to DRAM
P11 P1 VMA_WCKB45# D5 FBA_CMD19 M4
P4 VSS#P11 VDDQ#P1 P14 [20] VMA_WCKB45# WCK_c_A FBA_CMD20 L12 CA2_B
R1 VSS#P4 VDDQ#P14 T1 VMA_DQ61 P13 FBA_CMD22 L5 CA3_B CG490 CG491 CG492 CG493 CG494 CG495
R12 VSS#R1 VDDQ#T1 T11 X16 X8 VMA_DQ56 U13 DQ8_B/DQ13_B FBA_CMD21 L10 CA4_B
R14 VSS#R12 VDDQ#T11 T14 VMA_DQ34 B11 VMA_DQ62 M13 DQ9_B/DQ11_B FBA_CMD24 K12 CA5_B J14 FBA_ZQ_2_A 121_1%_2 RG130 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6
R3
T10
VSS#R14
VSS#R3
VDDQ#T14
VDDQ#T4
T4
U10
VMA_DQ39
VMA_DQ37
G13
E13
DQ8_A
DQ9_A/DQ15_A
NC
NC QD48~55 VMA_DQ63
VMA_DQ59
N13
U12
DQ10_B/DQ15_B
DQ11_B/DQ14_B
FBA_CMD23
FBA_CMD26
K11
K4
CA6_B
CA7_B
ZQ_A
ZQ_B
K14

T12
T3
T5
VSS#T10
VSS#T12
VSS#T3
VSS#T5
VDDQ#U10
VDDQ#U5
U5

1V8_AON
QD40~47 VMA_DQ38
VMA_DQ36
VMA_DQ32
VMA_DQ33
F13
E12
B12
DQ10_A/DQ13_A
DQ11_A/DQ14_A
DQ12_A
DQ13_A/DQ10_A
NC
NC
NC
VMA_DQ60
VMA_DQ57
VMA_DQ58
P12
V12
U11
DQ12_B/DQ10_B
DQ13_B/DQ12_B
DQ14_B/DQ9_B
DQ15_B/DQ8_B
FBA_CMD17
FBA_CMD30
FBA_CMD33
K3
K5
M10
CA8_B
CA9_B
CABI_n_B
CKE_n_B
FBA_ZQ_2_B 121_1%_2 RG131

U1 B13 NC
U14 VSS#U1 A10 VMA_DQ35 A12 DQ14_A/DQ11_A NC FBA_EDC7 T13
V11 VSS#U14 VPP#A10 A5 DQ15_A/DQ9_A NC FBA_DBI7 R13 EDC1_B FBA_CMD18 J1
V13 VSS#V11 VPP#A5 V10 FBA_EDC4 C13 DBI1_n_B RESET_n G5 SNN_FBA_RFU_G5_1 TPG30
V2 VSS#V13 VPP#V10 V5 FBA_DBI4 D13 EDC1_A GND VMA_WCKB67 R11 NC#G5 M5 SNN_FBA_RFU_M5_1 TPG31
VSS#V2 VPP#V5 DBI1_n_A [20] VMA_WCKB67 VMA_WCKB67# R10 WCK1_t_B VMA_CLK1# NC#M5
V4 NC K10
VSS#V4 VMA_WCK45 D11 [20] VMA_WCKB67# WCK1_c_B [20] VMA_CLK1# VMA_CLK1 J10 CK_c 1V8_AON
[20] VMA_WCK45 VMA_WCK45# D10 WCK1_t_A NC [20] VMA_CLK1 CK_t
[20] VMA_WCK45# WCK1_c_A K4Z80325BC-HC14(DC2001) option
NC
K4Z80325BC-HC14(DC2001)
K4Z80325BC-HC14(DC2001)
K4Z80325BC-HC14(DC2001) CG496 CG497 CG498 CG499 CG500

A 4.7u/6.3V_6 1u/6.3V_2 *0.47u/6.3V_2 1u/6.3V_2 *0.47u/6.3V_2 A

FBVDDQ_MEM FBVDDQ_MEM FBVDDQ_MEM FBVDDQ_MEM

Right under DRAM Right under DRAM Close to DRAM Close to DRAM

CG501 CG502 CG503 CG504 CG505 CG506 CG507 CG508 CG509 CG510 CG511 CG512 CG513 CG514 CG515 CG516 CG517 CG518 CG519 CG520 CG521 CG522 CG523 CG524

*0.47u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 1u/6.3V_2 1u/6.3V_2 *0.47u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 *0.47u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
D 1A
N18P-G62-6/7 (GDDR6)
NB5 Date: Wednesday, April 08, 2020 Sheet 24 of 106
5 4 3 2 1
 5 4 3 2 1

MEMORY: FBB Partition 31..0

FBVDDQ_MEM
1V8_AON
[20,22,23,24,101]
[19,21,22,23,24,98,101,105]
Reference X3BA schematic [20,25] FBB_DBI[7:0]
40OHM_NETCLASS1

FBB_DBI0
[20,25] FBB_EDC[7:0]
40OHM_NETCLASS1

FBB_EDC0
FBVDDQ_MEM FBVDDQ_MEM

JS-N18-0706
25
FBB_DBI1 FBB_EDC1
FBB_DBI2 FBB_EDC2
FBB_DBI3 FBB_EDC3 CG525 CG526 CG527 CG528 CG529 CG530 CG531 CG532 CG533 CG534 CG535 CG536
FBVDDQ_MEM FBB_DBI4 FBB_EDC4 FBVDDQ_MEM
VRAM2A *0.47u/6.3V_2 1u/6.3V_2 *0.47u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 *0.47u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 *0.47u/6.3V_2 1u/6.3V_2
FBB_DBI5 FBB_EDC5
A11 FBB_DBI6 FBB_EDC6
A13 VSS#A11 FBB_DBI7 FBB_EDC7
A2 VSS#A13 A1
A4 VSS#A2 VDD#A1 A14 RG132
B1 VSS#A4 VDD#A14 E10
[20,25] FBB_CMD[33:0]
*549/F_4 VREFC_VMA1 0.4MM=16mils
B14 VSS#B1 VDD#E10 E5
C10 VSS#B14 VDD#E5 H13 FBB_VREFC
VSS#C10 VDD#H13 FBB_VREFC [25]
C12 H2
C3 VSS#C12 VDD#H2 L13
D C5 VSS#C3 VDD#L13 L2 RG133 RG134 CG537 D
D1 VSS#C5 VDD#L2 P10 [20] VMB_DQ[31:0]
1K/F_2 *931/F_4 *820p/50V_4
D12 VSS#D1 VDD#P10 P5
D14
D3
E11
VSS#D12
VSS#D14
VSS#D3
VSS#E11
VDD#P5
VDD#V1
VDD#V14
V1
V14 M9 JS-N18-0709 swap VRAM2D
E4

MEM_VREF_CTL_QB
F1 VSS#E4 B10 VRAM2B VRAM2C FBB_CMD13 H3 K1 FBB_VREFC
F12 VSS#F1 VDDQ#B10 B5 FBB_CMD15 G11 CA0_A VREFC FBB_VREFC [25]
F14 VSS#F12 VDDQ#B5 C1 NORMAL NORMAL FBB_CMD0 G4 CA1_A FBVDDQ_MEM FBVDDQ_MEM VREFC IS NOT USED IN
F3 VSS#F14
VSS#F3
VDDQ#C1
VDDQ#C11
C11 VMB_DQ7
VMB_DQ2
G2
DQ0_A/DQ7_A
VMB_DQ28
VMB_DQ29
N2
DQ0_B/DQ6_B
FBB_CMD9
FBB_CMD11
H12 CA2_A
CA3_A
Around DRAM Around DRAM x16 CONFIGURATION
G1 C14 B3 P3 H5
1K OHM PULL-DOWN IS
G12
G14
G3
VSS#G1
VSS#G12
VSS#G14
VSS#G3
VDDQ#C14
VDDQ#C4
VDDQ#E1
VDDQ#E14
C4
E1
E14
QD0~7 VMB_DQ6
VMB_DQ4
VMB_DQ0
VMB_DQ3
F2
E3
B4
DQ1_A/DQ2_A
DQ2_A/DQ6_A
DQ3_A/DQ4_A
DQ4_A/DQ0_A
QD24~31
VMB_DQ30
VMB_DQ31
VMB_DQ25
VMB_DQ27
M2
P2
U3
DQ1_B/DQ4_B
DQ2_B/DQ7_B
DQ3_B/DQ5_B
DQ4_B/DQ2_B
FBB_CMD12
FBB_CMD3
FBB_CMD4
FBB_CMD6
H10
J12
J11
CA4_A
CA5_A
CA6_A
CA7_A
CG538 CG539 CG540
CG541 CG542 CG543
IN PLACE OF THE 1.33K
FOR R104
H11 F11 B2 V3 J4 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6
H4 VSS#H11 VDDQ#F11 F4 VMB_DQ5 E2 DQ5_A/DQ3_A VMB_DQ26 U4 DQ5_B/DQ1_B FBB_CMD5 J3 CA8_A 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6
L11 VSS#H4 VDDQ#F4 H1 VMB_DQ1 A3 DQ6_A/DQ5_A VMB_DQ24 U2 DQ6_B/DQ0_B FBB_CMD8 J5 CA9_A
L4 VSS#L11 VDDQ#H1 H14 DQ7_A/DQ1_A DQ7_B/DQ3_B FBB_CMD7 G10 CABI_n_A N5 FBB_FB_TCK0

3
TPG32
M1 VSS#L4 VDDQ#H14 J13 FBB_EDC0 C2 FBB_EDC3 T2 CKE_n_A TCK F10 FBB_FB_TDI0 TPG33 MEM_VREF_CTL 2 QG21
VSS#M1 VDDQ#J13 FBB_DBI0 EDC0_A FBB_DBI3 EDC0_B TDI FBB_FB_TDO0 [21,24] MEM_VREF_CTL
M12 J2 D2 R2 N10 TPG34 *PJC138K
M14 VSS#M12 VDDQ#J2 K13 DBI0_N_A DBI0_N_B FBB_CMD10 L3 TDO F5 FBB_FB_TMS0 TPG35
M3 VSS#M14 VDDQ#K13 K2 VMB_WCK01 D4 VMB_WCKB23 R4 FBB_CMD1 M11 CA0_B TMS

1
N1 VSS#M3 VDDQ#K2 L1 [20] VMB_WCK01 VMB_WCK01# D5 WCK_t_A [20] VMB_WCKB23 VMB_WCKB23# R5 WCK_t_B/NC FBB_CMD32 M4 CA1_B FBVDDQ_MEM FBVDDQ_MEM
N12 VSS#N1 VDDQ#L1 L14 [20] VMB_WCK01# WCK_c_A [20] VMB_WCKB23# WCK_c_B/NC FBB_CMD14 L12 CA2_B
VSS#N12 VDDQ#L14 CA3_B
Close to DRAM Close to DRAM
N14 N11 FBB_CMD11 L5
N3 VSS#N14 VDDQ#N11 N4 X16 X8 FBB_CMD12 L10 CA4_B
P11 VSS#N3 VDDQ#N4 P1 VMB_DQ10 B11 VMB_DQ21 P13 FBB_CMD3 K12 CA5_B J14 FBB_ZQ_1_A 121_1%_2 RG135 CG544 CG545 CG546 CG547 CG548 CG549
P4 VSS#P11 VDDQ#P1 P14 VMB_DQ13 G13 DQ8_A NC VMB_DQ16 U13 DQ8_B/DQ13_B FBB_CMD4 K11 CA6_B ZQ_A K14
R1 VSS#P4 VDDQ#P14 T1 VMB_DQ14 E13 DQ9_A/DQ15_A NC VMB_DQ23 M13 DQ9_B/DQ11_B FBB_CMD6 K4 CA7_B ZQ_B 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6
R12
R14
R3
VSS#R1
VSS#R12
VSS#R14
VSS#R3
VDDQ#T1
VDDQ#T11
VDDQ#T14
VDDQ#T4
T11
T14
T4
QD8~15 VMB_DQ15
VMB_DQ12
VMB_DQ8
VMB_DQ9
F13
E12
B12
DQ10_A/DQ13_A
DQ11_A/DQ14_A
DQ12_A
DQ13_A/DQ10_A
NC
NC
NC
QD16~23 VMB_DQ22
VMB_DQ19
VMB_DQ20
VMB_DQ17
N13
U12
P12
DQ10_B/DQ15_B
DQ11_B/DQ14_B
DQ12_B/DQ10_B
DQ13_B/DQ12_B
FBB_CMD5
FBB_CMD8
FBB_CMD7
K3
K5
M10
CA8_B
CA9_B
CABI_n_B
CKE_n_B
FBB_ZQ_1_B 121_1%_2 RG136

T10 U10 B13 NC V12

T12 VSS#T10 VDDQ#U10 U5 VMB_DQ11 A12 DQ14_A/DQ11_A NC VMB_DQ18 U11 DQ14_B/DQ9_B
T3 VSS#T12 VDDQ#U5 DQ15_A/DQ9_A NC DQ15_B/DQ8_B FBB_CMD2 J1
T5 VSS#T3 1V8_AON FBB_EDC1 C13 FBB_EDC2 T13 RESET_n G5 SNN_FBB_RFU_G5 TPG36
U1 VSS#T5 FBB_DBI1 D13 EDC1_A GND FBB_DBI2 R13 EDC1_B NC#G5 M5 SNN_FBB_RFU_M5 TPG37
U14 VSS#U1 A10 DBI1_n_A NC DBI1_n_B VMB_CLK0# K10 NC#M5
V11 VSS#U14 VPP#A10 A5 VMB_WCKB01 D11 VMB_WCK23 R11 [20] VMB_CLK0# VMB_CLK0 J10 CK_c 1V8_AON
VSS#V11 VPP#A5 [20] VMB_WCKB01 VMB_WCKB01# D10 WCK1_t_A [20] VMB_WCK23 VMB_WCK23# R10 WCK1_t_B [20] VMB_CLK0 CK_t
V13 V10 NC option
V2 VSS#V13 VPP#V10 V5 [20] VMB_WCKB01# WCK1_c_A NC [20] VMB_WCK23# WCK1_c_B
VSS#V2 VPP#V5 K4Z80325BC-HC14(DC2001)
V4 K4Z80325BC-HC14(DC2001)
VSS#V4 K4Z80325BC-HC14(DC2001)
CG550 CG551 CG552 CG553 CG554

4.7u/6.3V_6 *0.47u/6.3V_2 1u/6.3V_2 *0.47u/6.3V_2 1u/6.3V_2

K4Z80325BC-HC14(DC2001)

C C

FBVDDQ_MEM FBVDDQ_MEM FBVDDQ_MEM FBVDDQ_MEM

Right under DRAM Right under DRAM Close to DRAM Close to DRAM

CG555 CG556 CG557 CG558 CG559 CG560 CG561 CG562 CG563 CG564 CG565 CG566 CG567 CG568 CG569 CG570 CG571 CG572 CG573 CG574 CG575 CG576 CG577 CG578

1u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 *0.47u/6.3V_2 1u/6.3V_2 1u/6.3V_2 *0.47u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 1u/6.3V_2

MEMORY: FBB Partition 63..32

FBVDDQ_MEM FBVDDQ_MEM

40OHM_NETCLASS1 40OHM_NETCLASS1
[20,25] FBB_DBI[7:0] [20,25] FBB_EDC[7:0]
FBB_DBI0 FBB_EDC0
FBVDDQ_MEM FBB_DBI1 FBB_EDC1
VRAM1A FBB_DBI2 FBB_EDC2 CG579 CG580 CG581 CG582 CG583 CG584 CG585 CG586 CG587 CG588 CG589 CG590
A11 FBB_DBI3 FBB_EDC3
VSS#A11 1u/6.3V_2 1u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 1u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2
A13 FBB_DBI4 FBB_EDC4
A2 VSS#A13 A1 FBB_DBI5 FBB_EDC5
A4 VSS#A2 VDD#A1 A14 FBB_DBI6 FBB_EDC6
B1 VSS#A4 VDD#A14 E10 FBB_DBI7 FBB_EDC7
B14 VSS#B1 VDD#E10 E5
C10 VSS#B14 VDD#E5 H13
C12 VSS#C10 VDD#H13 H2
C3 VSS#C12 VDD#H2 L13
VSS#C3 VDD#L13 [20,25] FBB_CMD[33:0]
C5 L2
D1 VSS#C5 VDD#L2 P10
D12 VSS#D1 VDD#P10 P5
B VSS#D12 VDD#P5 [20] VMB_DQ[63:32] B
D14 V1
D3 VSS#D14 VDD#V1 V14
E11 VSS#D3 VDD#V14
E4 VSS#E11
F1
F12
F14
VSS#E4
VSS#F1
VSS#F12
VSS#F14
VDDQ#B10
VDDQ#B5
VDDQ#C1
B10
B5
C1
M10 JS-N18-0709 swap
VRAM1C
VRAM1D
VREFC_VMA1 0.4MM=16mils
F3 C11
G1 VSS#F3 VDDQ#C11 C14 VRAM1B FBB_CMD29 H3 K1 FBB_VREFC
G12 VSS#G1 VDDQ#C14 C4 NORMAL FBB_CMD31 G11 CA0_A VREFC FBB_VREFC [25]
G14 VSS#G12 VDDQ#C4 E1 NORMAL VMB_DQ53 N2 FBB_CMD16 G4 CA1_A FBVDDQ_MEM FBVDDQ_MEM
G3 VSS#G14 VDDQ#E1 E14 VMB_DQ45 G2 VMB_DQ52 P3 DQ0_B/DQ6_B FBB_CMD25 H12 CA2_A
VSS#G3 VDDQ#E14 DQ0_A/DQ7_A DQ1_B/DQ4_B CA3_A Around DRAM Around DRAM
H11 F11 VMB_DQ40 B3 VMB_DQ54 M2 FBB_CMD22 H5 CG591
H4 VSS#H11 VDDQ#F11 F4 VMB_DQ46 F2 DQ1_A/DQ2_A VMB_DQ55 P2 DQ2_B/DQ7_B FBB_CMD21 H10 CA4_A *820p/50V_4
L11
L4
M1
VSS#H4
VSS#L11
VSS#L4
VSS#M1
VDDQ#F4
VDDQ#H1
VDDQ#H14
VDDQ#J13
H1
H14
J13 QD32~39
VMB_DQ44
VMB_DQ42
VMB_DQ41
VMB_DQ47
E3
B4
B2
DQ2_A/DQ6_A
DQ3_A/DQ4_A
DQ4_A/DQ0_A
DQ5_A/DQ3_A
QD56~63 VMB_DQ51
VMB_DQ49
VMB_DQ50
VMB_DQ48
U3
V3
U4
DQ3_B/DQ5_B
DQ4_B/DQ2_B
DQ5_B/DQ1_B
DQ6_B/DQ0_B
FBB_CMD24
FBB_CMD23
FBB_CMD26
FBB_CMD17
J12
J11
J4
CA5_A
CA6_A
CA7_A
CA8_A Matt change to unmount-1025
CG592

22u/6.3V_6
CG593

22u/6.3V_6
CG594

22u/6.3V_6
CG595 CG596 CG597

M12 J2 E2 U2 J3 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6

M14 VSS#M12 VDDQ#J2 K13 VMB_DQ43 A3 DQ6_A/DQ5_A DQ7_B/DQ3_B FBB_CMD30 J5 CA9_A
M3 VSS#M14 VDDQ#K13 K2 DQ7_A/DQ1_A FBB_EDC6 T2 FBB_CMD33 G10 CABI_n_A N5 SNN_FBB_TCK1 TPG38
N1 VSS#M3 VDDQ#K2 L1 FBB_EDC5 C2 FBB_DBI6 R2 EDC0_B CKE_n_A TCK F10 SNN_FBB_TDI1 TPG39
N12 VSS#N1 VDDQ#L1 L14 FBB_DBI5 D2 EDC0_A DBI0_N_B TDI N10 SNN_FBB_TDO1 TPG40
N14 VSS#N12 VDDQ#L14 N11 DBI0_N_A VMB_WCK67 R4 FBB_CMD27 L3 TDO F5 SNN_FBB_TMS1 TPG41
N3 VSS#N14 VDDQ#N11 N4 VMB_WCKB45 D4 [20] VMB_WCK67 VMB_WCK67# R5 WCK_t_B/NC FBB_CMD28 M11 CA0_B TMS
P11 VSS#N3 VDDQ#N4 P1 [20] VMB_WCKB45 VMB_WCKB45# D5 WCK_t_A [20] VMB_WCK67# WCK_c_B/NC FBB_CMD19 M4 CA1_B FBVDDQ_MEM FBVDDQ_MEM
VSS#P11 VDDQ#P1 [20] VMB_WCKB45# WCK_c_A FBB_CMD20 CA2_B
P4 P14 L12 Close to DRAM Close to DRAM
R1 VSS#P4 VDDQ#P14 T1 FBB_CMD22 L5 CA3_B
R12 VSS#R1 VDDQ#T1 T11 X16 X8 VMB_DQ60 P13 FBB_CMD21 L10 CA4_B
R14 VSS#R12 VDDQ#T11 T14 VMB_DQ34 B11 VMB_DQ59 U13 DQ8_B/DQ13_B FBB_CMD24 K12 CA5_B J14 FBB_ZQ_2_A 121_1%_2 RG137 CG598 CG599 CG600 CG601 CG602 CG603
R3 VSS#R14 VDDQ#T14 T4 VMB_DQ38 G13 DQ8_A NC VMB_DQ62 M13 DQ9_B/DQ11_B FBB_CMD23 K11 CA6_B ZQ_A K14
T10 VSS#R3 VDDQ#T4 U10 VMB_DQ37 E13 DQ9_A/DQ15_A NC VMB_DQ63 N13 DQ10_B/DQ15_B FBB_CMD26 K4 CA7_B ZQ_B 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6
T12
T3
T5
VSS#T10
VSS#T12
VSS#T3
VSS#T5
VDDQ#U10
VDDQ#U5
U5

1V8_AON
QD40~47 VMB_DQ39
VMB_DQ36
VMB_DQ32
VMB_DQ33
F13
E12
B12
DQ10_A/DQ13_A
DQ11_A/DQ14_A
DQ12_A
DQ13_A/DQ10_A
NC
NC
NC
QD48~55 VMB_DQ58
VMB_DQ61
VMB_DQ56
VMB_DQ57
U12
P12
V12
DQ11_B/DQ14_B
DQ12_B/DQ10_B
DQ13_B/DQ12_B
DQ14_B/DQ9_B
FBB_CMD17
FBB_CMD30
FBB_CMD33
K3
K5
M10
CA8_B
CA9_B
CABI_n_B
CKE_n_B
FBB_ZQ_2_B 121_1%_2 RG138

U1 B13 NC U11
U14 VSS#U1 A10 VMB_DQ35 A12 DQ14_A/DQ11_A NC DQ15_B/DQ8_B
V11 VSS#U14 VPP#A10 A5 DQ15_A/DQ9_A NC FBB_EDC7 T13 FBB_CMD18 J1
V13 VSS#V11 VPP#A5 V10 FBB_EDC4 C13 FBB_DBI7 R13 EDC1_B RESET_n G5 SNN_FBB_RFU_G5_1 TPG42
V2 VSS#V13 VPP#V10 V5 FBB_DBI4 D13 EDC1_A GND DBI1_n_B NC#G5 M5 SNN_FBB_RFU_M5_1 TPG43
V4 VSS#V2 VPP#V5 DBI1_n_A NC VMB_WCKB67 R11 VMB_CLK1# K10 NC#M5
VSS#V4 VMB_WCK45 D11 [20] VMB_WCKB67 VMB_WCKB67#R10 WCK1_t_B [20] VMB_CLK1# VMB_CLK1 CK_c
J10
[20] VMB_WCK45 VMB_WCK45# D10 WCK1_t_A NC [20] VMB_WCKB67# WCK1_c_B [20] VMB_CLK1 CK_t 1V8_AON
[20] VMB_WCK45# WCK1_c_A NC
K4Z80325BC-HC14(DC2001) K4Z80325BC-HC14(DC2001) option
K4Z80325BC-HC14(DC2001)
K4Z80325BC-HC14(DC2001)
CG604 CG605 CG606 CG607 CG608

4.7u/6.3V_6 *0.47u/6.3V_2 *0.47u/6.3V_2 1u/6.3V_2 1u/6.3V_2

A A

FBVDDQ_MEM FBVDDQ_MEM FBVDDQ_MEM FBVDDQ_MEM

Right under DRAM Right under DRAM Close to DRAM Close to DRAM

CG609 CG610 CG611 CG612 CG613 CG614 CG615 CG616 CG617 CG629 CG630 CG631 CG618 CG619 CG620 CG621 CG622 CG623 CG624 CG625 CG626 CG627 CG628 CG632

*0.47u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 1u/6.3V_2 1u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 *0.47u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2 *0.47u/6.3V_2

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
D 1A
N18P-G62-6/7(GDDR6)
NB5 Date: Wednesday, April 08, 2020 Sheet 25 of 106
5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
D 1A
N18P-G62
NB5 Date: Wednesday, April 08, 2020 Sheet 26 of 106
5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
D 1A
N18P-G62
NB5 Date: Wednesday, April 08, 2020 Sheet 27 of 106
5 4 3 2 1
 1 2 3 4 5 6 7 8

Reference G3DC schematic eDP Conn.

LID Switch 2.5A / 100mils
28

42
+3VLCD_CON 40
CE5 0.047u/25V_4 09/17 RE5 change to 0201 39
09/17 RE1, RE3, RE4 change to 0201 CE1 0.047u/25V_4 12/05 RE5 change to short pad 38
12/05 RE1 change to short pad [13] CPU_EDP_HPD RE5 *0_5%_2/S
CE2 22p/50V_4 CE3 *10p/50V_4 CE34 0.1u/16V_2 eDP_AUXP_C 37
PN_BLON BLON_CON [3] INT_eDP_AUXP eDP_AUXN_C 36
RE1 *0_5%_2/S DE1 2 1 RB500V-40 RE2 100K_1%_2 CE4 *4.7u/25V_6 CE32 0.1u/16V_2
[42] EMU_LID [3] INT_eDP_AUXN 35

、 eDP_TXN0_C 34
09/17 RE2 change to 0201 CE25 0.1u/16V_2

、、
[3] INT_eDP_TXN0 eDP_TXP0_C 33
[11] PCH_LVDS_BLON RE3 1K_1%_2 03/05 reverse RE28 RE29 [3] INT_eDP_TXP0 CE24 0.1u/16V_2
A 32 A
03/30 RE28 RE29 change to mount 31
CE27 0.1u/16V_2 eDP_TXN1_C
04/10 RE28 RE29 change to unmount [3] INT_eDP_TXN1 eDP_TXP1_C 30
RE4 100K_1%_2 [3] INT_eDP_TXP1 CE26 0.1u/16V_2
INT_eDP_AUXP RE29 *499K_1%_2 29
CE29 0.1u/16V_2 eDP_TXN2_C 28
INT_eDP_AUXN [3] INT_eDP_TXN2 eDP_TXP2_C 27
RE28 *499K_1%_2 [3] INT_eDP_TXP2 CE28 0.1u/16V_2
26
CE31 0.1u/16V_2 eDP_TXN3_C 25
[3] INT_eDP_TXN3 24
CE30 0.1u/16V_2 eDP_TXP3_C
[3] INT_eDP_TXP3 23
3 4 USBP6-_C 22
[9] USBP6- 21
2 1 USBP6+_C
[9] USBP6+ 20

LCD Blight For DDS

TP9191
TP9195
LE2 MCM2012B900GBE
eDP_I2C_CLK
eDP_I2C_DATA
19
18
17
16
+3.5V_IR 15
3 4 USBP5-_C 14
[9] USBP5- USBP5+_C 13
2 1
[9] USBP5+ 12
LE9 MCM2012B900GBE
2 1 BLM15AG121SN1D DIGITAL_CLK_L 11
09/23 delete current resistor then add LE10 [10] PCH_DIGITAL_CLK
LE4
10
09/25 LE10 change footprint to f4_5x3_2-5_23 LE5 2 1 BLM15AG121SN1D DIGITAL_D1_L
[10] PCH_DIGITAL_D1 9
LE10
+VIN
2 1 2A / 80mils +VIN_BLIGHT
+3V_CAM OLED_ID_R 8
CE8 CE9 CE10 CE11 VADJ1 7
FUSE SMD 1.5A 24V POLY *10p/50V_4 22p/50V_4 *10p/50V_4 4.7u/25V_6 BLON_CON 6
5
4
09/23 delete current resistor then add LE11 3
B 09/25 LE11 change footprint to f2_1x1_4-2_2-0_8h 2
B

+VIN +VIN_BLIGHT +3V_CAM +VIN_BLIGHT 1

41
CE13 CE14
2 1 *10p/50V_4 *4.7u/25V_6
+3V
09/17 RE9, RE21 change to 0201 CNE1
LE11 FUSE1.5A 8V_POLY 10/04 Add OLED_ID to PCH and add RE27 51693-0400T-V01
CE15 CE16 CE17 CE18 CE19 CE7 CE12 CE38 10/22 RE27 change to un-mount
4.7u/25V_6 0.1u/25V_4 0.1u/25V_4 0.1u/25V_4 0.1u/25V_4 0.1u/25V_4 0.01u/50V_4 *0.01u/50V_4 RE27 OLED_ID_R
*1K_1%_2
[12] OLED_ID

[11] PCH_DPST_PWM
RE9 1K_1%_2 VADJ1 DFFC40FR103
RE21 *1K_1%_2

+3VLCD_CON
[42] EC_PWM CIS OK
For DDS
+3V CE21 33P/50V_4 For DDS
RE10 100K_1%_2
RE22 +3V
eDP_AUXN_C RE11 *100K_1%_2 *10K_5%_2
eDP_AUXP_C RE12 *100K_1%_2 +3V eDP_I2C_CLK RI142 *4.7K_2
OLED_ID_R eDP_I2C_DATA RI143 *4.7K_2
09/17 RI142, RI143 change to 0201
CE20 0.1u/16V_2
RE23
*10K_5%_2 RE7 *1K_1%_2 PCH_DPST_PWM

10/17 Add RE22, RE23 for OLED panel 09/17 RE7 change to 0201

C C

IR CAM Power SW
3V LCD Power SW
+5V

+3V
CE33 *1U/6.3V_4
09/17 RE13 change to 0201 UE2
RE13 SY6288C20AAC
09/23 delete current resistor then add RE25 CE40 1u/6.3V_4 5 3
*10K_5%_2 2.5A / 100mils IN OCB +3VLCD_Ue2 +3VLCD_CON
2.5A / 100mils
4

UE1 +3.5V_IR
LE6 *2.2uH_2.5x2.0x1.2 +3.5V_IR_Le6
VIN

GND
5 3 1 2 RE25 *0_5%_8 4 1 RE26 *0_5%_8/S
PG LX [11] PCH_DISP_ON EN OUT
CE41 CE42 CE43

2
CE35 CE36 CE37 RE20 09/23 delete current resistor then add RE26 0.01u/50V_4 0.1u/16V_4 10u/6.3V_4
RE17 *0_5%_4 1 2 100K_1%_2 04/06 RE26 change to short pad
5,42,87,92,93,95] MAINON EN GND *0.01U/50V_4 *10u/6.3V_4 *0.1u/16V_4 09/17 RE20 change to 0201
VFB

D *G5719CTB1U R1 D
6

RE18 *97.6K_1%_4 +3.5V_IR

VO=(0.6(R1+R2)/R2)
R2 RE19
*20K_1%_4
PROJECT : G3BE
[9,10,11,13,16,17,18,21,30,31,33,34,36,38,39,41,42,48,50,51,52,82,88,91,95,98,99,101,105] +3V Quanta Computer Inc.
[10,32,34,35,42,43,46,48,51,82,86,88,104,106] +3VPCU
[30,31,38,39,48,49,50,51,52,89,90,91,95,104] +5V Size Document Number Rev
Custom 1A
eDP CONN/CAM/D-MIC
[41,49,50,51,52,82,86,87,89,91,92,93,97,101] +VIN
NB5 Date: Friday, April 10, 2020 Sheet 28 of 106
1 2 3 4 5 6 7 8
 5 4 3 2 1

D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
eDP Mux(NA)
NB5 Date: Wednesday, April 08, 2020 Sheet 29 of 106
5 4 3 2 1
 5 4 3 2 1

30
+1.8V [22,39,52,95]
+5V [28,31,38,39,48,49,50,51,52,89,90,91,95,104]

Reference G3Z schematic

02/12 Delete LH1~LH4 & RH2~RH5 、RH7~RH10 change to short pad
+3V +3V_HDMI_ITE +OVDD33

RH45 *0_5%_6/S RH1 *0_5%_6/S +OVDD33 +IVDD10 TXC_HDMI+C RH2 *0_4/S TXC_HDMI+CN TX1_HDMI+C RH3 *0_4/S TX1_HDMI+CN
TXC_HDMI-C RH4 *0_4/S TXC_HDMI-CN TX1_HDMI-C RH5 *0_4/S TX1_HDMI-CN
CH1 CH2 CH3 CH4 +RGLRO +RGLRI +1.8V

MPCSDA
MPCSCL
0.1U/16V_4 0.1U/16V_4 0.1U/16V_4 0.1U/16V_4 TPH1 RH6 *0_5%_6/S

RXSDA
RXSCL

TXSDA
TXSCL
09/23 delete current resistor then add RH45 * TPH2
D 12/05 RH45 change to short pad close pin 7 31 close pin 3 * D

CH5 TX0_HDMI+C RH7 *0_4/S TX0_HDMI+CN TX2_HDMI+C RH8 *0_4/S TX2_HDMI+CN

+VCC33 +AVCC10 10U/6.3V_4 TX0_HDMI-C RH9 *0_4/S TX0_HDMI-CN TX2_HDMI-C RH10 *0_4/S TX2_HDMI-CN
UH1

36
35
34
33
32
31
30
29
28
27
26
25
FH1 IT66317FN
1 2

NC#2
RXSCL
RXSDA
PCSCL
PCSDA
OVDD33#2
TXSDA
TXSCL
IVDD10#1
RGLRO

NC#1
RGLRI
PBY160808T-601Y-N
CH6 CH7 CH8

4.7U/6.3V_4 0.1U/16V_4 0.1U/16V_4 CH11 0.1u/16V_4 TX2_HDMI+ 37 24 TX2_HDMI+C

[21] GPU_D2 TX2_HDMI- RX2P TX2P TX2_HDMI-C
CH9 0.1u/16V_4 38 23
[21] GPU_D2# TX1_HDMI+ RX2M TX2M TX1_HDMI+C
close pin 14 close pin 46 CH10 0.1u/16V_4 39 22
[21] GPU_D1 TX1_HDMI- RX1P TX1P TX1_HDMI-C
[21] GPU_D1# CH12 0.1u/16V_4 40 21
41 RX1M TX1M 20
CH13 0.1u/16V_4 TX0_HDMI+ 42 RAVCC10 TAVCC10 19 TX0_HDMI+C +AVCC10
[21] GPU_D0 TX0_HDMI- RX0P TX0P TX0_HDMI-C
CH14 0.1u/16V_4 43 18
[21] GPU_D0# TXC_HDMI+ RX0M TX0M TXC_HDMI+C
CH15 0.1u/16V_4 44 17
[21] GPU_CLK TXC_HDMI- RXCP TXCP TXC_HDMI-C 20 21
CH16 0.1u/16V_4 45 16
[21] GPU_CLK# RXCM TXCM GND GND
+VCC33 46 15 +VCC10
47 RVCC33 TVCC10 14 TX2_HDMI+CN 1
+VCC10 +VCC33
D2+
48 RVCC10 TVCC33 13 2
Power source from +IVDD10 IVDD10#2 REXT
D2_Shield
TX2_HDMI-CN

OVDD33#1
3
internal LDO D2-

MCUVDD
MPCSDA
MPCSCL
49 TX1_HDMI+CN 4

ISPSDA
URDBG
ISPSCL
RXHPD
PCADR

TXHPD
D1+
output(Default) EPAD

I2CEN
RH12 5 D1_shield

RSV
*11K_1%_2 TX1_HDMI-CN 6 D1-
TX0_HDMI+CN 7 D0+
+OVDD33 8 D0_shield

1
2
3
4
5
6
7
8
9
10
11
12
TX0_HDMI-CN 9 D0-
TXC_HDMI+CN 10 CLK+
+RGLRO +1V +IVDD10 RH14 10K_1%_2MPCSCL DH1 BAT54AW-L 11

HPD_SINK_R
CLK_shield
RH15 10K_1%_2MPCSDA 2 TXC_HDMI-CN 12 CLK-
RH18 13 CEC
RH13 *0_5%_6/S RH17 *0_5%_6/S 47K_1%_2 3 5V_HSMBCK RH19 2.2K_5%_2 14 Utility
+5V_HDMIC 5V_HSMBDT RH20 SCL_SINK
GPIO 2.2K_5%_2 15 SCL
12/05 RH13 change to short pad CH19 CH20 CH21 RH22 22_1%_2 HPD_SINK 1 SDA_SINK 16 SDA
CH18 [13,21] HDMI_HPD CH22 *10p/25V_2 17 DDC/CEC GND
10U/6.3V_4 4.7U/6.3V_4 0.1U/16V_4 0.1U/16V_4 ISPSDA LP-ISML150/1.5A/8V_0805 CH23 *10p/25V_2 18
40 mils
+5V

、
ISPSCL FH2 19 HP_DET
PCADR 1 2 +5V_HDMIC
C close pin 28 48 +5V GND GND C

12/05 RH24 change to short pad HPD_SINK 22 23 2HE1748-002211F

+VCC10 09/25 FH2 change footprint to f2_1x1_4-2_2-0_8h CNH1
+OVDD33
FH3
RH24 *0_5%_2/S I2CEN CH24 CH25 CH26 CH27
1 2 *TVM0G5R5M220R 0.1U/16V_4 *TVM0G5R5M220R 220p/25V_2
PBY160808T-601Y-N URDBG
CH28 CH29
DFHD19MR641
0.1U/16V_4 0.1U/16V_4
CIS OK
close pin 15 close pin 47
+AVCC10 ESD
FH4
1 2
PBY160808T-601Y-N UH3
CH30 CH31 CH32 TX0_HDMI+CN 1 10 TX0_HDMI+CN
10/21 RH26 change to un-mount, RH30 change to mount Line-1 NC#4
4.7U/6.3V_4 0.1U/16V_4 0.1U/16V_4 TX0_HDMI-CN 2 9 TX0_HDMI-CN
Line-2 NC#3
+OVDD33 3
close pin 20 close pin 41 GND#1
TXC_HDMI+CN 4 7 TXC_HDMI+CN
Line-3 NC#2
TXC_HDMI-CN 5 6 TXC_HDMI-CN
Line-4 NC#1

Output *AZ1043-04F.R7G
Swing GPIO URDBG RH25 RH26 RH27
*22K_1%_4 *22K_1%_4 *100K_1%_2
Level 1 UH4
0 0 TX1_HDMI-CN 1 10 TX1_HDMI-CN
(Lowest) Line-1 NC#4
TX1_HDMI+CN 2 9 TX1_HDMI+CN
Level 2 Line-2 NC#3
B
0 1 GPIO
URDBG 3
B

(Default) PCADR GND#1

TX2_HDMI-CN 4 7 TX2_HDMI-CN
Line-3 NC#2
Level 3 1 0 TX2_HDMI+CN 5 6 TX2_HDMI+CN
Line-4 NC#1
*AZ1043-04F.R7G
Level 4 1 1
(Highest) RH29 RH30 RH31
100K_1%_2 100K_1%_2 *100K_1%_2

Close to HDMI connector

BAM10120003 - Ciss = 60pF, MAX Vgs = 1.0V

if DDC test fail, Change to BAM84060000 - Ciss = 35pF, MAX Vgs = 1.0V
Debug & Flash FW BAM70020021 - Ciss Under 15pF
RH35 *0_5%_2 +OVDD33

1V8_MAIN +OVDD33

RH28 10K_5%_2 RH38 10K_5%_2 RH36 RH37

2

1V8_MAIN +OVDD33
2

10K_1%_2 10K_1%_2
1 3 SCL_SINK_C 1 3 SCL_SINK
[21] GPU_DDCCLK
QH1 TXSCL
DMG1012T-7 QH3 TXSDA
RXSCL RH39 22_1%_2 NX7002AKW
A ISPSCL RH40 22_1%_2 A
ISPSDA RH41 22_1%_2
RXSDA RH42 22_1%_2
2
2

1 3 SDA_SINK_C 1 3 SDA_SINK
[21] GPU_DDCDATA
QH2
DMG1012T-7 QH4
1V8_MAIN RH34 10K_5%_2 +OVDD33 RH43 10K_5%_2 NX7002AKW

RH44 *0_5%_2
PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
HDMI/Re-driver
NB5 Date: Wednesday, April 08, 2020 Sheet 30 of 106
5 4 3 2 1
 5 4 3 2 1

+3VS5 [10,12,14,23,35,38,42,47,48,51,82,86,88,92,93,95,104,105]

31
+3V [9,10,11,13,16,17,18,21,28,30,33,34,36,38,39,41,42,48,50,51,52,82,88,91,95,98,99,101,105] +3V_DP +3V
+5V [28,30,38,39,48,49,50,51,52,89,90,91,95,104]

09/23 delete current resistor then add RD38

12/05 RD38 change to short pad
RD38 *0_5%_6/S

24

23

25
CND1
+3V_DP +3V_DP +3V_DP 09/17 RD1~RD3 change to 0201
1 GND C17724-12003-L
RD1 100K_1%_2 INT_DP_HPD 2 HPD
C_OUT_DP_TXP0 3
Close to UD1 Chip CAD_SNK ML_L0+
RD3 1M_5%_2 4
Config1
C_OUT_DP_TXN0 5
ML_L0-
RD2 5.1M_5%_2 6
Config2
7 GND
D 8 D
GND
CD1 CD2 CD3 CD4 CD5 CD6 CD18 CD7 CD8 CD9 CD10 CD11 CD19 C_OUT_DP_TXP1 9
ML_L1+
0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 4.7u/6.3V_4 0.1u/16V_4 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 0.1u/16V_4 0.1u/16V_4 2.2u/10V_4 C_OUT_DP_TXP3 10
ML_L3+
C_OUT_DP_TXN1 11 ML_L1-
C_OUT_DP_TXN3 12 ML_L3-
13
GND
14
GND
11/28 UD1 FP change to qfn40-6x4-4-49p-tusb546 C_OUT_DP_TXP2 15 ML_L2+
09/25 FD1 change footprint to f2_1x1_4-2_2-0_8h C_INT_DP_AUXP 16 AUX_CH+
01/30 RD4 change to short pad C_OUT_DP_TXN2 17
UD1 C_INT_DP_AUXN 18
ML_L2-
1.1A/6V

41
42
43
44
45
46
47
48
49

28
20
6

1
AUX_CH-
TUSB546-DCIRNQR 19
GND
FD1 1 2 *LP-ISML150/1.5A/8V_0805 +3V_DPL 20

GND#1
GND#2
GND#3
GND#4
GND#5
GND#6
GND#7
GND#8
GND#9

VCC#2

VCC#4
VCC#3
VCC#1
+3V_DP_OUT DPPWR

CD12 0.1u/16V_4 C_INT_DP_TXP0 9

[21] DP_D0 C_INT_DP_TXN0 DP0p
[21] DP_D0# CD15 0.1u/16V_4 10 RD4 *0_5%_8/S

22

21

26
DP0n CD13 CD14
CD16 0.1u/16V_4 C_INT_DP_TXP3 18 10u/6.3V_6 0.1u/16V_4
[21] DP_D3 C_INT_DP_TXN3 DP3p
CD17 0.1u/16V_4 19
[21] DP_D3# DP3n

CIS OK
RX1p
30 OUT_DP_TXP3 CD20
OUT_DP_TXN3 CD21
0.1u/16V_4 C_OUT_DP_TXP3
C_OUT_DP_TXN3
DFDI20FR021
31 0.1u/16V_4 RD5 *0_5%_4 +3V_DP
5 RX1n
4 SSRXp 40 OUT_DP_TXP0 CD22 0.1u/16V_4 C_OUT_DP_TXP0
SSRXn RX2p 39 OUT_DP_TXN0 CD23 0.1u/16V_4 C_OUT_DP_TXN0
DisplayPort Source RX2n
33 OUT_DP_TXP2 CD24 0.1u/16V_4 C_OUT_DP_TXP2
TX1p 34 OUT_DP_TXN2 CD25 0.1u/16V_4 C_OUT_DP_TXN2
8 TX1n
SSTXp For ESD

5
7 37 OUT_DP_TXP1 CD26 0.1u/16V_4 C_OUT_DP_TXP1 UD2
SSTXn TX2p 36 OUT_DP_TXN1 CD27 C_OUT_DP_TXN1 UD3
0.1u/16V_4 1
TX2n 4 CAD_SNK_R C_OUT_DP_TXN0 6 5 C_OUT_DP_TXN0
CAD_SNK 2 C_OUT_DP_TXP0 7 NC#1 IO4 4 C_OUT_DP_TXP0
NC#2 IO3 3
*TC7SH08FU(F) INT_DP_HPD 9 GND#1 2 INT_DP_HPD
C C

3
CAD_SNK 10 NC#3 IO2 1 CAD_SNK
NC#4 IO1
CD28 0.1u/16V_4 C_INT_DP_TXP2 15
[21] DP_D2 C_INT_DP_TXN2 DP2p CAD_SNK_R *CPDA10R5V0P-HF
CD29 0.1u/16V_4 16 29 RD7 *0_5%_2/S
[21] DP_D2# DP2n CAD_SNK/DCI_DAT
CD30 0.1u/16V_4 C_INT_DP_TXP1 12 09/17 RD7 change to 0201
[21] DP_D1 C_INT_DP_TXN1 DP1p INT_DP_HPD
[21] DP_D1# CD31 0.1u/16V_4 13 23 CTL1 RD8 *0_5%_4 12/05 RD7 change to short pad
DP1n CTL1/HPDIN 22 UD4
CTL0
CTL0/SDA 21 FLIP C_OUT_DP_TXP2 6 5 C_OUT_DP_TXP2
FLIP/SCL C_OUT_DP_TXN2 7 NC#1 IO4 4 C_OUT_DP_TXN2
+3V_DP C_INT_DP_AUXP RD9 *0_4/S C_INT_DP_AUXP_R 24 27 AUX_SRCP TP1 NC#2 IO3 3
C_INT_DP_AUXN RD11 *0_4/S C_INT_DP_AUXN_R 25 AUXp SBU1 26 AUX_SRCN TP2 C_OUT_DP_TXN1 9 GND#1 2 C_OUT_DP_TXN1

、RD11 change to short pad

AUXn SBU2 32 INT_DP_HPD RD13 *0_5%_2/S C_OUT_DP_TXP1 10 NC#3 IO2 1 C_OUT_DP_TXP1
DPEQ0/A1
SSEQ0/A0

HPDIN/DCI_CLK DP_HPD_PCH [13,21] NC#4 IO1

01/21 RD9
I2C_EN

DPEQ1
SSEQ1

RD14 +3V_DP_OUT
EQ0
EQ1

09/17 RD13 change to 0201 *CPDA10R5V0P-HF

*100K_5%_4
12/05 RD13 change to short pad
17

11
14

38
35
3

2
C_INT_DP_AUXN_R
C_INT_DP_AUXP_R UD5
I2C_EN C_INT_DP_AUXN 6 5 C_INT_DP_AUXN
SSEQ0_A0 C_INT_DP_AUXP 7 NC#1 IO4 4 C_INT_DP_AUXP
RD15 DPEQ0_A1 UD6 Current 1.5A NC#2 IO3 3
C_OUT_DP_TXN3 GND#1 C_OUT_DP_TXN3
*100K_5%_4 12/05 RD17 change to short pad 9 2
C_OUT_DP_TXP3 NC#3 IO2 C_OUT_DP_TXP3
TP3
TP9196
TP9197

+3VS5 RD17 *0_5%_6/S 5 1 10 1

IN#2 OUT NC#4 IO1
4 2
DPEQ1 IN#1 GND *CPDA10R5V0P-HF
* * *
[28,34,35,42,87,92,93,95] MAINON RD18 *0_5%_2/S 3 CD32 Layout note:Place close to mini display Conn
EN
0.1u/16V_4
09/17 RD18 change to 0201
12/05 RD18 change to short pad G5245AT11U
CD33
*0.1u/16V_4
+3V_DP
+3V_DP

CTL1 RD19 1K_5%_2

B I2C_EN RD20 *1K_5%_2 B
RD21 *1K_5%_2
RD22 1K_5%_2

+3V_DP Support dual mode

I2C Programming or pin strap programming select. +3V
CTL0 RD23 *1K_5%_2
I2C is only disable when this pin is '0'
RD24 1K_5%_2 0 : Pin Strap(I2C disable)(Default)
R : TI test mode(I2C enable at 3.3V)
F : I2C enabled at 1.8V 09/17 RD25 change to 0201
+3V_DP 1 : I2C enabled at 3.3V CD34
0.01u/50V_4 RD25 +3V

2
10K_1%_2
FLIP RD26 *1K_5%_2
3 4 1 6 RD27 100K_1%_2
+3V_DP +3V_DP_OUT
RD28 1K_5%_2 PQ1A 2N7002KDW PQ1B 2N7002KDW 09/17 RD29 change to 0201
09/17 RD27 change to 0201
RD29
DPEQ0_A1 RD30 *1K_5%_4 INT_DP_AUXN_Q CD35 0.1U/16V_4 C_INT_DP_AUXN QD1 10K_1%_2
[21] INT_DP_AUXN_Q

3
2N7002K
RD31 1K_5%_4 +3V 2
+3V_DP
12/06 RD30, RD31, RD35, RD36 change to 0402 & RD36 change to mount
QD2

3
SSEQ0_A0 RD32 *1K_5%_2 CD36 09/17 RD34 change to 0201 2N7002K
+3V_DP 2
PS_FBVDD_PGOOD [22,101]
5

2
RD33 *1K_5%_2 0.01u/50V_4 RD34
QD3 10K_1%_2

3
DPEQ1 RD35 *1K_5%_4 3 4 1 6 2N7002K

1
PQ2A 2N7002KDW PQ2B 2N7002KDW 2
SSEQ0,SSEQ1 : USB receiver RD36 1K_5%_4
equalizer gain INT_DP_AUXP_Q CD37 0.1U/16V_4 C_INT_DP_AUXP QD4
[21] INT_DP_AUXP_Q

1
for upstream facing SSTXP/N

3
2N7002K
F,F(Default) 2 CAD_SNK_R
A
DPEQ0,DPEQ1 : DP Receiver equalization gain A
When I2C_EN is not '0' SSEQ0 RD37
F,F(Default)
100K_1%_2
sets I2C adress When I2C_EN is not '0' DPEQ0 sets I2C adress 09/17 RD37 change to 0201

1
PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
mini DP/Re-driver
NB5 Date: Wednesday, April 08, 2020 Sheet 31 of 106
5 4 3 2 1
 5 4 3 2 1

Reference G3Z schematic

32
D D

Thermal Protect
Under CPU pipe for travel bag test
+3VPCU

RN3
20K_1%_2
For 75 degree, 1.2v limit, (HW)
THER_PIPE
THERMISTOR_SHDN [42]

C C
2

TM0 CN4
100K_NTC_4_3%

0.1u/16V_4
1

CPU area to monitor CPU temp.

+3VPCU

RN7
20K_1%_2
For 75 degree, 1.2v limit, (HW)
B THER_GPU B
THERMISTOR [42]
2

TM1 CN5
0.1u/16V_4
100K_NTC_4_3%
1

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
B 1A
Thermal Sensor
NB5 Date: Wednesday, April 08, 2020 Sheet 32 of 106
5 4 3 2 1
 5 4 3 2 1

LAN & RJ45

33
D D

09/23 delete current resistor then add RL15

12/05 RL15 change to short pad
RL15 *0_5%_8/S
+3VLANVCC +3VLANVCC_RSENSE
Reference G3Z schematic

Power trace Layout W > 60mil

Place Cc,Cd,Ce,Cf close to each VDD10 pin-- 3,8,22,30 Trace<30 mil
Place Cg & Ch close to each VDD10 pin22 RTL8111HS (SWR Mode) Pin-24 REGOUT : Switching Regulator 1.0V Output.
Width > 60 mil RTL8111H (LDO Mode) Pin-24 REGOUT : LDO Regulator 1.0V Output.

01/21 LL1 change to CV-4708MN03

+1.0V_LAN_REGOUT
Lx : SWR
+1.0V_LAN LL1 1 2 4.7uH_3x3x1
>60mil
Ch
CL1

Cg
CL2

Cf
CL3

Ce
CL4

Cd
CL5

Cc
CL6

Cz
CL7

Cy
CL8

RL1 *0_8 CL9

10p/25V_2

+1.0V_LAN_REGOUT
Rx : LDO LAN_XTAL1

CL10

>60mil
LDO

For EMI 0 ~ 22 ohm

Mode:Stuff Rx
Close Pin-3
0.1U/16V_4

Close Pin-22
1u/6.3V_2

Close Pin-22
0.1U/16V_4

Close Pin-8
0.1U/16V_4

Close Pin-22
0.1U/16V_4

Close Pin-30
0.1U/16V_4

SWR, Close Lx
0.1U/16V_4

SWR, Close Lx
4.7u/10V_4

RL3
Switch

1
2
C Mode:Stuff Lx C
*0.1U/16V_4
25MHZ/10ppm
01/21 Add UL3 UL4 for ESD reserve
02/10 UL4 swap MDI3+ & MDI3-
YL1
UL3 UL4

3
4
MDI0+ 1 10 MDI0+ MDI2+ 1 10 MDI2+
Line-1 NC#4 Line-1 NC#4

*0_5%_4/S
MDI0- 2 9 MDI0- MDI2- 2 9 MDI2-
Line-2 NC#3 Line-2 NC#3
CL11 3 3
12p/25V_2 GND#1 GND#1
+3VLANVCC_RSENSE
SI 1122 Change to 12p MDI1+ 4 7 MDI1+ MDI3+ 4 7 MDI3+
Line-3 NC#2 Line-3 NC#2
Ca

Cb

Cc

Cd

Ce

Cf

+1.0V_LAN
CL12

CL13

CL14

CL15

CL16

CL17

MDI1- 5 6 MDI1- MDI3- 5 6 MDI3-

LAN_AMBLED# Line-4 NC#1 Line-4 NC#1
TPL1 +1.0V_LAN
RL5 *0_5%_2/S *AZ1045-04F.R7G *AZ1045-04F.R7G
[10,34,35] PCIE_WAKE#
* RL6 2.49K_1%_2
Pin-21 LANWAKEB : O/D, Low Active,
TPL2
Close Pin-32
*4.7u/10V_4
Close Pin-11
*4.7u/10V_4

Close Pin-32
0.1U/16V_4
Close Pin-11
0.1U/16V_4
SWR, Close Pin-23
4.7u/10V_4
SWR, Close Pin-23
0.1U/16V_4

PU via 1KΩ to +3VS5 on CPU side.

+3VLANVCC_RSENSE

XTAL1
XTAL2
*

RSET
LAN_WLED#
TPL3
*
Please add 9 GND VIAs
25 connection with thermal PAD
26
27
28
29
30
31
32
LED0
CKXTAL1
CKXTAL2
AVDD10#2

AVDD33#1
LED1/GPO

RSET
LED2(LED1)

33
+3V GND +1.0V_LAN
Ca,Cb,Cc,Cd for LDO mode
(place near Pin11 & Pin32) Ce , Cf for SWR mode

RL7
1K_5%_2
24
23
22
REGOUT(NC)
VDDREG(VDD33)
MDIP0
MDIN0
1
2
3
MDI0+
MDI0- LAN CONN RL2
*0_5%_6/S
UL2

ISOLATEB
PCIE_WAKE#_R 21
20
DVDD10(NC)
LANWAKEB
AVDD10#3(NC)
MDIP1
4
5
MDI1+
MDI1- TRA_V_DAC 1
NS892407_1000
24
RJ45
19 ISOLATEB RTL8118ASH-CG MDIN1 6 MDI2+ 2 TCT1 MCT1 23 MDI0+_1
B
18 PERSTB MDIP2(NC) 7 MDI2- 3 TD1+ MX1+ 22 MDI0-_1 LAN_GND1 B
17 HSON MDIN2(NC) 8 TD1- MX1-
HSOP AVDD10#1
10/08 CNL1 change to DFTJ08FR535
AVDD33#2(NC)

RL9 4 21 10/16 CNL1 update footprint

15K_1%_2 5 TCT2 MCT2 20 MDI1+_1 12 11
if ISOLATEB pin pull-low,the LAN TD2+ MX2+
REFCLK_N

MDIN3(NC)
MDIP3(NC)
REFCLK_P

6 19 MDI1-_1 GND GND

CLKREQB

chip will not drive it's PCI-E outputs TD2- MX2-

( excluding PCIE_WAKE# pin )
7 18 MDI3-_1 8
HSIN
HSIP

8 TCT3 MCT3 17 MDI2+_1 MDI3+_1 7

9 TD3+ MX3+ 16 MDI2-_1 MDI1-_1 6
TD3- MX3- MDI2-_1 5

LAN_MCTG2

LAN_MCTG1

LAN_MCTG0
16
15
14
13
12
11
10
9

UL1 10 15 MDI2+_1 4
[12,19,34,35,36,38,48] PLTRST# TCT4 MCT4 MDI3+_1 MDI1+_1
RTL8118ASH-CG MDI3+ 11 14 3
MDI3- 12 TD4+ MX4+ 13 MDI3-_1 MDI0-_1 2

LAN_MCTG3
CL18 0.1U/16V_4 PCIE_RXN14_LAN_L TD4- MX4- MDI0+_1 1
[11] PCIE_RXN14_LAN
Differential Impedance : 100Ω PCIE_RXP14_LAN_L
CL20 0.1U/16V_4 CNL1
[11] PCIE_RXP14_LAN GND GND
CL19 130470-3900
0.01U/50V_4 10 9

CLK_PCIE_LANN +3VLANVCC_RSENSE LAN_GND2

RL10

CL21

RL11

CL22

RL12

CL23

RL13

CL24
[11] CLK_PCIE_LANN
CLK_PCIE_LANP
[11] CLK_PCIE_LANP
RL8
*0_5%_6/S
PCIE_TXN14_LAN

75_1%_2

*0.01U/100V_06

75_1%_2

*0.01U/100V_06

75_1%_2

*0.01U/100V_06

75_1%_2

*0.01U/100V_06
[11] PCIE_TXN14_LAN
Differential Impedance : 100Ω PCIE_TXP14_LAN
[11] PCIE_TXP14_LAN DFTJ08FR535
[11] PCIE_CLKREQ_LAN# RL14 *0_5%_2/S LAN_CLKRQ
LAN_MCTG
CIS OK
CL25 10P/3KV_1808

Pin-12 CLKREQB : O/D, PU via TOP 3

10KΩ to +3V on CPU side. RL4 220/F_4 2 1 LAN_AMBLED#
+3VLANVCC_RSENSE

LED1
A A
Orange_LTST-S320KFKT
VC3000 *AVLC5S_4

LED2
3

RL16 220/F_4 2 1 LAN_WLED#

+3VLANVCC_RSENSE
3P WHITE LED
BOT
VC3001 *AVLC5S_4 PROJECT : G3BE
+3VLANVCC
+3V
[50,95]
[9,10,11,13,16,17,18,21,28,30,31,34,36,38,39,41,42,48,50,51,52,82,88,91,95,98,99,101,105]
Quanta Computer Inc.
Size Document Number Rev
C 1A
IC-LAN RTL8118ASH-CG/RJ45
NB5 Date: Wednesday, April 08, 2020 Sheet 33 of 106
5 4 3 2 1
 5 4 3 2 1

USB 2.0/3.0 Combo MB

USB BC1.2
09/17 RU1, RU2 change to 0201
20K_1%_2

48.7K_1%_2 RU2
RU1

TBTA_ACK# TPU1
LU1
34
USBP1+_R 4 3 USBP1+_C
+5VS5 UU1 USBP1-_R 1 2 USBP1-_C
USB 3.0

17

16

15

14

13
TPS2546RTER
CU1 4.7U/6.3V_4 CNU1

ILIM_HI

ILIM_LO

FAULT
GND#2

GND#1
MCM2012B900GBE TCRAW-9U6391
CU8 0.1U/10V_2 +5V_USBP1 1
VBUS
1 12 +5V_USBP1 USBP1-_C 2
IN OUT +5V_USBP1 D-
D USBP1+_C 3 D
D+
USBP1- 2 11 USBP1-_R 4
+5VS5 [9] USBP1- DM_OUT DM_IN +5VS5 USB30_RX1-_C GND
CU10 0.1U/16V_4 5
USBP1+_R [9] USB30_RX1- USB30_RX1+_C Stda_SSRX-
USBP1+ 3 10 CU9 0.1U/16V_4 6
[9] USBP1+ DP_OUT DP_IN [9] USB30_RX1+ Stda_SSRX+
7
GND_DRAIN
RU3 10K_5%_2 4 9 STATE_SEL2 10K_5%_2 RU4 CU11 0.1U/16V_4 USB30_TX1-_C 8
ILIM_SEL STATUS [9] USB30_TX1- USB30_TX1+_C Stda_SSTX-
CU12 0.1U/16V_4 9

CTL2

CTL3
[9] USB30_TX1+ Stda_SSTX+

CTL1
09/17 RU4 change to 0201

EN
09/17 RU3 change to 0201 +5VS5

10
11
12
13
High active CU13

8
USB_CTRL3 4.7K_2 RU5
09/17 RU5 change to 0201 220u/6.3V_3528H1.9
USB_CTRL2

+
Reference G3DC schematic USB_BC_ON
USB_CTRL2
MAINON
USB_BC_ON
[42]
[28,31,35,42,87,92,93,95]
[42]
CU14 0.1U/16V_4
CU15 470P/50V_4

VCU1 *AVLC5S_4 2A
CU16 1000P/50V_4 +5V_USBP1
+5V_USBP1

Place Back to Back La

USBP1+_C

USBP1-_C PUSB3FR4
USB30_RX1-_C 5 6 USB30_RX1-_C
USB30_RX1+_C 4 IN4 NC4 7 USB30_RX1+_C
3 IN3 NC3 8
USB30_TX1-_C 2 GND1 GND2 9 USB30_TX1-_C
USB30_TX1+_C 1 IN2 NC2 10 USB30_TX1+_C
IN1 NC1

2
C CU17 C
UU2
ESD5302N-3/TR

3
12/09 CU17 change to BC325ZGDZ00
04/09 CU17 change to BC005302Z00

USB3 small board SD Card Audio Jack to Small Board

Reference G3DC schematic

09/23 delete current resistor then add RC2

、
11/27 LU2 LU3 change to unmount & add RU36~RU39
12/10 delete RU36~RU39
PLTRST#_C 12/05 RC2 change to short pad
+3V +3V_CARDSense

RC2 *0_5%_8/S
12/09 CC1 change to unmount CC1
B
USB 2.0/3.0 Combo x2 *10P/50V_4 B

25
CC2
0.1U/16V_4
1
09/17 RC1 change to 0201 2
CU26 0.1U/16V_4 RC1 100_1%_2 PLTRST#_C
+BAT_RTC [12,19,33,35,36,38,48] PLTRST# 3
09/24 CNU2 reverse singal for ME PCIE_CLKREQ_CR#
[11] PCIE_CLKREQ_CR# 4
+3VPCU CU27 0.1U/16V_4 03/30 CNU2 P/N change to DFFC30FR229 [10,33,35] PCIE_WAKE#
CC3 0.1U/16V_4 PCIE_TXP16_CARD_C 5
[11] PCIE_TXP16_CARD 6
+5VS5 CU36 0.1U/16V_4 [11] PCIE_TXN16_CARD CC4 0.1U/16V_4 PCIE_TXN16_CARD_C
CNU2 7
CU37 1000P/50V_4 51536-0300B-V01 CLK_PCIE_CRP 8
[11] CLK_PCIE_CRP CLK_PCIE_CRN 9
31
[11] CLK_PCIE_CRN 10
11/28 CU28~CU35 change to 0ohm & rename to RU28~RU35 +BAT_RTC 1 11
12/10 delate RU28~RU35 +3VPCU 2 [11] PCIE_RXP16_CARD 12
[48,106] LID# 3 [11] PCIE_RXN16_CARD 13
USB30_TX2+ 4 14
[9] USB30_TX2+ [39] SENSE_A
USB30_TX2- 5 15
[9] USB30_TX2- 6 16
USB3 Port2 AGND
USB30_RX2+ 7 17
[9] USB30_RX2+ USB30_RX2- 8 [39] MIC2-VREFO-L 18
[9] USB30_RX2- 9 [39] EXT_MIC_L 19
10 AGND 20
USBP2- 4 3 USBP2-_C
[9] USBP2- 11 [39] HPOUT_L 21
USB2 Port2 USBP2+ 1 2 USBP2+_C
[9] USBP2+ 12 AGND 22
LU2 MCM2012B900GBE
USB30_TX3+ 13 [39] HPOUT_R 23
[9] USB30_TX3+ 14 AGND 24
USB30_TX3-
[9] USB30_TX3- 15
USB3 Port3

26
USB30_RX3+ 16
[9] USB30_RX3+ USB30_RX3- 17 CNC1
[9] USB30_RX3- 18 50506-02401-V01
USBP3- 4 3 USBP3-_C 19
[9] USBP3- 20
USB2 Port3 USBP3+ 1 2 USBP3+_C
A
[9] USBP3+
LU3 MCM2012B900GBE
USBPW_ON
21
22
DFFC24FR146 A
AGND
[42] USBPW_ON
+1.8V_DEEP_SUS RU6 *0_4/S +1.8V_RL 23
24
CIS OK 11/22 CNC1 reverse singal for ME
25
+1.8V_RL 26
27
11/27 RU6 change to mount 28
01/30 RU6 change to short pad 29
+5VS5 30
32 PROJECT : G3BE
DFFC30FR209 Quanta Computer Inc.
Size Document Number Rev
CIS OK Custom
USB3.0/SD/USB Small Board 1A
NB5 Date: Thursday, April 09, 2020 Sheet 34 of 106
5 4 3 2 1
 A B C D E

WLAN
+5V [28,30,31,38,39,48,49,50,51,52,89,90,91,95,104]

35
+3VPCU [10,32,34,42,43,46,48,51,82,86,88,104,106]
+3VS5 [10,12,14,23,31,38,42,47,48,51,82,86,88,92,93,95,104,105]
+3V [9,10,11,13,16,17,18,21,28,30,31,33,34,36,38,39,41,42,48,50,51,52,82,88,91,95,98,99,101,105]

+3VPCU +3VPCU +3VS5 +3V_WLAN_P Reference G3Z schematic

WIFI_3V
1.5A
UWL1A
[11] PCIE_RXN15_WLAN CWL1 0.1U/16V_4 PCIE_RXN15_WLAN_C 36 4 RF WIFI_3V RWL3 *0_5%_6/S +3V_WLAN_P
RWL1 RWL2 CWL5 0.1U/16V_4 PCIE_RXP15_WLAN_C 37 PERn0/NC 3.3V#4 5 09/23 delete current resistor then add RWL3
[11] PCIE_RXP15_WLAN PERp0/NC 3.3V#5
10K_5%_2 10K_5%_2 72 12/05 WL3 change to short pad
QWL1 CWL6 0.1U/16V_4 PCIE_TXN15_WLAN_C 39 3.3V#72 73 CWL7 CWL2 CWL8 CWL3 CWL9 CWL10 CWL11
[11] PCIE_TXN15_WLAN PETn0/NC 3.3V#73

1
PJA3415 CWL4 0.1U/16V_4 PCIE_TXP15_WLAN_C 40 A48 0.1u/6.3V_2 3.3p/25V_2 0.01u/50V_4 0.01u/50V_4 0.1U/16V_4 10u/6.3V_4 10u/6.3V_4
[11] PCIE_TXP15_WLAN PETp0/NC 3.3V#A48 A49
RWL4 200K_5%_2 2 33 3.3V#A49
4 [11] CLK_PCIE_WLANN REFCLKN0/NC 4
[11] CLK_PCIE_WLANP 34
REFCLKP0/NC A15 RWL5 *0_5%_2/S 12/05 RWL5 change to short pad
PE_WALE# 29 LNA_EN/GND
24mil

3
PEWAKE#/NC

3
[11] PCIE_CLKREQ_WLAN# RWL7 *0_5%_2/S REQ_WLAN# 30 27 WIFI_32KHZ
SUSCLK_32K [10]
QWL2A CWL12 RWL9 *0_5%_2/S PLTRST#_R 31 CLKREQ#/NC SUSCLK(32kHz)(3.3V)/NC RWL8 *0_5%_4/S
[12,19,33,34,36,38,48] PLTRST# PERST#/NC
RWL6 5 2N7002KDW

6
75K_1%_2 *0.022U/25V_4 CWL13 12/05 RWL7, RWL9 change to short
QWL2B 28 INT_RF_OFF# RWL10 10K_5%_2
2 0.1U/16V_4 69 W_DISABLE1#/W_DISABLE1# 63 INT_BT_OFF# RWL11 10K_5%_2
[10] CNVi_EN# 2N7002KDW [9] USBP7- WIFI_3V

4
70 USB_D-/NC W_DISABLE2#/W_DISABLE2#
[9] USBP7+ USB_D+/NC
INT_BT_OFF# [12] 09/24 INT_BT_OFF# connect to PCH
64

1
LED2#/LED2# 65 WIRELESS_ON RWL13 4.7K_5%_2
LED1#/LED1# WIFI_3V
[28,31,34,42,87,92,93,95] MAINON
8
9 ALERT#/NC 61
Support Wake Function (Reserve) 10 I2C_CLK/NC
I2C_DATA/NC
PCM_CLK/I2S_SCK/NC
PCM_IN/I2S_SD_IN/NC
60
59 MODEM_CLKREQ_L
PCM_OUT/I2S_SD_OUT/NC 58 CNV_RF_RESET#_L
42 PCM_SYNC/I2S_WS/NC
43 CLink_CLK/NC
44 CLink_DATA/NC
CLink_RESET/NC
[13] CNV_WT_CLK_DP
A19
A20 WT_CLKP/WT_CLKP 53 UART_WAKE# RWL14 4.7K_5%_2 UWL1B
[13] CNV_WT_CLK_DN WT_CLKN/WT_CLKN UART_WAKE#_3.3V/NC WIFI_3V
A21 54 CNV_BRI_DT_L
[13] CNV_WT_LANE0_DP WT_D0P/WT_D0P LPSS_UART_RTS/bri_dt/NC CNV_BRI_RSP_L
[13] CNV_WT_LANE0_DN
A22 55
A23 WT_D0N/WT_D0N LPSS_UART_RXD/bri_rsp/NC 56 CNV_RGI_DT_L
+1.8V_DEEP_SUS +1.8V_DEEP_SUS [13] CNV_WT_LANE1_DP WT_D1P/WT_D1P LPSS_UART_TXD/rgi_dt/NC
A24 57 CNV_RGI_RSP_L
[13] CNV_WT_LANE1_DN WIFI_32KHZ WT_D1N/WT_D1N LPSS_UART_CTS/rgi_rsp/NC
RWL15 A25 6 A45
UWL2 UWL3 *100K_1%_2 C_P32K/C_P32K 17 GND#6 NC#A45
GND#17
5

5
NL17SZ08DFT2G NL17SZ08DFT2G 11 20
1 1 45 COEX_TXD/NC 12 23 GND#20 A47
MODEM_CLKREQ_L 4 CNV_RF_RESET#_L 4 46 SDIO_RESET#/NC COEX_RXD/NC 13 26 GND#23 RSVD#A47 A46
MODEM_CLKREQ [10] CNV_RF_RESET# [10] SDIO_WAKE#/NC COEX3/NC GND#26 RSVD#A46
2 2 50 14 32 A11
49 SDIO_DATA0/NC SYSCLK/GNSS0/NC 15 35 GND#32 RSVD#A11 A12
3
RWL17 RWL19 48 SDIO_DATA1/NC TX_BLANKING/GNSS1/NC 38 GND#35 RSVD#A12 A13 3
3

3
RWL16 RWL18 47 SDIO_DATA2/NC 41 GND#38 RSVD#A13 A14
10K_5%_2 10K_5%_2 SDIO_DATA3/NC GND#41 RSVD#A14
75K_1%_2 75K_1%_2 51 62 A16
52 SDIO_CMD/NC 68 GND#62 RSVD#A16 A17
SDIO_CLK/NC 71 GND#68 RSVD#A17 A18
A8 74 GND#71 RSVD#A18 A27
A32 A4WP_IRQ#/A4WP_IRQ# A9 75 GND#74 RSVD#A27 A28
[13] CNV_WR_CLK_DP WGR_CLKP/WGR_CLKP A4WP_CLK/A4WP_CLK GND#75 RSVD#A28
[13] CNV_WR_CLK_DN
A33 A10 76 A29
A34 WGR_CLKN/WGR_CLKN A4WP_DATA/A4WP_DATA 77 GND#76 RSVD#A29 A30
[13] CNV_WR_LANE0_DP WGR_D0P/WGR_D0P GND#77 RSVD#A30
[13] CNV_WR_LANE0_DN
A35 78 7
A36 WGR_D0N/WGR_D0N 79 GND#78 RSVD/NC#7 16
[13]
[13]
CNV_WR_LANE1_DP
CNV_WR_LANE1_DN
A37 WGR_D1P/WGR_D1P RA, RB close PCH 80 GND#79 RSVD/NC#16 18
WGR_D1N/WGR_D1N A38 CNV_BRI_DT_L RA RWL20 22_1%_2 81 GND#80 RSVD/NC#18 19
BRI_DT/BRI_DT CNV_BRI_RSP_L CNV_BRI_DT [13,16] GND#81 RSVD/NC#19
A39 RWL21 22_1%_2 CNV_BRI_RSP [13]
82 21
BRI_RSP/BRI_RSP A40 CNV_RGI_DT_L RB RWL22 22_1%_2 83 GND#82 RSVD/NC#21 22
WIFI_3V RGI_DT/RGI_DT CNV_RGI_DT [13,16] GND#83 RSVD/NC#22
A41 CNV_RGI_RSP_L RWL23 22_1%_2 84 25
RGI_RSP/RGI_RSP CNV_RF_RESET#_L CNV_RGI_RSP [13] GND#84 RSVD/NC#25
A42 85 66
1 RF_RESET_B/RF_RESET_B A43 MODEM_CLKREQ_L 86 GND#85 RSVD/NC#66 67
2 UIM_POWER_SRC/GPIO1/NC CLKREQ0/CLKREQ0 A44 PULSAR_38P4M_REFCLK_R1 87 GND#86 RSVD/NC#67 24
UIM_POWER_SNK/NC REFCLK0/REFCLK0 PULSAR_38P4M_REFCLK [11] GND#87 RSVD/NC#24
RWL25 4.7K_5%_2 3 RWL24 *0_5%_4/S 88
UIM_SWP/NC 89 GND#88
90 GND#89 97
91 GND#90 GND#G1 98
3

AX201.D2WG.NV-MM#985868
QWL4 2 92 GND#91 GND#G2 99
PE_WALE# 93 GND#92 GND#G3 100
[10,33,34] PCIE_WAKE# GND#93 GND#G4
94 101
*DMG1012T-7 95 GND#94 GND#G5 102
1

96 GND#95 GND#G6 103

GND#96 GND#G7 104
RWL26 *0_5%_2 GND#G8 108
GND#G9 107
WLAN module BOM PN. GND#G10
GND#G11
106
105
GND#G12

ADPCAX20027 WL/BT 802.11ABGNACAX AX201.D2WG.NV A26

2 GND#A26 A31 2
Harrison Peak 2 CNVI 1216 GND#A31 A7
ADPCAX20028 WL/BT 802.11ABGNACAX AX201.D2WG.NV TOPBS GND#A07 A50
GND#A50

AX201.D2WG.NV-MM#985868

1 1

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
WLAN
NB5 Date: Wednesday, April 08, 2020 Sheet 35 of 106
A B C D E
 5 4 3 2 1

10/09 CNK1
10/18 CNK1
、、CNK2 change to DFHS75FR595
CNK2 FP change to ngff-apci0262-p005a-75p-km

36
CNK1
SSD1 APCI0262-P005A

1
NGFF MKEY 2 +3V_SSD
+3V_SSD
2.5A RK1 *0_5%_8/S +3V
3 GND#1 3.3Vaux_1 4
GND#3 3.3Vaux_2
09/23 delete current resistor then add RK1
5 6 12/05 RK1 change to short pad
[11] PCIE_SATA_RXN9 7 PETN3 NC#10 8
[11] PCIE_SATA_RXP9 PETP3 NC#11
9 10
CK1 0.22u/6.3V_2 PCIE_SATA_TXN9_C 11 GND#7 DAS/DSS#(I)(OD) 12 CK2 CK3 CK4
[11] PCIE_SATA_TXN9 PCIE_SATA_TXP9_C 13 PERN3 3.3Vaux_3 14
CK5 0.22u/6.3V_2 0.01U/50V_4 0.1U/16V_4 4.7u/10V_4
[11] PCIE_SATA_TXP9 PERP3 3.3Vaux_4
15 16
D 17 GND#8 3.3Vaux_5 18 D
[11] PCIE_SATA_RXN10 19 PETN2 3.3Vaux_6 20 +3V
[11] PCIE_SATA_RXP10 21 PETP2 NC#12 22
CK6 0.22u/6.3V_2 PCIE_SATA_TXN10_C 23 GND#2 NC#13 24
[11] PCIE_SATA_TXN10 PCIE_SATA_TXP10_C 25 PERN2 NC#14 26
CK7 0.22u/6.3V_2
[11] PCIE_SATA_TXP10 27 PERP2 NC#15 28 RK2
29 GND#9 NC#16 30
[11] PCIE_SATA_RXN11 PETN1 NC#17 10K_5%_2
31 32
[11] PCIE_SATA_RXP11 33 PETP1 NC#2 34
CK8 0.22u/6.3V_2 PCIE_SATA_TXN11_C 35 GND#10 NC#3 36
[11] PCIE_SATA_TXN11 PCIE_SATA_TXP11_C 37 PERN1 NC#4 38
CK9 0.22u/6.3V_2 RK3 *0_5%_2 DEVSLP0 [9]
[11] PCIE_SATA_TXP11 PERP1 DEVSLP
39 40
RK4 *0_5%_4/S PCIE_SATA_RXP12_C 41 GND#11 NC#5 42
[11] PCIE_SATA_RXP12 SATA B+/PETN0 NC#6
RK5 *0_5%_4/S PCIE_SATA_RXN12_C 43 44
[11] PCIE_SATA_RXN12 45 SATA B-/PETP0 NC#7 46
CK10 0.22u/6.3V_2 PCIE_SATA_TXN12_C 47 GND#12 NC#8 48
[11] PCIE_SATA_TXN12 PCIE_SATA_TXP12_C 49 SATA A-/PERN0 NC#9 50
CK11 0.22u/6.3V_2 RK6 *0_5%_2/S
[11] PCIE_SATA_TXP12 51 SATA A+/PERP0 PERST#/NC 52 PLTRST# [12,19,33,34,35,38,48]
RK7 *0_5%_2/S
53 GND#13 CLKREQ#/NC 54 PCIE_CLKREQ_SSD# [11]
[11] CLK_PCIE_SSDN 55 REFCLKN PEW AKE#/NC 56
[11] CLK_PCIE_SSDP REFCLKP NC#18
12/05 RK6, RK7 change to short pad
57 58
GND#14 NC#19
[11] GPIO35 RK8 *0_5%_2/S +3V RK9 100K_1%_2

*PAD
67 68

3
NC#1 SUSCLK TPK1 +3V_SSD
QK1 2 PEDET 69
71 PEDET(OC-PCIE/GND-SATA) 70 +3V_SSD
2N7002K GND#4 3.3Vaux_7
73 72
75 GND#5 3.3Vaux_8 74

1
C GND#6 3.3Vaux_9 C

76
77
78
79
76
77
78
79
EC1 EC2 EC3
470p/25V_2 10U/6.3V_6 10U/6.3V_6

Reference G3Z

CNK2
SSD2 PCIE only APCI0262-P005A

1
NGFF MKEY 2 +3V_SSD1
+3V_SSD1
2.5A RK11 *0_5%_8/S +3V
3 GND#1 3.3Vaux_1 4
GND#3 3.3Vaux_2
09/23 delete current resistor then add RK11
5 6 12/05 RK11 change to short pad
[9] PCIE_SATA_RXN24 7 PETN3 NC#10 8
[9] PCIE_SATA_RXP24 PETP3 NC#11
9 10
CK12 0.22u/6.3V_2 PCIE_SATA_TXN24_C 11 GND#7 DAS/DSS#(I)(OD) 12 CK16 CK13 CK14
[9] PCIE_SATA_TXN24 PCIE_SATA_TXP24_C 13 PERN3 3.3Vaux_3 14
CK15 0.22u/6.3V_2 0.01U/50V_4 0.1U/16V_4 4.7u/10V_4
[9] PCIE_SATA_TXP24 15 PERP3 3.3Vaux_4 16
17 GND#8 3.3Vaux_5 18
[9] PCIE_SATA_RXN23 19 PETN2 3.3Vaux_6 20 +3V
B [9] PCIE_SATA_RXP23 21 PETP2 NC#12 22 B
CK17 0.22u/6.3V_2 PCIE_SATA_TXN23_C 23 GND#2 NC#13 24
[9] PCIE_SATA_TXN23 PCIE_SATA_TXP23_C 25 PERN2 NC#14 26
CK18 0.22u/6.3V_2
[9] PCIE_SATA_TXP23 PERP2 NC#15
27 28 RK12
29 GND#9 NC#16 30
[9] PCIE_SATA_RXN22 PETN1 NC#17 10K_5%_2
31 32
[9] PCIE_SATA_RXP22 PETP1 NC#2
33 34
CK19 0.22u/6.3V_2 PCIE_SATA_TXN22_C 35 GND#10 NC#3 36
[9] PCIE_SATA_TXN22 PCIE_SATA_TXP22_C PERN1 NC#4
CK20 0.22u/6.3V_2 37 38 RK13 *0_5%_2
[9] PCIE_SATA_TXP22 PERP1 DEVSLP DEVSLP1 [9]
39 40
RK14 *0_5%_4/S PCIE_SATA_RXP21_C 41 GND#11 NC#5 42
[9] PCIE_SATA_RXP21 SATA B+/PETN0 NC#6
RK15 *0_5%_4/S PCIE_SATA_RXN21_C 43 44
[9] PCIE_SATA_RXN21 45 SATA B-/PETP0 NC#7 46
CK21 0.22u/6.3V_2 PCIE_SATA_TXN21_C 47 GND#12 NC#8 48
[9] PCIE_SATA_TXN21 PCIE_SATA_TXP21_C 49 SATA A-/PERN0 NC#9 50
CK22 0.22u/6.3V_2 RK16 *0_5%_2/S PLTRST#
[9] PCIE_SATA_TXP21 51 SATA A+/PERP0 PERST#/NC 52 RK17 *0_5%_2/S
GND#13 CLKREQ#/NC PCIE_CLKREQ_SSD1# [11]
53 54
[11] CLK_PCIE_SSD1N 55 REFCLKN PEW AKE#/NC 56
[11] CLK_PCIE_SSD1P REFCLKP NC#18
12/05 RK16, RK17 change to short pad
57 58
GND#14 NC#19
[11] GPIO36 RK18 *0_5%_2/S +3V RK19 100K_1%_2

*PAD
3

67 68
NC#1 SUSCLK TPK2 +3V_SSD1
QK2 2 PEDET1 69
71 PEDET(OC-PCIE/GND-SATA) 70 +3V_SSD1
2N7002K GND#4 3.3Vaux_7
73 72
75 GND#5 3.3Vaux_8 74
1

GND#6 3.3Vaux_9
76
77
78
79

A A
76
77
78
79

+3V [9,10,11,13,16,17,18,21,28,30,31,33,34,38,39,41,42,48,50,51,52,82,88,91,95,98,99,101,105]
EC4 EC5 EC6
470p/25V_2 10U/6.3V_6 10U/6.3V_6

PROJECT : G3BE
Reference G3Z Quanta Computer Inc.
Size Document Number Rev
Custom 1A
SSDx2
NB5 Date: Wednesday, April 08, 2020 Sheet 36 of 106
5 4 3 2 1
 5 4 3 2 1

EMI PAD
10/14 H1~H3 & H5 change to GBBLV004010 10/15 H4 FP change to SPAD-RE4_0X3_0MM
H4 change to GBTMA002010

H1
SPAD-RE3_0X2_0MM
H2
SPAD-RE3_0X2_0MM
H3
10/16 H1~H3 & H5 FP change to SPAD-RE4_0X3_0MM

SPAD-RE3_0X2_0MM
H4
SPAD-RE4_0X3_0MM
H5
SPAD-RE3_0X2_0MM
37
1

1
D D

12/10 H23 FP change to H-tsbsd150p2-7

H23 H13 H12 H31 H14
*H-tc217bsd99p2-10 *H-tc217bsd99p2-9 *H-C236D98P2 *H-G3EB-EDADOC-5 *H-C79D79N
H24 H25 H26
*H-TIC146BC256D146P2 *H-TIC146BC256D146P2 *H-TIC146BC256D146P2
1

1
CPU BKT

1
11/29 H13 FP change to SPAD-C237N 12/06 H31 FP change to H-G3EB-EDADOC-5
12/10 H13 FP change toH-tc217bsd99p2-9
H10 H22
*H-tsbsd150p2-7 *H-STARMADE_AREG-2

H27 H28 H29 H30

1

*H-TIC146BC256D146P2 *H-TIC146BC256D146P2 *H-TIC146BC256D146P2 *H-TIC146BC256D146P2

C C

12/10 H10 FP change to H-tsbsd150p2-7 VGA BKT

1
H16 H19 H21 H15
*H-STARMADE_AREG-5 *H-G3EB-EDADOC-6 *H-STARMADE_AREG-7 *H-STARMADE_AREG-8
1

12/06 H19 FP change to H-G3EB-EDADOC-6 H32 H33

*2D-BARCODE-8X8-S *2D-BARCODE-8X8-S

H17 H20
*H-tsbsd126p2-5 *H-tsbsd126p2-6

1
SMT NUT H34
1

*H-079x119d79x119n
B B

1
10/15 H17 FP change to HG-G3EB-EDADOC-1 12/10 H34 FP change to H-079x119d79x119n
H20 FP change to HG-G3EB-EDADOC-2
11/29 H17 FP change to HG-G3EB_C-EDADOC-1
H20 FP change to HG-G3EB_C-EDADOC-2
12/06 H17 FP change to H-G3EB-EDADOC-3 & change to unmount
H20 FP change to H-G3EB-EDADOC-4 & change to unmount
12/10 H17 FP change to H-tsbsd126p2-5
H20 FP change to H-tsbsd126p2-6

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
EMI/RF Solution/HOLE
NB5 Date: Wednesday, April 08, 2020 Sheet 37 of 106
5 4 3 2 1
 5 4 3 2 1

+3VS5_TPM

TPM (1.2 or 2.0)

Reference G3Z RW1 RW2 SI 1114 Unstuff TPM related circuit RW3
+3VS5 +3VS5_TPM
+3V +3VS5_TPM 38
*150K_1%_4 *10K_1%_2 SI 1122 Unstuff U27 *0_5%_4
RW13 *0_4
UW1
09/23 delete current resistor then add RW3 RW8
RW5 *33_5%_2 PCH_SPI1_CLK_TPM 19 1 TPM_VDD1 CW1 *1u/6.3V_2 RW4 *10K_1%_2
D [12] PCH_SPI1_CLK SCLK VDD#1 D
20 8 *51K_5%_4
[12] SPI_TPM_CS# PCH_SPI1_SO_TPM CS# VDD#2 TPM_PLTRST#
RW6 *33_5%_2 24 22
[12] PCH_SPI1_SO PCH_SPI1_SI_TPM MISO VDD#3
RW7 *33_5%_2 21
[12] PCH_SPI1_SI MOSI

3
2
18 GND#1 9 CW2 CW3 RW9 *10K_1%_2 5
[12] TPM_PIRQ# TPM_PLTRST# PIRQ GND#2
17 *SLB 9670VQ2.0 FW7.63 23 *1u/6.3V_2 *1u/6.3V_2 QW1A
RST# GND#3 32 *PJT138K
Pin 17 Internal Weak pull up GND#4 33

4
Thermal pad

6
TPM_VDD1 RW11 *4.7K_1%_2 6 RW10
GPIO *0_5%_4
2
[12,19,33,34,35,36,38,48] PLTRST#
7 TPM_PP QW1B
PP *PJT138K CW4
*0.1u/16V_4

1
RW12

NC#10
NC#11
NC#12
NC#13
NC#14
NC#15
NC#16
NC#17
NC#1
NC#2
NC#3
NC#4
NC#5
NC#6
NC#7
NC#8
NC#9
*4.7K_1%_2
PCH_SPI1_CLK_TPM CW5 *10p/25V_2

3
4
5
10
11
12
13
14
15
16
25
26
27
28
29
30
31
FOR EMI
+3VS5_TPM
CW6
C *0.1U/16V_4 C
02/18 RJ1, RJ7 change to short pad

+5V +5V_FANIN_R
Reference G3Z Touch Pad [13] TP_SCL
RJ1 *0_4/S QJ1A
2N7002KDW
FAN1 for CPU
09/23 delete current resistor then add RN13 09/17 CN9 change to 0603 RJ3 *0_4
[10,17,18] SMB_RUN_CLK
RJ2 *0_4 4 3 TP_SMB_CLK
09/17 RJ4, RJ5 change to 0201
Dual RJ4 4.7K_2
12/05 RN13 change to short pad
RN13 *0_5%_6/S CN9 4.7u/25V_6
N18E->12V

5
QJ2
2N7002K +3V +3VSUS
CN10 0.1U/16V_4

2
3 1 TP_INTH#_L RJ5 4.7K_2
N18P->5V 0.8A
[13,42] TP_INTH#

[10,17,18] SMB_RUN_DAT
RJ6 *0_4 1 6 TP_SMB_DATA
RN11 4.7K_5%_2
5

+3V

2
FAN1_PWM CN11 220p/25V_2 RJ7 *0_4/S
Close to EC Side RJ8 4.7K_2
[13] TP_SDA QJ1B DFFC08FR174
1 DFHD04MS403 FAN1SIG CN12 220p/25V_2
+3VSUS 2N7002KDW
[42] FAN1SIG 2
09/17 RJ8 change to 0201 CIS OK
[42] FAN1_PWM
3
4
CIS OK
+3VSUS CJ1 0.1U/16V_4
50281-00401-001_Header
Reference G3DC +3VSUS RJ9 4.7K_2 TPCLK 09/24 CNJ1 change to DFFC08FR118
6

CNN1 RJ10 4.7K_2 TPDATA 11/28 CNJ1 change FP to fpc-196574-08021-3-8p-l

+5V +5V_FANIN_R1 09/17 RJ9, RJ10 change to 0201 12/09 CNJ1 change PN to DFFC08FR174
FAN2 for GPU

9
B 09/23 delete current resistor then add RN14 CJ2 10P/50V_4 B
12/05 RN14 change to short pad 09/17 CN13 change to 0603 *10P/50V_4 CJ3 TP_SMB_CLK
RN14 *0_5%_6/S LJ1 1 2HCB1005KF-330T30 TPDATA-1 1
TP_SMB_DATA [42] TPDATA 2
CN13 4.7u/25V_6 *10P/50V_4 CJ4 [42] TPCLK LJ2 1 2HCB1005KF-330T30 TPCLK-1
3
0.8A CN14 0.1U/16V_4 CJ5 10P/50V_4 TP_SMB_CLK 4
RJ11 4.7K_2 TP_Disable# TP_SMB_DATA 5
+3VSUS TP_INTH#_L 6
RN12 4.7K_5%_2
+3V 5 2 7
09/17 RJ11 change to 0201 [42] TP_Disable# 1
8
FAN2_PWM CN15 220p/25V_2
Close to EC Side 1 DFHD04MR397 DJ1 *RB500V-40

10
[42] FAN2SIG 2
FAN2SIG CN16 220p/25V_2
[42] FAN2_PWM
3
4
CIS OK RJ12 *0_4/S CNJ1
51653-0080N-001
6 51378-0040N-V01
CNN2
For debug
11/28 CN1012 FP change to fpc-132a06-000022-a2-r-6p-l Reference G7AL
09/23 delete current resistor then add L3400 04/06 CN1012 change to unmount
12/05 L3400 change to short pad +5V
+3V +3V_IRBoard
IR connector L3400 *0_4/S
CN1012
1
1
2
8

10/16 IR change I2C(GPUT_CLK/GPUT_DATA ) 2

& delete R384 R376 3 80DAT
6 3 80DAT [42]
4 80CLK
A
IR_INT# 5 4 80CLK [42] A
7 5 PLTRST#
TP52 4 75 PLTRST# [12,19,33,34,35,36,38,48]
SMCLK_AC2 8 6
[21,42,48] GPUT_CLK SMDAT_AC2 3 86
[21,42,48] GPUT_DATA 2 *6P DMIC CONN R4803
To EC 1
*10K_5%_2
PROJECT : G3BE
Reference G3Z
7

CN1013 Quanta Computer Inc.

196294-06041
Size Document Number Rev
Custom 1A
1122 Change CN9 FP & PN TPM/FAN/TP/Debug/IR Sensor
09/24 CNJ1 change to DFFC06FR086 NB5 Date: Wednesday, April 08, 2020 Sheet 38 of 106
5 4 3 2 1
 5 4 3 2 1

Reference G3Z
、LA2、LA3
+3V
09/23 delete current resistor then add LA1

1
LA1
2
*HCB1005KF-181T15_4/S
+3V_DVDD
+3V_DVDD
place to near or under codec
RA1 *0_5%_8/S
[34] EXT_MIC_L
12/05 RA3 change to short pad
39
CA1 CA2 CA3 +5V_AVDD RA2 *0_5%_4/S RA3 *0_5%_4/S AGND
1U/6.3V_4 10u/6.3V_4 0.1U/16V_4 +5VPCU RA4 *0_4
AGND
Close to PIN3 AGND
RA6 2.2K_4 MIC2-VREFO-L MIC2-VREFO-L [34]
+3V_DVDD-IO
EMI solution
LA2

10u/6.3V_4
1 2 +3V_DVDD-IO CA4 *1000P/50V_4
D +3V HPOUT_L [34] D
*HCB1005KF-181T15_4/S TP9183
CA7 *1000P/50V_4 TP9182
HPOUT_R [34]
CA5 CA6 TP9181
10u/6.3V_4 0.1U/16V_4 CA8 *1000P/50V_4 AGND SHIELD

CA9

28 VREFOUT_C
Close to PIN18

31 EXT_MIC_L
34 AMP_BEEP

30 MIC2-L_R
35 LINE1_R
36 LINE1_L
CA11 2.2U/10V_4

33 5VSTB
AGND
LA3 +5V_DVDD AGND
1 2 +5V_DVDD UA1

32

29

27

26

25
+5V ALC3315-CG
*HCB1005KF-181T15(180,1.5A)_4/S

LINE2-L

MIC2-L/RING2

MIC2-VREFO-L

HPOUT-L
LINE2-R

MIC2-VREFO-R

HPOUT-R
PCBEEP

AUX MODE

MIC2-CAP

MIC2-R/SLEEVE

CPVEE
CA12 CA13 AGND
10u/6.3V_4 0.1U/16V_4

Close to PIN41
CA14 2.2U/10V_4 37 24 CAP-
AGND AVSS1 CBN
38 23 CAP+ CA15 2.2U/10V_4
CA16 0.1U/16V_4 VREF CBP
AGND +3V_AVDD
CA17 10u/6.3V_4 39 22 AGND
CPVDD AVSS2
CA18 CA19 +5V_AVDD 40 21 CA20 10u/6.3V_4
AVDD1 LDO2-CAP AGND
10u/6.3V_4 0.1U/16V_4
+5V_DVDD 41 20 +1.8V_AVDD
PVDD1 AVDD2
Close to PIN46 LDO3_CAP
42 19 CA21 10u/6.3V_4 Close to PIN19
SPK-OUT-L+ LDO3-CAP
+3V_DVDD-IO

I2S-EN/SPDIF-OUT/GPIO2/DMIC-DATA34
43 18

、LA5、LA10
SPK-OUT-L- DVDD-IO
+5V_AVDD >40mils trace ACZ_SDOUT_AUDIO
09/23 delete current resistor then add LA4 44 17
+5V_AVDD SPK-OUT-R- SDATA-OUT ACZ_SDOUT_AUDIO [10]
LA4
+5V_AVDD 1 2 45 16 HD_SDIN0 RA9 22_1%_2
+5V SPK-OUT-R+ SDATA-IN ACZ_SDIN0 [10]
*HCB1005KF-181T15(180,1.5A)_4/S 12/05 RA11 change to short pad
1

RA10 200K_5%_2 +5V_DVDD 46 15 ACZ_SYNC_AUDIO

PVDD2 SYNC ACZ_SYNC_AUDIO [10]
C CA22 CA23 CA24 02/12 RA12 change to short pad C
10u/6.3V_4 0.1U/16V_4 *AZ2015-01H.R7G MUTE_LED_CNTL RA11 *0_5%_2/S MUTE_LED_CNTL_L 47 14 HD_BCLK RA12 *0_4/S

GPIO0/DMIC-DATA12
[48] MUTE_LED_CNTL JD2 BCLK BIT_CLK_AUDIO [10]
2

RA13 *100K_1%_2 HPOUT-JD_48 48 13

Close to PIN40

I2S-MCLK/GPO3
+3V_DVDD EAPD [41]

GPIO1/MIC-CLK
JD1 DC DET/EAPD
AGND SENSE_A RA14 *0_5%_2/S 49
[34] SENSE_A Thermal Pad RA15 100K_1%_2

I2C-DATA

I2S-LRCK
I2S-BCLK
+3V_DVDD

I2S-OUT
I2C-CLK
12/05 RA14 change to short pad

DVDD

I2S-IN
+1.8V_AVDD LA5

PDB
+1.8V_AVDD 1 2
+1.8V
*HCB1005KF-181T15(180,1.5A)_4/S
CA25

10

11

12
CA26 CA27 0.1U/16V_4
10u/6.3V_4 0.1U/16V_4
Close to PIN20

AGND
RA16 33_5%_2
+3V_AVDD I2S_LRCK [41]
LA10
+3V_AVDD 1 2 RA17 33_5%_2
+3V I2S_MCLK [41]
*HCB1005KF-181T15(180,1.5A)_4/S
RA19 33_5%_2
I2S_BCLK [41]
CA75 CA76
10u/6.3V_4 0.1U/16V_4 RA20 33_5%_2
I2S_DACDAT [41]
Close to PIN20
RA21 33_5%_2
I2S_OUT [41]
CA77 22p/50V_4
AGND
10/08 RA20 change connect to I2S_DACDAT
RA21 change connect to I2S_I2S_OUT

+3V_DVDD
Reserve TP9184
AMP_SCL
AMP_SCL [41]
AMP_SDA
AMP_SDA [41]
B B
RA69
RA23 *0_5%_2 *100K_1%_2 I2C supports master mode only.
RA65 *0_5%_2/S PD#
DA1
09/17 RA65 change to 0201
1 2 PD# 12/05 RA65 change to short pad +3V_DVDD
[41,42] VOLMUTE#

DMIC_DATA
+3V_DVDD RA26 2.2K_5%_2 AMP_SDA

DMIC_CLK
*RB500V-40 CA78 RA27 2.2K_5%_2 AMP_SCL
*0.1U/16V_4

I2S_LRCK CA29 22p/50V_4

RA25 1
*0_5%_2 3 I2S_MCLK CA30 22p/50V_4
[10] ACZ_RST#_AUDIO I2S_BCLK
QA2 CA31 22p/50V_4
*METR3904-G I2S_OUT CA32 22p/50V_4
2

RA28 *10K_1%_2 +3V_DVDD-IO

TP9179
TP9180

+5V_DVDD

RA31
10K_1%_2

AMP_BEEP AMP_BEEP_L RA32 1K_5%_2 AMP_BEEP_R2 AMP_BEEP_R

CA35 CA36
0.1U/16V_4 0.1U/16V_4
QA3
A A
2N7002K
3

CA37 RA33
100P/50V_4 1K_5%_2 2
ACZ_SPKR [10,16]
1

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
C 1A
ALC3315-CG
NB5 Date: Wednesday, April 08, 2020 Sheet 39 of 106
5 4 3 2 1
 5 4 3 2 1

CHECK WITH G3ZA

Head Phone out
40
D D

C C

Head Phone jack

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
HP AMP/HP Jack/MIC Jack(NA)
NB5 Date: Wednesday, April 08, 2020 Sheet 40 of 106
5 4 3 2 1
 5 4 3 2 1

schematic reference X3A

41
Speaker AMP SDW mode,
DVDD_IO=SdW_IO_1.8V=1.8V for SdW

09/23 delete current resistor then add RA39 ALDO_VBUF_A

12/05 RA39 change to short pad
+3V_DVDD_AMPA DVDD_IO_A PVDD_A
PVDD 6V~26V Cap need use 25V UP I2S mode, DVDD_IO=3.3V
D +VIN PVDD_A D

placement close Pin.2

RA39 *0_5%_8/S +3V DVDD_IO_A

RA40 *0_5%_4/S
CA42 CA43 CA44

29

19

18

35
6

2
0.1U/25V_4 10u/25V_6 10u/25V_6
CA45

DVDD_33
AVDD_33

AVDD_5

SdW_IO_18

PVDD_CD
DVDD_IO

PVDD_AB
0.1U/10V_2
09/23 delete current resistor then add RA40
12/05 RA40 change to short pad
placement close Pin19 RA41
PVDD_A 47 0.2_1%_8
I2S_MCLK 20 R_Isense
placement close Pin.35 [39] I2S_MCLK MCLK/SdW_TOH_Mode
I2S_LRCK 21 46 BSTA_A CA47 0.22u/25V_6 1 2 R_SPK+_AMP
[39] I2S_LRCK I2S_BCLK LRCK/SdW_TOH1 BST_A
22
[39] I2S_BCLK I2S_DACDAT BCLK/SdW_TOH0 OUTA_P_RCH1
23 48
[39] I2S_DACDAT I2S_OUT DACDAT/SdW_SR1 OUTA_P_Rch
CA48 CA49 CA50 [39] I2S_OUT 24
0.1U/25V_4 ADCDAT/SdW_SR0 44 R_SPK-_AMP
10u/25V_6 10u/25V_6 OUTB_N_Rch
43 BSTB_A
RA66 10K_1%_2 17 BST_B CA51 0.22u/25V_6
RA67 10K_1%_2 16 SdW_DAT UA2
SdW_CLK
09/17 RA68 change to 0201
10/07 RA68 change to 10K ohm 42 BSTC_A CA52 0.22u/25V_6
ALC1309H-CGT BST_C
RA68 10K_1%_2 BTL_A 7 41 L_SPK-_AMP
AVCC=PVDD Cap need use 25V UP +3V ASEL0_A 25 BTL/PBTL OUTC_N_Lch RA44
PVDD_A AVCC_A ASEL1_A 26 ASEL0/VI_DAT_SYNC 37 OUTD_P_LCH1 0.2_1%_8
DA2 AMP_SDA ASEL1 OUTD_P_Lch
12
VOLMUTE# 1 AMP_SCL 13 SDA 39 BSTD_A 1 2 L_SPK+_AMP
[39,42] VOLMUTE# 3 AMP_PD#_R 14 SCL BST_D
placement close Pin.34 CA55 0.22u/25V_6
HP_EAPD 2 PDB 38

HV_45_CAP

GVDD_OUT
[39] EAPD L_Isense

D_REG_18

PGND_CD
PGND_AB
RA45 10_5%_6

DGND_LV

VSS_SUB
VSS_ANA
CA56
BAT54AW-L

DGND
AGND

AVCC
EPAD
VREF
0.1U/25V_4

NC#4
NC#2
NC#1
NC#6
NC#5
NC#7
09/23 delete current resistor then add RA45
C C

8
3
1
31
28
36

10

11

27

30
15
9
32
33
45
40
49

34
OUTA_P_RCH1 RA46 @ *18_1%_2 CA57 *330p/50V_4

AVCC_A R_SPK-_AMP RA47 @ *18_1%_2 CA58 *330p/50V_4

HV_45_CAP_A
L_SPK-_AMP RA48 @ *18_1%_2 CA59 *330p/50V_4
VREF_A
OUTD_P_LCH1 RA49 @ *18_1%_2 CA60 *330p/50V_4
DVDD_3.3 D_REG_18_A

+3V +3V_DVDD_AMPA ALDO_VBUF_A

placement close Pin.6
RA50 *0_5%_4/S CA61 CA62 CA63 CA64 CA65

0.1U/10V_2

4.7U/6.3V_4
10U/10V_4 0.1U/10V_2 1u/10V_2
CA66 CA67 DVDD_IO_A
4.7U/6.3V_4 0.1U/10V_2 ASEL1/ASEL0 (7bit)
09/23 delete current resistor then add RA50 00 : 0x10h
12/05 RA50 change to short pad 01 : 0x11h
10 : 0x12h
11 : 0x13h
RA51 RA52
+3V_DVDD_AMPA @ *10K_1%_2 @ *10K_1%_2
placement close Pin.29

ASEL1_A ASEL0_A
CA68 CA69
1000P/25V_2 0.1U/10V_2

RA53 RA54
10K_1%_2 10K_1%_2
SPK-AMP-R
B B
CNA2

4
50281-0020L-V01
ASEL0,1 build-in 140K ohm pull low resistors, Rxx, Rxx can mount/unmount R_SPK+_AMP LA6 1 2 PBY160808T-600Y-N R_SPK+_AMP_L
R_SPK-_AMP LA7 1 2 PBY160808T-600Y-N R_SPK-_AMP_L 2
(Min R count=0 for ASEL0,1=00 by build-in pull low R) 1 Wire White
Wire Black

3
CA70 *680P/25V_2 DFHD02MR045
CA71 *680P/25V_2
CIS OK
11/28 CA70 、CA71 change to unmount

RA57 @ *0_5%_2
SPK-AMP-L
QA4A
*2N7002KDW 6
3 4 AMP_SDA SKP_ID
[42,48,88] MBDATA1 AMP_SDA [39] [13] SPK_ID 4
L_SPK-_AMP 1 2 PBY160808T-600Y-N L_SPK-_AMP_L 3
LA8 Wire Black
L_SPK+_AMP L_SPK+_AMP_L 2
LA9 1 2 PBY160808T-600Y-N Wire Red
1
5

TO EC DVDD_IO_A 5 51378-0040N-V01
2

CNA3
CA73 *680P/25V_2 CA72
DFHD04MR397
[42,48,88] MBCLK1
6 1 AMP_SCL
AMP_SCL [39]
CA74
11/28 CA73 、CA74 change to unmount
*680P/25V_2
220p/50V_4
QA4B
*2N7002KDW
CIS OK
RA63 *10K_1%_2 BTL_A
RA64 @ *0_5%_2

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
C 1A
Speaker AMP (ALC1309)
NB5 Date: Wednesday, April 08, 2020 Sheet 41 of 106
5 4 3 2 1
 5 4 3 2 1
09/23 delete current resistor then add RI149
+3VL_EC +3VPCU_KBC 12/05 RI149 change to short pad

42
C1503 0.1U/16V_4 EC_WRST
+3VPCU RI148 *0_5%_4/S +3VL_EC Reference G7AL schematic to modify C1510 0.1U/16V_4 RI149 *0_5%_6/S +3VPCU
09/23 delete current resistor then add RI148, RI150 C1526 0.1U/16V_4
QI1

1
12/05 RI148, RI150 change to short pad C1517 0.1U/16V_4 RI1 4.7K_5%_2 +3V

3
CI3 12/05 RI2 change to short pad C1468 0.1U/16V_4 DI8 METR3904-G
0.1U/10V_2 RI2 C1568 0.1U/16V_4 PDZ5.6B CI63 2 OVT_DETC 2 1 EC_PWROK
+3VL_ECACC +3VL_EC SLP_S3#_R *0_5%_2/S SLP_S3# 0.1U/16V_4 DI2 RB500V-40
SLP_S3# [10,48]
VRON
VRON [88]

1
RI150 *0_5%_4/S +3VL_ECACC +3VL_ECACC HRESET
+3VPCU HRESET [46]
RI3 10K_5%_2 +3VPCU
+1.8V_DEEP_SUS +3V_VCC_EC AC_PRESENT_EC
EC_PWROK AC_PRESENT_EC [10] THRM_ALERT_HW#1
CI9 CI10
EC_PWROK [10]
1000P/25V_2 0.1U/10V_2
D RI151 *0_5%_4/S IO_RST# D
For eSPI TBTA_I2C_IRQ2Z IO_RST# [48] Open Drain need pu high
+3VPCU_KBC TBTA_I2C_IRQ2Z [46]
HWPG
DC_PROCHOT_OFF HWPG [2,10,86,87,92,93]
IT5570_AGND 09/23 delete current resistor then add RI151 QI2 *2N7002K
MCU_HW_HI_LOW DC_PROCHOT_OFF [105]
12/05 RI151 change to short pad 3 1
MCU_HW_HI_LOW [48] DGPU_OVT# [21,22] +3VPCU
CI11 0.1U/16V_4
80CLK H_PECI (50ohm)
80CLK [38]
Route on microstrip only

2
For eSPI Spacing >18 mils DGPU_PWROK_Q [9,21]

114
121

106

127
RI5

11
26
50
92

74

84
83
82

19
20

99
98
97
96
93
Trace Length: 0.4~6.125 iches

3
IT5570 RI6 1K_5%_2 +VCCSTG 100K_5%_2
ESPI_0 10 87 MBCLK

VSTBY_FSPI

VSTBY(PLL)
VSTBY1
VSTBY2
VSTBY3
VSTBY4
VSTBY5

EGCLK/GPE3
EGCS#/GPE2
EGAD/GPE1

SMCLK4/L80HLAT/BAO/GPE0
SMDAT4/L80LLAT/GPE7

GPH7
ID6/GPH6
ID5/GPH5
ID4/GPH4
ID3/GPH3
CLKRUN#/ID0/GPH0
VCC

AVCC
[9] ESPI_0 ESPI_1 EIO0/LAD0/GPM0(3) SMCLK0/GPF2 MBCLK [82,98,106]
[9] ESPI_1
9 88 MBDATA 2 1 EC_PWROK EC_WRST
ESPI_2 8 EIO1/LAD1/GPM1(3) SMDAT0/GPF3 115 MBDATA [82,98,106]
SM BUS MBCLK1 DI3 RB500V-40
[9] ESPI_2 EIO2/LAD2/GPM2(3) SMCLK1/GPC1 MBCLK1 [41,48,88]

2
ESPI_3 7 116 MBDATA1 RI8 *0_2
[9] ESPI_3 ESPI_RESET# EIO3/LAD3/GPM3(3) SMDAT1/GPC2 EC_PECI_R MBDATA1 [41,48,88]
22 117 RI9 33_5%_2 CI13
[9] ESPI_RESET# ERST#/LPCRST#/GPD2 PECI/SMCLK2/GPF6(3) EC_PECI [2,11]
ESPI_CLK 13 118 GPUT_DATA 3 1 1u/25V_4
[9] ESPI_CLK ESPI_CS# ESCK/LPCCLK/GPM4(3) SMDAT2/PECIRQT#/GPF7(3) GPUT_DATA [21,38,48] PM_THRMTRIP# [2,11]
6 QI3
[9] ESPI_CS# ECS#/LFRAME#/GPM5(3) METR3904-G
CI12 220p/50V_4

MPC_PE 126
[88] MPC_PE 5 GA20/GPB5(3) 85 H_PROCHOT#
TPI30 SERIRQ GPIO TPCLK TPCLK [38] H_PROCHOT# [2,82,88,105]
CAPSLED# 15 ALERT#/SERIRQ/GPM6(3) PS2CLK0/CEC/TMB0/GPF0 86 TPDATA
[48] CAPSLED# SIO_EXT_SCI# ECSMI#/GPD4(3) LPC PS2DAT0/TMB1/GPF1 DGPU_PROCHOT_EC# TPDATA [38]
23 89
[13] SIO_EXT_SCI# EC_WRST ECSCI#/GPD3 PS2CLK2/GPF4 GPU_FW_EC DGPU_PROCHOT_EC# [21,82,105]
14 PS/2 90
W RST# PS2DAT2/GPF5 GPU_FW_EC [21,98]
4

3
80DAT
[38] 80DAT KBRST#/GPB6(3) H_PROCHOT#_EC 2 QI4 CI14
2N7002K *47P/50V_4
24 PWR_LED
C
IT5570 PW M0/GPA0 25 MBATLED0 PWR_LED [48] C

1
PW M1/GPA1 AC_LED_ON MBATLED0# [82]
28 RI10
GPPC_R2_EC_R PW M2/GPA2 I2C_EC_INT AC_LED_ON# [82]
DI4 2 RB500V-40 113 29 *10K_5%_2
[10] GPIO33_EC CRX0/GPC0 PW M3/GPA3 I2C_EC_INT [48]
[34] USB_BC_ON
1 USB_BC_ON 123
CTX0/TMA0/GPB2(3) CIR
LQFP SMCLK5/PW M4/GPA4
SMDAT5/PW M5/GPA5
30
31
FAN1_PWM
FAN2_PWM FAN1_PWM
FAN2_PWM
[38]
[38]

THRM_ALERT_HW#1
PWM
80
RSMRST# 119 DAC4/DCD0#/GPJ4(3) 47 FAN1SIG
[10] RSMRST# 33 DSR0#/GPG6 TACH0A/GPD6(3) 48 PCI_SERR# FAN1SIG [38] GPUT_CLK
[28,31,34,35,87,92,93,95] MAINON MAINON +3V RI12 4.7K_5%_2
GINT/CTS0#/GPD5 TACH1A/TMA1/GPD7(3) PCI_SERR# [13] GPUT_DATA
RI13 4.7K_5%_2
EMU_LID 81 120 TEMP_MBAT RI14 *4.7K_5%_2 DGPU_PROCHOT_EC#
[28] EMU_LID DAC5/RIG0#/GPJ5(3) TMRI0/GPC4(3) 124 TP_Disable# TEMP_MBAT [82] GPIO33_EC
RI32 *10K_5%_2
17 TMRI1/GPC6(3) TP_Disable# [38]
BATSHIP
[82] BATSHIP GPUT_CLK TXD/SOUT0/LPCPD#/GPE6
16 12/05 RI15 change to short pad
[21,38,48] GPUT_CLK RXD/SIN0/PW UREQ#/BBO/SMCLK2ALT/GPC7(3) VCI1 *AVLC5S_4
THERMISTOR 71 107 ACIN
[32] THERMISTOR THERMISTOR_SHDN 72 ADC5/DCD1#/GPI5(3) GPE4/BTN# 18 SLP_S4#_R ACIN [82,105] VRON
[32] THERMISTOR_SHDN SYS_I ADC6/DSR1#/GPI6(3) UART port WAKE UP RI1#/GPD0(3)
RI15 *0_5%_2/S
SLP_S4# [10,48]
RI16 100K_5%_2
73 21 DNBSWON# RI17 100K_5%_2 MAINON
[82] SYS_I ADC7/CTS1#/GPI7(3) RI2#/GPD1 DNBSWON# [10]
SUSON 35 RI18 100K_5%_2 SUSON
[87,95] SUSON EC_PWM 34 RTS1#/GPE5 VOLMUTE#
RI19 100K_5%_2
[28] EC_PWM USB_CTRL2 PW M7/RIG1#/GPA7 +VSTBY_3.3V
122 112
[34] USB_CTRL2 DTR1#/SBUSY/GPG1/ID7 VSTBY0 +3VPCU_KBC
MBDATA3 95 110 NBSWON1#
[46] MBDATA3 94 CTX1/SOUT1/GPH2/SMDAT3/ID2 PW RSW /GPB3 111 NBSWON1# [48]
MBCLK3 TPI28 CI15
[46] MBCLK3 CRX1/SIN1/SMCLK3/GPH1/ID1 XLP_OUT/GPB4 LID_EC#
109
BIOS_SPI_CLK 105 LID_SW #/GPB1 108 IO_INT# LID_EC# [106] NBSWON1#
[12] PCH_SPI1_CLK_R RI33 15_1%_2 0.1U/10V_2 +3VPCU RI20 10K_5%_2
BIOS_CS# 101 FSCK/GPG7 AC_IN#/GPB0 IO_INT# [48]
RI34 15_1%_2 RI35 4.7K_5%_2 MBCLK1
[12] PCH_SPI_CS0#_R BIOS_WR# FSCE#/GPG3
RI36 15_1%_2 102 EXTERNAL SERIAL FLASH RI37 4.7K_5%_2 MBDATA1
[12] PCH_SPI1_SI_R FMOSI/GPG4
RI38 15_1%_2 BIOS_RD# 103 66 KB4Z_ID RI21 47K_1%_2 LID_EC#
[12] PCH_SPI1_SO_R FMISO/GPG5 ADC0/GPI0(3) AD_TYPE KB4Z_ID [48] S5_ON
Close to BIOS 67 RI22 47K_1%_2
B 56 ADC1/GPI1(3) 68 ADAPTER_SEL_EC AD_TYPE [43] B
MY16 RI39 *4.7K_5%_2 MBCLK
[48] MY16 KSO16/SMOSI/GPC3(3) ADC2/GPI2(3) ADAPTER_SEL_EC [43]
MY17 57 69 BAT_I RI40 *4.7K_5%_2 MBDATA
[48] MY17 H_PROCHOT#_EC KSO17/SMISO/GPC5(3) ADC3/GPI3(3) TP_INTH# BAT_I [82]
32 70 RI42 4.7K_5%_2 MBCLK3
PW M6/SSCK/GPA6 ADC4/GPI4(3) TP_INTH# [13,38]
RI43 4.7K_5%_2 MBDATA3
S5_ON 100 SPI ENABLE A/D D/A
[86] S5_ON SSCE0#/GPG2
VOLMUTE# 125
[39,41] VOLMUTE# SSCE1#/GPG0 EC_RTC_RST
76 RI23 10K_5%_2 DNBSWON#
TACH2A/GPJ0(3) TBT_MRESET_EC EC_RTC_RST [10] +3VS5 USBPW_ON
MY0 36 77 TPI29 RI24 10K_5%_2
[48] MY0 KSO0/PD0 TACH2B/GPJ1(3) SLP_SUS_ON SLP_SUS_ON
MY1 37 78 RI41 100K_5%_2
[48] MY1 KSO1/PD1 DAC2/TACH0B/GPJ2(3) SLP_SUS_ON [92]
MY2 38 79 FAN2SIG
[48] MY2 39 KSO2/PD2 DAC3/TACH1B/GPJ3(3) FAN2SIG [38]
MY3
[48] MY3 40 KSO3/PD3 GPIO33_EC
MY4 CI71 *0.1u/16V_4
[48] MY4 MY5 41 KSO4/PD4
[48] MY5 KSO5/PD5
MY6 42 KBMX
[48] MY6 43 KSO6/PD6
MY7 HWPG CI16 0.1u/16V_4
[48] MY7 MY8 44 KSO7/PD7
[48] MY8 KSO8/ACK# THERMISTOR_SHDN
MY9 45
[48] MY9 46 KSO9/BUSY
MY10 THERMISTOR
[48] MY10 KSO10/PE USBPW_ON ADAPTER_SEL_EC
MY11 51 2
[48] MY11 KSO11/ERR# GPJ7 USBPW_ON [34]
KSI3/SLIN#

5VS5_ON
KSI1/AFD#

52 128
KSI0/STB#

MY12 CLOCK
KSI2/INIT#

[48] MY12 KSO12/SLCT GPJ6 5VS5_ON [86]

MY13 53 CI17 CI18 CI19
VCORE

[48] MY13 KSO13

54
AVSS

MY14
VSS1

VSS2
VSS3
VSS4
VSS5

[48] MY14
KSI4
KSI5
KSI6
KSI7

MY15 55 KSO14 *0.1U/16V_4 *0.1U/16V_4 *0.1U/16V_4

[48] MY15 KSO15
58
59
60
61
62
63
64
65

27
49
91
104

75

12

CI20
MX0 0.1U/16V_4
[48]
[48]
MX0
MX1
MX1 EC_VCORE CLOSE to EC Pin
MX2
A [48] MX2 A
MX3
[48] MX3
MX4 PW SW Reserve on MB side
、 、
[48] MX4
MX5 IT5570_AGND 09/17 RI46 change to 0201
[48] MX5
MX6 SW1 01/21 RI46 SW1 CI23 change to unmount
[48] MX6
MX7 2 1 RI46 *1K_1%_2 NBSWON1#
[48] MX7
sw-sox-154hnt-2p CI23

1 2
*T3C2QR PROJECT : G3BE
*0.1U/16V_4
LI6
[2,6,93]
[9,10,11,13,16,17,18,21,28,30,31,33,34,36,38,39,41,48,50,51,52,82,88,91,95,98,99,101,105]
+VCCSTG
+3V
Quanta Computer Inc.
*BLM15AG121SN1D_S_4
[10,12,14,23,31,35,38,47,48,51,82,86,88,92,93,95,104,105] +3VS5
Size Document Number Rev
[10,32,34,35,43,46,48,51,82,86,88,104,106] +3VPCU Custom
IT5570_AGND EC (IT5570) 1A
NB5 Date: Wednesday, April 08, 2020 Sheet 42 of 106
5 4 3 2 1
 5 4 3 2 1

Adapter Type check

43
+3VPCU
03/04 DI5 P/N change to BCRB500VZ29 & reserve PR10636 & PR10635

1
DI5
*RB500V-40

2
PR10636 PR10635
D D
*0_5%_2 *0_5%_2

AD_TYPE RI27 2K_1%_2 RI28 100_1%_2

[42] AD_TYPE AD_ID [82]

1
DI6 RI29
PDZ5.6B CI21 7.15K_1%_2 CI22
0.1u/10V_2 100p/16V_2

Adapter select for EC ADAPTER_SEL_EC

ADAPTER_SEL_EC [42]

Ra Rb
+3VPCU RI30 10K_1%_2 RI31 27.4K_1%_4
09/17 RI30 change to 0201

Ra Rb ADAPTER_SEL_EC BOM
200W 10K(CS31002FB26) 100K (CS41002FB28) 3V N18E
C
150W 10K(CS31002FB26) 27.4K(CS32742FB14) 2.42V N18P C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
EC (IT5570)
NB5 Date: Wednesday, April 08, 2020 Sheet 43 of 106
5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
NA
NB5 Date: Wednesday, April 08, 2020 Sheet 44 of 106
5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
NA
NB5 Date: Wednesday, April 08, 2020 Sheet 45 of 106
5 4 3 2 1
 5 4 3 2 1

PD TPS65987SDJRSHR 46
03/30 UP1 P/N change to AL180901003
VCC3V3_FLASH UP1B TBTA_VBUS_L
D
3A D
CP1 4.7u/6.3V_4 PD_LDO_1V8 35
LDO_1V8 13 TBTA_VBUS_R RP1 *0_5%_8/S UP1C
9 VBUS1
LDO_3V3 60 82
12/05 RP1 change to short pad S2
DRAIN2#5 GND#14
+5VS5 25 10/08 UP1.3 change connect to GND 61 81
PP1_CABLE 62 DRAIN2#6 GND#13 80
600mA DRAIN2#7 GND#12
46 3 66 79
PP2_CABLE VBUS2 67 DRAIN2#8 GND#11 78
S1 58 +5VS5 68 DRAIN2#9 GND#10 77
CP2 CP3 8 DRAIN1#4 DRAIN2#10 GND#9 76
15 DRAIN1#1 GND#8 75
10u/6.3V_6 22u/6.3V_6 DRAIN1#2 3A VIA HOLE 60~82 GND#7
19 11 74
DRAIN1#3 PP_HV1 S1 69 GND#6 73
S2 57 CP4 70 DRAIN1#8 GND#5 72
7 DRAIN2#4 10u/6.3V_6 71 DRAIN1#9 GND#4
52 DRAIN2#1 1 63 DRAIN1#10
56 DRAIN2#2 PP_HV2 64 DRAIN1#5
DRAIN2#3 +3V3PD +3VPCU 65 DRAIN1#6
59 DRAIN1#7
51 GND#3 5 RP2 *0_5%_6/S
20 GND#2 VIN_3V3 TPS65987SDJRSHR
GND#1
09/23 delete current resistor then add RP2
TPS65987SDJRSHR CP5 12/05 RP2 change to short pad
C
10u/6.3V_6 C

PD SPI ROM
VCC3V3_FLASH UP1A
TPP5 VCC3V3_FLASH
TPP8 PD_DI RP18 3.3K_1%_2 PD_CS
TPP9 PD_DO RP19 3.3K_1%_2 PD_DO TPP2 PD_GPIO0 16 24
PD_CS PD_WP 17 GPIO0 C1_CC1 TBTA_CC1 [47]
TPP10 RP20 3.3K_1%_2 CP6 220p/25V_2
TPP11 PD_CLK RP21 3.3K_1%_2 PD_HOLD 18 GPIO1 26
30 GPIO2 C1_CC2 TBTA_CC2 [47]
CP7 220p/25V_2
[13,47] TBTA_HPD 31 GPIO3/HPD1 27
GPIO4/HPD2 I2C1_SCL MBCLK3 [42]
21 28

VCC3V3_FLASH
[47]
[47]
PA_DP_MODE
PA_POL
22 GPIO5
GPIO6
I2C1_SDA
I2C1_IRQ
29 MBDATA3 [42]
TBTA_I2C_IRQ2Z [42]
TO EC
23 RP8 10K_5%_2 +3V3PD
[47] PA_TBT_MODE PD_DO 36 GPIO7
UP2
8 5 PD_DI PD_DI 37 SPI_MISO/GPIO8 45
B
VCC DI(IO0) SPI_MOSI/GPIO9 C2_CC1
12/09 UP1A.45, UP1A.47 change connect to GND B
PD_WP 3 2 PD_DO PD_CLK 38
PD_HOLD 7 WP(IO2) DO(IO1) 1 PD_CS PD_CS 39 SPI_CLK/GPIO10 47 +3V3PD
4 HOLD(IO3) CS 6 PD_CLK TPP12 PD_GPIO12 40 SPI_SS/GPIO11 C2_CC2
9 GND CLK 41 GPIO12 32 I2C2_SCL RP9 10K_1%_2
TPAD 42 GPIO13 I2C2_SCL 33 I2C2_SDA RP11 10K_1%_2
W25Q80DVZPIG 43 GPIO14/PWM I2C2_SDA 34 I2C2_IRQ RP12 10K_1%_2
48 GPIO15/PWM I2C2_IRQ
49 GPIO16/PP_EXT1
50 GPIO17/PP_EXT2 44
[9,47] USBP4+ C1_USB_P/GPIO18 HRESET HRESET [42]
53 RP13 100K_5%_2
[9,47] USBP4- C1_USB_N/GPIO19
TPP3 PD_GPIO20 54
TPP4 PD_GPIO21 55 C2_USB_P/GPIO20 6
C2_USB_N/GPIO21 ADCIN1 RP14 10K_5%_2 RP15 100K_5%_2 VCC3V3_FLASH
10
ADCIN2 RP16 100K_5%_2 RP17 10K_5%_2 VCC3V3_FLASH
TPS65987SDJRSHR

10/08 UP1 change to AL180901000

Qunata PN Part Description

A
AL180901000 IC OTHER(56P) SN1809018RSHR(VQFN) A

AL180901003 IC OTHER(56P) SN1809018RSHR(VQFN)TOPBS

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
B 1A
PD TPS65987SDJRSHR
NB5 Date: Wednesday, April 08, 2020 Sheet 46 of 106
5 4 3 2 1
 5 4 3 2 1

+3VS5 +3VS5 47
CP8 CP9 CP10 CP11 CP12 CP13 CP14 CP15 CP47
0.1u/16V_4 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 2.2u/10V_4 10u/6.3V_4

11/28 UP3 FP change to qfn40-6x4-4-49p-tusb546

UP3

41
42
43
44
45
46
47
48
49

28
20
6

1
D D
TUSB546-DCI

GND#8
GND#1

GND#3
GND#4
GND#5
GND#6
GND#7

VCC#2

VCC#4
VCC#3
VCC#1
GND#9
GND#2
DP1_D0 CP16 0.1u/10V_2 B1_ML0p 9
[21] DP1_D0 DP1_D0# B1_ML0n DP0p
DisplayPort Source [21] DP1_D0# CP17 0.1u/10V_2 10
DP0n
DP1_D3 CP18 0.1u/10V_2 B1_ML3p 18
From GPU [21] DP1_D3 DP1_D3# CP19 0.1u/10V_2 B1_ML3n 19 DP3p
[21] DP1_D3# DP3n

02/12 RP26~RP29 change to short pad

30 B1_RX1p RP26 *0_5%_2/S TYPEC1_RX1p
RX1p 31 B1_RX1n RP27 *0_5%_2/S TYPEC1_RX1n
CP20 0.22u/6.3V_2 B1_SSRXp 5 RX1n
[9] USB30_RX4+ B1_SSRXn SSRXp B1_RX2p TYPEC1_RX2p
[9] USB30_RX4- CP21 0.22u/6.3V_2 4 40 RP28 *0_5%_2/S
SSRXn RX2p 39 B1_RX2n RP29 *0_5%_2/S TYPEC1_RX2n
RX2n
USB3.0 HOST 33 B1_TX1p TYPEC1_TX1p
CP22 0.22u/6.3V_2
TX1p 34 B1_TX1n CP23 0.22u/6.3V_2 TYPEC1_TX1n
From PCH CP24 0.22u/6.3V_2 B1_SSTXp 8 TX1n
[9] USB30_TX4+ B1_SSTXn SSTXp B1_TX2p TYPEC1_TX2p
CP25 0.22u/6.3V_2 7 37 CP26 0.22u/6.3V_2
[9] USB30_TX4- SSTXn TX2p B1_TX2n TYPEC1_TX2n
36 CP27 0.22u/6.3V_2
TX2n

+3VS5

RP30 4.7K_5%_2
DP1_D2 CP28 0.1u/10V_2 B1_ML2p 15 RP32
DisplayPort Source
[21]
[21]
DP1_D2
DP1_D2#
DP1_D2# CP29 0.1u/10V_2 B1_ML2n 16 DP2p
DP2n CAD_SNK/DCI_DAT
29 RP31 *4.7K_5%_2
+3VS5 *4.7K_5%_2 TUSB546 Pin Control Mode
DP1_D1 CP30 0.1u/10V_2 B1_ML1p 12 CTL1CTL0FLIP TUSB546 Mode Selection
From GPU [21] DP1_D1 DP1_D1# B1_ML1n 13 DP1p 23 B1_SW2
[21] DP1_D1# CP31 0.1u/10V_2 RP33 *0_5%_2/S PA_DP_MODE [46]
DP1n CTL1/HPDIN 22 B1_SW1
CTL0/SDA
RP34 *0_5%_2/S PA_TBT_MODE [46] L L L Chip Power Down
C 21 B1_SW0 RP35 *0_5%_2/S C
FLIP/SCL PA_POL [46]
L L H Chip Power Down
DP1_AUXP CP32 0.1u/10V_2 B1_AUXp 24 27 B1_SBU1 RP36 *0_5%_2/S
[21] DP1_AUXP DP1_AUXN B1_AUXn AUXp SBU1 B1_SBU2 TBTA_SBU1 [47]
CP33 0.1u/10V_2 25 26 RP37 *0_5%_2/S L H L One Port USB 3.1 - No Flip
[21] DP1_AUXN AUXn SBU2 B1_HPDIN TBTA_SBU2 [47]

DPEQ0/A1
SSEQ0/A0
32 RP38 *0_5%_2/S
HPDIN/DCI_CLK TBTA_HPD [13,46]
L H H One Port USB 3.1 - With Flip
I2C_EN

DPEQ1
SSEQ1
EQ0
EQ1
+3VS5 RP62 *0_5%_2/S H L L 4 Lane DP - No Flip
[21] DP1_HPD
12/05 RP33~RP38, RP62 change to short pad H L H 4 Lane DP - With Flip
17

11
14

38
35
3

2
RP39
100K_5%_2 H H L One Port USB 3.1 + 2 Lane DP - No Flip
B1_I2C_EN
B1_SSEQ0 H H H One Port USB 3.1 + 2 Lane DP - With Flip
B1_AUXn B1_DPEQ0
B1_AUXp B1_EQ0
B1_EQ1
B1_SSEQ1
RP42 B1_DPEQ1
100K_5%_2

AUX Pin Control Mode

+3VS5 +3VS5 +3VS5 CTL1 FLIP AUX Select
04/06 RP49 change to 1K & mount H L AUXP->SBU1,AUXN->SBU2
+3VS5 B1_SSEQ0 RP45 *1K_5%_2 B1_EQ0 RP44 *1K_5%_2 B1_DPEQ0 RP46 *1K_5%_2 H H AUXP->SBU2,AUXN->SBU1
RP48 *1K_5%_2 RP47 *1K_5%_2 RP49 1K_5%_2 L>2ms X Open
B1_I2C_EN RP50 *1K_5%_2

RP51 1K_5%_2 +3VS5 +3VS5 03/30 RP56 change to 20K & mount +3VS5
04/06 RP56 change to 1K 4 Level Input:
B B1_SSEQ1 RP52 *1K_5%_2 B1_EQ1 RP55 *1K_5%_2 B1_DPEQ1 RP53 *1K_5%_2 L: Option1 Tie 1Kohm 5% to GND B

RP54 *1K_5%_2 RP57 *1K_5%_2 RP56 1K_5%_2 Option2 Directly tie to GND
R: Tie 20kohm 5% to GND
I2C Programming or pin strap programming select. F: Float(leave pin open)
I2C is only disable when this pin is '0'
0 : Pin Strap(I2C disable)(Default) SSEQ0,SSEQ1 : USB receiver equalizer gain EQ0,EQ1 : USB receiver equalizer gain DPEQ0,DPEQ1 : DP Receiver equalization gain 1: Option1 Tie 1Kohm 5% to Vcc
R : TI test mode(I2C enable at 3.3V) for upstream facing SSTXP/N for downstream facing RX1 & RX2 F,F(Default) Option2 Directly tie to Vcc
F : I2C enabled at 1.8V F,F(Default) F,F(Default) When I2C_EN is not '0' DPEQ0 sets I2C adress
1 : I2C enabled at 3.3V When I2C_EN is not '0' SSEQ0 sets I2C adress

03/30 CNP1 P/N change to DFHS24FR610

CNP1
TBTA_VBUS_L
TBTA_VBUS_L
3A
DP15
TYPEC1_TX1p A2 A4 1 2 P4SMAJ20A
TYPEC1_TX1n SSTXp1 VBUS#1
A3 B4 CP42 CP43 CP44 CP45
TYPEC1_RX1p SSTXn1 VBUS#3
B11 A9 0.47U/25V_4 0.47U/25V_4 0.47U/25V_4 0.47U/25V_4
TYPEC1_RX1n SSRXp1 VBUS#2
B10 B9
SSRXn1 VBUS#4
TYPEC1_TX2p B2 A1
TYPEC1_TX2n SSTXp2 GND#1
B3 SSTXn2 A12 03/30 DP16~DP27 P/N change to BC0H1BSFZ00
TYPEC1_RX2p GND#2
A11 SSRXp2 B1
TYPEC1_RX2n GND#3 TYPEC1_TX1p 1 2
A10 SSRXn2 B12
GND#4 DP16 PESD5V0H1BSF
2 1 USBP4+_C A6 1 TYPEC1_TX1n 1 2
[9,46] USBP4+ USBP4-_C Dp1 GND#5
[9,46] USBP4- 3 4 A7 2 DP17 PESD5V0H1BSF
Dn1 GND#6 TYPEC1_RX1p TBTA_CC1 USBP4-_C
B6 3 1 2 1 2
Dp2 GND#7
LP2 MCM2012B900GBE B7 4 DP18 PESD5V0H1BSF DP19 PESD5V0H1BSF
Dn2 GND#8 TYPEC1_RX1n TBTA_CC2 USBP4+_C
A 5 1 2 1 2 A
GND#9 DP20 PESD5V0H1BSF DP21 PESD5V0H1BSF
6
TBTA_CC1 GND#10 7 TYPEC1_TX2p 1 2 TBTA_SBU1 1 2
[46] TBTA_CC1 A5 CC1 GND#11

2
TBTA_CC2 B5 8 DP22 PESD5V0H1BSF DP23 PESD5V0H1BSF 11/28 CP46 FP change to dfn3-1x0_6-pe1605m2q
[46] TBTA_CC2 CC2 GND#12 TYPEC1_TX2n 1 2 TBTA_SBU2 1 2 CP46 12/09 CP46 change to BC325ZGDZ00
TBTA_SBU1 A8 DP24 PESD5V0H1BSF DP25 PESD5V0H1BSF ESD5302N-3/TR 04/09 CP46 change to BC005302Z00
[47] TBTA_SBU1 TBTA_SBU2 SBU1 TYPEC1_RX2p
B8 1 2
[47] TBTA_SBU2 SBU2

3
DP26 PESD5V0H1BSF
TYPEC1_RX2n 1 2
RP60 RP61 DP27 PESD5V0H1BSF
2M_5%_2 2M_5%_2
PROJECT : G3BE
020090HB024M52SZL
Quanta Computer Inc.
Size Document Number Rev
C 1A
MUX TUSB546I/ TYPE-C
NB5 Date: Thursday, April 09, 2020 Sheet 47 of 106
5 4 3 2 1
 A B C D E

GPIO EXPENDER
+3VSUS +3V_IO
MCU_RESET
KB_GPO1#
TPI31
TPI32

TPLED#
[48]
[49]

A_VCORE
Per Key to MCU Board
01/21 Per Key parts change to unmount

+3VS5_MCU
+5V_MCU
CI61
CI62
48
*0.1U/16V_4
*0.1U/16V_4
RI47 *0_4

PWM_Output_EN
PANEL_RESET
+3VS5 RI48 *0_4/S CI64
0.1U/16V_4 23

A_WRST
A_GPE5
A_GPE4
+5V_MCU 1
01/30 RI48 change to short pad CI24 CI25 USBP8+ RI96 *0_5%_4 USBP8+_C
+3V_IO 2
0.1U/16V_4 0.1U/16V_4 USBP8- RI97 *0_5%_4 USBP8-_C
3
A_ALERT# *MCM2012B900GBE 4
RI53 10K_5%_2
4 2 1 USBP8+_C 5 4
[9] USBP8+ USBP8-_C 6
09/17 RI53 change to 0201 [9] USBP8-
3 4
7
UI2 LI5
Close to PIN14 and PIN24

21
20
19
18
17
16
15
IT8308FN/CX/R +5V +5V_MCU MCU_RESET 8
[48] MCU_RESET I2C_EC_SDA 9

GPE5
GPE4
WRST#
GPE3
GPE2
GPE0
VSS
+3V_IO I2C_EC_SCL 10
I2C_EC_INT 11
RI102 *0_5%_6/S
[42] I2C_EC_INT 12
LAN_POWER 22 14 09/23 delete current resistor then add RI102 EC_S3_STATUS 13
[95] LAN_POWER GPE6 VSTBY#1 +3V_IO [10,42] SLP_S3# 14
2

A_CHIP_ID1 23 13 A_SDA 12/05 RI102 change to short pad IAP_BOOT_STATUS

CHIP_ID1 SDA A_SCL [48] IAP_BOOT_STATUS ISP_BOOT_CTRL 15
+3V_IO 24 12 11/22 CNI5 pin17 change to LID# [48] ISP_BOOT_CTRL 16
3 1 A_ALERT# 25 VSTBY#2 SCL 11 A_ALERT# RI163 LID#_R
*0_5%_4
[42] IO_INT# [48] IAP_BOOT_STATUS GPC0 ALERT#
11/27 Add RI163 [34,106] LID# 17
ISP_BOOT_CTRL 26 10 A_CHIP_ID0
[48] ISP_BOOT_CTRL A_GPC2 GPC3 CHIP_ID0 A_GPA7 +3VS5 +3VS5_MCU KBPER_ID 18
2N7002K 27 9 RI104 *0_5%_4/S GPIO8
QI5
TPI23
TPI24
A_GPC1 28 GPC2 GPA7 8 A_GPA6 RI105 *0_5%_4/S GPIO7 KB MCU side need connect to +3VS5_MCU 19
GPC1 GPA6 +3VS5_MCU MCU_HW_HI_LOW 20
[42] MCU_HW_HI_LOW 21
RI60 *22/F_4 29 12/05 RI104, RI105 change to short pad RI103 *0_5%_4

VCORE
EPAD [10,42] SLP_S4# 22

GPA0
GPA3
GPA1

GPA5
GPA2
GPA4
09/23 delete current resistor then add RI103, RI136 24
*51519-02201-V01
+3V_IO CNI5

1
2
3
4
5
6
7
+3VS5_MCU
+3VPCU
RI62 DFFC22FR023
CHIP ID SELT

A_VCORE
RI136 *0_5%_4
10K_5%_2
CIS OK

A_GPA0
A_GPA3
A_GPA1

A_GPA5
A_GPA2
A_GPA4
09/17 RI762 change to 0201
RI140 *0_5%_4/S A_WRST
Slave address 0x21 +3VS5_MCU
[42] IO_RST#

5
12/05 RI140 change to short pad
+3V_IO +3V_IO
CI28 GPIO1 RI106 *0_5%_4/S 3 4 I2C_EC_SCL
[41,42,48,88] MBCLK1 MCU_RESET
1u/25V_4 GPIO2 RI107 *0_5%_4/S *2N7002KDW QI11A RI144 *10K_5%_2
GPIO3 RI108 *0_5%_4/S I2C_EC_SCL RI121 *4.7K_2

2
GPIO4 RI109 *0_5%_4/S I2C_EC_SDA RI122 *4.7K_2
GPIO5 RI110 *0_5%_4/S RI113 RI114 I2C_EC_INT RI139 *10K_5%_2
3 +3V_IO +3V_IO 6 1 I2C_EC_SDA 3
GPIO6 RI111 *0_5%_4/S *4.7K_2 4.7K_2 [41,42,48,88] MBDATA1
*2N7002KDW QI11B 09/17 RI121, RI122, RI144, RI139 change to 0201
12/05 RI106~RI111 change to short pad
09/17 RI115, RI116 change to 0201 A_CHIP_ID1 A_CHIP_ID0 MBCLK1 RI134 *0_4 I2C_EC_SCL
MBDATA1 RI135 *0_4 I2C_EC_SDA
RI115 RI116
5

4.7K_2 4.7K_2
RI117 RI118
3 4 A_SCL 4.7K_2 *4.7K_2
[41,42,48,88] MBCLK1 A_SCL
2N7002KDW QI6A CI69 *820p/50V_4
A_SDA CI70 *820p/50V_4 09/17 RI113, RI114, RI117, RI118 change to 0201
2

10/02 RI114 change to mount and RI118 change to unmount

6 1 A_SDA
[41,42,48,88] MBDATA1
2N7002KDW QI6B

MY[0..17]

KEYBOARD Con. [42] MY[0..17]

MX[0..7] 4 zone LED +5V_LED_4Z +5V
+3V_KBLED
+3V_KBLED RI74 *0_5%_6/S +3V
[42]
MUTE_LED_CNTL_R1
MX[0..7]
Reference G3DC schematic 09/24 CNI2 change to 46 pin
RI75 *0_5%_8/S
+3V
09/23 delete current resistor then add RI74
12/05 RI74 change to short pad
09/23 delete current resistor then add RI75 09/17 RI76 change to 0201 UI3

27
3

12/05 RI75 change to short pad RI76 TLC59116IRHBR 09/25 update UI3 symbol
2 QI7 CI59 *1K_1%_2

VCC
[39] MUTE_LED_CNTL 47 MBCLK3_KB 25 LEDA_R1
2N7002K 0.1u/16V_4 3

RI66
MX0
MX1
1
10/17 RI76
MBDATA3_KB 26 SCL
change to unmount SDA
OUT0
OUT1
4
5
LEDA_G1
LEDA_B1
KB Zon1
2
1

MX2 OUT2 6 LEDA_R2

*10K_5%_2 & RI81 change to mount
09/17 RI66 change to 0201
MX3
MX4
3
4
09/26 update CNI3[12,19,33,34,35,36,38]
pin defined
PLTRST#
RI81 *0_5%_4/S
12/05 RI81 change to short pad
24
RESET
OUT3
OUT4
8
9
LEDA_G2
LEDA_B2
KB Zon2
5 OUT5
MY17 30 10 LEDA_R3
6
MY16
MY15
7
Reference G3DC schematic REXT OUT6
OUT7
11
14
LEDA_G3
LEDA_B3
KB Zon3
2 8 OUT8 2
MY14 09/17 RI88 change to 0201 31 15 LEDA_R4 RI87 *0_4/S LEDA_R44
+3VPCU MY13
MY12
9
10
CNI3
51540-02001-V01 RI88
32
1
A0
A1
OUT9
OUT10
16
17
LEDA_G4 RI89
LEDA_B4 RI90
*0_4/S LEDA_G44
*0_4/S LEDA_B44
KB Zon4
11 A2 OUT11
MY11 12 169_1%_2 2 19

21
RI72 MY10 A3 OUT12 20 01/30 RI87, RI89, RI90 change to short pad
13 OUT13
10K_5%_2 MY9 LEDA_R11 13 21
14 1 NC#1 OUT14
MY8 LEDA_G11 12 22 TPI20

GND#1
GND#2
GND#3
GND#4
15 2 NC#2 OUT15
09/17 RI72 change to 0201 MY7 LEDA_B11 28
16 3 NC#3
MY6 LEDA_R22 29
17 4 NC#4
DEEP_PWRLED# MY5 LEDA_G22
18 5
3

MY4 LEDA_B22
19

7
18
23
33
QI8 MY3 6 12/05 RI91, RI94 change to short pad
20 7
PWR_LED 2 LTC044EUBFS8TL MY2 RI91 *0_5%_4/S MBCLK3_KB
[42] PWR_LED
MY1
21
22
8 +5V_LED_4Z MCU Small Board side 3.3V [21,38,42] GPUT_CLK
RI94 *0_5%_4/S MBDATA3_KB
9 KBPER_ID [21,38,42] GPUT_DATA
MY0 23 10/18 QI16~QI26 change to BA0C8170001
CI57 MX5 10
24 11/22 swap QI16~QI24 C E side
1

0.1U/16V_4 MX6 11 09/17 RI131, RI138, RI132 change to 0201

25 12
01/30 RI77~RI86 change to short pad
MY5 CI29 220p/25V_2 MX7 26

LEDA_G11
LEDA_R11

LEDA_B11
MY6 CI30 220p/25V_2 GPIO8 13 LEDA_R33 RI138 RI154 *0_5%_4 RI155 *0_5%_4 RI156 *0_5%_4
27 14
MY3 CI31 220p/25V_2 GPIO7 LEDA_G33 10K_5%_2
28 15
MY7 CI32 220p/25V_2 GPIO6 LEDA_B33
29 16
GPIO5 LEDA_R44 QI16 QI17 QI18
30 17
MY8 CI33 220p/25V_2 GPIO4 LEDA_G44 BC807-25 BC807-25 BC807-25
31 18

1
MY9 CI34 220p/25V_2 GPIO3 LEDA_B44
32 19
MY10 CI35 220p/25V_2 GPIO2 4 zone LED KB ID RI131 4.7K_2 KB4Z_ID LEDA_R1 RI77 *0_4/S 2 LEDA_G1 RI78 *0_4/S 2 LEDA_B1 RI79 *0_4/S 2
33 20 KB4Z_ID [42]
MY11 CI36 220p/25V_2 GPIO1
GPIO0
34
35
KB side 5V
22

3
36 RI132
MY1 CI37 220p/25V_2 NBSWON1#
MY2 CI38 220p/25V_2
[42]
[42]
NBSWON1#
CAPSLED#
MUTE_LED_CNTL_R1
RI67 330_5%_4 CAPSLED#_R
MUTE_LED_CNTL_R
37
38 DFFC20FR101 10K_5%_2

MY4 CI39 220p/25V_2 RI68 330_5%_4 39

CIS OK

LEDA_G22
LEDA_R22

LEDA_B22
MY0 CI40 220p/25V_2 TPLED# RI69 330_5%_4 TPLED#_R RI157 *0_5%_4 RI158 *0_5%_4 RI159 *0_5%_4
40
DEEP_PWRLED# RI71 330_5%_4 DEEP_PWRLED#_R
41
MX4 CI41 220p/25V_2 RI152 *0_5%_4/S NUMPAD_ID_R
[11] NUMPAD_ID 42
MX6 CI42 220p/25V_2 LED_PW QI19 QI20 QI21
1
MX3 CI43 220p/25V_2
+3V
10/03 Add NUMPAD_ID to PCH and add RI152
43
44 KB Type Select KB4Z_ID BC807-25 BC807-25 BC807-25 1

1
MX2 CI44 220p/25V_2 12/05 RI152 change to short pad 45
LEDA_R2 RI80 *0_4/S 2 LEDA_G2 RI82 *0_4/S 2 LEDA_B2 RI83 *0_4/S 2
46
MX7 CI46 220p/25V_2
+3VPCU
48 51540-04601-V01
1 Zone KB 0V 09/24 add QI16~QI24 for 4 zone LED
10/03 QI16~QI24 change P/N to BA0C8170000

3
MX0 CI47 220p/25V_2 CNI2 10/15 add RI154~RI162
MX5
MX1
CI48
CI49
220p/25V_2
220p/25V_2 10/07 Add RI153 PU +3V for NUMPAD_ID
4 Zone KB 3.3V

LEDA_G33
LEDA_R33

LEDA_B33
+3V +3V +3VPCU RI160 *0_5%_4 RI161 *0_5%_4 RI162 *0_5%_4
MY12 CI50 220p/25V_2
NUMPAD_ID
PerKey KB 1.5V
MY13
MY14
CI51
CI52
220p/25V_2
220p/25V_2
RI153 10K_5%_2
QI22 QI23 QI24 PROJECT : G3BE
MY15 CI53 220p/25V_2 +3V_IO DFFC46FR000 CI56 CI45 BC807-25 BC807-25 BC807-25
Quanta Computer Inc.
1

1
MY16 CI54 220p/25V_2 0.1U/16V_4 0.1U/16V_4
MY17 CI55 220p/25V_2 GPIO0 RI112 1K_4 CIS OK LEDA_R3 RI84 *0_4/S 2 LEDA_G3 RI85 *0_4/S 2 LEDA_B3 RI86 *0_4/S 2
Size Document Number Rev
Custom 1A
GPIO EXPENDER/Keyboard
NB5
3

3
Date: Wednesday, April 08, 2020 Sheet 48 of 106
A B C D E
 5 4 3 2 1

1 zone LED KEYBOARD BACKLIGHT Con.

+VIN
49
+5V

RI129
D D
1M_5%_4

3
QI14 CNI4
KB_GPO1_Q 2 PJA3404

5
+5V_LED_KBLIGHT
1
3

RI130 +5V_LED_KBLIGHT +5V_LED_KBLIGHT

1
2 QI15 2M_5%_4 2
[48] KB_GPO1# +5V_LED_KBLIGHT 3
2N7002K 4
1

6
CI67 CI68
0.1u/16V_4 0.1u/16V_4 51678-00401-V01

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
1 Zone LED
NB5 Date: Wednesday, April 08, 2020 Sheet 49 of 106
5 4 3 2 1
 5 4 3 2 1

Panel-LCD Blight
Panel-3V LCD Power LAN Card Reader
50
Slave Addresses:1000000 Slave Addresses:1000001
Slave Addresses:1000010 Slave Addresses:1000011
A0 Channel OK OK OK
Placed close to RL15
OK
Placed close to RC2
Placed close to Le1 Placed close to Le7 +3V_CM_PWR +3V_CM_PWR
+3V_CM_PWR +3V_CM_PWR USE3 USE4
CSE7 CSE9
USE1 USE2
CSE1 CSE5 B1 A3 TPSE3 B1 A3 TPSE4
TPSE1 TPSE2 *0.1U/16V_2 VS ALERT *0.1U/16V_2 VS ALERT
B1 A3 B1 A3
D
*0.1U/16V_2 VS ALERT *0.1U/16V_2 VS ALERT D

C3 C3
A1 A1
C3 C3 B3 B3
A1 A1 A0 A0
B3 B3
A0 A0

[50,51] INA0_SDA A2 B2 [50,51] INA0_SDA A2 B2

SDA NC#1 SDA NC#1
[50,51] INA0_SDA A2 B2 [50,51] INA0_SDA A2 B2 [50,51] INA0_SCL A1 C2 [50,51] INA0_SCL A1 C2
SDA NC#1 SDA NC#1 SCL NC#2 SCL NC#2
[50,51] INA0_SCL A1 C2 [50,51] INA0_SCL A1 C2 D1 D1
SCL NC#2 SCL NC#2 BUS BUS
D1 D1
BUS BUS
+3VLANVCC +3V
+VIN +3VLCD_Ue2
CSE8 D3 CSE10 D3
CSE4 CSE6 IN+ IN+
D3 D3 D2 C1 D2 C1
IN+ IN+ *0.1U/16V_2 IN- GND *0.1U/16V_2 IN- GND
D2 C1 D2 C1
*0.1U/16V_2 IN- GND *0.1U/16V_2 IN- GND
+3VLANVCC_RSENSE *INA231AIYFFR +3V_CARDSense *INA231AIYFFR
+VIN_BLIGHT *INA231AIYFFR +3VLCD_CON *INA231AIYFFR

WLAN FAN1
SSD1 SSD2
Slave Addresses:1000100 Slave Addresses:1000110 Slave Addresses:1000111 OK
Slave Addresses:1000101
OK OK OK Placed close to RN13
Placed close to RK1 +3V_CM_PWR Placed close to RK11 +3V_CM_PWR
+3V_CM_PWR Placed close to RWL3 +3V_CM_PWR
CSE11
USE5
CSE12
USE6
USE7 USE8
CSE13 CSE14 B1 A3 TPSE5 B1 A3 TPSE6
TPSE7 TPSE8 *0.1U/16V_2 VS ALERT *0.1U/16V_2 VS ALERT
B1 A3 B1 A3
*0.1U/16V_2 VS ALERT *0.1U/16V_2 VS ALERT
C C3 C3 C
A1 A1
C3 C3 B3 B3
A1 A1 A0 A0
B3 B3
A0 A0

[50,51] INA0_SDA A2 B2 [50,51] INA0_SDA A2 B2

SDA NC#1 SDA NC#1
[50,51] INA0_SDA A2 B2 [50,51] INA0_SDA A2 B2 [50,51] INA0_SCL A1 C2 [50,51] INA0_SCL A1 C2
SDA NC#1 SDA NC#1 SCL NC#2 SCL NC#2
[50,51] INA0_SCL A1 C2 [50,51] INA0_SCL A1 C2 D1 D1
SCL NC#2 SCL NC#2 BUS BUS
D1 D1
BUS BUS
+3V +5V_FANIN_R
WIFI_3V +3V
CSE15 D3 CSE16 D3
CSE17 CSE18 IN+ IN+
D3 D3 D2 C1 D2 C1
IN+ IN+ *0.1U/16V_2 IN- GND *0.1U/16V_2 IN- GND
D2 C1 D2 C1
*0.1U/16V_2 IN- GND *0.1U/16V_2 IN- GND
+3V_SSD1 *INA231AIYFFR +5V *INA231AIYFFR
+3V_WLAN_P *INA231AIYFFR +3V_SSD *INA231AIYFFR

B B

CNSE1
*50450-0107C-001

Stuff in Monitor side

11
1 C_INA0_SCL +3VCM_PWR +3VCM_PWR
+3VCM_PWR RSE1 *0_5%_6 +3V_CM_PWR
2 C_INA0_SDA
3
4 C_INA0_SCL INA0_SCL
RSE2 *0_5%_4
5 C_INA0_SDA INA0_SDA INA0_SCL [50,51]
RSE3 *0_5%_4 INA0_SDA [50,51]
6
7 C_INA1_SDA C_INA1_SCL INA1_SCL
RSE4 *0_5%_4
8 C_INA1_SCL C_INA1_SDA INA1_SDA INA1_SCL [51,52]
RSE5 *0_5%_4 INA1_SDA [51,52]
9
10 +3VCM_PWR
12

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
C 1A
CURRENT SENSOR-1
NB5 Date: Friday, April 10, 2020 Sheet 50 of 106
5 4 3 2 1
 5 4 3 2 1

FAN2
EC
EC
51
EC Slave Addresses:1001010 OK Slave Addresses:1001011 OK
A0 Channel Slave Addresses:1001000 OK Slave Addresses:1001001 OK
Placed close to LI2 Placed close to LI3
Placed close to RN14 Placed close to LI1 +3V_CM_PWR +3V_CM_PWR
+3V_CM_PWR +3V_CM_PWR USE9 USE10
CSE19 CSE20
USE11 USE12
CSE21 CSE22 B1 A3 TPSE9 B1 A3 TPSE10
TPSE11 TPSE12 *0.1U/16V_2 VS ALERT *0.1U/16V_2 VS ALERT
B1 A3 B1 A3
*0.1U/16V_2 VS ALERT *0.1U/16V_2 VS ALERT
C3 C3
A1 A1
C3 C3 B3 B3
D A1 A1 A0 A0 D
B3 B3
A0 A0

[50,51] INA0_SDA A2 B2 [50,51] INA0_SDA A2 B2

SDA NC#1 SDA NC#1
[50,51] INA0_SDA A2 B2 [50,51] INA0_SDA A2 B2 [50,51] INA0_SCL A1 C2 [50,51] INA0_SCL A1 C2
SDA NC#1 SDA NC#1 SCL NC#2 SCL NC#2
[50,51] INA0_SCL A1 C2 [50,51] INA0_SCL A1 C2 D1 D1
SCL NC#2 SCL NC#2 BUS BUS
D1 D1
BUS BUS
+3VPCU +1.8V_DEEP_SUS
+5V_FANIN_R1 +3VPCU
CSE23 D3 CSE24 D3
CSE25 CSE26 IN+ IN+
D3 D3 D2 C1 D2 C1
IN+ IN+ *0.1U/16V_2 IN- GND *0.1U/16V_2 IN- GND
D2 C1 D2 C1
*0.1U/16V_2 IN- GND *0.1U/16V_2 IN- GND
+3VL_ECACC *INA231AIYFFR +1.8V_VCC_EC *INA231AIYFFR
+5V *INA231AIYFFR +3VL_EC *INA231AIYFFR

EC TBT Power PD Power 1 zone LED PWR

OK OK
Slave Addresses:1001100 OK Slave Addresses:1001101 OK Slave Addresses:1001110 Slave Addresses:1001111
Placed close to RP2 Placed close to RI95
Placed close to LI4 Placed close to RT62 +3V_CM_PWR +3V_CM_PWR
+3V_CM_PWR +3V_CM_PWR USE13 USE14
CSE27 CSE28
USE15 USE16
CSE29 CSE30 B1 A3 TPSE13 B1 A3 TPSE14
TPSE15 TPSE16 *0.1U/16V_2 VS ALERT *0.1U/16V_2 VS ALERT
B1 A3 B1 A3
*0.1U/16V_2 VS ALERT *0.1U/16V_2 VS ALERT
C3 C3
A1 A1
C3 C3 B3 B3
A1 A1 A0 A0
B3 B3
A0 A0
C C

[50,51] INA0_SDA A2 B2 [50,51] INA0_SDA A2 B2

SDA NC#1 SDA NC#1
[50,51] INA0_SDA A2 B2 [50,51] INA0_SDA A2 B2 [50,51] INA0_SCL A1 C2 [50,51] INA0_SCL A1 C2
SDA NC#1 SDA NC#1 SCL NC#2 SCL NC#2
[50,51] INA0_SCL A1 C2 [50,51] INA0_SCL A1 C2 D1 D1
SCL NC#2 SCL NC#2 BUS BUS
D1 D1
BUS BUS
+3VPCU +5V
+3VPCU +3V_AR
CSE31 D3 CSE32 D3
CSE33 CSE34 IN+ IN+
D3 D3 D2 C1 D2 C1
IN+ IN+ *0.1U/16V_2 IN- GND *0.1U/16V_2 IN- GND
D2 C1 D2 C1
*0.1U/16V_2 IN- GND *0.1U/16V_2 IN- GND
+3V3PD *INA231AIYFFR +5V_LED_KBLIGHT *INA231AIYFFR
+3VPCU_KBC *INA231AIYFFR +3VS5 *INA231AIYFFR

MCU Board PWR 4 zone LED PWR 4 zone LED Driver PWR
MCU Board PWR OK OK
A1 Channel Slave Addresses:1000000 OK Slave Addresses:1000001 OK Slave Addresses:1000010
Placed close to RI75
Slave Addresses:1000011
Placed close to RI74
Placed close to RI102 Placed close to RI103 +3V_CM_PWR +3V_CM_PWR
+3V_CM_PWR +3V_CM_PWR USE17 USE18
CSE35 CSE36
USE19 USE20
CSE37 CSE38 B1 A3 TPSE17 B1 A3 TPSE18
TPSE19 TPSE20 *0.1U/16V_2 VS ALERT *0.1U/16V_2 VS ALERT
B1 A3 B1 A3
*0.1U/16V_2 VS ALERT *0.1U/16V_2 VS ALERT
C3 C3
A1 A1
C3 C3 B3 B3
A1 A1 A0 A0
B3 B3
A0 A0

[50,51,52] INA1_SDA A2 B2 [50,51,52] INA1_SDA A2 B2

SDA NC#1 SDA NC#1
[50,51,52] INA1_SDA A2 B2 [50,51,52] INA1_SDA A2 B2 [50,51,52] INA1_SCL A1 C2 [50,51,52] INA1_SCL A1 C2
B SDA NC#1 SDA NC#1 SCL NC#2 SCL NC#2
B
[50,51,52] INA1_SCL A1 C2 [50,51,52] INA1_SCL A1 C2 D1 D1
SCL NC#2 SCL NC#2 BUS BUS
D1 D1
BUS BUS
+5V +3V
+5V +3VS5
CSE39 D3 CSE40 D3
CSE41 CSE42 IN+ IN+
D3 D3 D2 C1 D2 C1
IN+ IN+ *0.1U/16V_2 IN- GND *0.1U/16V_2 IN- GND
D2 C1 D2 C1
*0.1U/16V_2 IN- GND *0.1U/16V_2 IN- GND
+5V_LED_4Z *INA231AIYFFR +3V_KBLED *INA231AIYFFR
+5V_MCU *INA231AIYFFR +3VS5_MCU *INA231AIYFFR

+3VS5 +5VS5 +1.2VSUS +VCC_CORE

OK OK
Slave Addresses:1000100 OK Slave Addresses:1000101 OK Slave Addresses:1000110 Slave Addresses:1000111
Placed close to PR13054 Placed close to PR8900
Placed close to PR8603 Placed close to PR8614 +3V_CM_PWR +3V_CM_PWR
+3V_CM_PWR +3V_CM_PWR USE21 USE22
CSE43 CSE44
USE23 USE24
CSE45 CSE46 B1 A3 TPSE21 B1 A3 TPSE22
TPSE23 TPSE24 *0.1U/16V_2 VS ALERT *0.1U/16V_2 VS ALERT
B1 A3 B1 A3
*0.1U/16V_2 VS ALERT *0.1U/16V_2 VS ALERT
C3 C3
A1 A1
C3 C3 B3 B3
A1 A1 A0 A0
B3 B3
A0 A0

[50,51,52] INA1_SDA A2 B2 [50,51,52] INA1_SDA A2 B2

SDA NC#1 SDA NC#1
[50,51,52] INA1_SDA A2 B2 [50,51,52] INA1_SDA A2 B2 [50,51,52] INA1_SCL A1 C2 [50,51,52] INA1_SCL A1 C2
SDA NC#1 SDA NC#1 SCL NC#2 SCL NC#2
[50,51,52] INA1_SCL A1 C2 [50,51,52] INA1_SCL A1 C2 D1 D1
SCL NC#2 SCL NC#2 BUS BUS
A D1 D1 A
BUS BUS
+1.2VSUS +VIN
+3VS5 +5VS5
CSE47 D3 CSE48 D3
CSE49 CSE50 IN+ IN+
D3 D3 D2 C1 D2 C1
IN+ IN+ *0.1U/16V_2 IN- GND *0.1U/16V_2 IN- GND
D2 C1 D2 C1
*0.1U/16V_2 IN- GND *0.1U/16V_2 IN- GND
+1.2VSUS_S *INA231AIYFFR +VIN_VCC_CORE *INA231AIYFFR
+3VS5_R *INA231AIYFFR +5VS5_R *INA231AIYFFR

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
C 1A
CURRENT SENSOR-2
NB5 Date: Wednesday, April 08, 2020 Sheet 51 of 106
5 4 3 2 1
 5 4 3 2 1

+VCCGT +1.05V_DEEP_SUS
52
+1.8V_DEEP_SUS +VCCIO
Slave Addresses:1001000 Slave Addresses:1001001 Slave Addresses:1001010 OK OK
A1 Channel OK OK
Placed close to PR9213
Slave Addresses:1001011
Placed close to PR9309
Placed close to PR9100 Placed close to PR9203 +3V_CM_PWR +3V_CM_PWR
+3V_CM_PWR +3V_CM_PWR USE25 USE26
CSE51 CSE52
USE27 USE28
CSE53 CSE54 B1 A3 TPSE25 B1 A3 TPSE26
TPSE27 TPSE28 *0.1U/16V_2 VS ALERT *0.1U/16V_2 VS ALERT
B1 A3 B1 A3
*0.1U/16V_2 VS ALERT *0.1U/16V_2 VS ALERT
C3 C3
D A1 A1 D
C3 C3 B3 B3
A1 A1 A0 A0
B3 B3
A0 A0

[50,51,52] INA1_SDA A2 B2 [50,51,52] INA1_SDA A2 B2

SDA NC#1 SDA NC#1
[50,51,52] INA1_SDA A2 B2 [50,51,52] INA1_SDA A2 B2 [50,51,52] INA1_SCL A1 C2 [50,51,52] INA1_SCL A1 C2
SDA NC#1 SDA NC#1 SCL NC#2 SCL NC#2
[50,51,52] INA1_SCL A1 C2 [50,51,52] INA1_SCL A1 C2 D1 D1
SCL NC#2 SCL NC#2 BUS BUS
D1 D1
BUS BUS
+1.8V_DEEP_SUS +VCCIO
+VIN +1.05V_DEEP_SUS
CSE55 D3 CSE56 D3
CSE57 CSE58 IN+ IN+
D3 D3 D2 C1 D2 C1
IN+ IN+ *0.1U/16V_2 IN- GND *0.1U/16V_2 IN- GND
D2 C1 D2 C1
*0.1U/16V_2 IN- GND *0.1U/16V_2 IN- GND
+1.8V_DEEP_SUS_R *INA231AIYFFR +VCCIO_R *INA231AIYFFR
+VIN_VCCGT *INA231AIYFFR +1.05V_DEEP_SUS_R *INA231AIYFFR

+3V +3VSUS +1.8V +5V

Slave Addresses:1001100 Slave Addresses:1001101 Slave Addresses:1001110 OK Slave Addresses:1001111 OK
OK OK
Placed close to PR9508 Placed close to PR9502
Placed close to PR9500 Placed close to PR9501 +3V_CM_PWR +3V_CM_PWR
+3V_CM_PWR +3V_CM_PWR USE29 USE30
CSE59 CSE60
USE31 USE32
CSE61 CSE62 B1 A3 TPSE29 B1 A3 TPSE30
TPSE31 TPSE32 *0.1U/16V_2 VS ALERT *0.1U/16V_2 VS ALERT
B1 A3 B1 A3
*0.1U/16V_2 VS ALERT *0.1U/16V_2 VS ALERT
C3 C3
A1 A1
C3 C3 B3 B3
A1 A1 A0 A0
C B3 B3 C
A0 A0

[50,51,52] INA1_SDA A2 B2 [50,51,52] INA1_SDA A2 B2

SDA NC#1 SDA NC#1
[50,51,52] INA1_SDA A2 B2 [50,51,52] INA1_SDA A2 B2 [50,51,52] INA1_SCL A1 C2 [50,51,52] INA1_SCL A1 C2
SDA NC#1 SDA NC#1 SCL NC#2 SCL NC#2
[50,51,52] INA1_SCL A1 C2 [50,51,52] INA1_SCL A1 C2 D1 D1
SCL NC#2 SCL NC#2 BUS BUS
D1 D1
BUS BUS
+1.8V +5V
+3V +3VSUS
CSE63 D3 CSE64 D3
CSE65 CSE66 IN+ IN+
D3 D3 D2 C1 D2 C1
IN+ IN+ *0.1U/16V_2 IN- GND *0.1U/16V_2 IN- GND
D2 C1 D2 C1
*0.1U/16V_2 IN- GND *0.1U/16V_2 IN- GND
+1.8V_RL *INA231AIYFFR +5V_R *INA231AIYFFR
+3V_R *INA231AIYFFR +3VSUS_R *INA231AIYFFR

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
C 1A
CURRENT SENSOR-3
NB5 Date: Wednesday, April 08, 2020 Sheet 52 of 106
5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
C 1A
NA
NB5 Date: Wednesday, April 08, 2020 Sheet 53 of 106
5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
C 1A
NA
NB5 Date: Wednesday, April 08, 2020 Sheet 54 of 106
5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
C 1A
NA
NB5 Date: Wednesday, April 08, 2020 Sheet 55 of 106
5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
C 1A
NA
NB5 Date: Wednesday, April 08, 2020 Sheet 56 of 106
5 4 3 2 1
 5 4 3 2 1

37
D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
NA
NB5 Date: Wednesday, April 08, 2020 Sheet 57 of 106
5 4 3 2 1
 5 4 3 2 1

37
D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
NA
NB5 Date: Wednesday, April 08, 2020 Sheet 58 of 106
5 4 3 2 1
 5 4 3 2 1

37
D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
NA
NB5 Date: Wednesday, April 08, 2020 Sheet 59 of 106
5 4 3 2 1
 5 4 3 2 1

37
D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
NA
NB5 Date: Wednesday, April 08, 2020 Sheet 60 of 106
5 4 3 2 1
 5 4 3 2 1

37
D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
NA
NB5 Date: Wednesday, April 08, 2020 Sheet 61 of 106
5 4 3 2 1
 5 4 3 2 1

37
D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
NA
NB5 Date: Wednesday, April 08, 2020 Sheet 62 of 106
5 4 3 2 1
 5 4 3 2 1

37
D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
NA
NB5 Date: Wednesday, April 08, 2020 Sheet 63 of 106
5 4 3 2 1
 5 4 3 2 1

37
D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
NA
NB5 Date: Wednesday, April 08, 2020 Sheet 64 of 106
5 4 3 2 1
 5 4 3 2 1

37
D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
NA
NB5 Date: Wednesday, April 08, 2020 Sheet 65 of 106
5 4 3 2 1
 5 4 3 2 1

37
D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
NA
NB5 Date: Wednesday, April 08, 2020 Sheet 66 of 106
5 4 3 2 1
 5 4 3 2 1

37
D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
NA
NB5 Date: Wednesday, April 08, 2020 Sheet 67 of 106
5 4 3 2 1
 5 4 3 2 1

37
D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
NA
NB5 Date: Wednesday, April 08, 2020 Sheet 68 of 106
5 4 3 2 1
 5 4 3 2 1

37
D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
NA
NB5 Date: Wednesday, April 08, 2020 Sheet 69 of 106
5 4 3 2 1
 5 4 3 2 1

37
D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
NA
NB5 Date: Wednesday, April 08, 2020 Sheet 70 of 106
5 4 3 2 1
 5 4 3 2 1

37
D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
NA
NB5 Date: Wednesday, April 08, 2020 Sheet 71 of 106
5 4 3 2 1
 5 4 3 2 1

37
D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
NA
NB5 Date: Wednesday, April 08, 2020 Sheet 72 of 106
5 4 3 2 1
 5 4 3 2 1

37
D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
NA
NB5 Date: Wednesday, April 08, 2020 Sheet 73 of 106
5 4 3 2 1
 5 4 3 2 1

37
D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
NA
NB5 Date: Wednesday, April 08, 2020 Sheet 74 of 106
5 4 3 2 1
 5 4 3 2 1

37
D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
NA
NB5 Date: Wednesday, April 08, 2020 Sheet 75 of 106
5 4 3 2 1
 5 4 3 2 1

37
D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
NA
NB5 Date: Wednesday, April 08, 2020 Sheet 76 of 106
5 4 3 2 1
 5 4 3 2 1

37
D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
NA
NB5 Date: Wednesday, April 08, 2020 Sheet 77 of 106
5 4 3 2 1
 5 4 3 2 1

37
D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
NA
NB5 Date: Wednesday, April 08, 2020 Sheet 78 of 106
5 4 3 2 1
 5 4 3 2 1

37
D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
NA
NB5 Date: Wednesday, April 08, 2020 Sheet 79 of 106
5 4 3 2 1
 5 4 3 2 1

80
D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
80 -- TYPE-C/Barrel switch
NB5 Date: Wednesday, April 08, 2020 Sheet 80 of 106
5 4 3 2 1
 A B C D E

81
4 4

3 3

2 2

1 1

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
81 -- PWROK
NB5 Date: Wednesday, April 08, 2020 Sheet 81 of 106
A B C D E
 5 4 3 2 1

82
PR8202
PQ8200 +BAT_RTC PR8245 200K_1%_2
AONS32310 100_1%_2
B_RTC +3VPCU
3 PR8205

1
5 2 1K_1%_2
1 B_TEMP_MBAT
TEMP_MBAT [42,82]
PC8236
3S1P 52.5Whr

G
100p/50V_4 PD8210
*PDZ5.6B PC8207 PC8208

2
Place sense resistor close Place this TVS as 0.01u/50V_4 0.01u/50V_4
200W/19.5V/10.2A BATDIS_G 3S2P 70.9Whr
Idss< 5uA to to ADP connector side close as possible to
D
ADP IN_ CONN PQ8201 PQ8202 the furthest +VIN PQ8203 D
AONS32310 QM3092M6 PR8200 shape AONS21357 Place this cap
PCN8201 +VA +VAD +PRWSRC 0.005_1%_12 +VIN +BAT_DIS close to EC

13
S

D
ZVS close to DC jack 3 3 3

S
1 12 5 2 2 5 1 2 2 5
1 PCN8200
1 1 1
2

1
+BAT_DIS

51279-0120T-V01
2 11 PC8214 B_TEMP_MBAT

G
B_RTC 3

G
*0.1u/25V_4 PR8201 PC8205
3 10 BTLED_1 PR8252 PC8204 3M_5%_2 0.1u/25V_4 +BATCHG 4

4
5

0.1u/25V_4
2.2_5%_6 PD8200 PC8206 PR8253

1
4 9 AD_ID P4SMAFJ20A 2200p/50V_4 +BATCHG 6
1K_1%_2

2
7

1
NVPRO 2 PR8203 PR8204
5 8 PQ8204 8

1
*Short_0201 *Short_0201 SMD
PC8203 2N7002K PD8202 PQ8205 PC8201 SMC 9

3
10

3
6 7 2.2u/25V_4 PDZ5.1B AO3409 0.1u/25V_4
PR8207 PC8209 PC8210 PC8211 PD8209 11

2
1M_5%_2 0.1u/25V_4 0.1u/25V_4 0.1u/25V_4 2 *RB500V-40 12

14
CI0112P7HDY-R0-NH PR8214 PR8206
2.43K_1%_6 100K_1%_2 PR8209 PR8208
BATDIS_G 330_5%_2 330_5%_2
+5VPCU

1
4 3

Q2
PR8210
PR8246 Don't add test pad 470K_5%_2
3

75K_1%_2 5 6
[42,82,98,106] MBDATA MBCLK [42,82,98,106]
2 BATLED MBATLED0# [42]

1
2 1
+VIN

Q1
PQ8207 PR8211 PR8212 PR8213 PC8213 PC8212
1

METR3904-G +VAD 100_1%_4 100_1%_4 PQ8206 100K_1%_2 *100p/50V_4 *100p/50V_4

PR8247 MMDT2907AQ
*100K_1%_2

2
PR8215 PD8204 PD8203
C 470K_5%_2 *PDZ5.6B *PDZ5.6B C
PR8217
4.02K_1%_2

2 BQACP
+5VPCU AD_ID [43] Don't add test pad

1BQACN
PD8205 +VIN
EC8200 BAS316 REGN6V
1000p/25V_2 PR8216

BQCMSRC
ACDET Vmin =17.6V
2 1 4.02K_1%_2
+VA
PR8219 PR8218

ACP

ACN
2.43K_1%_6 10_5%_8 PC8216 PC8217 PC8218 PC8219
2 1 PC8215 10u/25V_6 2200p/50V_4 1000p/25V_2 0.1u/25V_4
ACLED_1 +BATCHG
3 24 2.2u/16V_6
PD8207 CMSRC REGN
PR8220 BAS316 PC8220
3

PC8221 75K_1%_2 1u/25V_6 BQACDRV 4 26 BQHIDRV PQ8208

*0.1u/25V_4 2 ACLED ACDRV HIDRV AONP36336
AC_LED_ON# [42]
Fine tine detect voltage PR8221 PC8222 1 D1_1 G1 8 BQHIDRV
PQ8209 BQVCC 28 1_5%_6 0.047u/25V_4 Q1 PR8223
1

METR3904-G PD8208 PR8222 VCC BQBTST 2 7 PL8202 +BAT_DIS 0.01_1%_12 +BATCHG

25 D1_2 S1_SEN

PR8224 BAS316 430K_1%_2 Don't add test pad BTST 9 D1_3 4.7uH_7x7x3
*100K_1%_2 2 1 6 27 BQPHASE 3 G2 D2/S1_2 6 BQPHASE 1 2 1 2
+3V +VA ACDET PHASE Q2
4 S2_1 D2/S1_1 5 DCR= 40 mohm (max.)
ACDET>2.4V PC8223 10 S2_2 PC8224 PC8225 PC8227
+3VS5

10u/25V_6

10u/25V_6

0.1u/25V_4
24V>VCC>SRN PR8225 0.1u/16V_4
ACOK goes HIGH 68.1K_1%_2 PR8226
[2,42,88,105] H_PROCHOT#
PR8251 2.2_5%_6
6

4.7K_1%_2 PR8227 PR8228

23 BQLODRV *Short_0201 *Short_0201
2 PR8250 PR8229 *Short_0201 BQSDA LODRV
[42,82,98,106] MBDATA 11
B PQ8213B PQ8213A 10K_1%_2 SDA B
22
GND#1
3

2N7002KDW 2N7002KDW PR8230 *Short_0201 BQSCL 12 PU8200 PC8226

[42,82,98,106] MBCLK SCL BQ24781RUYR 29 2200p/50V_4
1

5 PR8231 *Short_0201 BQPROCHOT GND#2 PR8232

10
PROCHOT 10_1%_6
To GPU
PR8233 *0_5%_2 BQBATPRES 15 17 BQBATSRC
PC8237 [42,82] TEMP_MBAT BATPRES BATSRC PC8228
[21,42,105] DGPU_PROCHOT_EC#
4

*0.1u/25V_4 PR8234 *Short_0201

BQTB_STAT
3

TP8200 16 20 BQSRP PR8235 *Short_0603 0.1u/25V_4

PQ8212 2 TB_STAT SRP
*2N7002K PR8236 Don't add test pad
REGN6V
PR8249 100K_1%_2 PC8229
*0_5%_2 5
1

[42,105] ACIN ACOK 0.1u/25V_4

DGPU_PROCHOT_EC# 19 BQSRN PR8237 *Short_0603
PR8238 SRN
100K_1%_2 18 BQBATDRV
BQIADP BATDRV
7
[42] SYS_I IADP Don't add test pad PC8230
PR8239 30 0.1u/25V_4 +BATCHG
PC8231 300_5%_2 PC8232 BQIBAT GND#3
8 31
2200p/50V_4 100p/50V_4 IDCHG GND#4
32
GND#5
GND#11
GND#10
33
GND#9 GND#6
PMON

34 PR8248
GND#7
ILIM

NC1

NC2

35 470_5%_8
GND#8
Place this cap

3 SHIPNET
21

13

14

38
37
36

close to EC PR8240
300_5%_2
BQPMON

[42] BAT_I
BQILIM

A PR8241 A
PR8242 *0_5%_2
PC8233 PC8234 100K_1%_2 2
IMVP_PSYS [42] BATSHIP
2200p/50V_4 100p/50V_4 +3VPCU
PQ8211
PC8235 2N7002K

1
VIDCHG = 8 or 16 × (VSRN – VSRP) PR8244 *100p/50V_4
PR8243 *0_5%_2 PROJECT : G3BE
Place this cap 100K_1%_2
close to EC Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Set MAX charge I to 8.25A 82 -- Charge
NB5 Date: Wednesday, April 08, 2020 Sheet 82 of 106
5 4 3 2 1
 5 4 3 2 1

83
D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
83 -- Charger (ISL9538HRTZ-T)
NB5 Date: Wednesday, April 08, 2020 Sheet 83 of 106
5 4 3 2 1
 5 4 3 2 1

84
D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
84 -- Charge II
NB5 Date: Wednesday, April 08, 2020 Sheet 84 of 106
5 4 3 2 1
 A B C D E

85
4 4

3 3

2 2

1 1

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
85 -- Charger II
NB5 Date: Wednesday, April 08, 2020 Sheet 85 of 106
A B C D E
 5 4 3 2 1

Do Not add test pad on VCC & LDO pin

[10,12,14,23,31,35,38,42,47,48,51,82,88,92,93,95,104,105]
[10,32,34,35,42,43,46,48,51,82,88,104,106]
[10,34,46,51,87,92,93,95,98,101,105]
[39,82,95,105]
[28,41,49,50,51,52,82,87,89,91,92,93,97,101]
+3VS5
+3VPCU
+5VS5
+5VPCU
+VIN
86
PU8600 +VIN_3VS5 +VIN
+3VPCU TPS51393
PV change
2 MV change PR8600 *Short_0805
D 15 VIN#1 3
MV change +3.3 Volt +/- 5% D
LDO VIN#2 4
PR8601 VIN#3 5 PC8601 PC8602 PC8603 PC8604 PC8605 PC8606 EDP:6A
VIN#4 +3VS5

10u/25V_6
10K_1%_2 PC8600

0.1u/25V_4
*2.2u/25V_4
EDP:8A

10u/25V_6

2200p/50V_4

10u/25V_6
+3VS5 4.7u/10V_4 MV delete

PR8602 3VS5PG 9
[2,10,42,86,87,92,93] HWPG PGOOD
*Short_0201 PR8605 PR8603
PR8604 1_5%_6 PC8608
499K_1%_2 1 3VS5BST 3VS5BST_S Max DCR= 15 mohm *Short_0805
11 BOOT PL8600 +3VS5_R
+VIN ENLDO
MV delete 0.1u/25V_4 1.5uH_7x7x3 PV modify to shortpad
6 3VS5_LX 1 2
SW #1 19
SW #2 20 PC8609 PR8607
PR8606
80.6K_1%_2 SW #3 SN3V
PR8608 PC8610 PC8611 PC8612 PC8613 PC8614
PR8609 *Short_0201

0.1u/6.3V_2
22u/6.3V_6

22u/6.3V_6

22u/6.3V_6

*22u/6.3V_6
*Short_0201 10 *2200p/50V_4 *2.2_5%_6
S5_ON 3VS5EN 12 NC#1 16
[42,86] S5_ON EN NC#2

PR8610 PC8615
1M_5%_2 *0.1u/16V_4 symmetrically on the top- and bottom-sides

14 3VS5VOUT
VOUT
17
VCC PR8611 PC8616
C 13 3VS5FF C

GND#1
GND#2
GND#3
GND#4
FB
240K_1%_2
PC8617 470p/50V_4
1u/10V_4

7
8
18
21
Do Not add test pad on VCC & LDO pin
PV modify to shortpad
PU8601 +VIN_5VS5 +VIN
+5VPCU TPS51395
PV change
2 PR8612 *Short_0805
15 VIN#1 3
MV delete +5 Volt +/- 5%
LDO VIN#2 4
VIN#3 5 PC8619 PC8620 PC8621 PC8623 PC8624 PC8625 TDC:6A
VIN#4

10u/25V_6

10u/25V_6

0.1u/25V_4

0.1u/25V_4
PC8618
EDP:9A

10u/25V_6

2200p/50V_4
4.7u/10V_4 +5VS5

PR8613 *Short_0201 5VS5PG 9

B [2,10,42,86,87,92,93] HWPG PGOOD B
PR8615 PC8626
PR8616 1_5%_6 0.1u/25V_4 PR8614
499K_1%_2 1 5VS5BST 5VSTBST_S Max DCR= 20 mohm *Short_0805
11 BOOT PL8601 +5VS5_R
+VIN ENLDO
MV delete 2.2uH_7x7x3 PV modify to shortpad
6 5VS5_LX 1 2
SW#1
19
Option USB charge PR8617
SW#2 20 PC8627 PR8618
80.6K_1%_2 SW #3 SN5V
PV change PR8619 PC8628 PC8629 PC8630 PC8631 PC8632
PR8620 *Short_0201

0.1u/6.3V_2
22u/6.3V_6

22u/6.3V_6

22u/6.3V_6

*22u/6.3V_6
10 *2200p/50V_4 *2.2_5%_6
S5_ON
*0_5%_2 Ra NC#1
5VS5EN12 16
[42,86] S5_ON EN NC#2

PR8622
1K_1%_2 PR8621 PC8633 symmetrically on the top- and bottom-sides
5VS5_ON 1M_5%_2 *0.1u/16V_4
[42] 5VS5_ON 14 5VS5OUT
Rb VOUT
17
VCC PR8623 PC8635
13 5VS5FF
GND#1
GND#2
GND#3
GND#4

PC8634 FB
2.2u/10V_4 240K_1%_2
470p/50V_4
8 18 21
7

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
86 -- +3/5VS5( SY8286B/SY8286C)
NB5 Date: Wednesday, April 08, 2020 Sheet 86 of 106
5 4 3 2 1
 5 4 3 2 1

35
D D

+2.5V +/- 5%
TDC:1A
+1.2V +/- 5%
+VIN PR8700 +VIN_DDR +2.5V_SUS
*Short_0603 Countinue current:6A
Peak current:8A
PC8700 PC8701 PC8702 PC8703 PC8704 PR8702 OCP minimum:10.5A
0.1u/25V_4 10u/25V_6 10u/25V_6 10u/25V_6 0.1u/25V_4 *Short_0603
PL8700 +1.2VSUS
PU8700
MV change 4.7uH_2.5x2.0
7 15 1 2
PVIN SW _VPP
C 14 12 PR8703 C
+5VS5 PVIN_VPP VPPSNS
*Short_0201 PC8706
PR8701 PC8707 22u/6.3V_6 PR8714
*Short_0402 PC8705 18 1P35V_BOOT *Short_0805
10u/6.3V_4 BST
13
VCC_5V PR8704 0.1u/25V_4 PL8701 +1.2VSUS_S 2019/7/24 update
5.1_1%_6 1uH_7x7x3
PC8708 1 17 1 2
1u/6.3V_4 PC8709 VLDOIN SW

5 PR8707
PR8706 10u/6.3V_4 VDDQSNS *Short_0201 PC8713 PC8710 PC8711 PC8712 PC8714
+1.2VSUS
PR8708 *Short_0201 *Short_0603 8 0.1u/6.3V_2 22u/6.3V_6 22u/6.3V_6 *22u/6.3V_6 *22u/6.3V_6
[2,10,42,86,92,93] HWPG PGOOD
PR8709 *Short_0201 11
[42,95] SUSON 10 SLP_S4 2 +0.6V_DDR_VTT DDR_VTT
VTT_CNTL VTT
4 PR8710
PC8715
*0.1u/6.3V_2 VTTSNS
*Short_0201
PR8711 3
*Short_0201 16 AGND PC8716
9 PGND_VPP 6 10u/6.3V_4
[28,31,34,35,42,92,93,95] MAINON PGND VTTREF

PC8717 TPS51486RJER
*0.1u/6.3V_2 PR8712 ( 3mA )
PR8713 100_1%_2
[18] DDR_VTT_PG_CTRL_R
*0_5%_2 DDR_VTTREF
2019/7/24 update
PC8718 PC8719
B 0.22u/6.3V_4 0.1u/6.3V_2 B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
87 -- +0.95VS5
NB5 Date: Wednesday, April 08, 2020 Sheet 87 of 106
5 4 3 2 1
 5 4 3 2 1

+3V +3VS5

88
+VCCSTPLL

PR8800 PR8801
*4.7_5%_2 4.7_5%_2
MP2949A_PW1 PR8802 *Short_0201
PR8803 PR8804 PR8805 PR8806 PC8800 VCORE_PWM1 [89]
100_1%_2 *75_1%_2 45.3_1%_2 *75_1%_2 0.1u/6.3V_2 MP2949A_PW2 PR8807 *Short_0201
MP2949_+1.8V VCORE_PWM2 [89]
MP2949A_PW3 PR8808 *Short_0201
VCORE_PWM3 [90]
D MP2949A_PW4 PR8813 *Short_0201 D
VR_SVID_DATA PR8812 VCORE_PWM4 [90]
VR_SVID_ALERT# *0_5%_2 MP2949A_PW5 PR8814 *Short_0201
VR_SVID_CLK GT_PWM5 [91]
H_PROCHOT# PR8816 MP2949A_PW6 PR8815 *Short_0201
2M_1%_2 VCCSA_PWM6 [91]
+3VS5 MP2949A_VIN_SEN
+VIN_VCC_CORE MP2949A_CS1 PR8817 *Short_0201
VCORE_CS1 [89]

0.01u/50V_4 PC8802
MP2949A_CS2

1u/6.3V_4 PC8803
PR8819 *Short_0201

MP2949A_VDD18

MP2949A_VDD33
VCORE_CS2 [89]
PR8809 PR8810 PR8811 PC8801 PR8818
10K_1%_2 *4.7K_1%_2 *4.7K_1%_2 0.1u/6.3V_2 133K_1%_2
PC8804 MP2949A_CS3 PR8820 *Short_0201
VCORE_CS3 [90]
4.7u/6.3V_4
MP2949A_SLP_SO#
MBCLK1_VR MP2949A_CS4 PR8831 *Short_0201
MBDATA1_VR VCORE_CS4 [90]

MP2949A_CS5 PR8832 *Short_0201

VCCGT_CS1 [91]

49

47

26

44

43

42

41

40

39

38
MP2949A_CS6 PR8833 *Short_0201

VDD18

VDD33

PWM1

PWM2

PWM3

PWM4

PWM5

PWM6
AGND

VIN_SEN
VCCSA_CS1 [91]
PR8821 *Short_0201 MP2949A_EN 37
[42] VRON EN MP2949A_STB
34 PR8822 *Short_0201
PR8823 *0_5%_2 MP2949A_SLP_SO# 35 STB VR_STB [89,90,91]
[10] PCH_SLP_S0ix# SLP_S0# 5 MP2949A_CS1
PC8805 PR8834 1.5K_1%_2
*0.1u/6.3V_2 +3V MBCLK1_VR
PR8824 *Short_0201 MP2949A_SCL_P 33 CS1
SCL_P 4 MP2949A_CS2 PR8825 1.5K_1%_2 VCORE_CSUMA
C MBDATA1_VR
PR8826 *Short_0201 MP2949A_SDA_P 32 CS2 C
PR8827 SDA_P 3 MP2949A_CS3 PR8835 1.5K_1%_2
PR8828 75_1%_2 MP2949A_VRHOT# 31 CS3
*10K_1%_2 [2,42,82,105] H_PROCHOT# VRHOT# 2 MP2949A_CS4 PR8829 1.5K_1%_2
PR8830 *Short_0201 MP2949A_VRRDY 30 CS4
IMVP_PWRGD VRRDY 1 MP2949A_CS5 PR8836 1.5K_1%_2 VCCGT_CSUMB
PR8837 *Short_0201 MP2949A_ALT# 29 CS5
[2] VR_SVID_ALERT# ALT# PU8800 48 MP2949A_CS6 PR8838 1.5K_1%_2 VCCSA_CSUMC
PR8839 10_1%_2 MP2949A_SDIO 28 CS6
[2] VR_SVID_DATA SDIO MP2949AGQKT-0291-Z 6 MP2949A_VDIFFA 2019/12/6 updated
PR8841 49.9_1%_2 MP2949A_SCLK 27 VDIFFA
[2] VR_SVID_CLK SCLK
PM BUS Address=20h MP2949A_ADDR_P
2019/9/5 updated PR8840 PR8842
PC8806
25 825_1%_4 *0_5%_2
MP2949_+1.8V ADDR_P MP2949A__VFBA 2949_VFBA
7 PR8844 *100_1%_2
MP2949A_PSYS VFBA +VCC_CORE
PR8843 46
*0_5%_2 PSYS *0.1u/6.3V_2
PR8845 MP2949A_PE 36 8 MP2949A_VOSENA PR8847 0_5%_2
PE VOSENA VCC_SENSE [7]
*Short_0201 PR8846 PC8807
20K_1%_2 9 MP2949A_VORTNA PR8848 0_5%_2
MP2949A_IREF VORTNA VSS_SENSE [7]
*330p/25V_2 PR8850 61.9K_1%_2 24
IREF 10 MP2949A_VDIFFB
VCORE_CSUMA PR8851 *Short_0201 MP2949A_CSUMA 18 VDIFFB PR8849 PR8852 *100_1%_2
CSSUMA 2.37K_1%_4 PR8853 PC8808
VCCGT_CSUMB PR8854 *Short_0201 MP2949A_CSUMB 19 *0_5%_2 *0.1u/6.3V_2
CSSUMB 11 MP2949A_VFBB 2949_VFBB
VCCSA_CSUMC PR8855 *Short_0201 MP2949A_CSUMC 20 VFBB PR8856 100_1%_2
CSSUMC +VCCGT
2019/9/5 updated MP2949A_IMONA 21
IMONA 12 MP2949A_VOSENB PR8857 0_5%_2
MP2949A_IMONB 22 VOSENB VCCGT_SENSE [5]
B IMONB 13 MP2949A_VORTNB PR8859 0_5%_2 B
VORTNB VSSGT_SENSE [5]

VORTNC

VOSENC
PR8858 PC8809 MP2949A_IMONC 23

VDIFFC
IMONC

TEMP
220p/25V_2

VFBC
26.7K_1%_2
PR8862 100_1%_2
+3VPCU PC8810
PR8860 PR8861 68p/50V_4

45

14

15

17

16
332K_1%_2
*10K_1%_2 PC8811 PR8864 100_1%_2 +VCCSA

MP2949A_TEMP
PR8863 *0.1u/6.3V_2
100K_1%_2
MP2949A_VOSEN PR8866 0_5%_2 VCCSA_SENSE [6]
PR8865 PC8812 MP2949A_VORTN PR8867 0_5%_2 VSSSA_SENSE [6]
[42] MPC_PE 115K_1%_2 68p/50V_4
PC8813
PR8868 *Short_0201 PR8869 100_1%_2
[89,90,91] VR_TEMP MP2949A_VFB 2949_VFBC
To EC pin77
PR8871 PC8814 PR8870
*0_5%_2 *0.1u/6.3V_2
49.9K_1%_2
1u/6.3V_4 MP2949A_VDIFFC
PR8872
PR8873 8.2K_1%_2
*0_5%_2

MBCLK1_VR 4 3
MBCLK1 [41,42,48] CPU Design P/N Vender P/N
+VIN_VCORE Dual PQ8800A
+3VPCU [10,32,34,35,42,43,46,48,51,82,86,104,106]
2N7002KDW
4+1+1 ( CORE,GT,SA)=4+1+1 AL002949042 MP2949AGQKT-0291-Z
+3VS5 [10,12,14,23,31,35,38,42,47,48,51,82,86,92,93,95,104,105]
5

A A
+5VS5 [10,34,46,51,86,87,92,93,95,98,101,105] +3VS5
PQ8800B
+VCCSTPLL [2,6]
2

+VCC_CORE [7,89,90] 2N7002KDW

+VCCGT [5,91] MBDATA1_VR 1 6
+VCCSA [6,91] MBDATA1 [41,42,48]

PROJECT : G3BE
PR8874
*0_5%_2 Quanta Computer Inc.
Size Document Number Rev
Custom 1A
88 -- DDR3 (RT8231B)
NB5 Date: Wednesday, April 08, 2020 Sheet 88 of 106
5 4 3 2 1
 5 4 3 2 1

PV modify to shortpad

89
+VIN_VCORE
+5VS5 [10,34,46,51,86,87,92,93,95,98,101,105] +VIN_VCC_CORE +VIN
+VCC_CORE [7,88,90]
PR8900
+VIN [28,41,49,50,51,52,82,86,87,91,92,93,97,101]
*Short_0805

PC8900 PC8901 PC8902 PC8903 PC8904 PC8905

10u/25V_6
+5V PC8906 + PC8907 + PC8909

*2.2u/25V_4

*2.2u/25V_4

*2.2u/25V_4

2200p/50V_4
0.1u/50V_4
3
4
9

*15u/25V_3528H1.9

*15u/25V_3528H1.9
0.1u/50V_4
D1
D PU8900 D
MP8693GDT-Z PR8901
PC8908 1_5%_6 PQ8900 DCR=2.1 mOhm +-7%
1u/6.3V_4 8 12 8693_VCORE_HG1 8693_VCORE_HG1_R 1 G1 AOE6932 2019/9/5 updated
VCC HGATE PL8900 +VCC_CORE
D2/S1 5 0.22uH_7x7x3
PC8910 2 S1/D2 6 8693_VCORE_SW1 1 2
[88] VCORE_PWM1 PR8902 *Short_0201 8693_VCORE_PWM1 3 0.1u/25V_4 7
PW M 1 8693_VCORE_BST1
BST PR8903 PR8904 PR8905 + PC8911

SN_CORE1
PR8906 *Short_0201 8693_VCORE_CS1 5 11 8693_VCORE_SW1 *2.2_5%_6 *Short_0201 *Short_0201

330u/2V_7343H1.9
[88] VCORE_CS1 CS SW
8 G2 VCORE_ISENP1_SRC
[88,89,90,91] VR_TEMP PR8907 *Short_0201 8693_VCORE_VTEMP1 2
TEMP S2
CML-H82 Baseline(35W)

ISENN

ISENP
*Short_0201 8693_VCORE_SYNC1 8693_VCORE_LG1

EPAD
PR8908 4 9 PR8909 2019/9/5 updated

GND
[88,89,90,91] VR_STB

10
SYNC LGATE PC8912 1.62K_1%_4
*2200p/50V_4 PC8913 CPU CORE Volt
0.1u/25V_4
Countinue current:86A

10
13

7
PR8911 Peak current:140A
PR8910 2K_1%_4
PR8912 PR8913 1 2 VCORE1_NTC1 OCP minimum:168A
649_1%_2 154_1%_4
8693_VCORE_ISENP1 2019/9/5 updated VCORE_ISENP1_SRC1 10K_NTC_4_1% PR8914 LL= 1.1mV/A
10K_1%_2
VCORE1_NTC2 VBOOT=0V
8693_VCORE_ISENN1 VCORE_ISENN1_SRC1
C C
PR8915
649_1%_2 PC8914
*0.1u/6.3V_2
+VIN_VCC_CORE

PC8915 PC8916 PC8917 PC8918 PC8919 PC8920

10u/25V_6

*2.2u/25V_4

*2.2u/25V_4

*2.2u/25V_4

2200p/50V_4
0.1u/50V_4
+5V

3
4
9
D1
PU8901
MP8693GDT-Z PR8916 PQ8901
PC8921 1_5%_6 AOE6932 2019/9/5 updated DCR=2.1 mOhm +-7%
1u/6.3V_4 8 12 8693_VCORE_HG2 8693_VCORE_HG2_R 1 G1
VCC HGATE PL8901 +VCC_CORE
D2/S1 5 0.22uH_7x7x3
PC8922 2 S1/D2 6 8693_VCORE_SW2 1 2
[88] VCORE_PWM2 PR8917 *Short_0201 8693_VCORE_PWM2 3 0.1u/25V_4 7
PW M 1 8693_VCORE_BST2
BST

SN_CORE2
PR8918 PR8919 PR8920
[88] VCORE_CS2 PR8921 *Short_0201 8693_VCORE_CS2 5 11 8693_VCORE_SW2 *2.2_5%_6 *Short_0201 *Short_0201 + PC8923
CS SW

330u/2V_7343H1.9
B 8 G2 B

[88,89,90,91] VR_TEMP PR8922 *Short_0201 8693_VCORE_VTEMP2 2 VCORE_ISENP2_SRC

TEMP S2
ISENN

ISENP

*Short_0201 8693_VCORE_SYNC2 8693_VCORE_LG2

EPAD

PR8923 4 9 PC8924
GND

[88,89,90,91] VR_STB

10
SYNC LGATE *2200p/50V_4 2019/9/5 updated
PR8924
1.62K_1%_4 PC8925
10
13

0.1u/25V_4

PR8926
PR8925 2K_1%_4
PR8927 PR8928 1 2 VCORE2_NTC1
649_1%_2 154_1%_4
8693_VCORE_ISENP2 2019/9/5 updated VCORE_ISENP2_SRC2 10K_NTC_4_1% PR8929
10K_1%_2
VCORE2_NTC2

8693_VCORE_ISENN2 VCORE_ISENN2_SRC2

PR8930
649_1%_2 PC8926
*0.1u/6.3V_2

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
89 -- +VCC_CORE (MP86903-C)
NB5 Date: Wednesday, April 08, 2020 Sheet 89 of 106
5 4 3 2 1
 5 4 3 2 1

+VIN_VCORE
+5VS5 [10,34,46,51,86,87,92,93,95,98,101,105]
+VCC_CORE
+VIN
[7,88,89]
[28,41,49,50,51,52,82,86,87,89,91,92,93,97,101]
+VIN_VCC_CORE 90
PC9000 PC9001 PC9002 PC9003 PC9004 PC9005

10u/25V_6

*2.2u/25V_4

*2.2u/25V_4

*2.2u/25V_4

2200p/50V_4
0.1u/50V_4
D D

+5V

3
4
9
D1
PU9000 PQ9000
MP8693GDT-Z PR9001 AOE6932 2019/9/5 updated
PC9006 1_5%_6 DCR=2.1 mOhm +-7%
1u/6.3V_4 8 12 8693_VCORE_HG3 8693_VCORE_HG3_R 1 G1
VCC HGATE PL9000 +VCC_CORE
D2/S1 5 0.22uH_7x7x3
PC9007 2 S1/D2 6 8693_VCORE_SW3 1 2
[88] VCORE_PWM3 PR9000 *Short_0201 8693_VCORE_PWM3 3 0.1u/25V_4 7
PW M 1 8693_VCORE_BST3
BST

SN_CORE3
PR9002 PR9005 PR9003
[88] VCORE_CS3 PR9004 *Short_0201 8693_VCORE_CS3 5 11 8693_VCORE_SW3 *2.2_5%_6 *Short_0201 *Short_0201
CS SW + PC9008 + PC9009
8 G2 VCORE_ISENP3_SRC

*330u/2V_7343H1.9

*330u/2V_7343H1.9
[88,89,90,91] VR_TEMP PR9006 *Short_0201 8693_VCORE_VTEMP3 2
TEMP S2

ISENN

ISENP
*Short_0201 8693_VCORE_SYNC3 8693_VCORE_LG3

EPAD
PR9007 4 9 PC9010 PR9008 2019/9/5 updated

GND
[88,89,90,91] VR_STB

10
SYNC LGATE *2200p/50V_4 1.62K_1%_4
PC9011
0.1u/25V_4

10
13

7
PR9010
PR9009 2K_1%_4
PR9011 PR9012 1 2 VCORE3_NTC3
C 649_1%_2 2019/9/5 updated 154_1%_4 C
8693_VCORE_ISENP3 VCORE_ISENP3_SRC3 10K_NTC_4_1% PR9013
10K_1%_2
VCORE3_NTC4

8693_VCORE_ISENN3 VCORE_ISENN3_SRC3

PR9014
649_1%_2 PC9012
*0.1u/6.3V_2
+VIN_VCC_CORE

PC9013 PC9014 PC9015 PC9016 PC9017 PC9018

10u/25V_6

*2.2u/25V_4

*2.2u/25V_4

*2.2u/25V_4

2200p/50V_4
0.1u/50V_4
+5V

3
4
9
D1
PU9001 PQ9001
MP8693GDT-Z PR9016 AOE6932 2019/9/5 updated
PC9019 1_5%_6 DCR=2.1 mOhm +-7%
1u/6.3V_4 8 12 8693_VCORE_HG4 8693_VCORE_HG4_R 1 G1
VCC HGATE PL9001
D2/S1 5 0.22uH_7x7x3
B PC9020 2 S1/D2 6 8693_VCORE_SW4 1 2 B

[88] VCORE_PWM4 PR9015 *Short_0201 8693_VCORE_PWM4 3 0.1u/25V_4 7

PW M 1 8693_VCORE_BST4
BST

SN_CORE4
PR9017 PR9018 PR9020
[88] VCORE_CS4 PR9019 *Short_0201 8693_VCORE_CS4 5 11 8693_VCORE_SW4 *2.2_5%_6 *Short_0201 *Short_0201
CS SW
8 G2 VCORE_ISENP4_SRC
[88,89,90,91] VR_TEMP PR9021 *Short_0201 8693_VCORE_VTEMP4 2
TEMP S2
ISENN

ISENP

*Short_0201 8693_VCORE_SYNC4 8693_VCORE_LG4

EPAD

PR9022 4 9 PR9023 2019/9/5 updated

GND

[88,89,90,91] VR_STB

10
SYNC LGATE PC9021 1.62K_1%_4
*2200p/50V_4 PC9022
0.1u/25V_4
10
13

PR9025
PR9024 2K_1%_4
PR9026 PR9027 1 2 VCORE4_NTC6
649_1%_2 2019/9/5 updated 154_1%_4
8693_VCORE_ISENP4 VCORE_ISENP4_SRC4 10K_NTC_4_1% PR9028
10K_1%_2
VCORE4_NTC2

8693_VCORE_ISENN4 VCORE_ISENN4_SRC4

PR9029
649_1%_2 PC9023
*0.1u/6.3V_2

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
90 -- +VCC_CORE (MP86903-C)
NB5 Date: Wednesday, April 08, 2020 Sheet 90 of 106
5 4 3 2 1
 5 4 3 2 1

+VIN_VCCGT +VIN
PR9100

91
+VCCSA [6,88] *Short_0805
+5VS5 [10,34,46,51,86,87,92,93,95,98,101,105]
+3VS5 [10,12,14,23,31,35,38,42,47,48,51,82,86,88,92,93,95,104,105]
+VCCGT [5,88]
PC9100 PC9101 PC9102 PC9103 PC9104 PC9105
+VIN [28,41,49,50,51,52,82,86,87,89,92,93,97,101]

10u/25V_6
PC9106

*2.2u/25V_4

*2.2u/25V_4

*2.2u/25V_4

2200p/50V_4
0.1u/50V_4
+VIN_VCORE

0.1u/50V_4
+5V

3
4
9
D D1 D
PU9100
MP8693GDT-Z PR9101 PQ9100
PC9107 1_5%_6 AOE6932 2019/9/5 updated DCR=2.1 mOhm +-7%
1u/6.3V_4 8 12 8693_GT_HG1 8693_GT_HG1_R 1 G1
VCC HGATE PL9100 +VCCGT
D2/S1 5 0.22uH_7x7x3
PC9108 2 S1/D2 6 8693_GT_SW1 1 2
[88] GT_PWM5 PR9102 *Short_0201 8693_GT_PWM1 3 0.1u/25V_4 7
PW M 1 8693_GT_BST1
BST PR9103 PR9105 PR9106 + PC9110 + PC9109
PR9104 *Short_0201 8693_GT_CS1 5 11 8693_GT_SW1 *2.2_5%_6 *Short_0201 *Short_0201

330u/2V_7343H1.9

*330u/2V_7343H1.9
[88] VCCGT_CS1 CS SW
8 G2 GT_ISENP1_SRC
[88,89,90,91] VR_TEMP PR9107 *Short_0201 8693_GT_VTEMP1 2
TEMP S2 SN_GT

ISENN

ISENP
*Short_0201 8693_GT_SYNC1 8693_GT_LG1

EPAD
PR9108 4 9 PR9109

GND
[88,89,90,91] VR_STB

10
SYNC LGATE PC9111 1.62K_1%_4
*2200p/50V_4 PC9112
0.1u/25V_4

10
13

7
PR9110 PR9111
10K_NTC_4_1% 2K_1%_4
PR9112 PR9113 1 2 GT_NTC1
649_1%_2 2019/9/5 updated 154_1%_4 CML-H82 (35W)
8693_GT_ISENP1 GT_ISENP1_SRC1 PR9114
10K_1%_2 GT Volt
GT_NTC2
Countinue current: 25A
C 8693_GT_ISENN1 GT_ISENN1_SRC1 C
Peak current:32A
PR9115
649_1%_2 PC9113 OCP minimum:41.6A
*0.1u/6.3V_2
LL= 2.7mV/A
VBOOT=0V

+VIN_VCCSA +VIN
PR9116
Put the same side with MOS *Short_0805

+3V
PC9118 PC9119 PC9114 PC9115 PC9120

1u/25V_4
PU9101 10u/25V_6 10u/25V_6 PC9116

2200p/50V_4
0.1u/50V_4

0.1u/50V_4
12 1
PC9117 VCC VIN#1 6 PC9121
1u/6.3V_4 VIN#2 1u/25V_4
11 13 SA_BST
AGND BST
DCR=5.5 mOhm (Max)
CML-H82 (35W)
[88] VCCSA_PWM6 PR9117 *Short_0201 86903C_VCCSA_PWM 7 PL9101 +VCCSA VCCSA Volt
B PW M 2 86903C_VCCSA_SW 0.68uH_7x7x3 B

[88,89,90,91] VR_TEMP PR9118 *Short_0201 86903C_VCCSA_VTEMP 9 SW #1 3 1 2 Countinue current: 10A

VTEMP/FLT SW #2
[88,89,90,91] VR_STB PR9119 *Short_0201 86903C_VCCSA_SYNC 8 Peak current:11.1A
SYNC 4 PR9120 PC9122 PC9123 PC9124 PC9125
PGND#1 5 *2.2_5%_6 OCP minimum:16A

22u/6.3V_6

22u/6.3V_6

*22u/6.3V_6

*22u/6.3V_6
PR9121 *Short_0201 86903C_VCCSA_CS 10 PGND#2
[88] VCCSA_CS1 CS LL= 11.4mV/A
MP86901-AGQT-Z SN_SA1 VBOOT=1.05V
PC9126
12A(con) 25A(OCP) *2200p/50V_4

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
91 -- +VCC_GT/+VCC_SA
NB5 Date: Wednesday, April 08, 2020 Sheet 91 of 106
5 4 3 2 1
 5 4 3 2 1

92
+VIN [28,41,49,50,51,52,82,86,87,89,91,93,97,101]
+3VS5 [10,12,14,23,31,35,38,42,47,48,51,82,86,88,93,95,104,105]
+5VS5 [10,34,46,51,86,87,93,95,98,101,105]
+1.05V_DEEP_SUS [10,14,52,93]
PR9200
+1.8V_DEEP_SUS [9,10,12,13,14,19,22,34,35,42,51,52,95,105]
95.3K_1%_2
+1.8V [22,30,39,52,95]
+1.05V [2,6,10] (V1.00A+V1.00_MODPHY+VccPRIM_CORE)

6 TON1V
+1.0VS5 Volt +/- 5%
PV modify to shortpad
PU9200 +VIN_0.95V +VIN
+5VS5 Continue:8A

TON
7 PR9201 *Short_0805
IN#1 22 Peak:10.32A
D PR9202 5.1_1%_6 2260VCC105 21 IN#2 D
VCC PC9200 PC9201 PC9202 PC9203 PC9204 OCP minimum:12A
+1.05V_DEEP_SUS

2200p/50V_4
0.1u/25V_4
0.1u/25V_4

2.2u/25V_4

2.2u/25V_4
PC9205
4.7u/6.3V_4

PC9206 +1.05V_DEEP_SUS_R PR9203

20 1237BSTPCH BST01V DCR=15 mOhm (Max) *Short_0805
Vo Rton
BST PR9204 0_5%_6 PL9200
0.1u/25V_4 1.5uH_7x7x3
10 1237LX 1 2 0.95V 82k
HWPG
PR9205 1237PGPCH 1 LX#1
[2,10,42,86,87,93] HWPG PGOOD 16
*Short_0201
LX#2 17
7x7x3mm 1V 84.5k
LX#3 18 PR9207 PC9207 PC9208 PC9209 PC9210
PR9206 1237PFMPCH 3 LX#4 *2.2_5%_6 PR9208
1.05V 95.3k

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6
*Short_0201 PFM *Short_0201 PC9211
12

0.1u/6.3V_2
SN1V
PR9209 1237ENPCH 2 PGND#1 13
[42,92] SLP_SUS_ON
*Short_0201 EN PGND#2 14 1.35V 113k
PGND#3 15
PC9212 PGND#4 19 PC9213
*0.1u/6.3V_2 PGND#5 4 *2200p/50V_4 1.5V 127k
AGND

1237SSPCH 23 5 1237FBPCH R1 1237FBPCH_S

SS FB PR9210 3.16K_1%_2
C C
PC9214 PR9211 Vout1=(1+R1/R2)*0.8
0.1u/25V_4 AOZ2261AQI-18 10K_1%_2

1.8VS5 +/- 3%
TDC:3A
EDP:4A
+1.8V_DEEP_SUS

+5VS5 PC9215 PV modify to shortpad

PR9212
+1.05V_DEEP_SUS SN_P18
PR9213
*2200p/50V_4 *2.2_5%_6 +1.8V_DEEP_SUS_R *Short_0603
For C10 PC9216
HWPG 554PG_1.8V
4 PL9201
0.1u/6.3V_2 PR9214
PC9217 PC9230 *Short_0201 PGOOD 1 554LX_1.8V 1 2
0.1u/6.3V_2 LX#1 1uH_2.5x2.0x1.2 554FB_1.8V_S PR9216
22u/6.3V_6
5

PR9217 PR9215 *Short_0603 554PVIN_1.8V 9 2 *Short_0201

42,87,93,95] MAINON +3VS5 PVIN#1 LX#2
MAINON 1 866_1%_2 PC9218 PC9220
4 2 10 3

22u/6.3V_6
*22p/50V_4 PR9218 PC9219 PC9221
2 PVIN#2 PU9201 LX#3 20K_1%_2
R1

0.1u/6.3V_2

*10u/6.3V_4
PQ9200 RT8068AZQW 7 554NC_1.8V PC9222
PU9202 DMG3414U-7 NC *68p/50V_4
TDC:0.26A
3

M74VHC1GT08DFT2G PR9219 554SVIN_1.8V 8 6 554FB_1.8V

B PC9223 10_5%_6 SVIN FB B
0.1u/16V_4 +1.05V_S2 PR9222 +1.05V 11 5 554EN_1.8V PR9220
*Short_0603 GND EN *Short_0201 R2
PC9224 PC9225 PC9226
V0=0.6*(R1+R2)/R2

0.01u/50V_4

10u/6.3V_4

1u/6.3V_4
PR9221 *0_5%_2 PC9227 PR9223
10K_1%_2

*0.1u/6.3V_2
PC9228 PC9229
0.1u/6.3V_2 *10u/6.3V_4

SLP_SUS_ON [42,92]
+5VS5 +1.05V

PR9224 PR9225
1M_1%_2 22_5%_8
3

PQ9201A
5 2N7002KDW
6

PR9226
4

2 2M_1%_2

PQ9201B
2N7002KDW
1

A A
PV change

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
92 -- +1V_DEEP_SUS/1.8V(AOZ2261)
NB5 Date: Wednesday, April 08, 2020 Sheet 92 of 106
5 4 3 2 1
 5 4 3 2 1

C10: turn off VCCPLL_OC , VCCIO , VCCSTG

93
+5VS5

+1.2VSUS +1.05V_DEEP_SUS

PC9300
D 0.1u/6.3V_2 PC9324 D
For C10
PC9301

22u/6.3V_6
PU9300 0.1u/6.3V_2 PC9302 PC9325
For C10

3
74AHCT1G08SE-7 PR9301 PR9302 0.1u/6.3V_2

22u/6.3V_6
PR9300 *Short_0201 17SZ_EN1 1 866_1%_2 866_1%_2
[13,93] PWR_GATE# 4 VCCPLL_OC_EN_2 VCCPLL_OC_EN_1 2 VCCPLL_OC_EN_2 VCCSTG_EN22
17SZ_EN2 2 PQ9301
[28,31,34,35,42,87,92,93,95] MAINON <= 240us, full load ready
PR9303 249_1%_2 PQ9300 DMG3414U-7
DMG3414U-7 PC9304
TDC:0.26A

1
PC9303 0.1u/16V_4 +VCCSTG
PC9305 0.1u/16V_4 +1.2V_VCCPLL_OC_S2
0.1u/16V_4 PL9300 +1.2V_VCCPLL_OC
*Short_0603
+5VS5 +1.2V_VCCPLL_OC
PR9304 *0_5%_2 PC9306 PC9307
0.1u/6.3V_2 *10u/6.3V_4
PC9308 PC9309
0.1u/6.3V_2 *10u/6.3V_4 PR9326 PR9327
1M_1%_2 22_5%_8
+5VS5 +VCCSTG

3
PQ9302A PR9329 PR9330
5 2N7002KDW 1M_1%_2 22_5%_8

6
PR9328

3
2 2M_1%_2
PQ9303A
C
PV modify to shortpad PQ9302B 5 2N7002KDW C
PR9305 +VIN_VCCIO +VIN 2N7002KDW

6
*Short_0201 PV change
692_3V3 10 1 PR9306 *Short_0805 PR9331
+3VS5

4
3V3 VIN 2 2M_1%_2
PC9310 PC9311
PR9307 1u/6.3V_4 PC9312 PC9313 PC9314 PC9315 PQ9303B

0.1u/25V_4

10u/25V_6

10u/25V_6

2200p/50V_4

0.1u/25V_4
*Short_0402 2N7002KDW

1
OPC_AGND 11 2 PV change
PR9308 AGND PGND +VCCIO
*Short_0201
[28,31,34,35,42,87,92,93,95] MAINON
PR9310 PC9316
+3V_DEEP_SUS PU9301 1_5%_6 0.22u/25V_6 DCR=10mOhm (Max) PR9309
9 OPC_BST BST_VCIO PL9301 +VCCIO_R *Short_0805
BST 1uH_7x7x3
PC9317
OPC_EN OPC_SW
PV modify to shortpad
5 8 1 2
PR9311 EN SW
PR9312 *10K_1%_2 *0.1u/6.3V_2 NB692GD-Z
CML-H82
*Short_0201 PR9313
692_LP# 6 *2.2_5%_6
Vcc_IO: 6.4A/0.95V
[13,93] PWR_GATE# LP# PC9318
PR9314 VID1_VCCIO 3 SN_VCCIO PR9315 PC9319 PC9320 PC9321 PC9322 CFL=0.95V/LPM=0V

0.1u/6.3V_2
*100K_1%_2 C1 *Short_0201

22u/6.3V_6

22u/6.3V_6
+VCC_IO +/-5%

*22u/6.3V_6

*22u/6.3V_6
PR9316 VID0_VCCIO 4 VCCIO mode
100K_1%_2 C0 PC9323
PR9317 *2200p/50V_4 Peak current: 6.4A
*Short_0201
B 7 692_MODE B
MODE

PR9319
100_1%_2
PR9318 *Short_0201 OPC_PG 13 12 OPC_VOUT VCCIO_FB
[2,10,42,86,87,92] HWPG PG VOUT

OPC_VOUT PR9320
VCCIO_VCCSENSE [6]
0_5%_2

OPC_AGND PR9321
VID0_VCCIO VID1_VCCIO LP# VCCIO 0_5%_2
VCCIO_VSSSENSE [6]

X X 0 0V
PR9322
0 0 1 0.85V 100_1%_2
1 0 1 0.875V
0 1( IC internal PU High) 1 0.95V Default setting

A A
+3V_DEEP_SUS [9,10,12,13,14,16,18]
+VCCSTG [2,6,42]
+3VS5 [10,12,14,23,31,35,38,42,47,48,51,82,86,88,92,95,104,105]
+5VS5 [10,34,46,51,86,87,92,95,98,101,105]
+VCCIO [3,6,52]
+1.05V_DEEP_SUS [10,14,52,92]
+1.2V_VCCPLL_OC
+1.2VSUS
[6]
[2,6,10,17,18,51,87,95] PROJECT : G3BE
+VIN [28,41,49,50,51,52,82,86,87,89,91,92,97,101]
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
93 -- +1.0V/+VCCSTPLL/+VCCIO
NB5 Date: Wednesday, April 08, 2020 Sheet 93 of 106
5 4 3 2 1
 5 4 3 2 1

94
D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
94 -- Charge II
NB5 Date: Wednesday, April 08, 2020 Sheet 94 of 106
5 4 3 2 1
 5 4 3 2 1

+3V
+5VS5
+3VS5
[9,10,11,13,16,17,18,21,28,30,31,33,34,36,38,39,41,42,48,50,51,52,82,88,91,98,99,101,105]
[10,34,46,51,86,87,92,93,98,101,105]
[10,12,14,23,31,35,38,42,47,48,51,82,86,88,92,93,104,105]
95
+3VSUS [38,48,52]
+5V [28,30,31,38,39,48,49,50,51,52,89,90,91,104]
+3VLANVCC [33,50]
+5VPCU [39,82,86,105]

D D

+3VS5 +3VS5 +5VS5 +3VS5

PV modify to shortpad PV modify to shortpad PV modify to shortpad PV modify to shortpad

PC9500 PC9501 PC9502 PC9503
0.1u/6.3V_2 0.1u/6.3V_2 0.04A 0.1u/6.3V_2 0.1u/6.3V_2 1A
5.2A 5.1A

7
+3V PR9500 +3V_R +3VSUS_R PR9501 +3VSUS +5V PR9502 +5V_R +3VLANVCC_R PR9503 +3VLANVCC

VIN1#1

VIN1#2

VIN1#1

VIN1#2
VIN2#1

VIN2#1
VIN2#2

VIN2#2
*Short_0603 *Short_0603 *Short_0603 *Short_0603
13 8 13 8
14 VOUT1#1 VOUT2#1 9 14 VOUT1#1 VOUT2#1 9
VOUT1#2 VOUT2#2 VOUT1#2 VOUT2#2
PC9504 PC9505 PC9506 PC9507 PC9508 PC9509 PC9510 PC9511
*10u/6.3V_4 0.1u/6.3V_2 11 0.1u/6.3V_2 *10u/6.3V_4 *10u/6.3V_4 0.1u/6.3V_2 11 0.1u/6.3V_2 *10u/6.3V_4
GND#1 GND#1
15 15
4 PU9500 GND#2 4 PU9501 GND#2
C
+5VPCU BIAS +5VPCU BIAS C
PC9512 TPS22976DPUR PC9513 TPS22976DPUR

0.1u/6.3V_2 0.1u/6.3V_2
PR9504 3VEN_1 3 5 3VSUS_EN_2 PR9505 MAINON PR9506 5VEN_1 3 5 3VLAN_EN_2 PR9507
31,34,35,42,87,92,93,95] MAINON EN1 EN2 EN1 EN2 LAN_POWER [48]
SS1

SS2

SS1

SS2
SUSON [42,87]
*Short_0201 *Short_0201 *Short_0201 *Short_0201
PC9514 PC9515 PC9516 PC9517
12

10

12

10
*0.1u/6.3V_2 *0.1u/6.3V_2 *0.1u/6.3V_2 *0.1u/6.3V_2

PC9518 PC9519 PC9520 PC9521

1000p/25V_2

1000p/25V_2

1000p/25V_2

1000p/25V_2
+1.2VSUS +1.8V_DEEP_SUS

PC9530 PC9522 0.5A

0.446A 0.1u/6.3V_2 0.1u/6.3V_2

7
B B
+1.2V PR9510 +1.2V_R +1.8V_R PR9508 +1.8V

VIN1#1

VIN1#2

VIN2#1
VIN2#2
*Short_0603 *Short_0603
13 8
14 VOUT1#1 VOUT2#1 9
VOUT1#2 VOUT2#2
PC9532 PC9531 PC9523 PC9524
*10u/6.3V_4 0.1u/6.3V_2 11 0.1u/6.3V_2 *10u/6.3V_4
+5VPCU GND#1
15
4 PU9502 GND#2
BIAS
TPS22976DPUR

PC9525 PR9509
0.1u/6.3V_2 *Short_0201
3 5 1.8V_EN_2
EN1 EN2 MAINON [28,31,34,35,42,87,92,93,95]
SS1

SS2

PC9526
12

10

*0.1u/6.3V_2
PR9511
*Short_0201 PC9528 PC9527
MAINON 1000p/25V_2 1000p/25V_2

PC9529
*0.1u/6.3V_2

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
95 -- Load switch IC(APL3523A)
NB5 Date: Wednesday, April 08, 2020 Sheet 95 of 106
5 4 3 2 1
 5 4 3 2 1

96
D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
96 -- Charge II
NB5 Date: Wednesday, April 08, 2020 Sheet 96 of 106
5 4 3 2 1
 5 4 3 2 1

Reserve for ISEN

+PRWSRC +VIN
97
EC9700 EC9701 EC9702 EC9703
*22u/25V_8 *22u/25V_8 *22u/25V_8 *22u/25V_8
D D

+PRWSRC

EC9704 EC9705
*22u/25V_8 *22u/25V_8

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
97 -- ISN and EMI
NB5 Date: Wednesday, April 08, 2020 Sheet 97 of 106
5 4 3 2 1
 5 4 3 2 1

PR9802 PQ9802A
PR9821
*0_5%_2

PQ9802B
98
10K_1%_2 2N7002KDW 2N7002KDW
3 4 1 6 MBCLK1_GPU
+3V [42,82,106] MBCLK
PR9819
PR9803 *Short_0201 1M_5%_2
[21] MBDATA1_GPU

2
D
[21,42] GPU_FW_EC D

2
PR9805 *Short_0201
[21] MBCLK1_GPU
PR9807 10K_1%_2 3 4 1 6 MBDATA1_GPU
+3V [42,82,106] MBDATA
PQ9803A PQ9803B
[22] NVVDD_PGOOD 2N7002KDW 2N7002KDW

PR9822
*0_5%_2
PR9813 *Short_0201
[21] NVVDD_PWM_GPU

PR9814 PR9828
*0_5%_2 3M_1%_4

MP2988_PWMVID
MP2988_VINSEN
VINSEN_NVVDD [99]

MP2988_SDA
MP2988_SCL
1V8_AON
PC9805 Local sense
1000p/50V_4 PR9829 Ra,Rb,Rc,Rd close to GPU or Load Point
200K_1%_2 PR9808
100_1%_2
Ra
PR9806
*10K_1%_2 20191206 update

12
6

4
PR9809
Rc

SCL

SDA
PWM-VID/ADDR

PGOOD

VINSEN
*0_5%_2
MP2988_PSI 3 9 MP2988_VORTN PR9810 0_5%_2
[21] NVVDD_PSI PSI FBRTN VSS_GPU_SENSE [23]
PC10527
C MP2988_VDD12 7 10 MP2988_VOSEN PR9812 0_5%_2 C
PR9811 VDD12 FB VGPU_CORE_SENSE [23]
*12K_1%_2 PU9800 NVVDD
Rd
2.2u/10V_4 11 20 MP2988_PWM1 PR9827 GPU_PWM1 [99]
PD9800 21 GND1 PW M1 *Short_0201

[22] NVVDD_CORE1_EN
*RB500V-40
1 2 MP2988_EN 2
GND2
MP2988GQ 19 MP2988_PWM2 PR9826 GPU_PWM2 [99] PR9818 Rb
EN PW M2 *Short_0201 100_1%_2

PC9800 17 18 MP2988_PWM3 PR9825 GPU_PWM3 [99]

0.047u/25V_4 VCC33 PW M3 *Short_0201

ISEN3

ISEN2

ISEN1
TEMP
PR9801

CSN
20K_1%_2

PR9831

14

15

16

13
4.7_5%_4
MP2988_VCC33
+3V
PR9815
PC9806 *Short_0201
4.7u/6.3V_4 [99] GPU_TEMP

PC9802
PR9816 0.01u/16V_2 NVVDD
10K_1%_2

PR9830
[99] GPU_CS3 *22_5%_8 +5VS5
B PR9832 PR9833 PR9834 B

1K_1%_2

1K_1%_2

1K_1%_2
[99] GPU_CS2

[99] GPU_CS1 PR9835

*100K_1%_2
GPU_CS1

3
PQ9800
GPU_CS2 2
*2N7002K
GPU_CS3

3
PR9836 2 MP2988_EN

1
*1M_5%_2
PQ9801
*PJA138K

1
GPU Design P/N Vender P/N EDPpeak
3 Phase for N18P -G0 MAX P (50W/47A) MP2988GQ-0060 109A Default setting
4 Phase for N17P-G1 (50W/59A) AL002884003 MP2884AGU-0103-Z 106A
5 Phase for N18E -G0 MAXQ (60W/63A) AL002886005 MP2886AGU-0125-Z 225A
6 Phase for N18E -G3 (80W/84A) AL002886000 MP2886AGU-0112-Z 300A

A A

+VIN_VGACORE
+5VS5
[99]
[10,34,46,51,86,87,92,93,95,101,105]
PROJECT : Drax (N17-EX)
1V8_AON [19,21,22,23,24,25,101,105]
NVVDD [22,23,99] Quanta Computer Inc.
+3VPCU [10,32,34,35,42,43,46,48,51,82,86,88,104,106]
Size Document Number Rev
Custom 1A
NB5 +VGACORE (MP2884AGU)
Date: Wednesday, April 08, 2020 Sheet98 of 106
5 4 3 2 1
 5 4 3 2 1

+VIN_GPU_TOTAL
+5VS5
NVVDD [22,23,98]
+VIN_VGACORE
[101]
[10,34,46,51,86,87,92,93,95,98,101,105]
PR9900
*Short_0201
Put the same side with Dr.MOS and near pin1
+VIN_VGACORE
PR9901
0.005_1%_12

1 2
+VIN_GPU_TOTAL
99
[98] VINSEN_NVVDD

+ + +
+3V PC9900 PC9901 PC9902 PC9903 PC9904 PC9935 PC9934 PC9908

10u/25V_6

10u/25V_6

10u/25V_6

2200p/50V_4
*15u/25V_3528H1.9 *15u/25V_7343H1.9 *15u/25V_7343H1.2

1u/25V_4
PU9900
D MP86948GQVT-Z PR9902 PR9903 D
*Short_0201 *Short_0201
MOS Temperature PC9906 20 1
2.2u/10V_4 VCC VIN#1 14
VIN#2 PC9909
19 21 GPU_BST1
AGND BST
1u/25V_4
15 2 GPU_SW1 PL9902 NVVDD NVVDD_SENSE_V [104]
[98] GPU_PWM1 PW M SW #1 3 0.15uH_7x7x3
17 SW #2 4 1 2 NVVDD_SENSE_I [104]
[98,99] GPU_TEMP VTEMP/FLT SW #3
16 13
+3V SYNC PGND#3 12 + +
PGND#2 5 PR9904 PC9910 PC9911
18 PGND#1 *2.2_5%_6 330u/2V_7343H1.9 330u/2V_7343H1.9
[98] GPU_CS1 CS
SN_GPU1

PC9912
*2200p/25V_2
N18P G0 MP
GPU CORE Volt Default setting
Cuntinue current:47A GPU Design R-sense Bead 1 Bead 2 SPCAP
Peak current: 109A/6uSec. N18P-G0 Stuff Unstuff Unstuff 3pcs
OCP Minimum: 130A. N17P-G0 K1 / N17P-G0 40W Unstuff Stuff Stuff 2pcs
Put the same side with Dr.MOS and near pin1
C LL= +VIN_VGACORE C

VBOOT=0.8V +3V
Eff > 86% PU9901
DC < +/- 20mV MP86948GQVT-Z +
PC9915 PC9916 PC9917 PC9918 PC9919 PC9913
Setting time <100uS 20 1

10u/25V_6

10u/25V_6

10u/25V_6

2200p/50V_4
PC9914 *15u/25V_3528H1.9

1u/25V_4
2.2u/10V_4 VCC VIN#1 14
VIN#2 PC9920
19 21 GPU_BST2
AGND BST
1u/25V_4
15 2 GPU_SW2 PL9903 NVVDD
[98] GPU_PWM2 PW M SW #1 3 0.15uH_7x7x3
17 SW #2 4 1 2
[98,99] GPU_TEMP VTEMP/FLT SW #3
16 13
+3V SYNC PGND#3 12 + PC9922 Default setting
PGND#2 5 PR9905
PGND#1 330u/2V_7343H1.9
18 *2.2_5%_6
[98] GPU_CS2 CS N18P G0/G0 MaxQ/50W
PC9923
SN_GPU2
GPU CORE Volt
*2200p/25V_2 Cuntinue current:47A
Peak current: 109A/6uSec.
OCP Minimum: 133A.
B
LL= B
VBOOT=0.8V
Put the same side with Dr.MOS and near pin1
Eff > 86%
+VIN_VGACORE
DC < +/- 20mV
Setting time <100uS
+3V

PU9902 + PC9929 N17P-G0 (40W) --support 3 phase

MP86948GQVT-Z PC9924 PC9925 PC9926 PC9927 PC9928 N17P-G0 K1(40W)--support 3phase

*15u/25V_3528H1.9
10u/25V_6

10u/25V_6

10u/25V_6

2200p/50V_4
1u/25V_4
PC9930 20
VCC VIN#1
1 Cuntinue current:50A/39A
2.2u/10V_4 14
VIN#2 PC9931 Peak current: 100A/111A
GPU_BST3
19
AGND BST
21 OCP Minimum: 130A/140A
1u/25V_4
GPU_SW3 NVVDD
LL=
15 2 PL9904
[98] GPU_PWM3 PW M SW #1
SW #2
3 VBOOT=0.8V
17 4 1 2
[98,99] GPU_TEMP VTEMP/FLT SW #3 Eff > 86%
+3V
16
SYNC PGND#3
13
12
0.15uH_7x7x3
+
DC < +/- 20mV
PGND#2
PGND#1
5 PR9906 PC9921 Setting time <100uS
18 *2.2_5%_6 *220u/2V_7343H1.0
[98] GPU_CS3 CS
SN_GPU3

A PC9933 A
*2200p/25V_2

PROJECT : Drax (N17-EX)

Quanta Computer Inc.
Size Document Number Rev
Custom 1A
NB5 +VCORE (NCP81151)
Date: Wednesday, April 08, 2020 Sheet99 of 106

5 4 3 2 1
 5 4 3 2 1

A1
D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
A0 -- reserve page
NB5 Date: Wednesday, April 08, 2020 Sheet 100 of 106
5 4 3 2 1
 5 4 3 2 1

+5VS5
NVVDD
[10,34,46,51,86,87,92,93,95,98,105]

FBVDDQ_MEM
+VIN
[22,23,98,99]
+VIN_GPU_TOTAL
1V8_AON
[99]
[19,21,22,23,24,25,98,105]
[20,22,23,24,25]
[28,41,49,50,51,52,82,86,87,89,91,92,93,97]
PU10100
+VIN_FBVDDQ_MEM +VIN_GPU_TOTAL

1
PR10102
0.005_1%_12

2
+VIN
100
UP1666QQKF

PC10103 PC10104 PC10105 PC10106 PC10107

2200p/50V_4
0.1u/25V_4
PR10103 PR10104 0.1u/25V_4

2.2u/25V_4

2.2u/25V_4
1_5%_6 1_5%_6
8816APVCC 18 2 8816AUGATE1 8816AUGATE1_1
+5VS5 PVCC UGATE1

3
4
9
D PR10105 PR10106 D
D1 *Short_0201 *Short_0201
PR10100 PC10100
10K_1%_2 2.2u/10V_4 PQ10100
AOE6932 FVDDQ_SENSE_V [104]
+3V FVDDQ_SENSE_I [104]
PC10108 1 G1
PR10107 0.22u/25V_6 PL10100 FBVDDQ_MEM
*Short_0201 1 8816ABOOT1 D2/S1 5 0.47uH_7x7x3
8816APG 13 BOOT1 2 S1/D2 6 8816APHASE1 1 2
[22,31] PS_FBVDD_PGOOD PGOOD 7
2019/1/04 updated 20 8816APHASE1
PHASE1 PR10108
*2.2_5%_6 + PC10101 + PC10102 PC10109 PC10110 PC10111
PR10101

330u/2V_7343H1.9

330u/2V_7343H1.9

22u/6.3V_6

*22u/6.3V_6

*22u/6.3V_6
*0_4/S 8 G2
[22] FBVDD_EN 8816AEN 3
EN 19 8816ALGATE1 S2
LGATE1 PC10113

10
PC10112 *2200p/50V_4
PR10109 *0.047u/16V_4
*20K_1%_2
[21] FBVDD_PSI
Rdson=1.8 mohm
PR10110
*12K_1%_2
8816APSI 4
1V8_AON PSI

Ra
1 Phase Ra Stuff PR10111 PC10118 14
C 10K_1%_2 *0.1u/6.3V_2 UGATE2 C
2 Phase Ra Unstuff
PR10133
*0_5%_2 N18P-G62 50W +GDDR6 N18P-G61(50W) +GDDR6
5
VID
15
EDP-C: 17.2A EDP-C: 16.7A
BOOT2
8816AVREF EDP-P: 18.4A EDP-P: 17.9A
16
8816AVREF 8 PHASE2 OCP minimum: 25A OCP minimum: 25A
VREF

PR10134
PC10122 *10K_1%_2
PR10114 0.1u/6.3V_2 17 8816ALGATE2 GPU Design R-sense VIN bead SPCAP
10K_1%_2 LGATE2
N18P-G61/62 Stuff Unstuff 2pcs
6
REFADJ PR10136
R1 0_5%_2
PR10116 PC10131
+5VS5
R2 16.9K_1%_2 *56p/50V_4
FBVDDQ_MEM R1 R2 GPU Type
PR10117 PR10135
133K_1%_2 Vref=2V *0_5%_2
10 8816AFBRTN
1.55V-1.35V 34.8K 53.6K
PR10119 8816AREFIN 7 FBRTN FB_GND_SENSE [23]
100K_1%_2 REFIN
B PC10132 PR10120
1.5V_1.35V 30.9K 69.8K N18P_ N17P_GDDR5 B
3

PC10126 *100p/50V_4 *0_5%_2

2 100p/50V_4 11 8816AVSNS
PQ10103 FB FBVDDQ_SENSE [23] 1.25V_1.35V 21K 80.6K N18E_GDDR6
PR10121 METR3904-G PQ10102 FBVDDQ_MEM
3

75K_1%_2 PR10122 2N7002K

1.2V_1.25V 16.9K 133K N18P_GDDR6 Default setting
1

2 1M_5%_2 PC10127 PR10123

[21] MEM_VDD_CTRL 12 8816ASS *56p/50V_4 100_1%_2
COMP
Fix 1.35V 21K Open
1

PR10124 PC10128 PC10129

*100K_1%_2 Re *0.047u/16V_4
PR10125
1000p/50V_4 Fix 1.5V 30.1K Open
46.4K_1%_2
8816AVREF 8816ATON 9 PR10126 FBVDDQ_MEM
FS/OC 100K_1%_2
MEM_VDD_CTRL FBVDDQ_MEM
+5VS5
Rf PC10130
PR10127 *0.1u/25V_4 PR10128
1 1.2V
86.6K_1%_2 22_5%_8
21 PR10129
GND 100K_1%_2
0 1.25V
8816AEN_3B
3

Fsw: 300KHz 8816AEN_3A

PQ10104 2
2N7002K

PR10130 PR10131
1

3
1M_5%_2 30K_1%_2
A 2 8816AEN_1 8816AEN A

PQ10105 PR10132
Ra Re Rf OCP 1 PJA138K *100K_1%_2
N18P G61/62 1-Phase Stuff 46.4K 86.6K 25A Default setting
PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
A1 -- FBVDDQ_MEM(UP1666)
NB5 Date: Wednesday, April 08, 2020 Sheet 101 of 106
5 4 3 2 1
 5 4 3 2 1

A2
D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
A2 -- reserve page
NB5 Date: Wednesday, April 08, 2020 Sheet 102 of 106
5 4 3 2 1
 5 4 3 2 1

A3
D D

C C

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
A3 -- reserve page
NB5 Date: Wednesday, April 08, 2020 Sheet 103 of 106
5 4 3 2 1
 1 2 3 4 5 6 7 8

+3V [9,10,11,13,16,17,18,21,28,30,31,33,34,36,38,39,41,42,48,50,51,52,82,88,91,95,98,99,101,105]

104
A A

5650_BSIN4 PR10400
*Short_0201 PC10400
5650_BSIN3 PR10401 2.2u/10V_4
*Short_0201
GND_FET PR10402 487_1%_4
27 5650_VCC PR10408
VCC +3VS5
PC10401 1000p/50V_4 *Short_0402
PR10404
FVDDQ_SENSE_V PR10403 75K_1%_2 5650_BSIN1 3 2 5650_SHP1 100_1%_2
BS_IN1 SH_P1 FVDDQ_SENSE_V [101] CH1 FVDDQ VOLTAGE
GND_FET PR10405 487_1%_4 1 5650_SHN1 PR10406
SH_N1 *Short_0402 FVDDQ_SENSE_I [101] CH1 FVDDQ CURRENT
PC10402 1000p/50V_4
PR10409
NVVDD_SENSE_V PR10407 75K_1%_2 5650_BSIN2 6 5 5650_SHP2 100_1%_2 CH2 NVVDD VOLTAGE
BS_IN2 SH_P2 NVVDD_SENSE_V [99]
PU10400 4 5650_SHN2 PR10410 CH2 NVVDD CURRENT
US5650PQKI SH_N2 *Short_0402 NVVDD_SENSE_I [99]

5650_BSIN3 11 12 5650_SH_P3 PR10411

BS_IN3 SH_P3 *Short_0201 CH3 TBD
13 5650_SHN3 PR10412
UPI OVR Setting R1 R2 SH_N3 *Short_0201 CH3 TBD
R1 5650_BSIN4 14
N18E G3 (150W+) 127 127 BS_IN4 15 5650_SHP4 PR10413
B SH_P4 *Short_0201 CH4 TBD B
PC10403 0.015u/25V_4 16 5650_SHN4 PR10414
N18E G2 (115W to 130W ) 143 143 SH_N4 *Short_0201 CH4 TBD
PR10415 357_1%_4 5650_SH01 32
SH_O1 PC10404
100W to 110W 165 165 PC10405 0.015u/25V_4 *47p/50V_4
+3VS5
PR10416 357_1%_4 5650_SH02 7 20 5650_DIFFP PR10417
N18E-G0,N18E-G1 (75W to 90W) 215 215 SH_O2 DIFF_P *Short_0201
GPU_ADC_INP [21]
N18E-G2 MaxQ,N18E-G3 MaXQ 19 5650_DIFFN PR10418
DIFF_N GPU_ADC_INN [21]
*Short_0201 PR10419
N18P G0 N18P G0 MaxQ G61 G62 R2 10 PC10406
N18E G0 MaxQ ( 70W or Lower ) 357 357 SH_O3 *47p/50V_4
10K_1%_2

30 5650_BSOK PR10420
17 BS_OK *Short_0201
SH_O4

PC10407
1000p/25V_2
PR10421 5650_MUX 29 PR10423
[21] ADC_MUX_SEL MUX_SEL
*Short_0201 681K_1%_4
5650_CMREF_IN
PR10422 365K_1%_2
PR10424 *10K_1%_2 5650_EN 28
+3VPCU EN 5650_REFOUT 5650_BSREF_1
23
PR10425 10K_1%_2 BG_REF_OUT
PR10426
PC10408 *100p/50V_4 5650_SKIP 25 324K_1%_2 PR10427 PC10409
SKIP 1000p/25V_2 PR10429
10K_1%_2
C 24 5650_BSREF PR10428 4.99K_1%_2 C
BS_REF 90.9K_1%_2
PR10430

GND_FET
1K_1%_2 26
MODE 22 5650_CMREF_IN
NC#1

NC#2

NC#3

NC#4

GND
CM_REF_IN

3
2
8

18

21

31

33

9
PC10410
1000p/25V_2 PQ10400

1
+5V METR3904-G
GND_FET

D D

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
A4 -- +3V/+1.05V_GFX(AOZ1331DI)
NB5 Date: Wednesday, April 08, 2020 Sheet 104 of 106
1 2 3 4 5 6 7 8
 1 2 3 4 5 6 7 8

105
+3VS5 [10,12,14,23,31,35,38,42,47,48,51,82,86,88,92,93,95,104]
1V8_MAIN [19,20,21,22,30]
1V8_AON [19,21,22,23,24,25,98,101] 1V8_AON +1.8V_DEEP_SUS +1.8V_DEEP_SUS
PEX_VDD [19,21]
+3V [9,10,11,13,16,17,18,21,28,30,31,33,34,36,38,39,41,42,48,50,51,52,82,88,91,95,98,99,101]

PR10501 PR10502
PR10500
Reserved 1.8VS5 +/- 3% *0_5%_6
*Short_0603 *Short_0603

1V8_AON TDC:3A
EDP:4A
A PC10500 PC10501 A
1V8_AON 0.1u/6.3V_2 0.1u/6.3V_2

7
PR10504 PC10502 PR10505
*2200p/25V_2 *2.2_5%_6 2019/9/4 updated
*10K_1%_2
1.2A 1.2A

VIN1#1

VIN1#2

VIN2#1

VIN2#2
SN_P18GPU
PR10506
PL10500 1V8_AON_S1 *Short_0603 1V8_MAIN PR10508 1V8_MAIN_S2 1V8_AON_S2 PR10509 1V8_AON
1V8_AON_PG PR10507 68PG_1.8VGPU 4 *1uH_2.5x2.0x1.2 *Short_0603 13 *Short_0603
*Short_0201 PGOOD 1 68LX_1.8V_GPU1 2 14 VOUT1#1 8
LX#1 68FB_1.8VGPU_S
PR10511 VOUT1#2 OUT2#1 9
68PVIN_1.8VGPU 9 2 *Short_0201 +5VPCU PU10500 OUT2#2
+3VS5 PVIN#1 LX#2
R1 PC10509 PC10503 PC10504 TPS22976DPUR PC10505 PC10506
PR10510 10 3 PC10511 PC10508 PC10510 *10u/6.3V_6 4 11 *10u/6.3V_6

*22u/6.3V_6
PVIN#2 0.1u/6.3V_2 0.1u/6.3V_2
*Short_0603 PU10501 LX#3 *68p/50V_4 PC10507 PR10512 VBIAS GND#1

*10u/6.3V_4
*0.1u/6.3V_2
PR10513 *RT8068AZQW 7 68NC_1.8VGPU *22p/50V_4 *20K_1%_2 15
*10_5%_6 NC PC10512 GND#2 PR10514
68SVIN_1.8VGPU 8 6 68FB_1.8VGPU 0.1u/6.3V_2 10K_1%_2
SVIN FB 3 5
ON1 ON2 1V8_AON_EN [22,105]

CT1

CT2
11 5 68EN_1.8VGPU
GND EN R2
PC10513 PC10514 PC10515 PR10516
*0.01u/50V_4 *10u/6.3V_4 *1u/6.3V_4 PR10515 10K_1%_2 PC10516

12

10
PC10517 *10K_1%_2 [22,105] 1V8_MAIN_EN 0.1u/16V_4
*0.1u/6.3V_2
PC10518 PC10519
PC10520 220p/50V_4 220p/50V_4
PR10517 V0=0.6*(R1+R2)/R2 820p/50V_4
*Short_0201
1V8_AON_EN [22,105]

B B

+3VS5
For HW Throttling: Stuff condition: CPU45W & GPU>60W PEX_VDD 1V8_MAIN

+5VS5
PR10519 +5VS5
*10K_1%_2 PR10522
22_5%_8 PR10518
+3V PR10524 22_5%_8
DGPU_PROCHOT_EC# [21,42,82] 100K_1%_2 PR10520
DC_PROCHOT_OFF 100K_1%_2
[42] DC_PROCHOT_OFF
PR10521

3
*10K_1%_2
ACIN 2 2
[42,82] ACIN
H_PROCHOT# [2,42,82,88]
PQ10504 PR10525 PQ10500 PR10523

1
5

3
PQ10503A PQ10503B 2N7002K 1M_5%_2 2N7002K 1M_5%_2
*2N7002KDW *2N7002KDW 2 PEX_EN_1 2
1V8_MAIN_EN [22,105]
4 3 1 6 5 2

PQ10505 PQ10501

1
PQ10502A PQ10502B PJA138K PJA138K
4

1
*2N7002KDW
ACIN *2N7002KDW

C C

DC_PROCHOT_OFF HWPRHOT1

+1.0V_GFX Volt +/- 5%

EDP=3.31A
+3VS5
EDP_peak = TBD

1V8_AON PEX_VDD
PC10521
10u/6.3V_4

PR10526 PR10527
10K_1%_2 *Short_0603

4
PR10528 PU10502 PL10501 +1.0V_GFX_S2
*Short_0201 2.2uH_2.5x2.0x1.2

VIN
PEX_PG_3 5 3 PEX_LX 1 2
1V8_AON [22] PEX_VDD_PG PG LX
PR10529 RT8097ALGE
*Short_0201 +
1V8_MAIN PEX_EN_1 1 2 PC10522 PC10523 PC10524
[22] PEXVDD_EN EN GND PR10530 *220u/2V_7343H1.9

*10u/6.3V_4

*0.1u/6.3V_2
*Short_0201 PC10526

PEX_FB_1
NVVDD PEXVDD_EN=1.8V

FB
D D

22u/6.3V_6
PC10525
*2200p/50V_4 R1

6
PR10531
NVVDDS [22] PEX_EN_1
6.65K_1%_2
PEX_FB
PEX_VDD
PR10532 PROJECT : G3BE
FBVDDQ R2 10K_1%_2
Quanta Computer Inc.
VO=(0.6(R1+R2)/R2)
Size Document Number Rev
Custom 1A
A5 -- +3V/+1.05V_GFX(AOZ1331DI)
NB5 Date: Wednesday, April 08, 2020 Sheet 105 of 106
1 2 3 4 5 6 7 8
 5 4 3 2 1

+BAT_RTC
+3VPCU
[10,12,14,34,82]
[10,32,34,35,42,43,46,48,51,82,86,88,104]
106
D D

PD10600 PWR_SM_STRGE
RB500V-40

2 1
+3VPCU

C PR10600 C
STM_3 1 3
+BAT_RTC
100_1%_2 PQ10600
METR3906-G

2
PR10601
+3VPCU 100K_1%_2

STM_2
PR10602

10K_1%_2
PQ10601 STM_1 PR10603 PR10604
2N7002K PC10600 PR10606 4.7K_1%_2 4.7K_1%_2
2

PR10605

3
4.7u/6.3V_4 100K_1%_2
1 3 STM_4 STM_5 STM_6 2 PQ10602
[42] LID_EC# MBCLK [42,82,98]
METR3904-G
MBDATA [42,82,98]

1
1K_1%_2

1
PR10608

1M_5%_2
PR10607 PD10601 PC10601
*0_5%_4 RB500V-40 *0.1u/6.3V_2
GND

2
[34,48] LID#
GND GND GND

B B

A A

PROJECT : G3BE
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
A6 -- STORAGE MODE
NB5 Date: Wednesday, April 08, 2020 Sheet 106 of 106
5 4 3 2 1