A Beginner's Guide To SSD Firmware: Designing, Optimizing, and Maintaining SSD Firmware 1st Edition Gopi Kuppan Thirumalai

A Beginner's Guide to SSD Firmware:
Designing, Optimizing, and Maintaining

SSD Firmware 1st Edition Gopi Kuppan
Thirumalai
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A Beginner’s Guide
to SSD Firmware
Designing, Optimizing, and
Maintaining SSD Firmware
—
A Beginner’s Guide to
SSD Firmware
Designing, Optimizing,
and Maintaining SSD Firmware

A Beginner’s Guide to SSD Firmware: Designing, Optimizing, and
Maintaining SSD Firmware
San Jose, CA, USA
ISBN-13 (pbk): 978-1-4842-9887-9 ISBN-13 (electronic): 978-1-4842-9888-6

https://doi.org/10.1007/978-1-4842-9888-6
Copyright © 2023 by Gopi Kuppan Thirumalai

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part of the material is concerned, specifically the rights of translation, reprinting, reuse of
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To my mother, Vijaya T, and my father,
Thirumalai J
Table of Contents
About the Author��xiii
About the Technical Reviewer��xv
Chapter 1: Introduction to SSD Firmware��1

What Is SSD?��1
Summary��5
Chapter 2: Understanding the Role of Firmware in SSDs��7

What Is Firmware?��7
Summary��10
Chapter 3: The History and Evolution of SSD Firmware��11

History��11
Summary��13
Chapter 4: Basics of Flash Memory��15

Memory Types��15
NOR Flash Memory��16
NAND Flash Memory��17
Similarities��19
Differences��19
A Flash Memory Cell��19
NAND Memory Organization��23
Addressing��24
v
Table of Contents
Erase��25
Write��25
Read��27
Program/Erase Cycle (P/E Cycle)��28
Summary��30
Chapter 5: 3D Vertical NAND��31

Evolution of 3D Vertical NAND Technology��31
Unlocking New Possibilities with Vertical NAND Architecture��33
Advantages of 3D Vertical NAND��35
Applications of 3D Vertical NAND��36
Understanding 3D Vertical NAND Architecture��37
Layers and Pages��37
Charge Trapping Technology��38
Bit Line and Word Line Architecture��40
Control and Decoding Circuits��40
Memory Cell Size and Density in 3D Vertical NAND Flash Memory
Technology��40
Understanding NAND Cell Types Supported: SLC, MLC, and TLC (QLC)��41
SLC��41
MLC��42
TLC��43
Read and Write Operations in 3D Vertical NAND��43
Erasing MLC 3D vertical NAND block��47
Endurance and Data Retention Capabilities��49
Speed and Efficiency Compared to 2D Planar NAND��49
Advancements in Storage Capacity with 3D Vertical NAND��50
Summary��50
vi
Table of Contents
Chapter 6: Basic Understanding of NAND Flash Interface��51

Basic NAND IO Interfacing Pin Details��52
NAND Flash Interface Basics��54
Open NAND Flash Interface (ONFI)��55
Toggle Mode Interface��55
Command Cycles for NAND Flash Operations��56
Addressing��57
Column Address��58
Row Address��58
Addressing Functions��58
Address Cycle Order��58
Handling Unused Bits��59
NAND Flash Commands��62
RESET Operation��62
READ ID Operation��63
READ STATUS Operation��64
READ STATUS Response��64
ERASE Operation��66
PROGRAM Operations��68
READ Operation��70
RANDOM DATA READ Operation��72
Typical NAND Packet Structure��73
PAGE READ CACHE MODE Operation��74
PROGRAM PAGE CACHE Operation��75
Advanced Command Sets��78
Address Input Restrictions for Multi-Plane Operations��79
vii
Table of Contents
Multi-plane Read��81
MULTI- PLANE RANDOM CACHE READ Operation��82
Multi Plane Program Operation��85
Multi Plane Cache Program Operation��88
Multi Block Erase Operation��90
Summary��92
Chapter 7: Common SSD Firmware Features��93

Significance of Garbage Collection in SSDs��95
Types of Garbage Collection Strategies��95
Full Garbage Collection��95
Partial Garbage Collection��95
Dynamic Garbage Collection��96
Error-Triggered Garbage Collection��96
Garbage Collection Read Process��97
Retrieving Valid Data during Compaction��98
Handling Incomplete or Interrupted Reads��98
Address Translation during Compaction Reads��99
Writing Data during Compaction��100
Address Mapping and Updating��101
Managing Block Erasure and Wear-Leveling��101
Handling Unexpected Power-Off Conditions in Garbage Collection��102
Ensuring Data Consistency during Power Loss��102
Write Journaling and Recovery Mechanisms��103
Managing Incomplete Compaction Operations��104
Performance Considerations in Garbage Collection��104
Impact of Compaction on SSD Performance��105
Write Amplification and Its Effects��106
viii
Table of Contents
Strategies to Minimize Performance Degradation��107

Balancing Garbage Collection and Host Write Operations��108
Understanding the Workload Characteristics��108
Garbage Collection Prioritization��108
Dynamic Resource Allocation��109
Over-Provisioning��109
Adaptive Garbage Collection��110
Drawbacks of Garbage Collection and Minimizing Their Impact��110
Write Amplification��110
Performance Degradation��111
Increased Power Consumption��111
Impact on Endurance��111
Other Concerns��112
Data Retention��112
Read Disturb��113
Program Disturbance��115
Write Amplification��116
Over-provisioning��117
Encryption��118
Summary��118
Chapter 8: SSD Firmware Design Considerations��119

Design Considerations��119
Unexpected Shutdown��121
Power-Loss Protection��122
Power-Loss Design Considerations��123
Best Practices for Optimizing and Maintaining SSD Firmware��125
Summary��127
ix
Table of Contents
Chapter 9: Flash Translation Layer (FTL)��129

Mapping Table��130
Size of the Mapping Table��131
Storing the Mapping Table in RAM��132
Partial Loading of the Mapping Table��132
Storage of Non-Loaded Mapping Entries��132
Write/Update Operations and the Mapping Table��133
Dirty Cache Buffer in RAM��133
Mapping Table Management and Optimization��134
Bad Block Management��142
Factory Bad Block Assessment��142
Bad Block Flash Address��143
Recording Bad Block Flash Address��143
Initial Bad Block Handling Flow��143
Used Bad Block Assessment��146
Bad Block Skipping Strategy��149
Bad Block Replacement Strategy��149
Summary��150
Chapter 10: User Data Flow��151

Write Path��151
Read Path��152
Summary��153
Chapter 11: Throttling��155

Thermal Throttling��155
Temperature Monitoring��155
Throttling Mechanism��155
Temperature Recovery��156
x
Table of Contents
Design Consideration��156
Power Throttling��158
Power Monitoring��158
Throttling Mechanism��159
Power Recovery��159
Combined Throttling��159
Synergistic Operation��159
Priority Management��159
Dynamic Performance Adjustments��160
Workload Awareness��160
Logging and Reporting��160
Event Logging��160
Health Monitoring��160
Summary��161
Chapter 12: Exception Handling��163

Read Errors��163
Handling��164
Program Errors��165
Handling��165
Program Abort��166
Handling��166
Erase Errors��167
Handling��167
Summary��168
xi
Table of Contents
Chapter 13: Performance��169

Access Patterns and Test Workloads��170
Workloads��171
Host Interface��179
Summary��180
Chapter 14: Debugging��181

Summary��186
Chapter 15: Future Developments and Innovations in SSD

Firmware��187
Summary��189
Chapter 16: Closing��191
Bibliography��193
Index��195
xii
About the Author
Gopi Kuppan Thirumalai is a highly experienced embedded design
engineer with a proven track record of success in the industry. He has over
15 years of experience in a variety of domains, including wireless networks,
software, automotive, and storage. He is an expert in client and data-
center SSD design and implementation and has a history of leading and
mentoring teams to achieve their goals. He is also an outdoor enthusiast
and enjoys hiking, fitness, reading books, and cooking.
xiii
About the Technical Reviewer
Kenneth Fukizi is a software engineer, architect, and consultant with
experience internationally in coding on different platforms. Prior to
dedicated software development, he worked as a lecturer and was then
head of IT at different organizations. He has domain experience working
with technology for companies mainly in the financial sector. When he’s
not working, he likes reading up on emerging technologies and strives to
be an active member of the software community.
Kenneth currently leads a community of African developers through a
startup company called AfrikanCoder.
xv
CHAPTER 1
Introduction to
SSD Firmware
Welcome to the world of SSD firmware! This chapter marks the beginning
of your journey into the intricate world of solid-state drive (SSD) firmware.
In this chapter, I will lay the foundation by exploring the fundamental
concepts and essential aspects of SSD firmware. My goal is to provide
you with a clear understanding of what SSDs are, the role of firmware in
optimizing their performance, and the key differences that set SSDs apart
from traditional hard-disk drives (HDDs).
What Is SSD?
A solid-state drive (SSD) is a type of storage device that uses flash memory
to store data. Compared to traditional hard drives, which use spinning
disks to store data, SSDs are much faster, more reliable, and more energy
efficient. However, to take full advantage of the capabilities of an SSD,
it is necessary to use specialized software known as SSD firmware. SSD
firmware is the embedded software that controls the functions and
features of an SSD. It is responsible for managing the storage, retrieval,
and protection of data on the drive. SSD firmware is typically stored on the
drive’s non-volatile memory and is executed by the drive’s controller when
the drive is powered on. It plays a critical role in ensuring the reliable and
efficient operation of an SSD.
© Gopi Kuppan Thirumalai 2023 1
G. Kuppan Thirumalai, A Beginner’s Guide to SSD Firmware,
https://doi.org/10.1007/978-1-4842-9888-6_1
Chapter 1 Introduction to SSD Firmware
The first SSD, introduced in the late 1970s, used simple firmware
that was primarily responsible for interfacing with the host system and
translating its commands into actions on the drive. At the beginning,
SSDs were introduced for use in early IBM supercomputers, but they were
not often used due to their high cost. Over time, as SSD technology has
evolved, the firmware has become increasingly complex, adding features
such as wear leveling, garbage collection, and encryption. In addition, the
capabilities of SSD firmware have improved over time to support larger
SSDs, with current firmware able to support drives with capacities of up to
100 TB or more.
Today, SSD firmware is a crucial component of modern storage systems,
providing numerous benefits over traditional hard disk drives (HDDs),
such as faster access to data, higher reliability, and lower power
consumption. It also enables advanced features such as data protection,
power management, and error correction, which are essential for
maintaining the integrity and performance of the drive.
Figure 1-1. Comparison of HDD and SSD
2
In addition to supporting larger SSDs, modern SSD firmware is also

designed to improve the performance of the drive. For example, SSD
firmware can optimize the process of reading and writing data to the drive,
and it can also improve the reliability of the drive by using techniques such
as error-correcting code (ECC) and wear leveling.
There are several different types of SSD that are commonly used,
including data-center SSDs, client SSDs, external SSDs, and enterprise
SSDs. Each of these types of SSD has its own unique set of requirements,
and the firmware that is used with these drives is specifically designed to
meet those requirements.
One important consideration when designing SSD firmware is the type
of memory that is used in the drive. The most common types of memory
used in SSDs are single-level cell (SLC), multi-level cell (MLC), triple-level
cell (TLC), and quadruple-level cell (QLC). Each of these types of memory
has its own unique characteristics, and the firmware that is used with the
drive must be optimized to take advantage of those characteristics. SLC
memory is generally considered to be the most reliable and robust type of
memory, but it is also the most expensive. MLC, TLC, and QLC memory
are generally less expensive than other types, but they are also less reliable
and have lower endurance, meaning they can’t withstand as much wear
and tear (less P/E cycle (program/erase Cycle) compared to SLC). In
addition, the firmware design and implementation for MLC, TLC, and
QLC memory can be more complex compared to other types of memory.
This means that the firmware used to control and manage the memory
may be more intricate and require more effort to design and implement. In
general, MLC, TLC, and QLC memory are less durable and more complex
to work with compared to other types of memory, but they can be a cost-
effective option for certain applications.
Another important consideration when designing SSD firmware is the
type of host interface that is supported. The host interface is the interface
that connects the SSD to the rest of the system, and different interfaces have
different performance characteristics. The most common types of host
3
interface for SSDs are SATA, USB, NVMe, and SAS (Serial-Attached Small
Computer System Interface (SCSI). SATA is the most common and widely
supported interface, but it has relatively low performance compared to other
interfaces. NVMe is a newer interface that is designed specifically for high-
performance storage devices, and it can provide much higher performance
than SATA. USB is a universal interface that is commonly used for external
storage devices, but it has lower performance than other interfaces. SAS is
a high-performance interface that is commonly used in enterprise storage
systems, but it is not as widely supported as SATA or NVMe.
Figure 1-2. SSD block diagram
This book is a basic resource that covers the fundamental principles

and technical aspects of SSD firmware and is designed to provide a basic
understanding of the key concepts and technologies used in SSD firmware.
The guide is divided into several chapters, each of which covers a different
aspect of SSD firmware. The first few chapters provide an overview of SSD
firmware, including the key features and benefits of SSDs and the ways in
which they differ from traditional hard-disk drives (HDDs). These chapters
help with understanding the role of the SSD firmware in managing the
read and write operations of the drive and also dive into the history and
evolution of SSD firmware.
The further chapters delve into the inner workings of SSD firmware,
exploring fundamental NAND operations, various techniques for error
correction, and strategies for endurance management. They also cover
4
common SSD firmware features, design considerations, and the all-

important flash translation layer. The chapters then examine the flow
of user data and exception handling in an SSD, as well as performance
optimization and debugging support. Finally, the book concludes
with a look to the future, examining the cutting-edge technologies and
innovations that are shaping the future of SSD firmware.
This book may provide a valuable resource for anyone interested
in understanding the technical details of SSD firmware basics and how
firmware impacts the performance and reliability of solid-state drives.
Whether you are a firmware engineer, a computer science student, or
simply someone interested in learning more about SSDs, this book is sure
to provide you with a basic information and insights.
Summary
In this chapter, we covered the basics of SSD firmware. You have learned
that SSD firmware is the software that controls the operation of an
SSD. You have also learned that SSD firmware is responsible for tasks
such as managing the wear leveling of the NAND flash memory, garbage
collection, and error correction.
You have also learned about the different types of SSD that are
commonly used, including data center SSDs, client SSDs, external SSDs,
and enterprise SSDs. We have discussed the different types of memory that
are used in SSDs, such as SLC, MLC, TLC, and QLC. We have also looked
at the different types of host interfaces that are supported by SSDs, such
as SATA, USB, NVMe, and SAS. This chapter set the stage for a deeper dive
into the intricate workings of SSD firmware, promising insights into NAND
operations, error correction techniques, performance optimization, and
future innovations.
5
CHAPTER 2
Understanding the
Role of Firmware
in SSDs
Picture the hardware of a solid-state drive (SSD) as the engine of a
car, and the firmware as the driver who controls and optimizes its
performance. In the SSD world, firmware takes center stage, fine-tuning
every interaction between the physical components and the digital world.
This chapter embarks on a journey to unveil the firmware’s pivotal role
in SSDs, breaking down its intricate responsibilities and how it makes
things happen.
What Is Firmware?
For SSDs to work properly and help us with tasks, they rely on both
hardware and firmware. The hardware consists of the physical
components of the device, such as the processor, memory, and storage.
The firmware, meanwhile, is the software that runs on the device and
controls the hardware. It is responsible for ensuring that the device
performs its designated tasks and functions properly.

https://doi.org/10.1007/978-1-4842-9888-6_2
Chapter 2 Understanding the Role of Firmware in SSDs
The primary role of SSD firmware is to manage the storage, retrieval,

and protection of data on the drive. Firmware is typically embedded into
the hardware during the manufacturing process and is not intended to be
modified by the user.
In SSDs, firmware plays a crucial role in the performance and
functionality of the drive. It controls the various hardware components of
the drive, such as the memory chips and interface controller, and manages
the data stored on the SSD. Additionally, SSD firmware provides many
advanced features that are essential for maintaining the performance and
reliability of the drive. For example, it can include wear-leveling algorithms
that distribute data evenly across the drive to prevent excessive wear on
any one area of the drive, garbage-collection algorithms that reclaim
unused space on the drive to improve performance, and algorithms to
reduce write amplification. (Write amplification is a process that increases
the amount of data written to the drive beyond the amount of data that the
user writes.)
SSD firmware can also include encryption capabilities to protect data
on the drive, as well as power-management functions to help conserve
energy and extend the lifespan of the drive. These features are essential
for modern SSDs, which are often used in high-performance computing
environments and require the highest levels of data protection and
reliability.
Additionally, SSD firmware is responsible for managing the internal
data structures of the drive, such as the journaling data that is used to keep
track of changes to the data on the drive. This allows the drive to recover
from any errors or power failures that may occur.
Another important function of SSD firmware is to manage thermal
throttling, which is the process by which the drive reduces its performance
in order to prevent overheating. This can help to protect the drive from
damage and extend its lifespan.
8
When we use our devices, they often run multiple programs at the
same time. Over time, this can lead to a decrease in system performance
and slower operation. One solution to this problem is to replace the
hardware with new parts. However, this can be expensive and time-
consuming. A more cost-effective and simpler solution is to update the
firmware that the system runs on. Firmware updates can fix bugs, improve
performance, and add new features to the device, all without the need to
replace any hardware.
Firmware updates for SSDs can be installed by the user and are
typically available for download from the manufacturer’s website. It is
important to keep the firmware of an SSD up to date to get the most out of
the drive and to ensure its proper functioning.
Updating the firmware on an SSD can bring several benefits, including
improved performance, increased stability, and access to new features. For
example, a firmware update may optimize the performance of the drive by
improving instruction times, out-of-order execution, branch prediction,
and speculative execution time. It may also fix bugs that have developed
over time and prevent the need for expensive repairs or bug fixes in
the future.
In addition to these benefits, updating the firmware on an SSD can
help to prevent the drive from becoming obsolete. By adopting the
additional functionalities and capabilities that come with the firmware
update, users can ensure that their SSD remains compatible with newer
technologies and is able to keep up with changing needs.
Finally, SSD firmware is responsible for managing the mapping of
logical block addresses to physical block addresses on the drive. This is
necessary because the data on the drive is typically organized into blocks,
and the firmware must manage the mapping of these blocks to the actual
physical locations on the drive where the data is stored. This is an essential
part of the drive’s overall performance and reliability.
9
Summary
This chapter pulled back the curtain on the unsung hero of SSDs:
firmware. Think of it as the conductor of an orchestra, ensuring each
instrument (component) plays in harmony to create a beautiful symphony
(performance). Firmware’s primary job is to manage data storage,
retrieval, and safeguarding. It makes sure no single spot on the drive wears
out prematurely and reclaims space that’s not being used. It even handles
tricky maneuvers like reducing the amount of data written, thus extending
the drive’s lifespan. Firmware is also the brain behind encryption and
energy-saving tricks, crucial in today’s demanding computing world.
The chapter also highlighted firmware updates, like giving your car a
software upgrade. These updates fine-tune the drive’s performance, fix
bugs, and even add new features without needing to swap parts. They’re
your SSD’s way of staying sharp and relevant, much like updating your
phone’s software. Lastly, firmware’s task of mapping logical data to
physical locations was emphasized—the GPS of your SSD, ensuring data
arrives at its destination smoothly. This chapter has shown that firmware is
the true wizard behind the scenes of SSD engineering.
10
CHAPTER 3
The History and

Evolution of SSD
Firmware
In this chapter, we delve into the historical evolution of solid-state
drive (SSD) firmware, tracing its journey from its rudimentary origins
to its present-day complexities. Our exploration begins with the early
days of SSD technology, when firmware was a modest tool focused on
basic interfacing tasks. As time progressed, firmware transitioned into
a powerhouse of advanced functionalities. Our analysis concludes by
examining the contemporary challenges and innovative solutions that
underscore the realm of SSD firmware engineering.
History
The history of SSD firmware can be traced back to the early days of SSD
technology, when the first SSDs were introduced in the late 1970s. At that
time, SSD firmware was a relatively simple piece of software that was
primarily responsible for interfacing with the host system and translating
its commands into actions on the drive.

https://doi.org/10.1007/978-1-4842-9888-6_3
Chapter 3 The History and Evolution of SSD Firmware
Early SSD firmware was focused on ensuring data integrity and

reliability. This was important because early SSDs were prone to data
loss due to the instability of its memory. To address this issue, early SSD
firmware included basic features such as error-correction algorithms.
These algorithms were used to detect and correct errors in the data stored
on the drive, improving the reliability and integrity of the data.
Over the next several decades, as SSD technology continued to
evolve, the firmware also evolved to include more advanced features and
capabilities. For example, early SSDs lacked the wear-leveling algorithms
that are now commonly found in modern drives, which distribute data
evenly across the drive to prevent excessive wear on any one area of
the drive.
Similarly, early SSDs did not have the garbage-collection algorithms
that are now standard in modern drives, which reclaim unused space on
the drive to improve performance. These and other advanced features
were gradually added to SSD firmware as the technology matured and the
demands on SSDs increased.
Today, SSD firmware is a crucial component of modern storage systems,
providing numerous benefits over traditional hard-disk drives (HDDs),
such as faster access to data, higher reliability, and lower power
consumption. It also enables several advanced features, such as data
protection, power management, and error correction, which are essential
for maintaining the integrity and performance of the drive.
One of the main challenges in achieving high performance with SSDs
is their tendency to become bogged down by random input/output (IO)
operations (IO operations are tasks that involve reading or writing data
from or to the SSD, such as when you save a file or load a program), which
occurs when the drive receives a large number of small, random read and
write requests. To address this issue, SSD firmware began to incorporate
stream concepts, which involve grouping together related IO requests and
12
Chapter 3 The History and Evolution of SSD Firmware
processing them as a single, larger request. This can significantly improve

the performance of the drive by reducing the number of small IO requests
and allowing the drive to operate more efficiently.
Another important aspect of SSD firmware is IO determinism,
which refers to the ability of the drive to consistently deliver predictable
performance. In the early days of SSDs, the performance of the drive
could vary greatly depending on the workload, leading to unpredictable
and inconsistent results. Modern SSD firmware includes features such as
host cache, which uses system memory to store frequently accessed data,
allowing the drive to deliver more consistent and predictable performance.
In summary, the history of SSD firmware reflects the evolution of
SSD technology itself. Starting with simple firmware that was primarily
responsible for interfacing with the host system, it has gradually evolved to
include a wide range of advanced capabilities that are critical for modern
storage systems.
Summary
This chapter has discussed the history and evolution of SSD firmware. We
have seen how firmware has evolved from a simple piece of software to a
complex and sophisticated piece of technology. We have also seen how
firmware has helped to improve the performance, reliability, and efficiency
of SSDs.
The chapter has also discussed some of the challenges that SSD
firmware faces today. One of the main challenges is the need to improve
the performance of SSDs under random IO conditions. Another challenge
is the need to improve the IO determinism of SSDs.
Despite these challenges, SSD firmware continues to evolve and
improve. As SSD technology continues to develop, we can expect to see
even more advanced features and capabilities in the future.
13
CHAPTER 4
Basics of Flash
Memory
In this chapter, we will discuss different memory types and delve into
the world of flash memory, exploring its different types and focusing on
two primary types: NAND and NOR flash memory. We will discuss the
architecture of NAND flash memory and its fundamental operations,
including reading, writing, and erasing data. Understanding these basic
operations is crucial to grasp how NAND flash memory functions and how
it is utilized in solid-state drive (SSD) firmware. By the end of this chapter,
you will have gained valuable insights into the basics of flash memory,
enabling you to comprehend its architecture and the fundamental
operations it supports.
Memory Types
Flash memory is a type of non-volatile memory that is used in a variety of
electronic devices, including SSDs. Non-volatile memory can retain data
even when the power is turned off, making it ideal for storing important
information.
There are several different types of flash memory available, including
NOR and NAND, as you can see in Figure 4-1.

https://doi.org/10.1007/978-1-4842-9888-6_4
Chapter 4 Basics of Flash Memory
Figure 4-1. Memory types
NOR Flash Memory

NOR flash memory is capable of random access, meaning that data can be
read or written to any location on the memory chip. It is commonly used
in devices that require fast access to small amounts of data. It is possible
to read/write one byte of data at a time. Erase operation is in sector wise.
NOR flash memory is less dense, meaning it consumes more physical area
and costs more than NAND flash memory.
Characteristics of NOR Flash Memory

The following are characteristics of NOR flash memory:
• Cost per bit is high.
• Code execution is easy.
• Capacity is low.
• Write speed is slower.
• Read speed is faster.
• Power consumption on standby is low.
16
NOR Memory Architecture

Take a look at the NOR memory architecture in Figure 4-2.
Figure 4-2. NOR memory architecture

Source: Wikipedia
NOR memory is a type of flash memory that uses NOR gates to store
data. The gates are arranged in a grid, with each gate storing a single bit
of data. The grid is divided into words, with each word containing a fixed
number of bits.
To read data from NOR memory, the controller sends a read command
to the memory. The memory then transfers the data from the selected
word to the controller.
To write data to NOR memory, the controller sends a write
command to the memory. The memory then writes the new data to the
selected word.
NAND Flash Memory

NAND flash memory, however, is a type of flash memory that is optimized
for high-capacity storage and fast data transfer. It is commonly used in
SSDs and other storage devices, such as USB drives and memory cards.
NAND memory is made up of tiny transistors that are arranged in a
17
grid and can be used to store data in the form of bits (0s and 1s). It is
fast and efficient, making it ideal for use in SSDs, and it is also relatively
inexpensive and widely available.
NAND Memory Architecture

Take a look at the NAND memory architecture in Figure 4-3.
Figure 4-3. NAND memory architecture

Source: Wikipedia
NAND memory is a type of flash memory that uses floating-gate

transistors to store data. The transistors are arranged in a grid, with each
transistor storing a single bit of data. The grid is divided into pages, with
each page containing a fixed number of bits.
To read data from NAND memory, the controller sends a read
command to the memory. The memory then transfers the data from the
selected page to the controller.
To write data to NAND memory, the controller sends a write
command to the memory. The memory then erases the selected page and
writes the new data to the page.
18
Similarities
NAND and NOR memory are both types of flash memory. They both use
transistors to store data, and they both have a grid-like structure.
Differences
The main difference between NAND and NOR memory is the way that
they store data. NAND memory uses floating-gate transistors, while NOR
memory uses NOR gates. This difference in the way that they store data
affects the performance and the features of the two types of memory.
NAND memory is generally faster than NOR memory, but it is also
more expensive. NAND memory is also more durable than NOR memory.
NOR memory is slower than NAND memory, but it is also less
expensive. NOR memory is also easier to program than NAND memory.
A Flash Memory Cell
Figure 4-4. A flash memory cell
19
Flash memory, which is used in SSDs, combines the characteristics

of ROM (read-only memory) and RAM (random access memory). It can
retain information even when there is no power, like ROM, and it can be
repeatedly erased and rewritten, like RAM. This is made possible through
the use of a special type of transistor in flash memory.
Let’s break down how it works in a simplified manner, as follows:
1. Typical Transistors: In typical memory transistors,

there are three connections: source, drain, and gate.
The source is where electricity enters, the drain is
where it exits, and the gate controls the flow. When
the gate is closed, no current can flow, turning the
transistor off and storing a zero (0). When the gate is
open, power flows through, activating the transistor
and storing a one (1).
2. Limitations of Typical Transistors: However, a

typical transistor cannot remember its state when
the power is switched off. When power is turned
back on, it’s difficult to determine whether the
transistor was on or off before the power was
removed.
3. Flash Memory Transistors: Flash memory
transistors have an additional connection called a
floating gate. This floating gate is placed on top of
the main gate. When the gate is open, electricity
seeps through the first gate and remains trapped
between the first and second gates, even when the
power is off. Refer to Figure 4-5.
4. Retaining Information: The floating gate in flash

memory allows it to remember its state even
when the power is off. If you try to push current
20
through the transistor, the stored energy prevents

it, representing a zero. Clearing the stored energy
allows the current to flow, representing a one.
This way, the flash transistor retains information
regardless of whether the power is on or off.
Figure 4-5. Floating gate NMOS transistor
Figure 4-6. Programming floating gate NMOS transistor
21
Figure 4-7. Erasing floating gate NMOS transistor
Figure 4-8. Reading floating gate NMOS transistor
22
Table 4-1. Cell Node Voltages Required in Different

Memory Operations
Operation Gate Drain Source Bulk
Read 4.5 SA 0 0
Program 8.0 5.0 0 0
Erase -8.0 Float 8.0 8.0
NAND Memory Organization

• The package is the memory chip, which contains one
or more dies.
• The die is the smallest unit that can independently

execute commands and report status.
• Each die contains one or more planes. Identical,

concurrent operations can take place on each plane,
although with some restrictions.
• Each plane contains a number of blocks, which are the

smallest unit that can be erased. Remember that, as it’s
really important.
• Each block contains a number of pages, which are the

smallest unit that can be programmed.
23
Addressing
It is NAND memory addressing. How physical nand can be addressed or
accessed by Firmware.
Figure 4-9. The organizational structure of a NAND flash device

Source: Micron Technology Inc.
Figure 4-10. NAND flash die layout

Source: AnandTech
24
Erase
In a flash memory device, the erase operation is responsible for changing
the state of a cell from "0" to "1" by removing electrons from the floating
gate. It is important to note that a single cell cannot be directly changed
from "1" to "0"; instead, the erase operation must be performed on a
block-by-block basis. This means that before new data can be written to a
block (through the programming process), the block must first be erased
to ensure that it is empty. It is worth noting that the erase operation
typically has a longer latency than the read and program operations,
meaning it can take longer to complete. For example, the read, program,
and erase latencies for a Micron 8 GB flash chip are 25 μs, 220 μs, and 1500
μs, respectively. As a result, the erase operation can be a performance
bottleneck in NAND flash memories, and various firmware algorithms
have been developed to minimize the impact of the long erase latency on
overall performance.
Figure 4-11. Erase level Vth distribution
Write
The program operation is performed on a page level. This means that
the operation targets a specific page of memory on the drive. When the
controller of the SSD requests a program operation on the NAND device,
it specifies the chip select (CE) and provides the row address of the page
25
to be targeted. The controller then transfers the data to be programmed

to the NAND device and sends a final program command to complete the
operation.
It is important to note that a page on an SSD cannot be written more
than once without first performing an erase operation. This is because an
erase operation is required to clear the page of any existing data before
new data can be written to it. As a result, every time a program operation
is performed on a page, it must be preceded by an erase operation. This
ensures that the page is ready to accept new data and that the program
operation is successful.
It is also important to say that pages need to be written in consecutive
order within the block; page number 0 is to be written first followed
by page 1. Writing out of sequence is not allowed, as violating this rule
aggravates the bit error rate. A single block does not need to be written all
at once. That is, a block can be written with pages from 0 to 11, and later on
with pages from 12 to 32, for example. Generally, pages need to be written
as a whole at once, though some memories support so-called partial page
programming, which allows a subpage of 512 bytes + correlated spare area
to be written.
The data to be written will be provided by the host or result from
firmware internal data management. Firmware first transfers the data
from cache to the NAND internal cache register. Once the data transfer
is completed the programming should start; i.e., writing to actual
NAND cells.
26
# of cells
2 Level Cell Vth Upper Limit
E P
0V
Erase cell becomes Programmed
Figure 4-12. Program level Vth distribution
Read
Figure 4-13. Read sensing graph
27
From the perspective of the NAND chips themselves, the read operation
involves activating the appropriate word line to select the desired page of
cells, and then reading the data stored in those cells by sensing the voltage
levels on the bit lines. The NAND chips are organized into blocks, which
are further divided into pages. Each page stores a fixed amount of data,
typically 4 KB to 16 KB (or more), depending on the specific NAND device.
To read a specific page, the controller must first locate the block
that contains the page and then activate the appropriate word line
to select the page within that block. The read operation is typically
performed by the SSD’s controller, which uses firmware to manage the
communication with the NAND chips and handle the necessary data
transfer and error correction. The firmware is responsible for optimizing
the read performance by minimizing the number of accesses required and
maximizing the data transfer rate.
Table 4-2. NAND Basic Operations Timings
Program/Erase Cycle (P/E Cycle)

The program/erase (P/E) cycle is a fundamental aspect of NAND flash
memory, which is commonly used in SSDs. NAND flash memory works
by storing data in cells that are grouped into blocks. Each cell can store a
single bit of data, and a group of cells is needed to store a larger amount of
data. To write new data to a cell, the cell must first be erased, which is done
by applying a high voltage to the cell. As we already explained, this process
is known as the erase cycle.
28
Once the cell has been erased, new data can be written to it using a
process called programming, which involves applying a lower voltage to
the cell. The process of writing new data to a cell by first erasing it and then
programming it with new data is known as the P/E cycle. The P/E cycle is
a key factor in the endurance of NAND flash memory, as the erase cycle
can cause wear on the cells over time. As a result, NAND flash memory
has a limited number of P/E cycles that it can withstand before it begins to
degrade. This is known as the endurance of the memory.
To extend the endurance of NAND flash memory, it is important to
minimize the number of P/E cycles that the memory undergoes. One
way to do this is to use the TRIM command, which allows the operating
system to inform the SSD which data blocks are no longer in use and can
be erased. This can reduce the number of P/E cycles by eliminating the
need to move invalid data during the garbage-collection process, which
is an internal SSD housekeeping operation that manages and maintains
available storage space.
The number of bits that can be stored in each cell of a NAND flash
memory drive can also affect the maximum number of program/erase (P/E)
cycles that the drive can support. Table 4-3 provides an overview of the
different types of NAND cells based on the number of bits they can store.
Table 4-3. PEC Cycle Based on NAND Cell Type
29
As the number of bits per cell increases, the number of supported P/E
cycles tends to decrease. Single-level cell (SLC) NAND, which can store one
bit per cell, generally has the highest endurance, while quad-level cell (QLC)
NAND, which can store four bits per cell, has the lowest endurance. It is
important to consider the endurance of an SSD when selecting a drive, as
a drive with a lower endurance may not be suitable for use in cases that
involve a high number of P/E cycles.
Summary
This chapter has discussed the basics of flash memory, including its
different types, architecture, and fundamental operations. We have seen
how NAND flash memory works and how it is used in SSDs. We have
also seen the different types of operations that can be performed on
NAND flash memory, such as erase, program, and read. We have also
discussed the P/E cycle, which is a key factor in the endurance of NAND
flash memory.
30
CHAPTER 5
3D Vertical NAND
Now, welcome to the exciting world of 3D vertical NAND! In this chapter,
we will cover a cutting-edge technology that has revolutionized the way we
store data. 3D vertical NAND is a remarkable advancement in NAND flash
memory, allowing us to stack memory cells vertically to increase storage
capacity and performance significantly.
You might be wondering how this technology works and what makes it
so special. We will walk through the basics of 3D vertical NAND, explaining
its unique architecture and how it overcomes the limitations of traditional
2D planar NAND. You’ll discover the advantages and benefits of this
innovative technology, along with its real-world applications and the
impact it has on various industries.
By the end of this chapter, you will have a clear understanding of how
3D vertical NAND works and how it has transformed data storage, making
it a technology crucial to modern electronic devices. So, let’s dive in and
explore the fascinating world of 3D vertical NAND!
Evolution of 3D Vertical NAND Technology

The rapid growth in data traffic globally is pushing the boundaries of
NAND flash memory technology. The industry-standard 2D planar NAND
technology has inherent limitations when it comes to expanding storage
capacity without compromising performance and reliability. This has
created a need for innovative solutions to meet the increasing demands for
data storage.
https://doi.org/10.1007/978-1-4842-9888-6_5
Chapter 5 3D Vertical NAND
To address these challenges, the industry has introduced a

groundbreaking approach known as 3D vertical NAND (V-NAND) flash
memory technology. This innovation has revolutionized the design and
architecture of NAND flash memory by stacking memory cells vertically
in a three-dimensional structure, as opposed to the traditional two-
dimensional planar arrangement. This vertical stacking allows for the
creation of multiple layers of memory cells, resulting in significantly higher
memory capacities (Figure 5-1).
By adopting a 3D V-NAND structure, the industry has overcome
the limitations associated with capacity expansion in 2D planar NAND
technology. This vertical stacking not only enables higher storage densities
but also eliminates performance and reliability issues caused by capacity
constraints. With more memory cells packed into each chip, the industry
has achieved remarkable advancements in storage capacity while
maintaining or even enhancing performance and reliability characteristics.
The vertical stacking of memory cells in 3D V-NAND technology offers
several advantages. First, it allows for increased memory capacity within a
smaller physical footprint, which is particularly beneficial in applications
where space is a constraint. Additionally, the three-dimensional structure
enables better control of electrical properties, resulting in improved
performance and endurance.
This innovation in flash memory technology has had a significant
impact on the storage industry, enabling the development of high-capacity
solid-state drives (SSDs) that can handle the ever-growing volumes of data.
The adoption of 3D V-NAND technology has facilitated advancements in
areas such as cloud computing, data centers, mobile devices, and other
storage-intensive applications.
32
Chapter 5 3D Vertical NAND
Figure 5-1. 2D vs. 3D NAND comparison block diagram
nlocking New Possibilities with Vertical

U
NAND Architecture
Figure 5-2 compares the storage density of 2D planar NAND and 3D
V-NAND flash memory. As shown, 3D V-NAND can achieve up to 10x
greater storage density than 2D planar NAND. This is because 3D V-NAND
stacks memory cells vertically on top of each other, while 2D planar NAND
stacks memory cells horizontally on a silicon wafer.
The higher storage density of 3D V-NAND allows for larger capacity
NAND chips to be produced. This has made it possible to create NAND
flash memory devices such as solid-state drives (SSDs) and USB flash
drives with capacities of several terabytes.
33
Another random document with
no related content on Scribd:
angered, fierce, terrible, has rallied the cream of his armies around him. The
sixth assault has just been repulsed, the breach cleared by a terrific fusillade
from that handful of men, whilst a murderous shower from above, of
granite and scrap-iron and heavy stones, has scattered the attacking party. A
fragment of stone has hit the Duke on the forehead; blood is streaming
down his face. He sets spurs to his horse and gallops to where a company of
archers is scrambling helter-skelter out of the moat.
'Cowards!' he cries savagely. 'Will you flee before such rabble?'
He strikes at the soldiers with his sword, sets spurs to his horse until the
poor beast snorts with pain, rears and paws the air with its hoofs, only to
bring them down the next moment, trampling and kicking half a dozen
soldiers to death in its mad and terrified struggle.
'You know the guard has fled,' Alexander Farnese cries to his officers.
''Tis only an undisciplined mob who is in there now.'
His nephew, Don Miguel de Salvado, a brave and experienced captain,

shrugs his shoulders and retorts:
'A mob led by a man who has the whole art of warfare at his finger-tips.
Look at him now!'
All eyes are turned in the direction to which Don Miguel is pointing.
There, in the midst of smouldering ruins of charred débris and crumbling
masonry, stands the defender of Cambray; behind him the graceful steeples
of St. Géry and of St. Waast, the towers of Notre Dame and of the Town
Hall, are lit up by the honey-coloured rays of the sinking sun. Superb in his
tattered clothes, with chest and arms bare, and ragged hose, he stands
immovable, scanning the western sky.
De Landas laughs aloud.
'He is still on the look-out for that promised help from France,' he says,
with a shrug of his shoulder.
The traitor has made good his escape out of the city which he has
betrayed. What assistance he could render to the Duke in the way of
information, he has done. The measure of his infamy is full to the brim, and
yet his hatred for the enemy who has shamed him is in no way assuaged.
He, too, looks up and sees Gilles de Crohin, the man whose invincible
courage has caused the Spanish armies so many valuable lives this day and
such unforgettable humiliation.
'A hundred doubloons,' he cries aloud, 'to the first man who lays that
scoundrel low!'
The word is passed from mouth to mouth. The archers and musketeers
set up a cheer. Parma adds, with an oath: 'And a captain's rank to boot!'
An hundred doubloons and a captain's rank! 'Tis a fortune for any man.
It means retirement, a cottage in sunny Spain, a home, a wife. The men take
heart and look to their arrows and their muskets! Every archer feels that he
has that fortune in his quiver now and every musketeer has it in his powder
horn. And with a loud cry of 'Long live King Philip of Spain!' the infantry
once more rush for the breach.
IV
Don Miguel de Salvado leads the attack this time. The breach now looks
like a gate which leads straight into the heart of the city, where pillage and
looting are to be the reward of the conquerors; and the booty will be rich
with the precious belongings of a pack of overfed bourgeois.
That open gate for the moment seems undefended. It is encumbered with
fallen masonry, and beyond this appear piles of rubbish, overturned wagons,
furniture, débris of all sorts, evidently abandoned by the wretched
inhabitants when they fled from their homes. Of Gilles de Crohin and his
burghers there is for the moment no sign.
Don Miguel has with him half a company of musketeers, the finest
known in Europe, and a company of lancers who have been known to clear
an entire city of rebels by their irresistible onrush.
'No falling back, remember!' he commands. 'The first who gives ground
is a dead man!'
Up the lancers run on the slippery ground, clinging to the wet earth with
naked feet, to the coarse grass and loose stones with their knees. The
musketeers remain on the hither side of the moat, three deep in a long battle
array; the front lying flat upon the ground, the second kneeling, the third
standing, with their muskets levelled against the first enemy who dares to
show his face. The pikemen have reached the breach. There is silence on
the other side. The officer laughs lustily.
'I told you 'twas but a rabble playing with firearms!'
The words are hardly out of his mouth when a terrific volley of musketry
shakes the fast crumbling wall to its foundation. It comes from somewhere
behind all those débris—and not only from there, but from some other
unknown point, with death-like precision and cold deliberation. The
Spanish officer is hit in the face; twelve pikemen throw up their arms and
come rolling down on the wet ground.
'What is this hell let loose?' cries the officer savagely, ere he too, blinded
with the flow of blood down his face, beats a hasty retreat.
Quick! a messenger to His Highness the Duke of Parma! The breach is

so wide now that twenty men could walk easily through it. The enemy is
not in sight—and yet, from somewhere unseen, death-dealing musketry
frustrates every assault.
'Return to the charge!' is the Duke of Parma's curt command, and sends
one of his ablest officers to lead a fresh charge. He himself organizes a
diversion, crosses the small rivulet, which flows into the Schelde at the foot
of Cantimpré, and trains his artillery upon a vulnerable piece of wall,
between the bastion and the river bank. He has the finest culverines known
in Europe at this time, made on a new pattern lately invented in England;
his cannon balls are the most powerful ever used in warfare, and some of
his musketeers know how to discharge ten shots in a quarter of an hour—an
accomplishment never excelled even by the French.
So, while one of his ablest officers is in charge of the attacking party on
the breach, His Highness himself directs a new set of operations. Once
more the roar of artillery and of musketry rend the air with their portentous
sound. The Duke of Parma's picked men attack the last bastion of
Cantimpré, whilst from the roads of Arras, of Sailly and Bapaume, the
whole of the Spanish infantry rush like a mighty wave to the charge.
Pikemen and halberdiers, archers and lancers, once more to the assault!
Are ye indeed cowards, that a pack of Flemish rabble can hold you at bay
till you sink back exhausted and beaten? Up, Bracamonte and Ribeiras!
Messar, with your musketeers! Salvado, with your bow-men! Up, ye mighty
Spanish armies, who have seen the world at your feet! With Farnese himself
to lead you, the hero of an hundred sieges, the queller of an hundred
rebellions; are ye dolts and fools that you cannot crush a handful of
undisciplined rabble?
And in close masses, shoulder to shoulder, they come!—exhausted, but

still obstinate, and with the hope of all the rich booty to lure them on. Down
the declivity of the moat—no longer deep, now that it is filled with dead!
And up again to below the walls! The setting sun is behind them and
gleams on their breastplates and their bonnets, and gilds the edges of the
battlements with lines of flame.
And, up on the crumbling battlements, the defenders of Cambray—the

clerks and shopkeepers and churls—hear the tramp of many feet, feel the
earth quivering beneath this thunder of a last mighty assault. Sturdy,
undaunted hands grip lance and pike tighter still, and intrepid hearts wait
for this final charge, as they have waited for others to-day, and will go on
waiting till the last of them has stilled its beating.
And Gilles de Crohin in their midst, invincible and cool, scours the
battlements and the breach, the bastions and the ramparts—always there
where he is needed most, where spirits want reviving or courage needs the
impetus of praise. He knows as well as they do that gunpowder is running
short, that arrows are few and thousands of weapons broken with usage: he
knows, better than they do, that if de Balagny's troop tarries much longer all
this heroic resistance will have been in vain.
So he keeps his own indomitable little army on the leash, husbanding

precious lives and no less precious ammunition; keeping them back, well
away from the parapets, lest the sight of the enemy down below lead them
on to squander both. Thus, of all that goes on beneath the walls, of the
nature of the attack or the chances of a surprise, the stout defenders can see
nothing. Only Gilles, whilst scouring the lines, can see; for he has crawled
on his hands and knees to the outermost edge of the crumbling parapet and
has gazed down upon the Duke of Parma's hordes.
Now the Spanish halbertmen have reached the hither side of the moat.
The breach is before them, tantalizingly open. The lancers are following
over the improvised bridges, and behind them the musketeers are sending a
volley of shot over their heads into the breach. It is all done with much
noise and clash of steel and thundering artillery and cries of 'Long live King
Philip!'—all to cover the disposing of scaling ladders against the walls.
The pikemen are executing this surprise attack, one in which they are
adepts. The noisy onslaught, the roar of artillery, the throwing of dust in the
eyes of wearied defenders; then the silent scaling of the walls, the rush upon
the battlements, wholesale panic and slaughter.
Alexander Farnese hath oft employed these devices and hath never
known them to fail. So the men throw down their pikes, carry pistols in
their right hand and a short dagger-like sword between their teeth. They fix
their ladders—five of them—and begin quite noiselessly to mount. Ten on
each ladder, which makes fifty all told, and they the flower of the Duke of
Parma's troops. Up they swarm like human ants striving to reach a hillock.
Now the gunners have to cease firing, lest they hit those ladders with their
human freight.
And while at the breach the men of Cambray make their last desperate
stand, the first of the Spanish pikemen has reached the topmost rung of his
ladder. The human ants have come to the top of their hillock. Already the
foremost amongst them has begun to hoist himself up, with his hands
clinging to the uneven masonry. The next second or two would have seen
him with his leg over the parapet, and already a cry of triumph has risen to
his lips, when suddenly, before his horror-stricken gaze, a man surges up, as
if out of the ground, stands there before him for one second, which is as
tense as it is terrifying. Then, with a mighty blow from some heavy weapon
which he holds, he fells the pikeman down. The man loses his footing,
gives a loud cry of horror and falls headlong some forty feet. In his fall he
drags two or three of his comrades with him. But the ladder still stands, and
on it the human ants, reinforced at once by others, resume their climb. Only
for a minute—no more! The next, a pair of hands with titanic strength and a
grip of iron seizes the ladder by the shafts, holds it for one brief, agonizing
moment, and then hurls it down with the whole of its human freight into the
depth below.
An awful cry rends the air, but is quickly drowned by the roar of cannon
and musketry. It has been a mere incident. The Duke has not done more
than mutter an oath in his beard. He is watching the four other ladders on
which his human ants are climbing. But the oath dies on his lips—even he
becomes silent in face of the appalling catastrophe which he sees. That man
up there whom already he has learned to fear, that man in the tattered
doublet and the ragged hose—he it is who has turned the tables on Farnese's
best ruse de guerre. With lightning rapidity and wellnigh superhuman
strength, he repeats his feat once more. Once more a scaling ladder bearing
its precious human freight is hurled down into the depth. The man now
appears like a Titan. Ye gods! or ye devils! which of you gave him that
strength? Now he has reached the third ladder. Just perhaps one second too
late, for the leading pikeman has already gained a foothold upon the
battlements, stands there on guard to shield the ladder; for he has scented
the danger which threatens him and his comrades. His pistol is raised even
as Gilles approaches. The Duke of Parma feels as if his heart had stilled its
beating. Another second, and that daring rebel would be laid low.
But Gilles too has seen the danger—the danger to himself and to the city
which he is defending. No longer has he the time to seize the ladder as he
has done before, no longer the chance of exerting that titanic strength which
God hath lent him so that he might save Cambray. One second—it is the
most precious one this threatened city hath yet known, for in it Fate is
holding the balance, and the life of her defender is at stake. One second!
The Spanish pikemen are swarming up dangerously near now to the

battlements. The next instant Gilles has picked up a huge piece of masonry
from the ground, holds it for one moment with both hands above his head,
then hurls it with all his might against the ladder. The foremost man is the
first to fall. His pistol goes off in his hand with a loud report. Immediately
below him the weight of the falling stone has made matchwood of the
ladder and the men are hurled to their death, almost without uttering a
groan. The Flemish halbertmen in the meanwhile have rushed up to the
battlements; seeing Gilles' manoeuvre, they are eager to emulate it. There
are two more ladders propped against the falling walls and their leader's
strength must in truth be spent. And there are still more Spaniards to come,
more of those numberless hordes, before whom a handful of untrained
burghers are making their last and desperate stand.
Just then Gilles has paused in order to gaze once more into the far-away
west. Already the gold of the sun has turned to rose and crimson, already
the low-lying horizon appears aflame with the setting glow. But now upon
the distant horizon line something appears to move, something more swift
and sudden and vivid than the swaying willows by the river bank or the tall
poplars nodding to the evening breeze. Flames of fire dart and flash, a
myriad specks of dust gleam like lurid smoke and the earth shakes with the
tramp of many horses' hoofs. Far away on the Bapaume road the
forerunners of de Balagny's troops are seen silhouetted against the glowing
sky.
Gilles has seen them. Aid has come at last. One more stupendous effort,
one more superhuman exertion of will, and the day is won. He calls aloud
to the depleted garrison, to that handful of men who, brave and undaunted,
stand around him still.
'At them, burghers of Cambray! France comes to your aid! See her
mighty army thundering down the road! Down with the Spaniard! This is
the hour of your victory!'
As many times before, his resonant voice puts heart into them once
again. Once again they grip halberds and lances with the determination born
of hope. They rush to the battlements and with mighty hands hurl the
Spanish scaling ladders from their walls, pick up bits of stone, fragments of
granite and of iron, use these as missiles upon the heads of the attacking
party below. The archers on one knee shoot with deadly precision. They
have been given half a dozen arrows each—the last—and every one of them
finds its mark.
Surprised and confounded by this recrudescence of energy, the Spaniards

pause. An hundred of them lie dead or dying at the foot of the wall. Their
ranks are broken; don Miguel tries to rally them. But he is hit by an arrow
in the throat, ere he succeeds. De Landas is close by, runs to the rescue, tries
to re-form the ranks, and sees Gilles de Crohin standing firm upon the
battlements and hears his triumphant, encouraging cry:
'Citizens of Cambray, France has come to your aid!'
Confusion begins to wave her death-dealing wand. The halbertmen at the

breach stand for full five minutes almost motionless under a hail of arrows
and missiles, waiting for the word of command.
And on the Bapaume road, de Balagny and his troops are quickly
drawing nigh. Already the white banner with the gold Fleur-de-Lys stands
out clearly against the sky.
Parma has seen it, and cursed with savage fury. He is a great and mighty
warrior and knows that the end has come. The day has brought failure and
disgrace; duty now lies in saving a shred of honour and the remnants of a
scattered army. He cannot understand how it has all happened, whence this
French troop has come and by whose orders. He is superstitious and
mystical and fears to see in this the vengeful finger of God. So he crosses
himself and mutters a quick prayer, even as a volley of musketry fired
insolently into the air, reverberates down the Bapaume road.
France is here with her great armies, her unconquered generals: Condé,
Turenne, have come to the rescue. Parma's wearied troops cannot possibly
stand the strain of fighting in the rear whilst still pushing home the attack in
front. How numerous is the French advancing troop it is impossible to
guess. They come with mighty clatter and many useless volleys of
musketry, with jingling of harness and breastplates and clatter of hoofs
upon the road. They come with a mighty shout of 'Valois! and Fleur-de-
Lys!' They wave their banners and strike their lances and pikes together.
They come! They come!
And the half-exhausted Spanish army hears and sees them too. The
halbertmen pause and listen, the archers halt halfway across the moat,
whilst all around the whisper goes from mouth to mouth:
"The French are on us! Sauve qui peut!"
Panic seizes the men. They turn and scurry back over the declivity of the
moat. The stampede has commenced: first the cavalry, then the
infantrymen, for the French are in the rear and legions of unseen spirits
have come to the aid of Cambray.
The Duke of Parma now looks like a broken wreck of his former
arrogant self. His fine accoutrements are torn, the trappings of his charger
are in tatters, his beard has been singed with gunpowder, he has no hat, no
cloak. Raging fury is in his husky voice as he shouts orders and counter-
orders to men who no longer hear. He calls to his officers, alternately
adjures and insults them. But the French troops draw nearer and nearer, and
nothing but Death will stop those running Spanish soldiers now.
To right and left of the Bapaume road they run, leaving that road free for
the passage of de Balagny's small troop. Out in the western sky, the sun is
setting in a mantle of vivid crimson, which is like the colour of human
blood. The last glow illumines the final disgrace of Parma's hitherto
unconquered hordes. The cavalry is galloping back to the distant camp, with
broken reins and stirrups hanging loose, steel bonnets awry, swords, lances,
broken or wilfully thrown aside. Behind them, the infantry, the archers, the
pikemen, the halberdiers—all running and dragging their officers away with
them in their flight.
Parma's unconquered army has ceased to be.
VI
Then it is that Gilles de Crohin stands once again on the very edge of the
broken parapet and fronts the valiant men of Cambray, who have known
how to conquer and how to die. The setting sun draws lines of glowing
crimson round his massive figure. His clothes are now mere tattered rags;
he is bleeding from several wounds; his face is almost unrecognizable, coal-
black with grime and powder; but his eyes still sparkle with pride of
victory.
'Citizens of Cambray, you are free!' he cries. 'Long live France! Long
live the Flower o' the Lily!'
And down in the plain below, where the remnants of a disintegrated

army are being slowly swallowed up by the gathering dusk, the Duke of
Parma has paused for one moment before starting on his own headlong
flight. He sees the man who has beaten his mighty armies, the man whose
valour and indomitable will has inflicted untarnishable humiliation upon the
glory of Spain. With a loud curse, he cries:
'Will no one rid me of that insolent rebel?'
De Landas is near him just then. He too had paused to look once again
on the city which had been his home and which he had so basely betrayed,
and once again on the man whom he hated with an intensity of passion
which this day of glory and infamy had for ever rendered futile.
'If I do,' he retorts exultantly, 'what will your Highness give me?'
'Cambray and all it contains,' replies the Duke fiercely.
De Landas gives a cry of prescient triumph. A lancer is galloping by.

The young man, with a swift, powerful gesture, seizes the horse by the
bridle, forces it back on its haunches till it rears and throws its rider down
into the mud. De Landas swings himself into the saddle, rides back to
within a hundred paces of the city walls. Here confusion is still holding
sway; belated runaways are darting aimlessly hither and thither like helpless
sheep; the wounded and the maimed are making pitiable efforts to find a
corner wherein to hide. The ground is littered with the dead and the dying,
with abandoned cannon and spent arrows, with pikes and halberts and
broken swords and lances.
De Landas halts, jumps down from his horse, looks about him for a
crossbow and a quiver, and finds what he wants. Then he selects his
position carefully, well under cover and just near enough to get a straight hit
at the man whom he hates more than anything else in the world.
Opportunity seems to favour him. Gilles is standing well forward on the
broken parapet, his throat and chest are bare, his broad figure stands out
clear-cut against the distant sky. He is gazing out towards the west, straight
in the direction where de Landas is cowering—a small, unperceived unit in
the inextricable confusion which reigns around.
He has found the place which best suits his purpose, has placed his stock
in position and adjusted his arrow. Being a Spanish gentleman, he is well
versed in the use of every weapon necessary for war. He takes careful aim,
for he is in no hurry and is determined not to miss.
'Cambray and all it contains!' the Duke of Parma has promised him if he
succeeds in his purpose.
One second, and the deed is done. The arrow has whizzed through the
air. The next instant, Gilles de Crohin has thrown up his arms.
'Citizens of Cambray, wait for France!' he cries, and before any of his
friends can get to him, he has given one turn and then fallen backwards into
the depth below.
De Landas has already thrown down his crossbow, recaptured his horse
and galloped back at break-neck speed in the wake of the flying army.
And even then the joy-bells of Cambray begin to ring their merry peal.
Balagny's troops have entered the city through the open breach in her walls,
whilst down there in the moat, on a pile of dying and dead, her defender and
saviour lies with a murderous arrow in his breast.
VII
De Landas rides like one possessed away from the scene of his dastardly
deed; nor does he draw rein till he has come up once more with the Duke of
Parma.
'At any rate, we are rid of him,' he says curtly. 'And next time we attack,
it will only be with an undisciplined mob that we shall have to deal.'
All around him the mighty army of Parma is melting like snow under the
first kiss of a warm sun. Every man who hath limbs left wherewith to run,
flies panic-stricken down the roads, across fields and rivulets and morasses,
throwing down arms, overturning everything that comes in his way, not
heeding the cries of the helpless and trampling on the dead.
Less than an hour has gone by since France's battle-cry first resounded
on the Bapaume road, and now there is not one Spanish soldier left around
the walls of Cambray, save the wounded and the slain. These lie about
scattered everywhere, like pawns upon an abandoned chess-board. The
moat below the breach is full of them. Maître Jehan le Bègue has not far to
seek for the master and comrade whom he loves so dearly. He has seen him
fall from the parapet, struck by the cowardly hand of an assassin in the very
hour of victory. So, whilst de Balagny's chief captains enter Cambray in
triumph, Jehan seeks in the moat for the friend whom he has lost.
He finds him lying there with de Landas' arrow still sticking in the
wound in his breast. Maître Jehan lifts him as tenderly as a mother would
lift her sick child, hoists him across his broad shoulders, and then slowly
wends his way along the road back to La Fère.
CHAPTER XXV
HOW CAMBRAY STARVED AND ENDURED
As for the rest, 'tis in the domain of history. Not only Maître Manuchet,
but Le Carpentier in his splendid History of Cambray, has told us how the
Duke of Parma's armies, demoralized by that day of disasters, took as many
weeks to recuperate and to rally as did the valiant city to recover from her
wounds.
Too late did Parma discover that he had been hoaxed, that the massed
French troops, who had terrified his armies, consisted of a handful of men,
who had been made to shout and to make much noise, so as to scare those
whom they could not have hoped to conquer in open fight. It was too late
now for the great general to retrieve his blunder; but not too late to prepare
a fresh line of action, wait for reinforcements, reorganize the forces at his
command and then to resume the siege of Cambray, with the added hope of
inflicting material punishment upon the rebel city for the humiliation which
she had caused him to endure.
The French armies were still very far away. Parma's numerous spies
soon brought him news that Monsieur Duc d'Anjou, was only now busy in
collecting and training a force which eventually might hope to vie in
strength and equipment with the invincible Spanish troops, whilst the King
of France would apparently have nothing to do with the affair and openly
disapproved of his brother's intervention in the business of the Netherlands.
The moment therefore was all in favour of the Spanish commander; but
even so he did not again try to take Cambray by storm. Many historians
have averred that a nameless superstition was holding him back, that he had
seen in the almost supernatural resistance of the city, the warning finger of
God. Be that as it may, he became, after the day of disaster, content to
invest the approaches to the French frontier, and after awhile, when his
reinforcements had arrived, he formed with his armies a girdle around
Cambray with a view to reducing her by starvation.
A less glorious victory mayhap, but a more assured one!
II
So Cambray starved and endured.
For four months her citizens waited, confident that the promised help
from France would come in the end. They had hoped and trusted on that
never-to-be-forgotten day four months ago when they covered themselves
with glory, and their trust had not been misplaced. The masked stranger
whom they had followed unto death and victory, the man who had rallied
them and cheered them, who had shown them the example of intrepid
valour and heroic self-sacrifice, had promised them help from France on
that day, and that help had come just as he had promised. Now that he was
gone from them, the burghers and the soldiers, the poor and the rich alike—
aye! even the women and the children—would have felt themselves
eternally disgraced if they had surrendered their city which he had so
magnificently defended.
So they tightened their belts and starved, and waited with stoicism and
patience for the hour of their deliverance.
And every evening when the setting sun threw a shaft of crimson light
through the stately windows of Notre Dame, and the gathering dusk drew
long shadows around the walls, the people of Cambray would meet on the
Place d'Armes inside the citadel, and pray for the return of the hero who had
fought for their liberty. Men and women with pale, gaunt faces, on which
hunger and privations had already drawn indelible lines; men and women,
some of whom had perhaps never before turned their thoughts to anything
but material cares and material pleasures, flocked now to pray beneath the
blue vault of heaven and to think of the man who had saved them from ruin
and disgrace.
Nobody believed that he was dead; though many had seen him fall, they
felt that he would return. God Himself had given Cambray her defender in
the hour of her greatest peril: God had not merely given in order to take
away again. Vague rumours were afloat that the mysterious hero was none
other than the Duc d'Anjou, own brother of the King of France, who one
day would be Sovereign Lord over all the United Provinces; but as to that,
no one cared. He who was gone was the Defender of Cambray: as such, he
was enshrined in thousands of hearts, as such he would return one day to
receive the gratitude and the love of the people who worshipped him.
III
Le Carpentier draws a kindly veil over the sufferings of the unfortunate

city. With pathetic exactitude, he tells us that a cow during the siege fetched
as much as three hundred francs—an enormous sum these days—a sheep
fifty francs, an egg forty sols and an ounce of salt eight sols; but he
altogether omits to tell us what happened to the poor people, who had
neither fifty francs nor yet forty sols to spend.
Maître Manuchet, on the other hand, assures us that at one time bread
was entirely unobtainable and that rats and mice formed a part of the daily
menu of the rich. He is more crude in his statements than Le Carpentier, and
even lifts for our discreet gaze just one corner of that veil, wherewith
history has chosen to conceal for ever the anguish of a suffering city. He
shows us three distinct pictures, only sketched in in mere outline, but with
boldness and an obvious regard for truth.
One of these pictures is of Jacqueline de Broyart, the wealthy heiress

who shared with the departed hero the worship of the citizens of Cambray.
Manuchet speaks of her as of an angel of charity, healing and soothing with
words and hands and heart, as of a vision of paradise in the midst of a
torturing hell—her courage and endurance a prop for drooping spirits; her
voice a sweet, insistent sound above the cries of pain, the curses and the
groans. Wide-eyed and pale, but with a cheering smile upon her lips, she
flits through the deserted streets of Cambray, bringing the solace of her
presence, the help that can be given, the food that can be shared, to many a
suffering home.
Of the man who hath possession of her heart, she never speaks with
those in authority; but when in a humble home there is talk of the hero who
has gone and of his probable return, she listens in silence, and when
conjectures fly around her as to his identity, she even tries to smile. But in
her heart she knows that her knight—the man whom the people worship—
will never come back. France will send troops and aid and protection anon;
a puissant Prince will enter Cambray mayhap at the head of his troops and
be acclaimed as the saviour of Cambray. She would no doubt in the fullness
of time plight her troth to that man, and the people would be told that this
was indeed the Duc d'Anjou et d'Alençon, who had once before stood upon
the ramparts of Cambray and shouted his defiant cry: 'À moi, citizens; and
let the body of each one of you here be a living rampart for the defence of
your homes!'
But she would know that the man who spoke those inspiring words had
gone from her for ever. Who he was, where he came from, what had
brought him to Cambray under a disguise and an assumed name, she would
perhaps never know. Nor did she care. He was the man she loved: the man
whose passionate ardour had thrilled her to the soul, whose touch had been
as magic, whose voice had been perfect music set in perfect time. He was
the man she loved—her knight. Throughout that day upon the ramparts she
had seen him undaunted, intrepid, unconquered—rallying those who
quaked, cheering those who needed help, regardless of danger, devoted
even unto death. So what cared she what was his name? Whoever he was,
he was worthy of her love.
IV
The second picture which the historian shows us is more dispiriting and
more grim. It is a picture of Cambray in the last days of July. The Spanish
armies have invested the city completely for over eight weeks, and
Cambray has been thrown entirely on her own resources and the activities
of a few bold spirits for the barest necessities of life. Starvation—grim and
unrelenting—is taking her toll of the exhausted population; disease begins
to haunt the abodes of squalor and of misery.
France has promised aid and France still tarries.
Mayhap France has forgotten long ago.
In Cambray now a vast silence reigns—the silence of impending doom.

The streets are deserted during the day, the church bells are silent. Only at
evening, in the gloom, weird and melancholy sounds fill the air, groans and
husky voices, and at times the wild shriek of some demented brain.
Cambray has fought for her liberty; now she is enduring for it—and
enduring it with a fortitude and determination, which is one Of the most
glorious entries in the book of the recording angel. Every morning at dawn
the heralds of the Spanish commander mount the redoubt on the Bapaume
road, and with a loud flourish of brass trumpets they demand in the name of
His Majesty the King of Spain the surrender of the rebel city. And every
day the summons is answered by a grim and defiant silence. After which,
Cambray settles down to another day of suffering.
The city fathers have worked wonders in organization. From the first, the
distribution of accumulated provisions has been systematic and rigidly fair.
But those distributions, from being scanty have become wholly insufficient,
and lives that before flickered feebly, have gone out altogether, while others
continue a mere struggle for existence, which would be degrading were its
object not so sublime.
Cambray will not surrender! She would sooner starve and rot and be
consumed by fire, but with her integrity whole, her courage undoubted, the
honour of her women unsullied. Disease may haunt her streets, famine
knock at every door; but at least while her citizens have one spark of life
left in their bodies, while their emaciated hands have a vestige of power
wherewith to grasp a musket, no Spanish soldier shall defile her pavements,
no Spanish commander work his tyrannical will with her.
Cambray will not surrender! She believes in her defender and her
saviour!—in his words that France will presently come with invincible
might and powerful armies, when all her sufferings will be turned to relief
and to joy. And every evening when lights are put out and darkness settles
down upon the stricken city, wrapping under her beneficent mantle all the
misery, the terrors and the heroism, men and women lay themselves down
to their broken rest with a last murmur of hope, a last invocation to God for
the return of the hero in whom lies their trust.
And in the Town Hall the city fathers sit in Council, with Messire de
Balagny there, and Monseigneur d'Inchy presiding. They, too, appear
grimly resolved to endure and to hold out; the fire of patriotism and of
enthusiasm burns in their hearts, as it does in the heart of every burgher,
noble or churl in the city. But, side by side with enthusiasm, stalks the grim
shadow of prescience—knowledge of the resources which go, diminishing
bit by bit, until the inevitable hour when hands and mouths will still be
stretched out for food and there will be nothing left to give.
Even now, it is less than bare subsistence which can be doled out day by
day; and in more than one face assembled this day around the Council
Board, there is limned the grim line of nascent despair.
It is only d'Inchy who has not lost one particle of his faith, one particle
of self-confidence and of belief in ultimate triumph.
'If ye begin to doubt,' he exclaims with tragic directness, 'how will ye

infuse trust in the hearts of your people?'
The Chief Magistrate shakes his head; the Provosts are silent. More than
one man wipes a surreptitious tear.
'We must give the people something to hearten them,' has been the
persistent call from those in authority.
De Balagny interposes:
'Our spies have succeeded in evading the Spanish lines more than once.
One of them returned yesterday from La Fère. He says the Duc d'Anjou is
wellnigh ready. The next month should see the end of our miseries.'
'A month!' sighs the Chief Magistrate. 'The people cannot hold out
another month. They are on the verge of despair.'
'They begin to murmur,' adds one of the Provosts glumly.
'And some demand that we surrender the city,' concludes de Lalain.
'Surrender the city!' exclaimed d'Inchy vehemently. 'Never!'
'Then can Monseigneur suggest something?' riposts the Chief Magistrate

dryly, 'that will restore confidence to a starving population?'
'The help from France almost within sight,' urges Monseigneur.
The Provosts shrug their shoulders.
'So long delayed,' one of them says. 'The people have ceased to believe
in it.'
'Many declare the Duke is dead,' urges another.
'But ye know better than that, Messires,' retorts d'Inchy sternly.
Again one or two of the older men shrug their shoulders.
'I saw him fall from the ramparts,' asserts one.
'He was struck full in the breast by an arrow,' says another, 'shot by an
unseen hand—some abominable assassin. His Highness gave one turn and
fell into the moat below.'
'And was immediately found and picked up by some of my men,' retorts
de Balagny hotly. 'Mine oath on it! Our spies have seen him—spoken with
him. The Duc d'Anjou is alive and on his way to Cambray. I'd stake on it
the salvation of my soul!'
The others sigh, some of them dubiously, others with renewed hope.
From their talk we gather that not one of them has any doubt in his mind as
to the identity of the brave defender of Cambray. Nothing had in truth
happened to shake their faith in him, and de Balagny had said nothing to
shake that faith. On that fateful day in April they had been convened to
witness the betrothal of Madame Jacqueline de Broyart to Monsieur Duc
d'Anjou, had been presented to His Highness and kissed his hands. Then
suddenly all had been confusion—the panic, the surprise attack, the
runaway soldiers, and finally the one man who rallied every quaking spirit
and defended the city with heart and mind, with counsel and strength of
arm, until he fell by an unseen assassin's hand: he, the Duc d'Anjou, of the
princely House of France—the future Sovereign Lord of a United
Netherlands.
For awhile there is absolute stillness in the Council room. No one

speaks; hardly does any one stir. Only the massive clock over the
monumental hearth ticks out every succeeding second with relentless
monotony. Monseigneur is buried in thought. The others wait, respectfully
silent. Then suddenly d'Inchy looks up and gazes determinedly on the faces
round him.
'Madame Jacqueline must help us,' he says firmly.
'Madame Jacqueline?' the Chief Magistrate exclaims. 'How?'
'On the Place d'Armes—one evening—during the intercession,'

Monseigneur goes on, speaking rapidly and with unhesitating resolve. 'She
will make a solemn declaration before the assembled people—plight her
troth to the Duc d'Anjou, who, though still absent, has sent her a token of
his immediate arrival.'
'Sent her a token?' most of them murmur, astonished. And even de

Balagny frowns in puzzlement.

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A Beginner's Guide to SSD Firmware:

Designing, Optimizing, and Maintaining

A Beginner's Guide to SSD Firmware: Designing,

CompTIA A+ guide to software : managing, maintaining,

Norah Gaughan's Twisted Stitch Sourcebook: A

Continuous Integration (CI) and Continuous Delivery

Beginning R 4: From Beginner to Pro 1st Edition Matt

Mindful Homeschooling: A Beginner’s Guide for Education

Stop. Think. Invest.: A Behavioral Finance Framework

Beginning MATLAB and Simulink: From Beginner to Pro,

Gopi Kuppan Thirumalai

ISBN-13 (pbk): 978-1-4842-9887-9 ISBN-13 (electronic): 978-1-4842-9888-6

Copyright © 2023 by Gopi Kuppan Thirumalai

Chapter 1: Introduction to SSD Firmware���������������������������������������������1

Chapter 2: Understanding the Role of Firmware in SSDs���������������������7

Chapter 3: The History and Evolution of SSD Firmware����������������������11

Chapter 4: Basics of Flash Memory����������������������������������������������������15

Chapter 5: 3D Vertical NAND���������������������������������������������������������������31

Chapter 6: Basic Understanding of NAND Flash Interface������������������51

Chapter 7: Common SSD Firmware Features��������������������������������������93

Strategies to Minimize Performance Degradation���������������������������������������107

Chapter 8: SSD Firmware Design Considerations�����������������������������119

Chapter 9: Flash Translation Layer (FTL)������������������������������������������129

Chapter 10: User Data Flow��������������������������������������������������������������151

Chapter 11: Throttling����������������������������������������������������������������������155

Chapter 12: Exception Handling�������������������������������������������������������163

Chapter 13: Performance������������������������������������������������������������������169

Chapter 14: Debugging���������������������������������������������������������������������181

Chapter 15: Future Developments and Innovations in SSD

Chapter 16: Closing��������������������������������������������������������������������������191

Figure 1-1. Comparison of HDD and SSD

In addition to supporting larger SSDs, modern SSD firmware is also

Figure 1-2. SSD block diagram

This book is a basic resource that covers the fundamental principles

common SSD firmware features, design considerations, and the all-

© Gopi Kuppan Thirumalai 2023 7

The primary role of SSD firmware is to manage the storage, retrieval,

The History and

© Gopi Kuppan Thirumalai 2023 11

Early SSD firmware was focused on ensuring data integrity and

processing them as a single, larger request. This can significantly improve

© Gopi Kuppan Thirumalai 2023 15

Figure 4-1. Memory types

NOR Flash Memory

Characteristics of NOR Flash Memory

• Cost per bit is high.

• Code execution is easy.

• Write speed is slower.

• Read speed is faster.

• Power consumption on standby is low.

NOR Memory Architecture

Figure 4-2. NOR memory architecture

NAND Flash Memory

NAND Memory Architecture

Figure 4-3. NAND memory architecture

NAND memory is a type of flash memory that uses floating-gate

A Flash Memory Cell

Figure 4-4. A flash memory cell

Chapter 1: Introduction to SSD Firmware��1

Chapter 2: Understanding the Role of Firmware in SSDs��7

Chapter 3: The History and Evolution of SSD Firmware��11

Chapter 4: Basics of Flash Memory��15

Chapter 5: 3D Vertical NAND��31

Chapter 6: Basic Understanding of NAND Flash Interface��51

Chapter 7: Common SSD Firmware Features��93

Strategies to Minimize Performance Degradation��107

Chapter 8: SSD Firmware Design Considerations��119

Chapter 9: Flash Translation Layer (FTL)��129

Chapter 10: User Data Flow��151

Chapter 11: Throttling��155

Chapter 12: Exception Handling��163

Chapter 13: Performance��169

Chapter 14: Debugging��181

Chapter 16: Closing��191

NOR Flash Memory

Characteristics of NOR Flash Memory

NOR Memory Architecture

NAND Flash Memory

NAND Memory Architecture

A Flash Memory Cell

NAND Memory Organization

Program/Erase Cycle (P/E Cycle)

Evolution of 3D Vertical NAND Technology

nlocking New Possibilities with Vertical