Computer Architecture and

Organization

• Course Code: BCSE205L

• Course Type: Theory (ETH)
• Slot: D2+TD2
• Timings:

Monday 16:00-16:50
Wednesday 17:00-17:50
Thursday 14:00-14:50
Dr. Venkata Phanikrishna B, SCOPE, VIT-Vellore
RISC and CISC

Dr. Venkata Phanikrishna B, SCOPE, VIT-Vellore

 RISC and CISC
• The important aspect of computer architecture is that the design of instruction set for the processor.
• Depending on the type of instructions we can divide computers into two types.
• Reduced Instruction Set Computer (RISC)
• Complex Instruction Set Computer (CISC)
 RISC: The main idea behind this is to make hardware simpler by using an instruction set
composed of a few basic steps for loading, evaluating, and storing operations just like a load
command will load data, a store command will store the data.

 CISC: The main idea is that a single instruction will do all loading, evaluating, and storing
operations just like a multiplication command will do stuff like loading data, evaluating, and
storing it, hence it’s complex.
Both approaches try to increase the CPU performance
Note:
 RISC: Reduce the cycles per instruction at the cost of the number of instructions per program.
 CISC: Minimize the number of instructions per program but at the cost of an increase in the number of cycles per
instruction.
Dr. Venkata Phanikrishna B, SCOPE, VIT-Vellore
 RISC and CISC
CISC: Is to attempt to provide a single machine cycle instruction for each statement that is written in
machine language
• Examples:
• IBM 370 computer
• Digital Equipment Corporation VAX computer.

RISC: Is an architecture that utilizes a small, highly-optimized set of instructions

• Characteristic
• One cycle execution time
• Pipelining
• large number of registers
• Examples
• The IBM 801,
• Stanford MIPS, and
• Berkeley RISC 1 and 2

Dr. Venkata Phanikrishna B, SCOPE, VIT-Vellore

 CISC
Emphasis on software
Includes multi-clock complex instructions
A large number of instructions
CISC processors have a more extensive set of
instructions, including complex operations that can
perform multiple tasks in a single instruction. While
this can simplify programming, it may also lead to
longer execution times for individual instructions.
Some instructions that perform specialised tasks and
are used infrequently.
• x86 processors (e.g., Intel Core series, AMD
(Advanced Micro Devices) Ryzen series)
• Motorola 68k processors
• VAX processors
Small code sizes,
high cycles per second
Transistors used for storing complex instructions
Dr. Venkata Phanikrishna B, SCOPE, VIT-Vellore
RISC
Emphasis on Hardware
Single-clock, reduced instruction only
Relatively few instructions
RISC processors streamline the instruction set to execute
instructions in a single clock cycle, aiming for high
performance and efficiency. By reducing the complexity
of instructions, RISC architectures can achieve better
pipelining, making them well-suited for certain types of
tasks.
Relatively few addressing modes
• ARM (Advanced RISC Machine) processors (e.g.,
ARM Cortex-A series)
• MIPS (Million instructions per second) processors
• PowerPC processors
Low cycles per second,
large code sizes
Spends more transistors on memory registers
Dr. Venkata Phanikrishna B, SCOPE, VIT-Vellore