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FRACTIONAL-ORDER
DESIGN: DEVICES,
CIRCUITS AND SYSTEMS
FRACTIONAL-ORDER
DESIGN: DEVICES,
CIRCUITS, AND
SYSTEMS
Edited by
AHMED G. RADWAN
Engineering Mathematics and Physics Department
Cairo University, Giza, Egypt
School of Engineering and Applied Sciences
Nile University, Giza, Egypt
FAROOQ AHMAD KHANDAY

Department of Electronics and Instrumentation Technology
University of Kashmir, Srinagar, India
LOBNA A. SAID
Nanoelectronics Integrated Systems Center (NISC)
Nile University, Giza, Egypt
Series editor
QUAN MIN ZHU

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Publisher: Mara Conner

Acquisitions Editor: Sonnini R. Yura
Editorial Project Manager: Charlotte Rowley
Production Project Manager: Kamesh Ramajogi
Designer: Matthew Limbert
Typeset by VTeX
Contents
List of contributors xi
1. MOS realizations of fractional-order elements 1

Stavroula Kapoulea, Panagiotis Bertsias, Costas Psychalinos, and
Ahmed S. Elwakil
1.1. Introduction 1
1.2. CPE/FI emulation techniques 7
1.3. Practical aspects 16
1.4. Conclusions and discussion 29
Acknowledgment 30
References 30
2. A chaotic system with equilibria located on a line and its

fractional-order form 35
Karthikeyan Rajagopal, Fahimeh Nazarimehr, Alireza Bahramian, and
Sajad Jafari
2.1. Introduction 35
2.2. Model of the proposed flow and its dynamics 39
2.3. Fractional-order form 42
2.4. Circuit implementation 50
2.5. FPGA implementation of the chaotic system 50
2.6. Conclusion 52
References 55
3. Approximation of fractional-order elements for sinusoidal

oscillators 63
Shalabh K. Mishra, Dharmendra K. Upadhyay, and Maneesha Gupta
3.2. R-C network-based FDs 67
3.3. FDs for sinusoidal oscillators 71
3.4. Performance analysis 75
3.5. Conclusion and scope of future research 83
References 84
4. Synchronization between fractional chaotic maps with different

dimensions 89
Adel Ouannas, Amina-Aicha Khennaoui, Iqbal M. Batiha, and
Viet-Thanh Pham
v
vi Contents
4.2. Preliminaries 91
4.3. Combined synchronization of 2D fractional maps 93
4.4. Combined synchronization of 3D fractional maps 103
4.5. Concluding remarks and future works 111
Acknowledgments 111
References 115
5. Stabilization of different dimensional fractional chaotic maps 123

Adel Ouannas, Amina-Aicha Khennaoui, Iqbal M. Batiha, and
Viet-Thanh Pham
5.2. Basic tools 125
5.3. Stabilization of 2D fractional maps 129
5.4. Stabilization of 3D fractional maps 134
5.5. Summary and future works 145
Acknowledgments 146
References 149
6. Observability of speed DC motor with self-tuning fuzzy-

fractional-order controller 157
Arezki Fekik, Mohamed Lamine Hamida, Hamza Houassine, Hakim Denoun,
Sundarapandian Vaidyanathan, Nacera Yassa, Ahmed G. Radwan, and
Lobna A. Said
6.2. Mathematical model of DC motor 159
6.3. Stability of speed estimation 162
6.4. Proposed speed controller 162
6.5. Results and discussion 170
6.6. Conclusions 175
References 176
7. Chaos control and fractional inverse matrix projective difference

synchronization on parallel chaotic systems with application 181
Pushali Trikha, Lone Seth Jahanzaib, and Ayub Khan
7.2. Preliminaries 184
7.3. The fractional inverse matrix projective difference synchronization 185
7.4. Illustration in secure communication 200
References 204
Contents vii
8. Aggregation of chaotic signal with proportional fractional

derivative execution in communication and circuit simulation 207
Najeeb Alam Khan, Saeed Akbar, Muhammad Ali Qureshi, and
Tooba Hameed

8.2. Fractional-order chaotic systems and their properties 209
8.3. Analog circuit imitation 216
8.4. Security analysis 219
8.5. Conclusion 231
References 232
9. CNT-based fractors in all four quadrants: design, simulation, and

practical applications 235
Avishek Adhikary
9.2. Fractor: definitions and state-of-the-art 238
9.3. A wide-CPZ, long-life, packaged CNT fractor 241
9.4. Fractors with desired specifications 252
9.5. Four-quadrant FO immittances using CNT fractors 259
9.6. Application of four-quadrant CNT fractors 265
9.7. Conclusion 269
Appendix 9.A MATLAB program to determine RC ladder parameters for five
FO specifications 269
Acknowledgments 271
References 271
10. Fractional-order systems in biological applications: estimating

causal relations in a system with inner connectivity using
fractional moments 275
Zahra Tabanfar, Farnaz Ghassemi, Alireza Bahramian, Ali Nouri,
Ensieh Ghaffari Shad, and Sajad Jafari
10.2. Related work 277
10.3. Fractional moments and fractional cumulants 281
10.4. Hindmarsh–Rose model 286
10.5. Estimating causal relations 287
10.6. Causal direction pattern recognition 290
10.7. Discussion 293
10.8. Conclusion 296
References 296
viii Contents
11. Unitary fractional-order derivative operators for quantum

computation 301
Baris Baykant Alagoz and Serkan Alagoz
11.2. A brief survey on geometric phase concepts in quantum computation 303
11.3. Methodology 306
11.4. Some quantum computation implications for unitary fractional-order
derivative operators 317
11.5. Discussion and conclusions 329
Appendix 11.A 330
References 334
12. Analysis and realization of fractional step filters of order (1 + α) 337

Gagandeep Kaur, A.Q. Ansari, and M.S. Hashmi
12.2. Analysis of fractional step filters 340
12.3. Numerical analysis and simulations of FSFs of order (1 + α) 353
12.4. Stability 363
12.5. Sensitivity analysis 365
References 369
13. Fractional-order identification and synthesis of equivalent

circuit for electrochemical system based on pulse voltammetry 373
Sanjeev Kumar and Arunangshu Ghosh
13.2. Experimental setup 376
13.3. Fractional-order models 378
13.4. Identification of fractional-order transfer function 381
13.5. Proposed circuit with fractional-order elements 391
13.6. Principal component analysis: towards electronic tongue application 396
References 399
14. Higher-order fractional elements: realizations and applications 403

Neeta Pandey, Rajeshwari Pandey, and Rakesh Verma
14.2. Realization of FOEs with fractional order < 1 404
14.3. Realization of fractional-order element with 1 < fractional order < n 412
14.4. Application 416
References 432
Contents ix
15. Fabrication of polymer nanocomposite-based fractional-order

capacitor: a guide 437
Zaid Mohammad Shah, Farooq Ahmad Khanday, Gul Faroz Ahmad Malik,
and Zahoor Ahmad Jhat
15.2. Polymers 445
15.3. Ferroelectric polymers 447
15.4. Conductive fillers 457
15.5. Methods of synthesis 461
15.6. Percolation threshold 466
15.7. Factors affecting properties of polymer NCs 467
15.8. A GNS/PVDF FOC 470
Acknowledgments 478
References 478
16. Design guidelines for fabrication of MWCNT-polymer based

solid-state fractional capacitor 485
Dina Anna John and Karabi Biswas
16.2. Solid-state fractional capacitors 490
16.3. Batch analysis of the solid-state fractional capacitors for defining the
guidelines 494
16.4. Validation of the defined guidelines 500
16.5. Material characterization 502
16.6. Correlating the material characterization with the CPA of a solid-state
fractional capacitor 508
Acknowledgments 516
References 516
Index 523
This page intentionally left blank
List of contributors
Avishek Adhikary
Indian Institute of Technology, Bhilai, Department of Electrical Engineering and
Computer Science, Raipur, India
Saeed Akbar
Department of Mathematics, University of Karachi, Karachi, Pakistan
Baris Baykant Alagoz
Inonu University, Department of Computer Engineering, Malatya, Turkey
Serkan Alagoz
Inonu University, Department of Physics, Malatya, Turkey
A.Q. Ansari
Department of Electrical Engineering, Jamia Millia Islamia, New Delhi, India
Alireza Bahramian
Department of Biomedical Engineering, Amirkabir University of Technology, Tehran, Iran
Iqbal M. Batiha
Department of Mathematics, Faculty of Science, The University of Jordan, Amman, Jordan
Panagiotis Bertsias
University of Patras, Department of Physics, Electronics Laboratory, Patras, Greece
Karabi Biswas
Department of Electrical Engineering, Indian Institute of Technology Kharagpur,
West Bengal, India
Hakim Denoun
Laboratory of Advanced Technologies of Electrical Engineering (LATAGE), Mouloud
Mammeri University Tizi-Ouzou, Tizi-Ouzou, Algeria
Ahmed S. Elwakil
University of Sharjah, Department of Electrical and Computer Engineering, Sharjah,
United Arab Emirates
Nile University, Nanoelectronics Integrated Systems Center (NISC), Giza, Egypt
University of Calgary, Department of Electrical and Computer Engineering, Calgary, AB,
Canada
Arezki Fekik
Electrical Engineering Department, Akli Mohand Oulhadj University-Bouira, Bouira,
Algeria
Farnaz Ghassemi
xi
xii List of contributors
Arunangshu Ghosh
Department of Electrical Engineering, National Institute of Technology Patna, Patna,
Bihar, India
Maneesha Gupta
Department of Electronics and Communication Engineering, Netaji Subhas University of
Technology, New Delhi, India
Tooba Hameed
Mohamed Lamine Hamida

M.S. Hashmi
Deptartment of Electronics and Communication Engineering, IIIT Delhi, New Delhi,
India
Hamza Houassine
Algeria
Sajad Jafari
Health Technology Research Institute, Amirkabir University of Technology, Tehran, Iran
Lone Seth Jahanzaib

Jamia Millia Islamia, Department of Mathematics, New Delhi, Delhi, India
Zahoor Ahmad Jhat

Islamia College of Science and Commerce, Hawal Srinagar, JK, India
Dina Anna John

Department of Electrical Engineering, Indian Institute of Technology Kharagpur,
West Bengal, India
Stavroula Kapoulea
Gagandeep Kaur
Department of Electrical Engineering, Jamia Millia Islamia, New Delhi, India
Ayub Khan
Najeeb Alam Khan

Farooq Ahmad Khanday

Department of Electronics and Instrumentation Technology, University of Kashmir,
Srinagar, JK, India
List of contributors xiii
Amina-Aicha Khennaoui
Laboratory of Dynamical Systems and Control, University of Larbi Ben M’hidi,
Oum El Bouaghi, Algeria
Sanjeev Kumar
Department of Electrical Engineering, School of Engineering & Technology, Sandip
University, Madhubani, Bihar, India
Gul Faroz Ahmad Malik
Srinagar, JK, India
Shalabh K. Mishra
Department of Electronics and Communication Engineering, ABES Engineering College,
Ghaziabad, Uttar Pradesh, India
Fahimeh Nazarimehr
Ali Nouri
Adel Ouannas
Department of Mathematics and Computer Science, University of Larbi Ben M’hidi,
Oum El Bouaghi, Algeria
Neeta Pandey
Department of Electronics and Communication Engineering, Delhi Technological
University, Delhi, India
Rajeshwari Pandey
Viet-Thanh Pham
Nonlinear Systems and Applications, Faculty of Electrical and Electronics Engineering,
Ton Duc Thang University, Ho Chi Minh City, Viet Nam
Costas Psychalinos
Muhammad Ali Qureshi
Department of Physics, University of Karachi, Karachi, Pakistan
Ahmed G. Radwan
Engineering Mathematics and Physics Department, Cairo University, Cairo, Egypt
Nanoelectronics Integrated Systems Center (NISC), Nile University, Giza, Egypt
Karthikeyan Rajagopal
Centre for Nonlinear Systems, Chennai Institute of Technology, Chennai, India
Lobna A. Said
Nanoelectronics Integrated Systems Center (NISC), Nile University, Giza, Egypt
xiv List of contributors
Ensieh Ghaffari Shad

Ayatollah Kashani Hospital, Tehran University of Medical Sciences, Tehran, Iran
Zaid Mohammad Shah
Srinagar, JK, India
Zahra Tabanfar
Pushali Trikha
Dharmendra K. Upadhyay
Department of Electronics and Communication Engineering, Netaji Subhas University of
Technology, New Delhi, India
Sundarapandian Vaidyanathan
Research and Development Centre, Vel Tech University, Chennai, India
Rakesh Verma
Nacera Yassa
Algeria
CHAPTER ONE
MOS realizations of
fractional-order elements
Stavroula Kapouleaa , Panagiotis Bertsiasa , Costas Psychalinosa , and
Ahmed S. Elwakilb,c,d
a University of Patras, Department of Physics, Electronics Laboratory, Patras, Greece
b University of Sharjah, Department of Electrical and Computer Engineering, Sharjah,
United Arab Emirates
c Nile University, Nanoelectronics Integrated Systems Center (NISC), Giza, Egypt
d University of Calgary, Department of Electrical and Computer Engineering, Calgary, AB, Canada
1.1. Introduction
Fractional-order (FO) elements are fundamental building blocks in
the application of fractional calculus on circuit-level realizations. Includ-
ing FO capacitors, known also in the literature as constant phase elements
(CPEs), and FO inductors (FIs), these elements are very useful tools in
numerous scientific fields, such as filtering, oscillator design, bio-medicine,
and control theory [31,33,34]. An integer-order (IO) system can be directly
converted into an FO system by just substituting the IO capacitors/induc-
tors with the corresponding FO counterparts. The parameters of the CPEs
and the FIs can offer a more precise control of the system characteristics,
due to the extra degree of freedom offered by the (fractional) order. This
originates from the fact that the identity of a CPE is determined by two
parameters, the order and the pseudocapacitance {α, Cα }. The characteristic
frequency-domain impedance of the element is described by
1
ZCPE (s) = , (1.1)
C α · sα
where the order α ∈ (0, 1), Cα has units of Farad/sec 1−α , and s is the Lapla-
cian operator.
The relationship between the pseudocapacitance in Farad/sec 1−α and the
conventional capacitance C in Farad, at a specific frequency ω, is given by
Cα
C= . (1.2)
ω1−α
Fractional-Order Design: Devices, Circuits, and Systems Copyright © 2022 Elsevier Inc. 1
https://doi.org/10.1016/B978-0-32-390090-4.00006-8 All rights reserved.
2 Stavroula Kapoulea et al.
Similarly, the corresponding equations in the case of an FI are given by
ZFI (s) = Lβ · sβ , (1.3)
Lβ
L= , (1.4)
ω1−β
with the order β ∈ (0, 1), the pseudoinductance Lβ in Henry/sec 1−β , and the
conventional inductance L in Henry. Therefore, the capacitance/inductance
of the elements is a frequency-dependent parameter.
The implementation of FO elements is of particular scientific inter-
est, but it is still an ongoing project [2,15,26]. As there is no commercial
production of such type of elements, the development of emulators that
efficiently approximate their behavior is a research field with practical util-
ity in a wide variety of applications [4,23–25,28,36,40]. The realization of
CPEs/FIs is performed using proper approximation methods (i.e., contin-
ued fraction expansion [CFE], partial fraction expansion [PFE], Oustaloup,
Matsuda, Carlson, Valsa, etc.) and appropriately configured structures (i.e.,
RC networks, multifeedback configurations, current-mode topologies,
etc.) [5,10,11,27,30,44]. The utilized elements, in order to construct the
emulator, can be exclusively passive elements (i.e., resistors, capacitors) or
a combination of passive and active elements (e.g., operational amplifiers
[Op-Amps], second-generation current conveyors [CCIIs], current feed-
back operational amplifiers [CFOAs], operational transconductance am-
plifiers [OTAs]), depending on the desired characteristics that must be
achieved [12,13,39,41–43].
The approximation methods, mentioned above, focus on the approxi-
mation of the operator (τ s)α,β around a center frequency ω0 , leading to a
rational nth-order function of the form
An sn + An−1 sn−1 + . . . + A1 s + A0
(τ s)α,β , (1.5)
sn + Bn−1 sn−1 + . . . + B1 s + B0
with τ being a time constant related to the center frequency as τ =

1/ω0 , n being the order of approximation, and Ai (i = 0, 1, ...n), Bi (i =
0, 1, ...n − 1) being real, positive coefficients.
Expressing the impedance functions in (1.1) and (1.3) in the form
of (1.6a) and (1.6c), respectively, and then substituting the operator (τ s)α,β
with the expression in (1.5), the derived approximated impedance functions
MOS realizations of fractional-order elements 3
of a CPE and an FI are given by (1.6b) and (1.6d). We have

τα 1
ZCPE (s) = · , (1.6a)
Cα (τ s)α

τα sn + Bn−1 sn−1 + . . . + B1 s + B0
ZCPE,approx (s) = · , (1.6b)
Cα An sn + An−1 sn−1 + . . . + A1 s + A0

Lβ
ZFI (s) = · (τ s)β , (1.6c)
τβ

Lβ An sn + An−1 sn−1 + . . . + A1 s + A0
ZFI ,approx (s) = · . (1.6d)
τβ sn + Bn−1 sn−1 + . . . + B1 s + B0
A simple and direct way to implement the impedance function in (1.6b) is
to use Foster or Cauer RC networks, constructed by conventional passive
resistors and capacitors [10,14]. The configurations of Type-I and Type-II
Foster networks are demonstrated in Fig. 1.1, while the corresponding
structures of Type-I and Type-II Cauer networks are demonstrated in
Fig. 1.2 [19,37].
Figure 1.1 Foster types of RC networks for CPE emulation.
Figure 1.2 Cauer types of RC networks for CPE emulation.
For the Foster networks the PFE tool is applied on (1.6b), leading to
the form of (1.7a) for the impedance expression and to the form of (1.7b)
for the admittance expression. We have

n
ri
ZCPE,PFE (s) = k + , (1.7a)
i=1
s − pi
YCPE,PFE (s) k ri ri · s
n n
= + ⇒ YF −II (s) = k + . (1.7b)
s s i=1 s − pi i=1
s − pi
The coefficients ri and pi (i = 1, ...n) are the residues and poles of (1.6b) and
k is a constant term.
Considering these functions and the configurations in Fig. 1.1, the ex-
pressions for the impedance of Type-I Foster and the admittance of Type-II
Foster networks are given by (1.8a) and (1.8b), respectively:

n 1
Ci
ZF −I (s) = R0 + , (1.8a)
i=1
s + Ri1Ci
1 Ri · s
n 1
YF −II (s) = + . (1.8b)
R0 i=1 s + Ri1Ci
In the case of Cauer networks, the CFE tool is used to decompose the
approximated impedance function in (1.6b). One option is to arrange the
powers of the variable s in the numerator and the denominator of (1.6b)
starting from the highest to the lowest power. The derived, decomposed
impedance function in this case has the following form:
1
ZCPE,CFE (s) = q0 + (1.9)
1
q1 s +
1
q2 +
1
q3 s +
.................
1
,
1
q2n−1 s +
q2n
where qi (i = 0, ...2n) are the coefficients of the CFE. Another form can be
obtained by rewriting the polynomials in (1.6b) in the form of the lowest
to the highest power of the variable s and, then, divide the impedance
function in (1.6b) by s. The derived function is expressed as
ZCPE,CFE (s) 1
=
s 1
q0 s +
1
q1 +
1
q2 s +
.................
1
q2n−1 + q2n s
⇓ (1.10)
1
ZCPE,CFE (s) =
1
q0 +
q1 1
s +
1
q2 +
.................
1
q2n−1 .
s + q2n
Considering the form in (1.9) for the case of the Type-I Cauer network and
the form in (1.10) for the case of the Type-II Cauer network, the derived
expressions for the impedance of the configurations in Fig. 1.2 are given
by
1
ZC−I (s) = R0 + (1.11)
1
C1 s +
1
R2 +
1
C3 s +
.................
1
,
1
C2n−1 s +
R2n
1
ZC−II (s) = (1.12)
1
1
R0 +
1
1
C1 s +
1
1
R2 +
.................
1
.
1
C2n−1 s + R2n
The design equations for calculating the values of resistors and capacitors
for both types of each network are summarized in Table 1.1.
Table 1.1 Design equations for calculating resistor and capacitor values of the Foster
and Cauer networks in Fig. 1.1 and Fig. 1.2.
Foster Cauer
Element Type I Type II Element Type I Type II
R0 k 1 R0 q0 1
k q0
Ri (i = 1, 2, ...n) ri 1 Ri (i = 0, 2, ...2n) qi 1
pi ri qi

Ci (i = 1, 2, ...n) 1 ri Cj j = 1, 3, ...2n − 1 qj 1
ri pi qj
An important remark that should be made concerns the behavior of the

networks on the frequency limits, i.e., at very low (s → 0) and very high
(s → ∞) frequencies. Specifically, the Type-I Foster and Cauer RC net-
works follow the same conditions, as their impedance at very low frequen-
cies is equal to the series connection of the network resistors ( ZF −I |s→0 =
R0 + R1 ... + Rn and ZC−I |s→0 = R0 + R2 ... + R2n ) and at very high fre-
quencies equal to the resistor R0 ( ZF −I |s→∞ = ZC−I |s→∞ = R0 ). A similar
behavior is also observed for the Type-II Foster and Cauer RC networks
with the impedance at very low frequencies being equal to the resistor R0
( ZF −II |s→∞ = ZC−II |s→∞ = R0 ) and at very high frequencies equal to the
parallel connection of the network resistors ( ZF −II |s→∞ = R0 //R1 ...//Rn
and ZC−II |s→∞ = R0 //R2 ...//R2n ).
For the FI emulation the above networks are also used, combined with
a generalized impedance converter [GIC] in order to achieve inductive
behavior [1,32,35].
This technique is the best option in the case of a CPE or FI with a
priori specified characteristics {α, Cα }, {β, Lβ }, in the sense that there is
no requirement for tunability. But a general CPE/FI emulator, capable of
implementing different cases of order and pseudocapacitance/inductance,
cannot be realized using RC networks that have fixed values of passive

elements and, consequently, there is no ability of specifications tuning. This
results from the fact that the whole network must be redesigned in order
to meet the new specifications.
1.2. CPE/FI emulation techniques

1.2.1 CPE/FI emulation using electronically controlled RC
networks
The RC networks in Fig. 1.1 and Fig. 1.2 could acquire the advantage
of electronic control of their characteristics just by substituting the passive
resistors with active elements that express resistance behavior [18]. Con-
sidering, for instance, the Type-I Foster network and the design equations
given in Table 1.1, and assuming that the values of resistance are variable
by a factor x (i.e., R0 → x · R0 and Ri → x · Ri (i = 1, 2, ...n)), the obtained
impedance function is given by

n 1
= x1−α · ZF −I (s) ,
Ri Ci
ZF −I ,var (s) = x · R0 + Ri (1.13)
i=1
x · s + Ri1Ci
with the intermediate pole frequencies described as ω0,i = 1/(Ri Ci ).

The corresponding expressions for the impedance/admittance of the
other types of networks can also be formed following the same procedure.
Using this concept, the values of pseudocapacitance and center fre-
quency of the CPE emulator are adjusted as described in (1.14a) and (1.14b),
respectively:
Cα
Cα,var = , (1.14a)
x1−α
ω0
ω0,var =
. (1.14b)
x
So, the adjustment of the resistances of the network by a factor x induces
adjustment of the impedance, pseudocapacitance, and center frequency of
the emulator.
The multiple-output OTA is an efficient option for the implementation
of a floating resistor with variable resistance, due to the transconductance
parameter (gm ), which is related to the resistance as gm = 1/R and is con-
trolled by a DC voltage or current. Connecting the inputs and outputs of
the OTA as demonstrated in Fig. 1.3, this configuration can directly re-
place the passive resistors of the networks in Fig. 1.1 and Fig. 1.2 and form
electronically controlled OTA-C networks.
Figure 1.3 Circuit implementation and symbol representation of a multiple-output

OTA-based floating resistor.
A possible implementation of the OTA is given by the circuit in Fig. 1.3,

which offers the advantage of enhanced linearity. For operation in the sub-
threshold region, the expression of the transconductance for this OTA is
given by
5 IB
gm = · , (1.15)
9 n · VT
with IB being the bias current of the OTA, n ∈ (1, 2) the MOS transistor
subthreshold slope factor, and VT = 26 mV @ 27°C the thermal voltage.
This expression showcases the linear relationship between the transconduc-
tance gm and the bias current IB , leading to the fact that the value of gm , and,
as a result, the value of the resistance R = 1/gm , can be adjusted through IB ,
offering in this way the advantage of electronic control of the emulator
characteristics [18].
Using the Cadence IC design suite and the Design Kit AMS 0.35 µm
process, indicative aspect ratios (W /L ) for the multiple-output OTA in
Fig. 1.3 are given in Table 1.2, with the power supply voltages being equal
to VDD = −VSS = 0.75 V . Considering the case of a CPE with {α, Cα } =
{0.5, 300 pF /sec 0.5 } approximated applying the second-order CFE tool on a
Type-II Foster network around f0 = 100 Hz, the values of resistances, along
with the corresponding values of bias currents, and also the capacitances are
summarized in Table 1.3. The layout design of the circuit is demonstrated
in Fig. 1.4, with the active core of the OTA-based resistors being framed
by the red rectangle (mid gray in print version) and the passive capacitors
being represented by the yellow squares (light gray in print version).
Table 1.2 Aspect ratios of the MOS transistors

in Fig. 1.3 for emulating a CPE using the electron-
ically controlled OTA-C Type-II Foster network.
Transistors (W/L) (μm/μm)
Mb1–Mb3 20/10
Mb4–Mb7 1/10
Mn1 & Mn4 25/1
Mn2 & Mn3 5/1
Mp1–Mp6 0.5/12
Table 1.3 Values of resistances, bias cur-

rents, and capacitances for emulating CPE
with {α, Cα } = {0.5, 300 pF /s0.5 } around
f0 = 100 Hz using second-order CFE approxima-
tion on an OTA-C Type-II Foster network.
Element Element value
R0 / I0 664.9 M / 84.5 pA
R1 / I1 31.7 M / 1.8 nA
R2 / I2 217.6 M / 258.1 pA
C1 5.3 pF
C2 13.9 pF
The obtained impedance magnitude and phase frequency responses

within a range f = [1, 10 k] Hz, for different values of factor x, are presented
in Fig. 1.5. The x = 1 case corresponds to the initial condition, while for
x = 0.1 the capacitance of the emulator is scaled to 948.7 pF /sec 0.5 and the
center frequency to 1 kHz, while for x = 10 the corresponding values are
94.9 pF /sec 0.5 and 10 Hz.
Figure 1.4 Layout design of the Type-II Foster impedance emulator (dimensions:
252.55 μm × 102.6 μm). The area included within the red frame (mid gray in print ver-
sion) is occupied by OTAs configured as resistors, while the remaining area corresponds
to the capacitors [18].
Figure 1.5 Postlayout simulation results of the impedance magnitude and phase fre-
quency responses in the case of CPE {α, Cα } = {0.5, 300 pF /sec0.5 } for x = 0.1, 1, 10.
1.2.2 CPE/FI emulation using fractional-order

integrators/differentiators
Full electronic control of the specifications of a CPE/FI emulator can
be achieved exploiting the advantages of an FO integrator/differentiator
[6,9,38]. The transfer function that describes the behavior of this element
is given by
HFO (s) = (τ s)q , (1.16)
with τ being a time constant related to the unity-gain frequency as τ =
1/ω0 and q ∈ (−1, 1) being the order of the FO integrator/differentiator.
When q spans the range of (−1, 0), the function in (1.16) represents an FO
integrator, while in the case that the value of q is within the range of (0, 1),
it corresponds to an FO differentiator.
The cascade connection of this FO stage with a voltage-to-current
(V/I) converter, as demonstrated in the functional block diagram (FBD)
of Fig. 1.6, forms an emulator with controllable type (CPE or FI), order
(α or β ), and center frequency (ω0 ).
Figure 1.6 FBD of CPE/FI emulator using FO integrator/differentiator.
The impedance of the emulator is described by

υ1 − υ2 1
ZCPE/FI (s) = = , (1.17)
i gm,V /I · (τ s)q
with gm,V /I being the transconductance of the V/I converter. An important

point here is that the impedance at the unity-gain frequency ω0 is equal to
Z (ω0 ) = 1/gm,V /I and, thus, depends only on the V/I converter transcon-
ductance.
The desired emulator type (i.e., CPE or FI) is obtained through the
appropriate selection of the type of the FO stage. In particular, if the em-
ulator is intended to operate as CPE of order α ∈ (0, 1), then the FO part
has to be a differentiator with order q = α . Correspondingly, for the emu-
lation of an FI of order β ∈ (0, 1), the FO part has to be an integrator of
order q = −β . Considering the functions in (1.1), (1.3), and (1.17), the ex-
pressions for the pseudocapacitance/inductance of the emulator are given
by (1.18a) and (1.18b), where the dependence of both parameters on the

transconductance gm,V /I is obvious. We have
Cα = gm,V /I · τ α , (1.18a)
τβ
Lβ = . (1.18b)
gm,V /I
The main task in the realization of the emulator in Fig. 1.6 is to implement
the FO stage using a common structure capable of realizing both integrators
and differentiators. Starting from the approximation of the transfer function
in (1.16) and applying one of the approximation tools mentioned in the in-
troduction, the obtained nth-order approximated function has the form
of (1.5). The construction of this function can be performed using mul-
tifeedback structures (i.e., follow-the-leader-feedback [FLF] and inverse-
follow-the-leader-feedback [IFLF]) presented in FBD form in Fig. 1.7 and
Fig. 1.8, respectively.
Figure 1.7 Functional block diagram of an FLF-based structure.
Figure 1.8 Functional block diagram of an IFLF-based structure.
The expression that describes the FLF and IFLF diagrams is given by
Kn s n + K n −1
τ1
sn−1 + .. + K0
τ1 ·τ2 ...τn
H(I )FLF (s) = , (1.19)
sn + 1
τ1
sn−1 + .. + 1
τ1 ·τ2 ...τn
with τi (i = 1, 2, ...n) being the time constants and Kj (j = 0, 1, ...n) the scal-
ing factors. The calculation of these parameters is performed through the
equation between the corresponding coefficients of the functions in (1.5)
and (1.19), leading to the following design equations: τi = Bn−(i−1) /Bn−i and
Kj = Aj /Bj , with Bn = 1.
The multifeedback structure is an efficient option in the case that
the utilized active elements have differential input. Such elements are the
single-output OTAs in Fig. 1.9, which can be implemented using the
MOS transistor-based circuit demonstrated in the same figure. Consider-
ing operation in the subthreshold region and using (1.15), the realized time
constants are calculated as
Ci 9nVT Ci
τi = = (i = 1, 2, ...n) , (1.20)
gmi 5IBi
while the scaling factors Kj (j = 0, 1, ...n) are formed through the appro-
priate selection of the transconductances gmj , which are controlled by the
bias currents IBj as described by (1.15). The V/I converter of the emula-
tor can be implemented using the multiple-output OTA in Fig. 1.3 with
transconductance gm,V /I controlled by the corresponding bias current IB,V /I
as described in (1.15).
Figure 1.9 Circuit implementation and symbol representation of the single-output OTA
utilized to construct the FBD of the FLF and IFLF structures in Fig. 1.7 and Fig. 1.8.
Another option is to use a PFE-based structure, whose FBD is demon-

strated in Fig. 1.10 [8]. The description of this configuration type is based
on the decomposition of the expression in (1.5) through PFE as a sum
of first-order low-pass filter transfer functions and a constant term. The
derived expression is given by
K1 K2 Kn
HPFE (s) = K0 + + + ... + . (1.21)
τ1 s + 1 τ2 s + 1 τn s + 1

The design

equations here are the following: K0 = An , τi = 1/ pi , and

Ki = ri / pi , with ri , pi being the residues and poles of the function in (1.5).
Figure 1.10 Functional block diagram of the partial fraction expansion-based struc-
ture.
Considering the transfer function in (1.21), the main operation in the

PFE concept is the addition. Therefore, current-mode topologies are effi-
cient tools in the implementation of the FBD in Fig. 1.10 [7]. Each of the
first-order transfer functions can be implemented using the simple current-
mirror-based circuitry in Fig. 1.11, which offers low complexity and a
small number of transistors, but suffers from electronic control of the scal-
ing factor K. In order to overcome this difficulty, the circuit based on the
log-domain technique, also presented in Fig. 1.11, can be utilized. In this
case the scaling factor K is controlled through the bias current IB , while
the same also holds for the time constant, which, for operation in the sub-
threshold region, is calculated by
nVT C
τ= . (1.22)
IB
The realization of the V/I converter can be performed using the cir-
cuit in Fig. 1.12, with the realized transconductance calculated as gm,V /I =
IB,V /I /(nVT ).
Figure 1.11 Current-mirror and log-domain technique-based MOS realizations for the
implementation of the first-order transfer functions (lossy integrators) of the FBD in
Fig. 1.10.
Figure 1.12 Current-mode circuit implementation of a V/I converter stage.
The main derivations from all the above are the following:
1. The type (CPE or FI) and the order (α or β ) of the emulator are de-
termined by the type and the order (differentiator q = α or integrator
q = −β ) of the FO stage.
2. The center frequency ω0 = 2π f0 is controlled by the FO stage’s bias
currents.
3. The pseudocapacitance/inductance (Cα or Lβ ) of the emulator can be
controlled through the transconductance gm,V /I of the V/I converter
stage.
As a result, the type, the order, the pseudocapacitance/inductance, and the
center frequency are electronically controlled through appropriate tuning
of the bias currents of the system.
1.3. Practical aspects

The FO integrator/differentiator-based CPE/FI emulation tech-
nique, discussed in the previous section, is a general concept that offers
full electronic control and, thus, can configure a universal emulator usable
in a variety of applications. Though, there are some practical aspects, the
addressing of which can achieve further improvements.
1.3.1 Time constants and scaling factors spread reduction

The spread of a variable is defined as the ratio of the maximum value to its
minimum value. In the case of an FO integrator/differentiator, spread of the
time constants and scaling factors means spread of the values of bias currents
and capacitors. In the case that this spread reaches high values, it can lead to
nonpractical requirements for the circuit implementation [17]. In particular,
as the order q of the FO integrator/differentiator increases, an increase of
the spread of both time constants and scaling factors is observed. The same
also holds for the approximation order n. Therefore, in the case of high-
order approximation applied on an FO integrator/differentiator with order

q > 0.5, the derived spread leads to nonpractical values. A closer view
of the problem is obtained through the graphs in Fig. 1.13 and Fig. 1.14,
where the spread of time constants and scaling factors as a function of the
order q is presented for various orders of CFE and Oustaloup approximation
methods.
A solution to this problem can be achieved following the concept de-
scribed in Fig. 1.15. The main idea is to use only the lower orders of the
FO stage, where the spread is kept at low values. Connecting the FO stage

of order q < 0.5 with an IO integrator/differentiator of order r = ±1,

the result is an FO integrator/differentiator of order q + r > 0.5. The
mathematical description of the concept is given by the following trans-
fer function:
Hs (s) = (τ s)q+r , (1.23)
with the different realized cases presented analytically in Table 1.4.

Exploiting this concept, the FBD of the obtained CPE/FI emulator is
demonstrated in Fig. 1.16, with all the realized cases referred.
Indicatively, selecting the IFLF multifeedback structure of Fig. 1.8 con-
structed from OTAs, the whole CPE/FI OTA-C realization is presented
Figure 1.13 Spread of time constants as a function of the order q for various orders of
CFE and Oustaloup approximation methods [17].
Figure 1.14 Spread of scaling factors as a function of the order q for various orders of
CFE and Oustaloup approximation methods [17].
in Fig. 1.17. Implementing the OTAs of the FO stage and also of the IO
stages using the circuit in Fig. 1.9 and the V/I converter using the circuit
in Fig. 1.3 and considering the equation in (1.15), the complete emulator
is controlled through the bias currents of the OTAs.
Figure 1.15 FBD for implementing an FO integrator/differentiator using the spread re-
duction concept.
Table 1.4 Realized cases using the concept in Fig. 1.15 for re-
ducing the spread of time constants and scaling factors.
FO stage IO stage Result
differentiator integrator integrator
q ∈ (0, 0.5) r = −1 q + r ∈ (−1, −0.5)
integrator differentiator differentiator
q ∈ (−0.5, 0) r = +1 q + r ∈ (0.5, 1)
Figure 1.16 FBD of the enhanced CPE/FI emulator using the proposed spread reduc-
tion technique.
1.3.2 Reduction of the control terminals of the system

The tuning of a total number of bias currents that increases as the order of
approximation n increases is a difficult aspect that requires a simultaneous
control of many different terminals. The exploitation of a mathematical
correlation between the bias currents of the emulator reduces the number
of bias currents, required to control the CPE/FI emulator, to three: Imain ,
Figure 1.17 OTA-C realization of the FBD in Fig. 1.16.
K · Imain , and K0 · I0main [21]. As a result, control of the input current Imain
automatically means control of the whole emulator.
Considering a second-order CFE approximation, in order to explain
the procedure, the required currents of the FO integrator/differentiator are
9nC1 VT 8 − 2q2
I01 = K1 · I01 = · 2 , (1.24a)
5 q − 3q + 2
9nC2 VT q2 + 3q + 2
I02 = · , (1.24b)
5 8 − 2q2
9nC2 VT q2 − 3q + 2
K0 I02 = · , (1.24c)
5 8 − 2q2
q2 + 3q + 2
K2 I03 = · I03 . (1.24d)
q2 − 3q + 2
Setting I02 as the main current Imain and I03 equal to K0 I02 , the other cur-
rents are formed as follows:
2
C1 8 − 2q2
I01 = K1 I01 = · 2 · Imain ≡ K · Imain , (1.25a)
C2 q − 3q + 2 · q2 + 3q + 2
q2 − 3q + 2
I03 = · Imain = K0 Imain , (1.25b)
8 − 2q2
K2 I03 = Imain . (1.25c)
The input terminal of the emulator is the Imain current, so the two scaled
versions K · Imain and K0 Imain will be produced by an approximation block,
in order to feed the main CPE/FI core with the required currents. Per-
forming a second-order polynomial curve-fitting approximation using the
MATLAB® inbuilt function polyfit, the scaled currents are described as
n n−1
Imain Imain
K · Imain ∼
= mn,1 · + mn−1, 1 · + .... + m1,1 · Imain + m0,1 · Iref , (1.26)
Irefn−1 Irefn−2
n n−1
Imain Imain
K0 · Imain ∼
= mn,2 · + mn−1,2 · + ... + m1,2 · Imain + m0,2 · Iref , (1.27)
Irefn−1 Irefn−2
where Iref = 95 nC2 VT ω0 is a reference dc current internally produced

and mi,j (i = 0, 1, ...n and j = 1, 2) are real coefficients with values
{m2,1 , m1,1 , m0,1 } = {2.752, 0.286, 0.153} and {m2,2 , m1,2 , m0,2 } = {2.399,
−2.347, 0.69}.
The FBD that describes the equations in (1.26) and (1.27) is presented
in Fig. 1.18.
The current-scaling stages and the current squarer that construct this
diagram can be implemented using the nMOS and pMOS transistor-based
circuits in Fig. 1.19. Using as CPE/FI core the emulator in Fig. 1.17
and feeding it with the currents of the approximation block, defined
in (1.25a)–(1.25c), the result is a one-terminal controlled CPE/FI emu-
lator based on the control of the Imain current.
Figure 1.18 FBD of the second-order polynomial curve-fitting approximation block.
Figure 1.19 MOS transistor-based implementations of the scaling and squaring opera-
tions.
The performance of the emulator is evaluated through postlayout simu-

lation results, derived using the Cadence IC design suite and the Design Kit
AMS 0.35 µm process. Indicative aspect ratios for the transistors of the cir-
cuits in Fig. 1.19, for implementing the approximation block in Fig. 1.18,
are presented in Table 1.5 [21].
Table 1.5 Aspect ratios of the MOS transistors of the current squarer and scaling circuits
shown in Fig. 1.19.
Current squarer Current scaling Current scaling
Transistor (W/L) Transistor (W/L) Transistor (W/L)
(μm/μm) (μm/μm) (μm/μm)
Mp1–Mp3 80/15 Mp1 120/1.2 Mp1 120/1
Mp4 m21 ·(80/15) Mp2 m01 ·(120/1.2) Mp2 m11 ·(120/1)
Mp5 m22 ·(80/15) Mp3 m02 ·(120/1.2) Mn1 & Mn2 0.5/15
Mn3 m12 ·(120/1)
Correspondingly, aspect ratios for the transistors of the circuits in

Fig. 1.3 and Fig. 1.9, which are used to implement the CPE/FI core in
Fig. 1.17, are presented in Table 1.6 [21], with the power supply voltages
being VDD = −VSS = 0.75V . A second-order CFE approximation is ap-
plied on the CPE/FI core around f0 = 100 Hz, with the capacitor values of
the FO stage being set as C1 = 5 pF and C2 = 50 pF, while those for the IO
stages are set as Cdiff = 10 pF and Cint = 5 pF. Considering these specifica-
tions, the layout design of the whole system, including the approximation
block (blue frame; dark gray in print version), the CPE/FI core (red frame;
mid gray in print version), and also their capacitors (yellow squares; light
gray in print version), is demonstrated in Fig. 1.20.
Table 1.6 Aspect ratios of the MOS transistors of the OTA in Fig. 1.9 that implements
the FO and IO stages and of the OTA in Fig. 1.3 that implements the V/I converter.
Transistors OTA in Fig. 1.9 OTA in Fig. 1.3
FO Int/Diff IO Diff IO Int V/I converter
(W/L) (μm/μm)
Mb1–Mb3 0.5/10 1/12 25/5 0.5/10
Mb4–Mb7 – – – 1/2
Mn1 & Mn4 10/2 5/5 5/5 10/1
Mn2 & Mn3 2/2 1/5 1/5 2/1
Mp1–Mp3 10/15 0.9/18 0.5/5 1/2.5
Mp4–Mp6 – – – 1/2.5
The currents of the IO stages and the V/I converter are internally pro-
duced using Iref as reference current and the scaling stages in Fig. 1.19,
appropriately configured so that the obtained current values are equal to
Figure 1.20 Layout design of the one-terminal controlled CPE/FI emulator (dimen-
sions: 403 μm × 445.7 μm). The blue rectangle frames (dark gray in print version) the
approximation block and the red rectangle frames (mid gray in print version) the CPE/FI
core, while the remaining area is occupied by the capacitors [21].
IB,diff = 353.2 pA, IB,int = 176.6 pA, and IB,V /I = 500 pA. The values of the
main current, required to emulate a CPE of order α ∈ (0, 1), along with the
obtained values of pseudocapacitance are presented in Table 1.7 [21], while
the corresponding values in the case of an FI are also given in the same
table. An important point here is that the concept of the spread reduction,
described in the previous subsection, is utilized for the implementation of

the higher orders q > 0.5.
The efficient operation of the system, in terms of frequency domain, is
evaluated through the impedance magnitude and phase responses that are
demonstrated in Fig. 1.21 for the CPE case and in Fig. 1.22 for the FI
case within a frequency range f = [10, 1 k] Hz. The solid lines correspond
to the postlayout simulation results, while the dashed lines represent the
theoretically predicted plots.
Table 1.7 Values of the main bias current for emulating CPE and FI of various orders
using the emulator in Fig. 1.20.
CPE FI
α Cα Imain Iref β Lβ Imain Iref
0.1 4.67 nF /sec 0.9 510.7 pA 0.1 59 MH /sec 0.9 378.1 pA
0.2 2.45 nF /sec 0.8 588.1 pA 0.2 31 MH /sec 0.8 320.8 pA
0.3 1.29 nF /sec 0.7 674.6 pA 0.3 16 MH /sec 0.7 268.5 pA
0.4 676 pF /sec 0.6 771.9 pA 0.4 8.5 MH /sec 0.6 220.5 pA
0.5 355 pF /sec 0.5 882.2 pA 1.76 nA 0.5 4.5 MH /sec 0.5 176.4 pA 1.76 nA
0.6 186 pF /sec 0.4 220.5 pA 0.6 2.4 MH /sec 0.4 771.9 pA
0.7 97.8 pF /sec 0.3 268.5 pA 0.7 1.2 MH /sec 0.3 674.6 pA
0.8 51.4 pF /sec 0.2 320.8 pA 0.8 648 kH /sec 0.2 588.1 pA
0.9 27 pF /sec 0.1 378.1 pA 0.9 340 kH /sec 0.1 510.7 pA
Figure 1.21 Impedance magnitude and phase frequency responses of the CPE emula-
tor in Fig. 1.20.
Figure 1.22 Impedance magnitude and phase frequency responses of the FI emulator
in Fig. 1.20.
The time-domain analysis of the system is performed, indicatively, for

the case of the CPE of order α = 0.3. Using as input signal a sinusoid
with amplitude V0 = 10 mV and center frequency f0 = 100 Hz, the derived

waveform of the output current, along with the input voltage waveform,
is presented in Fig. 1.23. The obtained phase difference between the two
signals is equal to 25°, which is very close to the theoretical value of 27°
and, therefore, verifies the efficient performance of the emulator also in the
time domain.
The correct operation of the spread reduction concept, discussed in the
previous subsection, is also confirmed through these results, as the CPE/FI
core of the emulator is based on this concept.
Figure 1.23 Input voltage and output current waveforms in the case that the emulator
realizes a CPE of order α = 0.3. The sinusoidal input signal has amplitude V0 = 10 mV
and center frequency f0 = 100 Hz.
1.3.3 Enhancement of the order range of the emulator

The above realizations of CPEs/FIs are referred to an order range of
α, β ∈ (0, 1). Though, there are applications where orders greater than 1
are required [3,16,29]. An extension of the order range of the realized
CPE/FI to α, β ∈ (0, 2) can be performed through the exploitation of the
concept described by the FBD in Fig. 1.15 [22]. In this case, the FO and
IO stages must be of the same type (i.e., integrators or differentiators), in
order to realize an element of extended order range. More specifically, if
the FO stage with order q ∈ (0, 1) and the IO stage with order r = ±1
are both differentiators or integrators, then the realized FO differentiator
or integrator, respectively, will have an order equal to q + r and, as a result,
the realized CPE/FI will be of order α, β ∈ (0, 2). The realized cases are
explained in detail in Table 1.8.
Table 1.8 Realized cases using the concept of the order range extension.
FO stage IO stage Result Emulator type
differentiator differentiator differentiator CPE
q ∈ (0, 1) r = +1 q + r ∈ (0, 2) α ∈ (0, 2)
integrator integrator integrator FI
q ∈ (−1, 0) r = −1 q + r ∈ (−2, 0) β ∈ (0, 2)
Table 1.9 Values of bias currents for emulating CPE of various orders within the range
α ∈ (0, 2) using the emulator in Fig. 1.17.
α Cα IB2 IB1 IB0 K0 IB2 K1 IB1 K2 IB0
0.2 2.45 nF /sec 0.8 470.5 pA 1.94 nA 5 nA 256.6 pA 1.94 nA 9.2 nA
0.4 676.6 pF /sec 0.6 617.5 pA 2.82 nA 1 nA 176.4 pA 2.82 nA 3.5 nA
0.6 186.5 pF /sec 0.4 806.5 pA 4.59 nA 0.5 nA 108.6 pA 4.59 nA 3.7 nA
0.8 51.42 pF /sec 0.2 1.06 nA 9.88 nA 0.5 nA 50.41 pA 9.88 nA 10.5 nA
1.2 3.91 pF /sec −0.2 1.06 nA 9.88 nA 0.5 nA 50.41 pA 9.88 nA 10.5 nA
1.4 1.08 pF /sec −0.4 806.5 pA 4.59 nA 0.5 nA 108.6 pA 4.59 nA 3.7 nA
1.6 296.9 fF /sec −0.6 617.5 pA 2.82 nA 1 nA 176.4 pA 2.82 nA 3.5 nA
1.8 81.86 fF /sec −0.8 470.5 pA 1.94 nA 5 nA 256.6 pA 1.94 nA 9.2 nA
The simulation verification in this case has been performed using the
Cadence IC design suite and the Design Kit AMS 0.35 µm process. The
OTA-C structure in Fig. 1.17 is utilized and is implemented using the
OTA circuits of Fig. 1.3 and Fig. 1.9 with power supply voltages equal to
VDD = −VSS = 0.75V . A second-order CFE approximation is applied to
the FO stage around a center frequency f0 = 100 Hz with the derived val-
ues for the passive capacitors being equal to C1 = 10 pF and C2 = 40 pF.
The required bias currents, in order to realize different orders within the
range α, β ∈ (0, 2), are tabulated in Table 1.9 for CPE emulation and in
Table 1.10 for FI emulation [22]. The corresponding realized pseudoca-
pacitances/inductances are included in the same tables. The parameters of
the IO differentiator are Cdiff = 20 pF, IB,diff = 706.4 pA and those of the
IO integrator are Cint = 5 pF, IB,int = 176.6 pA, while the bias current of
the V/I converter is set equal to IB,V /I = 500 pA.
According to these specifications the emulator has been designed at the
layout level, as shown in Fig. 1.24, containing the FO stage (red frame;
mid gray in print version), the IO differentiator (green frame; light gray in
print version), the IO integrator (yellow frame; white in print version), the
V/I converter (blue frame; dark gray in print version), and also the pas-
sive capacitors (yellow squares; light gray in print version). The impedance
Table 1.10 Values of bias currents for emulating FI of various orders within the range
β ∈ (0, 2) using the emulator in Fig. 1.17.
β Lβ IB2 IB1 IB0 K0 IB2 K1 IB1 K2 IB0
0.2 1.55 MH /sec 0.8 256.6 pA 1.06 nA 10 nA 470.5 pA 1.06 nA 5.4 nA
0.4 426.8 kH /sec 0.6 176.4 pA 806.5 pA 1 nA 617.5 pA 806.5 pA 1.4 nA
0.6 117.7 kH /sec 0.4 108.6 pA 617.5 pA 10 nA 806.5 pA 617.5 pA 1.3 nA
0.8 32.44 kH /sec 0.2 50.41 pA 470.5 pA 500 nA 1.06 nA 470.5 pA 23.8 nA
1.2 2.47 kH /sec −0.2 50.41 pA 470.5 pA 500 nA 1.06 nA 470.5 pA 23.8 nA
1.4 679.9 H /sec −0.4 108.6 pA 617.5 pA 1 nA 806.5 pA 617.5 pA 1.3 nA
1.6 187.2 H /sec −0.6 176.4 pA 806.5 pA 10 nA 617.5 pA 806.5 pA 1.4 nA
1.8 51.67 H /sec −0.8 256.6 pA 1.06 nA 5 nA 470.5 pA 1.06 nA 5.4 nA
Figure 1.24 Layout design of the CPE/FI emulator of order in the range α, β ∈ (0, 2) (di-
mensions: 356.6 μm × 358.4 μm). The red rectangle frames (mid gray in print version)
the FO stage, the green rectangle frames (light gray in print version) the IO differentia-
tor, the yellow rectangle frames (white in print version) the IO integrator, and the blue
rectangle frames (dark gray in print version) the V/I converter, while the remaining space
is occupied by capacitors [22].
magnitude and phase frequency responses for the case of Table 1.9 within a
frequency range f = [10, 1 k] Hz are presented in Fig. 1.25, while the cor-
responding frequency responses for the case of Table 1.10 are presented in
Fig. 1.26.
Figure 1.25 Impedance magnitude and phase frequency responses of the CPE emula-
tor in Fig. 1.24.
Figure 1.26 Impedance magnitude and phase frequency responses of the FI emulator
in Fig. 1.24.
The most important advantage of these OTA-C realizations is the

electronic control of the emulator parameters, through the appropriate
tuning of the bias currents of the OTAs. If the desired parameter is the
pseudocapacitance/inductance of the CPE/FI emulator, then, according
to (1.18a)–(1.18b), control can be easily performed through the bias cur-
rent of the V/I converter. Setting the emulator order as α = β = 1.2 and
the center frequency as f0 = 100 Hz, and then tuning the V/I converter bias
current as IB,V /I = {1, 2, 5, 10} nA (i.e., gm,V /I = {17.8, 35.6, 89, 178} nS),
the obtained impedance magnitude frequency responses are demonstrated
in Fig. 1.27. The realized pseudocapacitance value is equal to Cα =
{7.82, 15.6, 39.1, 78.2} pF /sec −0.2 and the pseudoinductance value is equal
to Lβ = {24.65, 12.33, 4.93, 2.46} kH /sec −0.2 .
In a similar way, the center frequency can be accordingly controlled
through the appropriate adjustment of the bias currents of the system.
Figure 1.27 Impedance magnitude frequency responses for various values of realized
pseudocapacitance/inductance of the CPE/FI emulator in Fig. 1.24. The control of this
parameter is performed through the bias current of the V/I converter.
1.4. Conclusions and discussion

The emulation of FO elements (CPEs/FIs) through MOS transistor-
based realizations forms enhanced systems, which allow the electronic con-
trol of the characteristic features of the element. In this way, the type (CPE
or FI), the order (α or β ), the pseudocapacitance/inductance (Cα or Lβ ),
and the center frequency (f0 ) of the emulator can be adjusted through the
control of the bias currents.
The simple approach to construct an RC network with MOS transistor-
based resistors offers a controllable CPE emulator, which can also realize an
FI emulator with the requirement, though, of an extra GIC. A more general
approach proposes an FO integrator/differentiator-based emulator, which
composes an advanced system with numerous advantages. First of all, one
common structure can, simultaneously, realize both types of FO elements
with no requirement for extra stages. An attractive feature is, also, the ca-
pability of reducing the spread of the values of the system parameters, such
as the capacitances and the bias currents. The application of the proposed
concept for spread reduction leads to more compact structures that require
reduced silicon area and can even achieve the on-chip integration of the
passive capacitors, offering at the same time the benefit of a less consump-
tive system. The development of enhanced versions of this general emulator
can form even more advantageous systems, like the one-terminal electron-
ically controlled emulation system or the emulator with expanded range of
the order. As a derivation from all these, the MOS transistor-based con-
figurations, discussed in this chapter, are easily modified according to the
desired specifications and, thus, are able to fulfill the requirements of a wide
range of applications. Further improvement of the presented implementa-
tions aims at less complex configurations with extended frequency range of
efficient operation, so as to achieve emulators with maximum benefits at
the lowest expense.
Nowadays research efforts on this subject focus on the development
of emulators that approximate the impedance of a whole model and not
only the impedance of each FO element individually. For this purpose,
alternative approximation tools, like the Padé approximation and curve-
fitting-based techniques, are required, as conventional methods are able to
approach only the Laplacian operator and not a whole function. Exploiting
such tools, various biological tissue models, described by complex electrical
models, like the well-known Cole–Cole model, can be realized by one
emulator, independently of the passive and FO elements it contains [20].
This concept is also very useful in the realization of models where not
only the Laplacian operator, but a whole function is raised to the fractional
order, as in the case of the Cole–Davidson and Havriliak–Negami mod-
els [19]. The obtained, approximated impedance functions have the same
form as in the case of the typical approximation methods (i.e., integer ra-
tional transfer functions), so their realization can be performed following
the concepts presented in this chapter.
Acknowledgment
This research is cofinanced by Greece and the European Union (European Social
Fund-ESF) through the Operational Programme “Human Resources Development,
Education and Lifelong Learning” in the context of the project “Strengthening
Human Resources Research Potential via Doctorate Research-2nd Cycle” (MIS-
5000432), implemented by the State Scholarships Foundation (IKY).
This article is based upon work from COST Action CA15225, a network sup-
ported by COST (European Cooperation in Science and Technology).
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buckets. And, by gosh, these square-heads went on strike
and the kindly French let ’em get away with it. If any
prisoners went on strike in Germany it’s a cinch they’d be
shot full of holes. They don’t treat ’em rough enough in
France.
After looking over several of these Corsair diaries, Commander
Kittinger had this shrewd and good-humored comment to offer:
The impressions which these youngsters jotted down
were amusing and often inaccurate, but they caught the
spirit of the service and the day’s work. When one of them
felt aggrieved because he was “bawled out,” he never
stopped to take an inventory of his professional
qualifications and the duties thrust upon him as well as
upon other untrained and unseasoned lads. Nor did he
always realize that he was allowed to perform functions
whereby he had the safety of a hundred and twenty-five
lives and a million dollars worth of irreplaceable property
between his two hands. There was no time to learn by
experience and every “bawling out” was, I hope, driving an
important fact home. Where else could one of these boys
have learned such valuable lessons and be on a pay-roll
at the same time? Of course they could not understand
such methods, but the system soon separated the sheep
from the goats—the latter remaining at the business end
of a deck swab. Many times the skipper was not as angry
as he appeared. The first lesson was to say “Aye, Aye,
Sir,” when told something important instead of trying to
explain. When a young man explains, he is not listening to
the order, but thinking up a reply.
To the Corsair’s company the most interesting happenings during
the long period of convoy duty were the changes and promotions
which shifted many of the family to other ships and stations and
brought new faces aboard. Commander Kittinger had been
advanced a grade on the Regular Navy list since joining the Corsair
and was in line for transfer to a larger ship. He was given the stately
armed transport Princess Matoika, formerly the Princess Alice of the
North German Lloyd, and thereafter carried many thousand
American troops in safety to France. In this ship the roster of officers
was more imposing than in the yacht which served so faithfully, for
Commander Kittinger now gave orders to two lieutenant
commanders, eleven lieutenants, and twenty ensigns. Toward the
Corsair he felt affection and loyalty and was glad that his war record
had included a year with her, crossing with the first American troops
and battering about in the Bay of Biscay. Drilled in the exacting
school of the regular service, he had only praise for the spirit,
intelligence, and devotion of the Reserves, officers and men, who
had fitted themselves to circumstances and played the game to the
hilt.
After the war Commander Kittinger was sent to the Fore River
Ship Building Company as Naval Inspector of Ordnance. While there
he received the following letter:
July 23, 1919
From: Director of Naval Intelligence,

To: Chief of the Bureau of Navigation:
Subject: Award of the Legion of Honor.
The Bureau is informed that by a decree of the
President of the French Republic the award of Member of
the Legion of Honor with the rank of Chevalier has been
made to Commander Theodore A. Kittinger, U.S.N., with
the following citation:
Commander Kittinger, in command of the yacht
Corsair, escorted the O.V.H.N. convoys, etc.
It is requested that a copy of this letter be filed with this
officer’s record.
Lieutenant Commander Porter became the commander of the
Corsair on May 31st, and held the position until the yacht returned
home one year later. It gratified him, of course, to have his own ship,
and in the opinion of his officers and crew the honor was well
deserved. It was a distinction also, and without precedent in a
combatant ship, for a Reserve officer to be given a vessel of the size
and class of the Corsair. He was later advanced to the naval rank of
commander and finished his service as a three-striper.
Lieutenant Commander Tod was detached to join the organization
of Admiral Wilson at Brest as Port Officer and was afterwards
appointed Director of Public Works. Both positions were important
and involved varied and arduous responsibilities. He was later
promoted to the rank of Commander. At a dinner given by the
American naval officers of the club in Brest, this rousing song of the
Breton Patrol was rolled out with a vigor that rattled the windows:
1. Oh we sing of a squadron patrolling the coast
From Cre-Ach to old Saint-Nazaire.
On the job for a year, we still say with a cheer,
Nous resterons pendant la guerre.
Chorus:
Though the bar’s consigné and we’ve clumbed up to stay

At the very tip-top of the pole,
Still our drinks, short or tall, will be “Wilson, that’s all,”
The Chief of the Breton Patrol.
2. It’s a squadron that’s doing its best over here

Towards keeping command of the seas;
For by day or by night, standing by for a fight,
It’s the Breton Patrol of H. B.[5]
3. To the Point of Penmarch it is not very far;

Some forty-five miles of blue sea,—
That’s where some day poor Fritz will be blown into bits
By the Breton Patrol of H. B.
4. If we sail on request of the C.D.P. Brest,

With a convoy that’s bound for its goal;
If it’s rain, hail, or snow, the convoy must go,
That’s the job of the Breton Patrol.
5. If a depth charge turns over and falls in the sea,
And next moment your stern is no more,
There’s just one thing to do,—Prenez vite le you-you,
And pull for the Brittany shore.
CHIEF QUARTERMASTER FARR STANDS WITH FOLDED ARMS

AND
INDICATES THAT HE HAS HIS SEA-LEGS WITH HIM
COMMANDER KITTINGER SAYS GOOD-BYE TO LIEUTENANT
COMMANDER
PORTER AS THE LATTER TAKES OVER THE COMMAND
6. If the ship is trop fort, and you need a corps-mort,

Just to keep her quite safe in the bay,
You have only to go to brave Captain Loiseaux,
Il nous faut le chameau, s’il vous plaît.
7. When they’re coming too strong, and you find you’re in wrong,
In trouble at sea or on land,
There’s just one man to see and his name’s F. T. E.,[6]
To clear out the gear box of sand.
8. There’s a gallant French sailor who’s with us to-night,

He’s bound for a trip ’cross the sea;
So here’s Merci beaucoup, bon voyage, Admiral Grout,
From the Breton Patrol of H. B.
9. There are brave men in plenty and well known to all,

Who have come over here for the war,
But the best known of all is the one that we call
Old Robert E. Tod—Commodore.
10. If you want a good man, just to unload a van,

Or to anchor a ship in the Rade,
Or to work night and day, you have only to say,
“Where in hell is old Robert E. Tod?”
Lieutenant McGuire was made executive officer of the Corsair
when Captain Porter took over the command. In time of peace
Lieutenant McGuire had been first officer of the yacht, so he was
really stepping into his old berth. Ensign Schanze, the efficient
gunnery officer, had been commissioned a lieutenant in December.
In May he was transferred from the Corsair to the staff of Rear
Admiral McCully, the District Commander at Rochefort. For some
time he acted as liaison officer on board of the French station ship
Marthe Solange, and his scientific training was later employed in
experimenting with and testing listening devices for detecting enemy
submarines.
Ensign Gray, the communications officer who had helped to make
the radio service of the Corsair notable throughout the fleet, was
anxious to have a whirl at the destroyer game, like any proper-
minded young Navy man, and on May 28th he was transferred to the
Monaghan of the Brest flotilla. Assistant Surgeon Laub was sent to
the Moccasin in April and Assistant Surgeon R. H. Hunt exchanged
billets with him for a short time, shifting from the Corsair to the
destroyer Nicholson. Chief Engineer Hutchison stood by the ship
until September, although his health was poor and he had been
compelled to seek hospital treatment ashore. After leave at home he
regained his strength and sailed in the big transport Agamemnon.
His position in the Corsair was filled by Lieutenant J. J. Patterson as
engineer officer. Assistant Engineer Mason received an appointment
as ensign in May and went ashore for staff duty at Bordeaux in the
autumn. His partner in the engine-room, Assistant Engineer
Hawthorn, left the Corsair in June and was assigned to the naval
auxiliary service as a senior engineer officer. Boatswain Budani, who
had polished off the aspiring bluejackets and taught them to be
regular, sea-going gobs, was summoned to the Naval Aviation
Headquarters at Paris and later sent to Italy.
At the ward-room table were new officers to be welcomed into the
briny brotherhood of the Corsair, Ensign A. H. Acorn, Jr., Lieutenant
Gerald Nolan, Ensign J. W. McCoy, Ensign P. F. Wangerin, Ensign C.
R. Smith, Ensign S. K. Hall, Ensign R. V. Dolan, several of whom
were promoted to be lieutenants, junior grade. After the armistice
and while the Corsair was in the North Sea and at Queenstown,
there were other changes which will be noted later.
Through the winter and spring the task of studying for
commissions which had bred so many headaches in the bunk-rooms
below was getting on famously. There were gloomy moments when,
as has been said, one candidate felt sure that the captain would
recommend him for nothing else than a firing squad, or another had
believed that a “bawling out” had utterly wrecked his prospects, but
such dark forebodings were mostly unfounded. Examining boards of
officers were duly convened, or recommendations made for the
intensive course at Annapolis, and the Corsair was like a college
grinding out diplomas at Commencement time, excepting that the
Navy course was far stiffer than the requirements of the campus.
There were no “snap courses” in the Bay of Biscay and no bluffing
the faculty.
The following enlisted men, with one warrant officer, were
examined, qualified, and given commissions with the rank of ensign:
Enlisted as
W. F. Evans, Jr. Seaman Sent to Annapolis
David Tibbott Seaman ” ” ”
R. G. Seger Seaman ” ” ”
E. B. Prindle Q.M. 2c. ” ” ”
E. L. Houtz Seaman, 2c. ” ” ”
C. N. Ashby Seaman, 2c. ” ” ”
W. J. Rahill Seaman ” ” ”
H. F. Breckel Elec. 1c. Radio Commissioned Overseas
A. C. Smith, Jr. Q.M. 2c. ” ”
C. S. Bayne Seaman ” ”
A. L. Copeland Seaman ” ”
J. T. Herne Seaman ” ”
A. J. Marsh Seaman ” ”
A. V. Mason Machinist ” ”
Chief Quartermaster F. S. Fair and Chief Commissary Steward H.

A. Barry passed the examinations successfully, but failed on the
tests for eyesight and were thereby disqualified for commissions, a
misfortune which keenly disappointed them and their shipmates.
Commander Kittinger volunteered this high opinion of them: “Two of
the best men we had, I regret to say, received no rewards and it was
a loss to the service. Fair and Barry get 100 per cent from me in
every department. If they were physically fit to be bluejackets it might
seem as though they were physically fit to be officers, but such were
the regulations.”
FROM THE LEFT, LIEUT. SCHANZE, ENSIGN GRAY, LIEUT.
COMMANDER PORTER, CHIEF ENGINEER HUTCHISON,
COMMANDER KITTINGER, AND LIEUT. McGUIRE
AT ROSYTH. BACK ROW, FROM RIGHT, LIEUT. NOLAN, DR.
AGNEW, COMMANDER PORTER, LIEUT. McGUIRE, ENSIGN
ACORN FRONT ROW, LIEUT. PATTERSON, ENSIGN WANGERIN,
PAYMASTER ERICKSON
Ensign Carroll Bayne stayed in the Corsair for a little while as an

officer and was then transferred to staff duty at Brest, assisting
Lieutenant Commander Tod who was Port Officer at the time. In his
diary Bayne indicated what his duties were, and they suggest that
the Naval Reserve officer was expected to turn his hand to almost
everything, and at very short notice:
Mr. Tod took me around to-day to call on all the French
admirals, etc., and they were very courteous. I got an
awful call down from an American three-striper for not
saluting him. I started to, but he did not see me, so I
knocked off. However, he came back and gave me
particular fits.... The Leviathan came in to-day with ten
thousand troops. She is the most enormous thing I ever
saw. It took three hours to moor her. She bumped a tanker
coming in, almost sank the Burrows destroyer, and ended
by sinking a French tug. The soldiers began coming
ashore before she was moored. That packet needs
considerable elbow-room. I went aboard the Leviathan at
6 a.m. and almost got lost in her. In fact, I did. Her bridge
is much higher than the Corsair’s foretop. Weather beastly
and we spent most of the day getting coal barges to and
from her....
June 25th. The Leviathan sailed for the States. I was
out there until she left, helping to unshackle her and get
her under way. I have the night trick, so will have to sleep
in the office. This is some job.... The Great Northern and
Northern Pacific came in with troops and will leave to-
morrow night. They are certainly making speed back and
forth these days.... July 1st. Started out at 6 a.m. and
boarded fifteen ships. One had run aground on a rock and
her bow was smashed and the fore-peak full of water. I
made arrangements to dock her to-morrow.
July 4th. Big parade to-day, but I saw none of it. Twenty-
three American transports came in and I had to board
them all, a four-hour job. We are expecting more troop-
ships to-morrow. It is up to me to get them coaled,
watered, and ready to turn around.... July 11th. The Von
Steuben left to-night in a heavy storm. Commander Tod,
Major O’Neil, and I went out to meet a convoy of thirteen
ships, all carrying troops. The Major got very sick in the
rough sea. We had the devil of a time, and no other word
applies. Got back at 3 a.m. and had to anchor and then
board all these ships in total darkness. Another one of
those ships from the Great Lakes broke down and that
means work for me to-morrow. This is the fourth one of the
kind that has gone to pot here. I wish they could be left at
home.
July 18th. Roughest day yet, seas very high. I went over
to assist in getting the Leviathan under way. She started
off at seventeen knots and her back-wash came within an
ace of upsetting us. Had a tough time making landings on
this batch of troop-ships. When I got alongside the
Westerdyke a huge wave slammed my boat against her,
carrying away all my superstructure and chewing things
up generally. We managed to get clear and stay afloat.
I got in wrong with the Army who claimed I stole a ship
from them. A collier came in, and as the Navy was badly in
need of coal, I refused to look at her manifest and sent her
over to our repair ship Panther and began to coal her. The
Army got wise and put up a yell, but it was too late and I
got away with it. They say that if the trick is done again
they will report it to Pershing. Let ’em go to it, as long as
the Navy gets the coal when it needs it.
While the Corsair was driving through the blustering winds and
seas of March, there came bright days now and then which were a
harbinger of springtime in Brittany. In a letter written on Palm
Sunday, Chief Quartermaster Farr depicted the following contrast
with the grim routine of the war by sea and land:
I have had a delightful day. In the first place, the
weather is like June and now it is moonlight and a dead
calm is resting on the bay and I feel the joy of life and the
beauty of Nature. This morning I went ashore to the
Catholic church, and the entire population of the little
Breton fishing town must have been there. Of course I
couldn’t understand what was going on, but it was restful
and soothing to say your prayers and think a little and
listen to the organ. A Frenchman with a good voice sang
“Hosanna, Glory to God,” and I prayed hard for the
English armies in the great battle which is now raging.
Their losses are heavy and I think of the terrible anxiety in
England for their boys. Not that there is any doubt of the
outcome, but so many brave men are dying, and when
you read of the Ninth Division, say, as particularly
distinguishing itself, you can imagine the feelings of the
mothers of those men.
This afternoon several of us walked out to a little
château built in the time of Louis XVI which was very
interesting. The old French people were extremely
hospitable, gave us tea, and showed us everything. They
had a beautiful little garden with lots of vegetables
growing, peach and cherry blossoms, wonderful hawthorn
hedges, spring flowers everywhere, the birds singing, and
the whole landscape peaceful and happy. It was hard to
realize that the greatest battle of the war is raging in the
north.
We walked back to the Y.M.C.A. where we each had
four fried eggs with some of the Army engineer troops.
They come from California and Oregon, and are the best
and huskiest-looking soldiers I’ve seen yet. A darky was in
the party, a Navy cook, and he was as good as a minstrel
show. He ordered six eggs, and as soon as they came on
the table he ordered another half-dozen. He said he was
honin’ and pinin’ for to get to Dunkirk, and would probably
get killed by a bomb if he did, but “befo’ the Lawd, boss, I
jes’ itches to go anyhow. It’s mah destination, she sure is.”
I am mighty glad to have had this service in the ranks. I
wouldn’t have missed it for anything. It is the only way to
know the real Army and Navy.
FOOTNOTES:
[4] A Year in the Navy. Houghton Mifflin Co.
[5] H. B. Wilson.
[6] Commander Frank T. Evans, U.S.N.
CHAPTER X
THE CORSAIR STANDS BY
T HIS business gets more interesting every day and is

by far the most fascinating industry I have ever
undertaken [declared Lieutenant Schanze, in letters
written during the autumn and winter]. Of course it is
extremely strenuous, the long sea voyages into an
eternally rough ocean, the cold, wet days and nights, and
the everlasting vigil that must be kept despite wind, rain,
fog, and storm. It gets to the nerves of the boys and a few
of them show signs of weakening at times, but on the
whole, and in my humble opinion, the Corsair has the
most pugnacious and indefatigable bunch of fighters in the
whole Navy.
You see, the Corsair and the Aphrodite were the first
American war vessels to patrol the Bay of Biscay;
consequently we are old-timers here and are looked up to
by the others as being well versed in this game. The hard
service is the best thing that could have happened to us.
Being in a war without actually serving on the firing line
would drive me looney, but as things have turned out I
have the most wonderful opportunity to exercise all my
mechanical ingenuity and experience and they have more
than stood me in good stead.
This war work agrees with me better than anything I
have engaged in. I am growing stouter and more vigorous
and enjoying every minute of it.... If we bean a submarine
and crow about it, everybody ashore gives us the horse
laugh because we did not have the propellers or conning
tower to show for it; and if some misguided sub takes a
shot at us and the torpedo happens to miss and biffs one
of the empty buckets we are escorting over the horizon,
the Admiral roars until we dare not show our faces ashore.
I recently heard the anti-submarine campaign assailed on
the ground that the submarines are still at large and going
strong. They are. But the submarine campaign of
Germany is away past its zenith. It was passed several
months ago and the lid is now being nailed down on its
coffin.
We are over here in this mess up to our ears and we
know what has taken place when the whole ocean seems
to tremble and that sickening, muffled roar, whose
direction defies discovery, comes to our ears. We know
that another torpedo has found its mark. Does it make us
gloomy? It does not. It cheers us up. Why? Because we
can instantly diagnose just how it was done and we
recognize that our enemy is becoming more timid,
impotent, and desperate. Very soon every successfully
exploded torpedo will cost the life of the sub that sent it.
Instead of being the terror of the seas that they were last
June and July, the U-boats now advertise the fact that the
terror of the seas is the American destroyer.
The war goes booming along on an ever greater scale,
and to those who are given this opportunity of viewing the
panorama, it unfolds itself with a magnitude that defies all
description. Could I but tell you of the vast works that
America alone has put upon the landscapes here in
France, you would believe my enthusiasm exaggerated.
Details I cannot give, but as a comparison imagine a
contract for the construction of a series of communities,
each one about as large as Newark was ten years ago,
and imagine them equipped with every modern
improvement such as wharfage on a river-bank formerly
barren, manufacturing plants for the fabrication of
everything from wooden legs to steel ships, and then
accept this as a fact already accomplished and doing
business, and you can gather some idea of the
tremendous efforts that have been put forth.
ROLLING OUT TO FIND A LITTLE WATER ON
A CONVOY DECK
For all this we are indebted, not nearly so much to the

men here at the front as to those whose untiring efforts at
home, in face of all kinds of criticism of the most
venomous kind, have driven this enormous task to a
successful culmination. I have a wonderful respect for our
men at home who have had to stay home and accomplish
things which they could never disclose to a naturally
impatient and clamoring public. Had the Germans done
such things as I have seen here accomplished by
Americans, I would have taken off my hat to them and
acknowledged the fact that German efficiency coupled
with the advantages of a despotism was at least worthy of
a close look. I dwell upon this phase of the situation
because it has recently come to my attention, from most
reliable sources, that there is a tendency toward gloom in
certain quarters at home. The constant attacks made by
conscientious critics, aside from the braying of the
eternally discontented and the insidious whispers of the
disloyal, are liable to make even the stoutest hearts falter
at times.
I cannot too emphatically contradict every reason
advanced to sustain a gloomy attitude of mind. There is
every reason for the greatest enthusiasm and confidence.
In fact, we over here on the firing line have a spontaneous
kind of enthusiasm that comes only to the victorious. This
war is a long and ferocious process in which each battle
must be considered as a single shot fired only as a part of
the ensemble. On land and sea things look better than
they have in a long time. Every American effort is pure
velvet for the Allied side. I trust our nation will now begin
to see that America is a big and powerful fellow among the
nations of the world and that, with just a little bit of careful
attention, this European situation can be hammered into
shape. The women of the country are, after all, pretty
much the whole thing, for they can inculcate the spirit of
fight and of happy confidence that nothing else can put
into their boys. If the mother will adopt the old Spartan
admonition of “Come home either with your shield or on
it,” the boys will keep surging into this war with an ardor
that no enemy can stop.
... My experiences thus far have brought me more
laughs than it has been my pleasure to have in any other
period of time. I must confess, however, that many of the
laughs come when I view some of the situations in
retrospect. At times, especially in the middle of a ruction,
when literally tons of high explosives are being launched,
we are too busily engaged to laugh. On such occasions
we have to think rapidly and work fast.
One incident may be worthy of note. A flock of troop-
ships was under escort through the torpedo zone. The
eagle eye of a trained observer caught the tell-tale
symptoms of a submarine trying to manœuvre into striking
position. Activities began at once, if not sooner. Those of
us whose job it was to look after the sub, did it. Those of
us whose job it was to screen the troop-ships, did that. On
one of the transports were many negroes who knew more
about shore duties than seafaring. On the ship they were
passengers pro tem.
The process of dealing with a submarine certainly must
send thrills through a spectator who has never attended
any rehearsals. The negroes in question were all novices
and their chief emotion was primitive terror. The
simultaneous explosion of forty or fifty barrels of dynamite
made the whole ocean heave and rumble. Even those of
us who were used to dropping ’em over and who were
braced for the shock, felt considerably jolted.
The darky soldiers thought the end of creation had sure
busted loose in epidemic form. One of them excitedly dug
down into his pack and fished out a Bible. Opening it on
deck, he knelt upon it, wrung his hands to Heaven and
cried in accents that could be heard above the racket of
the explosions, “O Lawd, O Lawd, I’se never gwine roll
dem bones no mo’. Ah promise it. Ah promise it
absotively.”
Another one decided that this method of imploring grace
was worth imitating in the terrible crisis, so he rushed over
and tried to get knee-room on the same Bible. Shoving his
comrade aside, he managed to find a sacred anchorage
and his supplication was, “Good Lawd Jesus, lemme see
jes’ one green tree. Ah ain’t askin’ you to send me back
home across dis yere big ocean till th’ war is done. Ah’ll
stay right where I is put, but lemme see jes’ one green
tree befo’ all dem German su’marines gobble dis pore
niggah like Jonah an’ th’ whale.”
Half an hour after the excitement was over, these
devout passengers were shooting dice as busily as ever.
There were negroes in another unit which we escorted
into France. In wandering about the port, they came
across some of their own race, black troopers from the
French African colonies. Negotiations were opened to
start a conversation going, but they could find no common
language until one of the bunch produced a pair of dice.
This, it seems, instantly broke down the barrier, and they
soon had going as fine a little game of international craps
as a man ever saw. Both sides whooped and haw-hawed
until traffic was blocked and the police interfered.
The convoy work in which the Corsair took part during the four
months from February 15 to May 30, 1918, comprised the following
cruises, arranged in the form of a summary so as to make the record
more complete and also to suggest the volume of the shipping which
was entrusted to the protection of the yachts and destroyers in
French waters:
Feb. 16-20. (Westbound from Verdon.) Ships in convoy:
Eugene Grozos, Mont Pelvoux, Kalfarli, Lenape, Mariana,
Lamertin, Mundiale, Bergdalen, Amphion, Northern,
Joseph Cudahy, Stensland, Ariadne, Lady of Gaspe,
Thibet.
(Vessels in escort.) Corsair, Aphrodite, May, Regulus
(F), Aventurier (F).
Feb. 25-28. (Westbound from Verdon.) Ships in convoy:
El Occidente, Anglo Saxon, Erny, Borinquen, Montanan,
Aurelien Sholt, Appelus, Balti, Gusta Vigiland.
(Vessels in escort.) Corsair, Aphrodite, May, Cassiope
(F).
March 7-10. (Westbound from Verdon.) Ships in convoy:
Luckenbach, St. Stephen, Millnock, Munares, Pearl Shell,
Crecarne, Strathlone, Eschwick, Stellina, Anglo Mexican,
Pennsylvanian, Hilda, Frances L. Kinney, Eagle, Felix
Taussig, Dalblair, Camaguey, Oslang.
(Vessels in escort.) Corsair, Aphrodite, Nokomis, Rivoli
(F), Cassiope (F).
March 16-19. (Westbound from Verdon.) Ships in
convoy: Charlton Hall, Santiago, Mont Ventoux,
Penmarch, Bay Douglas, New York, Dumfurland, Alf,
Beaverton, Cantal, W. Mace, Bay Nyassa, Wachusett, El
Orients, Woonsocket, Augvald, Ionian.
(Vessels in escort.) Corsair, Aphrodite, Nokomis, Rivoli
(F), Marne (F).
March 20-21. (Eastbound to Gironde.) Ships in convoy:
Mercury, Tenadores.
(Vessels in escort.) Corsair, Noma, destroyers Balch,
Winslow, Sampson, Porter, Drayton, Parker.
March 25-27. (Eastbound to Gironde.) Ship of convoy:
Mallory. (Vessels in escort.) Corsair, Noma, Wakiva,
destroyers Rowan, Winslow, Benham.
April 3-4. (Eastbound to Gironde.) Ships in convoy:
Powhatan, Martha Washington, El Occidente.
(Vessels in escort.) Corsair, Noma, destroyers Duncan,
Caldwell, Sampson, Winslow, Parker, Connyngham.
April 8-22. Corsair acting as communication ship, at
Verdon, and overhauling machinery at Bordeaux.
April 24-27. (Westbound from Verdon.) Ships in convoy:
Indiana, Clare, Alexander Kielland, Daphne, Lyderhom,
Peter H. Crowell, Canto, Kentuckian, Hunwood, Seattle,
Oregon, Californian, Mocassin, Munindies, Munaires,
Lake Tahoe, Santa Rosalia, Drake, Amphion, Oregonian,
Newton.
(Vessels in escort.) Corsair, Aphrodite, Nokomis,
Wakiva, Rivoli (F).
May 5-9. (Westbound from Verdon.) Ships in convoy:
Mesopotamia, Jean, West Wind, Guantanamo, Monticello,
Cristobal, Margaret, American, Iroquois, Chian, Artemis,
Buenaventura, Sudbury, Lamertin, Edith, Nyanza, Amiral
Grouse, Ariadne.

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Fractional-order Design: Devices,

Circuits, And Systems Ahmed G.

Mathematical techniques of fractional order systems

Electronic Devices and Circuits S. Salivahanan

Lectures on Digital Design Principles (River Publishers

Integrable Systems 1st Edition Ahmed Lesfari

Fractional operators with constant and variable order

Design of Analog CMOS Integrated Circuits 2nd eddition

Multi-Chaos, Fractal and Multi-Fractional Artificial

Electrochemical Sensors: From Working Electrodes to

FAROOQ AHMAD KHANDAY

QUAN MIN ZHU

MATLAB® is a trademark of The MathWorks, Inc. and is used with permission.

Library of Congress Cataloging-in-Publication Data

British Library Cataloguing-in-Publication Data

For information on all Academic Press publications

Publisher: Mara Conner

1. MOS realizations of fractional-order elements 1

2. A chaotic system with equilibria located on a line and its

3. Approximation of fractional-order elements for sinusoidal

4. Synchronization between fractional chaotic maps with different

5. Stabilization of different dimensional fractional chaotic maps 123

6. Observability of speed DC motor with self-tuning fuzzy-

7. Chaos control and fractional inverse matrix projective difference

8. Aggregation of chaotic signal with proportional fractional

8.1. Introduction 207

9. CNT-based fractors in all four quadrants: design, simulation, and

10. Fractional-order systems in biological applications: estimating

11. Unitary fractional-order derivative operators for quantum

12. Analysis and realization of fractional step ﬁlters of order (1 + α) 337

13. Fractional-order identiﬁcation and synthesis of equivalent

14. Higher-order fractional elements: realizations and applications 403

15. Fabrication of polymer nanocomposite-based fractional-order

16. Design guidelines for fabrication of MWCNT-polymer based

Mohamed Lamine Hamida

Lone Seth Jahanzaib

Zahoor Ahmad Jhat

Dina Anna John

Najeeb Alam Khan

Farooq Ahmad Khanday

Ensieh Ghaffari Shad

Similarly, the corresponding equations in the case of an FI are given by

ZFI (s) = Lβ · sβ , (1.3)

with τ being a time constant related to the center frequency as τ =

of a CPE and an FI are given by (1.6b) and (1.6d). We have

Figure 1.1 Foster types of RC networks for CPE emulation.

Figure 1.2 Cauer types of RC networks for CPE emulation.

for the admittance expression. We have

function in (1.6b) by s. The derived function is expressed as

An important remark that should be made concerns the behavior of the

cannot be realized using RC networks that have fixed values of passive

1.2. CPE/FI emulation techniques

with the intermediate pole frequencies described as ω0,i = 1/(Ri Ci ).

Figure 1.3 Circuit implementation and symbol representation of a multiple-output

A possible implementation of the OTA is given by the circuit in Fig. 1.3,

Table 1.2 Aspect ratios of the MOS transistors

Table 1.3 Values of resistances, bias cur-

The obtained impedance magnitude and phase frequency responses