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FUNDAMENTALS page i
OF
DIGITAL LOGIC WITH VHDL
DESIGN
FOURTH EDITION
1 2 3 4 5 6 7 8 9 LCR 27 26 25 24 23 22
ISBN 978-1-260-59778-3
MHID 1-260-59778-4
The Internet addresses listed in the text were accurate at the time of
publication. The inclusion of a website does not indicate an
endorsement by the authors or McGraw Hill LLC, and McGraw Hill
LLC does not guarantee the accuracy of the information presented at
these sites.
mheducation.com/highered
To Susan and Anne page iii
page iv
ABOUT THE AUTHORS page v
TECHNOLOGY
This book discusses modern digital circuit implementation
technologies. The emphasis is placed on programmable logic devices
(PLDs), which is the most appropriate technology for use in a
textbook for two reasons. First, PLDs are widely used in practice and
are suitable for almost all types of digital circuit designs. In fact,
students are more likely to be involved in PLD-based designs at
some point in their careers than in any other technology. Second,
circuits are implemented in PLDs by end-user programming.
Therefore, students can be provided with the opportunity, in a
laboratory setting, to implement this book's design examples in
actual chips. Students can also simulate the behavior of their
designed circuits on their own computers. We use the two most
popular types of PLDs for targeting of designs: complex
programmable logic devices (CPLDs) and field-programmable gate
arrays (FPGAs).
We emphasize the use of a hardware description language (HDL)
in specifying the logic circuits, because an HDL-based approach is
the most efficient design method to use in practice. We describe in
detail the IEEE Standard VHDL language and use it extensively in
examples.
One-Semester Course
The following material should be covered in lectures:
• Chapter 1—all sections.
• Chapter 2—all sections.
• Chapter 3—sections 3.1 to 3.5.
• Chapter 4—all sections.
• Chapter 5—all sections.
• Chapter 6—all sections.
One-Quarter Course
In a one-quarter course the following material can be covered:
• Chapter 1—all sections.
• Chapter 2—all sections.
• Chapter 3—sections 3.1 to 3.3 and section 3.5.
• Chapter 4—all sections.
• Chapter 5—all sections.
• Chapter 6—sections 6.1 to 6.4.
page ix
VHDL
VHDL is a complex language that some instructors feel is too hard
for beginning students to grasp. We fully appreciate this issue and
have attempted to solve it by presenting only the most important
VHDL constructs that are useful for the design and synthesis of logic
circuits. Many other language constructs, such as those that have
meaning only when using the language for simulation purposes, are
omitted. The VHDL material is integrated gradually, with more
advanced features presented only at points where their use can be
demonstrated in the design of relevant circuits.
The book includes more than 150 examples of VHDL code. These
examples illustrate how VHDL is used to describe a wide range of
logic circuits, from those that contain only a few gates to those that
represent digital systems such as a simple processor.
CAD TOOLS
All of the examples of VHDL code presented in the book are
provided on the authors' website at
www.eecg.toronto.edu/~brown
SOLVED PROBLEMS
The chapters include examples of solved problems. They provide
typical homework problems and show how they may be solved.
page x
HOMEWORK PROBLEMS
More than 400 homework problems are provided in this book.
Answers to selected problems are given at the back. Full solutions to
all problems are available to instructors in the accompanying
Solutions Manual.
Chapter1
INTRODUCTION 1
1.1 Digital Hardware 2
1.1.1 Standard Chips 4
1.1.2 Programmable Logic Devices 4
1.1.3 Custom-Designed Chips 5
1.2 The Design Process 5
1.3 Structure of a Computer 7
1.4 Logic Circuit Design in This Book 10
1.5 Digital Representation of Information 10
1.5.1 Binary Numbers 11
1.5.2 Conversion between Decimal and Binary Systems 13
1.5.3 ASCII Character Code 14
1.5.4 Digital and Analog Information 14
1.6 Theory and Practice 16
Problems 17
Chapter2
INTRODUCTION TO LOGIC CIRCUITS 19
2.1 Variables and Functions 20
2.2 Inversion 23
2.3 Truth Tables 24
2.4 Logic Gates and Networks 25
2.4.1 Analysis of a Logic Network 26
2.5 Boolean Algebra 30
2.5.1 The Venn Diagram 34
2.5.2 Notation and Terminology 38
2.5.3 Precedence of Operations 40
2.6 Synthesis Using AND, OR, and NOT Gates 40
2.6.1 Sum-of-Products and Product-of-Sums Forms 44
2.7 NAND and NOR Logic Networks 50
2.8 Design Examples 54
2.8.1 Three-Way Light Control 55
2.8.2 Multiplexer Circuit 56
2.8.3 Number Display 58
2.9 Introduction to CAD Tools 59
2.9.1 Design Entry 60
2.9.2 Logic Synthesis 61
2.9.3 Functional Simulation 62
2.9.4 Physical Design 62
2.9.5 Timing Analysis 62
2.9.6 Circuit Implementation 63
2.9.7 Complete Design Flow 63
2.10 Introduction to VHDL 63
2.10.1 Structural Specification of Logic Circuits 65
2.10.2 Behavioral Specification of Logic Circuits 69
2.10.3 Hierarchical VHDL Code 70
2.10.4 How not to Write VHDL Code 73
2.11 Minimization and Karnaugh Maps 73
2.12 Strategy for Minimization 81
2.12.1 Terminology 81
2.12.2 Minimization Procedure 83
2.13 Minimization of Product-of-Sums Forms 86
2.14 Incompletely Specified Functions 88
2.15 Multiple-Output Circuits 90
2.16 Concluding Remarks 95
2.17 Examples of Solved Problems 95
Problems 105
References 113
Chapter3
NUMBER REPRESENTATION AND ARITHMETIC CIRCUITS
115
3.1 Positional Number Representation 116
3.1.1 Unsigned Integers 116
3.1.2 Octal and Hexadecimal Representations 116
3.2 Addition of Unsigned Numbers 118
3.2.1 Decomposed Full-Adder 122
3.2.2 Ripple-Carry Adder 122
3.2.3 Design Example 124
3.3 Signed Numbers 124
3.3.1 Negative Numbers 124
3.3.2 Addition and Subtraction 128
Chapter4
COMBINATIONAL-CIRCUIT BUILDING BLOCKS 173
4.1 Multiplexers 174
4.1.1 Synthesis of Logic Functions Using Multiplexers 177
4.1.2 Multiplexer Synthesis Using Shannon’s Expansion 180
4.2 Decoders 184
4.2.1 Demultiplexers 188
4.3 Encoders 188
4.3.1 Binary Encoders 189
4.3.2 Priority Encoders 190
4.4 Code Converters 191
4.5 Arithmetic Comparison Circuits 192
4.6 VHDL for Combinational Circuits 193
4.6.1 Assignment Statements 193
4.6.2 Selected Signal Assignment 194
4.6.3 Conditional Signal Assignment 197
4.6.4 Generate Statements 200
4.6.5 Concurrent and Sequential Assignment Statements
202
4.6.6 Process Statement 203
4.6.7 Case Statement 208
4.6.8 VHDL Operators 210
4.7 Concluding Remarks 215
4.8 Examples of Solved Problems 215
Problems 226
Chapter5
FLIP-FLOPS, REGISTERS, AND COUNTERS 231
5.1 Basic Latch 232
5.2 Gated SR Latch 234
5.2.1 Gated SR Latch with NAND Gates 236
5.3 Gated D Latch 237
5.3.1 Effects of Propagation Delays 239
5.4 Edge-Triggered D Flip-Flops 239
5.4.1 M-S D Flip-Flop 240
5.4.2 Other Types of Edge-Triggered D Flip-Flops 241
5.4.3 D Flip-Flops with Clear and Preset 243
5.4.4 Flip-Flop Timing Parameters 246
5.5 T Flip-Flop 247
5.6 JK Flip-Flop 248
5.7 Summary of Terminology 249
5.8 Registers 249
5.8.1 Shift Register 250
5.8.2 Parallel-Access Shift Register 251
5.9 Counters 252
5.9.1 Asynchronous Counters 252
5.9.2 Synchronous Counters 254
5.9.3 Counters with Parallel Load 258
5.10 Reset Synchronization 260
5.11 Other Types of Counters 261
5.11.1 BCD Counter 261
5.11.2 Ring Counter 262
5.11.3 Johnson Counter 265
5.11.4 Remarks on Counter Design 265
5.12 Using Storage Elements with CAD Tools 265
5.12.1 Including Storage Elements in Schematics 265
5.12.2 Using VHDL Constructs for Storage Elements 268
5.13 Using VHDL Sequential Statements for Registers and
Counters 273
Chapter6
SYNCHRONOUS SEQUENTIAL CIRCUITS 309
6.1 Basic Design Steps 311
6.1.1 State Diagram 311
6.1.2 State Table 313
6.1.3 State Assignment 313
6.1.4 Choice of Flip-Flops and Derivation of Next-State and
Output Expressions 315
6.1.5 Timing Diagram 316
6.1.6 Summary of Design Steps 318
6.2 State-Assignment Problem 322
6.2.1 One-Hot Encoding 325
6.3 Mealy State Model 327
6.4 Design of Finite State Machines Using CAD Tools 331
6.4.1 VHDL Code for Moore-Type FSMs 332
6.4.2 Synthesis of VHDL Code 334
6.4.3 Simulating and Testing the Circuit 335
6.4.4 An Alternative Style of VHDL Code 337
6.4.5 Summary of Design Steps When Using CAD Tools 338
6.4.6 Specifying the State Assignment in VHDL Code 338
6.4.7 Specification of Mealy FSMs Using VHDL 341
6.5 Serial Adder Example 343
6.5.1 Mealy-Type FSM for Serial Adder 343
6.5.2 Moore-Type FSM for Serial Adder 345
6.5.3 VHDL Code for the Serial Adder 347
6.6 State Minimization 351
6.6.1 Partitioning Minimization Procedure 353
6.6.2 Incompletely Specified FSMs 360
6.7 Design of a Counter Using the Sequential Circuit Approach
361
6.7.1 State Diagram and State Table for a Modulo-8 Counter
362
6.7.2 State Assignment 362
6.7.3 Implementation Using D-Type Flip-Flops 363
6.7.4 Implementation Using JK-Type Flip-Flops 365
6.7.5 Example—A Different Counter 368
6.8 FSM as an Arbiter Circuit 371
6.9 Analysis of Synchronous Sequential Circuits 376
6.10 Algorithmic State Machine (ASM) Charts 380
6.11 Formal Model for Sequential Circuits 383
6.12 Concluding Remarks 385
6.13 Examples of Solved Problems 385
Problems 394
Chapter7
DIGITAL SYSTEM DESIGN 399
7.1 Bus Structure 400
7.1.1 Using Tri-State Drivers to Implement a Bus 400
7.1.2 Using Multiplexers to Implement a Bus 402
7.1.3 VHDL Code for Specification of Bus Structures 404
7.2 Simple Processor 408
7.3 A Bit-Counting Circuit 420
7.4 Shift-and-Add Multiplier 425
7.5 Divider 432
7.6 Arithmetic Mean 442
7.7 Sort Operation 445
7.8 Clock Synchronization and Timing Issues 454
7.8.1 Clock Distribution 456
7.8.2 Flip-Flop Timing Parameters 457
7.8.3 Asynchronous Inputs to Flip-Flops 458
7.8.4 Switch Debouncing 459
7.9 Concluding Remarks 461
Problems 461
Chapter8
OPTIMIZED IMPLEMENTATION OF LOGIC FUNCTIONS
465
8.1 Multilevel Synthesis 466
8.1.1 Factoring 467
Chapter9
ASYNCHRONOUS SEQUENTIAL CIRCUITS 521
9.1 Asynchronous Behavior 522
9.2 Analysis of Asynchronous Circuits 525
9.3 Synthesis of Asynchronous Circuits 533
9.4 State Reduction 546
9.5 State Assignment 560
9.5.1 Transition Diagram 563
9.5.2 Exploiting Unspecified Next-State Entries 566
9.5.3 State Assignment Using Additional State Variables 569
9.5.4 One-Hot State Assignment 575
9.6 Hazards 576
9.6.1 Static Hazards 576
9.6.2 Dynamic Hazards 581
9.6.3 Significance of Hazards 583
9.7 A Complete Design Example 583
9.7.1 The Vending-Machine Controller 583
9.8 Concluding Remarks 588
9.9 Examples of Solved Problems 590
Problems 598
C h a p t e r 10
COMPUTER AIDED DESIGN TOOLS 603
10.1 Synthesis 604
10.1.1 Netlist Generation 604
10.1.2 Gate Optimization 604
10.1.3 Technology Mapping 606
10.2 Physical Design 609
10.2.1 Placement 609
10.2.2 Routing 611
10.2.3 Timing Analysis 613
10.3 Concluding Remarks 616
References 616
C h a p t e r 11
TESTING OF LOGIC CIRCUITS 617
11.1 Fault Model 618
11.1.1 Stuck-at Model 618
11.1.2 Single and Multiple Faults 619
11.1.3 CMOS Circuits 619
11.2 Complexity of a Test Set 619
11.3 Path Sensitizing 621
11.3.1 Detection of a Specific Fault 623
11.4 Circuits with Tree Structure 625
11.5 Random Tests 626
11.6 Testing of Sequential Circuits 629
11.6.1 Design for Testability 629
11.7 Built-in Self-Test 633
11.7.1 Built-in Logic Block Observer 637
11.7.2 Signature Analysis 639
11.7.3 Boundary Scan 640
11.8 Printed Circuit Boards 640
11.8.1 Testing of PCBs 642
11.8.2 Instrumentation 643
11.9 Concluding Remarks 644
Problems 644
References 647
AppendixA
VHDL REFERENCE 649
A.1 Documentation in VHDL Code 650
A.2 Data Objects 650
A.2.1 Data Object Names 650
A.2.2 Data Object Values and Numbers 650
A.2.3 SIGNAL Data Objects 651
A.2.4 BIT and BIT VECTOR Types 651
A.2.5 STD LOGIC and STD LOGIC VECTOR Types 652
A.2.6 STD ULOGIC Type 652
A.2.7 SIGNED and UNSIGNED Types 653
A.2.8 INTEGER Type 653
A.2.9 BOOLEAN Type 654
AppendixB
IMPLEMENTATION TECHNOLOGY 701
B.1 Transistor Switches 702
B.2 NMOS Logic Gates 704
B.3 CMOS Logic Gates 707
B.3.1 Speed of Logic Gate Circuits 714
B.4 Negative Logic System 715
B.5 Standard Chips 718
B.5.1 7400-Series Standard Chips 718
B.6 Programmable Logic Devices 720
B.6.1 Programmable Logic Array (PLA) 721
B.6.2 Programmable Array Logic (PAL) 723
B.6.3 Programming of PLAs and PALs 725
B.6.4 Complex Programmable Logic Devices (CPLDs) 727
B.6.5 Field-Programmable Gate Arrays 731
B.7 Custom Chips, Standard Cells, and Gate Arrays 736
B.8 Practical Aspects 738
B.8.1 MOSFET Fabrication and Behavior 738
B.8.2 MOSFET On-Resistance 742
B.8.3 Voltage Levels in Logic Gates 743
B.8.4 Noise Margin 745
B.8.5 Dynamic Operation of Logic Gates 746
B.8.6 Power Dissipation in Logic Gates 749
B.8.7 Passing 1s and 0s Through Transistor Switches 751
B.8.8 Transmission Gates 753
B.8.9 Fan-in and Fan-out in Logic Gates 755
B.8.10 Tri-state Drivers 759
B.9 Static Random Access Memory (SRAM) 761
B.9.1 SRAM Blocks in PLDs 762
B.10 Implementation Details for SPLDs, CPLDs, and FPGAs 763
B.10.1 Implementation in FPGAs 771
B.11 Concluding Remarks 773
B.12 Examples of Solved Problems 773
Problems 780
References 790
ANSWERS 791
INDEX 805
page xvi
page xvii
page xviii
page 1
chapter
1
INTRODUCTION
CHAPTER OBJECTIVES
I think I have already said that I had an uncle in Peru whom I was
anxious to find during my stay in Callao. In the little time that the
smuggling had left me for my own leisure, I had been fortunate
enough to find him, and on the following day, when he came to see
me, he told me that he could find me plenty of work in Lima, if I cared
to leave the ship. This was just the chance I wanted, as I was always
ready for adventure or change, so I did not take long to make up my
mind to run away the first opportunity that should come across my
path.
The next day being Sunday I rowed the captain ashore in the
morning, and he ordered me to come for him at ten that night. He
was going to spend the day at the agent’s, and in the afternoon they
were all going to see a Spanish bull fight, a sight which our captain
was very partial to. I returned to the ship, informed the mate of the
time the captain wanted the boat, and then went to my berth. As I
was generally up half the night, I was allowed to rest and sleep
during the afternoon, so I knew no remarks would be passed at my
being in my berth. Here I gathered a few things together and made
them into a small bundle, got what money I possessed, and then
watched my opportunity and placed everything in the boat all ready.
At nine o’clock I got into the boat and started to row towards the
landing-place without a single regret at leaving the “Stormy Petrel.”
When I got well away from the ship, I altered my course and pulled
over towards the beach just off the Pacific S.S. Company’s Engine
Works. Here I got out of the boat, threw one oar overboard, and
pushing the boat out into the bay let her drift wherever she liked.
Making my way to the railway station I took a ticket for Lima, the
capital. Here I ran a great risk of meeting the captain, but my usual
good luck favoured me again. When I arrived at Lima I at once made
my way to my uncle’s house, and kept in hiding for two weeks. Then
he took me to some friends of his own, who had a place a few miles
out of Lima, there to await the ship’s departure.
A few words here about Peru will, I think, not be amiss, although it
was some time later before I learnt what an interesting place it was.
The name at once brings back to memory the fascinating history of
the Inca kings, of the fabulous wealth of cities paved with gold, the
gorgeous temples, the tropical forests, and the brave exploits of that
great pirate chief Pizarro. It is in itself a remarkable country. Situated
on the western side of the Andes mountains, and bounded on the
north by Eucador, on the east and south by Brazil, and on the west
by the Pacific Ocean, the Andes run north and south, dividing the
country into high and low Peru. Between the mountains and the
coast lies Low Peru, forming an inclined plane from thirty to sixty
miles in breadth, which is mostly a sandy barren desert, owing to the
total absence of rain, and the climate here is very torrid. Above six
thousand feet of altitude vegetation flourishes, and at about ten
thousand feet, a mixture of perpetual spring and autumn prevails,
and here there are frequent showers of rain. At an altitude of
fourteen thousand feet the snow line is reached, and there the snow
is to be seen all the year round, although the successive summers’
heat do their best to melt both ice and snow. The only animals I ever
met with were the llama, guanaco, vicuna, and the alpaca, but in the
woods there are the jaguar, puma and several other wild animals. In
the woods, up the mountains are found many very beautiful birds,
and the rivers swarm with fish and alligators. In the warmer regions,
up on the mountains where there is rain there is also an abundance
of maize, cotton, indigo, yams, cocoa, tobacco, some very fine fruits,
bark, vanilla sarsaparilla, and many other things. The mountainous
districts are rich in metals, gold, silver, copper, lead ore, white silver
ore, and in places virgin silver in threads, tin, quicksilver, coal and
nitrate of soda. Emeralds and other precious stones are also found,
also the stone of the Incas, a marcasite, capable of the highest
polish. When first discovered by the Spanish, the Peruvians were
intellectually far in advance of any other race on the American
continent. They knew the arts of architecture, sculpture, mining, the
working of precious metals and jewels, they cultivated their land,
they were properly clothed, and had a regular system of government,
and both civil and religious laws. It was in the year 1821 that, tired of
the tyranny and intolerance of Spain, they revolted, and again
achieved their independence.
The glamour of those ancient days lingers around the capital of
Lima, but the illusion disappears quickly with a glimpse at the
Spanish capital, its narrow streets paved with cobble stones, its
numerous churches gaudy with coloured plaster and florid carvings.
The only attraction in Lima is found in the Cathedral Plaza. Here
the Gothic cathedral with its façade of innumerable pillars and carved
figures of saints, stands raised on a wide platform. The bronze bells
hung in either tower send forth mellow and sonorous tollings, but the
shadow of decay that lies like a blight over all things in Peru has laid
its hand on this imposing looking structure, and it cannot be entered
for fear the roof should fall in. But Peru has no money to spare even
to repair this, the chief place of worship of the faithful. The cathedral
and the archbishop’s palace take up the whole of the east side of the
Plaza, on the north side are the Viceroy’s Palace, Courts of Justice
and Public Offices, while on the west side are the Town Hall and City
Prison, and on the south side there are large private houses with
stone fronts and massive porticoes. A curious feature of their
domestic architecture are the “miradors” or carved wooden
balconies, projecting over the street from the second story of the
houses. From the seclusion of these lattice woodwork structures,
seeing, yet not seen, the Spanish ladies watch the life in the streets
below. During carnival week Lima is given up to wild revelry for three
days and the “miradors” are put to some curious uses, one being to
rain down water from a jug or basin on to the heads of the passers
by. All this gaiety, however, ends on Shrove Tuesday, and Ash
Wednesday sees the churches filled with black-robed women.
In the centre of the Plaza stands a very ornamental and massive
band-stand, where the town band plays choice selections every
evening from six until ten o’clock. Here all the beauty and talent of
the city gathers, and promenades up and down in the cool piazzas to
the strains of the music. Here the young, dark-eyed Castilian
beauties, under the protection of a black-hooded duenna stroll
demurely through the arcades, the transparency of the lace mantilla
heightening the charm of their liquid eyes, as with coquettish airs and
graces they peep from behind their beautiful fans, flirting with the
young hidalgos as they pass.
I spent three weeks altogether in Lima. The first was given entirely
to roaming about the city. It was, of course, all new, strange and
interesting to me, and I soon found that it was not nearly so large as
it looked, as every transverse street revealed the mountains at their
extremity, and the peaked foothills that fill the plain round the city.
Flagstaffs and crosses seem to be a kind of natural emblem, the
flagstaffs are used for decorating the streets with flags on Sundays
and festivals, and the latter satisfy the superstitious inclinations of
the people, who imagine that the shadow of a cross protects and
blesses the household. Most of the houses are built of wood and
adobe, the mud brick of the country; it is used for the houses, the
public buildings, and the churches; when these are plastered over
with mud plaster, they look like a whitewashed wall left in its natural
state, but it is simply a mud wall. The same material is used for the
very startling coloured fronts of the churches and the interiors, with
their cheap velveteen hangings, glass chandeliers, and gaudy paper
flowers are worthy of the exterior.
The Column of Victory with its handsome bas-relief surrounding
the base, in memory of the repulsed invasion of the Spaniards in
1866 is worthy of better surroundings than the one storied adobe
dwellings amongst which it stands.
I found the native police a constant source of amusement. Each
man is armed with a side sword and musket, a chair is placed on his
beat for him to sit upon when he is tired, and when on night duty, he
sits and sleeps most of the time, while his wife sits on the ground at
his side. Gangs of British and American seamen play all manner of
tricks upon them, one being to tie them to the chair without their
knowing it, and also if the wife is asleep too they try to fasten her
with a rope to the sleeping husband, then they would steal the
muskets from them, and decamp, and after a while one of the
number would return to find the sleepers awake and trying frantically
to get loose and follow the intruders whose part in the escapade was
to start running away as soon as the policeman caught sight of them.
Needless to say they were never caught.
After a delightful three weeks spent between Lima and some
friends who lived a few miles out, my uncle sent me word that my
ship had sailed, and, as I had enjoyed my holiday, and seen all there
was to be seen in the capital of Peru, and now felt ready for work, he
proposed to introduce me to the officials of the famous Oroya
Railway then in course of construction from Monserrat on the
outskirts of Lima, over the Andes Mountains, through the valley of
the River Rimac, and down the eastern slope to the Indian City of
Oroya at the headwaters of the Amazon. I was delighted, and
thanked him most heartily. I said good-bye to the friends I had been
staying with, also to the dark-eyed little Peruvian signorita, to whose
charms my boyish heart had fallen a victim, and met my uncle at
Lima. He at once took me to the superintendent of the Oroya who
engaged me to work on the bridges as a rigger of scaffolding, etc.,
and I was told to be ready to go up the mountain on the following day
with a breakdown gang.
CHAPTER XIII