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Investigating D-Type Flip-flops

Activity 1

To explore the properties of a D Type flip-flop (4013)

What to do

 Look up the 4013 in the CMOS catalogue and label the pin numbers on the diagram
above that you are going to use. Don’t forget to add in the power! We are only
going to use one half of the 4013 i.e. one of the D types in the 4013 which has two of
them (hence the term dual!).
 Connect up the switch and test with a logic probe so that when you slide the switch
to ‘ON’ the outputs of the switch go ‘high’ and when you slide it back go low again.
 Construct the rest of the circuit and test by:

1. Making DATA, CLOCK and ‘SET’ low. Put RESET ‘high’. This should make  (NOT
Q) =1 and Q = 0
2. Put Reset ‘low’ and Set ‘High’. This should make  (NOT Q) =0 and Q=1.

 Complete the truth table below. Note : X means don’t care states.
 Step CLOCK DATA SET RESET Q 
number (Not Q)
0 X X 1 0
1 X X 0 1
2 0 0 0 0
3 0 1 0 0
4 1 1 0 0
5 0 1 0 0
6 0 0 0 0
7 1 0 0 0
8 1 1 0 0

Conclusions :

About Set?

About Reset?

About Data?

About Clock?

About Q?

About  ?

Complete the passage

When SET is 1, Q is _________. When RESET is 1, Q is ________. In normal use both SET
and RESET are held at logic _______. When the CLOCK rises from _______ to _________,
Q becomes the same as ______ and  becomes the opposite of ______. Otherwise
both Q and  don’t change regardless of what happens to ___________.