TEMASEK POLYTECHNIC

SCHOOL OF ENGINEERING

AY 2021/2022 TERM TEST

(April Semester)

DIGITAL FUNDAMENTALS 1 (EEE1003)

SUBJECT LEVEL : 1

TIME ALLOWED : 1 HOUR

INSTRUCTIONS TO CANDIDATES
EXAMINER’S
1. This paper consists of 9 pages (excluding cover page). QUESTION
USE ONLY
ANSWERED
MARKS
2. This paper consists of 5 questions. Answer ALL the
questions. Q1 / 10

3. Write your answers directly on this paper. If there is

Q2 / 10
insufficient space, write your answer at the blank back pages. Q3 / 10
Label your answer clearly and cross out whatever answer
that is not required for marking. Q4 / 11

4. Write your admission number on the space provided at the Q5 /9

top right corner of ALL pages.
TOTAL / 50
5. Do not tear out or remove any page from this question
paper. It is your responsibility to ensure that all the pages of this paper are intact during submission

6. DO NOT REMOVE THIS SET OF QUESTION PAPER FROM THE TEST VENUE.

7. Write your admission number, course of study, tutorial group and seat number in the space provided
below:

Admission No. Course of Study Tutorial Group Seat No.

Digital Fundamentals 1 (EEE1003)

 Admission No.: __________________

Do not
Answer ALL the questions. write on
this
Q1. a. Refer to the digital waveform shown in Figure Q1. margin
Volt

5V

time
0V
0 25ms 40ms 65ms 80ms

Figure Q1

i. Determine the pulse width, period, frequency and duty cycle of the
waveform. Show workings where necessary. [4 marks]

Pulse Width = 15ms

4
Period = 40ms
Frequency = 1/(40m) Hz = 25 Hz
Duty cycle = 15ms/40ms x 100% = 37.5%

Pulse Width = ___________ ; Period = ________________

Frequency = _____________; Duty cycle = _____________

ii. Determine the number of bits transmitted in one complete cycle of

the waveform if the bit rate is 4000 bits per second. Show all
workings clearly. [2 marks]

1 bit time is 1/4000 bits = 0.25ms 2

Total number of 1bits
period
in 1 =period
40ms = 40/0.25 = 160

Digital Fundamentals 1 (EEE1003) Page 1

 Admission No.: __________________
Do not
b. Convert 11001102 to decimal. Show all workings clearly. [2 marks] write on
this
margin
1 1 0 0 1 1 02 = 64 + 32 + 4 +2 = 10210 or 102
26 25 24 23 22 2 1

c. Convert 18810 to binary. Show all workings clearly. [2 marks]

188 10 = __1_ _0 _1_ _1_ _1_ _1_ _0_ _0 2

2 7 26 2 5 24 2 3 22 2 2 0
2

10
Digital Fundamentals 1 (EEE1003) Page 2
 Admission No.: __________________

Q2. a. Complete Table Q2 for X = A . C+ A . B .(C+ D) . [2 marks]

Inputs Output
A B C D X
1 0 0 0 1
1 0 1 0 1
Table Q2 2
b. Draw the logic circuit of X = A . C+ A . B .(C+ D). Do not simplify X.
[4 marks]

C B

A
X

A
4
D

c. Simplify X = A . C+ A . B .(C+ D) using Boolean Algebra rules and De-

Morgan’s theorem. Your answer should require the least number of logic
gates to implement. You do not need to draw the simplified logic circuit.
[4 marks]

X= A . C+ A . B . ( C + D )= A .C + A . B . C D 4
¿ A . ( C+ B C D )= A (C + B . D )=A C(B+ D)

Digital Fundamentals 1 (EEE1003) Page 3 10

 Admission No.: __________________

Q3. a. Obtain the simplified expressions for the Karnaugh maps shown in
Figure Q3-1 and Q3-2 respectively. Show all the loops clearly. [6 marks]

Figure Q3-1 Figure Q3-2

6
Ans: _________________________ Ans:
______________________

ABCD ABCD ABCD

0100 0000 0000
ABCD
0101 0001 0100
0000 0111 0100 0010
0001 0110 0101 0110
1100 AC AD
0011 AB D
1101
0010 1111
A C 1110
Digital Fundamentals 1 (EEE1003) B Page 4
 Admission No.: __________________
AB

Do not
b. Table Q3 shows the truth table of a digital system. write on
this
Inputs Output margin
A B C Y
0 0 0 0
0 0 1 0
0 1 0 1
0 1 1 1
1 0 0 0
1
1
0
1
1
0
0
1
Table Q3 2
1 1 1 1
i. Write down the SOP
of Y in terms of its inputs A, B and C. [2 marks]

SOP of Y = A . B .C + A . B . C+ AB C+ ABC

ii. Plot and clearly label the Karnaugh map for the Y output. You are
not required to derive the simplified SOP of Y output. [2 marks]

AB C 0 1
00 0 0
01 1 1
11 1 1
10 0 0

10
Digital Fundamentals 1 (EEE1003) Page 5
 Admission No.: __________________

Do not
Q4. a. Refer to the circuit shown in Figure Q4-1. Draw the Q and R waveforms write on
for the given input waveforms at A, B and C in Figure Q4-2. [6 marks]
this
margin
A Q

C R

Figure Q4-1

Figure Q4-2 6

Digital Fundamentals 1 (EEE1003) Page 6

 Admission No.: __________________

Do not
b. Figure Q4-3 shows a block diagram of a door lock control circuit. A 2A1A0 write on
is the 3-bit preset code and B2B1B0 is the 3-bit user input. The door this
unlocking signal, W, needs a logic ‘1’ to unlock the door. The door margin
unlocks only when B2 = A2 and B1 = A1 and B0 = A0. Design and draw the
door lock control circuit to control W output. [5 marks]
B2
B1
B0 Door Lock control W
A2 circuit
A1
A0

Figure Q4-3

2 possible solutions

Digital Fundamentals 1 (EEE1003) Page 7 11

 Admission No.: __________________

Do not
Q5. A combinational logic circuit shown in Figure Q5 produces an output Z write on
according to Table Q5-1. Complete Table Q5-2. Design and draw the this
combinational logic circuit to control Z output. Use a maximum of three margin
additional 2-input gates to implement your circuit. Show your workings.
[9 marks]

S
Combinational
P Q Logic Z
A Circuit

Figure Q5

S P Z OUTPUT
0 0 Z=AQ

0 1 Z= A .(P ⊕ Q)

1 0 Z=Q

1 1 Z= A PQ

Table Q5-1

S P A Q Z
0 0 0 1 0
0 0 1 1 1
0 1 0 1 1
0 1 1 0 0
1 0 0 1 1
1 0 1 1 1
1 1 0 1 1
1 1 1 0 0
0 0 0 0 x Z=x
0 0 1 0 x because Q
0 1 0 0 x should be 1
Other Input 0 1 1 1 x when AP =
1 0 0 0 x 00/01/10.
combinations 1 0 1 0 x Q should
Digital Fundamentals 1 (EEE1003)
1 1 0 0 x bePage 8
0 when
1 1 1 1 x AP = 11.
 Admission No.: __________________

Table Q5-2
Do not
Draw your combinational logic circuit design below and show all workings. write on
this
margin

Z=PQ + SQ + AQ
Z = Q(P+S+A)

9
Digital Fundamentals 1 (EEE1003) Page 9
 Admission No.: __________________

END OF PAPER

Digital Fundamentals 1 (EEE1003) Page 10