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FlashLoader - Status Information

NAME SIGNATURE
Author Richard DIOT Has signed

Approver Has signed

DELPHI confidential
"All rights reserved. No part of this publication may be reproduced in any material form (including photocopying or storing in any medium by electronic means and
whether or not transciently or incidentally for some other use of this publication) without the written permission of Delphi."
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HISTORY OF THE DOCUMENT

Edition Date Nature of the modification Author Approved by

0.1 12/04/2007 First edition Richard DIOT
0.2 20/04/2007 Comments Daniela Wiese
Oliver Vautländer
0.3 15/05/2007 Clarification about SW/SW and HW/HW Richard DIOT
mismatch strategy added ; new chapter 9
created.
0.4 21/05/2007 Modifications according remarks from Oliver Richard DIOT
Paulus.
2.0 02/08/2007 Labels to track the customer requirements are Richard DIOT Gilles MORVAN
added.
3.0 15/10/2007 Check between the Boot Manager and the Flash R.DIOT G.MORVAN
Loader is changed to a HW/SW mismatch.
Additionnal HW/SW check is implemented
when the Code doesn’t match with the
hardware.
4.0 17/03/2008 Functional change due to FDS22411 : R.DIOT
Flash Loader software mismatch is added

DELPHI confidential
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whether or not transciently or incidentally for some other use of this publication) without the written permission of Delphi."
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CONTENTS
1. PURPOSE........................................................................................................................................................................................ 4
2. SCOPE ............................................................................................................................................................................................. 4
3. REFERENCES................................................................................................................................................................................ 4
4. CONVENTION ............................................................................................................................................................................... 4
5. STATUS INFORMATION BYTE DEFINITION........................................................................................................................ 4
6. CRC32 AND SIGNATURE CHECK ( bit 0 )............................................................................................................................... 5
7. SW/SW MISMATCH CHECK ( bit 1 ) ........................................................................................................................................ 5
8. HW/SW MISMATCH CHECK ( bit 2 )........................................................................................................................................ 8
9. IMMOBILIZER ACTIVATING PROCEDURE....................................................................................................................... 12

DELPHI confidential
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whether or not transciently or incidentally for some other use of this publication) without the written permission of Delphi."
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1. PURPOSE
This document describes the management of the Status Information byte when logical blocks are
reprogrammed.
REQ_B_B_ECU_IDENTIFICATION_15/01

2. SCOPE
This specification is applied to the DC project.

3. REFERENCES
For definitions, see document R6000001: Glossary of Software and Electronic Terms.
For diagram symbols, see document R6510006: Symbol Diagram Glossary.

Ref[1] : R6512260 Reprogramming Security Class DC.

Ref[2] : Diagnostic Calibration Guide.

4. CONVENTION
-ECU stands for Engine Control Unit.
-BM stands for Boot Manager.
-FL stands for Flash Loader.
-CODE stands for Code part.
-DATA stands for Data part.

5. STATUS INFORMATION BYTE DEFINITION

The information of the logical block status is contained into the Status Information byte.
Each logical block owns a status :

Status Information – Logical Block #0 –

FlashLoader / F_L_Status_0_nvv
Bit 0 – Software Programmed And Valid
(software valid = 1, software invalid = 0)
Bit 1 – Software – Software Mismatch
(Mismatch occurred = 1, no Mismatch = 0;
Bit 2 – Software – Hardware Mismatch
(Mismatch occurred = 1, no Mismatch = 0;
Bit 3 to 7 – reserved (0)

Status Information – Logical Block #1 –

Code / F_L_Status_1_nvv
Bit 0 – Software Programmed And Valid
(software valid = 1, software invalid = 0)
Bit 1 – Software – Software Mismatch
(Mismatch occurred = 1, no Mismatch = 0;
Bit 2 – Software – Hardware Mismatch

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(Mismatch occurred = 1, no Mismatch = 0;

Bit 3 to 7 – reserved (0)

Status Information – Logical Block #2 –

Data / F_L_Status_2_nvv
Bit 0 – Software Programmed And Valid
(software valid = 1, software invalid = 0)
Bit 1 – Software – Software Mismatch
(Mismatch occurred = 1, no Mismatch = 0;
Bit 2 – Software – Hardware Mismatch
(Mismatch occurred = 1, no Mismatch = 0;
Bit 3 to 7 – reserved (0)

The Status Information is reported in the read fingerprint positive response.

Thus it is possible to know the reprogramming state of a logical block by reading the fingerprint.

Bit 0:
Apply for all logical blocks.
A software is declared as Programmed if the CRC32 and signature check are both ok. If it is the case the bit
0 is set to 1. If Code or Data is not present or if the check is failed then this bit is set to 0.

See chapter 6.

Bit 1:

See chapter 7.

Bit2:

See chapter 8.

The Status Information of the logical block that has been reprogrammed is updated before sending the
positive response of the Check Routine request.

6. CRC32 AND SIGNATURE CHECK ( bit 0 )

See Ref[1] document.

REQ_B_B_GEN_REQUIREMENT_08/01
REQ_B_B_BOOTBLOCK_REQUIREMENT_09/01

7. SW/SW MISMATCH CHECK ( bit 1 )

There are 3 types of SW/SW mismatch depending on which logical block has been flashed.

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whether or not transciently or incidentally for some other use of this publication) without the written permission of Delphi."
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When a Data is flashed : SW/SW_2

The first five ascii bytes of APP_DATA_VERSION_APV[0 to 4] are compared to the first five ascii bytes
of APP_CODE_VERSION_CODE_CPV[0 to 4].
The code version name begins either with the letter S or T or with the pattern CRD2-651-T or CRD2-651-S.
( S for Piezzo and T for Solenoid ).

When a Code is flashed : SW/SW_1

The 4 bytes of APP_CODE_SW_MISMATCH are compared to the 4 bytes of F_L_FLASH_SW_MISMATCH.

When a Flash Loader is flashed : SW/SW_0 ( this check is activated within Flash Loader SM05B005 and only if
the ECU is running on SERIAL mode ).
The old Flash Loader ( at least SM05B005 version ) checks if the flashed Flash Loader is incompatible. Here is the
incompatible Flash Loader list :

F_L_FLASH_VERSION_CPV
SM05B001 incompatible
SM05B002 incompatible
SM05B003 incompatible
SM05B004 Incompatible

If the flashed Flash Loader is not compatible, then a software mismatch is raised.

Boot Manager ( fixed )

SM05A001… B_M_BOOT_VERSION_CPV

Logical Block #0 FlashLoader

SM05B001… F_L_FLASH_VERSION_CPV SW/SW_0

0x87654321 F_L_FLASH_SW_MISMATCH SW/SW_1

Logical Block #1 Code

SMA70D1… or
CRD2-651-SMA70D1 APP_CODE_VERSION_CPV SW/SW_2
0x87654321 APP_CODE_SW_MISMATCH SW/SW_1

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Logical Block #2 Data

SMA70 APP_DATA_VERSION_APV SW/SW_2

Here is the SW/SW mismatch process :

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Start of SW/SW Mismatch check

SW/SW
mismatch

no i=0
Serial mode ? Logical block i=2
#i ?

i=1

SW/SW_0 ok no SW/SW_1 ok no SW/SW_2 ok no

? ? ?

Set Set Set

F_L_Status_0_nvv F_L_Status_1_nvv F_L_Status_2_nvv
bit 1 to 1 bit 1 to 1 bit 1 to 1

Set Set Set

F_L_Status_0_nvv F_L_Status_1_nvv F_L_Status_2_nvv
bit 1 to 0 bit 1 to 0 bit 1 to 0

End of SW/SW mismatch check

REQ_B_B_SOFTWARE_PARTITIONING_07/01

8. HW/SW MISMATCH CHECK ( bit 2 )

HW/SW check means Vehicle-ECU / SW check.

There are 3 HW/SW mismatch depending on what has been flashed.

When a Data is flashed : HW/SW_3

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This test is done only if a stored logical variant exist ( F_L_LOGICAL_VARIANT_NVV != $FFFFFFFF )
and is different to $00000000 (development).
A stored logical variant exist if the immobilizer has been activated.
A variant coding writing has to be done before the immobilizer activation.
When the immobilizer is activated, the value of the current logical variant from Data (
APP_LOGICAL_VARIANT_APV ) replaces the EEPROM stored logical variant default value.

See Chapter 9 that defines the immobilizer activation process.

See Ref[2] that defines the APP_LOGICAL_VARIANT_APV.

Then the current logical variant of Data is compared to the stored logical variant.

When a Code is flashed : HW/SW_2

This mismatch takes place when the code doesn’t match with the ECU hardware, for example if a Piezzo
Code is flashed on a Solenoid ECU.
To do that the Flash Loader thanks to the hardware tag knows the ECU hardware version and compare it to
the code version name APP_CODE_VERSION_CPV .
The code version name begins either with the letter S or T or with the pattern CRD2-651-T or CRD2-651-S.
( S for Piezzo and T for Solenoid ).

When a Flash Loader is flashed : HW/SW_1

The first four ascii bytes of the Flash Loader version F_L_FLASH_VERSION_CPV[0 to 3] are compared
to the first four ascii bytes of the B_M_BOOT_VERSION_CPV[0 to 3] and a mismatch is raised if it is
different.

Example :

Boot Manager ( fixed )

SM05A001… B_M_BOOT_VERSION_CPV HW/SW_1

Logical Block #0 FlashLoader

SM05B001… F_L_FLASH_VERSION_CPV HW/SW_1

0x87654321 F_L_FLASH_SW_MISMATCH

ECU Variant ( S or T ) from

S the Hadware Tag reading HW/SW_2

Logical Block #1 Code

SMA70D1… or
CRD2-651-SMA70D1 APP_CODE_VERSION_CPV HW/SW_2

0x87654321 APP_CODE_SW_MISMATCH

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Logical Block #2 Data

current_logical_variant
$00044441 (APP_LOGICAL_VARIANT_APV) HW/SW_3

EEPROM data ( never erased )

$FFFFFFFF default_logical_variant
or or stored_logical_variant
$00044441 (F_L_LOGICAL_VARIANT_NVV) HW/SW_3

Here is the HW/SW mismatch process :

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Start of HW/SW Mismatch check

HW/SW
mismatch

i=0 Logical block i i=1

?

HW_SW_2 ok yes
i=2 ? (5)

default logical variant

is present (1 ) or stored
logical variant ==
$00000000 (2) ?
yes

HW_SW_1 ok ?
(4)

no

no current logical
variant == stored no
logical variant
? (3)

Set Set Set

F_L_Status_0_nvv F_L_Status_2_nvv F_L_Status_1_nvv
bit 2 to 1 bit 2 to 1 bit 2 to 1

yes

Set Set Set

F_L_Status_0_nvv F_L_Status_2_nvv F_L_Status_1_nvv
bit 2 to 0 bit 2 to 0 bit 2 to 0

End of HW/SW mismatch check

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(1) : The FL checks if F_L_LOGICAL_VARIANT_NVV == $FFFFFFFF . To do that one table

containing the start address and the length of the data F_L_LOGICAL_VARIANT_NVV is
located at the beginning of the Data area.
(2) : The FL checks if F_L_LOGICAL_VARIANT_NVV == $00000000.
(3) : The FL checks if APP_LOGICAL_VARIANT_APV== F_L_LOGICAL_VARIANT_NVV.
(4) : The FL checks the version of the Boot Manager.
(5) : The FL checks the Hardware version of the ECU and Code.

9. IMMOBILIZER ACTIVATING PROCEDURE

Here are the different steps that should be followed in vehicle production line for one vehicle :

Step0 :
The ECU contains a Boot Manager and a Flashloader. Their versions match : “version_boot” is the same for
both.
Step1 :
A Code is flashed ; the “c_version_boot” of the Code match with the “fl_version_boot” of the Flashloader.
Step2 :
A Data is flashed ; the “d_version_appli” of the Data match with the “c_version_appli” of the Code.
Step3 :
The application is running :
Variant coding and other data are writen into the ECU.
The variant coding string should contain the same information that are present in the data
APP_LOGICAL_VARIANT_APV !!!.
Step4 :
The tool sends the immobilizer activation request :
--a/.the application activates the immobilizer.
--b/.if F_L_LOGICAL_VARIANT_NVV == $FFFFFFFF then go on step c else go on step d.
--c/.writes the value of APP_LOGICAL_VARIANT_APV into F_L_LOGICAL_VARIANT_NVV.
--d/.the application sends the immobilizer activation positive response.

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