DAPHNE

Integrated Data Analysis Pipelines for

Large-Scale Data Management, HPC, and Machine Learning

History of Changes
Date Description
2020-05-21 Corrections of deliverable types (consistent with existing description): D1.2
RORDP, D3.4 DEMR, D4.1 DEMR, D4.3 DEMR, D10.3 RDEM;
Changed deliverable dissemination level: D10.1/D.10.2 PU CO.
2020-05-21 Removed proposal content according to Grant Agreement instructions to avoid
unnecessary redundancy regarding Part A; minor formatting and rewording.
2020-05-21 Added explicit commitment to support BDVA in all events relevant to the
activities of the project (Section 2.2.1)

Table of Content
1 EXCELLENCE ........................................................................................................................................................ 2
1.1 OBJECTIVES ....................................................................................................................................................... 2
1.2 RELATION TO THE WORK PROGRAM .................................................................................................................. 4
1.3 CONCEPT AND METHODOLOGY .......................................................................................................................... 5
1.4 AMBITION ........................................................................................................................................................ 14
2 IMPACT ................................................................................................................................................................. 20
2.1 EXPECTED IMPACTS ......................................................................................................................................... 20
2.2 MEASURES TO MAXIMIZE IMPACT ................................................................................................................... 23
3 IMPLEMENTATION ........................................................................................................................................... 28
3.1 WORK PLAN..................................................................................................................................................... 28
3.2 MANAGEMENT STRUCTURE, AND PROCEDURES ............................................................................................... 30
3.3 CONSORTIUM AS A WHOLE .............................................................................................................................. 34
3.4 RESOURCES TO BE COMMITTED ....................................................................................................................... 35
4 MEMBERS OF THE CONSORTIUM ................................................................................................................ 36
4.1 PARTICIPANTS .................................................................................................................................................. 36
4.2 THIRD PARTIES INVOLVED IN THE PROJECT (INCLUDING USE OF THIRD-PARTY RESOURCES) ............................ 78
5 ETHICS AND SECURITY ................................................................................................................................... 79
5.1 ETHICS ............................................................................................................................................................. 79
5.2 SECURITY......................................................................................................................................................... 79

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1 Excellence
1.1 Objectives
Motivation: Over the last decade, increasing digitization efforts, sensor-equipped everything, and
feedback loops for data acquisition led to increasing data sizes and a wide variety of valuable, but
heterogeneous data sources. Modern data-driven applications from almost every domain aim to
leverage these large data collections in order to find interesting patterns, and build robust machine
learning (ML) models for accurate predictions. Together, large data sizes and complex analysis
requirements, spurred the development and adaption of data-parallel computation frameworks like
Apache Spark1, Flink2 and Beam3, as well as distributed ML systems like TensorFlow4, Spark MLlib5,
SystemML6, and PyTorch7 on the one hand on the one hand. A key observation is that these novel
distributed systems share many compilation and runtime techniques with traditional high-
performance computing (HPC) systems but are geared toward distributed data analysis pipelines and
training and scoring of ML models On the other hand, the on-premise cluster hardware, or provisioned
clouds, for these data management (DM), HPC, or ML systems converges more and more; often
relying on cost-effective two-socket servers partially equipped with GPUs (graphics processing units)
or custom ASICs (application-specific integrated circuits). Yet, the programming paradigms,
cluster resource management, as well as data formats and representations differ substantially
across data management, HPC, and ML software stacks. This difference can be attributed to their
origins in distinct research communities. Interestingly though, there is a trend toward complex data
analysis pipelines that combine these different systems8,9. Examples are workflows that leverage
distributed data integration, cleaning, and pre-processing, tuned HPC libraries for sub tasks, and
dedicated ML systems, but also classical HPC applications that leverage ML models for more cost-
effective simulation10 or computation without much accuracy degradation. Unfortunately, community
efforts alone, like projects at application level, centers of excellence, hubs, and workshops, will
unlikely consolidate these disconnected software stacks. Therefore, this project aims – with a joint
consortium of experts from the data management, ML systems, and HPC communities – at
systematically investigating the necessary system infrastructure, language abstractions, compilation
and runtime techniques, as well as systems and tools necessary to increase the productivity when
building such data analysis pipelines, and eliminating unnecessary performance bottlenecks.
Challenges and Scope: In the context of these trends toward integrated data analysis pipelines and
augmentation of HPC with ML models, we observe the following three major obstacles that stand in
the way of more rapid progress at application level and toward a more sustainable infrastructure.

 Productivity and Systems Support: Integrated, complex pipelines that involve data
integration, cleaning, and preparation, machine learning model training and scoring, as well
as high-performance libraries still requires substantial manual effort, often by specialized
teams that are unavailable to small and medium-sized enterprises. This is due to different
1
Matei Zaharia et al.: Resilient Distributed Datasets: A Fault-Tolerant Abstraction for In-Memory Cluster Computing.
NSDI 2012, pages 15-28.
2
Alexander Alexandrov et al: The Stratosphere platform for big data analytics. VLDB J. 23(6) 2014, pages 939-964.
3
Tyler Akidau et al.: The Dataflow Model: A Practical Approach to Balancing Correctness, Latency, and Cost in Massive-
Scale, Unbounded, Out-of-Order Data Processing. PVLDB 8(12) 2015, pages 1792-1803.
4
Martín Abadi et al.: TensorFlow: A System for Large-Scale Machine Learning. OSDI 2016, pages 265-283.
5
Xiangrui Meng et al.: MLlib: Machine Learning in Apache Spark. LMLR 17, 2016, pages 1-7.
6
Matthias Boehm et al.: SystemML: Declarative Machine Learning on Spark. PVLDB 9(13) 2016, pages 1425-1436.
7
Adam Paszke et al.: PyTorch: An Imperative Style, High-Performance Deep Learning Library. NeurIPS 2019.
8
Luca Canali: Big Data Tools and Pipelines for Machine Learning in HEP, CERN-EP/IT Data Science Seminar 2019.
9
Katie Bouman: Imaging the Unseen: Taking the First Picture of a Black Hole, Spark Summit Europe 2019.
10
Yohai Bar-Sinai et al.: Learning data-driven discretizations for partial differential equations, PNAS 116(31) 2019,
pages 15344-15349.

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 programming models (e.g., SQL/data frames vs. MPI, OpenMP vs. linear algebra programs
and deep learning primitives), often separated cluster environments (e.g., job queues and
source manager), and redundancy of building integration layers across these software stacks.

 Overhead and Low Utilization: Relying on separate, statically provisioned clusters for data
management, ML systems, and HPC inevitably leads to unnecessary overhead for data
exchange and underutilization in the presence of workload fluctuations. The lack of
interoperability often even requires coarse-grained file exchange and renders the identification
of redundancy and optimization opportunities nearly impossible. This unnecessary data
exchange is problematic because studies11 have shown that even for ML scoring workloads
on consumer devices, 62.7% of total system energy is spent on data movement from the
memory system to the compute units and subsequent data transformations. With the trend
toward hardware specialization in terms of heterogeneous devices, along with vendor-
provided libraries, we expect this problem to become even more severe.

 Lack of Common System Infrastructure: Despite some unidirectional efforts (from any of
the involved communities) on new programming models, the different systems for data
management and processing, ML systems, and HPC are still largely separated. Conceptual
ideas and techniques are reused but redundantly implemented in these different systems.
Although many systems are open source, they are often company-controlled (e.g., aiming at
user lock-in to generate cloud revenue), which hinders the integration, adoption, and broad
exploitation of research results. An open system infrastructure combining DM, HPC and ML,
inspired by OpenStack (which provides more generic infrastructure for cloud computing), is
highly desirable in order to improve interoperability, avoid boundary crossing and related
overheads, and enable provenance and versioning over entire pipelines.
Overall Objective: DAPHNE’s overall objective is the definition of an open and extensible systems
infrastructure for integrated data analysis pipelines, including data management and processing, HPC,
and ML training and scoring. DAPHNE will increase pipeline development productivity and reduce
unnecessary overheads and low utilization. We will build a reference implementation of a domain-
specific language, an intermediate representation, compilation and runtime techniques, and integrated
storage and accelerators devices, with selected advancements in critical components.
Strategic Objectives: The overall aim naturally leads to the following three strategic objectives:

 Objective 1 System Architecture, APIs and DSL: Improve the productivity for developing
integrated data analysis pipelines via appropriate APIs and a domain-specific language, an
overall system architecture for seamless integration with existing data processing
frameworks, HPC libraries, and ML systems. A major goal is an open, extensible reference
implementation of the necessary compiler and runtime infrastructure to simplify the
integration of current and future state-of-the-art methods.

 Objective 2 Hierarchical Scheduling and Task Planning: Improve the utilization of existing
computing clusters, multiple heterogeneous hardware devices, and capabilities of modern
storage and memory technologies through improved scheduling as well as static (compile
time) task planning. In this context, we also aim to automatically leverage interesting data
characteristics such as sorting order, degree of redundancy, and matrix/tensor sparsity.

11
Amirali Boroumand et al.: Google Workloads for Consumer Devices: Mitigating Data Movement Bottlenecks.
ASPLOS 2018, pages 316-331.

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  Objective 3 Use Cases and Benchmarking: The technological results will be evaluated on a
variety of real-world use cases and datasets as well as a new benchmark developed as part of
the DAPHNE project. We aim to improve the accuracy and runtime of real-world use cases
combining data management, machine learning, and HPC – this exploratory analysis serves
as a qualitative study on productivity improvements (Objective 1). The variety of real-world
use cases will further be generalized to a benchmark for integrated data analysis pipelines
quantifying the progress compared to state-of-the-art (Objective 2).

1.2 Relation to the Work Program

This project relates to the work program topic “ICT-51-2020: Big Data technologies and extreme-
scale analytics”, which states the following specific challenge, scope of research and innovation
actions, and data requirements:
“Specific Challenge: Rapidly increasing volumes of diverse data from distributed sources create
challenges for extracting valuable knowledge and commercial value from data but at the same time
have huge potential towards more accurate predictions, better analytics and responsible AI. This
calls for novel methods, approaches and engineering paradigms in machine learning, analytics and
data management. As the success will require not only efficient data processing/management but also
sufficient computing capacity and connectivity, a coordinated action with the appropriate technology
areas (e.g.[,] AI, analytics, software engineering, HPC, Cloud technologies, IoT and
edge/fog/ubiquitous computing) is necessary and will contribute to a European leadership in these
areas.” (Horizon 2020 Work Programme 2018-2020, Part 5.i - Page 48)
We are delighted to see that the European Commission recognizes the challenges of large and
heterogeneous datasets, their use for accurate predictions, as well as the trend toward integrated data
analysis pipelines that combine data processing, HPC, and ML model training and scoring. This is
precisely the motivation of the DAPHNE project. Beyond a mere “coordinated action”, we believe
that a systematic investigation and reference implementation of extensible system support for
integrated data analysis pipelines is of utmost importance to further advance the state-of-the-art,
increase pipeline development productivity, and reduce unnecessary overheads and low utilization.
“Scope: a) Research and Innovation Actions (RIA): Developing new methodologies and engineering
solutions addressing industrial and/or societal challenges. Proposals should cover at least one of the
following technology areas (but may additionally cover others): machine learning/deep learning
(especially on distributed data sets), architectures for collecting, managing and exploiting vast
amounts of data; system engineering/tools to contribute to the co-design of federated/distributed
systems (to involve all stakeholders/technology areas); new methods for extreme-scale analytics,
deep analysis, precise predictions and automated decision-making; novel visualization techniques;
data fusion and data integration technologies; standardized interconnection methods for efficient
sharing of heterogeneous data pools, seamlessly using distributed tools and services.” (Horizon 2020
Work Programme 2018-2020, Part 5.i - Pages 48-49)
The DAPHNE project aims at improved systems support for integrated data analysis pipelines of
large-scale data management/processing, HPC, and ML systems. Accordingly, the project covers the
areas (1) machine learning/deep learning (especially ML systems and efficient training and scoring
as part of a larger analysis pipeline), (2) architectures for collecting, managing and exploiting vast
amounts of data (e.g., handling large, distributed datasets from heterogeneous, often multi-modal
data sources), (3) system engineering/tools to contribute to the co-design of federated/distributed
systems (e.g., new APIs, a domain-specific language, and intermediate representation for integrated

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data analysis pipelines), (4) new methods for extreme-scale analytics, deep analysis, precise
predictions and automated decision-making (e.g., holistic combination of simulations with ML
models and subsequent data analysis in different use cases), and (5) standardized interconnection
methods for seamlessly using distributed tools and services (e.g., runtime integration of existing
data processing frameworks, HPC libraries, and ML systems). In addition, the project also partially
covers (6) data fusion and data integration technologies, but primarily in terms of an efficient and
scalable runtime for existing data integration and cleaning methods. Related state-of-the-art methods
for data extraction, schema alignment, entity linking, and data cleaning, outlier detection, missing
value imputation, semantic type detection, and data augmentation also heavily rely on machine
learning themselves12 and thus, they can leverage the system support (developed in this project) for
integrated data analysis pipelines as well.
“Data Requirements: The data assets must be sufficiently large, realistic, available to the project
and described in the proposal.” (Horizon 2020 Work Programme 2018-2020, Part 5.i - Page 49)
The use cases addressed in the DAPHNE project cover a spectrum of datasets from moderately sized,
but heterogeneous, multi-model datasets to Petabyte-scale high-resolution image collections. All
use cases work with well-defined datasets that are already available to the project consortium,
partially in anonymized representation (e.g., measurements without metadata of devices under test).
A major application of integrated data analysis pipelines is the combination of simulation and
machine learning for more cost-effective and energy-efficient simulation. This application is
explicitly addressed by multiple use cases as well as dedicated systems support. The context of
simulation models is interesting from a data perspective, because it allows generating arbitrarily
large input datasets for training complex ML models. Simulation models are available that allow
computing simulation results for a sample of objects or physical system, train an ML model on these
samples, and then use the model to “simulate” the application problem.

1.3 Concept and Methodology

1.3.1 Overall Concept
Goal: Our overall objective is the definition and a reference implementation of open and extensible
systems support for integrated data analysis pipelines, including distributed data management and
processing, HPC, as well as ML training and scoring in order to increase pipeline development
productivity and reduce unnecessary overheads and low utilization. Traditionally, data management
systems, HPC libraries and services, as well as ML systems were developed independently as all three
types of systems aim to exploit context knowledge of their typical applications, and closed world
assumptions for dedicated performance optimizations, while good programmability and
interoperability have long been neglected. Large-scale, data-parallel (a.k.a. big data) computing
frameworks like Spark and, for example ML frameworks on top of them, were initially perceived as
a step backwards13 by purists in these communities, but modern APIs and language abstractions, good
integration with existing systems, and reasonably good performance showed the potential of open
and extensible system stacks. Our overall concept takes this approach one natural step further, by
seamless language abstractions for integrated data analysis pipelines; good integration with existing

12
Xin Luna Dong, Theodoros Rekatsinas: Data Integration and Machine Learning: A Natural Synergy. SIGMOD 2018,
pages 1645-1650.
13
David J. DeWitt and Michael Stonebraker: MapReduce: A major step backwards, The Database Column, 2008.

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frameworks, programming models, and libraries from DM, HPC, and ML systems; as well as
dedicated compilation and runtime techniques to overcome unnecessary overheads.
Language Abstractions: DM, HPC, and ML systems are broad areas with rich eco systems.
Accordingly, a seamless integration with existing frameworks, programming models, libraries, and
cluster schedulers is of utmost importance to allow for an incremental transitioning to the DAPHNE
system infrastructure. For this reason, and inspired by modern frameworks, we aim to provide
alternative language abstractions for high-level programmability as shown in Figure 3.1 (work plan):
(1) APIs (DaphneLib), and (2) a DSL (DaphneDSL), which both work with frames (tables with
schema) and/or multi-dimensional arrays as intermediate data representations, but offer different
trade-offs regarding language integration and optimization scope:

 DaphneLib is a library of important operations (linear algebra, BLAS, FFT, relational algebra,
FEM, I/O) and higher-level distribution primitives. We aim to provide different language
bindings (e.g., Java, Python, and C++) – in terms of language-specific API frontends,
integrated in the host languages – in order to reuse language features like control flow,
leverage rich library eco systems, and provide interoperability with distributed frameworks
like Spark and HPC libraries. Similar to lazy evaluation in Spark, TensorFlow, or Dask14,
these operations are collected (unrolled) into DAGs of operations, and then compiled and
executed on demand, for example when the output is used by operations of the host language.

 DaphneDSL by contrast, is a pure domain-specific language (with R- or Python-like syntax)

that takes an entire DSL script including control flow and functions, performs program-level
compilation into an executable runtime program. Compared to the library approach, the
program-level optimization scope allows more sophisticated optimization of loops and
functions call graphs such as code motion and modifications of data representations before
iterative algorithms. We will further provide dedicated APIs for compiling and running such
DSL scripts in a programmatic manner, and also consider automatic translation of DaphneLib
functions with special function decorators as used for example in AutoGraph15.
Intermediate Representation (IR): Both of the aforementioned language abstractions are eventually
mapped to a novel intermediate representation, called DaphneIR, which is central to the endeavor of
building an open and extensible reference implementation for integrated data analysis pipelines. Like
existing IRs such as LLVM (low-level virtual machine) and MLIR (multi-level, machine learning
IR), it allows for systematic lowering from high-level operations to more problem- or hardware-
specific operations. However, in contrast to existing work, we aim to create an IR dialect (in Tasks
T3.1 and T3.2) that (1) combines data processing, HPC, and ML operations and primitives (e.g.,
linear algebra, DNN operations, relational algebra and OLAP functions, parfor, all-reduce, ring-
reduce, prefix-scan), (2) provides multiple levels of operations (high-level op, physical op, physical
op on device, data-specific variant of physical op on device), (3) encodes tasks as bundles of
operations and data with their interesting properties (ordering, partitioning, compression, sparsity),
(4) applies to both distributed operations over distributed data representations and local operations on
partitions or blocks, and (5) allows specifying placement decisions on one or multiple devices.
Scope of Integration Scenarios: Given the trends toward integrated data analysis pipelines and
augmentation of HPC with ML models, we focus on multiple deployment models. First, DaphneIR
can be used to compose distributed data pipelines for data and task parallelism. Second, it will also
serve as the task description of runtime operations inside already existing distributed pipelines (e.g.,
per Spark partition or MPI rank). Accordingly, DaphneIR is the central element that brings all the

14
Dask.Dask: Library for dynamic task scheduling, 2016, https://dask.org/.
15
Dan Moldovan et al.: AutoGraph: Imperative-style Coding with Graph-based Performance. SysML 2019.

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different work packages together: from the language abstractions (WP2) that are compiled by an
optimizing compiler (WP3) into IR plans, which in turn are executed by the distributed and local
runtime (WP4). This IR is also the central specification for hierarchical scheduling (WP5),
computational storage (WP6), and HW acceleration and multi-device data/task placement (WP7). To
summarize, DaphneIR as a novel intermediate representation gives as a holistic view for entire
integrated data analysis pipelines. This view then opens up a huge variety of optimization
opportunities with related research questions.

Figure 1.3: Example ML4Sim Integrated Data Analysis Pipeline

Example Pipeline: Figure 1.3 shows an example integrated pipeline at conceptual level. A simulation
model is used to simulate a subset of a physical object, the output data is materialized in a distributed
file system, then Spark is used for data-parallel featurization and random reshuffling, followed by
ML model training via data-parallel parameter servers. Finally, the model is used for cost-effective
“simulation” of the entire physical object, followed by a complex data processing pipeline to find
interesting patterns. Instead of materializing and reshuffling the simulation output, why not fuse the
data generation into the subsequent ML training to avoid unnecessary data transfer? Furthermore,
why not change the simulation parameters to yield better convergence or generalization of the ML
model, and why not fuse the final full-scale simulation with the data analysis pipeline to avoid
unnecessary materialization? Besides these questions related to function versus data shipping and
materialization, there are also integration opportunities such as to reuse classical all-reduce primitives
inside the parameter server and leverage multiple heterogeneous devices during model training.
Research Questions: Generalizing the previous example and integrated data analysis pipelines, from
a technological perspective, there are important research questions related to (1) seamless integration
of existing DM, HPC, ML systems, (2) intermediate representation and systematic lowering, (3)
holistic reasoning and optimization of integrated pipelines under different objectives, (4) code
generation for sparsity exploitation, (5) hierarchical scheduling and HW exploitation, (6) managed
storage tiers and HW acceleration, as well as (7) systematic exploitation of data characteristics (e.g.,
sparsity and redundancy), and operation characteristics. In this project, we aim to advance the state-
of-the-art in these areas and accordingly, describe these in more detail in Section 1.3.3.1
(methodology regarding system architecture) and Section 1.4 (ambition beyond state of the art).

1.3.2 National and International Research Network

The DAPHNE project builds upon existing work of the data management, ML systems, and HPC
communities as well as a great national and international research network. In this section, we (1)

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give an overview how the project consortium is integrated in these communities and relevant
organizations, and (2) describe linked innovation activities and projects.
DM Network: The consortium is strongly integrated with the data management community both
from a scientific as well as industry and business perspective. Many of the partners (DLR, ETH, HPI,
ICCS, INTP, ITU, KNOW, TUD) regularly publish at the major venues of the scientific data
management (i.e., SIGMOD and VLDB) community, where Pinar Tözün (ITU) is also on the
SIGMOD Doctoral Dissertation Award Committee, Wolfgang Lehner (TUD) is on the VLDB Board
of Trustees, and Philippe Bonnet (ITU) is the VLDB 2021 General Chair. The project partners
KNOW, ETH, HPI, ITU, ICCS, and TUD also regularly serve as program committee members at the
major data management conferences. Additionally, several partners (KNOW, AVL, ICCS) are
members of the European Big Data Value Association (BDVA16), with Stefanie Lindstaedt (the CEO
of KNOW) being a BDVA board member as well. Finally, the entire consortium has strong ties to
relevant industrial partners such as AWS, EMC, Google, IBM, Microsoft, NetApp, Oracle and SAP.
ML Systems Network: ML systems is a new but rapidly evolving community that is spread over
data management, network and operating systems, machine learning, and some new specialized
venues. Matthias Boehm (KNOW), Ce Zhang (ETH), and Tilman Rabl (HPI) are very well connected
with the ML systems community as they have been building ML systems like SystemML, DeepDive,
and more specialized prototypes for many years already. Furthermore, Matthias Boehm (KNOW) is
actively engaged with the Apache Software Foundation by being a PMC member of the Apache
SystemML project, while Tilman Rabl (HPI) is an active contributor to the definition of big data and
ML benchmarks. ETH and KNOW have also published in and contributed to the program committees
of MLSys (previously known as SysML), a new conference at the intersection of systems and
machine learning. Ce Zhang (ETH) further regularly publishes at top-tier ML venues such as NeurIPS
and ICML, while Roman Kern (KNOW) is broadly connected with knowledge discovery, information
retrieval, multi-modal data, and web science communities. Finally, multiple partners were also
involved in creating the national AI strategies of their respective countries.
HPC Network: Similarly, the consortium is also well integrated into the scientific and industrial
HPC community and related organizations. Florina Ciorba (UNIBAS) and Nectarios Koziris (ICCS)
frequently publish at top-tier HPC venues like SC, HPDC, ISC, ICPP, IPDPS, and PACT.
Furthermore, the Maribor Supercomputer Centre (UM) will host the 5 PFLOP/s EuroHPC17 system
VEGA as part of the RIVR.HPC project and has decades of experience running HPC systems as well
as developing and running efficient parallel codes on top of this infrastructure. Aleš Zamuda (UM)
also has additional contacts to the EuroHPC systems at IT4 in Czechia and BSC in Spain over which
we aim to create connections to future and currently running Horizon 2020 and Horizon Europe
projects (as described below). Two of our partners (ICCS, UNIBAS) are members of HiPEAC18, a
European network for High Performance and Embedded Architecture and Compilation. Partner Intel
has very close ties to the European and global HPC community both as a supplier and a technology
partner/co-developer. Hans-Christian Hoppe leads the ExaCluster lab at Research Center Jülich, and
has a significant track record in running FP7 and H2020 projects in the HPC and Exascale area. INTP
is a key partner in the VESTEC H2020 project on large-scale, interactive and in-situ visualization
coordinated by DLR. Intel is a key contributor to the European Technology Platform for HPC
(ETP4HPC, and Hans-Christian Hoppe has a leading role in the definition of the strategic research
agenda. The use case partners DLR, AVL, Infineon and KAI also have long and substantial
experience in developing and using HPC infrastructure, libraries, and custom HPC applications. AVL

16
BDVA – Big Data Value Association; http://bdva.eu
17
EuroHPC; http://eurohpc.eu
18
HiPEAC - High Performance and Embedded Architecture and Compilation;

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is also a member of the European networks like ARTEMIS-IA19 and ECSEL20. Furthermore, Florina
Ciorba (UNIBAS) is engaged in networks such as Women in HPC (WHPC21) and the ACM
Committee on Women (ACM-W22) that focus on highlighting achievements of women and improving
gender equality. Finally, this background is complemented by good consortium contacts to NEC,
Xilinx, Cray, NVIDIA, and Samsung as relevant hardware vendors.
Related Projects: The project portfolio accepted in the related program ICT-12a-2018 consists of
six projects. Table 1.3a summarizes these projects to which we aim to connect in terms of
incorporating state-of-the-art as baselines, additional use cases for our benchmarking efforts, and
dissemination for early sharing of our results. Compared to DAPHNE, these projects focus largely
on orthogonal technical aspects like interactive analysis, virtualized access to heterogeneous data,
elasticity in centralized and decentralized environments, as well as collections of important use cases
that are augmented with machine learning, HPC, or both.
Table 1.3a: List of ICT-12a-2018 Projects
Project Summary and Scope
INFORE Real-time, interactive extreme-scale analytics and forecasting; ML
(http://infore-project.eu) for early identification and abort of undesirable simulation
outcomes; graphical workflows, distributed SW architecture, and
use cases from life sciences, finance, and maritime surveillance.
ExtremeEarth Prediction and monitoring of extreme natural phenomena such as
(http://extremeearth.eu) floods, droughts, windstorms, earthquakes, volcanos, tsunamis;
Focus on precise physical models and infrastructure across edge,
cloud, and centralized high-performance computing.
SmartDataLake Ad hoc, self-service, and extreme-scale analytics over data lakes;
(http://smartdatalake.eu) virtualized and adaptive data access, automated and adaptive
data storage tiering; smart data discovery, exploration and mining;
applications in recommenders, production planning, and finance.
ELASTIC Software architecture for elasticity in extreme-scale analytics
(http://elastic-project.eu) workloads; combination of edge, flog, and centralized computation;
Smart mobility use case from sensors of tramway network.
CloudButton Serverless data analytics platform (i.e., via means of function as a
(http://cloudbutton.eu) service, distributed mutable data structures, and related auto-scaling
techniques). Applications in bioinformatics (genomics,
metabolomics) and geospatial data (LiDAR, satellites).
ExaMode Weakly supervised knowledge discovery and data augmentation for
(http://www.examode.eu) training deep neural networks on large, heterogeneous healthcare
datasets (multi-modal, different acquisition methods)

We will follow the progress and results of these projects and related projects of previous national and
international programs, and connect with them over the EuroHPC initiative as well as existing
connections such as over RAWLabs (via ITU) to the SmartDataLake project and over BSC (UM) to
the INFORE, ExtremeEarth, and ELASTIC projects.

19
ARTEMIS-IA - Advanced Research & Technology for EMbedded Intelligent Systems; https://artemis-ia.eu
20
ECSEL - Electronic Components and Systems for European Leadership; https://www.ecsel.eu
21
WHPC - Women in HPC; http://womeninhpc.org
22
ACM-W - ACM Committee on Women; http://women.acm.org

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1.3.3 Overall Methodology
Our methodology consists of two major parts: (1) systems-oriented research regarding the described
novel, yet realistic system infrastructure for integrated data analysis pipelines, and (2) challenging,
real-world, and high-impact use case studies to ground these research activities and allow for
quantification of productivity and performance improvements.
1.3.3.1 System Infrastructure
Following the description of the overall concept and approach, we aim to conduct system-oriented
research which entails, designing the overall system architecture and language abstractions, building
basic compiler and runtime support, and integrating existing frameworks and programming models
in order to establish a reference implementation for integrated data analysis pipelines. Based on
continuous experiments with the use case studies and relevant benchmarks, we then aim to advance
the state-of-the-art in selected aspects and components, especially with regard to distributed runtime
plans, hierarchical scheduling, managed storage tiers, HW acceleration, and their integration.
Operational Perspective: Operationally, we aim to complement our efforts on building and
advancing the system infrastructure with continuous experimentation at all levels. Systematic
experiments from micro benchmarks over micro-architectural analysis to end-to-end runtime and
summary statistics are a key tool to identify limiting factors and devise effective techniques to
overcome unnecessary bottlenecks. With regard to reducing the repeated manual effort, and
improving repeatability and reproducibility in general, we aim at a high degree of benchmark
automation and tooling around summarization and analysis of obtained, fine-grained performance
traces. This operational methodology goes in hand with Objective 3 (Use cases and benchmarking)
as well as proper research data management, as described in Section 2.2.3.
Technological Perspective: Apart from the overall concept, language abstractions, and basic system
infrastructure, we see a need and possible solutions for technological advancements in the following
areas, which will be further separated from related work in Section 1.4:

 Seamless Integration of DM, HPC, ML Systems: Combining existing techniques from these
different areas in a seamless manner is itself a major contribution. Such an integration requires
language abstractions with support for both first and second order functions, where the latter
takes functions as arguments. The challenge is to find the balance between optimized kernels
for important operations and primitives, augmented with powerful but minimalistic
infrastructure for processing user defined functions (UDF) that originate from different
programming models (e.g., Spark and OpenMP).

 Intermediate Representation and Systematic Lowering: Defining the new IR dialect for
multi-level lowering to address different hardware and data characteristics, while providing
simple means of extensibility is crucial for performance and adoption. We will extend known
concepts of optimization passes and interesting data properties for bundles of operations and
data items in a hierarchy from distributed datasets to local data blocks.

 Holistic Optimization of Integrated Data Analysis Pipelines: The different workload

characteristics of DM, HPC, and ML systems as well as use cases that are approximate in
nature, allow for various lossless and lossy pipeline optimizations. A key focus area will be
pipeline optimization under different objectives (potentially multi-objective) and specific
constraints. Examples are to improve accuracy under fixed time budgets and memory
constraints or to improve end-to-end throughput under memory and latency constraints.

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  Code Generation for Sparsity Exploitation: There are plenty of examples in ML systems and
numerical computing where sparsity needs to be exploited over entire chains of operations in
order to avoid dense intermediates. Proper sparsity exploitation often requires custom code
and hinders the application of packaged linear algebra operations. However, recent work on
generating sparsity-exploiting operators has the potential to overcome these limitations. In
this project, we aim to extend such code generation frameworks to heterogeneous HW devices
and seamlessly integrate the code generation compiler and runtime with the intermediate
representation for UDFs.

 Hierarchical Scheduling and HW Exploitation: The diversity of operations and the

hierarchy of heterogeneous HW devices poses challenges and requires scheduling
advancements at compilation and runtime. Focus areas include efficient network
communication, overlapped I/O and computation, fine-grained scheduling of tasks under
awareness of data locality at different hierarchy levels (e.g., rack, node/devices, NUMA node,
cores), and dedicated parameter server update strategies. Doing that for the different
dimensions of scheduling pipelines and workflows, task and data placement, to multi-tenant
clusters requires major generalizations of existing scheduling approaches.

 Managed Storage Tiers and HW Acceleration: Integrated data analysis pipelines could
largely benefit from computational storage and HW acceleration (e.g., avoid unnecessary
overheads and fully utilize and exploit the available hardware). Again, the diverse set of
operations and data representations creates new challenges for managed storage tiers, near-
data processing, data-path optimizations and adaptive data placement. Similarly, exploiting
available HW accelerator devices requires tuned kernels (partially created via automatic
operator fusion and code generation), good performance models, dedicated handling of
multiple devices, and again decision models for data placement.

 Systematic Exploitation of Data Characteristics: As already mentioned, sparsity and data

redundancy is rarely exploited in a fully automatic manner. We aim at holistically supporting
such properties during compilation and runtime, by leveraging techniques like sparse
operations, sparsity-exploiting code generation, lossless and lossy compression, partitioning,
and means of selecting appropriate data representations (e.g., in managed storage).
Further details regarding our detailed technical focus can be found in the work plan description WP2
through WP7. Overall, we aim for technical readiness levels TLR 3-5 for the system architecture,
where the basic system architecture aims for TLR 5 because use cases depend on it, while the more
advanced components and techniques will reach TLR 3 or TLR 4.

1.3.3.2 Use Case Studies

In order to demonstrate impact on real-world applications, to ground our research activities with
relevant use cases, and to allow for benchmarking and quantifying the research progress, we selected
four complementary use case studies. In the following, we summarize the use cases, describe the
related datasets, and indicate impact at application level. These use cases are implemented in WP8 –
Use Case Studies, by dedicated tasks that describe how we approach them in detail.
Earth Observation Case Study (DLR): The DLR use case focuses on global Local Climate Zone
(LCZ) classification and monitoring23. Identifying urban structures and land use, in the form of LCZ

23
Chunping Qiu et al.: Feature Importance Analysis for Local Climate Zone Classification Using a Residual
Convolutional Neural Network with Multi-Source Datasets. Remote Sensing 10(10), 2018.

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classes, is essential for analyzing and understanding urban heat islands and spatio-temporal dynamics
of cities worldwide. These LCZ classes are based on climate-relevant surface properties on the local
scale, mainly related to 3D surface structure (e.g., height and density of buildings and trees), surface
cover (e.g., vegetation or paved), as well as anthropogenic (anthropogenic heat output) parameters.
Example classes are “compact high-rise”, “open high-rise”, “heavy industry”, “dense trees”, “low
plants”, “water”, “scattered trees”, or “Bare rock or paved”. High resolution satellite images (e.g.,
20K x 20K) are first split into smaller tiles and individual tiles are classified via a ResNet24
convolutional neural network of 4 residual blocks with 3 convolutional layers each (trained via
Adam25). Classification accuracy is improved via bagging, where multiple classifiers are trained over
samples of different datasets and the final classification is obtained via majority voting among
classifiers. The overall use case of global LCZ monitoring is much broader, also involving data
preparation and subsequent data analysis for change detection and global (i.e., planet-wide) result
analysis. The main input data are the free and publicly available Sentinel-1 and Sentinel-2 datasets26
of radar and optical images (obtained by the European Space Agency as part of the Copernicus
initiative), where one year of global data is already in the range of 4 Petabytes. This is
complemented by additional auxiliary datasets. With the trend toward small, cost-effective cube
satellites in lower orbit, the data size will rapidly increase in the near future. Hand-labeled training
datasets are available and can be reused from previous studies. In the context of this project, we aim
at streamlining the data preparation, classification, and analysis pipelines at scale, improving the
classification accuracy, and developing means of temporal change detection and global data analysis.
Semiconductor Manufacturing Case Studies (IFAT): The IFAT use case focuses on semiconductor
manufacturing and consists of two exploratory use case studies: (1) analyzing critical chip defects,
and (2) optimizing the equipment stability and utilization. First, analyzing critical chip defects
throughout the frontend (at wafer level) and backend (at device level) production (1000s of steps) is
of utmost importance to meet customer contracts with continuously decreasing maximum failure
rates. Very few defects are critical for the electric properties of the produced devices. Therefore, this
use case aims to correlate defect density data with analog electric test data on chip-level to analyze
and build models for electric relevance of defects, identify defect-sensitive electrical tests, and
identify root causes in APC (advanced process control) data such as deviating parameters. Scalability
is an issue as large time frames with hundreds of lots or thousands of wafers and several thousands
of chips per wafer have to be correlated to thousands of tests. In the context of this project, we aim to
replace simple pass/fail correlations with detailed electrical correlation (bin fine/voltage fine)
analysis, apply pattern recognition such as clustering, k-Nearest Neighbors, and analysis of defect
distributions. Second, optimizing equipment stability and utilization aims at decision models for the
optimal operating point of manufacturing equipment considering equipment data, work-in-progress
(WIP) dispatching and scheduling data, and information about the process mix. In the context of this
project, we aim to build the necessary data pipelines for storage and analysis, and leverage semi-
supervised and unsupervised techniques for prediction and control. Both case studies are largely
exploratory and deal with heterogeneous, multi-modal datasets (equipment data, time series
measurements from samples, images from samples at different stages) and parts of the use cases allow
for simulating different states and actions (e.g., dispatching and scheduling).
Material Degradation Case Studies (KAI) This use case focuses on understanding and modeling
material degradation during operation of semiconductor devices. An existing reliability test system
performs accelerated stress tests in a climate chamber and monitors test conditions, state of each

24
Kaiming He, Xiangyu Zhang, Shaoqing Ren, Jian Sun: Deep Residual Learning for Image Recognition. CVPR 2016
pages 770-778.
25
Diederik P. Kingma, Jimmy Ba: Adam: A Method for Stochastic Optimization. ICLR 2015.
26
ESA: Copernicus Open Access Hub – Sentinel-1/-2, https://scihub.copernicus.eu/

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device under test, as well as electrical signals (waveforms) of the applied stress pulse27. Up to 256
devices in groups with up to 16 different conditions are tested simultaneously but due to efficiency
reasons, only every 30th waveform is stored. The stored data resembles a 3D time series (pulse time,
test run time, amplitude), electrical measurements (voltage & current); related (many measurements
of the same device under test over a longer time) and unrelated (different devices under tests or
samples) measurements. Each 3D time series is stored in a csv or txt file at file shares (sometimes
also compressed). Over the past 5 years, KAI stored more than 30 million electrical signals per
semiconductor technology, which will be made available to the partners. Existing models simulate
the microscopic degradation in the thin metal layers or estimate lifetime under different parameters
of mechanical stress. The current data analysis pipeline (which still includes manual import/export,
data exchange, and orchestration of data analysis and HPC tools) leverages only a subset of
waveforms for electro-thermal simulations and subsequent reliability analysis and degradation
modeling28,29. In the context of this project, we aim to overcome the existing drawbacks by building
an efficient and scalable integrated data analysis pipeline, which is easy to use and extend in order to
explore different methods (incl. ML and HPC) for analyzing the characteristics of waveforms over
time and under different influencing parameters. Optimizing end-to-end pipelines (including storage
representations, feature extraction, and integrated ML and HPC) provides further opportunities for
more accurate models at similar costs, or acceptable accuracy loss at much lower compute
requirements, potentially even enabling health monitoring at-the, or close-to-the device.
Automotive Vehicle Development Case Study (AVL) Motivated by the trend toward electrification
and autonomous driving, this use case focuses on improving the efficiency and agility of the
automotive vehicle development process, while leveraging existing domain expertise. AVL’s
integrated and open development platform (IODP) aims to address this challenge by employing
simulations to enable early design decisions. Examples of used methods include networked multi-
disciplinary simulation (e.g., interactions among electronics and electrics, mechanical components,
chassis, and SW), model-in-the-loop (e.g., integration of simulation models), software-in-the-loop
(e.g., tests of compiled SW), and hardware-in-the-loop (e.g., tests of control units or the entire
powertrain). In general, all non-existing functions are substituted by respective simulation models,
while allowing the integration of customer-provided, black-box models. Data management and
provenance along the entire process are crucial for handling heterogeneous data sources, traceability,
model consistency, and identifying reuse opportunities. The overall goal is to increase the number of
model-driven design decisions under awareness of estimated key performance indicators (KPI) such
as fuel consumption, cooling and heating, acceleration or crash behavior. In the context of this project,
we aim to further address the challenges of accurate KPI predictions (e.g., ML models for corrections
of simulations compared to developed reference vehicles), heterogeneous data sources and
development artefacts, a variety of vehicle variants with different KPIs and prediction models (e.g.,
ML models for individual strata/data slices), and the deployment and refinement of pre-trained KPI
models. This automotive use case works with a well-defined dataset from a single vehicle, partially
in anonymized form (e.g., removed metadata). From a data perspective, the use of simulation models
allows generating arbitrarily large datasets. For example, considering the development of a specific
vehicle might result in 20 different vehicle variants, each with around 15 development projects for
which we need to trace 20 characteristic values, each depending on 100 parameters. Assuming that
characteristic value is a single variable which consumes 8 bytes and the simulation projects a time
period of a single year obtaining the characteristic values only once a day, this results in a dataset of

27
Olivia Bluder et al.: Modeling fatigue life of power semiconductor devices with ε-N fields. Winter Simulation
Conference 2014 pages 2609-2616.
28
Olivia Bluder, Kathrin Plankensteiner, Michael Glavanovics: Estimation of safe operating areas for power
semiconductors via Bayesian reliability modeling, ISBA 2014.
29
Stefan Schrunner et al.: A Comparison of Supervised Approaches for Process Pattern Recognition in Analog
Semiconductor Wafer Test Data. ICMLA 2018, pages 820-823.

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the size 20 (vehicle variants) x 15 (projects) x 20 (characteristic values) x 100 (parameters) x 1 (value
per day) x 250 (working days) x 8 Bytes = (over) 11 GB per vehicle. Rather than volume of the
datasets, it is the varying frequency of data generation (velocity) and the large heterogeneity of the
data resulting from the various simulations (variety) and the fact that the effort to make sure that the
simulation's outcome sufficiently reflects the reality (veracity) that is considered a challenge in
today's development process. AVL is the legal body in ownership of the dataset and we will follow
AVL's confidentiality policy on data sharing within this project.
To summarize, these four use cases cover a range of application characteristics, require all means of
integrated data analysis pipelines (combining DM, ML and HPC), and exhibit potential for synergies
such as the use and extension of data augmentation techniques.

1.3.4 Gender Dimension

Although our overall objective is a generic, application-agnostic system infrastructure for integrated
data analysis pipelines, there are – apart from questions regarding gender balance in the project team
– two aspects, where we will explicitly consider the gender dimension.
First, a main objective of the DAPHNE project is to establish a domain-specific language and
intermediate representation (Objective 1) for integrated data analysis pipelines. We are not aware of
studies or other evidence on gender-specific preferences of language abstractions that might affect
productivity. However, we will leverage the diversity of participants at the levels of use cases and
system internals to better understand potential differences regarding language design.
Second, some of the use cases have an exploratory character, which calls for advanced techniques of
model debugging in order to understand the trained models in detail. One such technique is data
slicing30 that aims to find the top-k worst data slices (conjunctions of predicates), where the model
performs significantly worse than on average, which might also help to identify hidden gender bias
or missing data support (e.g., identified from meta data of measurements, error and size of slices).
While the planned use cases are not directly affected by gender bias, the data slicing technique is an
effective way of explaining model behavior with different surface properties in the earth observation
use case for example. The gained insights on how to do effective data slicing can be transferred to
gender related use cases in future work.
Finally, all project partners already have appropriate gender equality plans and policies in place,
which is also reflected by the description of the principal investigators. Consequently, we expect an
employment ratio between female and male researchers of approximately 1:3 but aim for a more
balanced ratio when hiring additional personnel.

1.4 Ambition
The DAPHNE project is ambitious in its overall and specific objectives of creating open and
extensible systems support for integrated data analysis pipelines that combine DM, HPC and ML.
What sets it apart from projects with similar goals is a multi-community effort on building actual
system infrastructure from language abstractions over compilation and runtime techniques to
hierarchical scheduling as well as storage and accelerator devices. Providing such an extensible
system infrastructure along with a related benchmark toolkit would already be very valuable for both

30
Yeounoh Chung et al.: Slice Finder: Automated Data Slicing for Model Validation. ICDE 2019, pages 1550-1553.

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academia and industry. In this context, there is lots of related work through the entire system stack,
but a detailed survey is way beyond the scope of this project. For this reason, in the following, we
focus on the selected aspects (mentioned in Section 1.3.3.1) where we see the need and opportunities
for additional advancements of the state-of-the-art.
Seamless Integration of DM, HPC, ML Systems: Integrated data analysis pipelines are not well
supported yet because most attempts focused on one-directional extensions (e.g., HPC primitives in
DM or ML systems). First, there have been multiple attempts in improving modern data-parallel
frameworks like Hadoop MapReduce or Spark with means of high-performance computing.
Examples are M3R for MapReduce on shared memory abstractions like IBM’s X1031, Spark
extensions for efficient MPI data exchange via shared memory32, parameter server extensions with
all-reduce and model averaging33, an implementation of Spark RDD operations on the MPI-based
framework COMPS34, Spark-MPI as a consolidated platform with key distribution primitives35, as
well as automatic GPU acceleration for Spark UDFs (automatic data transfer and kernel generation)36.
Second, there is also work on integrating ideas of key primitives like parallel for loops37 and
cumulative aggregates (MPI scans)38 into ML systems on top of frameworks like Spark, as well as in
numerical computing frameworks like R and MATLAB39. Third, advanced work on integrating
OpenMP applications into database systems created a custom OpenMP backend that obtains tasks
and hands them over to the central DB scheduler40. In contrast to the diverse state-of-the-art, we aim
for seamless, multi-directional integration of the different programming models, APIs, and
software stacks; a hierarchical system architecture with good support for local and distributed
operations as well as heterogeneous devices; and an extensible system infrastructure that allows
for simple extension by, and experimentation with, current and future algorithms and primitives.
Intermediate Representation and Systematic Lowering: Inspired by state-of-the-art query
compilers, ML systems, and optimizing programming language compilers, we aim to design an
intermediate representation that allows for systematic lowering in terms of specialization from high-
level, logical operations to physical operators (implementation methods) and dedicated hardware
devices. In data management, query trees of relational algebra operators are used during compilation
and runtime, while most ML systems rely on data flow DAGs (directed acyclic graphs) of linear
algebra and DNN operations with specialized control flow operations or hierarchical control flow
representations4,6. Modern optimizing compilers like LLVM41 and HPC programming models focus
on general-purpose programming languages, which lack the semantics of coarse-grained operation
primitives. However, recent efforts like TensorFlow MLIR42 also aim to combine an LLVM-like
intermediate representations with operator-centric ML systems for avoiding the redundancy of

31
Avraham Shinnar et al.: M3R: Increased performance for in-memory Hadoop jobs. PVLDB 5(12) 2012, pages 1736-
1747.
32
Michael J. Anderson: Bridging the Gap between HPC and Big Data frameworks. PVLDB 10(8) 2017 pages 901-912.
33
Zhipeng Zhang et al.: MLlib*: Fast Training of GLMs Using Spark MLlib. ICDE 2019, pages 1778-1789.
34
Lucas M. Ponce et al.: Extension of a Task-Based Model to Functional Programming. SBAC-PAD 2019, pages 64-71.
35
Nikolay Malitsky et al: Building Near-Real-Time Processing Pipelines with the Spark-MPI Platform. CoRR
abs/1805.04886, 2018.
36
Kazuaki Ishizaki: Transparent GPU Exploitation on Apache Spark, Spark Summit 2018.
37
Matthias Boehm et al.: Hybrid Parallelization Strategies for Large-Scale Machine Learning in SystemML. PVLDB 7(7)
2014, pages 553-564.
38
Matthias Boehm et al.: Efficient Data-Parallel Cumulative Aggregates for Large-Scale Machine Learning. BTW 2019,
pages 267-286.
39
Gaurav Sharma, Jos Martin: MATLAB: A Language for Parallel Computing. International Journal of Parallel
Programming 37(1) 2009, pages 3-36.
40
Florian Wolf et al.: Extending database task schedulers for multi-threaded application code. SSDBM 2015, pages 1-12.
41
Chris Lattner, Vikram S. Adve: LLVM: A Compilation Framework for Lifelong Program Analysis & Transformation.
CGO 2004: 75-88.
42
TensorFlow MLIR; https://www.tensorflow.org/mlir

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multiple different compilation backends (e.g., different HW targets or compiler pipelines like code
generation). There has been also work on integrating relational and linear algebra by various in-
database ML toolkits like AIDA43 and dedicated intermediate representations like Lara44. Beyond this
state-of-the-art, we aim for an intermediate representation that covers data management, HPC, and
ML systems in terms of relational algebra, key distribution primitives, and linear algebra and DNN
operations. We aim to support both first- and second-order function primitives, leverage an
operator-centric representation, and aim for designing a hierarchal representation of operation,
data, and device characteristics for representing fine-grained tasks similar to morsel-driven query
execution45 and task representations in data-parallel computation frameworks like Spark1.
Holistic Optimization of Integrated Data Analysis Pipelines: End-to-end system infrastructure for
integrated data analysis pipelines provides opportunities for holistic optimization of pipelines with
regard to different optimization objectives like runtime, energy, memory consumption, or accuracy.
Similar opportunities have been exploited in data preprocessing and ML model selection pipelines in
systems such as TuPAQ46, KeystoneML47, Alpine Meadow48, and BlinkML49 to optimize accuracy
under given time budgets while applying various techniques like scan sharing, caching of
intermediates, as well as sampling and approximate query processing. Other systems like SystemDS50
eliminate fine-grained redundancy via lineage-based reuse of full and partial intermediates within ML
systems. As already mentioned, such optimizations also extend to scheduling decisions for joint data
processing and HPC workloads40 (e.g., to ensure workload priorities). Work on removing unnecessary
shuffling overhead in distributed, data-parallel pipelines merged relational join operations with
subsequent matrix blocking for ML training51. Other work focused on multi-objective optimizations,
for example, in order to minimize monetary costs of ML training in cloud environments under given
time constraints52, or multi-objective optimization of distributed data processing (e.g., latency and
throughput)53. However, in many emerging applications like training deep neural networks with lossy
compressed (quantized) inputs, weights, and intermediates the tradeoffs are still often explored
manually54. Beyond the state-of-the-art, we aim to holistically exploit optimization opportunities
across data processing, HPC and ML training and scoring, which is challenging due to
heterogeneous workload characteristics (operations, data, devices). We primarily focus on lossless
techniques such as push-down, scan sharing, operator and pipeline fusion, but also lossy techniques
like sampling from simulation models, and automatic decisions on lossy compression and ML
training configurations (e.g., sync/async update strategies, batch sizes, learning rates).
Code Generation for Sparsity Exploitation: Query compilation, loop fusion and tiling, as well as
operator fusion are nowadays very common compilation techniques in database systems (e.g.,

43
Joseph Vinish D'silva et al: AIDA - Abstraction for Advanced In-Database Analytics. PVLDB 11(11) 2018, pages
1400-1413.
44
Andreas Kunft, Asterios Katsifodimos, Sebastian Schelter, Sebastian Breß, Tilmann Rabl, Volker Markl: An
Intermediate Representation for Optimizing Machine Learning Pipelines. PVLDB 12(11): 1553-1567 (2019).
45
Viktor Leis et al: Morsel-driven parallelism: a NUMA-aware query evaluation framework for the many-core age.
SIGMOD 2014.
46
Evan R. Sparks et al.: Automating model search for large scale machine learning. SoCC 2015.
47
Evan R. Sparks et al.: KeystoneML: Optimizing Pipelines for Large-Scale Advanced Analytics. In ICDE 2017.
48
Zeyuan Shang et al.: Democratizing Data Science through Interactive Curation of ML Pipelines. SIGMOD 2019.
49
Yongjoo Park et al.: BlinkML: Efficient Maximum Likelihood Estimation with Probabilistic Guarantees. SIGMOD
2019.
50
Matthias Boehm et al.: SystemDS: A Declarative Machine Learning System for the End-to-End Data Science Lifecycle.
CIDR 2020.
51
Andreas Kunft et al.: BlockJoin: Efficient Matrix Partitioning Through Joins. PVLDB 10(13) 2018, pages 2061-2072.
52
Botong Huang et al.: Cumulon: optimizing statistical data analysis in the cloud. SIGMOD 2013.
53
Khaled Zaouk et al.: UDAO: A Next-Generation Unified Data Analytics Optimizer. PVLDB 12(12) 2019, pages 1934-
1937.
54
Zeke Wang et al: A One-Size-Fits-All System for Any-precision Learning. PVLDB 12(7) 2019, pages 807-821.

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HyPer55) and data-parallel computation frameworks (e.g., Spark, Tupleware56), HPC systems (e.g.,
BTO57), and ML systems (e.g., OptiML58, SystemML-SPOOF59, TensorFlow-XLA60, Tensor-
Comprehenions61), respectively. These techniques focus at different aspects though: query
compilation aims for compiling pipelines of operators into nested loops, loop fusion and tiling
considers fusing subsequent loops or establishing an outer loop over tiles of a matrix, and operator
fusion aims to fuse sub-DAGs of linear algebra operations into a single operator. There are plenty of
advantages such as avoiding allocation of intermediates, reduced memory bandwidth requirements,
and specialization according to queries and operator parameterizations. Closely related to DAPHNE
is recent work on cross-library code generation for data processing and ML pipelines in Weld62, code
generation for different sparse tensor representations in Taco63, code generation for specific hardware
accelerators (e.g., Nervana Graph64, and TensorRT65), as well as sparsity exploitation across chains
of operations in SPOOF66. Sparsity-exploitation across chains of operations can avoid huge dense
intermediates and thus, change the asymptotic runtime behavior, but these opportunities are only
leveraged for a limited set of operations and CPUs yet. Beyond this state-of-the-art, we aim to
generate sparsity-exploiting fused operators for GPUs, which is challenges due to the irregularities
of sparse matrices. Additional focus areas are operator fusion (both compilation and runtime) for
multiple, heterogeneous hardware devices, as well as improved optimizer support for generating
fused operators for partial data placement on different devices.
Hierarchical Scheduling and HW Exploitation: Data processing, HPC, and ML workloads share
that they are resource intensive, often multiple users share common cluster infrastructure (multi-
tenancy), and these workloads can exploit different levels of operation and hardware parallelism.
However, the existing cluster management, resource scheduling, and software stacks are largely
isolated (except for resource isolation techniques like cgroups67): typical HPC clusters rely on
SLURM68, TORQUE, or HTCondor for job queueing; while data processing and ML systems
leverage cloud resources, dedicated system-level clusters (e.g., distributed database systems), or
shared clusters with resource schedulers like Mesos69, YARN70,71, or Kubernetes72. This separation
creates unnecessary data movement overhead and underutilization. Modern computing infrastructure
further offer multiple levels of hardware parallelism (cluster, node, NUMA-node, core) with
heterogeneous resources at each level. For each level of parallelism, there is a set of appropriate
techniques that efficiently schedule the computations, communication, and data access

55
T. Neumann. Effciently Compiling Effcient Query Plans for Modern Hardware. PVLDB, 4(9), 2011.
56
A. Crotty et al. An Architecture for Compiling UDF-centric Workflows. PVLDB, 8(12):1466-1477, 2015.
57
G. Belter et al. Automating the Generation of Composed Linear Algebra Kernels. SC, 2009, pages 1-12.
58
A. K. Sujeeth et al. OptiML: An Implicitly Parallel Domain-Specifc Language for Machine Learning. In ICML, pages
609-616, 2011.
59
Tarek Elgamal, Shangyu Luo, Matthias Boehm, Alexandre V. Evfimievski, Shirish Tatikonda, Berthold Reinwald,
Prithviraj Sen: SPOOF: Sum-Product Optimization and Operator Fusion for Large-Scale Machine Learning. CIDR 2017.
60
Google. TensorFlow XLA (Accelerated Linear Algebra). http://tensorflow.org/performance/xla
61
N. Vasilache et al. Tensor Comprehensions: Framework-Agnostic High-Performance Machine Learning Abstractions.
In CoRR, 2018.
62
S. Palkar et al. A Common Runtime for High Performance Data Analysis. In CIDR, 2017.
63
Fredrik Kjolstad et al.: The tensor algebra compiler. PACMPL 1(OOPSLA) 2017.
64
J. Knight. Intel Nervana Graph Beta. http://www.intel.ai/ngraph-preview-release/.
65
NVIDIA. TensorRT - Programmable Inference Accelerator. http://developer.nvidia.com/tensorrt.
66
Matthias Boehm et al: On Optimizing Operator Fusion Plans for Large-Scale Machine Learning in SystemML. PVLDB
11(12) 2018, pages 1755-1768.
67
Jérôme Petazzoni: Cgroups, name‐spaces and beyond: What are containers made from? DockerConEU 2015.
68
Don Lipari: The SLURM Scheduler Design, User Group Meeting, 2012.
69
Benjamin Hindmanet al: Mesos: A Platform for Fine‐Grained Resource Sharing in the Data Center. NSDI 2011.
70
Vinod Kumar Vavilapalliet al: Apache Hadoop YARN: yet another resource negotiator. SoCC 2013.
71
Carlo Curinoet al.: Hydra: a federated resource manager for data‐center scale analytics. NSDI 2019.
72
Brendan Burns et al.: Borg, Omega, and Kubernetes. ACM Queue 14(1): 10, 2016.

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workloads73,74,75. Integrated data analysis pipelines combine data processing, HPC, and ML, which
have different workload characteristics and requirements and offer parallelization opportunities at
different granularities (inter-operator, intra-operator, shared scans). Examples of recent relevant work
that explicitly addresses this heterogeneous hierarchy includes NUMA-aware ML data layouts and
update strategies76, NUMA-aware data and task placement for OLAP workloads77, scheduling
heterogeneous data-intensive tasks on heterogeneous hardware78, leveraging reinforcement learning
for multi CPU/GPU scheduling of DNN operations79, overlapping data transfer and compute for
multi-node, multi-GPU ML training80, scheduling irregular workloads of complex rendering pipelines
on GPUs with their multi-level execution hierarchy81, and partial data/task placement decisions for
exploiting heterogeneous devices82. Beyond the state-of-the-art we aim to provide well-integrated
hierarchical scheduling mechanisms (with internal communication) for the hierarchy of hardware
and operation levels83, effective means of data and task placement (with heterogeneous data
representations and workloads), as well as support for multiple heterogeneous devices75.
Managed Storage Tiers and HW Acceleration: Memory and storage virtualization techniques are
well-known and established. However, in contrast to classical block storage interfaces or distributed
file systems, modern and emerging memory and storage technologies provide means of computational
storage in terms of near-data processing. The advantages are reduced memory bandwidth limitations
and reduced energy consumption for data movement, which both are major bottlenecks. Examples
for basic operations are in-memory copy and initialization84 (leverage the DRAM row buffer), as well
as bitwise AND, OR, and NOT operations85 (leverage analog DRAM compute capabilities and triple
row activations). Other work explored pushing down data reorganization (e.g., quantization from
FP32 to INT8) for ML inference into logic layers of 3D-stacked DRAM11. Similar capabilities exist
though the memory and I/O hierarchy (caches, memory controller, main memory, SSDs, network)
and have been leveraged successfully. For example, recent smart SSDs and smart NICs have FPGA-
based or multi-core processor compute capabilities and existing work leverage them for pushing
query processing operations into smart SSDs86 as well as pushing network-centric operations (e.g.,

73
Ali Mohammed et al: Two-level Dynamic Load Balancing for High Performance Scientific Applications”. In
Proceedings of the SIAM Parallel Processing (SIAM PP 2020), 2020.
74
Ahmed Eleliemy et al: Exploring the Relation Between Two Levels of Scheduling Using a Novel Simulation Approach,
ISPDC 2017.
75
Florina M. Ciorba et al: A Combined Dual-stage Framework for Robust Scheduling of Scientific Applications in
Heterogeneous Environments with Uncertain Availability. IPDPS Workshops 2012.
76
Ce Zhang, Christopher Ré: DimmWitted: A Study of Main-Memory Statistical Analytics. PVLDB 7(12), 2014, pages
1283-1294
77
Iraklis Psaroudakis et al.: Scaling Up Concurrent Main-Memory Column-Store Scans: Towards Adaptive NUMA-
aware Data and Task Placement. PVLDB, 8(12), 2015, pages1442–1453
78
P. Tözün and H. Kotthaus. Scheduling Data-Intensive Tasks on Heterogeneous Many Cores. IEEE Data Engineering
Bulletin 42, 1, 2019, pages 61-72
79
Azalia Mirhoseini et al: Device Placement Optimization with Reinforcement Learning. ICML 2017, pages 2430-2439
80
Celestine Dünner et al.: SnapML: A Hierarchical Framework for Machine Learning. NeurIPS 2018.
81
Markus Steinberger et al.: Whippletree: task-based scheduling of dynamic workloads on the GPU. ACM Trans. Graph.
33(6), 2014, pages 1-11
82
Michael Gowanlock et al.: Accelerating the Unacceleratable: Hybrid CPU/GPU Algorithms for Memory-Bound
Database Primitives. DaMoN 2019
83
Ahmed Eleliemy, Florina M. Ciorba: Hierarchical Dynamic Loop Self-Scheduling on Distributed-Memory Systems
Using an MPI+MPI Approach. IPDPS Workshops 2019.
84
Vivek Seshadri et al.: RowClone: fast and energy-efficient in-DRAM bulk data copy and initialization. MICRO 2013.
85
Vivek Seshadri et al: Ambit: in-memory accelerator for bulk bitwise operations using commodity DRAM technology.
MICRO 2017.
86
Jaeyoung Do, Yang-Suk Kee, Jignesh M. Patel, Chanik Park, Kwanghyun Park, David J. DeWitt: Query processing on
smart SSDs: opportunities and challenges. SIGMOD 2013.

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data processing, or ML parameter servers) into the network controller87,88. Given the DRAM scaling
problem spurs research and development of emerging memory technologies such as resistive memory
technologies (e.g., Phase Change Memory). Compared to DRAM these technologies have different
idle/active energy consumption as well as performance characteristics. The resulting hybrid system
architecture motivates managed storage that allocates or migrates pages according to workload
characteristics such as read and write frequency. A key technique in this context is efficient metadata
maintenance89,90. Beyond state-of-the-art, we aim to support primitives of integrated data analysis
pipelines, hierarchical storage tier management including memory (e.g., DRAM, NVM),
secondary storage (e.g., SSDs), and tertiary storage (e.g., tapes), as well as aspects of data path
optimization, and adaptive data placement and processing.
Systematic Exploitation of Data Characteristics: Data characteristics such as sorted order and
intrinsic data redundancy are widely exploited by existing data management systems. For example,
lightweight91 (null suppression, delta, dictionary compression) and heavyweight92 (e.g., Huffman)
compression techniques and query processing over compressed data have a long history in database
systems, especially in the context of column stores93; and are now also widely used in systems like
Apache Spark (e.g., general-purpose, lightweight techniques like Snappy or LZ4). Recent work
focuses on tradeoffs of performance and compression ratio on modern processors with wide SIMD
registers94, GPUs95, and FPGAs96. Similarly, such lightweight compression techniques have been
adopted for ML systems to numeric matrices97,98, which reduces memory bandwidth limitations and
allows for linear algebra operations directly on the compressed representations. In HPC and ML
systems, other properties like sparsity and symmetry are addressed by special physical operators for
sparse-dense, and sparse-sparse BLAS and other matrix operations as well as mini-batch algorithms
that works especially well highly redundant datasets. Beyond state-of-the-art, we will focus on the
combined techniques from data processing, HPC, and ML systems, sparsity-exploiting execution
plans (over entire data flow DAGs), and compression and sparsity exploitation across heterogeneous
hardware devices.

87
Gustavo Alonso, Carsten Binnig, Ippokratis Pandis, Kenneth Salem, Jan Skrzypczak, Ryan Stutsman, Lasse Thostrup,
Tianzheng Wang, Zeke Wang, Tobias Ziegler: DPI: The Data Processing Interface for Modern Networks. CIDR 2019.
88
Alberto Lerner, Rana Hussein, Philippe Cudré-Mauroux: The Case for Network Accelerated Query Processing. CIDR
2019.
89
Justin Meza et al.: Enabling Efficient and Scalable Hybrid Memories Using Fine-Granularity DRAM Cache
Management. Computer Architecture Letters 11(2), 2012, pages 61-64.
90
Niv Dayan et al.: GeckoFTL: Scalable Flash Translation Techniques for Very Large Flash Devices. SIGMOD 2016.
91
Till Westmann et al.: The Implementation and Performance of Compressed Databases. SIGMOD Record 29(3) 2000,
pages 55-67.
92
Vijayshankar Raman, Garret Swart: How to Wring a Table Dry: Entropy Compression of Relations and Querying of
Compressed Relations. VLDB 2006, pages 858-869.
93
Michael Stonebraker et al.: C-Store: A Column-oriented DBMS. VLDB 2005, pages 553-564.
94
Patrick Damme et al: From a Comprehensive Experimental Survey to a Cost-based Selection Strategy for Lightweight
Integer Compression Algorithms. ACM Trans. Database Syst. 44(3): 2019, pages 1-46.
95
Evangelia A. Sitaridi et al: Massively-Parallel Lossless Data Decompression. ICPP 2016.
96
Jeremy Fowers et al.: A Scalable High-Bandwidth Architecture for Lossless Compression on FPGAs. FCCM 2015.
97
Vasileios Karakasis et al: An Extended Compression Format for the Optimization of Sparse Matrix-Vector
Multiplication. IEEE Trans. Parallel Distrib. Syst. 24(10) 2013, pages 1930-1940.
98
Ahmed Elgohary et al.: Compressed Linear Algebra for Large-Scale Machine Learning. PVLDB 9(12) 2016, pages
960-971.

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2 Impact
2.1 Expected Impacts
2.1.1 Contribution to Expected Impacts Mentioned in the Work Program
The expected impacts as mentioned in the work program of topic “ICT-51-2020: Big Data
technologies and extreme-scale analytics” align very well with our three strategic objectives. In the
following, we describe the related expected impacts and set challenging yet realistic goals in the form
of Key Performance Indicators (KPIs).
Impact 1: “Increased productivity and quality of system design and software development thanks to
better methods, architectures and tools for complex federated/distributed systems handling extremely
large volumes and streams of data” (Horizon 2020 Work Programme 2018-2020, Part 5.i - Page 49)
Objective 1 (System Architecture, APIs, and DSL) directly addresses the challenge of low
productivity of developing integrated data analysis pipelines that combine data integration, data
preparation, ML model training and scoring, as well as HPC components. Providing appropriate APIs
and language abstractions, and good systems support for such pipelines, as well as seamless
integration with existing frameworks and programming models will (1) remove custom glue code and
for orchestrating these frameworks, (2) remove redundant implementations of basic functionality, and
thus, (3) simplify experimenting with conceptual and algorithmic approaches to solve a given
application problem. Regarding our four use case studies, we aim at the following KPI targets:

# KPI Description KPI Target

K1 Min code size reduction of integrated pipelines 10x
K2 Number of integrated pipelines developed on top of 8
the new language abstractions (APIs and DSL)
K3 Number of manual export/imports within developed 0
integrated pipelines

While code size is a rather imprecise measure, K1 represents a reduction of code size (e.g., lines of
code) for specifying the integrated pipelines by at least an order of magnitude for all applications.
The smaller the code size, the easier it will be to develop new pipelines, as well as understand and
extend existing pipelines, which also reduces the likelihood of bugs. Additionally, K2 states that we
aim to develop at least eight complex integrated data analysis pipelines using the new language
abstractions. This includes one DLR, two IFAT, one KAI, and one AVL use case, two additional
pipelines as part of DaphneBench, as well as one prepackaged pipeline for result analysis of the
DaphneBench toolkit. Finally, K3 indicates that all manual data export/import steps and data transfers
of intermediate results of a pipeline should be reduced to zero, i.e., should be eliminated. This is
crucial for a seamless composition and full automation of these pipelines.
Impact 2: “Demonstrated, significant increase of speed of data throughput and access, as measured
against relevant, industry-validated benchmarks” (Horizon 2020 Work Programme 2018-2020, Part
5.i - Page 49)
Objective 1 (System Architecture, APIs, and DSL) and Objective 2 (Hierarchical Scheduling) further
address the challenge of unnecessary overhead and low utilization due to expensive data exchange
between disconnected programming models and libraries, as well as statically provisioned data
processing, HPC, and ML clusters, as well as data exchange between heterogeneous computing
devices, and missing exploitation of opportunities of multi-devices operations and analysis pipelines.
Furthermore, Objective 3 (Use Cases and Benchmarking) aims to develop an initial proposal for a
new benchmark of integrated data analysis pipelines, that if successful, might itself become an

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“industry-validated benchmark”. Although research progress is difficult to predict in advance, we
believe the following KPIs set realistic goals.

# KPI Description KPI Target

K4 Average runtime improvements of developed pipelines 4x
compared to baseline methods
(in at least one metric of execution time, memory
consumption, or energy consumption)
K5 Average increase in cluster resource utilization 1.5x
(non-idle nodes and devices)

K4 aims to improve the average end-to-end runtime of developed pipelines by 4x compared to

baseline methods. This indicates the average of a range of applications with different optimization
opportunities, but we believe by properly utilizing available hardware devices (at cluster and device
level), by avoiding unnecessary data transfer and materialization, by exploiting sparsity, and by
pushing operations down into storage, some applications might experience speedups of more than an
order of magnitude, so 4x on average is realistic. Furthermore, we believe that a 1.5x (or 50%)
improvement of utilization of available resource is possible, especially in pipelines that exhibit DM,
HPC, and ML components which otherwise would use isolated resources. Together, these KPIs
ensure good scalability (good utilization without much overhead, yielding end-to-end improvements).
Impact 3: “Demonstrated adoption of results of the extreme-scale analysis and prediction in
decision-making, including AI (in industry and/or society)” (Horizon 2020 Work Programme 2018-
2020, Part 5.i - Page 49)
Objective 3 (Use Cases and Benchmarking) fosters an initial industry adoption by creating success
stories in terms of implementing complex integrated pipelines for the four use case studies on top of
the new language abstractions and thus, leveraging the entire system reference implementation. With
increased productivity, users will be able to more quickly explore new ideas in order to yield more
accurate predictions. Specifically, we aim to achieve the following two KPIs.

# KPI Description KPI Target

K6 Number of integrated pipelines that combine data- 6
parallel computation, HPC primitives, and ML models
K7 Average reduction of prediction errors in industry use 20%
case studies based on integrated data analysis pipelines

K6 indicates that 6 out of the at least 8 developed pipelines – including a pipeline at Petabyte scale –
combine components of data-parallel computation, high-performance computing, and distributed ML
training and scoring, which makes a case for the distributed execution of integrated data analysis
pipelines and their good scalability. Finally, K7 states that we aim to achieve a 20% error reduction
on average across the different use case studies, which makes a case for productivity, while also
advancing the state-of-the-art in important applications such as earth observation, semiconductor
manufacturing, material degradation modeling, and automotive vehicle development.
Impact on Industry and Society: Improving prediction accuracy of these important use cases will
also have direct positive impact on industry and society. First, establishing data analysis pipelines for
semiconductor production data (and more broadly for device quality and reliability of semiconductor
devices) is a crucial step towards automation and Industry 4.0. High levels of automation in both
development and production will be needed to keep European companies competitive. In addition,
we will further strengthen Europe’s R&D know-how by using the new opportunities given by HPC,
ML, and large-scale data processing. Integrated data analysis pipelines over distributed datasets from

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R&D and manufacturing opens the way to new insights and new products. Second, improving the
analysis of local climate zones at global scale can help better understand temporal changes of climate
zones and potentially guide a respective policy process, which importance was emphasized by the
climate emergency, declared Nov 11, 2019 by the European Parliament99. Beyond the impact of
improved prediction accuracy of the use case studies, the developed open and extensible system
infrastructure has the potential to become an enabling technology underneath applications of various
domains, which would result in even larger impact on industry and society.

2.1.2 Additional Substantial Impacts Not Mentioned in the Work Program

Impact 4 (Open and Extensible System Infrastructure): In addition to the aforementioned impact
dimensions and related KPI, we believe that an open and extensible system infrastructure and
accompanying reference implementation creates substantial impact as well. Establishing a non-
company-controlled open source system for integrated data analysis pipelines for data processing,
HPC, and ML has two positive side effects. First, it makes European small- and medium-sized
enterprises more competitive in a space that is primarily controlled by large US and Chinese cloud
providers and hardware vendors. Second, designing the system from ground up with extensibility in
mind might enable easier transfer of state-of-the-art algorithms from distributed data processing,
HPC, and ML systems into practice, which we make explicit via an additional KPI:

# KPI Description KPI Target

K8 Number of implemented baseline solutions 2 x 5 = 10

K8 states that we will implement and make available at least 2 state-of-the-art baselines per work
package WP3-WP7, which are anyway required for proper experimental evaluation of the individual
results of these system-oriented work packages.

2.1.3 Barriers and Obstacles

Apart from risk factors concerning the project implementation (which are discussed in Section
3.2.1.4), there are two, closely-related, major barriers that may influence the expected impact.
Barrier 1 (Lack of Adoption): Integrated data analysis pipelines aim to combine data processing,
HPC, and ML systems, which are three evolving communities with their respective systems and
programming models. Accordingly, broad adoption hinges on various technical and non-technical
aspects that are only partially in control of the consortium.
In order to mitigate this potential obstacle, we assembled a diverse consortium with tremendous
experience and reputation in building systems in all three of these areas, and with a great network of
industrial and academic contacts because we believe that DAPHNE’s success heavily depends on
bringing the right people together. For example, Tilman Rabl (HPI) was involved in Apache Flink as
a data-parallel computing framework, as well as various big data and ML benchmarks; Ce Zhang
(ETH) was involved in building DeepDive (acquired by Apple) for ML-based knowledgebase
construction as well as various modern ML systems; Matthias Boehm (KNOW) was involved in
building Apache SystemML (previously IBM), an ML system for linear algebra programs on top of
Apache Spark, which also included various HPC concepts like parallel for loops; Marcus Paradies
99
Press Release European Parliament: The European Parliament declares climate emergency, Nov 29 2019,
https://www.europarl.europa.eu/news/en/press-room/20191121IPR67110/the-european-parliament-declares-climate-
emergency

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(DLR) worked on graph processing in the SAP HANA environment; Pinar Tözün (ITU) helped to
build IBM Db2 Event Store, an HTAP (hybrid transactional and analytical processing) system on top
of column-store technology and Apache Spark. Wolfgang Lehner (TUD) and Philippe Bonnet (ITU)
have long-time expertise in data processing with HW acceleration, near-data processing, and
computation storage, as well as strong contacts to global industry like SAP, Intel, NEC, and Samsung
as well as the HPC community. Florina Ciorba (UNIBAS) and Nectarios Koziris and team come
directly out of the HPC community and have outstanding background in HPC runtime infrastructures,
scheduling, and linear algebra operations. In addition, UM as a EuroHPC supercomputing center and
the major use case partners DLR, IFAT, KAI, and AVL with their deep domain expertise in important
use case studies will help create reference projects or success stories, and thus, foster adoption. Ales
Zamuda (UM) has also ties to the optimization community and related benchmarking efforts. Finally,
to allow for smooth transitioning to the new language abstractions, we aim for a seamless integration
of existing frameworks, tools, and libraries to allow their joint usage.
Barrier 2 (Evolving State-of-the-Art): The DAPHNE project addresses an important, real-world
problem, which was so far not appropriately addressed because it requires a holistic view of the stack
from language abstractions to distributed runtime plans. However, given the increasing importance
of such integrated pipelines, we expect competing projects in the future.
The evolving state-of-the-art, which we initially expect primarily from industrial projects, would
affect the baseline comparisons of our defined KPIs. However, competition is good as it often spurs
innovation in favor of its users. We will mitigate the risk of outdated baselines and missed KPIs by
continuously monitoring new projects and relevant papers, integrating applicable ideas, and using the
evolving state-of-the-art to focus our attention on devising novel techniques for aspects that still show
unnecessary overhead and unnecessarily low utilization (compared to peak performance of the
available hardware). In fact, we would like to turn this obstacle around, and create an open and
extensible system architecture that allows more rapid advancement of the state-of-the-art. Finally,
integrated pipelines have the potential of exploiting the accuracy-runtime trade-off, which can only
be done in close collaboration with the individual applications.

2.2 Measures to Maximize Impact

The measures in the DAPHNE project for maximizing impact cover a wide spectrum of activities
including (1) dissemination and exploitation via publications and talks, contributions to benchmarks
and standards, and open sourcing the DAPHNE reference implementation, (2) proper research data
management of data and artefacts along with their meta data, (3) potential transfer and exploitation
to markets, and (4) effective communication activities.

2.2.1 Dissemination and Exploitation of Results

The initial dissemination and exploitation plan aims to maximize the impact of the DAPHNE project,
especially in terms of (1) scientific research output and impact on the DM, HPC, and ML research
communities, as well as (2) adoption by potential users in terms of system and data engineers and
domain-specific applications and use cases. This plan will be refined from the perspective of the
running project and considering the initial results in WP10, and shared with D10.1 in M18.
Basic Principle: An overarching goal in all dissemination, exploitation, and communication
activities is to facilitate exchange and interaction among stakeholders of the DM, HPC, and ML

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systems communities. We believe using consistent terminology, comparing against relevant
baselines, and creating connection points for related work is crucial to accomplish that.
Research Impact: A first major channel of disseminating our research output will be through
scientific publications. In this context, we aim for quality over quantity by focusing primarily on top-
tier (i.e., CORE A* and A) conference and journal publications in all three research communities of
DM, HPC, and ML systems, potentially augmented with conference on network and operating
systems, as well as programming languages. Table 2.2a gives an overview of our target conferences
(we have planned travel budget for several conference attendances per partner: KNOW:15, AVL:4,
DLR:10, ETH:8, HPI:8, ICCS:8, IFAT:0, INTP:4, ITU:11, KAI:4, TUD:8, UM:4, UNIBAS:12, with
€2,000 per trip). A second major channel is related to open sourcing the reference implementation
and our benchmark and benchmarking toolkit. By making it easy to use (simple installation and test),
other research work can use the DAHPNE system infrastructure as baseline for end-to-end pipelines
or individual components, and integrate their own work to measure innovative components in the
context of an overall system. Furthermore, the definition of good benchmarks if often
underappreciated but can spur tremendous impact by allowing standardized comparisons and
fostering new research on remaining bottlenecks. Besides the main research publications, we also aim
to create broader awareness by giving talks and presentations at specialized workshops, forums, and
industry events.
Table 2.2a: Target Conferences for Scientific Publications
Abbreviation Name Rank
SIGMOD ACM Special Interest Group on Management of Data Conference A*
PVLDB Proceedings of the Very Large Databases Endowment A*
ICDE International Conference on Data Engineering A*
EDBT International Conference on Extending Database Technology A
CIDR Conference on Innovative Data Systems Research A
SC ACM/IEEE Supercomputing Conference A
HPDC ACM International Symposium on High Performance Distributed A
Computing
ISC ACM/IEEE Supercomputing Conference A
ICPP International Conference on Parallel Processing A
IPDPS IEEE International Parallel and Distributed Processing Symposium A
PPoPP Principles and Practice of Parallel Programming A
MLSys Conference on Machine Learning and Systems N/A
(prev. SysML)
NeurIPS Advances in Neural Information Processing Systems A*
ICML International Conference on Machine Learning A*
KDD ACM International Conference on Knowledge Discovery and Data A*
Mining
AAAI ACM International Conference on Knowledge Discovery and Data A*
Mining
IJCAI International Joint Conference on Artificial Intelligence A*
Euro-Par European Conference on Parallel and Distributed Computing A

Users and Applications: Spurring interest of potential users is crucial for impact via adoption. Our
dissemination efforts target two classes of potential users: system or data engineers that are
designing and operating robust infrastructures, and application users that are mostly concerned with
productivity and accurate predictions. Our dissemination and exploitation strategy comprise five
parts. First and foremost, it is about creating value by improved productivity, better resource
utilization and less overhead, as well as robust and reliable infrastructure. Second, open sourcing our

957407 DAPHNE – Part B 24/79

reference implementation is also for user adoption of very high importance because it lowers the
barrier to entry, especially since we aim to seamlessly integrate with the existing DM, HPC, and ML
system stacks. Third, as part of our benchmarking efforts, we consider making real-world data or
datasets with similar characteristics available in order to simplify reproducing our experimental
results and allow incremental progress at all levels (from system infrastructure to use case studies) by
the scientific community at large. Fourth, we will actively reach out to potential users via the networks
of the individual partners, and organizations like BDVA and EuroHPC, as well as aim for a good
presence at machine learning, data mining, and optimization conferences. Accordingly, the DAPHNE
consortium commits to supporting the BDVA in all events relevant to the activities of the project.
Fifth, we will carefully consider feedback, suggestions, and feature requests from early users and
stakeholders because we believe these use cases are crucial to ground our more foundational research
activities. In case these activities become too time intensive, we will pursue joint follow-up research
or industry projects with these users, which is also part of our go-to-market strategy.

2.2.2 Business Plan

The primary focus of the DAPHNE project is the definition and a reference implementation of
systems support for integrated data analysis pipelines, where we aim at open sourcing the DAPHNE
reference implementation to maximize impact on research communities and industry. Good system
infrastructure for integrated data analysis pipelines is in turn an enabling technology for domain-
specific services on top of this infrastructure, which can be offered at lower costs (in terms of
development costs due to improved productivity, and deployment costs due to reduced overheads).
Short-term Opportunities: Leveraging this technology for more cost-effective integrated data
analysis pipelines, individual partners can offer integrated pipelines for important internal and
external use cases as dedicated services in on-premise or cloud environments under subscription-
fee or pay-per-use models. Additionally, there are opportunities for organization trainings and
workshops, as well as for technical consulting in projects developing new applications on top of
this system infrastructure.
Mid-term Opportunities: Potential applications of integrated data analysis pipelines are ubiquitous.
Accordingly, follow-up projects may therefore use this infrastructure to address a diversity of
specific global challenges, use cases or important industry applications. Furthermore, given the
extensible system infrastructure, hardware vendors or cloud providers may distribute accelerator
libraries of sub-components in exchange for software licenses or in order to drive cloud revenue.

2.2.3 Research Data Management Plan

The entire DAPHNE project team is committed to reproducible, open access research. For this reason,
we will setup an RDM (research data management) plan until month 6 (see D1.2), continuously
update this RDM plan as needed, and manage all research data (experiments and measurements,
processed data, published data, along with software artefacts where applicable) according to the
FAIR100 data principles (findable, accessible, interoperable, reusable). Relevant data assets and
artefacts from the industrial partners will be made available to the project partners, partially in
anonymized form.

100
FAIR Principles, https://www.go-fair.org/fair-principles/

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RDM Policies: KNOW as the project coordinator and its close association with TU Graz will follow
the recently released TU Graz RDM Policy (Dec 11, 2019) and will provide all partners with means
of storing relevant research data for at least 10 years through existing system infrastructure. In case
of existing RDM policies of individual partners these policies take precedence.
Data and Standards: As mentioned in Section 1.3.3.1 (System Infrastructure, under Operational
Perspective), we aim at continuous experimentation at all levels as a basis for devising impactful
technological advancements. Accordingly, the primary research data is related to experimental
measurements of metrics such as runtime, memory consumption, and prediction accuracy. We will
systematically store these experimental results from micro benchmarks, micro-architectural analyses,
and summary statistics along with rich meta data (e.g., configuration and parameters) to enable later
analysis, interpretation, and reproducibility. For the sake of interoperability, we will store the results
in standard text formats like CSV101 (comma separated values) – potentially compressed with codecs
like GZIP, Snappy, or LZ4 – which also allows search and analysis with a variety of existing tools
including the DAPHNE system infrastructure. Additionally, we will also store (1) trained ML models
in standard exchange formats like CSV, PMML, or ONNX, (2) software artefacts of deliverables and
milestones, and (3) all published data like papers, articles, talks, and presentations.
Data Curation and Preservation: Along with the individual versions of research data, we will
maintain a catalog that links the various datasets to its meta data in order to allow search and reuse.
As already mentioned, the preservation happens through TU Graz cloud infrastructure, which also
allow to assign persistent identifiers for important datasets and artefacts. The DAPHNE project does
not deal with or store personal data in terms of “any information relating to an identified or
identifiable natural person (data subject)” according to the European Data Protection Regulation. In
contrast to the large input datasets of our use case studies, the size of obtained research data during
the project lifetime is expected to be small (assuming that detailed experiment traces are kept just
temporarily), so the data costs of data curation and preservation are negligible and will be covered by
the RDM infrastructure of the project partners.
Knowledge Management and Protection: The DAPHNE project will take all necessary measures
to ensure open access to all scientific publications, especially peer-reviewed papers. Many of the top-
tier conference in data management (SIGMOD, PVLDB), high-performance computing (SC, HPDC,
ISC), and machine learning and data mining (NeurIPS, ICML, KDD, AAAI, IJCAI) are already open
access. Furthermore, for remaining ACM conferences, authors always retain the “right of self-
archiving or posting rights” (Green Open Access), which we will do via the project website, websites
of individual partners or facilities like arxiv102 or Zenodo103. In exceptions, we will pay open access
fees to make our papers accessible to the general public (Gold Open Access), which currently requires
$700 per paper. By default, we will prefer open access venues.

2.2.4 Communication Activities

As already stated, a basic principle of all our dissemination, exploitation, and communication
activities is to facilitate exchange and interaction among stakeholders of the DM, HPC, and ML
systems communities. Accordingly, when defining the overall system architecture in WP2, we will
conduct a detailed requirements and specification analysis (T2.1) in close collaboration with the

101
Common Format and MIME Type for Comma-Separated Values (CSV) Files, https://tools.ietf.org/html/rfc4180
102
arXiv.org preprint archive, Cornell University, https://arxiv.org/
103
Zenodo (http://zenodo.org) is a general-purpose open-access repository developed under the European OpenAIRE
program and operated by CERN.

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network of the project partners and other stakeholders. Throughout the project, we further focus on
publicity via publications and tasks (T10.1).
Additional Communication Activities: Besides the main channels of scientific publications, open
sourcing the DAPHNE reference implementation and related community efforts, as well as various
forms of spurring interest of potential users, we will establish additional communication channels.
First, as part of project coordination (task T1.1 in WP1), we will setup a website which clearly
communicates the project motivation, objectives, and novelty compared to state-of-the-art, provide
regular updates via news and links to publications and talks for more details. Second, we make use
of “academic twitter” by creating a dedicated project twitter account and regularly amplifying news
and publications. In order to create interest for this account (beyond a unidirectional promotion of our
own results), we will also use it to interact with related projects, as well as discuss and share
interesting content broadly related to integrated data analysis pipelines. During these interactions, we
will focus on specific sub-communities where applicable. Third, we will actively participate in
meetings, forums, and workshops of relevant organization like BDVA and EuroHPC in order to
connect early on with other stakeholders and potentially different perspectives. Fourth, we leverage
the existing newsletter and marketing infrastructure of the project partners to share success stories
with a broader audience and actively spur interest in the related networks. These activities will have
a special focus on small and medium enterprises, as increased productivity and lower barriers to entry
democratizes integrated data analysis pipelines. Fifth, the consortium will ensure additional visibility
of DAPHNE activities and results to the general interested public through press and media actions
at regional, national, the EU and worldwide levels by the KNOW PR& Marketing department. Sixth,
the scientific core community will be reached through scientific publications and presentations (see
Table 2.2b: Target Conferences for Scientific Publications).
Table 2.2b: Additional Communication Channels and Activities
Channel Activities Quantitative indicator
Project Create dedicated website; overview and 25 000 page views
Website detailed project description; regularly updated (source: website statistics)
news; links to publications and talks
Twitter Create project twitter account; amplify news 500 twitter followers,
(and other and publications via tweets and threads 1 tweet / week
social media) describing summaries of results. Distribution (source: account’s data)
and further amplification via personal twitter
accounts of the individual project partners.
Meetings Attendance of relevant meetings and forums 100 visits
and (e.g., conferences from Table 2.2a, EBDVF (source: beneficiaries
Workshops organized by BDVA, international/national reporting)
events of EuroHPC); participation in panels,
workshops, and community organized events.
Newsletters Share selected success stories and content 10 000 interested parties
(of partner) relevant to a broader audience via the reached through page views
newsletters and new sections of the individual and e-mail addresses
partner websites. (source: beneficiary reporting)
Press and The identified stakeholders’ communities will 20 000 views
Media be updated through two press releases, issued at (source: media coverage of
the middle and the end of the project. selected channel)
Scientific Publications and presentations at renowned 70 scientific publications and
publications conferences and events by DAPHNE scientists presentations (source:
and talks beneficiaries reporting)

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3 Implementation
3.1 Work Plan
3.1.1 Overall Structure
The work plan directly implements our three strategic objectives. Figure 3.1 shows an overview of
the overall structure and how the individual work packages primarily contribute to the strategic
objectives. First, WP1 and WP10 cover all aspects of project management and result dissemination,
and thus, are related to all objectives. Second, WP3 and WP4 design and build the language
abstractions as well as compiler and runtime infrastructure (Objective 1). Third, WP5-WP7 address
scheduling, computational storage, and HW accelerators (Objective 2). WP2 defines the overall
system architecture, involves all participating partners, and ensures the overall objective is met
(Objective 1 and Objective 2). Fourth, WP8 and WP9 cover all introduced use case studies and their
generalization in form of a benchmark, which together act as evolving applications to also qualify
and quantify the project progress both in terms of productivity and accuracy/runtime metrics
(Objective 3).

Figure 3.1: Overview Overall Work Package Structure

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 3.1.2 Gantt chart
WP/T LEAD NAME OF WP/TASK Duration 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48

WP1 KNOW Project Management M1 M48 D D D D D

1.1 KNOW Project Coordination M1 M48
1.2 KNOW Project Monitoring and Reporting M7 M48
WP2 KNOW System Architecture M1 M21 D D
2.1 KNOW Requirements and Specification M1 M3
2.2 ICCS Design System Architecture M1 M9
2.3 KNOW System Architecture Refinements M9 M21
WP3 ETH DSL Abstractions and Compilation M1 M36 D D D D D
3.1 KNOW Design of Language Abstractions M4 M18
3.2 KNOW Compiler Design and Implementation M4 M18
3.3 ETH Pipeline Optimizations M12 M48
3.4 KNOW Code Generation for Local and Distributed Operations M12 M48
WP4 ICCS DSL Runtime and Integration M1 M48 D D D D
4.1 ICCS Key Distribution Primitives M1 M12
4.2 HPI Integration Existing Frameworks and Libraries M3 M15
4.3 KNOW Local and Distributed Operations M7 M36
4.4 ICCS NUMA Awareness and Data Locality M12 M48
4.5 UNIBAS Efficient IO and Network Communication M12 M48
WP5 UNIBAS Scheduling and Resource Sharing M1 M48 D D D D
5.1 ICCS Scheduling of Pipelines and Workflows M1 M36
5.2 UNIBAS Task and Data Placement in Hierarchical Topologies M1 M36
5.3 UNIBAS Multi-tenant Resource Sharing M1 M36
5.4 ETH Parameter Server Update Strategies for Distributed ML M1 M36
WP6 ITU Computational Storage M1 M48 D D D D
6.1 ITU Analysis of Design Space of I/O Hierarchy M1 M12
6.2 ITU Selective Storage Tier Management M6 M48
6.3 TUD Near-data Processing M6 M48
6.4 DLR Data Path Optimizations M6 M48
6.5 ITU Adaptive Data Placement and Processing M13 M48
WP7 TUD HW Accelerator Integration M1 M48 D D D D
7.1 TUD Accelerated Key Operations and Data Access Primitives M1 M12
7.2 KNOW Compiler and Runtime Support for HW Accelerators M8 M18
7.3 ITU Performance Models and Cost Estimation M8 M24
7.4 TUD Multi-Device Operation Kernels M12 M36
7.5 KNOW Code Generation for HW Accelerators M7 M48
7.6 ITU Data Placement Decisions for Complex Pipelines M24 M48
WP8 IFAT Use Cases (ML4Sim, integrated pipelines) M1 M48 D D D D
8.1 DLR Earth Observation Case Study M1 M48
8.2 IFAT Semiconductor Manufacturing Case Studies M1 M48
8.3 KAI Material Degradation Case Studies M1 M48
8.4 AVL Automotive Vehicle Development Case Study M1 M48
WP9 HPI Benchmarking and Analysis M1 M48 D D D D
9.1 UNIBAS Survey of Existing DM, HPC, and ML Sys Benchmarks M1 M12
9.2 HPI DaphneBench Benchmark Definition M9 M30
9.3 HPI Internal Benchmark and Profiling Toolkit M21 M48
WP10 KNOW Dissemination and Exploitation M10 M48 D D D D
10.1 KNOW Continuous Dissemination via Publications and Talks M10 M48
10.2 HPI Benchmarks and Standardization M36 M48
10.3 KNOW Open Sourcing DAPHNE Reference Implementation M36 M48

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3.2 Management Structure, and Procedures
3.2.1 Organizational Structure
The designed DAPHNE management structure (Figure 3.2a) is based on well-proven methodologies
and aims at efficiency and transparency in decision-making, supporting natural and productive work
processes as well as a clear reporting line for potential conflicts. We intend for efficient administration
and effective communication flows while ensuring equal decision-making power of all 13 partners.
Furthermore, all partners have been involved in numerous research projects, including large
integrated projects and smaller specifically targeted research projects (see section 4.1 Partner
Descriptions). The straightforward management structure of DAPHNE draws from the experience
within these past and current projects and implements similar mechanisms, which have already
proven to be very effective.
A three-level management system has been chosen for DAPHNE while the coordinator (1st level) is
responsible for the overall management of the project. The WP leaders, altogether represented in the
advisory board (2nd level), are in charge of managing their respective work package as well as
carrying out the dissemination, communication and exploitation plans. The general assembly (3rd
level) is the consortium's ultimate decision-making body and consists of all project participants.

Figure 3.2a: Organizational Structure

Coordinator (KNOW): The DAPHNE project will be coordinated and managed by KNOW,
explicitly being responsible for all aspects of the interface between the project and the European
Commission (EC) and establishing and maintaining a complete view over the whole technical

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approach and work progress. The coordinator is ultimately responsible for the administration and
coordination of this project, including financial and legal aspects. Following the H2020 rules, first a
consortium agreement is created and signed by all partners before signing the grant agreement.
Second, the coordinator KNOW will create the Project and Risk Management Plan (D1.1.)
available to all participants starting month four of the project’s run time. This living document will
establish processes on the basis of roles and responsibilities assigned in Section 3.2 of this document,
along with a description of relevant tools to be used for reporting and project management as well as
measures to ensure the quality of results. The coordinator is also in charge of establishing the
communication channels (described below) between the partners in order to effectively carry out their
roles. Each year, DAPHNE will report to the EC about its progress and adherence to its goals. The
project coordinator is in charge of preparing these reports as well as the yearly EC review meetings.
Matthias Boehm will oversee DAPHNE as the person in charge of technical and scientific project
management. He will be assisted by a dedicated project manager responsible for all management,
planning and organizational topics. Additionally, resources and experienced personnel are available
from various departments at KNOW to tackle potential financial and legal issues or the preparation
of strategic concerns such as annual project meetings (advisory board, general assembly).
The coordinator KNOW has already coordinated and managed several collaborative EC funded
projects with a similar size as shown in the Figure 3.2b.

Figure 3.2b: KNOW participation in different EC funding programs and roles in EC research projects104

Project Manager: The project manager will be responsible for the day-to-day coordination of the
project. We plan an average of 3h per working day to carry out the project management tasks for the
DAPHNE consortium. He or she will ensure that the project management procedures as defined in
D1.1. are carried out throughout the project’s lifetime and that supporting tools and templates will be
made available. The project manager will implement a number of performance criteria that reflect the
quality of the work with respect to effort spent, costs occurred, and delays encountered. These
indicators will be updated regularly to maintain an overview over the project progress and to identify
divergence from initial planning and performance indicators timely.
Advisory Board: The advisory board is the senior supervisory entity and shall be responsible for the
proper execution and implementation of the decisions made by the general assembly. This body is
composed by the 8 work package leaders (KNOW, ETH, HPI, ICCS, ITU, KAI, TUD, UNIBAS) and
is chaired by KNOW as the coordinator. The advisory board coordinates the cooperation and

104
EC: https://ec.europa.eu/info/funding-tenders/opportunities/portal/screen/how-to-participate/org-details/997997111

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information flows between work packages and monitors the project implementation, helps in
resolving any issues that might arise, decides on minor changes to the work plan, proposes major
changes to the general assembly and reviews the project results, also assuring the quality of
deliverables and milestones. Already known from experience, most of the decided changes will
require approval from the EC which will be communicated with the EC through the project
coordinator. The advisory board will meet annually, and conduct monthly telephone conferences.
Starting M12 the coordinator, inter alia, leading WP10 “Dissemination and Exploitation” will ensure
quarterly calls including all 8 members of the advisory board to allow individual reporting on the
agreed and planned dissemination and exploitation plan. Within this communication format
additional dissemination actions are desired to be brought up and coordinated by the DAPHNE
project members to ensure maximum distribution of the project outcomes.
Under the H2020 rules on open research data, the DAPHNE advisory board must ensure that all
publications are subject to open access, while the general assembly must finally decide whether the
grounds for opting out will apply due to conflicting project priorities with open access needs. In
addition, the data management plan (D1.2) will be developed as a living document until M06.
General Assembly: The general assembly is the consortium's ultimate decision-making body and
consists of one vote for all DAPHNE partners. It addresses issues of strategic importance and takes
tactical decisions in the long and medium term while ensuring that the project fulfils its objectives
and contractual obligations as well as enforcing the rules of the grant agreement and consortium
agreement. For this purpose, each partner will nominate one representative to the general assembly
with the authority to discuss, negotiate and agree on decisions or make recommendations within the
framework of their responsibilities. In the course of the consortium agreement, detailed voting
mechanisms will be negotiated and fixed. The general assembly meetings are planned once per year.
Work Package Leader: Each WP leader is responsible for monitoring and coordinating the technical
work in its respective work package towards the objectives of the WP. The WP leaders report to the
advisory board and are also responsible to deliver the assigned deliverables. They coordinate the tasks
of all the partners involved and, through regular meetings, ensure the interaction of methods and
findings between work packages. WP meetings discuss issues specific to each work package, such as
detailed work plans, organization of data collection and discussion and presentation of results.
Task Leader: A task leader has been designated for each of the tasks in the WPs, performing
technical management of the corresponding activities: planning, monitoring and reporting to the WP
leader. Each individual partner will be ultimately responsible for the delivery of technical and
administrative outputs assigned to it.
Project member: Each participant is the smallest entity responsible for their contribution towards
the project and the EC. They are accountable for their work towards the task leaders leading the
respective tasks assigned to a WP.
Communication: The coordinator KNOW will provide a shared workspace to all partners and will
furthermore make a contact list available to them. An appropriate range of internal communication
tools will be used for an efficient information exchange. For the routine exchange of information, the
project will primarily use electronically assisted communication technologies such as
teleconferencing and videoconferencing software to keep travel efforts down and ensure daily
coordination. In addition to these tools, a meeting structure is put in place starting with the kick-off
meeting at the start of the project, where the communication and project management rules are
established and agreed upon. In addition, work package meetings and task meetings will be held more
regularly in the form of video calls or face-to-face meetings

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Quality Management: Because DAPHNE strives for a high level of quality, all project results will
be checked on a permanent basis by the manager to ensure that the priorities of the project are fully
achieved. Delivery schedules and milestones will make it possible to monitor the evolution of the
project, measure progress made, define priorities and optimize the progress of the project through
corrective measures. As a standard procedure, deliverables are checked by non-generational
collaborators. Here, the project manager has the right to have the deliverables checked by external
experts as well, where appropriate and after signing a non-disclosure agreement.
Conflict Resolution: In accordance with the grant agreement and the consortium agreement, each
partner agrees to participate in the efficient project implementation and is responsible for fulfilling
all its obligations. In accordance with this, the partners agree to timely communicate any significant
information, problem or delay which is likely to affect the project. Should conflicts arise, a conflict
resolution and escalation process will be applied to deal with technical and management conflicts
accordingly, as will be further detailed in the consortium agreement. This process requires each
conflict to be addressed, solved or decided at the lowest possible management level.as described
above. The basic assumption of DAPHNE is that agreement is reached by consensus, and this will
always be pursued first. Conflicts that cannot be resolved through this method of escalation will be
referred to the DAPHNE advisory board, which may be assembled by the project coordinator if
immediate action is required. Any amendments to the project plan and scope must be reviewed and
approved by the advisory board before recommending these changes to the general assembly, which
will vote by qualified majority on the related decisions (as specified in the consortium agreement).

3.2.2 Project Control, Processes, and Decision-making Mechanisms

Meetings: During the project, different types of regular meetings will be held:

 General Assembly Meeting: The general assembly will meet in person once a year,
organized and conducted by the project manager, to review the overall status of the project
(technical and administrative). It will be a forum for major decisions on the implementation
of the project plan. These meetings will discuss all issues of the project (including
unexpected difficulties, new ideas, etc.), financial and administrative aspects, strategic
issues, particularly in relation to sustainability of project outcomes, and risk management.
 Advisory Boards Meetings: The advisory board will also meet once a year in combination
to discuss results, work progress, future plans and technical issues. In addition, the advisory
board meets via conference call once a month.
 WP/Task Meetings: Such meetings will mostly take place via conference calls and
whenever a need occurs. This could include achieving important milestones, submitting
major outcomes, or managing a specific issue related to the WP or individual task activities.
 Weekly DAPHNE Student Conference Call: The coordinator, chaired by Matthias
Boehm, will schedule a fixed weekly online meeting with all project members actively
working on a task at the time. The aim of this call is to get regular updates on the progress
and make sure technical questions get clarified.
 EC Review Meetings: Together with the EC project officer the coordinator will schedule
yearly review meetings.
We expect the general assembly meeting to be held very closely together with the advisory board
meeting to save on travel expenses.

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Progress- and Resource Tracking: The implementation of efficient progress tracking is of utmost
importance in order to ensure the success of DAPHNE. The work undertaken in the various tasks will
be monitored by the task leaders who report to the WP leaders. These, in turn, are responsible for
monitoring the progress of their work package and the use of resources and will report to the advisory
board. The project coordinator will report to the EC H2020 project officer on the basis of progress at
the partner level and via the web-based reporting tool (EC Participant Portal).

3.2.3 Risk Management and Milestones

The DAPHNE project is a large and ambitious endeavor, which requires dedicated risk and innovation
management. Lists of risks, mitigation strategies, and milestones (which represent control points in
terms of synchronization and decision points for reflecting on the project progress) are included in
Part A. These lists will be the basis of continuous monitoring for risk occurrence and subject to review
and additions throughout the lifetime of the project. WP specific risks will be reported to the WP lead
who will evaluate the situation and manage mitigation measures. Additionally, risks that have
medium to high impact will be reported to the advisory board. Risks that have impact on the project
altogether or concern more than one WP will be handled by the advisory board. Continuous reporting
on active risks and status of mitigation will be an ongoing process. At the annual meetings, the general
assembly will be informed of the status of all risks and the advisory board will revise the list of
possible risks to keep track and be aware of issues that could not be identified beforehand.

3.3 Consortium as a Whole

Besides the detailed partner descriptions in Section 4, here we describe how the consortium as a whole
comes together as well as the roles and expertise of the individual partners. As mentioned in the
introduction, we assembled a joint consortium of complementary experts from the data management,
ML systems, and HPC communities.
Consortium Diversity: The project consortium
exhibits great diversity in four different
dimensions. First, and most importantly, the
consortium includes research organizations
from the data management community
(KNOW, DLR, ETH, HPI, ITU, ICCS), ML
systems community (KNOW, ETH), and HPC
community (UNIBAS, ICCS, UM), where
some of the partners (KNOW, ETH, ICCS)
contribute to multiple communities and thus are
able to create bridges among these areas.
Furthermore, all use case partners (AVL, DLR,
IFAT, KAI) leverage systems and techniques
from all three areas. An additional unique
aspect of this consortium is that several partners
collaborated in overlapping groups in previous projects, which increases the chances of an effective
implementation and a successful project completion. Second, despite partial close proximity, the
consortium brings together 13 partners from 7 European countries (with principal investigators from
9 European/Non-European countries) as visualized in the figure to the right. Third, we also have a
reasonable gender balance of a 3:1 male/female ratio and a good diversity of academic ages over all
academic positions from assistant professors, associate professors, to established full professors and

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senior industrial partners. Fourth, we believe there is also a good mix of academia and industry,
including two research centers and four industry partners of very different scales (KAI, AVL, IFAT,
INTP). These partners are complemented by the associated partners Xilinx and NEC that are generally
interested in joint collaborations with the DAPHNE project.
Roles and Expertise: The roles and expertise of the individual partners is directly linked to the
individual work packages, where we tried to have at least two experts per work package in order to
reduce risks in terms of dependencies on a single partner. In detail, KAI, AVL, DLR, and IFAT are
use case (WP8) partners with deep domain expertise in material degradation modelling, automotive
vehicle development and testing, earth observation, and semiconductor manufacturing. UM as a
EuroHPC supercomputing center complements these use cases with operational expertise, while
INTP complements them with expertise in scalable parallel computation. Regarding benchmarking
(WP9), HPI has a strong background in big data and ML benchmarks, while UNIBAS and ICCS
complement this with background on HPC benchmarking. Furthermore, TUD has significant
experience in exploiting HW accelerators (WP7) like GPUs, ASICs, and vector processors (NEC)
for data processing, which is complemented by expertise on FPGAs from INTP, micro-architectural
analysis from INTP and ITU, as well as ML workloads on GPUs from ITU and KNOW. Similarly,
ITU has a strong background in computational storage (WP6), especially for secondary storage like
SSDs, which is complemented by background on near-data processing, in-memory by TUD, on tape
by DLR, and on network interfaces by INTP. UNIBAS is the expert on hierarchical scheduling
(WP5), especially for HPC workloads, complemented by background from ETH and KNOW on
scheduling ML system workloads, and ICCS, ITU, and TUD on data processing. The DSL language
abstractions and compilation (WP3), as well as runtime for local and distributed operations as well
as key distribution primitives (WP4) requires expertise from many different areas and hence involves
many partners (KNOW, ETH, HPI, INTP, ITU, ICCS, UNIBAS, UM) all with special expertise for
subtasks. Similarly, system architecture (WP2), project management (WP1), and dissemination and
exploitation (WP10) are joint endeavors of the entire project team, where KNOW takes the lead due
to experience in project coordination, and background on building DSLs and systems for ML
workloads with relation to data management and HPC.
3.4 Resources to be Committed
In order to successfully complete the ambitious work plan and yield the expected impacts, the
DAPHNE Project is asking for a total EU contribution of €6 609 665 which includes a total staff
effort of 771 PMs. Table 3.4a shows the distribution of PMs to project partners and work packages.
The planned project budget exceeds the recommend budget of [€3M, €6M] by roughly 10%. The
reasons are (1) the multi-community context of integrated data analysis pipelines (data management,
HPC, ML systems), (2) the necessary diversity of real-world use cases and benchmarking in order to
ensure relevance and impact, (3) a good balance of academic and industrial partners, and (4) the risk
mitigation strategy of covering most areas of expertise with at least two partners in order to increase
collaboration and the likelihood of successful project completion.

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4 Members of the Consortium
4.1 Participants
4.1.1 KNOW

Full Short Participant

name
Know-Center GmbH
name
KNOW
Number 1

Brief description
Know-Center (KNOW) is Austria's leading research center for data-driven business and big data
analytics. As a connecting link between science and industry, KNOW conducts application-
oriented research in cooperation with other academic institutions and with companies. Within
KNOW, we maintain a wider perspective and approach data-driven business as a cognitive
computing challenge. Our scientific strategy is to integrate (big) data analytics with human-
centered computing methods in order to create cognitive computing systems that will enable
humans to utilize massive amounts of data. The Center has an excellent 18-year track record and
over 100 excellent researchers. KNOW founded the European Network of National Big Data
Centers of Excellence and was awarded the iSpace label in Silver as one of the leading big data
research centers in Europe by the Big Data Value Association (BDVA). From 2015 to 2018, we
published over 50 journal articles and over 160 conference articles in international peer-
reviewed media. Since 2001 KNOW has been bridging the gap between science and industry
within more than 700 applied scientific projects.
Data Management (DM) is a newly-established research Area at KNOW, which deals with big
data storage and real time streaming technologies. The goal of DM Area is to develop scalable
and compliant data infrastructures and architectures based on innovative database concepts and
real-time streaming technologies. Its mission is to simplify data science by providing high level,
data science-centric abstractions and building systems, as well as tools to execute these tasks in
an efficient and scalable manner.
Knowledge Discovery (KD) represents the data analytics perspective. The focus of this Area is
to research and develop algorithms and models for domain agnostic, data-driven analytics using
a variety of data types, ranging from textual to time series data. The goal is to extract a maximum
of value out of data with an appropriate (minimal) amount of human input. The Area’s
competences are ML, Information Retrieval and Natural Language Processing (NLP).
Core competences relevant to DAPHNE
The core competences of KNOW relevant to this project are three-fold. First, KNOW is an
experienced participant as well as a leader of EU-funded projects, which is furthermore reflected
by the excellent network of partners in academia and industry. Second, the DM area of KNOW,
headed by Matthias Böhm, has a track record of conducting high quality research in the field of
data management and systems research, materializing in award winning publications (see below)
and the implementation of systems for large scale machine learning (ML) applications. Third,

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 the KD area of KNOW, headed by Roman Kern, adds expertise (also underlined by top ranked
publications) in ML and data analytics to the application side of the project’s WPs.
Role and responsibility within DAPHNE
KNOW will coordinate DAPHNE and assume three major roles within the project. First, KNOW
will lead the project management. Secondly, KNOW will manage and drive all dissemination
and exploitation activities related to DAPHNE. Third, KNOW will contributes to WPs and
Tasks, as mentioned in Chapter 3, Implementation.
Curriculum vitae of senior staff
Prof. Dr. Roman Kern (male) (h-index 17)
is the Research Area Manager of the Knowledge Discovery division at KNOW, specializing in
ML and information retrieval. In addition, he has a strong background in NLP. He obtained his
Master's degree (DI) in Telematics and his PhD in Informatics at Graz University of Technology
(Austria). After graduating, he worked at a start-up company in the UK as a Marie Curie research
fellow and as software architect in the industry. He has participated in a number of EU research
projects as a coordinator and a WP leader. In addition, he has managed many large research and
development projects in cooperation with the industry. Dr. Kern is an Associate Professor at
Graz University of Technology, giving lectures and supervising Bachelor, Master and PhD
students. He has published over 70 peer-reviewed publications and achieved top rank results in
such international scientific challenges as CLEF and SemEval.
Prof. Dr. Matthias Böhm (male) (h-index 16)
is a BMVIT105-endowed Professor for Data Management at Graz University of Technology
(Austria) and a Research Area Manager for Data Management at KNOW. Prior to coming to
Graz, he was a research staff member at IBM Research - Almaden (USA), focusing primarily
on compilation and runtime techniques for declarative, large-scale ML in Apache SystemML.
Prof. Dr. Böhm received his Ph.D. from Dresden University of Technology (Germany) in 2011
with a dissertation on cost-based optimization of integration flows. His previous research
comprises systems support for time series forecasting, as well as in-memory indexing and query
processing. Prof. Böhm is a recipient of the 2016 VLDB Best Paper Award, a 2016 SIGMOD
Research Highlight Award and a 2016 IBM Pat Goldberg Memorial Best Paper Award.
Prof. Dr. Stefanie Lindstaedt (female) (h-index 24)
received her MSc. and PhD in Computer Science from the University of Colorado at Boulder
(USA) and completed her habilitation in Computer Science at Graz University of Technology
(Austria). Stefanie Lindstaedt is the Head of the Institute for Interactive Systems and Data
Science (ISDS) of Graz University of Technology and the Managing Director (CEO) of KNOW,
Austria's leading research center for data-driven business and big-data analysis. Prof. Dr.
Lindstaedt has an excellent track record in acquiring national and international research projects
and leading large interdisciplinary research projects and groups. She has published more than
150 scientific papers in conferences and journals and has supervised more than 15 doctoral
students. Prior to joining KNOW, she led several projects at Daimler (Chrysler) Research, Ulm
(Germany) and was a product manager for web globalization services at GlobalSight, Boulder
(USA). Moreover, Prof. Dr. Lindstaedt has extensive experience in process and technical
consulting, solution sales, marketing and organizational development for international
companies. She is on the Board of Directors of Big Data Value Association (BDVA) and Digital

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networked Data Association (DnD) and Smart Production Graz TU Graz Strategic Project and
is on the Advisory Board for Policy Making of High Level Expert Group on Open Science Cloud
(EOSC), EU Connect Advisory Forum (CAF), EU High Level Interest Group Open Science
Cloud (HLEG OSC) and Friends of Europe (FOE).
Dr. Xing Lan Liu (female)
is a Senior Data Scientist of the KD team at KNOW and an expert in big data analytics and NLP.
She received her PhD degree in Physics from Delft University of Technology (Netherlands).
From 2010 to 2017 she worked on big data analytics in the semiconductor and financial
industries, where she deployed ML applications in the production environment. Dr. Liu has co-
authored 10 patents and 3 publications. Currently, she is involved in several projects on NLP
with external partners at KNOW.
Dr. Mark Dokter (male) (h-index 4)
joined as a senior scientist in the research group for data management at KNOW. In 2019 he
received his PhD from Graz University of Technology in the field of computer science
specializing in computer graphics. For an extended research stay, he worked in the computer
graphics department at the Max-Planck Institute for Informatics in Saarbruecken, Germany from
2015 to 2017. His background and research interests reside in the topics of code generation,
parallel computation and scheduling on GPUs. At KNOW he provides and extends his expertise
in hardware accelerators and is currently focusing on bringing code generation for sparsity
exploiting operations to GPU.
Relevant publications (refereed [J] – journals, [C] – conferences)
 [J] Matthias Boehm, Berthold Reinwald, Dylan Hutchison, Prithviraj Sen, Alexandre
V. Evfimievski, Niketan Pansare: On Optimizing Operator Fusion Plans for Large-
Scale Machine Learning in SystemML. PVLDB 11(12): 1755-1768 (2018)
 [J] Ahmed Elgohary, Matthias Boehm, Peter J. Haas, Frederick R. Reiss, Berthold
Reinwald: Compressed Linear Algebra for Large-Scale Machine Learning. PVLDB
9(12): 960-971 (2016)
 [J] Matthias Boehm, Michael Dusenberry, Deron Eriksson, Alexandre V. Evfimievski,
Faraz Makari Manshadi, Niketan Pansare, Berthold Reinwald, Frederick Reiss,
Prithviraj Sen, Arvind Surve, Shirish Tatikonda: SystemML: Declarative Machine
Learning on Spark. PVLDB 9(13): 1425-1436 (2016)
 [J] Matthias Boehm, Shirish Tatikonda, Berthold Reinwald, Prithviraj Sen, Yuanyuan
Tian, Douglas Burdick, Shivakumar Vaithyanathan: Hybrid Parallelization Strategies
for Large-Scale Machine Learning in SystemML. PVLDB 7(7): 553-564 (2014)
 [J] Santos, T., Schrunner, S., Geiger, B.C., Pfeiler, O., Zernig, A., Kaestner, A. and
Kern, R. 2019. Feature Extraction from Analog Wafermaps: A Comparison of
Classical Image Processing and a Deep Generative Model. IEEE Transactions on
Semiconductor Manufacturing. 32, 2 (May 2019), 190–198.
 [C] Santos, T. and Kern, R. 2018. Understanding wafer patterns in semiconductor
production with variational auto-encoders. ESANN 2018 proceedings, European
Symposium on Artificial Neural Networks, Computational Intelligence and Machine
Learning (2018).

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  [J] Markus Steinberger, Michael Kenzel, Pedro Boechat, Bernhard Kerbl, Mark
Dokter, Dieter Schmalstieg: Whippletree: task-based scheduling of dynamic
workloads on the GPU. ACM Trans. Graph. 33(6): 228:1-228:11 (2014)
Relevant projects/activities
 AI4EU (2018-2020, ICT-26-2018-2019, https://www.ai4eu.eu/, EUR 20 million, 80
partners) will establish a world reference built upon and interoperable with existing AI
and data components and platforms. Eight industry-driven AI pilots will demonstrate
the value of the platform as an innovation tool. In order to enhance the platform,
research on five key interconnected AI scientific areas will be carried out using platform
technologies to stimulate scientific discovery and technological innovation. The results
will feed a new and comprehensive Strategic Research Innovation Agenda (SRIA) for
Europe.
 Data Market Austria (2016-2019, national lighthouse project, WP leader,
https://datamarket.at/, EUR 2.5 million, 17 partners) aimed at creating an ecosystem to
make use of data and providing solutions for data services. The partners included those
that provided data and those that were capable of creating value out of the data, e.g.,
data science start-up companies. KNOW created methods of optimizing the matching
of the data providers to the data consumers.
 HiDALGO (2018-2021, INFRAEDI H2020, WP leader / AI experts, https://hidalgo-
project.eu/, EUR 8 million, 13 partners) develops a computational and data analytics
environment, which facilitates a profound understanding of several major global
challenges to allow decision makers to predict possible outcomes of certain social
processes (e.g., migration, urban pollution, social networks). HiDALGO advances
HPC, HPDA and AI technologies in order to improve data-centric computation in
general. KNOW provides competencies in the area of Artificial Intelligence (AI) and
Deep Learning and the corresponding data science methods.
 iDev40 (2018-2021, ECSEL H2020, WP leader, http://www.idev40.eu/, EUR 47
million, 39 partners) is an innovative action whose goal is to achieve a disruptive or
“breakthrough change” step toward speeding-up the time-to-market by digitalizing the
European industry, closely interlinking development processes, logistics and
manufacturing. Ultimately, the project focuses on suitable digital technology
advancements to strengthen the electronic components and systems industry in Europe.
KNOW is WP leader and contributes the current state-of-the-art in the field of ML, e.g.,
Deep Learning algorithms.
 TRUSTS .(2020-2022, ICT-13-2019-2 H2020, EUR 5,97 million, WP leader, 17
partners) The lack of trusted and secure platforms and privacy-aware analytics methods
for secure sharing of personal data and proprietary/commercial/industrial data hampers
the creation of a data market and data economy by limiting data sharing mostly to open
data. This trend will continue if technical standards, quality levels and legal aspects are
allowed to diverge uncontrollably. TRUSTS will introduce trust into the concept of data
markets as a whole by developing a platform based on the experience of two large
national projects, while allowing the integration and adoption of future platforms. The

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 TRUSTS platform will act independently and as a platform federator, while
investigating the legal and ethical aspects that apply to the entire data valorification
chain, from data providers to consumers. This integration will be tested in practice by
6 companies, including 2 data providers, with 3 use cases.
 Safe-DEED (2018-2021, ICT H2020, administrative coordinator, EUR 3 million, 8
partners) develops privacy-enhancing technologies and guidelines to foster trust in data
sharing and to support the emergence of data markets, allowing companies to share data
without revealing private or secret information. To archive that, Safe-DEED has
brought together partners from cryptography, data science, business innovation and
legal domains who will develop new privacy-enabled cryptographic protocols
(coordinated by KNOW).
Resources
KNOW has an Interaction Lab and a Big Data Lab available, which enables us to carry out
research on innovative interaction technologies and analyze big data using contemporary
hardware (GPU cluster, Hadoop cluster). KNOW uniquely combines research excellence, a long
track record of collaboration with industry in terms of analyzing industrial data and working
together with various stakeholders in an organization, innovative (e.g., data analytics)
technology development and methodological know-how on embedding technology into practice.

4.1.2 AVL

Full AVL List GmbH Short AVL Participant

name name Number 2

Brief description
AVL List GmbH is the world's largest privately-owned company for development, simulation
and testing technology of powertrains (hybrid, combustion engines, transmission, electric drive,
batteries and software) for passenger cars, trucks and large engines. AVL has about 3850
employees in Graz (Austria), and a global network of 45 representations and affiliates resulting
in more than 9500 employees worldwide. AVL´s Powertrain Engineering division activities are
focused on the research, design and development of various powertrains in the view of low fuel
consumption, low emission, low noise and improved drivability. The Advanced Simulation
Technologies division develops and markets the simulation methods which are necessary for the
powertrain development work. The Instrumentation and Test Systems division is an established
manufacturer and provider of instruments and systems for powertrain and vehicle testing
including combustion diagnostic sensors, optical systems as well as complete engine, powertrain
and vehicle test beds. AVL supplies advanced development and testing solutions for

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conventional and hybrid vehicle components and systems like simulation platforms,
development tools and system integration tools.
Core competences relevant to DAPHNE
AVL acts as a use case provider, bringing in models and associated datasets on vehicle
development alongside its Integrated and Open Development Platform (IODP).
IODP enables a new way of model-based development. By combining and enhancing already
established capabilities, simulation models, data storage or automation systems and execution
environments, early, open and consistent functional integration is made possible, mastering the
complexity and the speed. Especially, AVL Model.CONNECT™4 empowers the
implementation of model-based development, closing the gap between virtual and real worlds,
resulting in cost benefits and efficiency increase across the entire development process.
Applicable in a broad range of powertrain and vehicle applications, it creates prototypes using
virtual and real components and available at every development step.
Role and responsibility within DAPHNE
AVL is a use case provider working on data-driven projection of characteristic values in vehicle
development.
Curriculum vitae of senior staff
Dr. Josef Zehetner (male)
received his MSc in Telematics and his PhD in Control Science from Graz University of
Technology (Austria). His research interests include data virtualization, knowledge modelling,
ML, co-simulation, real-time co-simulation, model-based systems engineering and control
science. He has worked for AVL List GmbH for more than 11 years in various positions.
Currently he is responsible for innovation and concept architecture within the “integrated open
development platform” strategy. From 2010 to 2014 he was leader of the research group co-
simulation at the Virtual Vehicle Research Center in.
Dr. Bernhard Peischl (male) (h-index 12)
received a MS in telecommunications engineering (2001) and a Ph.D. in computer science
(2004) from the Graz University of Technology (Austria). He has more than 15 years of
experience in software development and verification and validation of software-enabled
systems. Dr. Peischl has started his career at Siemens PSE Graz and was a coordinator of an
industrial competence network (managing the national R&D programs Softnet Austria and
COMET Softnet Austria II). Among others, he worked with Kapsch Group in the
telecommunications field and provided engineering leadership for NTT DATA’s e-mobility
solutions. He is currently an innovation manager in charge of sourcing, setting up and managing
national and European R&D programs within the AVL PTE (powertrain engineering) business
unit. Dr. Peischl has co-authored over 90 scientific articles in peer-reviewed workshops,
conferences, scientific journals and books. Since 2007 he has been a lecturer at Graz University
of Technology, covering such topics as software technology, AI and value-based software
engineering. He has been the finance chair of 8th IEEE International Conference on Software
Testing and from 2011-2018 was appointed a co-chair of the annual User Conference on
Software Quality, Test and Innovation.
Dr. Michael Hammer (male)
received a degree in mechanical engineering in 2007 and a PhD degree in the field of numerical
mechanics in 2012 from Graz University of Technology (Austria). He has worked in automotive

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powertrain development domain at AVL List GmbH since 2013. Initially he was responsible for
the area of component testing and tribology investigations. With the increasing focus on creation
of physics of failure models he took over the team management for reliability engineering in
2015. Since 2016 he has also been responsible for coordinating AVL’s activities in data
management, analysis and visualization for the service business – the so-called “Big Data” team.
Gerhard Schagerl (male)
received his MSc in computer science at the Johannes Kepler University Linz (Austria) in 2003.
Mr. Schagerl has been employed at AVL List GmbH since 2000. In the majority of this time he
was in a team leading role for AVL’s motorsport business. Beside other duties in this position
he was responsible for the development of a vehicle lap time simulation tool and its
implementation into a cloud computing environment. In 2018 Gerhard joined AVL’s Big Data
efforts in the role as Product Manager for Big Data services. In this position he defines Big Data
strategy and product portfolios and develops new data-driven business models. Gerhard has
extensive experience in computer science and deep knowledge of automotive industry as well
as big data applications.
Nadine Knopper (female)
received her Master’s degree in International Business from the University of Applied Sciences
FH Joanneum in Graz (Austria) in 2013. She started at AVL in 2012 and joined the department
of Research and Technology Development for Powertrain Engineering in 2014. She currently
holds the position of a specialist for EU project management, working on project coordination
of national and international funded projects. In this position, she is the administrative project
coordinator for five H2020 projects, as well as the administrative and legal contact for more than
twenty H2020 projects.
Verena Wagenhofer (female)
received her Master’s degree in Applied Ethics from Graz University of Technology (Austria)
in 2017. She joined the department of Research Co-ordination at AVL in 2018 and holds the
position of specialist in research funding, working in the coordination and administration of
national and international R&D projects. Before accepting her current position, Verena worked
in the fields of project management and international relations at Graz University of Technology
for nine years. Verena will be supporting the DAPHNE Consortium with regard to all ethics
aspects.
Relevant publications (refereed [J] – journals, [C] – conferences)
Mechatronics
 [J] Zehetner et al, Using the Distributed Co-Simulation Protocol for a Mixed Real-
Virtual Prototype. ICM 2019: 440-445
Control Engineering
 [J] Zehetner et al, A model-based approach for prediction-based interconnection of
dynamic systems. CDC 2014: 3286-3291
Software Product Lines
 [J] Zehetner et al., Requirement identification for variability management in a co-
simulation environment. SPLC (1) 2012: 269-274
Automotive Engineering

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  [C] B. Peischl et al., Automotive meets ICT - enabling the shift of value creation
supported by European R&D, Energy Consumption and Autonomous Driving, 4th
International Conference on Automotive Electronics Congress (SIA CESA 5.0) 2018,
December 2018, Société des Ingénieurs de l'Automobile.
Software Engineering
 [C] B. Peischl, Software Quality Research: from Processes to Model-based
Techniques, Software Quality Research: from Processes to Model-based Techniques,
Testing: Academic & Industrial Conference: Practice and Research Techniques, April
2015, IEEE Computer Society p. 1-6, ISBN 978-1-4799-1885-0, pdf
(doi:10.1109/ICSTW.2015.7107475)
Relevant projects/activities
 “EVOLVE, ID: ICT-11 (2018-2021, EUR 14,747,993). EVOLVE aims to build a large-
scale testbed by integrating technology from: The HPC world: An advanced computing
platform with HPC features and systems software. The Big Data world: A versatile big-
data processing stack for end-to-end workflows. The Cloud world: Ease of deployment,
access and use in a shared manner, while addressing data protection
 FED4SAE, ID: ICT- 04 (2017-2020, EUR 6,995,195). The overall ambition of the
FED4SAE innovation action (IA) is to boost and sustain the digitization of the
European industry by strengthening competitiveness in Cyber Physical Systems (CPS)
and embedded system markets.
 DEIS, ID: ICT-01 (2017-2019, 4,889,290). The DEIS project addresses the challenge
of assuring dependability of collaborative CPS by developing technologies that enable
a science of dependable system integration. Dependability engineering framework as
support to deploy dependable CPS and IOT. AVL coordinates this project.
Resources
AVL’s Integrated and Open Development Platform3 (IODP) enables a new way of model-based
development. By combining and enhancing already established capabilities, simulation models,
data storage or automation systems and execution environments, early, open and consistent
functional integration is made possible to master complexity and speed. Especially, AVL
Model.CONNECT™4 empowers the implementation of model-based development, closing the
gap between virtual and real worlds, resulting in cost benefits and efficiency increase across the
entire development process. Applicable in a broad range of powertrain and vehicle applications,
it creates prototypes, built with virtual and real components, available at every development
step.

4.1.3 DLR

Full German-Aerospace-Center, Short Participant

name
(Deutsches Zentrum für
Luft- und Raumfahrt) name
DLR
Number 3

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Brief description
The German Aerospace Center (Deutsches Zentrum für Luft- und Raumfahrt; DLR) is the
national aeronautics and space research center of the Federal Republic of Germany. Its extensive
research and development work in aeronautics, space, energy, transport, security and
digitalization is integrated into national and international cooperative ventures. DLR is also
responsible for the planning and implementation of Germany's space activities on behalf of the
federal government. Moreover, DLR is the umbrella organization for one of Germany's largest
project management agencies.
DLR's mission comprises the exploration of Earth and the Solar System and research for
protecting the environment. This includes the development of environment-friendly
technologies for energy supply and future mobility, as well as for communications and security.
DLR's research portfolio ranges from fundamental research to the development of products of
tomorrow. In this way, DLR contributes the scientific and technical expertise that it has acquired
to enhance Germany as a location for industry and technology. DLR operates major research
facilities for its own projects and as a service for clients and partners. It also fosters the
development of the next generation of researchers, provides expert advisory services to the
government and is a driving force in the regions where its facilities are located.
DLR operates the German satellite data archive and processes earth observation data on a large
scale in dedicated high-performance data analytics facilities. As such, the DLR has long-
standing expertise in handling and processing very large volumes of data and complex data
analysis tasks using ML techniques. From DLR, two institutes will participate in the DAPHNE
project: The Institute of Data Science (DLR-DW), located in Jena, Germany and the Institute of
Remote Sensing Technology (DLR-IMF)-DS, located in Oberpfaffenhofen, Germany.
Core competences relevant to DAPHNE
The DLR PI Dr. Marcus Paradies leads the research group “Data Management Technologies” at
DLR and has a significant expertise in large-scale data management of scientific data with a
focus on efficient storage techniques for handling cold data. In particular, near-data processing
and computational storage methods are his core competencies that can contribute significantly
to the DAPHNE project’s overarching goals.
Prof. Dr. Xiaoxiang Zhu leads the department of “Data Science in Earth Observation” at DLR-
IMF and has a profound expertise in applying AI methods on Earth Observation data (AI4EO),
with a special focus on urban areas.
Role and responsibility within DAPHNE
Within DAPHNE, Dr. Paradies acts as PI for DLR in the WPs “Computational Storage” and
“Use Cases“. Prof. Dr. Zhu will lead the use case “Remote Sensing of Urban Areas”.
Curriculum vitae of senior staff

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Dr. Marcus Paradies (male) (h-index 9)
is leading the Data Management Technologies research group at the Institute of Data Science in
Jena of the German Aerospace Center. Prior to that, he was a senior software developer and
architect in the SAP database department, where he led the development of graph processing
capabilities in the SAP HANA database system. Dr. Paradies received his Ph.D. in graph
processing support in columnar database systems from Dresden University of Technology
(Germany) in 2017. His current research interests include data management for scientific data
on modern hardware with a focus on computational storage and modern storage technologies.
Prof. Dr. Xiaoxiang Zhu (female) (h-index 31)
studied aerospace engineering in China and at the Technical University of Munich (Germany),
where she received her doctorate in 2011 and postdoctoral teaching qualification (habilitation)
in 2013. She has lead a Helmholtz junior university research group at the German Aerospace
Center (DLR) and TUM since 2013 and held visiting scholar positions in Italy, China, Japan and
the US. In 2015, Prof. Dr. Zhu was appointed a professor at Technical University of Munich and
since 2018 has headed the EO Data Science Department at DLR. The research of Prof. Dr. Zhu
focuses on signal processing and data science in earth observation. Prof. Dr. Zhu develops
explorative signal processing and ML algorithms, such as compressive sensing and deep
learning, to improve information retrieval from remote sensing data and to enable breakthroughs
in geoscientific and environmental research.
Relevant publications (refereed [J] – journals, [C] – conferences)
Data Management
 [C] Bunjamin Memishi, Raja Appuswamy, and Marcus Paradies. Cold Storage Data
Archives: More Than Just a Bunch of Tapes. In Proceedings of the 15th International
Workshop on Data Management on New Hardware, DaMoN 2019, pages 1:1--1:7,
2019
 [C] Marcus Paradies. CryoDrill: Near-Data Processing in Deep and Cold Storage
Hierarchies. In CIDR 2019, 9th Biennial Conference on Innovative Data Systems
Research, 2019
 [C] Marcus Paradies, Sirko Schindler, Stephan Kiemle, and Eberhard Mikusch.
Large-Scale Data Management for Earth Observation Data – Challenges and
Opportunities. In Proceedings of the Conference "Lernen, Wissen, Daten, Analysen",
LWDA, pages 285--288, 2018
Remote Sensing
 [J] Zhu X., Tuia D., Mou L., Xia G., Zhang L., Xu F., Fraundorfer F. (2017), Deep
Learning in Remote Sensing: A Comprehensive Review and List of Resources, IEEE
Geoscience and Remote Sensing Magazine 5(4), pp.8-36.
 [J] Mou L., Ghamisi P., Zhu X. (2017), Deep Recurrent Neural Networks for
Hyperspectral Image Classification, IEEE Transactions on Geoscience and Remote
Sensing 55(7), 3639-3655.
 [J] Zhu X., Montazeri S., Gisinger C., Hanssen R., Bamler R. (2016): Geodetic SAR
Tomography, IEEE Transactions on Geoscience and Remote Sensing 54 (1), 18-35.

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  [J] Zhu X., Bamler R. (2013): A Sparse Image Fusion Algorithm with Application to
Pan-sharpening, IEEE Transactions on Geoscience and Remote Sensing 51 (5), pp.
2827-2836.
 [J] Zhu X., Bamler R. (2010): Tomographic SAR Inversion by L1 Norm Regularization
– The Compressive Sensing Approach, IEEE Transactions on Geoscience and Remote
Sensing, 48(10), pp. 3839-3846.
Relevant projects/activities

 ML based Plasma density model (MAP)

o Helmholtz data science incubator initial funding
o 2020-2022
o Part: Subproject leader
o Data Management technologies for handling multi-dimensional scientific data
o 500K
 1016 Bytes from Social Media to Earth Observation Satellites (So2Sat)
o ERC Starting Grant
o 2017-2022
o http://so2sat.eu/
o Part: Principle Investigator
o Big Data for 4D Global Urban Mapping
o 1500K

Resources
DLR operates the German satellite data archive, a fully operational data archive for national and
international earth observations for the sake of long-term data preservation and data
dissemination. Also available are HPC and HPDA infrastructure at DLR Jena.

4.1.4 ETH

Full Short Participant

name
Eidgenössische Technische
Hochschule Zürich name
ETH
Number 4

Brief description
ETH Zurich is a science, technology, engineering and mathematics university in the city of
Zürich, Switzerland. It is an integral part of the Swiss Federal Institutes of Technology Domain
(ETH Domain) and is directly subordinate to Switzerland's Federal Department of Economic
Affairs, Education and Research. The school was founded by the Swiss Federal Government in
1854 with the stated mission to educate engineers and scientists, serve as a national center of
excellence in science and technology and provide a hub for interaction between the scientific
community and the industry.
Core competences relevant to DAPHNE

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The research group led by Ce Zhang focuses on the general area of ML systems. Specifically,
the focus is to understand the fundamental abstraction for next generation ML platforms. Over
the years, the group has been working on the scalability, accessibility, automation and usability
aspects of ML systems.
Role and responsibility within DAPHNE
The research group led by Ce Zhang will participate in the WPs related to the design of domain-
specific language for data processing, analytics and learning, while supporting other WPs on
topics related to ML.
Curriculum vitae of senior staff
Assistant Prof. Ce Zhang (male, h-index: 31)
is an Assistant Professor in Computer Science at ETH Zurich. He believes that by making data—
along with the processing of data—easily accessible to non-expert users, we have the potential
to make the world a better place. His current research focuses on building data systems to support
ML and help facilitate other sciences. Before joining ETH, Assistant Prof. Zhang was advised
by Christopher Ré. He finished his PhD round-tripping between the University of Wisconsin-
Madison and Stanford University (USA) and spent another year as a postdoctoral researcher at
Stanford University. He contributed to the research efforts that won the SIGMOD Best Paper
Award (2014) and SIGMOD Research Highlight Award (2015) and was featured in special
issues including the Science magazine (2017), the Communications of the ACM (2017), “Best
of VLDB” (2015) and the Nature magazine (2015). His work has been reported by the Atlantic,
WIRED, Quanta Magazine, the Verge, etc. For more information about his group please refer
to ds3lab.com.
Relevant publications (refereed [J] – journals, [C] – conferences)
 [C] Kaan Kara, Ken Eguro, Ce Zhang, Gustavo Alonso. ColumnML: Column-Store
Machine Learning with On-The-Fly Data Transformation. VLDB 2019.
 [C] Zeke Wang, Kaan Kara, Hantian Zhang, Gustavo Alonso, Onur Mutlu, and Ce
Zhang. Accelerating Generalized Linear Models with MLWeaving: A One-Size-Fits-
All System for Any-precision Learning. VLDB 2019.
 [C] T Li, J Zhong, J Liu, W Wu, C Zhang. Ease.ml: Towards Multi-tenant Resource
Sharing for Machine Learning Workloads.VLDB 2018.
 [C] Yu Liu, Hantian Zhang, Luyuan Zeng, Wentao Wu, Ce Zhang. MLBench:
Benchmarking Machine Learning Services Against Human Experts. VLDB 2018.
 [C] J Jiang, B Cui, C Zhang, L Yu. Heterogeneity-aware distributed parameter servers.
SIGMOD 2017.
Relevant projects/activities
 ZipML. Performance, Speed, Scalability. Speed has been one of the enabling factors
in the recent advancement of ML. However, even with the help of specialized hardware
(e.g., GPUs) speed is still a significant problem. The ZipML project focuses on building
scalable, distributed ML systems. Given a cluster of up to one hundred machines, how
can we achieve linear speed-up and scale-up when training large ML models? This
technical challenge involves two fundamental competing factors: (1) hardware
efficiency — how long it would take for the system to finish one training iteration; and

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 (2) statistical efficiency — how many iterations the system would need to run to
convergence to a given quality. When traditional system relaxation techniques (e.g.,
asynchronous communications, lossy communication compression, and decentralized
communications) are applied, the hardware efficiency often increases, whereas the
statistical efficiency often decreases. The entanglement of these two factors makes it
challenging both to reason about the behavior of a distributed ML system and to make
system design decisions given the infrastructure. In a series of studies, we
systematically explore the full trade-off space between asynchronous communications,
lossy communication compression, decentralized communications and their various
combinations, and their impact on the convergence of first-order methods. We
identified theoretical conditions under which these system relaxations do not have a
significant impact on convergence, which helps us to design more scalable training
algorithms for vairous ML models.
 Ease.ml/automl. A slow system is not usable, but a fast system is not necessarily easy
to use. With a distributed ML system with reasonable speed, many users now face a
different challenge: to develop ML applications one often requires making many
decisions at various stages, i.e., data cleaning, feature extraction, model selection,
hyperparameter tuning, post processing, and so on. For many users, even competent
engineers in large technology companies, making the right decision is difficult. As a
result, the second collection of projects of the ease.ml family focuses on creating
automation systems for all these stages of the ML pipeline. To what extent can we fully
automate the end-to-end process of generating a single ML model from a single
dataset? Most systems in the so-called AutoML space (e.g., Microsoft Azure ML,
Amazon SageMaker, Google AutoML Cloud, H2O, DataRobot, and others) are
constructed based on a rather fragile set of assumptions: (1) a single, isolated user; (2)
small/medium-size datasets; (3) zero data acquisition cost; (4) a subset of automation
stages; and (5) simple, static search space. Many of these assumptions are not valid
today and even more of them will not be valid in the foreseeable future. The technical
challenge is to build upon traditional AutoML algorithms, which are usually based on
the idea of balancing exploration and exploitation, and design novel algorithms for real
system scenarios in a principled way.
 Ease.ml. ML usability goes beyond making the process of training a single ML model
faster or automatic. With a fast, automatic ML training system, the remaining challenge
is to provide principled guidelines for the entire deployment and development process.
Our study in speed and automation merely improves existing abstractions without
introducing novel abstractions into existing ML systems. Focusing on the entire
Ease.ml family, which we termed “MLOps,” we began to contribute a new level of
abstractions into the existing ML systems. New abstractions that we have been working
on include (1) automatic feasibility study; (2) data sanity check; (3) data valuation; and
(4) CI/CD. Each of these introduces new abstractions that one does not observe in most
ML systems today and each contains a set of concrete research projects tackling the
underlying technical challenge.
Resources

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 Ce Zhang’s research group consists of 8 PhD students and 5 postdocs with diverse expertise and
backgrounds, which will provide valuable support to the DAPHNE project.
Operational Capacity
The personnel (one postdoctoral researcher and one doctoral researcher) for which we request
funding in this proposal has not been hired yet. We will actively and widely advertise these two
open positions upon a successful evaluation of this proposal.

4.1.5 HPI

Full Short Participant

name
Hasso Plattner Institut
name
HPI
Number 5

Brief description
The Hasso Plattner Institute (HPI) is unique in the German university landscape. Academically
structured as the independent Faculty of Digital Engineering at the University of Potsdam, HPI
unites excellent research and teaching with the advantages of a privately-financed institute and
a tuition-free study program. HPI is an elite, world-class educational facility. The Institute
already offers an optimal study and work environment and cooperates very closely with the
business community. HPI also maintains strong international contacts, for example with
Stanford University, an American Ivy League university in Palo Alto, California (USA).
Core competences relevant to DAPHNE
Prof. Dr. Tilmann Rabl leads the research group “Data Engineering Systems” at HPI and has
extensive expertise in benchmarking data management systems in various domains. He has been
part of several benchmarking standardization efforts within the Transaction Processing
Performance Council. In addition, he performs research on data processing on modern hardware
and end-to-end ML. With this background, he can contribute significantly to the DAPHNE
project. Within DAPHNE, Prof. Dr. Rabl will act as PI for HPI, mainly in the WP
“Benchmarking”.
Role and responsibility within DAPHNE
Within DAPHNE, Prof. Rabl acts as PI for HPI in the WP “Benchmarking.”
Curriculum vitae of senior staff
Prof. Dr. Tilmann Rabl (male) (h-index 18)
holds the Chair for Data Enineering Systems at the Hasso Plattner Institute and is a Professor at
the Digital Engineering Faculty of the University of Potsdam (Germany). He is also cofounder
and scientific director of the startup bankmark. Prof. Rabl received his PhD from the University
of Passau (Germany) in 2011. He spent 4 years at the University of Toronto (Canada) as a
postdoc in the Middleware Systems Research Group (MSRG). From 2015 to 2019, he was a

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senior researcher and a visiting professor at the Database Systems and Information Management
(DIMA) group at Technische Universität Berlin (Germany) and Vice Director of the Intelligent
Analytics for Massive Data (IAM) Group at the German Research Center for Artificial
Intelligence (DFKI).
Relevant publications (refereed [J] – journals, [C] – conferences)
Benchmarking
 [C] Karimov, J., Rabl, T., Katsifodimos, A., Samarev, R., Heiskanen, H., Markl, V.:
Benchmarking Distributed Stream Data Processing Engines. 34th IEEE International
Conference on Data Engineering, ICDE 2018, Paris, France, April 16-19, 2018. 1507-
1518 (2018).
 [C] Boden, C., Rabl, T., Schelter, S., Markl, V.: Benchmarking Distributed Data
Processing Systems for Machine Learning Workloads. Performance Evaluation and
Benchmarking for the Era of Artificial Intelligence - 10th TPC Technology Conference,
TPCTC 2018, Rio de Janeiro, Brazil, August 27-31, 2018, Revised Selected Papers. bll.
42-57 (2018).
 [C] Ghazal, A., Rabl, T., Hu, M., Raab, F., Poess, M., Crolotte, A., Jacobsen, H.-A.:
BigBench: Towards an Industry Standard Benchmark for Big Data Analytics.
Proceedings of the ACM SIGMOD International Conference on Management of Data,
SIGMOD 2013, New York, NY, USA, June 22-27, 2013. bll. 1197-1208 (2013).
End-to-end ML
 [C] Derakhshan, B., Mahdiraji, A.R., Rabl, T., Markl, V.: Continuous Deployment of
Machine Learning Pipelines. Advances in Database Technology - 22nd International
Conference on Extending Database Technology, EDBT 2019, Lisbon, Portugal, March
26-29, 2019. bll. 397-408 (2019).
 [J] Kunft, A., Katsifodimos, A., Schelter, S., Breß, S., Rabl, T., Markl, V.: An
Intermediate Representation for Optimizing Machine Learning Pipelines. Proceedings
of the VLDB Endowment. 12, 1553-1567 (2019).
Relevant projects/activities
 Berlin Big Data Center (BBDC) (2014-2018, TU Berlin, coordinator, basic research
on Big Data Processing, budget EURO 2 million). Basic research on the complete big
data processing stack. The goal is to empower people via “Smart Data,” i.e., to discover
new information based on their massive data sets.
 Streamline (2015-2019, H2020-ICT-2015, subproject leader, Hybrid Stream and
Batch Processing, budget EUR 0.7 million). The goal was to enhance the European data
platform Apache Flink to handle both stream data and batch data in a unified way.
 Proteus (2015-2019, H2020-ICT-2015, subproject leader, Stream-Batch Lambda
Architecture Support, budget EUR 0.8 million). The goal was to investigate and
develop ready-to-use scalable online ML algorithms and real-time interactive visual
analytics to deal with extremely large data sets and data streams.
 Berliner Zentrum für Maschinelles Lernen (BZML) (2018-2022, BMBF project,
subproject leader, basic research on ML, budget EUR 0.3 million). The Berlin Center

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 for Machine Learning (BZML, Berliner Zentrum für Maschinelles Lernen) aims at the
systematic and sustainable expansion of interdisciplinary ML research, both in proven
research constellations and new, highly topical scientific objectives that have not been
jointly researched yet.
Resources
HPI DataLab: An infrastructure for large scale data processing. Currently, the first stage has a
setup with 300TB capacity and a cluster comprising 16 HPC nodes, 2 NVRAM nodes and 1
Power machine with 4 GPUs. By 2021, the second stage will be deployed with a 10x increase
in the storage and computational capacities.

4.1.6 ICCS

Full National Technical Short ICCS Participant

name University of Athens, name Number 6
Institute of
Communication and
Computer Systems

Brief description
The Institute of Communications and Computer Systems (ICCS) is a non-profit Academic
Research Body established in 1989 by the Ministry of Education of Greece in order to carry
research and development activities covering diverse aspects of telecommunications and
computer systems. ICCS is associated with the School of Electrical and Computer Engineering
(SECE) of the National Technical University of Athens (NTUA) (Greece). The personnel of
ICCS consists of a number of research scientists and more than 500 associate scientists
(including PhD students). The research carried out in ICCS is substantially supported by the
School of Electrical and Computer Engineering, NTUA. ICCS is very active with regard to
European co-funded research activities and has been the project coordinator of many EU projects
in various programs. ICCS will participate in this project through the Computing Systems
Laboratory (CSLab) of the SECE of NTUA.
CSLab is one of the largest research laboratories of the Computer Science Department of the
School of Electrical and Computer Engineering of the NTUA. CSLab possesses strong expertise
in computer architecture and large scale parallel (HPC) and distributed systems (Big Data, Cloud
and P2P infrastructures). Its members have performed research and development both at the
higher level of algorithmic design and applications’ optimization, as well as the assembly and
operation of such systems with more than three decades of tradition in the implementation,
optimization and operation of systems at all scales. With its experienced staff in administration,

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training, consulting and development, CSLab has been significantly involved in the
implementation of several National and International Research projects on HPC, Cloud
computing, Big Data, applications, etc. The laboratory members have an academic record of
more than 300 research publications in the relevant fields in international journals and
conferences. The Lab has 3 faculty members, 6 experienced senior research associates and over
15 graduate students pursuing their PhD. Its alumni comprises more than 30 members, now
faculty members at various universities or research personnel in Greek and European IT research
centers and industry.
Core competences relevant to DAPHNE
CSLab will contribute to DAPHNE its significant experience in data processing and in
scheduling both HPC and data analytics workloads efficiently to optimize the resource sharing.
In addition, the DAPHNE project will leverage CSLab’s experience in benchmarking systems
of all scales, from CPU cores and accelerators to large scale parallel (HPC) and distributed
systems.
Role and responsibility within DAPHNE
ICCS will lead the design of system architecture (T2.2) and the development and integration
efforts of the DAPHNE DSL Runtime (WP 4). Further, ICCS will significantly contribute to the
development of efficient scheduling and resource sharing mechanisms (WP 5) and to the
benchmarking and analysis (WP 9) efforts.
Curriculum vitae of senior staff
Prof. Dr. Nectarios Koziris (male) (h-index 29)
is a Professor of Computer Science at the School of Electrical and Computer Engineering of
NTUA (Greece). His research interests include parallel and distributed systems, interaction
between compilers, OS and architectures, datacenter hyperconvergence, scalable data
management and large-scale storage systems. He has co-authored more than 150 research papers
with more than 4000 citations (h-index:29). As of 1998 he has been involved in the organization
of many international scientific conferences including IPDPS, ICPP, SC, SPAA, etc. He has
given a number of invited talks at conferences and universities. He is a recipient of two best
paper awards for his research on parallel and distributed computing (IEEE/ACM IPDPS 2001
and CCGRID 2013) and of an honorary recognition from Intel (2015) for his research and
insightful contributions to transactional memory (TSX synchronization extensions). Prof. Dr.
Koziris has participated as a partner or consortium coordinator in several EU projects involving
large-scale systems (CELAR, ASAP, E2DATA, ACTiCLOUD, EuroEXA, HiDALGO,
CYBELE, PRACE etc.). He is a member of the IEEE Computer Society, a senior member of the
ACM, an elected chair of the IEEE Greece Section and a founder of the IEEE Computer Society
Greece. To promote the open source software in Greece, he co-founded the Greek Free/Open
Source Software Society (GFOSS-www.ellak.gr) in 2008, with 29 Greek Universities and
Research Centers as members, where he is now serving as the Vice-Chair of the Board of
Directors. He was a member of the European Commission's cloud computing expert group
(2012-2013) which was established with the aim of developing a cloud computing vision for
Europe and future research directions. Prof. Koziris serves on the EC task force for the Next
Generation Internet. Within the last 10 years (2004-2014), he has served as the Vice-Chair for
the Greek Research and Technology Network-GRNET (www.grnet.gr). Prof. Dr. Koziris was
the founder of the ~okeanos project, a public Cloud IaaS infrastructure, one of the biggest ones
in the European public sector (topping out beyond 10.000 active VMs) and powered by the open

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source Synnefo software (www.synnefo.org). ~Okeanos and ~okeanos-global for the GEANT
community offer IaaS services to thousands of academics and researchers around Europe. He
also served (2013-2014) as a member of the BoD for the Athena Research and Innovation Center
in Information, Communication and Knowledge Technologies (https://www.athena-
innovation.gr/). Prof. Dr. Koziris is a member of the founding team and an advisor to Arrikto
Inc., a fresh startup based in Palo Alto, California that develops storage intelligence to access,
manage and store data in large-scale, heterogeneous and hybrid environments. For more please
refer to: http://www.cslab.ece.ntua.gr/~nkoziris.
Prof. Dr. Georgios Goumas (male) (h-index 17)
is an Assistant Professor at the School of ECE of NTUA (Greece). He graduated from the Dept.
of Electrical and Computer Engineering of NTUA (1999). He received a PhD Degree from the
School of Electrical and Computer Engineering from NTUA in January 2004. He is currently a
senior researcher in the Computing Systems Laboratory (CSLab) at the School of Electrical and
Computer Engineering of NTUA. His research interests include high-performance computing
and architectures, cloud computing, resource allocation policies, resource-demanding
applications, sparse algebra, automatic parallelizing compilers, parallel programming models,
etc. He has published more than 80 research papers in journals, international conferences and
peer-reviewed workshops. He has worked in several European and National R&D programs in
the field of High Performance Computing, Cloud Computing, Networking and Storage for IT
systems (ACTiCLOUD - Scientific Manager, EuroEXA - Coordinator, Bonseyes, HiDALGO,
HellasHPC, SMART-PIV, PRACE, PRESEMT, DOLFIN). He is a member of the IEEE,
HiPEAC and of the Technical Chamber of Greece.
Prof. Dr. Dionisios N. Pnevmatikatos (male) (h-index 27)
is a Professor at the School of Electrical and Computer Engineering of NTUA (Greece) and a
research associate with ICCS. He received his PhD in Computer Science in 1995 from the
University of Wisconsin–Madison (USA). He has participated in FASTER FP7 EU and EDRA
H2020 projects as a coordinator and in the AXIOM, dRedBox, and EXTRA H2020 and DeSyRe
FP7 as a Principal Investigator. He also took part in several national projects. His research
interests include Computer Architecture, with a focus on using reconfigurable computing to
create highly efficient, accelerated, heterogeneous parallel/rack-scale systems. Moreover, he has
worked on Reliable System Design, Networking Hardware and Network Processors,
Application Acceleration, Custom and Application-Specific Architectures and Hardware
Acceleration of Bioinformatics Algorithms. Prof. Dr. Pnevmatikatos has been on the Technical
Program Committee of such conferences as ISCA, FPL and DATE in Computer Architecture
and Reconfigurable System topics and a Program (co)chair for SAMOS 2018 and FPL 2011.
Dr. Konstantinos Nikas (male) (h-index 7)
received his Diploma in Electrical & Computer Engineering from NTUA (Greece) and his Ph.D.
in Computer Science from the University of Manchester (UK). He is a senior researcher in the
Computing Systems Laboratory (CSLab) at the School of Electrical and Computer Engineering
of NTUA. His research interests include high-performance computing, parallel and high
performance computer architectures, parallel programming models for shared memory and
distributed platforms, multithreaded and multicore processors, memory hierarchies and
resource-aware scheduling. He has participated in several research projects funded by the Greek
Government, as well as the EC (CYBELE, HiDALGO, EuroEXA, ACTiCLOUD, Bonseyes,
Grid4ALL, EGEE III, PRACE-1IP, PRACE-2IP, PRACE-3IP, HP-SEE, EGI Inspire, CELAR).
He is a member of IEEE, the Technical Chamber of Greece and HiPEAC.

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Dr. Nikela Papadopoulou (female) (h-index 2)
graduated from the School of Electrical and Computer Engineering of the National Technical
University of Athens (Greece) in 2012. She received a PhD Degree from the School of Electrical
and Computer Engineering of NTUA in July 2017. She is currently a post-doctoral researcher
in the Computing Systems Laboratory (CSLab) at the School of Electrical and Computer
Engineering of NTUA. Her research interests include high-performance computing,
performance modeling for large-scale systems, communication-aware resource allocation,
communication software, parallel programming models and optimizations for parallel
applications. She has participated in research projects funded by the Greek Government as well
as European R&D programs (CYBELE, HiDALGO, EuroEXA, PRACE-3IP, PRACE-2IP). She
is a member of the Technical Chamber of Greece.
Ms. Aikaterini Tachriltzidou (female)
graduated from the School of Economics of the National and Kapodistrian University of Athens
(Greece). She has participated as Administrative and Financial Manager in numerous Greek
National as well as EC H2020 & FP7 projects (MODISSENSE, ASAP, SELIS, ACTICLOUD,
EUROEXA, HiDALGO, CYBELE).
Relevant publications (refereed [J] – journals, [C] – conferences)
Application Analysis and Optimization
 [C] A. Elafrou, G. Goumas and N. Koziris: Conflict-Free Symmetric Sparse Matrix-
Vector Multiplication on Multicore Architectures. Proceedings of the International
Conference for High Performance Computing, Networking, Storage, and Analysis, SC
2019, 2019.
 [C] A. Elafrou, G. Goumas and N. Koziris: BASMAT: bottleneck-aware sparse matrix-
vector multiplication auto-tuning on GPGPUs. Proceedings of the 24th ACM
SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPoPP
2019, Washington, DC, USA, February 16-20, 2019.
Scheduling & resource sharing
 [C] I. Mytilinis, C. Bitsakos, K. Doka, I. Konstantinou and N. Koziris: The Vision of a
HeterogeneRous Scheduler. Proceedings of the 2018 IEEE International Conference on
Cloud Computing Technology and Science, CloudCom 2018, Cyprus, December 10-
13, 2018.
 [C] V. Karakostas, G. Goumas, E. B. Lakew, E. Elmroth, S. Gerangelos, S. Kolberg,
K. Nikas, S. Psomadakis, D. Siakavaras, P. Svärd and N. Koziris: Efficient resource
management for data centers: the ACTiCLOUD approach. SAMOS, pp 244-246, 2018
 [C] A. Haritatos, G. Goumas, N. Anastopoulos, K. Nikas, K. Kourtis and N. Koziris:
LCA a memory link and cache-aware co-scheduling approach for CMPs. Proceedings
of the International Conference on Parallel Architectures and Compilation, PACT 14,
2014.
Relevant projects/activities
 CYBELE (2019-2021, ICT-11a-2018-2020, https://www.cybele-project.eu/, budget
EUR 14,309,650). CYBELE generates innovation and creates value in the domain of
agri-food and its verticals in the sub-domains of PA and PLF. CYBELE aspires to

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 demonstrate how the convergence of HPC, Big Data, Cloud Computing and the IoT
can revolutionize farming, reduce scarcity and increase food supply, bringing social,
economic, and environmental benefits. CYBELE develops large scale HPC-enabled
test beds and delivers a distributed big data management architecture and a data
management strategy. ICCS provides expertise in the areas of HPC, Cloud Computing
and Big Data.
 HIDALGO (2018-2021, INFRAEDI H2020, https://hidalgo-project.eu/, budget EUR
7,991,500). Simulations with multiple parameters in the areas of healthcare, transition
of green technologies, etc., increase the overall complexity and require a cross-sectoral
approach for efficient execution of data and compute-intensive workloads. The
HiDALGO CoE addresses this challenge by enabling highly accurate simulations, data
analytics and data visualization and by providing knowledge on how to integrate the
various workflows and the corresponding data. ICCS contributes its expertise in the
areas of optimizing HPC applications and managing complex workflows of Big Data
analytics execution.
 EuroEXA, (2017-2021, H2020-FETHPC-2016, https://euroexa.eu/, budget EUR
19,949,022.50). An H2020 FET-HPC project that brings a holistic foundation from
multiple European HPC projects and partners together with the industrial SMEs to co-
design a ground-breaking platform capable of scaling peak performance to 400 PFLOP
in a peak system power envelope of 30 MW; over four times the performance at four
times the energy efficiency of today’s HPC platforms. Further, EuroEXA target a PUE
parity rating of 1.0 through use of renewables and immersion-based cooling. CSLab is
the coordinator of EuroEXA.
 E2DATA (2018-2020, H2020-ICT-2017-1, https://e2data.eu/, budget EUR 4,676,250):
An H2020 project that proposes an end-to-end solution for Big Data deployments that
fully exploits and advances the state-of-the-art in infrastructure services by delivering
a performance increase of up to 10x for half the cloud resources. It provides a new Big
Data software paradigm for achieving the maximum resource utilization for
heterogeneous cloud deployments without affecting the current Big Data programming
norms (i.e., no code changes in the original source).
 ACTiCLOUD (2017-2019, H2020-ICT-2016-1, https://acticloud.eu/, budget EUR
4,733,532.50). A project with the goal to design and implement a new cloud
architecture that will enhance the resource efficiency by utilizing the resource
disaggregation capabilities of the underlying hardware. On top of this, the project will
develop cloud management support for geographically distributed cloud sites and
support for large-scale, in-memory databases. CSLab is the coordinator of
ACTiCLOUD.
Resources
ICCS will grant access to its computational facilities to be used as a development and testing
infrastructure during the course of the project. These facilities include: i) A 32-node, dual, 4-
core Intel Xeon cluster with Gbit Ethernet and Myrinet (total number of cores: 256); ii) A 14-
node Intel Xeon cluster with Gbit Ethernet; iii) An OpenStack cluster installed in the
laboratory’s premises; iv) Various accelerators including latest generation high-end NVIDIA

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 GPUs, as well as Xilinx and Intel FPGAs; v) More than 30TB of storage. The total amount of
physical resources that can be offered sums of up to ~650 physical cores, 4TB of RAM and
30TB of storage space.

4.1.7 IFAT

Full Infineon Technologies Short Participant

name Austria AG name
IFAT
Number 7

Brief description
Infineon designs, develops, manufactures and markets a broad range of semiconductors and
system solutions. The focus of its activities is on automotive electronics, industrial electronics,
communication and information technologies, and hardware-based security. The product range
comprises standard components, customer-specific solutions for devices and systems, as well as
specific components for digital, analogue and mixed-signal applications. Over 60% of Infineon’s
revenue is generated via power semiconductors, almost 20% via embedded control products
(microcontrollers for automotive, industrial as well as security applications) and the remainder
via radio-frequency components and sensors. Infineon generates 30% of its revenue in Europe,
57% in Asia and 13% in the Americas.
Infineon organizes its operations in four segments: Automotive, Industrial Power Control, Power
Management & Multimarket and Digital Security Solutions. Infineon Technologies Austria AG
(IFAT) is a 100% subsidiary company of the worldwide operating semiconductor producer
Infineon Technologies AG and was founded in April 1999. IFAT develops and manufactures
semiconductor and systems solutions for all business areas. In Austria about 1,977 of 4,609
(12/2019) employees are working in the field of Research and Development. Hence, IFAT has
the largest R&D unit for microelectronics in Austria. This requires a high level of comprehensive
technology know-how in modelling, design and fabrication, as well as in the field of security.
In 2019 expenses of IFAT in the field of Research & Development were ~ EUR 525 million,
which corresponds to 17% of the business volume of EUR 3.113 million. Infineon Technologies
Austria AG is a worldwide semiconductor produces with long R&D history regarding power
semiconductors.
Core competences relevant to DAPHNE
For this project it is of great importance that IFAT provides its experience in the context of data
science, IT architectures, algorithms, data fusion, big data analysis and WIP flow management.
Role and responsibility within DAPHNE
IFAT will act as use case owner in the DAPHNE project. Furthermore, IFAT has experience in
working and managing European funded research projects.
Curriculum vitae of senior staff

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Dr. Andreas Starzacher (male)
graduated from Klagenfurt University (Austria) with a degree in computer sciences. In 2010 he
received his Ph.D. in information technology from Klagenfurt University, specializing in the
area of embedded multi-sensor data fusion architectures and algorithms. He joined Infineon
Technologies in 2010 and was responsible for specification and implementation of advanced
shop-floor control algorithms. As an IT Expert in the operations research department he
collaborated with manufacturing, line control, quality management and IT. In 2014 he joined
the R&D automotive division within Infineon Technologies as a configuration and change
manager designing and implementing a database architecture and software to enable efficient
processes in this area. In 2015 Dr. Starzacher took over further responsibility as an R&D project
manager for integrated circuit development for four years. In 2019 he started as a data scientist
and technical project manager at Frontend Manufacturing in the central maintenance department
and is responsible for data science initiatives focusing on strategies for AI into the production.
Dr. Starzacher has profound knowledge and professional experience in project management,
simulation, database and software engineering, statistical pattern recognition and classification,
ML and AI.
Dr. Andre Kaestner (male)
received a degree in Physics from University of Hamburg (Germany) and a Ph.D. in electrical
engineering from Technical University of Braunschweig (Germany) in 2006 in the area of high
frequency sensors based on high temperature semiconductor devices. He joined Infineon
Technologies in 2006 as a wafer test engineer in Regensburg who was responsible for statistical
method application and development in wafer testing. In 2012 he switched to Global Product
Engineering Methods Group in Villach as a process owner for outlier screening methods and
development and application of new outlier methodology. The main fields of Dr. Kaestner’s
interest/expertise are statistical screening methods, pattern recognition, measurement system
analysis and design of experiment.
Relevant publications (refereed [J] – journals, [C] – conferences)
Production Scheduling
 [C] Gerhard Friedrich, Melanie Frühstück, Vera Mersheeva, Ana Ryabokon, Maria
Sander, Andreas Starzacher and Erich Teppan. Representing production scheduling
problems with answer set programming approaches. In Operations Research
Proceedings 2014, Springer, Selected Papers of the Annual International Conference
of the German Operations Research Society (GOR), RWTH Aachen University,
Germany, September 2-5, 2014.
Machine Learning and Applications
 [C] Schrunner, S.; Bluder, O.; Zernig, A.; Kaestner, A.; Kern, R., A Comparison of
Supervised Approaches for Process Pattern Recognition in Analog Wafer Test Data,
Proceedings of the 17th IEEE International Conference on Machine Learning and
Applications, 2018
Relevant projects/activities
 Integrated Development 4.0 (iDev40), (2018-2021, H2020-ECSEL-2017-1-IA-two-
stage, http://www.idev40.eu/, budget ~ EUR 47 million). IFAT is coordinator of

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 iDev40 and leads also two WPs and several tasks, iDev40 has the goal to enhance the
digitalization of the European industry, closely interlinking development processes,
logistics and manufacturing.
 Intelligent Reliability 4.0 (iRel49) (2020-2023, budget EUR 103.6 million). IFAT is
a WP Leader and leads several tasks, iRel40 has the ultimate goal of improving
reliability for electronic components and systems by reducing failure rates along the
entire value chain.
 Power Semiconductor and Electronics Manufacturing (Semi40) (2016-2019,
H2020-ECSEL-2015-2-IA-two-stage, http://www.semi40.eu/, budget~ EUR 62 million).
IFAT has coordinated Semi40, Semi40 addressed the urgent need of increasing the
competitiveness of the Semiconductor manufacturing industry in Europe through
establishing smart, sustainable and integrated ECS manufacturing.
 Power2Power (2019-2022, H2020-ECSEL-2018-1-IA-two-stage,
https://www.infineon.com/cms/en/product/promopages/power2power/, budget ~ EUR
74 million). IFAT is task leader, Power2Power aims to foster a holistic, digitized pilot
line by accelerating the transition of ideas to innovations in the Power Electronic
Components and Systems domain.
 Artificial Intelligence for Digitizing Industry (AI4DI), (2019-2022, H2020-ECSEL-
2018-2-RIA-two-stage-1, https://ai4di.automotive.oth-aw.de/, budget ~ EUR 30
million). IFAT is a task leader, AI4DI main objective is enabling of performance,
industry and humanity via AI for digitizing the industry is the key to push the AI
revolution in Europe and step into the digital age.
Resources
Technology development, semiconductor process and manufacturing intellectual property, as
well as manufacturing logistics and manufacturing IT infrastructure, are performed at Infineon
Technologies Austria AG. Know-how on running and developing a large heterogeneous
manufacturing plant is well-established. Since the beginning of 1992, Infineon Technologies
Austria AG has had a group responsible for process development. The know-how is being
transferred from Villach to all Infineon Technologies production facilities. Infineon develops,
manufactures and markets innovative semiconductor products and complete system-on-chip
solutions. Within the proposed DAPHNE project IFAT will provide its experience gained during
the last years of conducting intensive research and development in this field.

4.1.8 INTP

Full Intel Technology Poland Short Participant

name sp. z o.o. name
INTP
Number 8

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Brief description
Intel has approximately 100,000 employees in more than 60 countries and serves customers in
more than 120 countries. The company designs and manufactures a wide variety of essential
technologies, including microprocessors, accelerators like FPGAs, and chipsets and the
additional hardware, software and related services that together serve as the foundation for many
of the world’s computing devices.
Over the last decade, Intel has evolved from a company that largely serves the PC industry to a
company that increasingly provides the vital intelligence inside all things computing. In fact,
more than half of Intel’s revenue is associated with products beyond the PC. Hardware and
software products by Intel power the majority of the world’s data centers, connect hundreds of
millions of cellular handsets and help secure and protect computers, mobile devices and
corporate and government IT systems. Intel technologies are also inside intelligent systems, such
as in automobiles, automated factories and medical devices.
Established in 1993, Intel Poland supports markets in Europe, Middle East and Africa (EMEA).
In 1999, Intel Corporation acquired Olicom, with their offices in Gdansk and over 120
employees, creating Intel Technology Poland sp. z o.o. (INTP). In addition to Intel’s core
semiconductor business, Intel Poland employees work in research and development, engineering
and sales and marketing, and provide core organization support.
INTP currently employs more than 2200 high-tech specialists, which represents about 10% of
employees hired in the IT sector in Pomerania. These are actively involved in hardware and
software development and enabling across most of Intel’s product lines, including server CPUs,
storage-class memory solutions, FPGAs and AI accelerators, graphics and high-performance
computer networks. Research and development area spans throughout multiple business groups
at Intel and technology.
INTP has been taking part in number of research and development grant programs, which
covered such topics as driver software enabling full use of the performance of graphics
controllers integrated with the processor; multimodal support system of audio, video and audio
communication with mobile computers; intelligent cloud computing, large-scale real-time and
in-situ visualization; and prototyping new architectures for large graph analytics and sparse AI
problems.
Core competences relevant to DAPHNE
INTP plays a core part in supporting the integration of Intel FPGAs into storage and
communication systems, and in further developing the SW stack for these devices. In addition,
INTP has significant competency in the integration of Intel’s Optane range of storage-class
memory and in developing SW stacks for the use, administration and analysis of such devices
and of storage workloads (including DPDK, SPDK and PMDK). The INTP teams are regularly
working with internal and external customers on the analysis of FPGA, storage and compute
workloads and in the adaptation and optimization of these.
Role and responsibility within DAPHNE
INTP plays a core part in supporting the integration of Intel FPGAs into storage and
communication systems, and in further developing the SW stack for these devices. In addition,
INTP has significant competency in the integration of Intel’s Optane range of storage-class
memory and in developing SW stacks for the use, administration and analysis of such devices
and of storage workloads (including DPDK, SPDK and PMDK). The INTP teams are regularly

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working with internal and external customers on the analysis of FPGA, storage and compute
workloads and in the adaptation and optimization of these.

Curriculum vitae of senior staff

Hans-Christian Hoppe (male)
is an Intel Principal Engineer and the director of the ExaCluster Lab at Research Center Jülich.
He has a long track record in HPC R&D, with an emphasis on programming models and tools,
application analysis and characterization, and pathfinding for future HPC platforms. His
achievements include significant impact on the MPI message-passing standard, the first
seamless and high performance grid infrastructure Unicore, pioneering use of vitalization in
Grid/Cloud systems and the Intel Cluster Tools line of SW products. He has ample experience
in about a dozen of European Union funded R&D projects spanning Frameworks 3 through 7
plus Horizon 2020. Hans-Christian has managed Intel’s participation in the HPC projects DEEP,
DEEP-ER, DEEP-EST (prototyping a novel, modular and adaptive architecture for converged
HPC, AI and data analytics workloads) and NEXTGenIO (evaluating non-volatile, storage class
memory in HPC and data analytics scenarios).
Dr. Christian Färber (male)
is a highly experienced field application engineer, focusing on enabling innovative storage and
memory use cases with FPGA and storage-class memory. In addition, he is working on
evaluating DM system acceleration via FPGAs. He has a Ph.D. in Elementary Particle Physics
and worked as a CERN applied fellow in facilitating FPGA-based compute acceleration for
online data filtering of the LHC and the LHCb experiment at Geneva. Furthermore, he worked
at Thales on FPGA algorithm development and sensor optimization for train safety systems
(SIL4) and as a hardware development engineer at Vector Informatik in the automotive industry.
Hans-Christian Hoppe and Christian Färber will coordinate the global INTEL contribution to
the DAPHNE project providing advice and guidance. Their effort will not be charged to the
project. Engineers and researchers from INTP, supervised by Michal Lewandowski, will
conduct the technical work within the individual WPs.
Relevant projects/activities
 INTP is involved as a special third party to Intel Deutschland GmbH into the H2020
VESTEC project (grant number 800904, https://vestec-project.eu/), which builds a
flexible toolchain combining multiple data sources, efficiently extracting essential
features, enabling flexible scheduling and interactive supercomputing and to realize 3D
visualization environments. Intel mainly contributes to the design and adaptions of the
visualization pipelines and to mechanisms for combining computations, data analysis
and in-situ visualizations.
 INTP is an important part to Intel’s involvement in the US Darpa “Hierarchical Identify
Verify Exploit” (https://www.darpa.mil/program/hierarchical-identify-verify-exploit)
and “Software Defined Hardware” (https://www.darpa.mil/program/software-defined-
hardware) projects, which aim at prototyping new system architectures for large-scale

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 Graph and sparse AI applications, providing the lion’s share of the workload analysis
and porting/optimization work and the prototypical runtime and simulation system.
Resources
INTP will use its internal test and evaluation platforms to test and validate its system integration,
system SW and use case results.

4.1.9 ITU

Full IT University of Short Participant

name Copenhagen name
ITU
Number 9

Brief description
Founded in 1999, the IT University of Copenhagen (ITU) is Denmark's leading university with
a focus on IT research and education. ITU performs state-of-the-art teaching and research in
computer science, business IT and digital design. The ambition of ITU is to create and share
knowledge that is profound and that leads to pioneering information technology and services for
the benefit of humanity. The university works closely with the business community, the public
sector and international researchers and is characterized by a strong entrepreneurial spirit among
both students and researchers. ITU in numbers: 2,300 students and 330 employees (FTE). ITU
is part of the consortium of Danish universities, which together with the Danish eInfrastructure
Cooperation (DeIC) constitutes the Danish contribution in the Euro-HPC Joint Undertaking.
Core competences relevant to DAPHNE
The data systems group at ITU focuses on improving the scalability and performance of data
systems, i.e., the low-level system software that supports the basic functionality of data-intensive
applications (e.g., ML, databases) on modern hardware infrastructures. In recent years, the data
systems group has defined the open-channel SSD subsystem in the Linux kernel, developed the
open-source framework OX for programming storage controllers and proposed innovative
scheduling strategies on hardware accelerated architectures.
Role and responsibility within DAPHNE
Within DAPHNE, ITU will contribute to the micro-view layer. ITU will be a leader of the
computational storage WP and will contribute to the scheduling and resource sharing, as well as
the hardware accelerator integration WPs. This is a great match to the data systems group
expertise and the interest in computational storage.
Curriculum vitae of senior staff
Prof. Pınar Tözün (female) (h-index 11)
is an Associate Professor at the IT University of Copenhagen. Before that, she was a research
staff member at IBM Almaden Research Center. Prior to joining IBM, she received her PhD
from École Polytechnique Fédérale de Lausanne (EPFL) in Switzerland. Her thesis was awarded

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the ACM SIGMOD Jim Gray Doctoral Dissertation Award Honorable Mention in 2016. Her
research focuses on performance characterization of data-intensive workloads and scalability
and efficiency of data-intensive systems on modern processors and storage.
Prof. Philippe Bonnet (male) (h-index 24)
is Professor at the IT University of Copenhagen. He is an experimental computer scientist with
a background in database management. He is a Marie Curie fellow with a track record of
successful research projects under DARPA, NSF (while a research associate at Cornell
University), EU and Danish funding (first at U.Copenhagen and since 2009 at ITU). For twenty
years, Prof. Bonnet has explored the design, implementation and evaluation of database systems
in the context of successive generations of computer classes in particular wireless sensor
networks and cloud computing. Currently, Prof. Bonnet’s research focuses on computational
storage.
Relevant publications (refereed [J] – journals, [C] – conferences)
Storage
 [J] Philippe Bonnet, Pınar Tözün, Ivan Luiz Picoli, Niclas Hedam: Open-Channel
SSD (What is it Good For). CIDR 2020
 [J] Ivan Luiz Picoli, Philippe Bonnet, Pınar Tözün: LSM Management on
Computational Storage. DaMoN 2019: 17:1-17:3
 [J] Matias Bjørling, Javier Gonzalez, Philippe Bonnet: LightNVM: The Linux Open-
Channel SSD Subsystem. FAST 2017: 359-374
Scheduling
 [J] Pınar Tözün, Helena Kotthaus: Scheduling Data-Intensive Tasks on Heterogeneous
Many Cores. IEEE Data Eng. Bull. 42(1): 61-72 (2019)
 [J] Anastasia Ailamaki, Erietta Liarou, Pınar Tözün, Danica Porobic, Iraklis
Psaroudakis: Databases on Modern Hardware: How to Stop Underutilization and Love
Multicores. Synthesis Lectures on Data Management, Morgan & Claypool Publishers
2017
Relevant projects/activities
 ClyDE project (2011-15): Funded by the Independent Research Fund Denmark.
ClyDE proposed Open-Channel SSDs as a means to organize cross-layer
communications between database systems and flash-based SSDs. The main outcome
of the project is LightNVM, the Linux framework for Open-Channel SSDs.
 DFC Open-Souce Community (2014-2019): Collaboration with DellEMC, NXP,
Seoul National University, Tsinghua University and Microsoft Research. Software
ecosystem for the DFC computational storage platform. The main outcome of the
project is the OX framework for programming storage controllers.
https://github.com/DFC-OpenSource/
Resources
PitLab: The data systems lab at ITU supports a rack of computers equipped with a range of
hardware accelerators, computational storage platforms and experimental SSDs.

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 DeiC National Supercomputer Infrastructure based on four types of HPC systems: interactive,
throughput-oriented, large memory and accelerated systems. In particular, the accelerated HPC
system planned for 2020 is relevant for DAPHNE, providing support for computational storage.

4.1.10 KAI
Kompetenzzentrum
Full Short Participant
name
Automobil- und
Industrieelektronik GmbH
name
KAI
Number 10

Brief description
KAI Kompetenzzentrum Automobil- und Industrieelektronik GmbH is a well-established
industrial research center with a large national and international network of partners and proven
experience in the coordination of interdisciplinary research projects. In addition to core
competences in the area of power electronics, reliability test concept development, advanced
semiconductor materials research, statistical lifetime and degradation modeling, data science
and multi-physics FEM simulation, KAI maintains a well-equipped electronics laboratory as
well as state-of-the-art simulation computing resources. KAI GmbH was founded under the
Austrian competence center program K-ind in 2006, with a focus on robust metallization and
interconnect technologies and active temperature cycle reliability of power semiconductors.
Since then KAI have supported our project partner Infineon with device level reliability stress
test, analysis and modeling methodology for numerous new technology developments. Together
with our academic partners KAI has published the results of our work at international conference
and in journals. The topics covered in our publications include stress test concepts and
equipment developed at KAI, data science methods for the analysis and extraction of
information out of large data sets, new results in the areas of electrical and thermo-mechanical
FEM simulations and microphysical materials research.
Advanced data analytics, computer vision and ML: In the past years KAI has established
expertise in various areas of advanced data analytics, including statistics, ML and computer
vision. With the know-how gained KAI currently supports data-driven decision making in the
semiconductor industry in the production area by developing algorithms to identify deviations
and to support root cause analysis. Furthermore, KAI develops lifetime and degradation models
for the reliability assessment, using statistical methods based on data from electrical
measurements and quantitative information extracted from images of degraded semiconductor
devices.
High Performance Computing: Since 2008, KAI maintains HPC equipment (see resources)
which is regularly updated in order to support the research in advanced data analytics, computer
vision, ML and diverse fields of simulation (FEM, coupled circuit simulation, etc.). To ensure

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efficient use of the HPC resources, KAI applies state-of-the art methods for cluster maintenance,
scheduling and distribution of jobs.
Core competences relevant to DAPHNE
Together with the DAPHNE consortium, KAI will develop an extended data analysis pipeline,
including not only the advanced analysis and classification of electrical signals of semiconductor
devices, but also methods to process measured data automatically and to store the results in a
database. To achieve this, KAI will contribute to DAPHNE with the following core
competences: extensive know-how on ML methods (theory) and their implementation and
application for the analysis of electrical signals, theoretical expertise on HPC and practical
experience on how to use it efficiently in lab environments, profound understanding of
requirements (data structures, data management, system architectures, APIs, ...) for a successful
and easy to use data analysis pipeline in lab environments and in productive environments, deep
insights into semiconductor degradation data (incl. pain points and pitfalls for data pre-
processing and the subsequent analysis).
Role and responsibility within DAPHNE
KAI will contribute to WP 8 as a use case provider and will develop a data analysis pipeline
together with other partners from the DAPHNE consortium. Furthermore, KAI will contribute
to WP 2 and WP 3 by defining the system architecture and designing the language abstractions
needed for the use case. The results of the investigations will be benchmarked and analyzed in
WP 9. In addition to know-how sharing within the DAPHNE consortium in the above-mentioned
WPs, KAI will disseminate the results at international conferences and in journals (WP 10).
Curriculum vitae of senior staff
Dr. Olivia Pfeiler (female) (h-index 3)
is a Project Manager and Senior Researcher who started at KAI in 2007. In 2008 she completed
her Master’s degree and in 2011 received her PhD with the highest distinction in technical
mathematics with focus on statistics from the Alpen-Adria-University Klagenfurt (Austria)
(Title: Prediction of Smart Power Device Lifetime based on Bayesian Modeling). After that she
worked as a postdoc on the development of statistical methods for reliability modeling in the
semiconductor industry. Since 2014 she has been the project manager of the data science &
degradation modeling research group at KAI. During her time at KAI, she attended national and
international conferences, workshops and trainings and contributed to various national and
international funding projects. Her main research areas are: statistical lifetime and degradation
modeling, Bayesian statistics, ML and computer vision.
Dr. Benjamin Steinwender (male) (h-index 2)
is a Senior Researcher who studied at Carinthia University of Applied Sciences (Austria) from
2005 to 2010 and received a BSc and a MSc with distinction in the fields of Electronic
Engineering and Microelectronics. Since August 2008 he has been employed as a scientific
researcher at KAI GmbH in Villach. Benjamin Steinwender received his doctoral degree in
Information Technologies from Alpen-Adria Universität Klagenfurt (Austria) in 2016 with the
highest distinction (Title: A Distributed Controller Network for Modular Power Stress Tests).
His research interests include the design of distributed embedded in-situ measurement systems
and data management for semiconductor reliability testing.
Relevant publications (refereed [J] – journals, [C] – conferences)

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Information Technology
 [C] Steinwender, B.; Glavanovics, M. & Elmenreich, W., Executable Test Definition
for a State Machine Driven Embedded Test Controller Module, Proceedings of the 13th
IEEE International Conference on Industrial Informatics, 2015
 [C] Steinwender, B.; Einspieler, S.; Glavanovics, M. & Elmenreich, W., Distributed
power semiconductor stress test & measurement architecture, Proceedings of the 11th
IEEE International Conference on Industrial Informatics, 2013, 129-134
Data Science
 [C] Schrunner, S.; Bluder, O.; Zernig, A.; Kaestner, A.; Kern, R., A Comparison of
Supervised Approaches for Process Pattern Recognition in Analog Wafer Test Data,
Proceedings of the 17th IEEE International Conference on Machine Learning and
Applications, 2018
 [C] Alagić, D.; Bluder, O.; Pilz, J., Quantification and Prediction of Damage in SAM
Images of Semiconductor Devices, ICIAR2018: 15th International Conference on
Image Analysis and Recognition, vol. 10882, pp. 490-496, 2018
Relevant projects/activities
 Power Semiconductor and Electronics Manufacturing 4.0 (SemI40), (2016-2019,
http://www.semi40.eu/, budget EUR 62 million, 37 partners from five European
countries (Germany, Italy, France, Portugal and Austria)). The main work areas were
a) safe, secure and authenticated data communication, b) agile manufacturing and fast
reconfiguration, c) methodologies for automated decision making, d) methodologies
for virtualization of facilities and e) assessment of technical, social and economic
impact. The research activities of KAI focused on the development of classification
methods to identify patterns in semiconductor wafer test data with the aim to define a
lot/wafer Health Factor and link it to manufacturing data.
 Integrated Development 4.0 (iDev40) (2018-2021, http://www.idev40.eu/, budget
EUR 47 million, 38 partners from 6 European countries (Germany, Austria, Belgium,
Italy, Spain, Romania)). The main objective of this project is to achieve a disruptive
step towards speedup in time to market by digitalizing the European industry, closely
interlinking development processes, logistics and manufacturing. In this Project KAI
develops a data-driven root cause analysis method based on diverse semiconductor
manufacturing data.
 Arrowhead Tools for Engineering of Digitalisation Solutions (Arrowhead Tools),
(2019-2022, https://www.arrowhead.eu/arrowheadtools, budget EUR 91 million, 88
partners form 17 European Countries (Sweden, Austria, Spain, Turkey, Poland,
Germany, Czech Republic, Portugal, Norway, Netherlands, Belgium, Latvia, Romania,
France, Hungary, Switzerland, Finland)). Arrowhead Tools has the global aim to reduce
engineering costs for digitalization and automation. To achieve this the project makes
use of and develops new engineering methodologies and suitable integrated tool chains.
In this project KAI develops and implements statistical methodologies to support quick
and reliable decision making in the semiconductor frontend manufacturing process.

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  Potentiale und Risiken von Pilottechnologien für Leistungshalbleiter bezüglich
Zuverlässigkeit, Fertigung und Anwendung (Power2020) (2018-2021,
https://projekte.ffg.at/projekt/3349853, EUR 16.5 million, FFG General Programme).
In this national funding project KAI investigates together with Infineon Technologies
Austria the risks and potentials of semiconductor pilot technologies, with a strong focus
on reliability, manufacturability and future applications. The statistics/data science
team emphasizes its research on the application and development of computer vision
methods to classify and quantify degradation in images of different sources (ultra sonic,
scanning electron microscopy), as well as in the multivariate statistical analysis of
lifetime data.
 Intelligent Reliability 4.0 (iRel40) (2020-2023, already accepted for funding, budget
EUR 104 million, 79 partners from 14 European countries (Germany, Austria,
Slovakia, Sweden, Finland, Belgium, Italy, Spain, Netherlands, Turkey, Ireland,
France, Portugal and Slovenia)). The project goal is to improve the reliability of
electronic systems along the entire value chain. The research activities of KAI focus on
four main areas: 1) ML methods and advanced data analytics for image classification
and the analysis of production data; 2) hardware development for application relevant
stress testing; 3) corrosion reliability of electronics; and 4) analogue test coverage.
Resources
High Performance Computing (HPC) Cluster
The HPC cluster in combination with the relevant software tools enables to solve highly complex
numerical problems common to big data analyses. Technical description:
 HPE C7000 Blade System
 8 compute nodes HP BL460c
 28 cores | 512 GB RAM | 900 GB local SSD each
 InfiniBand interconnect
 Total of 224 cores
 Total of 4096 TB RAM
 Total of 8 TB local SSD storage
 Total of 40 TB shared storage
 Linux-OS, ANSYS, MPI, Matlab, Python, Simplorer, Spice-Simulator, SEMulator3D
Access to Infineon R&D compute Farm
LSF job scheduling grants access to about 200 cores simultaneously.

4.1.11 TUD

Full Technische Universität Short Participant

name Dresden name
TUD
Number 11

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Brief description
Technische Universität Dresden (TUD) is one of the leading and most dynamic universities in
Germany and as of 2012 one of eleven ‘Universities of Excellence’ in Germany. It has about
32,000 students and over 8,200 employees, 560 professors among them. As a full-curriculum
university with 18 faculties in five schools it offers a broad variety of 129 degree programs and
covers a wide research spectrum.
TUD emphasizes international cooperation and encourages its students to participate early on in
both teaching and research. More specifically: interdisciplinary cooperation among various
fields is a strength of TUD, whose researchers also benefit from collaborations with the region's
numerous science institutions - including Fraunhofer institutes, Leibniz institutes and Max
Planck institutes – through the unique DRESDEN-concept alliance. In recognition of TUD’s
emphasis on applications in both teaching and research, to date leading companies have awarded
the university fourteen endowed chairs. TUD prides itself on its international flavor and has
partnerships with more than 70 universities worldwide. Furthermore, TUD is the only university
in the eastern German federal states that is distinguished with the title ‘University of Excellence’
and has three approved Clusters of Excellence within the framework of the Excellence Strategy
of the Federal and State Governments. Currently, TUD ranks fifth among German universities
with regard to the number of Horizon 2020 projects.
Dresden Database Systems Group: The research group headed by Prof. Wolfgang Lehner is
focusing on the research topic “Scalable Data Science Systems,” searching for the efficient
implementation of relational and non-relational data management primitives. The group is
internationally recognized for its research achievements on exploiting modern hardware
(processing units and different memory types), generally in tight collaboration with industry
partners, such as Intel and NEC. The research group also maintains a strong research
collaboration with the SAP HANA Campus – the internal research group for driving system-
level innovation within the SAP HANA Data Platform. This collaboration provides insights into
“real world problems,” which is extremely beneficial for research, as well as an opportunity of
working together with some of the top experts in the field of data management.
Core competences relevant to DAPHNE
With this background and expertise mentioned above, the Dresden Database Systems Group will
contribute to the compile and runtime aspects of the DAPHNE platform, especially focusing on
supporting non-standard hardware, such as highly vectorizing processors and smart memory
technologies, in combination with system-level implementation of data management primitives
to be specified within the DAPHNE-IR.
Role and responsibility within DAPHNE
TUD has significant experience in exploiting HW accelerators (WP 7), i.e., GPUS, ASICs, and
vector processors (NEC) for data processing. Furthermore, TUD will contribute its expertise in-

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memory near-data processing. On an organizational level, TUD will be a lead of WP 7 and task
lead of T7.1 and T7.2. Consequently, they will also be on the advisory board of the project.

Curriculum vitae of senior staff

Prof. Dr. Wolfgang Lehner (male) (h-index 42)
is a full Professor, the Head of the Database Technology Group and the Director of the Institute
of Systems Architecture at TUD (Germany). His research focuses on database system
architecture and specifically crosscutting aspects from algorithms down to hardware-related
aspects in main-memory centric settings. In particular, his research interest is in energy-aware
computing, adaptive query compilation and hardware-aware query processing strategies in
widely heterogeneous systems.
Moreover, Prof. Dr. Lehner is heading a Research Training Group on large-scale adaptive
system software design and acts as a principal investigator in Germany’s national Competence
Center for Scalable Data Services and Solutions (ScaDS). Prof. Dr. Lehner also maintains a
close research relationship with the international SAP HANA development team. He serves the
community at many PCs of international conferences and is on review boards of prestigious
journals. Since 2019 he has been the Managing Editor of the “Proceedings of the VLDB”
(PVLDB) and the Head of the PVLDB Advisory Board. Moreover, he is member of the DFG
Senate Committee on Collaborative Research Centers and a member of the DFG Grants
Committee on Collaborative Research Centers. He is also an appointed member of the Academy
of Europe.
Relevant publications (refereed [J] – journals, [C] – conferences)
 [J Ismail Oukid, Daniel Booss, Adrien Lespinasse, Wolfgang Lehner, Thomas
Willhalm, Grégoire Gomes: Memory Management Techniques for Large-Scale
Persistent-Main-Memory Systems. PVLDB 10(11): 1166-1177 (2017)
 [J] Patrick Damme, Annett Ungethüm, Juliana Hildebrandt, Dirk Habich, Wolfgang
Lehner: From a Comprehensive Experimental Survey to a Cost-based Selection
Strategy for Lightweight Integer Compression Algorithms. ACM Trans. Database Syst.
44(3): 9:1-9:46 (2019)
 [J] Nusrat Jahan Lisa, Tuan Duy Anh Nguyen, Dirk Habich, Akash Kumar, Wolfgang
Lehner: High-Throughput BitPacking Compression. DSD 2019: 643-646
 [C] Ismail Oukid, Johan Lasperas, Anisoara Nica, Thomas Willhalm, Wolfgang
Lehner: FPTree: A Hybrid SCM-DRAM Persistent and Concurrent B-Tree for Storage
Class Memory. SIGMOD Conference 2016: 371-386
 [C] Till Kolditz, Dirk Habich, Wolfgang Lehner, Matthias Werner, Stefan T. J. de
Bruijn: AHEAD: Adaptable Data Hardening for On-the-Fly Hardware Error Detection
during Database Query Processing. SIGMOD Conference 2018: 1619-1634
Relevant projects/activities
 DFG Research Training Group “RoSI – Role-based Sofware Infrastructures for
Continuous- context-sensitive Software Systems” (2012-2021, funding of 6 phD
students for DB group, Principal Investigator and Speaker)

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  DFG Cluster of Excellence “cfAED – Advancing Electronics Dresden” (2013-2019,
Orchestration & Resilience Path, funding of 4 phD students for DB group, Principal
Investigator)
 BMBF National Center of Big Data “ScaDS - Competence Center for Scalable Data
Services and Solutions” (since 2014, funding of 2 PostDoc positions for DB group,
Principal Investigator and Track Lead)
 DFG Collaborative Research Center “HAEC – Highly Adaptive Energy Efficient
Computing” (2012-2020, funding of 6 phD students for DB group, Principal
Investigator, Vice-Speaker and Path Lead)
 EU (H2020) “GOFLEX - Generalized Operational FLEXibility for Integrating
Renewables in the Distribution Grid” (2016-2019, funding of 1 phD student for DB
group, Principal Investigator)
 Erasmus Mundus “Joint Doctoral College on Information Technologies for
Business Intelligence (IT4BI-DC)” (2013-2022, funding of 8 phD students for DB
group, Principal Investigator)
Resources
 TUD is operating a special administrative unit “European Project Center” (EPC) to
cope with the complete lifecycle of the administrative side of research projects funded
by the European Union.
 TUD is hosting a High Performance Computing Center, offering a wide range of
compute facilities – from self-service virtual machines to a supercomputer
infrastructure offering 47,000CPU cores and peak performance of more than 1.5
quadrillion floating point operations per second, specifically tailored to the
requirements of data-intensive computing.
 TUD’s department of computer science is one of the largest institution for computer
science research in Germany and is embedded into the Dresden.concept ecosystem
fostering collaborations with other research institutions in the Dresden area, like DLR,
Fraunhofer, Max Planck, and Helmholz institutes.
Operational Capacity
The Dresden Database Systems Group is a well-established international group with 12-15 PhD
students headed by Prof. Dr. Lehner, two senior researchers in permanent positions, plus a
variable number of postdocs and students at the Master level. The group is actively involved
with the international Master program “Distributed Software Engineering,” which allows to
identify high-potential doctoral candidates. In addition, the Dresden Database Systems Group
participates in the Erasmus Mundus Joint Doctorate in Information Technologies for Business
Intelligence – Doctoral College (IT4BI-DC), which provides a perfect background for an
intensive collaboration and specific PhD student mentoring activities, based on which doctoral
candidates can develop their personal research plans.

4.1.12 UM

Full Short Participant

name
University of Maribor
name
UM
Number 12
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Brief description
The University of Maribor (UM) (Slovenia) is an autonomous scientific, research and
educational public institution. It is the second largest and the second oldest Slovene university
with around 1.700 employees, approximately 14.000 students and 17 faculties. UM covers a
number of scientific disciplines, including engineering, biotechnology, humanities, medicine,
social sciences and natural sciences. UM is a regional developer with the vision of becoming a
globally-recognized ecosystem of innovation in which the students, faculty and administrative
staff can enthusiastically engage in creative activities.
UM participates in the following international and European Programs: Horizon 2020,
Erasmus+, Cohesion Policy 2014-2020, European Territorial Cooperation, etc. In addition, the
University is a member of various international associations, such as the Danube Rectors'
Conference (DRC), Alps-Adriatic Rectors' Conference (AARC), European University
Association (EUA), Leveraging Education into Organizations (LEO-NET), European Network
of Academic Sports Services (ENAS) and the University Network of the European Capitals of
Culture (UNEECC).
The Faculty of Electrical Engineering and Computer Science (FERI) at UM is an active research
faculty, covering a great variety of developing fields and relying on its professors, assistants and
researchers to strengthen the scientific excellence. To that end, the most important elements are
quality pedagogical work on top of the latest developments, creativity and cooperation in the
development of its own scientific research work. FERI is registered with the Ministry of Science
and Technology as a research organization incorporating 14 research units. Research is
predominantly organized into 8 research programs, which are non-competitively publicly
funded.
Research teams at FERI have extensive experience in parallel programming and simulations in
various topics, as well as in parallel and heterogeneous computing.
Core competences relevant to DAPHNE
The competences relevant to the DAPHNE project include being involved in the SI-HPC
consortium (has a representative in PRACE), which evolved within the SLING project to project
HPC RIVR. The project HPC RIVR has supplied UM with a new supercomputer to be extended
by a primary supercomputer with 10 PetaFLOPS, supported by EuroHPC. The existing staff at
FERI is already involved in research on parallel programming and simulation and cloud
computing.
Role and responsibility within DAPHNE
UM will be a vice-chair of WP 7 and also a contributing member in WPs 7-9.
Curriculum vitae of senior staff
Dr. Aleš Zamuda (male) (h-index 20)

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is the project contact person for this project at FERI UM. He is a Docent at the Computer
Architecture and Languages Laboratory at the Institute of Computer Science at FERI UM. In
addition to having an extensive user experience with utilizing HPC CPU GRIDs with hundreds
of compute cores, he teaches Cloud Computing and Deployment and Management. His areas of
interest include evolutionary algorithms, artificial life and computer animation. He is an IEEE
Senior Member (Vice-Chair for IEEE Slovenia Section), a member of IEEE CIS (Slovenia CIS
chapter chair), IEEE GRSS, IEEE OES, ACM (SIGEVO member) and COST actions cHiPSet
(High-Performance Modelling and Simulation for Big Data Applications) and ImAppNIO
(Improving Applicability of Nature-Inspired Optimisation by Joining Theory and Practice). He
is an associate editor at SWEVO journal (JCR=6.330) and an ImAppNIO Benchmarks working
group vice-chair. Dr. Zamuda has won several yearly awards from UM and UM FERI, the IEEE
R8 SPC 2007 award, the IEEE CEC 2009 ECiDUE and 2016 Danubius Young Scientist Award.
He is 1% top reviewer of 2017 Publons Peer Review Awards, including reviews for 45 journals,
80 conferences and research project like COST and EU FETPROACT.
Prof. Dr. Janez Brest (male) (h-index 32)
is the Head of Computer Architecture and Languages Laboratory at the Institute of Computer
Science at FERI UM. He has long track record in heterogeneous systems, including GRID and
MPI. He is actively involved in the various evolution and IEEE computational intelligence
societies and is among the most cited researchers at UM. He is a member of IEEE and IEEE
CIS. He was the IEEE CIS Task Force for Differential Evolution chair in 2014-2016 and an
associate editor of SWEVO journal. He is UM FERI part project lead for HPC RIVR project.
Prof. Dr. Borut Žalik (male) (h-index 28)
is the Head of Laboratory for Geometric Modeling and Multimedia Algorithms and is the ex-
dean at FERI UM. He has extensive experience in utilization of computer algorithms in
geometry, geometrical modeling, geographical information systems, multimedia and user
interfaces, especially for point cloud applications, such as LiDAR data processing. He has been
extensively involved in many national and international projects and is one of the best-ranked
technical sciences researchers in Slovenia.
Prof. Dr. Domen Mongus (male) (h-index 12)
is an Associated Professor at UM and a member of executive committee of European Umbrella
Organization for Geographic Information (EUR OGI), where he is project portfolio leader. He
is the Vice-President of Program Committee of Slovenia Strategic Research and Innovation
partnership (SRIP) in the priority area of Smart Cities and Communities. His research focuses
on remote sensing data processing and geospatial data analytics, for which he has received
several national and international awards. He was named Young Scientist of Danube Region by
the Austrian Federal Ministry for Science, Research and Economy (BMWFW) and the Institute
for the Danube Region and Central Europe (IDM) in 2015. He also received an IS Award for
ongoing work that is considered to be the greatest recognition in the fields of information society,
information technology and computer science in Slovenia. In 2018, he received the highest
award at UM for his exceptional contributions to its scientific and pedagogical reputation and
excellence.
Prof. Dr. Marjan Mernik (male) (h-index 36)
is the Head of Programming methodologies laboratory at FERI UM and Vice-Dean of
International Cooperation and Quality Development at FERI UM. He received the M.Sc. and
Ph.D. degrees in computer science from UM in 1994 and 1998, respectively. He is currently a
Professor at the Faculty of Electrical Engineering and Computer Science of UM. From 2005 -

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2017 he was a Visiting Professor at the University of Alabama at Birmingham, Department of
Computer and Information Sciences (USA). His research interests include programming
languages, compilers, domain-specific (modeling) languages, grammar-based systems,
grammatical inference and evolutionary computations. He is a member of the IEEE, ACM and
EAPLS. Dr. Mernik is the Editor-In-Chief of the Journal of Computer Languages and an
Associate Editor of Applied Soft Computing journal. He was named a Highly Cited Researcher
in 2017 and 2018.
Prof. Dr. Aleš Holobar (male) (h-index 28)
is the Head of System Software Laboratory at FERI UM and the Head of Institute of Computer
Science at FERI UM. He received the B.Sc. and Ph.D. degrees in computer science from UM in
2000 and 2004, respectively. He is currently a Professor of the Faculty of Electrical Engineering
and Computer Science at UM. His research interests include biomedical engineering, biosignal
processing, neural engineering and signal processing. He has led several international and
national projects, including project Decomposition of surface electromyograms, and project
Exact quantification of muscle control strategies and co-activation patterns in robot-assisted
rehabilitation of hemiparetic patients. He is member of IEEE, IAPS, and ISEK.
Dr. Milan Ojsteršek (male) (h-index 9)
is the Head of Laboratory for Heterogeneous Computer Systems at FERI UM and the Head of
Institute of Computer Science at FERI UM. His research focuses on heterogeneous computing
systems, natural language processing, knowledge management, plagiarism detection, research
data archives and open access repositories. He has led several international and national projects
connected to open access infrastructure (ODUN – Establishing of Slovenian open access
infrastructure, Digital library of Ministry of Defence), open data (EU MED CITEK -
Capitalization Initiative for the Innovation and Internationalization of the Mediterranean
economic and knowledge system, HPC RIVR – national research big data archive), knowledge
management (EU-MED R&D Industry, SI-AT Metal knowledge network) and academic
integrity (EU Erasmus+ ENAI – European Network of Academic Integrity). He was a member
of core team of project Parsys (from 1987 to 1990), within which a prototype of Yugoslav
supercomputer was developed. He is a member of EOSC FAIR working group
(https://www.eoscsecretariat.eu/working-groups/fair-working-group), a member of several
groups in RDA (https://www.rd-alliance.org/users/milan-ojster%C5%A1ek), a member of GO-
FAIR GO-Inter implementation network (https://www.go-fair.org/implementation-
networks/overview/go-inter/) and the Head of auditing group of European Network of Academic
Integrity (https://www.academicintegrity.eu/wp/bodies/).
Relevant publications (refereed [J] – journals, [C] – conferences)
HPC & Applications for HPC
 [J] Forecasting Cryptocurrency Value by Sentiment Analysis: An HPC-Oriented
Survey of the State-of-the-Art in the Cloud Era. A Zamuda, V Crescimanna, JC
Burguillo, JM Dias, K Wegrzyn-Wolska, ...High-Performance Modelling and
Simulation for Big Data Applications, 325-349.
 [J] On Cloud-Supported Web-Based Integrated Development Environment for
Programming DataFlow Architectures. N Korolija, A Zamuda. Exploring the
DataFlow Supercomputing Paradigm, 41-51.

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  [J] Self-adaptive control parameters‫ ׳‬randomization frequency and propagations in
differential evolution. A Zamuda, J Brest. Swarm and Evolutionary Computation 25,
72-99.
 [J] Success history applied to expert system for underwater glider path planning using
differential evolution. A Zamuda, JDH Sosa. Expert Systems with Applications 119,
155-170.
 [J] Vectorized procedural models for animated trees reconstruction using differential
evolution. A Zamuda, J Brest. Information Sciences 278, 1-21.
Relevant projects/activities
 HPC RIVR – Upgrading National Research Infrastructures (2018-2020,
https://www.hpc-rivr.si/home_en/, budget EUR 20 million). HPC RIVR is co-funded
by the European Regional Development Fund and the Slovenian Ministry of Education,
Science and Sport. Within this project UM is a project coordinator. The goal is to
establish a national HPC center operated by UM and the Institute of Information
Science. Its computing power will be 10 PetaFLOPS, making HPC RIVR the most
powerful public HPC in Slovenia and one of 100 most powerful HPCs in the world.
Access to researchers and other users will be granted following the open access
principles based on the European Charter for Access to Research Infrastructure.
Resources
 HPC supercomputer with thousands of CPUs, GPU cores and large data storage: 244
TeraFLOS (4,256 CPUs, 122,952 GPU cores, 200+ TB storage, 2 PB storage in
preparation, Infiniband 2x 100 Gb/s); another primary supercomputer will be established
in 2020 with 10 PetaFLOPS, 100,000 CPU cores, 600,000 GPU cores and 30+ PB
permanent storage (4 PB fast storage), Infiniband at least 2x 100 Gb/s.
 Field-programmable gate array (FPGA) machine. Workstation equipped with two FPGA
units. Each FPGA has 48GB of dedicated on-board memory and a programmable logic.

4.1.13 UNIBAS

Full University of Basel, Short UNIBAS Participant

name Department of Mathematics name Number 13
and Computer Science,
High Performance
Computing Group

Brief description

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The University of Basel (UniBas) is the oldest university in Switzerland (e. 1460). It is a full
university with a clear research mission, regularly listed in the world’s top 100 higher education
institutions by various global rankings thanks to its outstanding research achievements. UniBas
consists of seven faculties, with the Faculty of Science being the largest, offering extensive
Bachelor, Master and Doctoral programs in biology, chemistry, computational sciences,
computer science, geosciences, mathematics, drug sciences, molecular biology, nanosciences,
ecology, physics, pharmacology and plant sciences.
The participant, Assistant Prof. Florina Ciorba, is with the Department of Mathematics and
Computer Science (DMI), one of the six departments of the Faculty of Science. Since 2010 DMI
has combines the old mathematical institute and the young department of computer science into
a single unit and has recently grown to host 18 professors. The topic of High Performance
Computing (HPC) has represented at UniBas for almost three decades.
Core competences relevant to DAPHNE
Since 2015, when Assistant Prof. Ciorba joined UniBas and started leading the HPC group
(hpc.dmi.unibas.ch), the research in HPC has had a strong focus on performance optimization
of large-to-extreme-scale HPC applications and systems. This involves developing and
employing state-of-the-art methods and algorithms for parallelization, mapping, scheduling,
resiliency, verification and validation, as well as reproducibility. Specifically, simulation
methods of and for HPC, novel algorithms for performance optimization, load balancing
libraries for distributed- and shared-memory systems, as well as a highly scalable mini-app for
conducting Smoothed Particle Hydrodynamics simulations are developed.
One key contribution is the expertise in multi-level scheduling of computationally-intensive
scientific applications on HPC systems that exhibit parallelism of diverse forms and at multiple
levels, whereby independent scheduling solution at single parallelism levels are combined across
the parallelism levels to achieve an overall better system utilization and decrease job waiting
and response times by minimizing idle times due to load imbalance. The HPC group makes
intensive use of and extensions to HPC benchmarks to test and verify the effect and usefulness
of the above-mentioned methods, tools and libraries developed.
We are an active member and contributor to the SPEC High Performance Group (HPG),
developing the next HPC benchmarks combining a variety of programming models. We are also
a member of the SPEC Research Group (RG) and pending membership in the OpenMP ARB at
the start of 2020. Moreover, the HPC group can contribute state-of-the-art scheduling algorithms
to the OpenMP programming model.
Role and responsibility within DAPHNE
The HPC group’s role within DAPHNE is to offer expertise in all aspects related to HPC,
including applications (from real production applications to representative benchmarks and
computational kernels), programming models (shared memory, distributed memory, and
combinations), scheduling and resource management (system-wide and system-centric
scheduling and resource management, per node application-centric scheduling resource
management) and runtime systems (shared-memory runtimes such as OpenMP, distributed-
memory runtimes such as MPI, and combinations thereof).
Within the DAPHNE project, the HPC Group of UniBas will lead WP 5 (Scheduling and
Resource Sharing) and contribute to WP 1 (Project Management), WP 2 (System Architecture),

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WP 3 (DSL Abstractions and Compilation), WP 4 (DSL Runtime and Integration) and WP 9
(Benchmarking and Analysis), as well as WP 10 (Dissemination and Exploitation).
Work package 4 has a critical scope that includes sharing heterogeneous computational
resources and I/O resources across mixed workloads (HPC and HPDA). From a research point
of view, this scope requires advanced analytical, simulation and experimental skills. Moreover,
it requires experience with a broad and diverse set of software libraries, runtime systems and
technologies.
Being at the core of the DAPHNE project, WP 5 interacts with several WPs, including WP 2
(Systems Architecture), WP 4 (DSL Runtime and Lib integration) and WP 9 (Benchmarking
and Analysis).
Generating sufficient knowledge and experience needed to conduct WP 5 tasks requires an
experienced researcher working together with a Ph.D. student.
The close interaction between the lead of WP 5 and the other WPs call for, especially in the
early stages, extensive organization and collaboration skills of a postdoctoral researcher, while
Ph.D. students typically develop such skills during their doctoral studies.
Curriculum vitae of senior staff
Prof. Florina Ciorba (female) (h-index 10)
has been an Assistant Professor at UniBas since 2015, where she leads the High-Performance
Computing Research Group of 3 PhD students, 1 postdoc, 1 scientific software developer and
several master and bachelor students. She works on the parallelization, mapping, scheduling,
robustness and scalability of scientific applications using small- to large-scale (heterogeneous)
parallel computing systems to exploit the hardware parallelism available across multiple levels.
She was a (tenured) senior scientist (2014-2015) and postdoctoral researcher (2010-2014) at
Technische Universität Dresden (Germany), where she worked on modeling and simulation of
highly-adaptive energy-efficient computing (HAEC) systems and conducted research on state-
of-the-art robust and scalable scheduling and dynamic load balancing techniques for optimizing
the performance of scientific applications. She was a postdoctoral researcher (2008-2010) at
Mississippi State University (USA), working on designing and developing methodologies for
the computational performance optimization of multi-scale simulation codes from Materials
Science using state-of-the-art scheduling and dynamic load balancing techniques and advanced
tracing and profiling tools.
Assistant Prof. Ciorba received her PhD on the algorithmic design of static and dynamic
scheduling and load balancing of scientific applications in 2008 from the National Technical
University of Athens (Greece). Her research also includes (1) benchmark design and evaluation
for performance evaluation and scheduling research; (2) privacy preserving data collection and
analysis for the improving the HPC operations and research; and (3) digital health solutions for
improving care for families with predisposition to hereditary cancer.
Assistant Prof. Ciorba is the recipient (with co-authors) of 2019 Cluster Conference Best paper
award, 2014 International Conference on Parallel and Distributed Computing Best paper award,
2014 ParLearning Workshop Best paper award and 2011 International Symposium on Parallel
and Distributed Computing Best paper award. Assistant Prof. Ciorba is a member of Women in
HPC (WHPC) and of the ACM Committee on Women (ACM-W).
Ahmed Eleliemy (male) (h-index 4)

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Is a PhD student (expected graduation Fall 2020) and teaching and research assistant. Mr.
Eleliemy’s doctoral research fits the scope of the DAPHNE project perfectly. He studies and
develops efficient methods of enabling cooperation between schedulers at various software
parallelism levels (batch, application, and thread). The goal of his research is to increase resource
efficiency, specifically in the case of heterogeneous computing resources and mixed workloads,
including HPC and high performance data analytics (HPDA) workloads. Mr. Eleliemy is
expected to graduate in the Fall of 2020, which aligns well with the expected start of the
DAPHNE project that he will join as a postdoctoral researcher.
Mr. Eleliemy also has a broad experience in the software industry. From 2014 until the start of
his PhD supervised by Assistant Prof. Florina Ciorba at UniBas in April 2016, he was employed
as a full/part-time software engineer in several companies. He also worked as a research support
engineer within the Aziz Supercomputer project, one of the largest supercomputers in Saudi
Arabia.
Relevant publications (refereed [J] – journals, [C] – conferences)
Mullti-level Scheduling and Load Balancing
 [C] A. Mohammed, A. Cavelan, F. M. Ciorba, R. M. Cabezón, I. Banicescu. “Two-
level Dynamic Load Balancing for High Performance Scientific Applications”. In
Proceedings of the SIAM Parallel Processing (SIAM PP 2020), Seattle, WA, USA,
February 12-15, 2020.
 [C] A. Eleliemy, A. Mohammed, and F. M. Ciorba, Exploring the Relation Between
Two Levels of Scheduling Using a Novel Simulation Approach”, In Proceedings of the
16th International Symposium on Parallel and Distributed Computing (ISPDC 2017),
Innsbruck, Austria, July 2017
Scheduling and Resource Sharing
 [C] A. Eleliemy and F. M. Ciorba, Hierarchical Dynamic Loop Scheduling on
Distributed-Memory Systems Using an MPI+MPI Approach, In Proceedings of the
20th IEEE International Workshop on Parallel and Distributed Scientific and
Engineering Computing (PDSEC 2019) of the 33rd IEEE International Parallel and
Distributed Processing Symposium Workshops and PhD Forum (IPDPSW 2019), Rio
de Janeiro, Brazil, May 2019.
 [C] A. Eleliemy and F. M. Ciorba, Dynamic Loop Scheduling Using MPI
Passive-Target Remote Memory Access, Proceedings of the 27th Euromicro
International Conference on Parallel, Distributed and Networked-based (PDP 2019),
Pavia, Italy, February 2019.
Benchmark Development
 [C] D. Guerrera, A. Cavelan, R. M. Cabezón, D. Imbert, J-G Piccinali, A. Mohammed,
L. Mayer, D. Reed, and F. M. Ciorba. SPH-EXA: Enhancing the Scalability of SPH
codes Via an Exascale-Ready SPH Mini-App. In Proceedings of 2019 Spheric
International Workshop (SPHERIC 2019), Exeter, UK, June, 2019.
Relevant projects/activities

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 Multilevel Scheduling for large-scale high-performance computers (MLS) (2017-
2020, https://hpc.dmi.unibas.ch/HPC/MLS.html, budget CHF 374,016, funding agency:
Swiss National Science Foundation). This project investigates and develops multilevel
scheduling (MLS), a multilevel approach for achieving scalable scheduling in large-scale
high-performance computing systems across the multiple levels of parallelism, with a
focus on software parallelism. The outcome is an answer to the following research
question: Given massive parallelism, at multiple levels and of diverse forms and
granularities, how can it be (exposed,) expressed and exploited such that execution times
are reduced, performance targets (e.g., robustness against perturbations) are achieved,
and acceptable efficiency (e.g., tradeoff between maximizing parallelism and minimizing
cost) is maintained?
Assistant Prof. Ciorba is the sole Principal Investigator in this grant due to her long-term
expertise in scheduling at the application level, which she has also extended it to batch
level and thread levels. She is guiding the connection of the disjoint scheduling solutions
existing at each level, initially pair-wise, with the goal of identifying a solution that
integrates three levels of scheduling for the benefit of improved system and applications
behavior. This includes a survey of existing candidate applications, systems, and
solutions, conceptualization of connections between single-level scheduling solutions,
design of experiments, evaluation via selected performance metrics, and usability
scenarios. The results of this project fit perfectly to the tasks of WP 5 Scheduling and
Resource Sharing in DAPHNE (see link above)
 SPH-EXA: Optimizing Smooth Particle Hydrodynamics for Exascale computing
(2017-2020, https://hpc.dmi.unibas.ch/HPC/SPH-EXA.html, funding agency: Swiss
Platform for Advanced Scientific Computing). This project aims at a scalable and fault
tolerant Smoothed Particle Hydrodynamics (SPH) computational kernel, developed
into a mini/proxy interdisciplinary co-designed application. The SPH-EXA mini-app
that combines state-of-the- art parallelization and fault tolerance methods from
computer science, state-of-the-art SPH technique and expertise from physics, and
expertise in high-performance computing on state-of-the-art computing architectures to
develop an open-source SPH mini-app (accessible here: https://github.com/unibas-dmi-
hpc/SPH-EXA_mini-app), that will enable highly parallelized, scalable, and fault-
tolerant production SPH codes in different scientific domains, such as astrophysics
(SPHYNX, ChaNGa) and CFD (SPH-flow). The SPH-EXA mini-app is currently in
the selection process (to be completed end of January 2020) for becoming part of the
next Standard Performance Evaluation Corporation (SPEC) benchmarks suite of the
High-Performance Group (HPG), namely SPEC HPC2020.
Assistant Prof. Ciorba is the Lead Principal Investigator of the study, guiding the
conceptualization, development and implementation of the target SPH-EXA mini-app
for Exascale-level SPH simulations, organizing the performance optimization methods
using the state-of-the-art parallel programming models as well as node-level and cross-
node optimization, dynamic load balancing and fault-tolerance solutions. The results of
this project fit perfectly to the tasks of WP 9 Benchmarking and Analysis in DAPHNE
(see link above).

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  DA-HPC-OR: Data Analysis for improving High Performance Computing
Operations and Research” (2018-2020, hpc.dmi.unibas.ch/HPC/DA-HPC-OR.html,
budget EUR 43,200, funding agency: Seed money tri-national project - Eucor – The
European Campus). Analysis of data from high-performance computing (HPC) systems
that could improve HPC operations and research is an unsolved problem. This project
addresses the challenge of HPC data analysis in a reproducible and legal manner. The
data originates in the HPC systems of the DA-HPC-OR consortium: NEMO at
University of Freiburg (NEMO-UniFR), sciCORE at University of Basel (sciCORE-
UniBas) and HPC at University of Strasbourg (HPC-UniStra). In this project we
analyze the data collected at NEMO-UniFR to improve their research and operations
activities and to offer monitoring, operational and research insights to also improve the
sciCORE-UniBas and HPC-UniStra activities. This approach entails monitoring of
systems and applications, legal compliance via de-identification and anonymization,
and data analysis. We used methods such as HPC monitoring, legal controlling, de-
identification, anonymization, data aggregation, data mining and insight extraction. The
outcome offers solutions for improving the HPC operations and research of three Eucor
HPC centers, which satisfy the applicable data protection and privacy requirements.
The solutions are transferable to other Eucor member institutions at the benefit of
minimal or no legislative inquiries and data management overhead.
Resources
The HPC group owns and maintains a modern high-performance computing cluster (15.12.2016-
present, https://hpc.dmi.unibas.ch/HPC/miniHPC.html), a platform used for teaching and
research with full control access funded by UniBas.
In addition, we can obtain access to the Swiss National Supercomputing Center’s high
performance compute and storage resources either through competitive resource allocation
proposals or through cscs2go premium-based service (https://2go.cscs.ch/offering/pricing/).
Operational Capacity
The personnel (one doctoral researcher) for which we request the funding under this proposal is
not yet hired. We will actively and widely advertise this position upon successful evaluation of
this proposal.

4.2 Third parties involved in the project (including use of third-party resources)
No third parties involved.

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5 Ethics and Security
5.1 Ethics

We have NOT entered any ethics issues in the ethical issue table in the administrative forms.
DAPHNE will use data from different data sources for the different applications. With that regard,
Task Leaders will be responsible for analyzing any potential issue related to the datasets to be used.
Although not expected, any ethical issues, analysis and decisions will be reported to the Steering
Board and processed according to the EC regulations.

5.2 Security

Please indicate if your project will involve:

 activities or results raising security issues: NO
 'EU-classified information' as background or results: NO

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