ABEED AHAMAD

+91-8722478188
abeedahamad786@gmail.com

Objective
To be a potential resource to the organization where I can utilize my skills and knowledge
which would help the organization to grow and further enhance my growth profile.

Work Experience
Company : Stayfit
Position : PCB Testing(3 Years )+ Design Verification(2 years)
Duration : 5 Years (Feb 14 2018 to till now)

Educational Qualification

Class/Course Institution Board/University

R.N.S. Institute of Technology, Visvesvaraya Technological

B E IN ECE Bangalore. University.

M.E.S,
Department of Technical
DIPLOMA IN ECE Madhugiri.
Education, Bangalore.
S.S.E.A PU College , Karnataka Pre University
12TH Gouribidanur . Board ,
Bangalore .
S.J.C, Karnataka Secondary
10TH Kodigenahalli. Education Examination .

Technical Skills
HDL : Verilog
HVL : System Verilog, UVM
EDA Tools : Questa sim, Cadence Ncsim
Protocol : APB,AHB,AXI, I2C,PCIE-PHY
Editor : Gvim
Operating Systems : Windows, Linux
Scripting Languages : Python, Perl, Shell
Other Tools : Git, Ctag, Crontab, Meld
Summary
 Develop Regression Script, UVM based Protocol Script, RAL Script.
 Good Understanding of Verification Flow .
 Good Knowledge on System Verilog and UVM .
 Knowledge on Verilog and Digital System Design .
 Good Understanding of Communication Protocols like I2C, PCIE .
 Knowledge on Sanity Checks, Regression Running Error Injection, Script Development.
 Hands on experience on Regression Report Generation .
 Knowledge on IP level and SOC level .

Projects
1) APB VIP DEVELOPMENT USING SV
• Developed Class based Verification Environment.
• Understood the APB protocol architecture.
• Planned the test bench architecture.
• Implemented test cases.
• Developed scenarios targeting various APB features

2) AHB DEVELOPMENT USING SV

• Developed Class based Verification Environment.
• Developed Verification plan and Test cases.
• Functional Coverage Check.
• Developed Monitor, Driver and Scoreboard.
• Verified Master supported facilities.

3) AXI USING UVM

• Understood the specification of AXI
• Modifies the UVM Test Bench as per the requirement.
• Written multiple test cases and sequences as per test plan

4) I2C DEVELOPMENT USING UVM

• Understood the I2C protocol Specification.
• Prepared the Verification Plan & implemented test cases for verification of IP.
• Data transfer between Master and Slave is ensured.
• Constrained random stimulus generation of Sequences.
• Functional coverage.

Declaration
I hereby declare that the information furnished above is true to the best of my knowledge.
Place:
Date: ABEED AHAMAD