Professional Documents
Culture Documents
DSD Cep Reeport
DSD Cep Reeport
DSD Cep Reeport
2
Abstract
This lab report details the design and implementation of a vending machine for
a supermarket, capable of accepting cash, dispensing products, and returning
the remaining amount. The vending machine is implemented on a Xilinx
FPGA, utilizing hardware description language (HDL) for design. The system
ensures accurate cash handling, product dispensing, and change return. This
project showcases the practical application of digital logic design and FPGA
programming in real-world scenarios.
3
Objective
The primary objective of this lab is to design a functional vending machine capable of:
Equipment Used
Xilinx FPGA development board (e.g., Xilinx Spartan)
Xilinx ISE Design Suite
VHDL/Verilog for hardware description
Introduction
Vending machines have become an integral part of modern retail environments,
providing a convenient and automated way for customers to purchase products
without the need for human interaction. These machines can be found in a variety of
settings, from supermarkets and shopping malls to offices and public transportation
hubs. The fundamental operation of a vending machine involves accepting payments,
dispensing selected products, and returning any excess amount to the customer. The
automation of these processes requires careful consideration of both hardware and
software components to ensure reliability, accuracy, and user satisfaction.
In this project, we aim to design and implement a vending machine for a supermarket
that not only accepts cash payments but also provides a receipt of the transaction and
returns any remaining amount to the customer. The vending machine will be
implemented on a Xilinx FPGA, leveraging the advantages of FPGA technology such
as reconfigurability, parallel processing, and high-speed operation.
4
Methodology
1. System Design
The vending machine system is designed to perform the following operations:
2 . State Machine
The system's functionality is controlled using a finite state machine (FSM). The FSM
transitions between states based on inputs such as cash insertion, product selection,
and completion of transactions. Key states include Idle, Waiting for Cash, Dispensing
Product, and Returning Change.
4. FPGA Implementation
The HDL code is synthesized and implemented on a Xilinx FPGA using the Xilinx
ISE Design Suite. The design is then tested and verified on the FPGA development
board.
5. Testing
Extensive testing is conducted to ensure the vending machine operates as expected.
This includes testing various cash inputs, product selections, and ensuring accurate
change return.
5
Results and Discussion
1. Simulation Results
Before implementing the design on the FPGA, simulations are run to verify the
correctness of the HDL code. The simulation results confirm that the FSM transitions
correctly between states and performs the required operations.
2. FPGA Implementation
The design is successfully implemented on the Xilinx FPGA. The vending machine
accepts cash inputs through switches, allows product selection, and indicates the
dispensed product and remaining amount through LEDs. The system performs
accurately, handling various cash inputs and product selections as expected.
3. Performance Analysis
6
Verilog Module Code:
7
8
Verilog Test Bench Code:
9
Waveform:
Figure 1Waveform
10
Implementation On FPGA BOARD:
11
Conclusion:
The design and implementation of a vending machine on a Xilinx FPGA demonstrate
the practical application of digital logic and hardware description languages. The
system successfully performs cash handling, product dispensing, and change return,
providing a robust solution for automated vending. The use of FPGA technology
allows for rapid prototyping and efficient performance, making it a suitable platform
for such applications. Future improvements can include adding support for multiple
payment methods and enhancing user interface elements.
12