Logic Gates and Ladder Diagrams

AND Gate
AND Gate
AND Gate
OR Gate
OR Gate
OR Gate
 NOT Gate
The output of a NOT gate is the inverse of the input.
The NOT gate is sometimes called an inverter.
NOT Gate
NOT Gate
NAND (NOT AND) Gate
NAND (NOT AND) Gate
NAND (NOT AND) Gate
NOR (NOT OR) Gate
NOR (NOT OR) Gate
NOR (NOT OR) Gate
XOR (Exclusive OR) Gate
XOR (Exclusive OR) Gate
XOR (Exclusive OR) Gate
XOR (Exclusive OR) Gate
XNOR (Exclusive NOR) Gate
XNOR (Exclusive NOR) Gate
XNOR (Exclusive NOR) Gate
 Creating PLC Ladder Logic Diagrams
from Logic Gate Circuits
Problem 1
Creating PLC Ladder Logic Diagrams
from Logic Gate Circuits
 Creating PLC Ladder Logic Diagrams
from Logic Gate Circuits
Problem 2
 Creating PLC Ladder Logic Diagrams
from Logic Gate Circuits
Problem 3
 Creating PLC Ladder Logic Diagrams
from Boolean Expressions

Create the PLC ladder logic diagram for the following Boolean expressions.
1. Y = A′ + B + CD + EB
2. Y = (AB)′ + AC + BC
3. Y = (A + B) · (C + D)
Boolean Algebra
Producing the Boolean Equation
for a Given Logic Gate Circuit
Producing the Boolean Equation
for a Given Logic Gate Circuit
Chapter 4 Exercise Problem (Q5)
Chapter 4 Exercise Problem (Q1)
Timer
 Timer
Rung 1:
The EN (Enabled) bit will be true when the rung conditions preceding the TON
are true and off when the rung conditions preceding the TON are false.
Rung 2:
If the TON is true and the ACC (Accumulated) is less than the PRE (Preset), the
TON will write a "1" to the TT (Timer Timing) bit.
If the TON is true and the ACC (Accumulated) is greater than or equal to the
PRE (Preset), the TON will write a "0" to the TT (Timer Timing) bit.
If the TON is false, the TON will write a "0" to the TT (Timer Timing) bit.
Rung 3:
If the TON is true and the ACC (Accumulated) is less than the PRE (Preset), the
TON will write a "0" to the DN (Done) bit.
If the TON is true and the ACC (Accumulated) is greater than or equal to the
PRE (Preset), the TON will write a "1" to the DN (Done) bit.
If the TON is false, the TON will write a "0" to the DN (Done) bit.
Timer
 Timer
o A TOF instruction will time as long as the instructions preceding it on the
rung are false and the accumulated value is less than the preset.
o When the TOF is false, it will write a "0" to the EN (Enable). If the TOF is
false and the ACC (Accumulated) is less than the PRE (Preset), the TOF will
write a "1" to the TT (Timer Timing) bit and a "1" to the DN (Done) bit. If
the TOF is false and the ACC (Accumulated) is greater than the PRE (Preset),
the TOF will write a "0" to the TT (Timer Timing) bit and a "0" to the DN
(Done) bit.
o When a TOF is true, it will write a "0" to the accumulated value, a "1" to the
EN (Enable), a "0" to the TT (Timer Timing), and a "1" to the DN (Done) bit.
Counter
 An emergency stop system is to be designed for a
certain automatic production machine. A single
"start" button is used to turn on the power to the
machine at the beginning of the day. In addition, there
are three "stop" buttons located at different locations
around the machine, any one of which can be pressed
to immediately turn off power to the machine. (a)
Write the Boolean logic expression for the system. (b)
Construct the logic network diagram for the system.
(c) Construct the ladder logic diagram for the system