Department of Electronic Engineering

Faculty of Engineering and Technology

University of Sindh, Jamshoro
Electronic Devices and Circuits (EE-123)

LAB # 11
Name: Roll No:

Score _Signature of the Lab Tutor: Date:

Dr. Mudasir Ahmed Memon

Selection of Utilization of Experimental Experimental Lab Safety Teamwork Technical

Equipment Lab Tools & Data Collection Data Analysis Precautions During Lab cleanliness and 𝒔𝒄𝒐𝒓𝒆 = 𝟐
×𝐎𝐛𝐭𝐚𝐢𝐧ed marks
(0 to 5) Calibration (0 to 5) (0 to 5) (0 to 5) Task Organization 𝟑𝟓
(0 to 5) (0 to 5) (0 to 5)

Object: To study the operation of Fixed bias configuration with different models of NPN transistors

Apparatus Required:
1. Regulated Power supply, Breadboard and Connecting wires
2. Transistor (NPN, PNP), Resistors, Capacitor
3. Oscilloscope and Multimeter (MM), Function Generator

Theory: [30 minutes]

The fixed-bias circuit of Fig. 11.1 is the simplest transistor dc bias configuration. For the dc analysis, the
network can be isolated from the indicated ac levels by replacing the capacitors with an open-circuit
equivalent because the reactance of a capacitor is a function of the applied frequency. For dc, 𝑓 =

0 𝐻𝑧, 𝑎𝑛𝑑 𝑋𝐶 2𝜋𝑓𝐶 2𝜋(0)𝐶

=. In addition, the dc supply VCC can be separated into two supplies

(for analysis purposes only) as shown in Fig. 11.2 to permit the separation of input and output circuits. It
also reduces the linkage between the two to the base current I B. The separation is certainly valid, as we note
in Fig. 11.2 that VCC is connected directly to RB and RC just as in Fig. 11.2.

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 Department of Electronic Engineering
Faculty of Engineering and Technology
University of Sindh, Jamshoro
Electronic Devices and Circuits (EE-123)

Fig 11.1: Fixed-bias circuit Fig 11.2: DC equivalent of Fixed-bias circuit

Base Current (𝐼𝐵):

𝑉𝐶𝐶 − 𝑉𝐵𝐸
𝐼𝐵 =
𝑅𝐵

Voltage collector-Emitter (𝑉𝐶𝐸):

𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶𝑅𝐶

Load-Line Analysis

𝑉𝐶𝐶
𝐼𝐶(𝑆𝑎𝑡) =
𝑅𝐶

𝑉𝐶𝐸 (𝐶𝑢𝑡𝑡𝑜𝑓𝑓) = 𝑉𝐶𝐶

Procedure [150 minutes]

Fixed bias configuration with different model numbers (different transistors are selected because each
have different 𝛽 values)

1. Select any NPN Transistor available in the laboratory and make the circuit shown in figure 11.3.
2. Write down the readings of IB, IC, and VCE in Table 11.1.
3. Choose another NPN transistor with different model number and write down the readings of I B, IC, and
VCE in Table 11.1

Table 11.1

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 Department of Electronic Engineering
Faculty of Engineering and Technology
University of Sindh, Jamshoro
Electronic Devices and Circuits (EE-123)

NPN (Model No:_______________) NPN (Model No:_______________)

𝐼𝐵 𝐼𝐶 𝑉𝐶𝐸 𝐼𝐵 𝐼𝐶 𝑉𝐶𝐸

Load line analysis.

1. Connect the circuit as shown in Fig. 11.3.

2. Select and fix any value of I B through VBB, vary VCC1 and write down the values of I C and VCE in table
11.2.
3. Slightly increase the value of IB and repeat step 2.

𝐼𝐶(𝑆𝑎𝑡) = ______________________

𝑉𝐶𝐸(𝐶𝑢𝑡𝑡𝑜𝑓𝑓) = ______________________________

Fig 11.3: Fixed-bias circuit with different Transistor Models

Table 11.2
Output characteristics
VCC (V) IC VCE VCC (V) IC VCE VCC (V) IC VCE
1 1 1
2 2 2

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 Department of Electronic Engineering
Faculty of Engineering and Technology
University of Sindh, Jamshoro
Electronic Devices and Circuits (EE-123)
3 3 3
I B=______________

I B=________________

I B=________________
4 4 4
5 5 5
6 6 6
7 7 7
8 8 8
9 9 9
10 10 10
11 11 11
12 12 12

Graph:

1. Plot the graph as per the data given in Table 11.2 over the load line.