Compal La-733 r4c Schematics

A B C D E
1 1
2 2
Hurricane 1.6
N32N LA-733 REV. 4A SCHEMATIC DOCUMENT

3
uPGA2 COPPERMINE with Geyserville 3
4 4
Compal Electronics, inc.

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL SCHEMATIC, M/B LA-733
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE Size Document Number Rev
B 401138 4C
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Date: Tuesday, August 21, 2001 Sheet 1 of 47
A B C D E
A B C D E
Revision History
Compal confidential
Date:06/28/2000 Rev#: 2.0 description: MP-test for H1.5
Model Name : N32N Date:12/20/2000 Rev#: 3.0 description: C1-test for H1.6
Board Name : LA-733 Date:02/02/2001 Rev#: 4.0 description: C2-test for H1.6
Date:03/05/2001 Rev#: 4A description: C3-test for H1.6
HP Model Name : Hurricane 1.6
1 1
Gerserville Coppermine (uPGA2) CPU

SPR CONN. Tech. page 3,4,5
HCLK_CPU
page 33 page 6
HA#(3..31) HD#(0..63) Y1
14.318MHZ
14M_3V
PCLK_MTXC Clock
14M_5V
440ZXM HCLK_CPU Generator
CRT CONN.
VGA Board 14M_3V
DCLKWR Buffer PCLK_DOCK
2
page 24 CONN. AGP Bus
page 7,8,9
DCLKO page 10 +3V
+3VS
PCLK_PCM
page 23
MA(0..13)
MD(0..63)
Dot-Matrix, Button AD(0..31)
Board, FDD, CLK_SDRAM(0..3)
144Pin S.O.Dimm
Touch-PAD Socket PCLK_PIIX4
CONN.page 32 page 11,12 +3V

PCI BUS
Audio CD-DJ
CardBus ESS OZ163 CLK_48MHZ
Mini PCI IDE (HDD/CR-ROM) page 20 PIIX4M
Socket TI1420 Solt1/2 ES1988 page 21,22 page 13,14
14M_3V
3 +3V / +3VS 3
page 15,16 page 17
page 31 USB Port 0 (5VS Tolerant)
and Port 1
page 28
EQ & SA(0..15)
Speaker AMP. SD(0..15)
PCLK_SIO
ISA BUS
page 18,19
14M_5V DC-DC Screw Hole

Super IO KeyBoard Interface & RTC page 39
37N869 RESET CKT
page 32
87570 page 30
page 27 page 25,26
PIO SIO Touch Pad SMBus SUS_ON Power CKT DC/DC MAX1632
page 28 page 28 CONN. page 25
4 page 34 MAX1711 4
FIR FDD KBD page 34,36,37,38

page 28 page 26 page 29
BIOS PS/2 SM Bus Compal Electronics, inc.

page 29 page 29 Battery Charge Title
SCHEMATIC, M/B LA-733
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL page 35 Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B 4C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401138
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Tuesday, August 21, 2001 Sheet 2 of 47
A B C D E
TESTLO1
TESTHI TESTLO2
RTTIMPEDP +VCPU_IO
DBSY# 7 R75
1 2 R276
+VCPU_IO DRDY# 7
L7 LQG21N4R7K10 Add 1 2 BSEL0 1 2 RTTIMPEDP
1
C107
CAP. by
1
LO/HI# 10UF_10V_1206 + C552 1.5K 56.2_1%
6 CPU_LO/HI# Charles
EDGCTRLP R250
BSEL1 .01UF at 6/22 1 2 BSEL1
BSEL0
2
0 R249
AD19
AD17
AD20
AA12
AB15
AA16
AB19
AA17
1 2 EDGCTRLP
AA3
U21
R21
U19
V20
V18
P21
P20
T21
M2
G4
R2
N5
H4
Y5
T1
L2
HD[0..63] U7A 110_1%
9 HD[0..63]
HREQ#[0..4]
BSEL0
BSEL1
GHI#
PLL1
PLL2
TESTLO1
TESTLO2
TESTP1
TESTP2
TESTP3
TESTP4
DBSY#
DRDY#
DEP0#
DEP1#
DEP2#
DEP3#
DEP4#
DEP5#
DEP6#
DEP7#
RSVD
EDGECTRLP
TESTHI
RTTIMPEDP
7 HREQ#[0..4]
HA[3..31]
7 HA[3..31]
+VCPU_IO
HA3 L3 Analog Data Phase Signals D10 HD0 R77
HA4 A3# CMOS Test Inputs D0# HD1 TESTHI
K3 A4# D1# D11 1 2
HA5 J2 Geyserville C7 HD2
A5# D2# 1.5K
HA6 L4 C8 HD3
HA7 A6# D3# HD4 R92 TESTLO1
L1 A7# D4# B9 1 2
HA8 K5 A9 HD5 +VCPU_IO
A8# D5# 1K
HA9 K1 C10 HD6
HA10 A9# D6# HD7 R89
J1 A10# D7# B11
HA11 HD8 CPURST# R95 TESTLO2
J3 A11# D8# C12 1 2 1 2
HA12 K4 B13 HD9
A12# D9# 1K
HA13 G1 A14 HD10 56.2_1%
HA14 A13# D10# HD11
H1 A14# D11# B12
HA15 E4 E12 HD12
HA16 A15# D12# HD13
F1 A16# D13# B16
HA17 F4 A13 HD14
HA18 A17# D14# HD15
F2 A18# D15# D13
HA19 E1 D15 HD16
HA20 A19# D16# HD17
C4 A20# D17# D12
HA21 D3 B14 HD18
HA22 A21# D18# HD19
D1 A22# D19# E14
HA23 E2 C13 HD20
HA24 A23# D20# HD21
D5 A24# D21# A19
HA25 Address Lines Data Phase Signals HD22 +3V R248
D4 A25# D22# B17
HA26 C3 A18 HD23 1 2
HA27 A26# D23# HD24
C1 A27# D24# C17
1
HA28 B3 D17 HD25 10K
HA29 A28# D25# HD26 C281
A3 A29# D26# C18
HA30 B2 B19 HD27 .1UF
HA31 A30# D27# HD28
2
C2 A31# D28# D18
HD29 U25
A4 B20
A5
A32#
A33#
Coppermine D29#
D30# A20 HD30 THERMDA 1 NC NC 16
2
B4 B21 HD31 2 15
A34# D31# C279 VCC STBY
C5 D19 HD32 3 14
A35# D32# 2200PF DXP SMBCLK SMC 5,20,25,26,32,33,38
C21 HD33 THERMDC 4 13
HREQ#0 D33# HD34 R256 DXN NC
1
T2 E18 5 12
HREQ#1
HREQ#2
V4
V2
REQ0#
REQ1#
REQ2#
H-PBGA D34#
D35#
D36#
C20
F19
HD35
HD36 +3V 1
1K
2 6
7
NC
ADD1
GND
SMBDATA
ALERT
ADD0
11
10
SMD 5,20,25,26,32,33,38
ATF# 26
HREQ#3 W3 D20 HD37 8 9
HREQ#4 W5
REQ3#
REQ4# 495 Ball D37#
D38# D21 HD38 Change GND NC
1
W2 H18 HD39 NE1617DS +VCPU_IO
RP# Request Phase Request D39# HD40
value. by R255 R262 R275
D40# F18
AB2 J18 HD41 Charles at Change 1K 10K 1 2 TDI
7 HADS# ADS# D41#
F21 HD42 6/22
RS#0 D42# value. by @150
U1 E20 HD43
RS#[0..2] RS#1 RS0# D43# HD44 Charles at 1 R80 TDO
2
7 RS#[0..2] AA2 RS1# D44# H19 2
RS#2 W1 E21 HD45 6/22
RS2# Response Phase Signals D45# @150
Y1 J20 HD46
HTRDY# RSP# D46# HD47 +3V R277 TCK
7 HTRDY# U2 TRDY# D47# H21 1 2
L18 HD48
D48# @1K
W19 G20 HD49
BPM1# D49# HD50 R82 TMS
W21 BPM0# D50# P18 1 2
Y21 Debug Break Point G21 HD51 +VCPU_IO
BP3# D51# @1K
AA21 K18 HD52
BP2# D52# HD53 R273 TRST#
D53# K21 1 2
HD54 RP25
D54# M18 1K
AB18 L21 HD55 1 8 PREQ#
6 GT_INTR LINT0/INTR D55#
AC19 R19 HD56 2 7 IERR#
6 GT_NMI LINT1/NMI Execution Control Signals Arbitration Phase Signals D56# RP2
K19 HD57 3 6 FLUSH#
D57# HD58 SLP#
6 GT_STPCLK# AC11 STPCLK# D58# T20 4 5 5 4
SLP# AB12 Snoop Phase Signals PC Compatibility Signals J21 HD59 6 3 TCK
SLP# D59# HD60 TDI
D60# L20 7 2
HCLK M3 M19 HD61 8P4R-1.5K 8 1 TMS
7,10 HCLK BCLK Debug & Test Signals Thermal Diode D61#
U18 HD62
D62# HD63
6 GT_CPUINIT# AA10 INIT# D63# R18 8P4R-1K
FLUSH# AC9
CPURST# FLUSH# Error Signals
7 CPURST# A6 RESET# BNR# T4 BNR# 7
U4
PWRGOOD
BPRI# BPRI# 7
THERMDC
THERMDA
AA18 APIC C6 Signal name Default Mode Software Debug Mode

PICCLK BREQ0# BREQ0# 7
DEFER#
IGNNE#
PREQ#
AB21 R1
AERR#
BERR#
PRDY#
FERR#
TRST#
BINIT#
A20M#
HITM#
HLOCK# 7
IERR#
PICD0 LOCK# TDI 1K PULL-DOWN 150 PULL-UP TO +CPU_IO

AP0#
AP1#
SMI#
Y20
HIT#
TDO
TMS
TCK
PICD1
TDI
1
TCK 1K PULL-DOWN 1K PULL-UP TO +CPU_IO

AD14
AD13
AC15
AC13
AC12
AD10
AB20
AA14
AA11
AB10
AA15
AB16
W20
AD9
AA1
AB1
V21
R64 +3VS
U3
V1
Y4
Y2
E6
V5
1K COPPERMINE SOCKET +VCPU_IO TMS 1K PULL-DOWN 1K PULL-UP TO +CPU_IO
2
THERMDC TRST# 1K PULL-DOWN X
7 DEFER#
THERMDA
2
7 HIT# R85 R109 TDO X 150 PULL-UP TO +CPU_IO

7 HITM# 1.5K 10K
HCLK
FERR_CPU# GT_A20M# 6
3 1 FERR# 13
2
1
GT_IGNNE# 6
R282 Q10
PWRGD_CPU 6
33 2SC2412K
GT_SMI# 6
2
IERR# TCK R104
TDO +VCPU_IO
21
1 2
TDI
C360 TMS 1K
15PF TRST#
PREQ# Title
1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
B 4C
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC. 401138
A B C D E
+VCPU_IO
1
R81
1K_1%
VGTLREF VGTLREF
VCMOSREF
2
+VCC_CORE
1
C56 C69 C75 C57 C73 C70 C291 C58
VGTLREF VCLKREF R79
2K_1% .1UF .1UF 1000PF .01UF .1UF .01UF 1UF 1000PF
2
4 4
1
1
C92 C84
2
C331 C325 C316 C310 C311 C317 C326 C332
AD18
.01UF .1UF .1UF .01UF 1UF 1000PF .1UF .1UF .1UF 1UF
AA9
G18
C14
D14
D16
E16
E17
Y17
Y18
A15
A16
A17
E15
F17
G2
G5
U5
D8
H3
H5
E5
P2
F5
2
2
U7B
+VCPU_IO
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
VREF
VREF
VREF
VREF
VREF
VREF
VREF
VREF
CLKREF
CMOSREF
CMOSREF
+VCC_CORE Change value by
1
R279
Charles at 6/24
1K_1%
+VCC_CORE VCMOSREF VCMOSREF
1
2
NC14 J5
C318 C312 C302 C303 C304 C333 C327 C85 C343 C65 M4
NC15
1
.01UF 1000PF .1UF 1UF 1000PF 1UF .1UF 1000PF .01UF M5 C79 C324
.1UF NC16 R278
2
2
H8 VCC NC17 P3
H10 P4 2K_1% .1UF 1000PF
VCC NC18
2
H12 VCC NC19 AA5
H14 VCC NC20 AA19
+VCC_CORE
2
H16 VCC NC21 AC3
J7 VCC NC22 AC17
J9 VCC NC23 AC20
J11 VCC NC24 AD15
J13 +VCLK
VCC
J15 VCC
1
1
C93 C100 C339 K8 VCC
1
3 C108 C305 C313 C319 C328 C334 C341 K10 3
.1UF .1UF 1UF VCC R96
.1UF .1UF 1UF 1000PF .1UF .1UF 1000PF K12 VCC 2K_1%
2
2
K14 VCC
K16 VCLKREF VCLKREF
VCC
L7 VCC VCCT AD8 +VCPU_IO
2
L9 VCC VCCT AD7
L11 VCC VCCT AD6
1
L13 AC8 C104
L15
M8
VCC
VCC
VCC Coppermine VCCT
VCCT
VCCT
AC7
AC6
R93
2K_1% .1UF
2
M10 VCC VCCT AB8
+VCC_CORE C329, C315, C357, M12 AB7
VCC VCCT
2
M14 AB6
C94, C98, C109
Change from TPC to
M16
N7
VCC
VCC
VCC
H-PBGA VCCT
VCCT
VCCT
AA8
AA7
1
C329 C315 C357 N9 AA6

+ + + TPB for cost down N11
N13
VCC
VCC
VCC
495 Ball VCCT
VCCT
VCCT
Y8
Y7
150UF_TPB_6.3V 150UF_TPB_6.3V 150UF_TPB_6.3V N15 Y6
VCC VCCT +VCPU_IO Change value by Charles at 6/24
2
P8 VCC VCCT W17

P10 VCC VCCT W16
P12 VCC VCCT W15
P14 VCC VCCT W14
1
P16 G17 C338 C344 C288 C287 C91 C67 C68 C66 C282
VCC VCCT + C89
R7 VCC VCCT G16
+VCC_CORE R9 G15 1000PF.01UF 1000PF.01UF .1UF 1000PF.01UF 1UF .1UF 220U_TPB_4V
VCC VCCT
2
R11 VCC VCCT G14
R13 VCC VCCT G13
R15 VCC VCCT G12
1
2 C98 C366 C103 C109 C94 2

T8 VCC VCCT G11
+ + + + + T10 G10
VCC VCCT
T12 VCC VCCT G9
220UF_TPB_4V 10UF_10V_1206 10UF_10V_1206 220UF_TPB_4V 220UF_TPB_4V T14 G8
VCC VCCT
2
T16 VCC VCCT G7

U7 VCC VCCT G6
U9 VCC VCCT H6
U11 H17 +VCPU_IO Change value by Charles at 6/24
VCC VCCT
U13 VCC VCCT K6
+VCC_CORE U15 K17
VCC VCCT
VCCT L6
1
L17 C284
VCCT
1
J6 C62 C61 C60 C59 C63 C64 C553 C554 C555 +
VCCT
VCCT J17
1UF 1000PF.01UF 1UF 1000PF.01UF 1UF .1UF .1UF 150UF_TPC_4V
1
C309 C292
2
C354
C364 C349 C350 C299
10UF_10V_1206 10UF_10V_120610UF_10V_1206 10UF_10V_1206 10UF_10V_1206 10UF_10V_1206 10UF_10V_1206
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
2
W10
W11
W12
W13
M17
N17
R17
U17
P17
V10
V11
V12
V13
V14
V15
V16
V17
T17
W6
W7
W8
W9
M6
N6
R6
U6
P1
P6
V6
V7
V8
V9
T6
COPPERMINE SOCKET
+VCC_CORE
Change value by
Charles at 12/20
1
1
C300 C298 C361 1
10UF_10V_1206 10UF_10V_1206 10UF_10V_1206

+VCC_CORE
2
Change by
Charles at 9/2 Compal Electronics, inc.
Title
B 4C
A B C D E
A B C D E
C11
C15
C16
C19
A12
A21
B10
B15
B18
E10
E11
E13
E19
F10
F11
F12
F13
C9
D2
D6
D7
D9
A2
A7
A8
B1
B5
B6
B7
B8
E3
E7
E8
E9
VID[0..4] U7C
F3
F6
F7
F8
F9
VID[0..4] 36
4 4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS F14
VSS F15
AD21 VSS VSS F16
AD16 VSS VSS F20
AD5 VSS VSS G3
CPU_VID2 AD4 G19
CPU_VID1 VSS VSS
AD3 VSS VSS H2
CPU_VID0 AD2 H7
VSS VSS
AD1 VSS VSS H9
AC21 VSS VSS H11
AC18 VSS VSS H13
AC16 VSS VSS H15
AC14 VSS VSS H20
AC10 VSS VSS J4
AC5 J8
CPU_VID3 AC4
AC2
AC1
VSS
VSS
VSS
VSS
Coppermine VSS
VSS
VSS
VSS
J10
J12
J14
AB17 J16
AB14
AB13
VSS
VSS
VSS
H-PBGA VSS
VSS
VSS
J19
K2
AB11 K7
AB9
AB5
VSS
VSS
VSS
495 Ball VSS
VSS
VSS
K9
K11
CPU_VID4 AB4 K13
3
VSS VSS 3
AB3 VSS VSS K15
AA20 VSS VSS K20
AA13 VSS VSS L5
AA4 VSS VSS L8
Y19 VSS VSS L10
+3V Y16 L12
R67 R68 VSS VSS
Y15 VSS VSS L14
@0 LN_0 Y14 L16
VSS VSS
3,20,25,26,32,33,38 SMC 1 2 Y13 VSS VSS L19
1
1 2 Y12 VSS VSS M7
12,13 SCKP4 C286 Y11 VSS VSS M9
U27
3,20,25,26,32,33,38 SMD 1 2 LN_.1UF Y10 VSS VSS M11
2
1 2 1 SCL VCC3 20 Y9 VSS VSS M13
12,13 SDAP4
R57 2 SDA Y3 VSS VSS M15
+3V R58 3 19 W18 M20
@0 Override# ASEL VSS VSS
LN_0 18 W4 N2
WP VSS VSS
1
RP65 RP1
VSS N3
1 8 VID0 1 8 CPU_VID0 4 17 R59 LN_0 N4
VID1 CPU_VID1 I-0 Non_Mux_Out R265 VSS
2 7 2 7 5 I-1 Mux_Sel 16 1 2
3 6 VID2 3 6 CPU_VID2 6 LN_0
VID3 CPU_VID3 I-2 VID0
4 5 4 5 7 I-3 Y-0 15
VID1
2
8 I-4 Y-1 14
L@8P4R-4.7K L@8P4R-0 13 VID2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VID4 CPU_VID4 Y-2 VID3
1 2 1 2 9 Level Y-3 12
10 11 VID4
GND Y-4
U20
U16
U14
U12
U10
R20
R16
R14
R12
R10
N20
N19
N18
N16
N14
N12
N10
V19
P19
P15
P13
P11
T19
T18
T15
T13
T11
R461 L@4.7K R69
U8
R8
R5
R4
R3
N8
V3
P9
P7
P5
T9
T7
T5
T3
L@0
1
Add by LN_FM3560 D COPPERMINE SOCKET
2 Q5
2 Charles at 6 VR_HI/LO# G 2
S LN_SI2302DS
3/27 to
reserved for
3
LA733L
ADDRESS: ASEL = LOW => 6E/6F
VID4 VID3 VID2 VID1 VID0 +VCC_CORE
0 1 1 1 0 1.3V
0 1 1 0 1 1.35V
0 1 0 1 0 1.5V
0 1 0 0 1 1.55V
0 1 0 0 0 1.6V
0 0 1 1 1 1.65V
0 0 1 1 0 1.70V
0 0 1 0 1 1.75V
1 1
0 0 1 0 0 1.80V
0 0 0 1 1 1.85V

Title
B 4C
A B C D E
A B C D E
2 R117 1 U10
LN_1K LN_AMI11686-001
2 R121 1
LN_1K
NMI 20 1 GT_NMI
13 PIIX4_NMI NMI G_NMI GT_NMI 3
INTR 16 4 GT_INTR
13 PIIX4_INTR INTR G_INTR GT_INTR 3
CPUINIT# 22 8 GT_CPUINIT#
13 PIIX4_INIT# INIT# G_INIT# GT_CPUINIT# 3
A20M# 1 R294 2 24 48 1 R111 2 GT_A20M#
13 PIIX4_A20M# A20M# G_A20M# GT_A20M# 3
IGNNE# 1 @0 2 21 2 @0 1 R106 2 GT_IGNNE#
13 PIIX4_IGNNE# IGNNE# G_IGNNE# GT_IGNNE# 3
1 SMI# R292 17 5 GT_SMI# @0 1
13 PIIX4_SMI# SMI# G_SMI# GT_SMI# 3
@0
STPCLK# 23 3 GT_STPCLK#
13 PIIX4_STPCLK# STPCLK# G_STPCLK# GT_STPCLK# 3
SUSTAT1# 19 11 GT_SUSTAT1#
13 SUS_STAT# SUSSTAT1# G_SUSSTAT1# GT_SUSTAT1# 8
CPU_STP# R108 13 47 1 R115 2 GT_CPU_STP#
13 CPU_STP# CPU_STP# G_CPU_STP# GT_CPU_STP# 10
GT_CPU_STP# 1 2 LN_0
GT_LO/HI# @0 14 46
13 GT_LO/HI# G_LO/HI# RESERVED
26,36,37 VR_ON 15 VR_ON GHI# 10

V_GATE 29 VGATE
Change by Charles at 2/16
36,37 V_GATE 2 R447 1 43 9 PWRGD_CPU
IGN_VGATE# CPUPWRGD PWRGD_CPU 3
LN_1K
VRPWRGD 32 G_VR_POK
G_VR_POK 29
Change by
Add by Charles at 3/21 for D19
28 VR100/50# Charles at
ATE testing 44 12 VRCHGNG# CPU_STP# 1
PLL30/60# VRCHGNG# VRCHGNG# 13 2/10
33 VR_HI/LO# 3 GT_CPU_STP#
VR_HI/LO# VR_HI/LO# 5
CRESET# 41 34 VRCHGNG# 2
7 CRESET# CRESET# LP_TRANS# CPU_LO/HI#
CPU_LO/HI# 3
26 CLK_IN RESERVED 35
1
R298 R123 D @RB717F
Y5 25 39
CLK_OUT RESERVED
10 14.3M_GCL 2 1 1 2 45 CLKEN#L RESERVED 40 1 2 2 Add by Charles
@0 LN_10K G
@14.318MHZ Q12
at 1/18
38 STB#
S
Add by Charles at 2/16 LN_SI2302DS
3
Y6 37 DIN
VCC3
VCC3
1 2 36
GND
GND
GND
GND
GND
DOUT
LN_14.318MHZ
1
18
31
42
27
30
C379 C378
7
LN_15PF LN_15PF
2
2 2 2
+3V
without Geyserville,
1
C367 C385 GHI#(CPU_LO/HI#) can
LN_.01UF LN_.1UF OPEN
2
RP24
+VCPU_IO 1 8 GT_NMI
2 7 GT_INTR
3 6 GT_IGNNE#
4 5 GT_A20M#
8P4R-1.5K
Change by
1 2 CPU_LO/HI#
A20M#
Charles at
2 R295 1 GT_A20M# R100 L@1.5K
0 2/16 1 2 GT_CPUINIT#
R87 1K
IGNNE# 2 R293 1 GT_IGNNE# 1 2 GT_STPCLK#
0 R86 680
1 2 GT_SMI#
RP27 R88 330
CPU_STP# 9 8 GT_CPU_STP#
INTR 10 7 GT_INTR
SMI# 11 6 GT_SMI# 1 2 VR_HI/LO#
+3V
CPUINIT# 12 5 GT_CPUINIT# R296 LN_10K
13 4 Change by
NMI 14 3 GT_NMI Charles at 1 2 G_VR_POK
+3VS
15 2 R304 LN_10K
SUSTAT1# GT_SUSTAT1# 2/10 D20
16 1
3 PWRGD_CPU 2 VR_POK 3
+VCLK 1 2 1 VR_POK 37
Add by R289 1.5K
L@16P8R-0
Charles at V_GATE 1 2 G_VR_POK 1 2 GT_CPU_STP# L@RB751V
+3VS
3/22 R448 L@0 R300 4.7K
STPCLK# 1 2 GT_STPCLK#
R122 L@0 1 2 GT_SUSTAT1#
+3V
R99 10K
for without Geyserville RP18
CPUINIT#
+3VS 8 1
7 2 NMI
6 3 INTR
5 4 SMI#
Add by
LN_8P4R-4.7K
Charles at
1/18 +3V
U13 C161 @.1UF 1 2 STPCLK#
GT_SUSTAT1# 1 5 1 2 R301 LN_4.7K
1 2 VRCHGNG#
2 R103 10K
13,14 PIIX4_SLP#
3 4 VGA_SUS_STAT# 23
1 2 CRESET#
+3V
@7SH08 R119 1K
1 2 GT_LO/HI#
+3VS
1 2 R113 10K
R175 0 1 2 SUSTAT1#
+3V
4
R291 LN_10K 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL Title

ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION.
THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION
Size Document Number Rev
OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER
B 4C
THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY 401138
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Tuesday, August 21, 2001 Sheet 6 of 47
A B C D E
A B C D E
443ZXM-100_ A HA[3..31]
MMA[0..13] 12
+3V
HA[3..31] 3
AA18
AA20
AA7
AA9
G21
U31A
V21
Y21
F18
F20
J21
G6
F7
F9
J6
443ZXM-A
HA3 G25 AF17
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
+3V HA4 HA#3 MAA0
H22 HA#4 MAA1 AB16
HA5 G23 AE17 CKE[2..5]
HA6 HA#5 MAA2 11 CKE[2..5]
H23 HA#6 MAA3 AC17
HA7 G24 AF18
HA8 HA#7 MAA4
F26 HA#8 MAA5 AE19
1
1
1 C137 C134 C130 C131 C132 C135 HA9 G26 AF19 1
+ C146 HA10 HA#9 MAA6
G22 HA#10 MAA7 AC18
1000PF .01UF .01UF .1UF .1UF 1000PF 10UF_10V_1206 HA11 F22 AC19
HA12 HA#11 MAA8
2
2
F23 HA#12 MAA9 AE20
HA13
2
F24 HA#13 MAA10 AD20
HA14 F25 AF21
HA15 HA#14 MAA11
E23 HA#15 MAA12 AC21
HA16 E26 AF25
HA17 HA#16 MAA13
E25 HA#17
HA18 D25 AD16 MMA0
+3V HA19 HA#18 MAB#0 MMA1
D26 AC16
HA20
HA21
B25
C26
HA#19
HA#20
HA#21
82443ZXM-100 MAB#1
MAB#2
MAB#3
AD17
AB17
MMA2
MMA3
HA22 A25 AE18 MMA4
HA23 HA#22 MAB#4 MMA5
C25 AD19
HA#23 492 BGA MAB#5
1
1
C154 C157 C158 C159 C156 C155 HA24 A24 AB18 MMA6
+ C120 HA25 HA#24 MAB#6 MMA7
D24 HA#25 MAB#7 AB19
1000PF .01UF .01UF .1UF .1UF 1000PF 10UF_10V_1206 HA26 C23 AF20 MMA8
2
2
B24 HA#27 MAB#9 AC20
HOST INTERFACE
DRAM INTERFACE
HA28 MMA10
2
C24 HA#28 MAB10 AB20
HA29 A23 AE21 MMA11
E22 HA#30 MAB#12 AD21
HA31 D23 AF22 MMA13
HA#31 MAB#13
AB14 RAS0#_BX R1931 2 47
CSA#0 RRAS#2 11
B23 AF15 RAS1#_BX R1781 2 47
3 CPURST# CPURST# CSA#1 RRAS#3 11
K21 AE15 RAS2#_BX R1941 2 47
3 HADS# ADS# CSA#2 RRAS#4 11
H24 AC15 RAS3#_BX R1951 2 47
3 BNR# BNR# CSA#3 RRAS#5 11
H26 BPRI# CSA#4 AD15
2 3 BPRI# R186 33 2
CSA#5 AE16
AE24 CKE4_BX 1 2
CKE2/CSA#6 CKE4 11
L23 AD23 CKE5_BX 1 2
3 DBSY# DBSY# CKE3/CSA#7 CKE5 11
J26 R185 33
3 DEFER# DEFER# PLACE THE RESISTOR ON THE 443ZX
3 DRDY# K23 DRDY# CSB#0 AE25
3 HIT# L24 HIT# CSB#1 AD24
3 HITM# L22 HITM# CSB#2 AD26
3 HLOCK# K22 HLOCK# CSB#3 AC24
3 HTRDY# H25 HTRDY# CSB#4 AC26
B26 BREQ0# CSB#5 AB23
3 BREQ0#
CKE4/CSB#6 AC23
RS#0 K26 AF24
3 RS#[0..2] RS#0 CKE5/CSB#7
RS#1 L26
RS#2 RS#1 RCAS#0
L25 RS#2 DQMA0 AD13
AC13 RCAS#1
HREQ#0 DQMA1 RCAS#2
3 HREQ#[0..4] J22 HREQ#0 DQMA2 AC25
HREQ#1 J23 AB26 RCAS#3
HREQ#2 HREQ#1 DQMA3 RCAS#4
K24 HREQ#2 DQMA4 AE14
HREQ#3 K25 AC14 RCAS#5
HREQ#4 HREQ#3 DQMA5 RCAS#6
J25 HREQ#4 DQMA6 AA22
AA24 RCAS#7
DQMA7
RCAS#[0..7] 11
R329 = @10K (no load) 2/16 DQMB1 AE13
HCLK N23 AD14
3,10 HCLK HCLKIN DQMB5
R329 @10K
+3V 1 2 TESTIN# M25 TESTIN# CKE0/FENA AC22 CKE2_BX R1971 2 33 CKE2 11
1
CRESET# M26 AF23 CKE3_BX R1961 2 33

6 CRESET# CRESET# CKE1/GCKE CKE3 11
R150
PLACE THE A3 AF16 SRASA# 12
3 33 13,16,31 PCIRST# PCIRST# SRAS_A# 3
TERMINATOR ON THE SRAS_B# AA17
AF12
SCAS_A# SCASA# 12
STUB TO CPU
2
SCAS_B# AB13
1
C148 AE12
WE_A# RMWEA# 12
WE_B# AC12
15PF AE22 R168
CRESVA W=5mils DCLKO_R W=5mils
Add by Charles
2
AE23 CRESVB DCLKO AB21 1 2 DCLKO 10

at 5/20 P22 CRESVC DCLKWR AD25
AB22 W=5mils 18
DCLKRD DCLKRW 10
1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C163
2
C18
C22
H21
A14
A26
E12
E15
E24
F19
F21
R170 22PF
2
J24
C5
C9
H6
A1
E3
F6
F8
J3
33
place closely to 443zx Add by Charles
1
at 5/20
1
C162
15PF
2
AB22 leave to be NC. 2/16
4 4

Title
B 4C
A B C D E
A B C D E
C/BE#[0..3]
443ZXM-100_ B 13,31 C/BE#[0..3]
AD[0..31]
+3V +3V 13,31 AD[0..31]
GAD[0..31]
M12
M15
AE1
U31B
N11
N16
R12
R15
N26
P11
P16
23 GAD[0..31]
T11
T13
T14
T16
L11
L13
L14
L16
P1
V6
Y6
443ZXM-A ** Place as close to
AD0 K6 AB5 GAD0 443BX as possible.
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD_AGP
VDD_AGP
VDD_AGP
VDD_AGP
AD1 AD0 GAD0 GAD1
K2 AD1 GAD1 AE2
AD2 K4 AD3 GAD2
AD3 AD2 GAD2 GAD3 +3V
K3 AD3 GAD3 AD2
+3VS AD4 K5 AD1 GAD4
AD5 AD4 GAD4 GAD5
1 J1 AD5 GAD5 AC3 1
RP4 AD6 J2 AC1 GAD6
GNT#0 AD7 AD6 GAD6 GAD7
1 10 H2 AD7 GAD7 AB4
1
GNT#1 2 9 REQ#0 AD8 H1 AB1 GAD8
REQ#0 AD8 GAD8
GNT#2 3 8 REQ#1 31 AD9 J5 AA5 GAD9 C141 C138 C151 C150 C384
GNT#3 REQ#2 AD10 AD9 GAD9 GAD10
4 7 H3 AD10 GAD10 AA3
REQ#3 AD11 GAD11 1000PF .01UF .01UF .1UF .1UF
2
5 6 H5 AD11 GAD11 AA4
AD12 H4 AA2 GAD12
10P8R_10K
AD13
AD14
G1
G2
AD12
AD13
AD14
82443ZXM-100 GAD12
GAD13
GAD14
AA1
Y5
GAD13
GAD14
PCI INTERFACE
+3VS AD15 G4 Y3 GAD15
AD16 AD15 GAD15 GAD16
D1 W1
AD17
AD18
D3
D2
AD16
AD17
492 BGA GAD16
GAD17 V2
W2
GAD17
GAD18 +3V
C1 AD19 GAD19 U5
AD20 A2 V1 GAD20
C3 AD21 GAD21 U4
AD22 B3 U3 GAD22
AD22 GAD22
1
AD23 D4 U1 GAD23
AD24 AD23 GAD23 GAD24 C166 C167 C153 C403 C147 C416
E5 AD24 GAD24 T3
AD25 A4 T4 GAD25
AD26 AD25 GAD25 GAD26 1000PF .01UF .01UF .1UF .1UF 1000PF
2
D5 T2
AGP INTERFACE
B4 AD27 GAD27 T1
AD28 B5 U6 GAD28
A5 AD29 GAD29 R3
AD30 E6 R4 GAD30
C6 AD31 GAD31 R2
C/BE#0 J4 AB2
C/BE#0 GC/BE#0 GC/BE#0 23
2 C/BE#1 G3 Y4 +3V 2
C/BE#2 E4 V4
C/BE#3 C4 U2
13,14,31 FRAME# 1R314 0 2 FRAME#_BX E2 FRAME# GFRAME# W3 GFRAME# 23
1
13,14,31 DEVSEL# 1R322 0 2 DEVSEL#_BX F3 DEVSEL# GDEVSEL# W5 GDEVSEL# 23
13,14,31 IRDY# 1R313 0 2 IRDY#_BX E1 IRDY# GIRDY# V5 GIRDY# 23
C149 C143 C152 C139 C412 C387
1R130 0 2 TRDY#_BX F5 TRDY# GTRDY# W4 GTRDY# 23
13,14,31 TRDY# 1000PF .01UF .01UF .1UF .1UF 1000PF
2
13,14,31 STOP# F4 STOP# GSTOP# Y1 GSTOP# 23
13,14,31 PAR G5 PAR GPAR Y2 GPAR 23
13,14,31 SERR# F1 SERR#
F2 L5 GREQ#
14 PLOCK# PLOCK# GREQ# GREQ# 23
L3 GGNT#
GGNT# GGNT# 23
B6 R166 18 ** Trace lengths of GCLKOUT & GCLKIN
13,14 PHLD# PHOLD#
PCI ARB & PWR MGT

D6 P5 GCLKOUT W=10mils 1 2 W=5mils must be matched. Stub to teebshould be 1"
13,14 PHLDA# PHLDA# GCLKOUT W=5mils GCLKO 23
AE3 WSC# GCLKIN N5 1 2 MAX.
1
R162
TO DOCKING REQ#0 A6 M3 PIPE# 18 C160
PREQ0#/IOREQ# PIPE# PIPE# 23
REQ#1 C7 K1 SBA0
31 REQ#1 REQ#2 PREQ1# SBA0 SBA1 22PF R165 8.2K
2
F10 PREQ2# SBA1 M2
13 REQ#2 REQ#3 SBA2 GTRDY#
15 REQ#3 D8 PERQ3# SBA2 M1 1 2 +3V
+3VS 1 10K 2 REQ#4 D10 PERQ4# SBA3 N2 SBA3 Add by R158 8.2K
AD4 P2 SBA4 GIRDY# 1 2
R129 6 GT_SUSTAT1# SUSTAT# SBA4 SBA5
Charles at R161 8.2K
SBA5 P4
TO DOCKING GNT#0 E7 P3 SBA6 5/20 GDEVSEL#1 2
GNT#0 PGNT0#/IOGNT# SBA6
31 GNT#1 D7 R1 SBA7 R338 8.2K
31 GNT#1 PGNT1# SBA7
GNT#2 E10 SBA[0..7] GSTOP# 1 2
17 GNT#4 PGNT2# SBA[0..7] 23
GNT#3 E8 M4 R340 8.2K
15 GNT#3 PGNT3# RBF# RBF# 23
1 2 GNT#4 E9 +3V AD_STBA 1 2
3 +3VS PGNT4# C535 R156 8.2K 3
AF3 BXPWROK ST0 L4 ST0 23
R128 10K 13,29 RSMRST# AD_STBB 1
13,14,23,27,31 CLKRUN# AC4 CLKRUN# ST1 L2 ST1 23 1 2 2
REFVCC5 C2 L1 R335 8.2K
REFVCC5 ST2 ST2 23
1
W=5mils B2 1UF GFRAME# 1 2
10 PCLK_BX PCLKIN
AC2 R152 R145 8.2K
GADSTB-A AD_STBA 23
D7 T5 GREQ# 1 2
GADSTB-B AD_STBB 23
1
place closely to 443zx N3 3.48K_1% R328 8.2K

SB-STB SBSTB 23
+3V 2 1 R308 Change GGNT# 1 2
AGPREFV W=20mils R332 8.2K
2
AGPREFV N4 value by
RB751V 10 SBSTB 1 2
1
1 2 Charles R149 8.2K
+5V
1
C536 C145 C537 R154 RBF#
2
at 2/16 1 2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
1
R143 1K R331 8.2K

1
C128 1000PF .01UF 1UF 2.32K_1% PIPE# 1 2
W21
M11
M13
M14
M16
M22
N12
N13
N14
N15
R11
R13
R14
R16
R22
P12
P13
P14
P15
P26
V24
T12
T15
C393
L12
L15
2
W6
M5
N1
R5
V3
1UF
2
2
15PF
2
** Place as close to
443BX as possible. R337 100K
GPAR 1 2
U30C
74LVC08
9 REQ#1
13 PX4_REQ1# 8
10 REQ#3
4 4
+3VS POWER
U30D
74LVC08
12 REQ#0 Title
13 PX4_REQ2# 11
13 REQ#4 AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
REQ#4 17 Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
+3VS POWER B 4C
A B C D E
A B C D E
443ZXM-100_ C
+3V
AE26
AF14
U31C
AF2
N22
B1
443ZXM-A
MMD[0..63] MMD0 AF4 B22 HD0 +3V
VDD
VDD
VDD
VDD
VDD
12 MMD[0..63] MMD1 MD0 HD#0
AE4 MD1 HD#1 D22 HD1
MECC[0..7] MMD2 AF5 E21 HD2
12 MECC[0..7] MD2 HD#2
MMD3 AD6 A22 HD3
MMD4 MD3 HD#3
AE6 MD4 HD#4 D21 HD4
1
1 MMD5 AB7 C21 HD5 1
MMD6 MD5 HD#5
AC7 MD6 HD#6 A21 HD6 C171 C170 C133 C123 C144
MMD7 AF7 C20 HD7
MMD8 MD7 HD#7
B21 HD8 1000PF .01UF .01UF .1UF .1UF
2
AB8 MD8 HD#8
MMD9 AB9 E20 HD9
MMD10 MD9 HD#9
AC9 MD10 HD#10 A20 HD10
MMD11 AE9 E19 HD11
MMD12
MMD13
AB10
AC10
MD11
MD12
MD13
82443ZXM-100 HD#11
HD#12
HD#13
B20 HD12
E18 HD13 CAP. closeed to 443BX.
MMD14 AF10 D20 HD14
MMD15 MD14 HD#14
AD11 D19 HD15
MMD16
MMD17
Y24
Y25
MD15
MD16
492 BGA HD#15
HD#16 D18 HD16
C19 HD17
MMD18 MD17 HD#17
W23 MD18 HD#18 B19 HD18
MMD19 W24 A18 HD19 HD[0..63]
MD19 HD#19 HD[0..63] 3
MMD20 W26 A19 HD20
MMD21 MD20 HD#20
W25 MD21 HD#21 B18 HD21
MMD22 V26 C17 HD22
MMD23 MD22 HD#22
U24 MD23 HD#23 E17 HD23
MMD24 U23 D17 HD24
MD24 HD#24
MEMORY DATA BUS

MMD25 T22 B17 HD25
MMD26 MD25 HD#25
T23 C16 HD26
HOST DATA BUS

MMD27 MD26 HD#26
T26 MD27 HD#27 A17 HD27
MMD28 R24 C15 HD28
MMD29 MD28 HD#28
R25 MD29 HD#29 B16 HD29
MMD30 P23 D16 HD30
MMD31 MD30 HD#30
N25 MD31 HD#31 A16 HD31
MMD32 AC5 B15 HD32
MMD33 MD32 HD#32
AE5 MD33 HD#33 A15 HD33
2 MMD34 AB6 D14 HD34 2
MMD35 MD34 HD#34
AC6 MD35 HD#35 D15 HD35
MMD36 AF6 B13 HD36
MMD37 MD36 HD#36
AD7 MD37 HD#37 C14 HD37
MMD38 AE7 E14 HD38
MMD39 MD38 HD#38
AC8 MD39 HD#39 D13 HD39
MMD40 AD8 A13 HD40
MMD41 MD40 HD#40
AF8 MD41 HD#41 D12 HD41
MMD42 AE8 B12 HD42
MMD43 MD42 HD#42
AF9 MD43 HD#43 B14 HD43
MMD44 AD10 C13 HD44
MMD45 MD44 HD#44
AE10 MD45 HD#45 E13 HD45
MMD46 AB11 D11 HD46
MMD47 MD46 HD#46
AC11 MD47 HD#47 A12 HD47
MMD48 Y23 B11 HD48
MMD49 MD48 HD#48
Y26 MD49 HD#49 A11 HD49
MMD50 W22 B7 HD50
MMD51 MD50 HD#50
V22 MD51 HD#51 C12 HD51
MMD52 V23 C8 HD52
MMD53 MD52 HD#52
V25 MD53 HD#53 B10 HD53
MMD54 U22 A10 HD54
MMD55 MD54 HD#54
U25 MD55 HD#55 A9 HD55
MMD56 U26 A7 HD56
MMD57 MD56 HD#56
T24 MD57 HD#57 E11 HD57
MMD58 T25 D9 HD58
MMD59 MD58 HD#58
U21 MD59 HD#59 C11 HD59
MMD60 R23 C10 HD60
MMD61 MD60 HD#60
R26 MD61 HD#61 B8 HD61 +VCPU_IO
MMD62 P24 A8 HD62
3 MMD63 MD62 HD#62 3
P25 MD63 HD#63 B9 HD63
1
MECC0 AE11 MECC0
1
MECC1 AA10 +VCPU_IO VGTLREF_BX R476
MECC2 MECC1 1K_1% C538
AA23 MECC2
MECC3 AA26 1UF
MECC4 MECC3
2
AF11 MECC4
MECC5 W=40mils
2
AD12 MECC5 GTLREFA M23
MECC6 AA25 E16
MECC6 GTLREFB
1
MECC7 Y22 M24
MECC7 VTTA
1
F17 R477
VTTB C539 C540 C122 C142 2K_1%
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
.01UF .01UF 1UF 1UF

Add by Charles at 5/3
2
AD18
AD22
AB25
AA19
AA21
AB12
AB15
AB24
AF13
AF26
AD5
AD9
AA6
AA8
AB3
AF1
N24
2
1
1
C532 C541 C533 Add by Charles at 5/3
4.7UF_10V_0805 .01UF 4.7UF_10V_0805
2
2
** Place as close to
443BX as possible.
4 4

Title
B 4C
A B C D E
A B C D E
CLOCK GENERATOR & BUFFER
+3VPCI
L29
1 +3VS 1 2 1
HB1M2012-121JT
1
C372 C376 C381
R105 22
4.7UF_10V_0805 .01UF .1UF 1 2 14MOSC 13
2
R101 22
VCLK_+3VS 1 2 14.3M_SIO 27
L30
R110 22
+3VS 1 2 1 2 14.3M_VGA 23
HB1M2012-121JT
R114@22
1
1 2 14.3M_GCL 6 Add by Charles at 2/16
C114 C118 C383
C382 .1UF U11
4.7UF_10V_0805 .01UF 1000PF
26
2
14.3M
6 VDDPCI
9 VDDPCI R118 22
13 VDD CPUCLK0 24 1 2 HCLK 3,7
21 VDD
27 VDD CPUCLK1 23
CLK_CPUIO
L28
R116 33
+VCLK 1 2 25 VDDCPU PCICLK1 5 1 2 PCLK_BX 8
HB1M2012-121JT
R120 15
1
1 PCICLK2 7 1 2 PCLK_MINI 31
Change value by Charles for
C369 C116 C370 XIN 1
Y1 XIN R124 33
EA at 5/26
.01UF 1000PF 8 1 2 PCLK_PCM 15
4.7UF_10V_0805 XOUT PCICLK3
2
1 2
R126
PCICLK4 10 1 2 33 PCLK_AUD 17
14.318MHZ
R136
2 Y2
PCICLK5 11 1 2 33 PCLK_SIO 27
Add by Charles at 1/4 2
1 2
2 XOUT PCICLKF 4 1 R112 2 33 PCLK_PIIX4 13
@14.318MHZ
1 2
R107 2M R127 15
18 CPU_STP# 48M 16 1 2 48M 13
1
1
+3VS
C113 C112 19 3 Change value by
PCI_STP# GND
10PF 10PF GND 12 Charles at 5/21
1
R125
2
2
17 PWRDWN# GND 14
1
GND 20
10K 15 22 Reserved C121
6 GT_CPU_STP# SEL100/66# GND
13 PCI_STP# GND 28 by Charles @33PF
2
at 6/24
SUSA# 1 PWRDWN#
2
13,25 SUSA# 2 W48C111-17
D5 RB751V
1 2
R132 @0
13 FSQ0
+3VS 1 2 FQS 0 : 66MHZ
R131 10K
1 : 100MHZ
3 VCLK_SDRAM 3
L33 U32
+3V 1 2 1 VDD CLK_SDRAM0 2 For EA
HB1M2012-121JT 5 VDD requirment
1
24 VDD
C168 C417 C415 C421 C414 C420 C418 at 6/26.
28 VDD CLK_SDRAM1 3
4.7UF_10V_0805 .1UF .1UF .01UF .01UF 1000PF 1000PF 10 VDD
2
19 VDD R349
13 VDDIIC CLK_SDRAM2 6 1 2 CLK_SDRAM2 11
10
9 BUF_IN
7 DCLKO R347
CLK_SDRAM3 7 1 2 CLK_SDRAM3 11
1
SDACLK 14 10
R187 12 CLK_SMD SDATA R346
CLK_SDRAM4 22 1 2 CLK_SDRAM4 11
33
Add by SCKCLK 15 10
12 CLK_SMC SCLCOK R348
12
Charles at CLK_SDRAM5 23 1 2 CLK_SDRAM5 11

5/20 C169 SUSA# 1 10
2 20 OE
22PF D11 RB751V 26
CLK_SDRAM6
2
R345
+3V 1 2
17 GND CLK_SDRAM7 27
10K 12 GND
4 GND R354
8 GND CLK_SDRAM8 11 1 2 DCLKRW 7
21 GND 22
4 25 GND 4
16 18 C419
VSSIC CLK_SDRAM9
15PF_5%
W40S11-02

Title
B 4C
A B C D E
A B C D E
SO-DIM 144 PINS RAM MODULE CONN.
+3V +3V
+3V +3V
1 1
JP28
1 VSS VSS 2
MD0 3 4 MD32 JP27
MD1 DQ0 DQ32 MD33
5 DQ1 DQ33 6 1 VSS VSS 2
MD2 7 8 MD34 MD0 3 4 MD32
MD3 DQ2 DQ34 MD35 MD1 DQ0 DQ32 MD33
9 DQ3 DQ35 10 5 DQ1 DQ33 6
11 12 MD2 7 8 MD34
MD4 VCC VCC MD36 MD3 DQ2 DQ34 MD35
13 DQ4 DQ36 14 9 DQ3 DQ35 10
MD5 15 16 MD37 11 12
MD6 DQ5 DQ37 MD38 MD4 VCC VCC MD36
17 DQ6 DQ38 18 13 DQ4 DQ36 14
MD7 19 20 MD39 MD5 15 16 MD37
DQ7 DQ39 MD6 DQ5 DQ37 MD38
21 VSS VSS 22 17 DQ6 DQ38 18
RCAS#0 23 24 RCAS#4 MD7 19 20 MD39
RCAS#1 CE0# CE4# RCAS#5 DQ7 DQ39
25 CE1# CE5# 26 21 VSS VSS 22
27 28 RCAS#0 23 24 RCAS#4
MA0 VCC VCC MA3 RCAS#1 CE0# CE4# RCAS#5
29 A0 A3 30 25 CE1# CE5# 26
MA1 31 32 MA4 27 28
MA2 A1 A4 MA5 MA0 VCC VCC MA3
33 A2 A5 34 29 A0 A3 30
35 36 MA1 31 32 MA4
MD8 VSS VSS MD40 MA2 A1 A4 MA5
37 DQ8 DQ40 38 33 A2 A5 34
MD9 39 40 MD41 35 36
MD10 DQ9 DQ41 MD42 MD8 VSS VSS MD40
41 DQ10 DQ42 42 37 DQ8 DQ40 38
MD11 43 44 MD43 MD9 39 40 MD41
45 VCC VCC 46 41 DQ10 DQ42 42
MD12 47 48 MD44 MD11 43 44 MD43
MD13 DQ12 DQ44 MD45 DQ11 DQ43
49 DQ13 DQ45 50 45 VCC VCC 46
MD14 51 52 MD46 MD12 47 48 MD44
53 DQ15 DQ47 54 49 DQ13 DQ45 50
2 55 56 MD14 51 52 MD46 2
SMECC0 VSS VSS SMECC4 MD15 DQ14 DQ46 MD47
57 RESVD/DQ64 RESVD/DQ68 58 53 DQ15 DQ47 54
SMECC1 59 60 SMECC5 55 56
RESVD/DQ65 RESVD/DQ69 SMECC0 VSS VSS SMECC4
57 RESVD/DQ64 RESVD/DQ68 58
SMECC1 59 60 SMECC5
CKE3 RESVD/DQ65 RESVD/DQ69
10 CLK_SDRAM3 61 RFU/CLK0 RFU/CKE0 62
63 VCC VCC 64
65 66 61 62 CKE4
12 S_RASA# RFU RFU S_CASA# 12 10 CLK_SDRAM4 RFU/CLK0 RFU/CKE0
67 68 CKE2 63 64
12 RM_WEA# RRAS#3 WE# RFU/CKE1 MA12 VCC VCC
69 RE0# RFU 70 65 RFU RFU 66 S_CASA# 12
RRAS#2 MA13 12 S_RASA# CKE5
71 RE1# RFU 72 12 RM_WEA# 67 WE# RFU/CKE1 68
73 74 RRAS#4 69 70 MA12
OE#/RESVD RFU/CLK1 CLK_SDRAM2 10 RE0# RFU
75 76 RRAS#5 71 72 MA13
SMECC2 VSS VSS SMECC6 RE1# RFU
R384 77 78 73 74 CLK_SDRAM5 10
SMECC3 RESVD/DQ66 RESVD/DQ70 SMECC7 OE#/RESVD RFU/CLK1
79 RESVD/DQ67 RESVD/DQ71 80 75 VSS VSS 76
33 81 82 R385 R382 SMECC2 77 78 SMECC6
MD16 VCC VCC MD48 33 SMECC3 RESVD/DQ66 RESVD/DQ70 SMECC7
83 DQ16 DQ48 84 79 RESVD/DQ67 RESVD/DQ71 80
MD17 85 86 MD49 33 81 82 R383
C458 MD18 DQ17 DQ49 MD50 MD16 VCC VCC MD48 33
87 DQ18 DQ50 88 83 DQ16 DQ48 84
MD19 89 90 MD51 MD17 85 86 MD49
22PF DQ19 DQ51 C444 MD18 DQ17 DQ49 MD50
91 VSS VSS 92 87 DQ18 DQ50 88
MD20 93 94 MD52 C460 MD19 89 90 MD51
MD21 DQ20 DQ52 MD53 22PF 22PF DQ19 DQ51
95 DQ21 DQ53 96 91 VSS VSS 92
MD22 97 98 MD54 MD20 93 94 MD52 C445
MD23 DQ22 DQ54 MD55 MD21 DQ20 DQ52 MD53 22PF
99 DQ23 DQ55 100 95 DQ21 DQ53 96
101 102 MD22 97 98 MD54
MA6 VCC VCC MA7 MD23 DQ22 DQ54 MD55
103 A6 A7 104 99 DQ23 DQ55 100
MA8 105 106 MA11 101 102
A8 A11/BA0 MA6 VCC VCC MA7
107 VSS VSS 108 103 A6 A7 104
3 MA9 MA12 MA8 MA11 3
109 A9 A12/BA1 110 105 A8 A11/BA0 106
MA10 111 112 MA13 107 108
A10 A13/A11 MA9 VSS VSS MA12
113 VCC VCC 114 109 A9 A12/BA1 110
RCAS#2 115 116 RCAS#6 MA10 111 112 MA13
RCAS#3 CE2#/RESVD CE6#/RESVD RCAS#7 A10 A13/A11
117 CE3#/RESVD CE7#/RESVD 118 113 VCC VCC 114
119 120 RCAS#2 115 116 RCAS#6
MD24 VSS VSS MD56 RCAS#3 CE2#/RESVD CE6#/RESVD RCAS#7
121 DQ24 DQ56 122 117 CE3#/RESVD CE7#/RESVD 118
MD25 123 124 MD57 119 120
MD26 DQ25 DQ57 MD58 MD24 VSS VSS MD56
125 DQ26 DQ58 126 121 DQ24 DQ56 122
MD27 127 128 MD59 MD25 123 124 MD57
129 VCC VCC 130 125 DQ26 DQ58 126
MD28 131 132 MD60 MD27 127 128 MD59
MD29 DQ28 DQ60 MD61 DQ27 DQ59
133 DQ29 DQ61 134 129 VCC VCC 130
MD30 135 136 MD62 MD28 131 132 MD60
137 DQ31 DQ63 138 133 DQ29 DQ61 134
139 140 MD30 135 136 MD62
VSS VSS MD31 DQ30 DQ62 MD63
12 DIMM0_SMD 141 SDA SCL 142 DIMM0_SMC 12 137 DQ31 DQ63 138
143 VCC VCC 144 139 VSS VSS 140
12 DIMM1_SMD 141 SDA SCL 142 DIMM1_SMC 12
SO-DIMM144(R) 143 144
VCC VCC
SO-DIMM144
DIMM0
DIMM1
4 4
RCAS#[0..7]
7 RCAS#[0..7]
MMD[0..63]
12 MD[0..63]
MA[0..13]
12 MA[0..13]
7 RRAS#[2..5]
RRAS#[2..5]
Title
CKE[2..5]
7 CKE[2..5] SCHEMATIC, M/B LA-733
SMECC[0..7] THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
12 SMECC[0..7] AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D B 4C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401138
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Tuesday, August 21, 2001 Sheet 11 of 47
A B C D E
A B C D E
SO-DIM 144 PINS RAM MODULE CONN.

Charles add new Damping resistor for address bus and control signals at 6/21 +3V
SM BUS
+3V
RP45 RP46
MA0 MMA0 MA6 MMA6 RP19
9 8 9 8
1
MA1 10 7 MMA1 MA7 10 7 MMA7 R352 1 10
MA2 MMA2 MA8 MMA8 RM_WEA# 10 RMWEA# C173 +3V
11 6 11 6 11 RM_WEA# RMWEA# 7 2 9
1 MA3 12 5 MMA3 MA9 12 5 MMA9 .1UF 3 8 1
MA4 MMA4 MA10 MMA10 R353
2
13 4 13 4 4 7
MA5 14 3 MMA5 MA11 14 3 MMA11 S_RASA# 10 SRASA# 5 6
MA12 MMA12 11 S_RASA# SRASA# 7
15 2 15 2
MA13 MMA13 R351 U14
16
16 1 16 1 10P8R-10K
S_CASA# 10 SCASA#
11 S_CASA# SCASA# 7
6 1
VCC
13 INHIB INH X0 DIMM0_SMC 11
16P8R-10 16P8R-10 10 5
13 ENDIM1 A X1 DIMM1_SMC 11
9 2 1 T2
13 ENDIM2 B X2 TPAD
X3 4 CLK_SMC 10
5,13 SCKP4 3 X
Y0 12 DIMM0_SMD 11
5,13 SDAP4 13 Y Y1 14 DIMM1_SMD 11
15 1 T1
GND
GND
RP41 RP32 Y2 TPAD
Y3 11 CLK_SMD 10
MD0 9 8 MMD0 MD24 9 8 MMD24
MD1 10 7 MMD1 MD25 10 7 MMD25 74HC4052
MD2 MMD2 MD26 MMD26
7
8
11 6 11 6
MD3 12 5 MMD3 MD27 12 5 MMD27
MD4 13 4 MMD4 MD28 13 4 MMD28
MD5 14 3 MMD5 MD29 14 3 MMD29
MD6 MMD6 MD30 MMD30 R184 MMA12
15 2 15 2 +3V
MD7 16 1 MMD7 MD31 16 1 MMD31 10K
R182 MMA10
16P8R-10 16P8R-10 10K
R181 MMA9
2 RP44 RP42 2
@10K
MD8 9 8 MMD8 MD32 9 8 MMD32
MD9 10 7 MMD9 MD33 10 7 MMD33 R180 MMA7
MD10 11 6 MMD10 MD34 11 6 MMD34
@10K
MD11 12 5 MMD11 MD35 12 5 MMD35 Pin Name Function Low High Int.Res.50K
MD12 MMD12 MD36 MMD36 R179 MMA6
13 4 13 4
MD13 14 3 MMD13 MD37 14 3 MMD37 Host Freq. 66MHz 100MHz Pulldown
10K MMA12 Select
MD14 15 2 MMD14 MD38 15 2 MMD38
MD15 16 1 MMD15 MD39 16 1 MMD39 In-Order
R183 MMA11 1 4 Pullup
MMA11 Queue
No Max
Depth
16P8R-10 16P8R-10 @10K Pipe-
Enable line
Quick
MMA10 Stop Quick Pulldown
Start Clock Start
RP37 RP43 Select Mode Mode
MD48 9 8 MMD48 MD40 9 8 MMD40
MD49 10 7 MMD49 MD41 10 7 MMD41 MMA9 AGP Enable Disable Pulldown
MD50 11 6 MMD50 MD42 11 6 MMD42 +3V
MD51 12 5 MMD51 MD43 12 5 MMD43 MMA7 MM Config Normal Tri-
MD52 13 4 MMD52 MD44 13 4 MMD44 Oper. states Pulldown
MD53 14 3 MMD53 MD45 14 3 MMD45 certain
1
MD54 15 2 MMD54 MD46 15 2 MMD46 Memory
MD55 16 1 MMD55 MD47 16 1 MMD47 C439 C212 C450 C448 C465 C456 C443 signal
.1UF .1UF .01UF .01UF 1000PF 1000PF 4.7UF_10V_0805
MMA6 Host Bus Desktop Mobile Pulldown
2
2
16P8R-10 16P8R-10 Buffer GTL+ Low
Mode Power
3 Select GTL+ 3
RP34 RP40 +3V
MD56 9 8 MMD56 MD16 9 8 MMD16
MD57 10 7 MMD57 MD17 10 7 MMD17
MD58 11 6 MMD58 MD18 11 6 MMD18
1
1
MD59 12 5 MMD59 MD19 12 5 MMD19
MD60 13 4 MMD60 MD20 13 4 MMD20 C459 C441 C440 C449 C455 C461 C454
MD61 14 3 MMD61 MD21 14 3 MMD21 .1UF .1UF .01UF .01UF 1000PF 1000PF 1UF
MD62 MMD62 MD22 MMD22
2
2
15 2 15 2
MD63 16 1 MMD63 MD23 16 1 MMD23
SMECC[0..7]
11 SMECC[0..7]
16P8R-10 16P8R-10 +3V
MMA[0..13]
7 MMA[0..13]
1
1
MA[0..13]
RP47 11 MA[0..13]
C457 C210 C211 C452 C462 C447 C446
SMECC0 9 8 MECC0 .1UF .1UF .01UF .01UF 1000PF 1000PF 1UF
MECC0 9
SMECC1 MECC1 MMD[0..63]
2
2
10 7 MECC1 9 9 MMD[0..63]
SMECC2 11 6 MECC2
MECC2 9
SMECC3 12 5 MECC3
MECC3 9
SMECC4 13 4 MECC4 MD[0..63]
MECC4 9 +3V 11 MD[0..63]
SMECC5 14 3 MECC5
MECC5 9
SMECC6 15 2 MECC6
MECC6 9
SMECC7 16 1 MECC7
MECC7 9
1
1
4
@16P8R-10 C207 C453 C213 C464 C442 C463 C451 4
.1UF .1UF .01UF .01UF 1000PF 1000PF 1000PF
2
RP47 change to be no load. 2/16 2
Placement near to 440ZXM Compal Electronics, inc.

Title
B 4C
A B C D E
A B C D E
RP28 2 1 2 +5VS
30 ACIN_SYS# VRCHGNG# 6
8P4R_10K 8,31 AD[0..31] AD[0..31] 3 R342 1K
MID0 25 SCI# FLASH#
1 8 1 +3VS FLASH# 26
+3VS MID1 SIRQ
PHDRST
SHDRST
2 7
ENDIM1
ENDIM2
FLASH#
PIRQC#
PIRQD#
PIRQA#
PIRQB#
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
SIRQ 14,15,27
GNTC#
REQC#
HDDPW#
SHDPW#
REQB#
REQA#
GNTA#
GNTB#
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
3 6 MID2 D24 RB425D
INHIB
SIRQ
MID0
MID1
MID2
MID3
PID0
PID1
PID2
PID3
4 5 MID3 +3V +3VS +3VS C413 1UF INHIB
INHIB 12
1 2 ENDIM1
ENDIM1 12
PIRQA# ENDIM2
14,15,23 PIRQA# ENDIM2 12
PIRQB# REQA#
14,15,23,31 PIRQB# REQA# 14
PIRQC# REQB#
W14
H18
U13
R16
N16
R15
B10
A10
K18
P19
Y15
V13
Y13
E11
P15
E16
E12
K10
K11
K12
REQB# 14
T14
T12
T19
F15
F14
14,17,23 PIRQC#
J17
J19
J16
J10
J11
J12
M1
G1
G3
G4
G5
G6
D9
C9
D8
D7
C7
D6
C4
D3
C3
C2
D1
C1
N2
N1
R3
R4
H1
H4
H5
R6
R7
B9
A9
E8
B8
A8
B7
A7
E6
E4
B4
A4
E3
B3
E2
B2
A2
E1
B1
P3
P2
P4
P5
K3
K4
E9
K5
K9
PIRQD# REQC#
F2
F3
F4
F6
T6
F5
U12
L2
L5
J3
J5
J9
14,31 PIRQD# REQC# 14
GNTA#
GNTA# 14
GNTB#
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
REQA#/GPI2
REQB#/GPI3
REQC#/GPI4
GNTA#/GPO9
GNTB#/GPO10
GNTC#/GPO11
APICCS#/GPO13
APICREQ#/GPI5
SERIRQ/GPI7
PIRQA#
PIRQB#
PIRQC#
PIRQD#
GPI1
GPI13
GPI14
GPI15
GPI16
GPI17
GPI18
GPI19
GPI20
GPI21
GPO0
GPO1/LA17
GPO2/LA18
GPO3/LA19
GPO4/LA20
GPO5/LA21
GPO6/LA22
GPO7/LA23
GPO8
GPO27
GPO28
GPO29
GPO30
VCCSUS1
VCCSUS2
VCC1
VCC2
VCC3
VCC4
VCC5
VCCP1
VCCP2
VCCP3
VCCP4
VCCP5
VCCP6
VCCP7
VCCP8
VCCP9
APICACK#/GPO12
GND
GND
GND
GND
GND
GND
GND
GND
VCCUSB
VSSUSB
VREF
GNTB# 14
GNTC#
GNTC# 14
1 PHDRST 1
PHDRST 21
SHDRST
* SHDRST 21
CLKRUN# C10 L9
DEVSEL# CLKRUN# GND
E5 DEVSEL# GND L10
FRAME# A5 L11
AD18 PIIX4_IDSEL FRAME# GND
1 2 A3 IDSEL GND L12
R141 100 IRDY# B5 M9
PAR IRDY# GND +3V
B6 M10
PCIRST#
C126 @47PF
PHLD#
PHLDA#
A1
B12
A12
PAR
PCIRST#
PHOLD# PC/PCI DMA
GPI/O PWR GND
GND
GND
M11
M12
D10
1
R169 100K
2 CONFIG1
1 2
8 PX4_REQ1#
8 PX4_REQ2#
SERR#
STOP#
TRDY#
A6
D5
C5
E10
A11
PHLDA#
SERR#
STOP#
TRDY#
PCIREQ1#
PCIREQ2#
PCI GND
GND
GND
NC
NC
NC
E7
E13
M5
R5
M16
B11 MASTER
23 GGREQ# PCIREQ3#
8 REQ#2 C11 PCIREQ4# BIOSCS# M2 BIOSCS# 25
RTCALE/GPO25 L1 GPO25
RTCCS#/GPO24 K2 GT_LO/HI# 6
V20 * K1
25 EXTSMI# EXTSMI# * KBCCS#/GPO26
10,25 SUSA# W20 SUSA# XOE#/GPO23 M4 SYS_VOL_UP# 17
V19 * M3
25 SUSB# SUSB#/GPO15 * XDIR#/GPO22 SYS_VOL_DW# 17
25 SUSC# U18 SUSC#/GPO16
T17 * * R17 CONFIG1
6 SUS_STAT# SUS_ST1#/GPO20 * * CONFIG1
T18 R18 CONFIG2
VLB# SUS_ST2#/GPO21 * CONFIG2
26 VLB# U19 BATLOW#/GPI9 PCS0# L4
PBTN# U20 * N5
LID# PWRBTN# * PCS1#
P16 N4
2
14 SMBALT#
14,26 PIIX4_RI#
SMBALT#
PIIX4_RI#
5,12 SDAP4
5,12 SCKP4
25 ATF_INT#
N17
P18
T20
R19
H19
LID/GPI10
SMBALERT#/GPI11
RI#/GPI12 *
SMBDATA*
SMBCLK
THRM#/GPI8
*
*
PM MISC *
MCCS#
CLK48
OSC
PCICLK
SUSCLK
L3 48M W=5mils
V11 14MOSC W=5mils
D11 CLK_PX
P17 W=5mils
W=5mils 14MOSC 10
PCLK_PIIX4 10
RTCCLK 15,16,23
48M 10
2
R1 R174 10K
6 CPU_STP# CPU_STP#/GPO17 *
10 PCI_STP# R2 PCI_STP#/GPO18 TEST# V18 1 2 +3V
K16 ZZ/GPO19 * SPKR K17 SPKR 19
8,29 RSMRST# M17 RSMRST# * N19 RTCX1
RTCX1
1
* R20 RTCX2
C/BE#0 RTCX2 R137
C8 C/BE0# VBAT L16 +RTCVCC
C/BE#1
C/BE#2
C/BE#3
C6
D4
D2
C/BE1#
C/BE2#
PCI *
PWROK M18
J1
SPWROFF# 29
10
C/BE3# OC0# OVCUR#0 28,33
12
OC1# J2 OVCUR#1 28,33
PIIX4_SLP# K20 F1 C124
6,14 PIIX4_SLP# SLP# USBP1+ USBP1+ 28
M19 CPURST USBP1- H2 USBP1- 28
L18 G2 15PF
6 PIIX4_INIT# INIT USBP0+ USBP0+ 28
2
K19 H3
3 FERR#
6 PIIX4_IGNNE#
6 PIIX4_INTR
6 PIIX4_NMI
6 PIIX4_SMI#
6 PIIX4_STPCLK#
L17
L19
L20
P20
J18
FERR#
IGNNE#
INTR
NMI
SMI#
STPCLK#
CPU USBP0-
PDIOR#
PDIOW#
PIORDY
PDDREQ
F17
F16
G20
F18
USBP0- 28
PDIOR# 22
PDIOW# 22
PIORDY 21,22
PDDREQ 21,22
25 RC# N20 RCIN# PDDACK# G19 PDDACK# 22
25 GATEA20 P1 A20GATE PDCS1# H17 PDCS1# 22
M20 A20M# PDCS3# H16 PDCS3# 22
6 PIIX4_A20M#
3 1K 27 TC 3
V10 TC SDIOR# C16 SDIOR# 22
1 R151 2 MEMCS16# Y12 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL B16
+5VS MEMCS16# SDIOW# SDIOW# 22
V15 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D D16
14,25 MEMR# MEMR# DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS SIORDY SIORDY 20,22
14,25 MEMW# U15 MEMW# SDDREQ A16 SDDREQ SDDREQ 20,22
W4 MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A17
SMEMR# SDDACK# SDDACK# 22
U3 SMEMW# SDCS1# B18 SDCS1# 22
T7 SYSCLK SDCS3# C18 SDCS3# 22
U10 G16
10 FSQ0
+5VS
+5VS
14 ZWS#
+5VS
1
1R315
1
2
R155 1K
2
REFRESH# W7
21K IOCS16#
SBHE#
Y1
V12
Y3
W12
BALE
IOCHK#/GPI0
REFRESH#
I0CS16#
ZEROWS#
SBHE#
ISA IDE PDA0
PDA1
PDA2
SDA0
SDA1
SDA2
G18
G17
C17
B17
A18
PDA0 22
PDA1 22
PDA2 22
SDA0 22
SDA1 22
SDA2 22
R153 1K W1 * J4
21,27 RSTDRV RSTDRV NC1 14MOSC CLK_PX
14,25,27 IOR# Y5 IOR# NC2 N18
T4 IOW# NC3 N3
14,25,27 IOW#
1
IRQ0/GPO14
T3 +3VS
IRQ8#/GPI6
14,25,27 IOCHRDY IOCHRDY R148 R330
25,27 AEN Y4 AEN
DACK0#
DACK1#
DACK2#
DACK3#
DACK5#
DACK6#
DACK7#
DREQ0
DREQ1
DREQ2
DREQ3
DREQ5
DREQ6
DREQ7
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15
SDDO
IRQ10
IRQ11
IRQ12
IRQ14
IRQ15
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
X1 10 10
SD10
SD11
SD12
SD13
SD14
SD15
SA10
SA11
SA12
SA13
SA14
SA15
SA16
SA17
SA18
SA19
IRQ1
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7
IRQ9
SD0
SD1
SD2
SD3
SD4
SD5
SD6
SD7
SD8
SD9
SA0
SA1
SA2
SA3
SA4
SA5
SA6
SA7
SA8
SA9
1
RTCX2 RTCX1 C399 C388
12
12
32.768KHZ
W11
W10
W16
W18
W19
W17
W15
W13
U11
U14
U16
U17
H20
U12
D18
D20
C20
C19
D19
D17
D14
C14
C13
C12
D12
D13
C15
D15
Y11
Y17
V17
Y18
Y19
Y10
V16
Y16
Y20
V14
Y14
E18
E20
B20
A20
A19
B19
E19
E17
E15
B15
A14
A13
B13
B14
E14
A15
T11
T10
T16
T15
T13
F20
F19
PIIX4M .1UF 1000PF C400
J20
1 2
W8
W5
W3
W2
W6
W9
U9
U7
U4
U2
U6
U5
U8
U1
V9
Y9
V7
Y7
V6
Y6
V4
V3
Y2
V1
V5
V2
V8
Y8
T8
T5
T2
T1
T9
C136
2
1
R172 22M 15PF

C165 C164 15PF
2
DRQ0
DRQ1
DRQ2
DRQ3
DRQ5
DRQ6
DRQ7
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15
SA0
SA1
SA2
SA3
SA4
SA5
SA6
SA7
SA8
SA9
SA10
SA11
SA12
SA13
SA14
SA15
SA16
SA17
SA18
SD0
SD1
SD2
SD3
SD4
SD5
SD6
SD7
SD8
SD9
SD10
SD11
SD12
SD13
SD14
SD15
DACK#0
DACK#1
DACK#2
DACK#3
IRQ0
IRQ1
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7
IRQ8#
IRQ9
IRQ10
IRQ11
IRQ12
IRQ14
IRQ15
12PF 12PF +3V R177 @100K

2
4 1 2 4
CONFIG2
D10 1 2
2 1
@RB751V EC_LID_SW# 26 Load R167 by Peter Liu 3/30 1 2 +3V
+3V 1 2 VLB# PID[0..3]
PID[0..3] 23
R176 100K
D22 R167 1K CLKRUN#
CLKRUN# 8,14,23,27,31
LID# 2 1LIDSW# R173 10K C/BE#[0..3] DEVSEL#
14 LID#
D9
RB751V LID_SW# 25,26,32 STOP#
TRDY#
STOP# 8,14,31
8,31 C/BE#[0..3]
14,22,25 IRQ[0..15]
IRQ[0..15]
SDD[0..15]
IRQ8# 25
FRAME#
IRDY#
DEVSEL# 8,14,31
FRAME# 8,14,31
Title
TRDY# 8,14,31 22 SDD[0..15] IRDY# 8,14,31
PBTN# PCIRST# PDD[0..15] PAR
14 PBTN# 2 1
RB751V
ON/OFF 25,29,32 PCIRST# 7,16,31 22 PDD[0..15] DACK#[0..3] PCIRST#
PAR 8,14,31 SCHEMATIC, M/B LA-733
27 DACK#[0..3] PCIRST# 7,16,31
D50 DRQ[0..7] PHLD# Size Document Number Rev
14,27 DRQ[0..7] PHLD# 8,14
Add by Charles at 4/20 SA[0..19] PHLDA# B 4C
2 1
@RB751V
ON/OFF_EC# 25,29,32 25,27 SA[0..18] SD[0..15] SERR#
PHLDA# 8,14 401138
that reserved for S/W 14,25,27 SD[0..15] SERR# 8,14,31
A B C D E
A B C D E
+3VS FOR PIIX4 +3VS
1
C398 C407 C390 C392 C402 C405 C395 C394
.1UF .1UF .1UF .1UF .1UF .01UF .01UF .01UF
2
1
ISA BUS Pull-up PCI BUS Pull-up 1
+3VS +3VS +3V
SD[0..15]
13,25,27 SD[0..15]
1
C411 C397
SA[0..19] C396 C408 C406 C409
13,25,27 SA[0..19] .1UF .1UF .1UF 1000PF .01UF .01UF
2
+5VS
RP9
RP11
5 4 PERR# 1 10 +3VS
IOW# 13,25 31 PERR#
6 3 PHLDA# 2 9 PIRQ#A
MEMR# 13,25 8,13 PHLDA# PIRQA# 13,15,23
7 2 STOP# 3 8 PIRQ#B
MEMW#13,25,27 8,13,31 STOP# PIRQB# 13,15,23,31
8 1 SERR# 4 7 PHLD#
IOR# 13,25,27 8,13,31 SERR# CLKRUN# PHLD# 8,13
5 6
8P4R_4.7K +3VS CLKRUN# 8,13,23,27,31
10P8R_10K
1 R312 2 IRQ5 13 NOTE: +3V 8.2K
10K +3VS RP29
RP31
5 4 1 8
IRQ11 13 PIRQC# 13,17,23
6 3 IRQ12 13,25 2 7 PIRQD# 13,31
7 2 3 6
2 IRQ14 13,22 PAR 8,13,31 2
8 1 IRQ15 13,22 4 5 PLOCK# 8
8P4R_10K 8P4R_10K
+5VS +3VS
R140 1K 1 2
SIRQ 13,15,27
1 2 ZWS# ZWS# 13
R307 1K R171 10K
1 2 IOCHRDY IOCHRDY 13,25,27
+3VS
RP10
1 8 IRDY#
DEVSEL# IRDY# 8,13,31
2 7
TRDY# DEVSEL# 8,13,31
3 6 TRDY# 8,13,31
4 5 FRAME#
RP30 FRAME# 8,13,31
13 IRQ0 1 10 8P4R_10K
+5VS
2 9
13,25 IRQ1 IRQ4 13
13 IRQ10 3 8 IRQ6 13
4 7 +3V
13 IRQ3 IRQ7 13 RP39
+5VS 5 6
IRQ9 13
5 4 PBTN# PBTN# 13
6 3 LID# 13
10P8R_10K 7 2 SMBALT# SMBALT# 13
8 1 PIIX4_RI#
PIIX4_RI# 13,26
RP8
3 SD4 8P4R_4.7K 3
6 5 +5VS
SD7 7 4 SD5
SD2 8 3 SD0 +3VS
SD3 9 2 SD1
+5VS 10 1 SD6 R133 10K
1 2
R134 10K GNTA# 13
10P8R_4.7K 1 2
R302 10K GNTB# 13
RP13
1 2 GNTC# 13
SD9 6 5 +5VS
SD10 7 4 SD11
SD8 8 3 SD12 +3VS
SD15 9 2 SD13
10 1 SD14
+5VS RP7
1 8 REQA#
REQA# 13
2 7 REQB#
REQB# 13
10P8R_4.7K 3 6 REQC#
REQC# 13
4 5 PIIX4_SLP#
PIIX4_SLP# 6,13
8P4R_10K
RP35
10 1 DRQ1 13,27
DRQ7 9 2
13 DRQ7 DRQ6 DRQ3 13,27
13 DRQ6 8 3 DRQ2 13,27
DRQ5 7 4
13 DRQ5
DRQ0 6 5
13,27 DRQ0
4 4
10P8R_4.7K

Title
B 4C
A B C D E
13,16,23 RTCCLK SLATCH 16
16 S1_D[0..15]
16 S1_A[0..25]
16 S2_D[0..15]
S1_D[0..15]
S1_A[0..25]
S2_D[0..15]
16 SLDATA
16,23 DEV_RST#
8 GNT#3
8 REQ#3
CBRST#
1 2
1R458 10 2 Add by Charles at 3/27
+3V
PCM_SPK# 19

CARDBUS
S2_A[0..25] 17,31 S_C/BE#3 R459 10 Q7
16 S2_A[0..25]
3
S
S_AD[0..31] 17,31 S_C/BE#2 2N7002
17,31 S_AD[0..31]
17,31 S_C/BE#[0..3]
S_C/BE#[0..3] 17,31 S_C/BE#1
17,31 S_C/BE#0
10 PCLK_PCM
D
G
2 SYSON_ALW 30
+3VALW
PCI1420
1
1
1
17,31 S_FRAME# C43 C271
R244 C77 .1UF +3VALW +3V_PCMCIA +3VALW
R55 17,31 S_DEVSEL#
.1UF .1UF 1 2
17,31 S_PCIRST# 33 R72
2
+12VS 1 2
17,31 S_TRDY#
1
W=40mils 1 0_0805 2 C72
17,31 S_IRDY# S2_VCC
1
G
2N7002 C270 C42 C40 C48 C321
S2_VCC_R
12
100K Q9 17,31 S_STOP# W=40mils 1
31 S_PERR# +3V_PCMCIA +3VALW S1_VCC_R 2 S1_VCC .1UF
C74 R71 .1UF .1UF .1UF .1UF
2
31 S_SERR# 3 1
10PF 0_0805
2
1 2
17,31 S_PAR
2
.1UF
202
200
199
198
195
196
166
197
193
180
203
192
162
169
168
175
152
151
150
149
148
178
113
143
164
187
201
120
U28 +3VALW +3VALW
31
64
86
38
5
7
C/BE0#
C/BE1#
C/BE2#
C/BE3#
SERR#
PERR#
STOP#
IRDY#
TRDY#
RSTIN#
DEVSEL#
FRAME#
GNT#
G_RST#
SPKOUT#
REQ#
PAR
LATCH
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
PCLK
DATA
CLOCK
VCCI
VCCP
VCCP
VCCB
VCCA
1
S2_D0 76 141 S1_D0 C322 C41 C53 C80
S2_D1 B_D0/CAD27 A_D0/CAD27 S1_D1
78 B_D1/CAD29 A_D1/CAD29 144
S2_D2 80 146 S1_D2 1000PF 1000PF 1000PF 1000PF
S2_D3 B_D2/RSVD A_D2/RSVD S1_D3
2
17 B_D3/CAD0 A_D3/CAD0 83
S2_D4 19 85 S1_D4
S2_D5 21
B_D4/CAD1
B_D5/CAD3
Power A_D4/CAD1
A_D5/CAD3 88 S1_D5
S2_D6 24 90 S1_D6
26 B_D7/CAD7 A_D7/CAD7 92
S2_D8 77 142 S1_D8
79 B_D9/CAD30 A_D9/CAD30 145
S2_D10 81 147 S1_D10
S2_D11 B_D10/CAD31 A_D10/CAD31 S1_D11
18 B_D11/CAD2 A_D11/CAD2 84
S2_D12 20 87 S1_D12
23 B_D13/CAD6 A_D13/CAD6 89
S2_D14 25 91 S1_D14
S2_D15 B_D14/RSVD A_D14/RSVD S1_D15
27 B_D15/CAD8 A_D15/CAD8 93
S2_A0 67 B_A0/CAD26
PCI A_A0/CAD26 133 S1_A0
S2_A1 66 132 S1_A1
S2_A2 B_A1/CAD25 A_A1/CAD25 S1_A2
65 B_A2/CAD24 A_A2/CAD24 131
S2_A3 62 128 S1_A3
60 126
S2_A5 59
B_A4/CAD22
B_A5/CAD21
Interface A_A4/CAD22
A_A5/CAD21 125 S1_A5
S2_A6 57 123 S1_A6
54 B_A7/CAD18 A_A7/CAD18 119
S2_A8 39 104 S1_A8
S2_A9 B_A8/CC/BE1# A_A8/CC/BE1# S1_A9
36 B_A9/CAD14 A_A9/CAD14 102
S2_A10 29 95 S1_A10
S2_A11 34
B_A10/CAD9 Slot A_A10/CAD9
100 S1_A11
S2_A12 52
B_A11/CAD12
B_A12/CC/BE2#
Slot A_A11/CAD12
A_A12/CC/BE2# 117 S1_A12
S2_A13 41 106 S1_A13
S2_A14 B_A13/CPAR A_A13/CPAR S1_A14
43 B_A14/CPERR# A_A14/CPERR# 108
R280 S2_A15 S1_A15 R281
50 115
S2_A16 1 2 SB_A16 48
B_A15/CIRDY#
B_A16/CCLK
B A A_A15/CIRDY#
A_A16/CCLK 112 SA_A16 1 2 S1_A16
S2_A17 37 103 S1_A17
47 S2_A18 B_A17/CAD16 A_A17/CAD16 S1_A18 47
40 B_A18/RSVD A_A18/RSVD 105
Placement near S2_A19 42 107 S1_A19 Placement near
S2_A20 B_A19/CBLOCK# A_A19/CBLOCK# S1_A20
to PCMCIA 45 B_A20/CSTOP# A_A20/CSTOP# 109 to PCMCIA
S2_A21 47 111 S1_A21
controller S2_A22 B_A21/CDEVSEL# A_A21/CDEVSEL# S1_A22 controller
49 B_A22/CTRDY# A_A22/TRDY# 114
S2_A23 51 116 S1_A23
S2_A24 B_A23/CFRAME# A_A23/CFRAME# S1_A24
53 B_A24/CAD17 A_A24/CAD17 118
S2_A25 55 121 S1_A25
B_A25/CAD19 A_A25/CAD19 R78 22K
S2_BVD1 72 138 S1_BVD1 S1_A23 1 2
16 S2_BVD1 B_BVD1/CSTSCHG A_BVD1/CSTSCHG S1_BVD1 16 S1_VCC
S2_BVD2 71 137 S1_BVD2
16 S2_BVD2 B_BVD2/CAUDIO A_BVD2/CAUDIO S1_BVD2 16
S2_CD1# 16 82 S1_CD1#
16 S2_CD1# B_CD1#/CCD1# A_CD1#/CCD1# S1_CD1# 16
S2_CD2# 74 140 S1_CD2# S1_WP 1 2
16 S2_CD2# B_CD2#/CCD2# A_CD2#/CCD2# S1_CD2# 16 S1_VCC
S2_RDY# 69 135 S1_RDY#
16 S2_RDY# S2_WAIT# B_READY/CINT# A_READY/CINT# S1_WAIT# S1_RDY# 16 R62 22K
16 S2_WAIT# 70 B_WAIT#/CSERR# A_WAIT#/CSERR# 136 S1_WAIT# 16
S2_WP 73 139 S1_WP
16 S2_WP B_WP/CCLKRUN# A_WP/CCLKRUN# S1_WP 16
S2_INPACK# 61 127 S1_INPACK#
16 S2_INPACK# B_INPACK/CREQ# A_INPACK/CREQ# S1_INPACK# 16
16 S2_CE1# 28 B_CE1#/CC/BE0# A_CE1#/CC/BE0# 94 S1_CE1# 16

16 S2_CE2# 30 B_CE2#/CAD10 A_CE2#/CAD10 97 S1_CE2# 16
16 S2_WE# 46 B_WE#/CGNT# A_WE#/CGNT# 110 S1_WE# 16
16 S2_IORD# 33 99 S1_IORD# 16
16 S2_IOWR# 35
B_IORD#/CAD13
B_IOWR#/CAD15
IRQ/DMA A_IORD#/CAD13
A_IOWR#/CAD15 101 S1_IOWR# 16
+3V
1
16 S2_OE# 32 B_OE#/CAD11 A_OE#/CAD11 98 S1_OE# 16
S2_VS1 68 134 S1_VS1 R50 R49
16 S2_VS1 B_VS1#/CVS1 A_VS1#/CVS1 S1_VS1 16
S2_VS2 56 122 S1_VS2 22K 22K
16 S2_VS2
DMAREQ#/MFUNC2
B_VS2#/CVS2 A_VS2#/CVS2
DMAGNT#/MFUNC5
S1_VS2 16
CLKRUN#/MFUNC6
63 130 S1_REG# 16
IRQSER/MFUNC3
16 S2_REG# S2_RST B_REG#/CC/BE3# A_REG#/CC/BE3# S1_RST D16
LOCK#/MFUNC4
58 124 S1_RST 16
INTA#/MFUNC0
INTB#/MFUNC1
16 S2_RST B_RESET/CRST# A_RESET/CRST# PCM_INTA#
RIOUT#/PME#
2
1 2
PIRQA# 13,14,23
SUSPEND#
GND RB751V
IDSEL
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
D15
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
PCM_INTB# 1 2
PIRQB# 13,14,23,31
PCI1420
172
208
206
205
204
191
190
189
188
186
185
184
183
179
165
177
176
174
173
171
170
182
154
155
156
157
158
159
160
161
163
129
153
167
181
194
207
@RB751V
15
14
12
11
10
13
22
44
75
96
9
8
6
4
3
2
PCM_INTA#
PCM_INTB#
S_AD12
S_AD14
S_AD17
S_AD19
S_AD22
S_AD24
S_AD27
S_AD29
S_AD10
S_AD11
S_AD13
S_AD15
S_AD16
S_AD18
S_AD20
S_AD21
S_AD23
S_AD25
S_AD26
S_AD28
S_AD30
S_AD31
1
S_AD2
S_AD4
S_AD7
S_AD9
S_AD0
S_AD1
S_AD3
S_AD5
S_AD6
S_AD8
S_PME# 17,31
R47
S_CLKRUN# 31
R84 22K
S2_WP 1 2 100
S2_VCC PCM_RI# R48 22K
PCM_RI# 28
S_AD15
S2_A23
2
1 2 S2_VCC 1 2 SIRQ 13,14,27 1 2 +3V

R460 10
R83 22K Add by Charles at 3/27 2 1 Title
PCM_SUSP# 25
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL D14 RB751V SCHEMATIC, M/B LA-733
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 4C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE 401138
A B C D E
PCMCIA POWER CTRL.

CARDBUS SOCKET +12VALW
S1_VPP S1_VPP
1 1
S1_D[0..15] +5VALW U29 S1_VCC
15 S1_D[0..15]
S1_A[0..25]
15 S1_A[0..25]
1
S2_D[0..15] 25 8
15 S2_D[0..15] S2_A[0..25] +3VALW NC AVPP C336
JP4 AVCC 9
15 S2_A[0..25] 7 10 4.7UF_10V_0805
C83 1UF_25V_0805 12V AVCC
2
24 12V AVCC 11
A77 B77
a68 b68 C307 .1UF S2_VPP
A76 a34 b34 B76 1 5V BVPP 23 S2_VPP
S1_CD2# A75 B75 S2_CD2# 2 20
15 S1_CD2# S1_WP a67 b67 S2_WP S2_CD2# 15 C330 .1UF 5V BVCC
15 S1_WP A74 a33 b33 B74 S2_WP 15 30 5V BVCC 21 S2_VCC
A73 GND GND B73 BVCC 22
1
S1_D10 S2_D10 C320 .1UF TPAD1
A72 a66 b66 B72 15 3.3V
S1_D2 A71 B71 S2_D2 16 6 TP C295
S1_D9 a32 b32 S2_D9 C301 .1UF 3.3V RESET 4.7UF_10V_0805
A70 a65 b65 B70 17 3.3V RESET# 14
S1_D1 S2_D1
2
A69 a31 b31 B69
S1_D8 A68 B68 S2_D8 C323 .1UF 3 26
S1_D0 a64 b64 S2_D0 15 SLDATA DATA NC DEV_RST#
A67 B67 5 27
S1_BVD1 a30 b30 S2_BVD1 C296 .1UF 15 SLATCH LATCH NC
A66 a63 b63 B66 4 CLOCK NC 28
15 S1_BVD1 S2_BVD1 15 13,15,23 RTCCLK
A65 GND GND B65 MODE 29
S1_A0 A64 B64 S2_A0 13
S1_BVD2 a29 b29 S2_BVD2 NC
A63 a62 b62 B63 19 STBY#
15 S1_BVD2 S1_A1 S2_A1 S2_BVD2 15
A62 a28 b28 B62 +3VALW 18 OC# GND 12
S1_REG# A61 B61 S2_REG# S2_REG# 15 R270 @100K
15 S1_REG# S1_A2 a61 b61 S2_A2
A60 a27 b27 B60
S1_INPACK# A59 B59 S2_INPACK# TPS2216AI
15 S1_INPACK# S1_A3 a60 b60 S2_A3 S2_INPACK# 15
A58 a26 b26 B58
A57 GND GND B57
S1_WAIT# A56 B56 S2_WAIT#
2 15 S1_WAIT# S1_A4 a59 b59 S2_A4 S2_WAIT# 15 2
A55 a25 b25 B55
S1_RST A54 B54 S2_RST
15 S1_RST S1_A5 a58 b58 S2_A5 S2_RST 15
A53 a24 b24 B53
S1_VS2 A52 B52 S2_VS2
15 S1_VS2 S1_A6 a57 b57 S2_A6 S2_VS2 15
A51 a23 b23 B51
S1_A25 A50 B50 S2_A25
a56 b56
A49 GND GND B49
S1_A7 A48 B48 S2_A7
S1_A24 a22 b22 S2_A24
A47 a55 b55 B47 S1_VCC
S1_A12 A46 B46 S2_A12
a21 b21
1
S1_A23 A45 B45 S2_A23
S1_A15 a54 b54 S2_A15 C337 C352 C355
A44 a20 b20 B44
S1_A22 A43 B43 S2_A22 .1UF .01UF 4.7UF_10V_0805 +3VALW
a53 b53
2
A42 GND GND B42
1
S1_A16 A41 B41 S2_A16
a19 b19 C71
S1_VPP A40 a52 b52 B40 S2_VPP .1UF PCMRST# 25
A39 a18 b18 B39
2
S1_VCC A38 a51 b51 B38
S2_VCC
1
A37 a17 b17 B37 14
S1_A21 A36 B36 S2_A21 S2_VCC
S1_RDY# a50 b50 S2_RDY# DEV_RST#
15 S1_RDY# A35 a16 b16 B35 S2_RDY# 15 7,13,31 PCIRST# 2 3 DEV_RST# 15,23
1
S1_A20 A34 B34 S2_A20
S1_WE# a49 b49 S2_WE# C340 C294 C347 U5A R51
A33 a15 b15 B33 7 10K
15 S1_WE# S1_A19 S2_A19 S2_WE# 15 .1UF .01UF 4.7UF_10V_0805 +3VALW POWER 74LVC125
A32 a48 b48 B32 +3VALW
S1_A14 S2_A14
2
A31 a14 b14 B31
S1_A18 A30 B30 S2_A18
S1_A13 a47 b47 S2_A13
A29 a13 b13 B29
A28 GND GND B28
S1_A17 A27 B27 S2_A17
3 S1_A8 a46 b46 S2_A8 3
A26 a12 b12 B26 S1_VPP
S1_IOWR# A25 B25 S2_IOWR#
15 S1_IOWR# a45 b45 S2_IOWR# 15
1
S1_A9 A24 B24 S2_A9
S1_IORD# a11 b11 S2_IORD# C335 C356
A23 a44 b44 B23
15 S1_IORD# S2_IORD# 15 .01UF 4.7UF_25V_1206
A22 GND GND B22
S1_A11 S2_A11
2
A21 a10 b10 B21
S1_VS1 A20 B20 S2_VS1
15 S1_VS1 a43 b43 S2_VS1 15
S1_OE# A19 B19 S2_OE#
15 S1_OE# S1_CE2# a9 b9 S2_CE2# S2_OE# 15
A18 a42 b42 B18
15 S1_CE2# S1_A10 S2_A10 S2_CE2# 15
A17 a8 b8 B17
C351
A16 GND GND B16 S2_VPP
S1_D15 A15 B15 S2_D15 S1_CD1# 1 2
a41 b41
1
S1_CE1# A14 B14 S2_CE1# 1000PF
15 S1_CE1# S1_D14 a7 b7 S2_D14 S2_CE1# 15 C293 C348
A13 a40 b40 B13
S1_D7 S2_D7 C353 .01UF 4.7UF_25V_1206
A12 a6 b6 B12
S1_D13 S2_D13 S1_CD2# 1
2
A11 a39 b39 B11 2
S1_D6 A10 B10 S2_D6 1000PF
a5 b5
A9 B9 C346
S1_D12 GND GND S2_D12 S2_CD1# 1
A8 a38 b38 B8 2
S1_D5 A7 B7 S2_D5 1000PF
S1_D11 a4 b4 S2_D11
A6 a37 b37 B6
S1_D4 S2_D4 C345
A5 a3 b3 B5
S1_CD1# A4 B4 S2_CD1# S2_CD1# 15 S2_CD2# 1 2
15 S1_CD1# S1_D3 a36 b36 S2_D3
A3 a2 b2 B3
A2 B2 1000PF
a35 b35
A1 a1 b1 B1
78
79
80
81
PCMC154PIN
78
79
80
81
4 4

Title
B 4C
A B C D E
A B C D E
Reserved
by Charles +5VALW AVDD
at 6/25 +3VS
1 2
L16
1
1
1
C39 @HB1M2012-601JT +5VAU
1
C32 C263 C269 C261 C35 C268 C262 C265 C264 C266 C258 L18
+ 4.7UF_10V_0805 .1UF .01UF .1UF
C257 C259
.01UF 2 1 +12VALW
4.7UF_10V_0805 +5VALW C267
2
.1UF .1UF .1UF .1UF .01UF .01UF .01UF 4.7UF_10V_0805
1
HB-1M2012-121JT +5VALW
2
2
1 2
Place component's to Es1988 R242 .1UF
2.4K
8
1 U24A 1
1 Q28
2
1 2 3 +
1 2
3
R245 1 2 - 3 SI2306DS
1
D13 100K 2 LM358
EN_CDPLAY# 20
1
S_AD[0..31] AS2431L 2 C272 3
15,31 S_AD[0..31]
S_C/BE#[0..3] .1UF Q2 R257 Add
4
15,31 S_C/BE#[0..3]
1
2N7002 5.1K
2
discharge
1
Delete for D3 CKT at
C275 R481
cold 33
2
2 1 6/27 by
68PF Charles
2
2
Add by R251 1
Charles R240 Add by 1 2 1 2 1 2 2
Charles 3
at 3/1 @4.7K R54 R258 5.11K_0.5% Q66
C225 10PF 19 MUTE
at 1/4 442_1% 5.11K_0.5% 2N7002
MD_SDATAI 31
1
NPO R259 C276
1
31 MD_SYNC MD_RST# 31
R26 31 MD_BITCLK 2 1 1 2 2 1
Y4 Y3 1M R423 22 +5VAMP
31 MD_SDATAO
1
49.152 MHz @49.152 MHz +3VS 0 220PF
26 AUTO_GAIN_CONTROL R40 Change by Charles C273
13 SYS_VOL_UP# .1UF
2
2 1 2 1 at 2/16
C226 33PF R220 0 13 SYS_VOL_DW#
2
1
NPO 10K U3
L12 Add by Charles at +12VS
46
45
44
43
42
49
48
47
63
62
61
60
56
53
52
51
50
59
85
84
39
ES1988 AVDD_AC97 R46
LK1608-1R0K 1 Q3
12/1 1 2 2
GD3 / ECLK / VOLDN#

GD2 / EDIN / VOLUP#
GPIO12 / PCGNT# / GTO# / GS0

GD4
GD0
GPIO15 / GD7
GPIO14 / GD6
GPIO13 / GD5
GPIO10 / SCLK2
GPIO9 / SDFS2
GPIO8 / SDI2
GPIO7 / MC97_DI / PCREQ# / VOLUP#
GPIO5 / ISLR / GS0 / GT0#

GPIO6 / ISDATA / R0#
GPIO4 / ISCLK / SIRQ#

GPIO3 / SRESET2
GPIO11 / SDO2 / VauxD
GPIO2 / TXD
GPIO1 / RXD
CLKRUN# / ECS
GD1 / EDOUT
2 57 OSCI VCC 90 3 SI2304DS 2
100K
2
58 OSCO VCC 41
C221 1500PF 12
NPO VCC
AVDD
64 PC_BEEP
19 MONO_IN
2 1 AVDD1 72
R14 6.8K2 1 1 2 65 83
31 MOD_SPK R15 6.8K C12 1UF PHONE AVDD2
31 MOD_MIC 1 2 81 MONO_OUT
C255 1UF
2 R17 1 1 2 69 74
MIC VREF AUD_VREF
Change by 0 19 MICIN C16 1UF
2 R2 1 CD_GNA 1 2 67 Add by Charles at 3/27
Charles at 20,21 CD_AGND
0 CD_L_R C14 1UF CD_GND
1 2 66 CD_L REQ# 92 2 1 REQ#4 8
2/16 CD_R_R C13 1UF 1 2 68 91 2R455 10 1
CD_R GNT# GNT#4 8
C15 1UF R456 10
2 R19 1 1 2 70 88 PCLK_AUD
33 DOCK_LIN_L LINE_IN_L PCICLK PCLK_AUD 10
2 R20 1 6.8K C17 1UF 1 2 71
33 DOCK_LIN_R LINE_IN_R
6.8K 2 R4 1 C18 1UF 87 2 1
INT# PIRQC# 13,14,23
2 R5 1 6.8K
18,20 LEFT_EQ 1 2 79 LINE_OUT_L RST# 86 R457 10
S_PCIRST# 15,31
6.8K C31 1UF AVDD_AC97
80 LINE_OUT_R L15
18,20 RIGHT_EQ 1 2 C/BE3# 1 S_C/BE#3 15,31
C34 1UF 13 1 2
C/BE2# S_C/BE#2 15,31 AVDD
75 AFILT1 C/BE1# 20 S_C/BE#1 15,31
76 30 HB1M2012-121JT
AFILT2 C/BE0# S_C/BE#0 15,31
77 VCM
78 VREFADC PME# / SPDIFO / VOLDN# 54 S_PME# 15,31
SPDIFO / R0# / IDSEL 2 2 R243 1 S_AD19
1
C232 C242 C25 C28 19 100 C251
PAR S_PAR 15,31
73 18 C231
3 AVSS1 STOP# S_STOP# 15,31 3
1000PF 1000PF .1UF .1UF 82 17 .1UF 4.7UF_10V_0805
AVSS2 DEVSEL# S_DEVSEL# 15,31
AGND
2
89 GND TRDY# 16 S_TRDY# 15,31
C238 C245 40 15
GND IRDY# S_IRDY# 15,31
10UF_10V_1206 10UF_10V_1206 21 14
GND FRAME# S_FRAME# 15,31
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
3 55
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
GND AD9 VAUX +3VALW
100
38
37
36
35
34
33
32
31
29
28
27
26
25
24
23
22
11
10
99
98
97
96
95
94
93
9
8
7
6
5
4
Place closely to Es1988
PCLK_AUD
S_AD10
S_AD11
S_AD12
S_AD13
S_AD14
S_AD15
S_AD16
S_AD17
S_AD18
S_AD19
S_AD20
S_AD21
S_AD22
S_AD23
S_AD24
S_AD25
S_AD26
S_AD27
S_AD28
S_AD29
S_AD30
S_AD31
+3VALW AUD_VREF
S_AD0
S_AD1
S_AD2
S_AD3
S_AD4
S_AD5
S_AD6
S_AD7
S_AD8
S_AD9
R16 R1
1
@24K 0
2 1 R44 Change
1
2 1 CD_L_R
20 CDROM_L 10
value by
2 1 Charles C244 C243 C11 C5
CD_R_R 1UF .1UF 1UF .1UF
12
2
20 CDROM_R 2 1 at 2/10
C38
R18 R3 Change by
@24K 0 Charles at 15PF
2
2/25
4 4
2 1
L17
0_0805
1 2
L13
0_0805
1 2
Title
L3 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
0_0805 AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 4C
A B C D E
A B C D E
Change power
source by
Charles at
2/2
L1
+5VEQL 1 2
HB1M2012-601JT +5VAMP EQ_L_INPUT1 EQ_L_INPUT2 EQ_L_INPUT3
Add by
2
Charles
2
C23 C26 C21 R28 C6 R24 C1 R13
1
at 3/22 1
.1UF 4.7UF_10V_0805 1500PF 560K_1% 470PF 220K_1% 330PF 200K_1%
1
C517 R30 C22 R21 C9 R6 C4
1
LEFT_EQ L_EQ 1 2 1 2 OUT1_L L_EQ 1 2 1 2 OUT2_L L_EQ 1 2 1 2 OUT3_L
U1 17,20 LEFT_EQ
2
140K_1% 220K_1% 200K_1%
EQ_L_INPUT1 3 1 OUT1_L 1UF
5V
IN1 OUT1
2
1500PF 536HZ 470PF 2230HZ 330PF 3410HZ
+5VEQL EQ_L_INPUT2 5 4 OUT2_L R31 R27 R213
IN2 OUT2 140K_1% +6dB 200K_1% -6dB 200K_1% -6dB
EQ_L_INPUT3 7 6 OUT3_L Q=1.41 Q=0.72 Q=0.707
IN3 OUT3
2
EQ_L_INPUT4 OUT4_L
1
10 IN4 OUT4 11
R8
EQ_L_INPUT5 12 13 OUT5_L
22K IN5 OUT5 R42 EQ_L_INPUT4 EQ_L_INPUT5
14 15 LEFT_EQ 1 2 LEFT
IN6 OUT6 LEFT 19
2
@0
1
2
8 GND 9 EQ_IN_L C2 R11 C7 R25
REF SUM_OUT
Add by 300K_1% 300K_1%
14 82PF 220PF
Charles at
2
1
1 2
16
R7 C543 C19 LMV801 R10 C3 R22 C10

4/19
1
7
L_EQ 1 2 1 2 OUT4_L L_EQ 1 2 1 2 OUT5_L
13
22K .01UF 1UF U49A 75K_1% 127K_1%
Change power HPS_PLUG 74HCT4066
2
82PF 220PF
1
source by 18299HZ 7646HZ

Charles at 14 R218 R227
11 10 75K_1% +6dB 39K_1% +1.45dB
2/2
2 7 Q=1.41 Q=1.59 2
L2
12
Add by Charles +5VEQR U49B
1
1 2
HB1M2012-601JT +5VAMP HPS_DIS 74HCT4066
at 5/20
R464
C24 C27 EQ_IN_L 1 2
@0
.1UF 4.7UF_10V_0805
Add by EQ_R_INPUT1 EQ_R_INPUT2 EQ_R_INPUT3
Charles
2
U21
2
2
at 3/22 C235 R233 C228 R226 C222 R217
EQ_R_INPUT1 3 1 OUT1_R
5V
IN1 OUT1 1500PF 560K_1% 470PF 220K_1% 330PF 200K_1%

+5VEQR EQ_R_INPUT2 OUT2_R
1
5 IN2 OUT2 4
C518 R230 C237 R222 C230 R9 C223
1
EQ_R_INPUT3 7 6 OUT3_R RIGHT_EQ R_EQ 1 2 1 2 OUT1_R R_EQ 1 2 1 2 OUT2_R R_EQ 1 2 1 2 OUT3_R
IN3 OUT3 17,20 RIGHT_EQ
140K_1% 220K_1% 200K_1%
2
EQ_R_INPUT4 10 11 OUT4_R 1UF

IN4 OUT4
2
R215 1500PF 536HZ 470PF 2230HZ 330PF 3410HZ
EQ_R_INPUT5 12 13 OUT5_R R231 R223 R12
22K IN5 OUT5 140K_1% +6dB 200K_1% -6dB 200K_1% -6dB
14 IN6 OUT6 15 Q=1.41 Q=0.72 Q=0.707
1
EQ_IN_R
1
8 9
GND
REF SUM_OUT
2
16
3 R216 C544 C236 LMV801 R241 EQ_R_INPUT4 EQ_R_INPUT5 3

RIGHT_EQ 1 2 RIGHT RIGHT 19
2
22K .01UF 1UF @0
2
C224 R221 C229 R229
+5VCD
1
+5VCD C527 82PF 300K_1% 220PF 300K_1%
1
R219 C227 R225 C234
1
1
+5VCD R_EQ OUT4_R R_EQ OUT5_R

.1UF 14 1 2 1 2 1 2 1 2
Add by Charles R465 4 3 75K_1% 127K_1%
10K 7
at 5/20
1
2
U49C 82PF 18299HZ 220PF 7646HZ
R466 74HCT4066 R214 R232
5
10K HPS_PLUG 75K_1% +6dB 39K_1% +1.45dB

2
Q=1.41 Q=1.59
1 14
2
1
2 8 9
3 Q54 7
1 2N7002 U49D
74HCT4066
6
19 HPS 2
3
Q55 HPS_DIS
2N7002 R467
EQ_IN_R 1 2
Add by Charles at 4/19 @0 Change value by Charles at 5/26
4 4
Title
B 4C
A B C D E
A B C D
Add by Charles at
5/20 for PO-PO Q61 AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
sound 2N7002 3 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
26 EC_MUTE 2 USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
+5VAMPP 1 2 1
+5VAMP
L14
HB1M2012-601JT
C256 R480
C260 C29 + 4.7UF_10V_0805+ 1 2
.1UF .1UF U2 C247 +12VALW
13
18
3
8
2
4.7UF_10V_0805 100K
VDD1
VDD2
VDD3
VDD4
1 INTSPK_R+ 1 3 1
SPKR+ 32
R34 LINEOUTR
+
LINEOUT_R 32,33
0 12 Q62 C253 150UF_TPB_6.3V
ROUT+
2
RIGHT 2 1 1 2 17 Q63 SI2304DS
18 RIGHT RLINEIN
C30 2.2UF_16V_0805 SI2304DS
19 INTSPK_R- 1 3
ROUT- SPKR- 32
R39
0 INTSPK_L+ 1 3 SPKL+ 32
LEFT Q64 LINEOUTL
+
18 LEFT 2 1 1 2 15 LLINEIN LOUT+ 2 LINEOUT_L 32,33
C36 2.2UF_16V_0805 SI2304DS C254 150UF_TPB_6.3V
1
+5VALW
+5VAMP INTSPL_L- 1
2
LOUT- 9 3 SPKL- 32
R35 R37 Q65
1
Control by @10K @10K SI2304DS
1
+5VALW Add by
headphone DIS_ADJVOL 26
R238
2
out 820K D46 R482 Charles at
4
14 RB751V 100K R45 14 1/4 for
0
2
32,33 LINE_OUT_PLUG 12
HPS 1 PC99
2
11 2 4 HPS R_UP/DOWN# 6 2 1 6 5 ADJVOL_UP/DW# 26
+5VALW 13 Add pullup
7 U46D U37B
74HCT32
to pin 4 74HCT125 AVDD
L_UP/DOWN# 7
1
+5VALW POWER by Charles +5VALW POWER +5VALW
7
R41 at 6/22 R445 C76 Modify by Charles at 2/16
Control 100K 30dB/20dB#
14
GAINSEL 14 2 1 +5VAMP 1 2
1
100K
by SPR 18 HPS R33 2 1 .1UF R246 R247 AVDD
GND1
GND2
GND3
GND4
R43 18K_1% 18K_1%
2
14
3 4 1 2 5 MODE SVR 16
2 33 INTSPKOFF# +5VAMP @100K 2
U6B @100K D48 1
2
1
74HCT14 HPS Q6
2
2 1 2 1 2
10
11
20
+5VALW POWER +5VALW R36 TDA8552TS U6A 3 2SC2411EK
7
1
C526 D49 100K C249 C33 RB751V 74HCT14
1
1 2 @RB751V .1UF 2.2UF_16V_0805 +5VALW POWER C278 R260
1
1UF 100K MIC
7
8
R444 .1UF 5 R53
1
2 JP24
0 2.2K
2
17 MUTE 2 1 1 5
MUTE_AUD Q16
2
4
2 1 2 SI2304DS 4
26 EC_MUTE EXT_MIC 3 MIC L20
2
3 1 DOCK_MIC 33
1
R438 U48 HB1M1608-601JT 3

@0 R473 R471 NC7ST32_SC70 32 INT_MIC 1 2 6
@10K 10K +5VALW POWER EXT_MIC 1 2 2
L19
2
R147 1
Add by Charles at 3/21 1 2 HB1M1608-601JT
+12VS
2
(Only for reserved)
1
1 100K C277 C50 FOXCONN JA6033L-101
R144
2 1 2 1 2
+5VS 330PF
3 Q13 330PF
1
100K 2N7002 JOPEN9
2
R157 2MM
2 1
+5VS
10K
22K AVDD
33 INTMICOFF# 2
22K
Q15
+3VALW DTC124EK 1
3 +3VALW AVDD Q1 3
2
C280 3 2SC2411EK
3
1
1 2 AVDD
26 BEEP#
1
R267
100K_1% .1UF R239
U5B C289 10K R234 R32
14
U26A 1 2 1 2
4
74LVC125 1UF R268

74LVC14 @0 2.2K
8
R266 10K_1% 560 U22A
2
C248
1
@TDA1308
2
5 6 1 2 1 2 1 2 1 2 2 1 AUD_VREF 3 +
1
1 +
1
Change C285 1UF 2 C239 C246

-
+3VALW POWER value by +3VALW POWER R237 @.1UF 4.7UF_10V_0805
1
10K
7
2
Charles at .22UF
C240
2
4
5/3 C241 @.1UF
2
2
MONO_IN 17
7
AVDD Modify by Charles at 2/16

1
C306 R272 1 1UF_16V_0805

5 6 1 2 1 2 2 Q26 R235 U22B
15 PCM_SPK#
8
3 2SC2411EK @10K @TDA1308
Change U26C 1UF 560 5 R29
+
value by 74LVC14 MICIN 7 @0 C20
17 MICIN
14
+3VALW POWER MIC

2
Charles at - 6 1 2 1 2
5/3
Q58 0
SI2304DS
4
3 1
R23
U26B
7
4 1 2 4
74LVC14 C290 R269 0
2
3 4 1 2 1 2 R470
13 SPKR C8 1 2 +12VS
1
1UF 560 1 2
+3VALW POWER R271 D18 1 100K
14
10K RB751V @15PF MUTE_AUD 2

3 Q59
2N7002 Title
2

Size Document Number Rev
B 4C
401138
A B C D
+5VCD
17,21 CD_AGND 1 3
RP49
ISCDROM 1 8 +5VCD_1 Q4
CD_IRQ 2 7 +5VCD 2N7002
CDASPN CDD[0..15] Modify by Charles DM_ON Modify by Charles
2
3 6 CDD[0..15] 21 1 2
MODE1 4 5 L41
HB1M2012-601JT
at 2/25 +5VCD
at 2/25
8P4R-10K SDD_[0..15] C430 C435 C432 R426 1 C37
SDD_[0..15] 22 +5VAMP 2
.1UF .1UF .1UF @10K U23A
C502 74HCT4066
.1UF 14
U33 2 R433 1 INT_CD_L1 INT_CD_L2 1 2
21 INT_CD_L LEFT_EQ 17,18
20K
44
58
7
9
OZ163 1UF
13
2 R432 1 2 R427 1 2 R436 1
VDD
VDD
VDD
33K @10K @10K Input
D28 RB751V SDD_0 76 77 CDD0 DM_ON
PLAY# 2 1 SDD_1 78
HDD0 CDD0
79 CDD1 2 R434 1 2 R428 1 2 R437 1 to EQ
PLAYBTN# 26,32 HDD1 CDD1 U23B
SDD_2 81 82 CDD2 33K @10K @10K
SDD_3 HDD2 CDD2 CDD3 C503 74HCT4066
83 HDD3 CDD3 84 14
D30 RB751V SDD_4 86 87 CDD4 2 R435 1 INT_CD_R1 INT_CD_R2 11 10
HDD4 CDD4 21 INT_CD_R RIGHT_EQ 17,18
REV# 2 1 SDD_5 90 91 CDD5 20K 7
REVBTN# 26,32 HDD5 CDD5
SDD_6 95 96 CDD6 1UF
12
SDD_7 HDD6 CDD6 CDD7 R429 1
97 HDD7 CDD7 98 2
D29 RB751V SDD_8 CDD8 +5VAMP @10K DM_ON
2 HDD8 CDD8 1
FRD# 2 1 SDD_9 4 3 CDD9
FRDBTN# 26,32 HDD9 CDD9
SDD_10 8 7 CDD10 U23C
SDD_11 HDD10 CDD10 CDD11
11 HDD11 CDD11 10 14
D27 RB751V SDD_12 15 14 CDD12 INT_CD_L2 4 3
HDD12 CDD12 CDROM_L 17
STOPCD# 2 1 SDD_13 18 17 CDD13 7
STOPBTN# 26,32 HDD13 CDD13
SDD_14 20 19 CDD14
SDD_15 HDD14 CDD14 CDD15 74HCT4066
5
22 HDD15 CDD15 21
DM_ON#
S_DA0 68 69 CD_SBA0 Input to
22 S_DA0 HDA0 CDA0 CD_SBA0 21
S_DA1 70 71 CD_SBA1
22 S_DA1
S_DA2 66
HDA1 CDA1
67 CD_SBA2
CD_SBA1 21
U23D ES1988
22 S_DA2 HDA2 CDA2 CD_SBA2 21
14
S_DCS1# 63 64 CD_SCS1# INT_CD_R2 8 9
22 S_DCS1# HCS0 CCS0 CD_SCS1# 21 CDROM_R 17
S_DCS3# 61 62 CD_SCS3# 7
22 S_DCS3# HCS1 CCS1 CD_SCS3# 21
74HCT4066
6
S_DIOR# 99 100 CD_SIOR# DM_ON#
22 S_DIOR# HDIOR# CDIOR# CD_SIOR# 21
S_DIOW# 6 5 CD_SIOW#
22 S_DIOW# HDIOW# CDIOW# CD_SIOW# 21
72 73 CIOCS16#
HIOCS16# CIOCS16# CD_SIORDY
93 HIORDY CIORDY 94 CD_SIORDY 21
13,22 SIORDY RP52
S_DCS3# 1 16 CD_SCS3#
CD_SCS3# 21
IRQ_15 74 75 CD_IRQ S_DCS1# 2 15 CD_SCS1#
22 IRQ_15 HINTRQ CHINTRQ CD_IRQ 21 CD_SCS1# 21
12 13 CD_DREQ S_DA2 3 14 CD_SBA2
13,22 SDDREQ HDMARQ CDMARQ CD_DREQ 21 CD_SBA2 21
S_DDACK# 88 89 CD_DACK# S_DA0 4 13 CD_SBA0
X2 22 S_DDACK# HDMACK# CHDMACK# CD_DACK# 21 CD_SBA0 21
S_DA1 5 12 CD_SBA1
CD_SBA1 21
OSC1 OSC2 S_DIOW# 6 11 CD_SIOW#
CD_SIOW# 21
1 2 24 23 CD_RSTDRV# S_DIOR# 7 10 CD_SIOR#
21 SIDERST# HRESET# CRESET# CD_RSTDRV# 21 CD_SIOR# 21
R369 33 59 60 CDASPN S_DDACK# 8 9 CD_DACK#
8MHZ HDASPN CDASPN CD_DACK# 21
R355
48 HSYNC SSYNC 47 @16P8R_33
R361 R360 53 52 1 2 CD_SIORDY
HBIT_CLK SBIT_CLK +5VCD
1M
+5VCD
55 HDATA_OUT SDATA_OUT 54 Change by Charles
50 49 1K RP54 +5VCD
C428 C427 10K HDATA_IN SDATA_IN at 5/20 CD_DREQ SDD_0 CDD0 RP53
46 HACRSTN SACRSTN 45 1 2 1 16
10PF 10PF D26 1 2 SDD_1 2 15 CDD1 CDD0 1 10
+5VCD R375 5.6K
DM_ON 1 2 28 R364 10K SDD_2 3 14 CDD2 CDD1 2 9 CDD4
PLAY# PAV_EN SDD_3 CDD3 CDD2 CDD5
36 PLAY/PAUSE PWR_CTL 51 1 2 4 13 3 8
FRD# 35 R362 @10K +5VCD SDD_4 5 12 CDD4 CDD3 4 7 CDD6
FFORWARD RP48
Change value by Charles at 2/17 RB751V REV# 34 REWIND
SDD_5 6 11 CDD5
+5VCD 5 6 CDD7
STOPCD# 37 80 ISCDROM PLAY# 1 10 SDD_6 7 10 CDD6
STOP/EJECT ISCDROM REV# SDD_7 CDD7
2 9 8 9
C429 1UF 39 GPIO_1 FRD# 3 8 GPIO_0 10P8R_4.7K
GPIO[1]/VOL_UP GPIO_0 STOPCD# GPIO_1
29 PCSYSTEM_OFF GPIO[0]/VOL_DN 40 4 7 @16P8R_0
R359 100K Q34 INTN 25 5 6 INTN
INTN +5VCD +5VCD
1 2 2N7002 30 R366 10K RP50
+5VCD RESET# SDD_8 CDD8 RP51
+5VCD 1 2 MODE0 56 1 2 +5VCD 16 1
D25 1 3 Q33 R368 10K 57 MODE1 10P8R_10K SDD_9 15 2 CDD9 CDD11 1 10
MODE1 SDD_10 CDD10 CDD10 CDD12
1 2 26 SDATA 14 3 2 9
1N4148 2N7002 +5VCD 1 2 SDD_11 13 4 CDD11 CDD9 3 8 CDD13
R367 10K 38 1 2 CIOCS16# 1 2 SDD_12 12 5 CDD12 CDD8 4 7 CDD14
3,5,25,26,32,33,38 SMD PAVMODE +5VCD SDD_13 CDD13 CDD15
2
3,5,25,26,32,33,38 SMC 1 3 27 SCLK R363 10K R374 47K 11 6 +5VCD 5 6

41 SDD_14 10 7 CDD14
CSN SDD_15 CDD15
INCN 42 9 8
R394 OSC1 10P8R_4.7K
31 OSCI UDN 43
OSC2 Modify +5VCD @16P8R_0
2
+12VALW 32 OSCO
GND
GND
GND
GND
GND
by
1
100K R379
2 EN_CDPLAY# Charles SIORDY 1 2 CD_SIORDY
EN_CDPLAY# 17
+5VALW Q44 at 2/2 R358 @0
16
33
65
85
92
2N7002 10K
+12VALW R376
3
Modify by IRQ_15 1 2 CD_IRQ

C466 DM_ON# @0
Charles at
1
+ C467 1UF_16V_0805 +5VCD
1
+5VALW U35 R393 1/4 Q32 R377
4.7UF_10V_0805 8 1 100K CD_PLAY_ON# 11 10 DM_ON 2 SDDREQ 1 2 CD_DREQ
D S 26,32 CD_PLAY_ON# 2N7002 @0
16V 7 D S 2
6 3 U6E
D S 74HCT14 R370
2
3
5 4
14
D G
7
+5VALW POWER SIDERST# 1 2 CD_RSTDRV#

21 SIDERST# CD_RSTDRV# 21
1
SI4800 C472 @33

+5VCD Change value 2 EN_CDPLAY# 12 13 CDPLAY
CD_PLAY 26
by Charles at R391
33
.1UF
Q43 U6F
6/22 2N7002 74HCT14
3
14
+5VALW POWER
12
+
C468 C469
4.7UF_10V_0805 1UF_16V_0805
2 Compal Electronics, inc.
Q42 Title
2N7002
3
B 4C
A B C D E
IDE,CD-ROM & FDD Module CONN.

+5VS
C374
1
C380 C373 C377
+ 1UF_25V_0805 .1UF
1000PF
10UF_10V_1206
2
2
1 1
Place component's closely IDE CONN.
PDD_[0..15]
22 PDD_[0..15]
20 CDD[0..15] CDD[0..15]
R138 10K
1 2
JP12
PIDERST# 1 2
PDD_7 1 2 PDD_8 +5VS
3 3 4 4
PDD_6 5 6 PDD_9
PDD_5 5 6 PDD_10
7 7 8 8
1
PDD_4 9 10 PDD_11
PDD_3 9 10 PDD_12 R321
11 11 12 12
PDD_2 13 14 PDD_13
PDD_1 13 14 PDD_14 100K
Modify by Charles at 2/29 15 15 16 16
PDD_0 17 18 PDD_15
R320 17 18
2
19 19 20 20
2 1 2 21 22 2
13,22 PDDREQ 21 22 PHDD# 26
33 23 24
22 P_DIOW# R309 23 24 R310
25 25 26 26
22 P_DIOR# PCSEL 1
13,22 PIORDY 1 2 27 27 28 28 2
33 29 30
22 P_DDACK# 29 30 470
22 IRQ_14 31 31 32 32
22 P_DA1 33 33 34 34
35 35 36 36 P_DA2 22
22 P_DA0
22 P_DCS1# 37 37 38 38 P_DCS3# 22
DASP# 39 40
32 HDDLED# 39 40
+5VS 41 41 42 42 +5VS
+5VS 1 2 43 43 44 44
R299 10K
HDD CONN +5VCD
W=80mils
1
Add by Charles at 2/16 C172
C423
1
C424 C425
+
Place component's closely 1000PF 10UF_10V_1206 1UF_25V_0805 .1UF
2 CDLED#
2
+5VCD 1 to route trace middle.
R189 10K R356 Place component's closely CD-ROM CONN.
Add by Charles at 2/16 1 2
0
Place component's 1 2 CD_AGND 17,20
closely CD-ROM conn. R288 0 JP16
3 3
20 INT_CD_L 1 2 INT_CD_R 20
Change by Charles at
3 4 2/25 +5VS
20 CD_RSTDRV# CD_RSTDRV# CDD8 1 R135 2 PIDERST#
CDD7 5 6 CDD9 100K
1 2 7 8
1
CDD6 CDD10
R191 10K 9 10
CDD5 CDD11
CDD4 11 12 CDD12 Q11
D3
CDD3 13 14 CDD13 RSTDRV DTC124EK
15 16 1
CDD2 CDD14 Modify by Charles at 2/29 22K
17 18 3 2
CDD1 CDD15 2 22K
19 20 13 PHDRST
Modify by Charles at 2/29 CDD0
21 22 1 2 CD_DREQ
CD_DREQ 20
R380 33 CD_SIOR# RB425D
23 24 CD_SIOR# 20
CD_SIOW#
20 CD_SIOW# 25 26
CD_SIORDY 1 CD_DACK#
3
20 CD_SIORDY 2 27 28 CD_DACK# 20
20 CD_IRQ CD_IRQ R378 0 R357
CD_SBA1 29 30 PDIAG# 100K
20 CD_SBA1 31 32 1 2
CD_SBA0 CD_SBA2 +5VCD R303
20 CD_SBA0 33 34 CD_SBA2 20
CD_SCS1# CD_SCS3# 1 2 SIDERST#
20 CD_SCS1# 35 36 W=80mils CD_SCS3# 20 +5VCD SIDERST# 20
CDLED#
26,32 CDLED# 37 38 +5VCD
+5VCD 39 40 +5VCD
Modify by Charles at
1
100K
+5VCD 41 42 +5VCD 2/17
43 44 1 2
D21 Q30
SEC_CSEL 45 46 C422 .1UF RSTDRV 1 DTC124EK
47 48 13,27 RSTDRV
2
22K
49 50 3 2
R190 2 22K
13 SHDRST
470 CD-ROM CONN. RB425D
4 4
1
3
Title
B 4C
A B C D E
A B C D E
SDD[0..15]
IDE Series Resistor 13 SDD[0..15]
13 PDD[0..15]
PDD[0..15]
Place them close PIIX4M 20 SDD_[0..15]

SDD_[0..15]
21 PDD_[0..15] PDD_[0..15]
RP16
PDD12 1 16 PDD_12
PDD4 2 15 PDD_4
RP12
PDD14 3 14 PDD_14 SDD0 16 1 SDD_0 Modify by Charles at 2/29
PDD1 4 13 PDD_1 SDD1 15 2 SDD_1
1 PDD13 5 12 PDD_13 SDD2 14 3 SDD_2 1
PDD2 6 11 PDD_2 SDD3 13 4 SDD_3 1 2
PDD15 PDD_15 13,14 IRQ15 IRQ_15 20
7 10 Modify by Charles at 2/29 SDD4 12 5 SDD_4
PDD0 8 9 PDD_0 SDD5 11 6 SDD_5 R333 33
SDD6 10 7 SDD_6
16P8R-33 SDD7 9 8 SDD_7
1 2 IRQ_14 21 1 2
RP15 13,14 IRQ14 16P8R-33 +5VS SIORDY 13,20
R306 33 R341 10K
PDD8 1 16 PDD_8 RP33
PDD7 2 15 PDD_7 1 2 SDD8 1 16 SDD_8
PDD9 PDD_9 +5VS PIORDY 13,21 SDD9 SDD_9 R159
3 14 2 15
PDD6 4 13 PDD_6 R311 10K SDD10 3 14 SDD_10 1 2 SDDREQ
PDD10 PDD_10 SDD11 SDD_11 SDDREQ 13,20
5 12 4 13
PDD5 6 11 PDD_5 1 2 SDD12 5 12 SDD_12
PDD3 PDD_3 PDDREQ 13,21 SDD13 SDD_13 5.6K
7 10 6 11
PDD11 8 9 PDD_11 R327 5.6K SDD14 7 10 SDD_14
SDD15 8 9 SDD_15
16P8R-33
16P8R-33
RP17
4 5 RP14
13 PDCS3# P_DCS3# 21
3 6 1 8 S_DCS3#
13 PDCS1# P_DA2 P_DCS1# 21 13 SDCS3# S_DCS3# 20
2 7 2 7 S_DCS1#
13 PDA2 P_DA0 P_DA2 21 13 SDCS1# S_DCS1# 20
1 8 3 6 S_DA2
13 PDA0 P_DA0 21 13 SDA2 S_DA2 20
4 5 S_DA0
13 SDA0 S_DA0 20
8P4R-33
8P4R-33
R336
2 1 2 P_DA1 R163 1 2 33S_DA1 2
13 PDA1 P_DA1 21 13 SDA1 S_DA1 20
33
RP38
1 8
13 PDIOW# P_DIOW# 21
2 7 RP36
13 PDIOR# P_DIOR# 21 S_DIOW#
3 6 13 SDIOW# 1 8 S_DIOW# 20
4 5 2 7 S_DIOR#
13 PDDACK# P_DDACK# 21 13 SDIOR# S_DIOR# 20
3 6
8P4R-22 SDDACK# 4 5 S_DDACK#
13 SDDACK# S_DDACK# 20
8P4R-22
C505 +3VS C506 +3V C507 +3V

+5VS 1 2 +3VS 1 2 +3VS 1 2
.1UF .1UF .1UF

C508 +3VS C509 +3V
3 3
+5VS 1 2 +5VS 1 2 For AGP Bus
.1UF .1UF
C510 +3VS
+3V 1 2 For HDD IDE Bus
.1UF
C511 +3VS
+5VS 1 2
+3V
C512 +3V
C44 .1UF 1 2
+5VS
1 2 C513 +3VS
1 2 .1UF
+3VALW
.1UF C514 +3V
.1UF 1 2
+3VS
8
C515 +3V
3 + 4 5 + 1 2 .1UF
+3VALW
1 6 7 C516
2 - 5 6 - .1UF 1 2
+5VS +5VCD
U4A U24B
LMC6482IM LM358 .1UF
U30B +12VALW POWER
4
74LVC08 For PCI Bus

+3VS POWER For CD-ROM IDE Bus
4 4

Title
B 4C
A B C D E
A B C D E
1 1
GAD[0..31]
8 GAD[0..31]
ST[0..2]
8 ST[0..2]
SBA[0..7]
8 SBA[0..7]
JP14 JP15
1 2 79 80
24,25,33 M_SEN# 3 4 PID0 13 8 GPAR 77 78
24,33 CRTGND 5 6 PID1 13 8 GFRAME# 75 76
24,33 G 7 8 PID2 13 8 GIRDY# 73 74 PIPE# 8
24,33 R 9 10 PID3 13 +3V 8 GTRDY# 71 72
24,33 B 11 12 Add by 69 70
24,33 CRTGND 13 14 DDC_MD2 33 Charles at 8 GDEVSEL# 67 68 RTCCLK 13,15,16
GREQ#
24,33 HSYNC 15 16 8 GREQ# 65 66 14.3M_VGA 10
1
24,33 VSYNC 17 18 +5V 5/3 8 GGNT# 63 64
C534 GCLKO
24,33 DDC_DATA 19 20 8 GSTOP# 61 62 GCLKO 8
SBA5
24,33 DDC_CLK 21 22 10UF_10V_1206 59 60
SBA6 SBA3
2
23 24 +3V 57 58
SBA4 SBA0
24,33 TV_GND 25 26 55 56
SBA7 SBA1
24,33 COMPS 27 28 53 54 SBA2
24,33 TV_GND 29 30 8 SBSTB 51 52
31 32 ST1 49 50 ST0
33 34 8 ST1 47 48 ST0 8
2 RBF# ST2 2
26,31 PME# 35 36 ENVEE 26 8 RBF# 45 46 ST2 8
GAD25 GAD1
6 VGA_SUS_STAT# 37 38 BKOFF# 25 43 44
AGP_BUSY# GAD30 GAD4
39 40 DISPOFF# 32 41 42
GAD24 GAD2
25 VGASUSP# 41 42 GAD29 39 40 GAD3
30 SUSP 43 44 GC/BE#3 37 38 GC/BE#0
8,13,14,27,31 CLKRUN# 45 46 +12VS 8 GC/BE#3 35 36 GC/BE#0 8
GAD26 GAD0
15,16 DEV_RST# 47 48 33 34
13,14,17 PIRQC# 49 50 +3VS 31 32
GAD31 GAD7
13,14,15,31 PIRQB# 51 52 GAD27 29 30 GAD5
13,14,15 PIRQA# 53 54 GAD28 27 28 GAD6
55 56 +5VS 25 26
25 DAC_CONTR 57 58 8 AD_STBB GAD23 23 24 GAD8 AD_STBA 8
59 60 GAD17 21 22 GAD13
GAD20 19 20 GAD12
CONT-60P GAD16 17 18 GAD10
GC/BE#2 15 16 GC/BE#1
8 GC/BE#2 13 14 GC/BE#1 8
GAD18 11 12 GAD15
GAD22 9 10 GAD11
GAD21 7 8 GAD14
GAD19 5 6 GAD9
3 4
1 2
CONT-80P
+3VS
3 3
C365
1 2
U30A .1UF
74LVC08 14
1 AGP_BUSY#
13 GGREQ# 3
2 GREQ#
GREQ# 8
7
+3VS POWER
4 4
Title
B 4C
A B C D E
A B C D E
1 1
+5VALW
CRT Connector
Modify by
+5VS
Charles at
3
+5VALW D4
2/25 for D6 D8 D23
DAN217 CRTVDD
monitor D45 DAN217 DAN217 2 1 W=40mils
CRTVDD
1
DAN217
sense
1
R425 RB420D
1
100K
C410 R297 R334
1
C371 .1UF 2.2K
2.2K
2
2 1
M_SEN# 23,25,33
2
JP11
68PF CRT-15P
6
2 M_SEN# L9 2
11
1 2 1
23,33 R FCM2012C-800_0805 7
L10 12
1 2 2
23,33 G FCM2012C-800_0805 8
L11 13
1 2 3
23,33 B FCM2012C-800_0805 9
14
1
1
DDC_MD2 4
C129 C117
1
1
R290 R139 R142 C125 C375 C119 C127 10
75 10PF 10PF 15
75 75
2
2
10PF 10PF 10PF 10PF 5
2
2
JOPEN7
2
23,33 CRTGND 1 2
18
19
2 L31
S
23,33 HSYNC 3 1 1 2MM

2N7002 FCM1608C-121T
0603 Add by
Q14
Charles at DDCD 1 3
S
G
DDC_DATA 23,33
2 L32
S
D
2
23,33 VSYNC 3 1 1 4/19 for

FCM1608C-121T Q31
EMI
0603 DDCC 1 3 2N7002
G
1
1
Q18
2
G
C401
1
1
C389 C386
2
DDC_CLK 23,33
1
2N7002 R305 R164 68PF 68PF C140 2N7002
G
220PF C404 Q17
2
+12VS 1 2
10K 10K 100PF
2
3 R146 100K 220PF 3
2
1 2
+12VS
2
R160 100K
CRTVDD
Add and change C531 JP20

value by Charles 1 2 26 BT_DET 1 2
at 5/3 25 BT_WAKE_UP 3 4
JP6
5 6 BT_ON# 26
27PF RCA JACK
28 BT_USB1_D+ 7 8 BT_PRE# 25
L8 L6
28 BT_USB1_D- 9 10
1 2 1 2 1 11 12 TO_USB1_D+ 28
23,33 COMPS
26 BT_RST# 13 14 TO_USB1_D- 28
FCM1608C-121T FCM1608C-121T
15 16
1
+3VALW 17 18 +5VALW
2
R94
19 20
1
75 C106 C105 Add by Charles at C491

3/27 for EMI testing AXN420C530P
330PF 330PF .1UF
1
Pin modify by
2
JOPEN6
DAC_GND 1 2
23,33 TV_GND Charles at 3/21
2MM option for
Modify by Charles at 1/4 bluetooth
4
BLUETOOTH CONN. 4

Title
B 4C
A B C D E
A B C D E
R405
51VCC 1 100K
14
2 +12VS
KBA[0..18] 2N7002 R472
26 KBA[0..18]
2
ADB[0..7] Q49 1 10K
G
26 ADB[0..7] 2 +5VS
SA[0..18] W=40mils SYSON 5 6
13,27 SA[0..18] SYSON SYSON# 30
SD[0..7] 1 3
13,14,27 SD[0..7] BIOSCS# 13
KSO[0..15] U6C
S
29 KSO[0..15]
2
KSI[0..7] Add resistor by Charles at 5/3 74HCT14
G
29 KSI[0..7] +5VALW POWER R66
C494
7
U5D
13
1 3 MEMR# 13,14 1 2 +3V
L40 .1UF 74LVC125
2
FBM-11-160808-700T Q48 Q47 8.2K
G
+5VALW L39 2N7002 2N7002 ECSMI# 12 11 EXTSMI# EXTSMI# 13
1 1 3 MEMW# 13,14 1
FBM-11-160808-700T
S
+3VALW POWER +3V
AEN 13,27
1
1
C478 C475 C493
IOR# 13,14,27
SA0
SA1
SA2
SA3
SA4
SA5
SA6
SA7
SA8
SA9
SA10
SA11
SA12
SA13
SA14
SA15
SA16
SA17
SD0
SD1
SD2
SD3
SD4
SD5
SD6
SD7
C480 C477 C479 1000PF
IOW# 13,14,27
.1UF .1UF 1000PF .1UF 1000PF
IOCHRDY 13,14,27
ECAGND
2
2
R406
109
160
108
161
166
167
168
169
170
171
172
173
174
157
162
163
158
159
U41
24
26
66
23
67
91
80
92
10
11
15
16
17
18
19
20
21
22
13
14
43
44
45
46
87
88
10K
3
4
5
6
7
8
9
1
2
PC87570-176PIN D38
HA0
HA1
HA2
HA3
HA4
HA5
HA6
HA7
HA8
HA9
HA10
HA11
HA12
HA13
HA14
HA15
HA16/PA3
HA17/PA4
HD0
HD1
HD2
HD3
HD4
HD5
HD6
HD7
HMEMCS#/PA0
HMEMRD#/PA1
HMEMWR#/PA2
HAEN/FXASTB#
HIOR#
HIOW#
GND
GND
GND
GND
GND
VCC
VCC
VCC
VCC
AVCC
AGND
NC
NC
NC
NC
NC
NC
NC
NC
HIOCHRDY
AVREF
VGASUSP#_1
1
1 2 VGASUSP# 23
KSI0 36 114 KBA0 RB751V

KSI1 KBSIN0 A0 KBA1
35 KBSIN1 A1 115
KSI2 34 116 KBA2
KSI3 KBSIN2 A2 KBA3
33 KBSIN3 A3 117
KSI4 32 118 KBA4
KSI5 KBSIN4 A4 KBA5 +3VS
31 KBSIN5 A5 119
KSI6 30 HRMS#(Host Reset Mode Select) 120 KBA6
KSI7 KBSIN6 A6 KBA7
29 KBSIN7 A7 121
2
Environment ENV0 ENV1 Mode (P105) HRMS# 122 KBA8
KSO0 (P104) (P103) A8 KBA9 R396
56 KBSOUT0 A9 123
KSO1 55 124 KBA10
KSO2 KBSOUT1 IRE 0 0 Reset host when shared A10 KBA11 10K
54 KBSOUT2 A11 125
KSO3 memory access can not 1 KBA12 D36
53 KBSOUT3 A12 126
KSO4 be completed KBA13 ATFOUT# 1
1
52 KBSOUT4 A13/BE0 127 2 ATF_INT# 13
2 KSO5 51 IRD 0 1 128 KBA14 2
KSO6 KBSOUT5 A14/BE1 KBA15
50 KBSOUT6 A15/PG1 129
KSO7 49 Extend access until completed 0 130 KBA16 RB751V
KSO8 KBSOUT7 Development 1 0 A16/PA5 KBA17
48 KBSOUT8 A17/PA6 135
KSO9 47 +3V
KSO10 KBSOUT9 ADB0
42 KBSOUT10 D0 137
KSO11 41 FXBUSEN#(FX Bus Interface Enable) 138 ADB1
KBSOUT11 D1
1
KSO12 40 (P136) 139 ADB2
KSO13 KBSOUT12 SHBM#(Shared/Non-Shared BIOS Memory) Mode (P130) FXBUSEN# D2 ADB3 R395
39 KBSOUT13 D3 140
KSO14 38 141 ADB4
KSO15 KBSOUT14 D4 ADB5 10K
37 KBSOUT15 D5 142
1 Non Shared Memories FX Bus Interface Enabled 1 ADB6 D35
D6 143
ADB7 570SCI#
2
D7 144 1 2 SCI# 13
13,14 IRQ1 156 IRQ1
155 0 Shared Memories ISA Bus Compatible Mode 0 111 HDEN#
13 IRQ8# IRQ8# RD# FRD# 26
154 105 HRMS# R479 for 733C RB751V
IRQ11 SEL0# FSEL# 26
13,14 IRQ12 153 IRQ12 WR0# 112 FWR# 26 R420 for 733
R414 10K HDEN#(Host Device Enable) RP59
+5VALW 1 2 79 110 SELIO# 10 1 HRMS#
PFAIL# Mode (P111) HDEN# TRIS(TRI-STATE) (P102) PG0/SELIO# SELIO# 26
EC_HPOWON 165 107 VGASUSP#_1 ENV1 9 2 ECSMI#
29 EC_HPOWON HPWRON PG2/CLK PCMRST# KBA15 KBA18
+RTCVCC 28 VBAT PG3/SEL1# 106 PCMRST# 16 8 3
2
113 ATFOUT# KBA16 7 4 ENV0

R407 Device are enabled o reset 1 0 Normally PG4/WR1# KBA17
1 2 6 5
100K 145 R479 L@10K +5VALW1 2
PF0/D8 R420 LN_10K 10P8R_10K
PF1/D9 146 1 2
Devices are disabled on reset 0 1 TriState R416 DN_10K +5VALW
PF2/D10 147 SUSA# 10,13
1
PF3/D11 148 SUSB# 13 1 2

+5VS 149 R488 @10K
PF4/D12 SUSC# 13
150 SYSON
3 PF5/D13 ACIN RP57 3
PF6/D14 151 ACIN 30,38
PC4/EXTINT11
152 BKOFF# 10 1 KBD_DATA

PC5/EXINT15
BKOFF# 23 +5VS
PC7/PSDAT3
PF7/D15
2
PC6/PSCLK3
PC3/EXINT0
PB6/HRSTO
R410 VGASUSP#_1 9 2 KBD_CLK

PB7/SWIN
PH0/BST0
PH1/BST1
PH2/BST2
PH3/PFS#
PB5/GA20
PB0/RING
PE0/HA18
R411 164 1 2 8 3 PS2_DATA
PH5/ISE#
PH4/PLI#
PB2/SDA
PD0/AD0
PD1/AD1
PD2/AD2
PD3/AD3
PD4/AD4
PD5/AD5
PD6/AD6
PD7/AD7
PB1/SCL
HMR 51RST 29
PE1/A18
PSDAT1
PSDAT2
PSCLK1
PSCLK2
10K R468 EXT_DATA PS2_CLK

PB3/TA
PB4/TB
7 4
32KX1
32KX2
10K 10K EXT_CLK 6 5 +5VS

PC0
PC1
PC2
DA0
DA1
DA2
DA3
1
NC
NC
NC
NC
NC
NC
NC
NC
D40 R469 +5VALW
1 G20 Modify by 10P8R_10K
1
13 GATEA20 2 2 1 2
136
104
103
102
101
100
131
132
133
134
175
176
Charles at +5VALW
25
27
12
71
72
73
74
75
76
77
78
61
62
63
64
65
68
70
69
58
60
57
59
81
82
83
84
85
86
93
94
95
96
97
98
99
89
90
RB751V Q56 100K RP56
1
2N7002 2/16 option 8 PCMRST#
3
D41 1
13 RC# 2 1 RCL# CRY1 2 GATE_RST# for 2 7 BT_PRE#
2
CRY2 R419 570SCI# 3 6

bluetooth LID_SW# 13,26,32
RB751V Q57 26 4 5 FIR_PRE#
51ON 29
SA18 10K ECSMI# 2N7002 and FIR
3
KBA18 TRIS +5VALW 8P4R_10K
ACOFF 35 RP58
ENV1
28 RING# CLK_SMB ENV0 EC_ACT#
1
3,5,20,26,32,33,38 SMC 10 1
DAT_SMB HDEN# 9 2 BKOFF#
3,5,20,26,32,33,38 SMD
32 INVT_PWM
+5VALW
DAC_BRIG 32
Add by Charles at 4/19 SELIO# 8 3 G20
CLK_SMB 7 4 RCL#
15 PCM_SUSP# DAC_CONTR 23
DAT_SMB 6 5
EN_DFAN 30 +5VALW
TRICKLE 35
R401 G20 LI/NIMH# 10P8R_10K
LI/NIMH# 35,38
CRY1 1 2CRY2 RCL# BT_PRE#
BT_PRE# 24
13,29,32 ON/OFF BT_WAKE_UP 24
2
22M SCROLLED# FIR_PRE#

32 SCROLLED# FIR_PRE# 28
4
R400 32 NUMLED# NUMLED#
M_SEN# 23,24,33
Add by Charles at 2/25 4
CAPSLED#
51K 32 CAPSLED#
BATT_TEMP
BATT_TEMP 38
X3 EC_ACT# EXT_DATA
32 EC_ACT# EXT_DATA 29,33
EXT_CLK
1
EXT_CLK 29,33
KBD_DATA
KBD_DATA 29,33
1
32.768KHZ KBD_CLK C496 .01UF

KBD_CLK 29,33
C476 C474 PS2_DATA LI/NIMH# 1 2 ECAGND
PS2_DATA 32
10PF 33PF PS2_CLK Title
PS2_CLK 32
C495 .01UF
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL BATT_TEMP 1 2
B 4C
A B C D E
A B C D E
INPUT OUTPUT
+5VALW +5VALW
+5VALW
+5VALW ADB[0..7] C473 .1UF
25 ADB[0..7]
1
C487
1 2
R487 R409 1 2 KBA[0..18]
25 KBA[0..18]
@100K @100K
Add by .1UF
20
U42 Add by Charles at
20
Charles at ADB0
2
U44 3 2
VCC
D0 Q0 ON/OFF_EC# 24 4/20 that
12/1 PLAYBTN# 2 18 ADB0 +5VALW ADB1 4 5
VCC
20,32 PLAYBTN# 1A1 1Y1 C497 D1 Q1 BT_RST# 24
1 4 16 ADB1 ADB2 7 6 reserved for S/W 1
17 AUTO_GAIN_CONTROL 1A2 1Y2 D2 Q2 BT_DET 24
6 14 ADB2 1 2 ADB3 8 9 MMO_ON
1A3 1Y3 ADB3 ADB4 D3 Q3
3 ATF# 8 1A4 1Y4 12 13 D4 Q4 12 FSTCHG 35
REVBTN# 11 9 ADB4 ADB5 14 15
20,32 REVBTN# 2A1 2Y1 U45A D5 Q5 BT_ON# 24
FRDBTN# 13 7 ADB5 .1UF ADB6 17 16
20,32 FRDBTN# 2A2 2Y2 74HCT32 D6 Q6 EN_WOL# 31
15 5 ADB6 14 ADB7 18 19
23 ENVEE 2A3 2Y3 D7 Q7 PULSEBTN 29
STOPBTN# 17 3 ADB7 KBA3 1
20,32 STOPBTN# 2A4 2Y4 AA
3 11
GND
+5VALW SELIO# LARST# CLK
1 2 1
GND
U45B 1G CLR
19 2G 7
74HCT32 +5VALW POWER 74HCT273
10
14 +5VALW POWER 74HCT244 R421 10K
10
KBA1 4 1 2
CC +3V R403 C482
6
SELIO# 5 1 2 1 2
25 SELIO# +5VALW
7 D43
+5VCD +5VALW +5VALW MMO_ON 1 2 20K 1UF_25V_0805 +5VALW
VR_ON 6,36,37 C485
+5VALW
C486 .1UF RB751V 1 2
1
1 2 D39
R350 R408 R339 VLBA# .1UF
Delete by 1 2 VLB# 13
@100K 100K 100K
20
Charles at 5/21 U39
20
@RB751V
U43 R474 Add resistor by Charles at 5/3 ADB0 3 2
VCC
2 ADB0 ADB1 D0 Q0 EC_LID_SW# 13
2
2 18 1 2 4 5
VCC
32 DOT_PRES# 1A1 1Y1 ADB1 0 GATE_RST# 13 ADB2 D1 Q1 PX4_RIA# EC_MUTE 19
21,32 CDLED# 4 1A2 1Y2 16 7 D2 Q2 6
CONA# 6 14 ADB2 D37 ADB3 8 9
33 CONA# 1A3 1Y3 D3 Q3 CD_PLAY 20
8 12 ADB3 PX4_RIA# 1 2 +5VALW ADB4 13 12 SUSP#
21 PHDD# 1A4 1Y4 PIIX4_RI# 13,14 D4 Q4 SUSP# 28,30,34
COVER# 11 9 ADB4 ADB5 14 15 VLBA#
2 13,25,32 LID_SW# PME_51# 2A1 2Y1 ADB5 U45C ADB6 D5 Q5 2
13 7 RB751V 17 16 CD_PLAY_ON# 20,32
23,31 PME# 2A2 2Y2 ADB6 74HCT32 ADB7 D6 Q6
32 LCD_MODE# 15 2A3 2Y3 5 14 18 D7 Q7 19 BEEP# 19
17 3 ADB7 KBA4 9
32 TPAD_ON/OFF# 2A4 2Y4 BB
8 11
GND
+5VALW SELIO# LARST# CLK
1 10 1 Change by
GND
1G CLR
19 7
U45D 2G +5VALW POWER 74HCT273 Charles
10
74HCT32 74HCT244
14 at 3/1
10
KBA2 12
11 DD
SELIO# 13 +5VALW
RP55
7
+5VALW POWER PLAYBTN# 1 10
+5VALW REVBTN# 2 9 DJ_ON/OFF# +5VALW
C483 FRDBTN# VOL_UP# C484
3 8
1 2 STOPBTN# 4 7 VOL_DW# 1 2
5 6 CONA#
+5VALW
.1UF .1UF
20
20
U38 10P8R_10K U40
2 18 ADB0 ADB0 3 Q0 2
VCC
VCC
32 USER_BTN1# 1A1 1Y1 D0 TPAD_LED# 32
4 16 ADB1 ADB1 4
32 USER_BTN2# 1A2 1Y2 D1 Q1 5 BACKLED# 32
32 USER_BTN3#
6 1A3 1Y3 14 ADB2 Add by Charles at 2/10 +5VALW ADB2 7 D2 Q2 6 DIS_ADJVOL 19
8 12 ADB3 ADB3 8
32 USER_BTN4# 1A4 1Y4 ADB4 ADB4 D3 Q3 9 ADJVOL_UP/DW# 19
11 2A1 2Y1 9 13 D4 Q4 12 DOT_CLK 32
32,33 SUSPBTN# DJ_ON/OFF# ADB5 ADB5
32 DJ_ON/OFF# 13 2A2 2Y2 7 14 D5 Q5 15 DOT_DATA 32
VOL_UP# 15 5 ADB6 U46A ADB6 17
32 VOL_UP# VOL_DW# 2A3 2Y3 ADB7 74HCT32 ADB7 D6 Q6 16 DOT_CS# 32
17 2A4 2Y4 3 14 18 D7 Q7 19 DOT_A0 32
32 VOL_DW# KBA6 1
3 +5VALW 3
1 3 11
GND
GND
C498 1G SELIO# LARST# CLK
19 2G 2 1 CLR
2 1 7
74HCT244 +5VALW POWER 74HCT273
10
10
.1UF U46B
14 74HCT32
KBA5 4
6
SELIO# 5
7
+5VALW POWER C437 +5VALW
2 1 +5VALW
+5VALW +5VALW
+
1
4.7UF_10V_0805 +5VALW C481
C438 1 2 R399
1
R404
1 2
R418 1 2 1K
+12VS U36
.1UF 100K .1UF
100K
2
G
2
U34 8 1
Q46 2N7002 VCC A0
14 7 WC A1 2
KBA18
2
1 NC VCC 32 9 1 3 3,5,20,25,32,33,38 SMC 6 SCL A2 3

KBA16 FWE# FLASH# 13
2 31 8 5 4
D
KBA15 A16 WE* KBA17 3,5,20,25,32,33,38 SMD SDA GND

3 A15 A17 30 10 FWR# 25
1
KBA12 4 29 KBA14 7
KBA7 A12 A14 KBA13 U46C R397 NM24C16 R398
5 A7 A13 28
KBA6 6 27 KBA8 74HCT32
KBA5 A6 A8 KBA9 +5VALW POWER 1K 1K
7 A5 A9 26
KBA4 8 25 KBA11
KBA3 A4 A11
2
4 9 A3 OE* 24 4
KBA2 KBA10 FRD# 25
10 A2 A10 23
KBA1 11 22
KBA0 A1 CE* ADB7 FSEL# 25
12 A0 DQ7 21
ADB0 13 20 ADB6
ADB1 DQ0 DQ6 ADB5
14 19
ADB2 15
16
DQ1
DQ2
DQ5
DQ4 18
17
ADB4
ADB3
VSS DQ3 Title
29F040 AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 4C
A B C D E
A B C D E
SUPER I/O 37N869

SD[0..7]
13,14,25 SD[0..7]
4 SA[0..15] 4
13,25 SA[0..15]
U15
+3VS SD0 46 75
SD1 D0 STROBE# LPTSTB# 28,33
47 D1 AUTOFD# 74
SD2 LPTAFD# 28,33
RP21 48 73 LPTERR# 28,33
CTS#2 SD3 D2 ERROR#
1 8 49 D3 INIT# 72 LPTINIT# 28,33
2 7 DSR#2 SD4 51 71
DCD#2 SD5 D4 SLCTIN# LPTSLCTIN# 28,33
3 6 52 D5 ACK# 60 LPTACK# 28,33
4 5 RI#2 SD6 53 59
D6 BUSY LPTBUSY 28,33
SD7 54 58
D7 PE LPTPE 28,33
8P4R-4.7K 57 LPTSLCT 28,33
SA0 SLCT
26 A0
SA1 27 69 LPD0 LPD[0..7]
A1 PD0 LPD[0..7] 28,33
SA2 28 68 LPD1
SA3 A2 PD1 LPD2
29 A3 PD2 67
SA4 30 66 LPD3
SA5 A4 PD3 LPD4
31 A5 PD4 64
SA6 32 63 LPD5
SA7 A6 PD5 LPD6
39 A7 PD6 62
SA8 40 61 LPD7
SA9 A8 PD7
41 A9
SA10 95 R202 10K
A10
1 2
97 PDRQ(DRQ_C)
13,14 DRQ3 DRQ2 +3VS
13,14 DRQ2 50 FDRQ(DRQ_B)
IRQIN 96
3 13 3
VCC
VCC 70
13 DACK#3 94 PDACK#(DACK_C#)
1
13 DACK#2 34 FDACK#(DACK_B#) C181 C175 C180
4.7UF_10V_0805 .1UF .1UF
SA11
2
35 A11
SA12 36 A12
13,14,15 SIRQ 37 SIRQ

CLKRUN# 92
8,13,14,23,31 CLKRUN# CLKRUN#
38 CLK33
10 PCLK_SIO
VSS 4
VSS 45
Change R205
VSS 65
value 10 55 93
13,21 RSTDRV RESET VSS
13,14,25 IOCHRDY 98 IOCHRDY
Selecting
by 44 R204 @820
C176 13,25 AEN AEN 3F0 HEX
Charles 33 TC 1 2
13 TC
at 2/10 15PF DTR2# 91
CTS#2
Selecting
42 90 R203 47K
13,14,25 IOR#
43
IOR# CTS2#
89 1 2
370 HEX
13,14,25 IOW# IOW# RTS2# +3VS
88 DSR#2
DSR2#
Place 10 14.3M_SIO
18 CLK14 TXD2/IRTX 87 R206 1K
closely to RXD2/IRRX 86 1 2
85 DCD#2
super I/O DCD2# RI#2
C174 R199 19 84
13,14 DRQ0 R201 DRQ_A RI2#
1 2 1 2
2 2
+5VS 1 2
22PF 33 10K 99
32 3MODE# DRVDEN0
INDEX# 10
32 INDEX# INDEX#
MTR0# 100
32 MTR0# MTR0#
SA14 3
DRV0# A14
32 DRV0# 2 DS0#
SA13 1
FDDIR# A13
32 FDDIR# 5 DIR#
STEP# 6
32 STEP# STEP#
WDATA# 7
32 WDATA# WDATA#
32 WGATE#
WGATE# 8 WGATE# DTR1# 81
DTRA# 28
Change by
TRACK0# 11 80
32 TRACK0#
WP# TRK0# CTS1# CTSA# 28 Charles at
32 WP# 12 WRTPRT# RTS1# 79 RTSA# 28
RDATA# 14 78 2/10
32 RDATA# RDATA# DSR1# DSRA# 28
HDSEL# 9 77
32 HDSEL# HDSEL# TXD1 TXDA 28
DSKCHG# 15 76
32 DSKCHG# DSKCHG# RXD1 RXDA 28
13,14 DRQ1 17 DRQ_D DCD1# 83 DCDA# 28
16 DRVDEN1 RI1# 82 RIA# 28
21 IRMODE
IRMODE DACK#1 IRMODE 28
DACK_D# 22 DACK#1 13
23 IRRX
IRRX2 IRRX 28
24 IRTX
IRTX2 SA15 IRTX 28
A15 25
20 R209
DACK_A# DACK#0 13
PWRGD/GAMECS# 56 1 2 +3VS
1K
1 C182
1 1
.1UF
2
FDC37N869

Title
B 4C
A B C D E
A B C D E

DCD1# (1)
1
1
R102
2 +5VALW
SERIAL +5VALW
DSR1#
RXD1
(6)
(2)
(7)
6
2
RTS1# 7
@10K TXD1 (3)
3
SERIAL / PARALLEL PORT 25 FIR_PRE# 1
R98
2 +3VALW
CTS1#
DTR1#
(8)
(4)
8
4
JP18
COM-DB9
1
C184 RI1# (9)
9
FIR / USB CONNECTOR 10K
.1UF
(5)
5
12
13
1
26
1 1
R365 C183 .47UF_16V_0805
+5VS FOR INCREASING LED'S
1 2 28 C185
VCC
LIGHT AND THE COMMUNICATION 100K C1+
27 1 2
.1UF V+
DISTANCE
FIR Module from cardbus
2
D31 24 3 1 2
PCM_RI# 1 C1- V- C433
Change by Charles 15 PCM_RI# 2 1 2 1 C2+ .47UF_16V_0805
at 12/12 to met RB751V C188
1 2 1 2 FIR specification .47UF_16V_0805 2 C2- DTR1#
27 DTRA# 14 TIN1 TOUT1 9 DTR1# 33
7
JOPEN11 JOPEN10 R446 13 10 RTS1#
27 RTSA# TIN2 TOUT2 RTS1# 33
2MM 2MM 12 11 TXD1
+5VS 27 TXDA TIN3 TOUT3 TXD1 33
11 12 19 4 CTS1#
25 RING# 27 CTSA# ROUT1 RIN1 CTS1# 33
5.6_1206 RIA# 18 5 RI1#
27 RIA# ROUT2 RIN2 RI1# 33
+3VS U37D 14 17 6 RXD1
27 RXDA ROUT3 RIN3 RXD1 33
T = 20mil
74HCT125 16 7 DCD1#
DCD1# 33
13
27 DCDA# ROUT4 RIN4
1
+5VALW POWER D DSR1#
27 DSRA# 15 ROUT5 RIN5 8 DSR1# 33
T = 20mil T = 20mil 2 RIA0 20
U9 Q35 G ROUTB2
INVLD# 21
1
C115 C556 C111 C525 1 2N7002 S SUSP# 23

LED_A T = 12mil IRTXOUT 26,30,34 SUSP# FORCEON CP6
3
+ 2 LED_C TXD 3 IRTX 27 GND 25
10UF_10V_1206 22U_10V_1206 .1UF 100PF 4 5 T = 12mil IRMODE 22 8P4C_220PF
RXD SD T = 12mil IRRX IRMODE 27 FORCEOFF# RI1#
2
6 VCC MODE 7 1 8
IRRX 27 DTR1#
2
8 GND 2 7
U16 CTS1# 3 6
MAX3243 TXD1 4 5
TFDU6101E
C111,C525,C556 MUST PLACE AS Resistor Location
2 CLOSE TO IR AS POSSIBLE 2
Bluetooth R316, R323, R326, R319 RTS1# 1 8
RXD1 2 7
DSR1# 3 6
Q60 DCD1# 4 5
SI2306DS USB_VCCA FBM-11-451616-800T USB_ASA NO R317, R324, R325, R318
W=80mils F1 L24 LPD[0..7] 8P4C_220PF
W=40mils W=40mils W=40mils Bluetooth 27,33 LPD[0..7] CP7
S
3 1 1 2
+5VS
Modify by Charles at 2/16 1 C314 +
POLYSWITCH_0.75A
1
C86
G
R76
option for bluetooth .1UF R198 33
22
150UF_10V_E
470K 1R316 @0 2 2 LPTINIT#_1 PARALLEL
2
27,33 LPTINIT# 1
R478 24 TO_USB1_D-
100K 1R323 @0 2 L21 R192 33
24 TO_USB1_D+ FCM2012C-800T06 LPTSLCTIN#_1
2
OVCUR#1 27,33 LPTSLCTIN# 1 2

USB1_D-_1 1R317 0 2 USBP1_D- 1 2 +5V_PRN +5V_PRN
13,33
1
1
1
+12VS
C81 R73 USB1_D+_1 1R324 0 2 USBP1_D+ 1 2 +5V_PRN D32
RP23
Modify by 1000PF 560K L23
+5VS 2 1w=10mils
1
33 USBP1_D- FCM2012C-800T06 LPTSLCTIN#_1 C431
2
Charles for 1 10
1
LPTINIT#_1 2 9 LPTACK# RB420D C426
USB leakage at 33 USBP1_D+ L22 LPTERR# LPTBUSY R344 4.7UF_10V_0805 .1UF
2
3 8
JP2 AFD#/3M# LPTPE 2.7K
2
5/21 1 2 4 7
FBM-11-451616-800T 5 6 LPTSLCT R343
+5V_PRN 33
1 VCC
w=10mils
LPTSTB#
2
2 D0- 27,33 LPTSTB# 1 2
USB_VCCB C297 3 10P8R_2.7K JP17
D0+ AFD#/3M# LPTCN-25
1 2 4 VSS
3 FBM-11-451616-800T USB_ASB +5V_PRN CP1 3
F2
Guide Pins
+5VS_USB L5 .1UF L25 9 R188 33 1 AFD#/3M# 1 8
W=40mils W=40mils FCM2012C-800T06 G1 RP20 LPTERR#
1 2 5 VCC G2 10 27,33 LPTAFD# 1 2 14 2 7
4516 USB0_D- 1 2 6 11 FD0 1 10 FD0 2 LPTINIT#_1 3 6
D1- G3
1
C342 + USB0_D+ 1 2 7 12 FD1 2 9 FD7 LPTERR# 15 LPTSLCTIN#_1 4 5

POLYSWITCH_0.75A D1+ G4 27,33 LPTERR#
1
C88 L26 8 13 FD2 3 8 FD6 FD1 3

R63 .1UF FCM2012C-800T06 VSS G5 FD3 FD5 LPTINIT#_1 8P4C_220PF
150UF_10V_E 4 7 16
1
FD4 FD2 CP4

2
+5V_PRN 5 6 4
1
470K Molex-67300 LPTSLCTIN#_1 17 LPTACK# 1 8

L4 C51 FD3 5 LPTBUSY 2 7
FBM-11-451616-800T 10P8R_2.7K LPTPE
2
18 3 6
13,33 OVCUR#0 .1UF FD4 LPTSLCT
2
6 4 5
1
19
C391 R70 FD5 7 8P4C_220PF
20
1000PF 560K RP22 FD6 CP2
2
8
Modify by Charles at LPD3 9 8 FD3 21
LPD2 FD2 FD7 FD0
2
2/16 option for 10 7 9 1 8

LPD1 11 6 FD1 22 FD1 2 7
bluetooth LPD0 12 5 FD0 LPTACK# 10 FD2 3 6
LPD7 FD7 27,33 LPTACK# FD3
13 4 23 4 5
1R326 @0 2 BT_USB1_D+ 24
LPD6 14 3 FD6
27,33 LPTBUSY
LPTBUSY 11
LPD5 15 2 FD5 24 8P4C_220PF
1R319 @0 2 LPD4 16 1 FD4 LPTPE 12 CP3
BT_USB1_D- 24 27,33 LPTPE 25
The component's most place cloely PIIX4. 1R325 0 2 USB1_D+_1 16P8R_68 LPTSLCT 13 FD4 1 8
RP6 27,33 LPTSLCT FD5 2 7
8 1 USB1_D+ 1R318 0 2 USB1_D-_1 FD6 3 6
28
29
13 USBP1+ USB1_D- FD7
4 7 2 4 5 4
13 USBP1- USB0_D+
13 USBP0+ 6 3 USB0_D+ 33
5 4 USB0_D- 8P4C_220PF
13 USBP0- USB0_D- 33
1
2
3
4
4
3
2
1
8P4R_33
CP5
8P4C_33PF
RP5
8P4R_15K Title
8
7
6
5
5
6
7
8
B 4C
A B C D E
A B C D E
+3V
INT_KBD CONN.
CP8
1
JP1 KSI1 1 8
KSI1 1 KSI7 2 7
R254 1 KSI7 KSI6
2 2 3 6
7
47K KSI6 3 KSI5 4 5
3 KSO9
R253 4
RSMRST# KSI4 4 8P4C_33PF
2
1 2 9 8 11 10 RSMRST# 8,13 5 5
6 KSI5
6
1
1 330K KSO0 7 CP9 1
C47 U26D U26E 7 KSI2 KSO9
8 1 8
14
14
.1UF 74LVC14 74LVC14 KSI3 8 KSO0
9 9 2 7
+3VALW POWER +3VALW POWER KSO5 KSO1
2
10 10 3 6
KSO1 11 KSO5 4 5
11 KSI0
12 12
KSO2 13 8P4C_33PF
13 KSO4
14 14
KSO7 15 15 KSO8 CP10
16 16
KSO6 17 KSI4 1 8
17 KSO3 KSI2
18 18 2 7
KSO12 19 KSI3 3 6
19 KSO13 KSI0
20 20 4 5
+5V KSO14 21 21
Add by 22 22 KSO11 8P4C_33PF
KSO10 23
charles 23
1
24 KSO15 CP11
at 2/10 24 KSO2 1 8
R212 KSO4 2 7
INT_KB_CONN.
7
47K KSO7 3 6
R274 KSO8 4 5
2
1 2 13 12
8P4C_33PF
1
330K KSO[0..15]
25 KSO[0..15]
C308 U26F +5VALW KSI[0..7] CP12
25 KSI[0..7]
14
.1UF 74LVC14 KSO6 1 8
+3VALW POWER U37A KSO3
2
2 7
1
14 74HCT125 KSO12 3 6
2 KSO13 4 5 2
2 3 EC_HPOWON 25
8P4C_33PF
+3VS +3VS +5ALWV POWER
Change by C102 CP13
KSO14
7
Charles at 1 2 1 8
1
KSO11 2 7
2/10 .1UF U5C KSO10
10
3 6
R283 KSO15 4 5
1
113K U8 74LVC125
6 G_VR_POK 5 6 9 8 SPWROFF# 8P4C_33PF
VCC
MR# RST# SPWROFF# 13
2
3 PFI
Add by Charles at
1
+3VALW POWER
2/22 for EMI
1
4
GND
PFO#
1
R74
R284 C359 C101 10K
100K .01UF .1UF MAX6342
2
2
2
1
R91
2
PS2 CONN.
2.2M
3
Change by
Q45
Charles at
1
@SMO5
3 2/25 C218 C219 3
L38 220PF 220PF
2
+5VALW
2
25,33 EXT_CLK 1 2
FCM1608C-121T
25,33 EXT_DATA 1 2
1
L37
R415 Reset Button KB_VCC KB_AS FCM1608C-121T JP19
F3 KBD/PS2_6
100K +5VALW W=40mils 1 2 W=40mils
+5VS L34 4 6
D44 8
2 8
1
POLYSWITCH_1.1A FBM-11-451616-800T C214
2
1 ON/OFF 13,25,32 1 7 7
3 4516 C215 C220
33 ON/OFFBTN# 3 5
1
2 4.7UF_10V_0805
51ON# 32,35 3
D12 1000PF 220PF
2
1
D +5VALW 1N4148
DAN202U L36
26 PULSEBTN 2 25,33 KBD_DATA 1 2
G SW1 R228 10K Q24 FCM1608C-121T
1
DTA114EK
2
S D42 1 2 1 2 2 25,33 KBD_CLK 1 2

1
Q52 R417 C492 L35

3
10K
1
2
2N7002 C Q53 3 4 0 C233 FCM1608C-121T
1
1
4.7K 1000PF 0603
2
RLZ20A
RESET BTN C217 C216
1
Q23
22K 1UF_25V_0805
2
25 51ON 1 2 2 @SMO5
B 220PF 220PF
2
2
R422 E 1 2 51RST
22K 51RST 25
33K R224
3
DTC124EK 4.7K
Change by Charles
3
4 4
1
D
at 5/21 for
2
notebook can't G
keep power when S @2N7002 WHEN R=0,Vbe=1.35V
Q51 WHEN R=33K,Vbe=0.8V
3
dock SPR and

unplug AC-IN.
Title
B 4C
A B C D E
A B C D E
+3VALW +3V Change by Charles at 1/4

U20
8 D S 1
7 D S 2
1
6 3 R381 +12VALW
D S
1
5 4 SYSON_ALW 1 2 C206 C203 +3VS
D G 100K C209
+ + +12VS
1
C436 1UF 4.7UF_10V_0805 4.7UF_10V_0805
1
SI4800 R371
1
C202 33 .1UF_25V_0805 R402
1
4.7UF_10V_0805 D R207
2
2 SYSON# 4.7K
1 Q38 G +3VALW +3V 1K 1
1
D 2N7002
14
S ACIN_SYS# 13
SYSON# 2
12
25 SYSON#
1
Q36 G D Q50 D Q19
2N7002 S R371 change to be 33 ohm C198 C205 2 SUSP 2 SUSP# 9 8
25,38 ACIN 26,28,34 SUSP# SUSP 23
1UF 4.7UF_10V_0805 2N7002 2N7002
3
G G
by Peter Liu at 4/5 U6D
2
S S
74HCT14
3
+3VALW TO +3V Transfer +5VALW POWER
7
+3VALW +3VS
U17
8
7
D S 1
2
RESET & SUSPEND CKT
D S
1
6 3 100K +12VALW
D S +5VS_GATE C192 C187 C189
5 D G 4 1 2 + +
1UF R52
1
R372 4.7UF_10V_0805 4.7UF_10V_0805
2
1 2
C195 SI4800 R373 C434 @0
2
4.7UF_10V_0805 33 .1UF_25V_0805 Reserved resistor by
2
Charles at 5/3
+3VALW +3VS R252 C45

12
D D +12VS
1 2
SUSP 2 2 SUSP FAN-1
1
Q39 G G Q37 3M R263 1UF Connector
2
2N7002 S S 2N7002 C196 C186
1UF 4.7UF_10V_0805
3
R56
1
10M R261 +5VS
2
2 25 EN_DFAN C274 3.48K_1% Q8 2
+3VALW TO +3VS Transfer
1
1M 10UF_10V_1206 FMMT619 1
1
6 - 2
+12VALW Change by Charles at 1/4 +5VS 7 3 D2
2
5 + 1SS355
U4B D17
1
R61 LMC6482IM
2
+12VALW C177 100K 1N4148 JP3
1
R60
1UF_25V_0805 100K 1
2
1
C179 2
3 Q29 D1
1 2 2 2SA1036K 1SS355 FAN_CON_2P
Q20 1
1
.1UF_25V_0805 SI3861
2
R208 C542
S
1 2 4 2 @10UF_10V_1206
2
100K 6 3 +12VS
G
SUSP# 5
1
R475
C178 @0
Reserved resistor by
1
1UF_25V_0805
2
Charles at 5/3
1
R200 RTCVREF
BATT1
C471
3
51K
- 2 1 + 1 2 W=30mils 3
1
2
R386
.1UF 200_0805
+RTCVCC
RTCBATT
D34 D33
2
R392
1 2 1 2 1 2
W=30mils W=30mils W=30mils W=30mils
RB751V 100 RB751V
Change by Charles at 1/4 15 SYSON_ALW
+5VALW +5VS +5VALW +5V
U19 U18 R387
8 1 8 1 1 Q403 1 2
D S D S +3V
7 2 7 2
E
D S D S
1
1
6 3 6 3 J1 2SA1037K 0_0805
D S D S
1
1
5 4 +5VS_GATE 5 4 SYSON_ALW
+ +
B
D G C201 C204 C200 D G C191 C197 C193
2
1 2 R390
4.7UF_10V_0805 1UF 4.7UF_10V_0805 4.7UF_10V_0805 1UF 4.7UF_10V_0805
1
R389 33K
1
SI4800 R211 SI4800 R210 10K

2
1
C199 33 C190 33
2
1
4.7UF_10V_0805 4.7UF_10V_0805 +5V C470 2
+5VS .1UF Q41 3
2
RTC BATT
1
2SC2412K
2
1
R388
CONNECTOR
1
D D C194 10K
1
SUSP 2 SYSON# 2 1UF

Q22 G C208 Q21 G
2
4 4
2N7002 1UF 2N7002
2
S S
3
+5V TO +5VS Transfer

Title
B 4C
Date: Friday, August 31, 2001 Sheet 30 of 47
A B C D E
A B C D E
MB+
PL6
Add those capacitor for EMI at 2/6 FBM-L11-3 22513-201LMAT
2 1 B+
+5VALWP
0.1UF_0805_25V
0.1UF_0805_25V
0.1UF_0805_25V
0.1UF_0805_25V
0.1UF_0805_25V
4.7UF_1210_25V
4.7UF_1210_25V
4.7UF_1210_25V
4.7UF_1210_25V
0.1UF_0805_25V
5
6
7
8
5
6
7
8
1
PC188
PC184
PC185
PC186
PC187
PC176
PC177
PC179
PC180
PC178
2
RB751V
PD42
2
1 4 4 1
PR212
1
0
<22,24,26,33 > SUSP# 1 2 BSTCORE 1
0.1UF_0805_25V
1
PQ109 PQ110
3
2
1
3
2
1
PR213 IRF7811A IRF7811A
PC170
100K PL7
@1UH
2
1 2
CPU_COREP
2.2
PR223
PL8
<4> VID4 16 D4 SKIP 21
0.7UH/22A_LPI 0.002_251 2_1%
LXCORE
1
<4> VID3 17 D3 LX 23 1 2 2 1
PR226 2.2
5
6
7
8
<4> VID2 18 PU12 24 DHCORE 2 1 PR221
D2 DH
5
6
7
8
5
6
7
8
PQ111 PQ112 PQ113
220UF_D_4V
Add the
1
MAX1711 BSTCOR E @SI4404DY SI4404DY SI4404DY
220UF_D_4V
PC174
<4> VID1 19 D1 BST 22 rsistor for
1
PC173
+
EC10QS04
@FDS7764 A FDS7764A FDS7764A
1
EMI at 2/6
PR225
20 14 +
EC31QS04
<4> VID0 D0 PGND
@0
PD43
PD44
4
0 2 DLCORE
2
<22,26> VR_ON 1 2 SHDN DL 13 4 4
PR214 PR219
2
1
12 PGOOD V+ 1 20
<15> V_GATE
2
2 1
VCCORE
3
2
1
+5VALWP 15 VDD VCC 7
3
2
1
3
2
1
0.22UF_0805_16V
5 3
PC171
CC FB
2
PC172 2
9 REF FBS 4 2200P F
6 ILIM GNDS 11 PR218
0.22UF_0805_16V
0
1UF_0805_25V
10 GND TON 8 2 1
+5VALWP
220PF
PC168
PC169
PC167
PR220
215K_1%
2 1 0
PR215
2 1
2
PR216
1M_1% PR217
FBCORE
2
10K_1%
220PF
1
PC183
3 3
+3VALWP PQ114 +2.5VP

2SB1132
SOT-89
3 2
+ PC182
PC181 22UF_B_6.3V
1
PU14
22UF_1206_1 0V
S-816A 25
1
4 4 5
VSS EXT
4
VIN VOUT
<22,24,26,33> VR_ON 1 2 3 ON/OFF#

0
PR224
2
Title
4C
A B C D E
A B C D E
Change value by
Charles at 5/17
+3VALW Q27 JP23
+3VAUX TX+ 1 13
TX+ GND
SI2304DS
1
TX- 2 C490
TX- LED1_GRNN
1 3 15
S
RX+ CATHODE1 .1UF
JP21 3
TX+ RX+
2
33 LAN_TX+ 1 1
1
TX- 2 4
G
33 LAN_TX- 2 N/C
1
C97 R413 75
2
3 3
C252 4 5 16 LED1_GRNP
1UF_25V_0805 1UF_25V_0805 RX+ 4 N/C ANODE1
2
1 33 LAN_RX+ 5 5 1
RX- RX-
2
33 LAN_RX- 6 6 6 RX-
7 N/C
R236 HEADER 6 R412 75
1
1 2 C488 8 17 LED2_YELN
+12VALW the channel width 50 N/C CATHODE2
100K mils 1000PF_2KV_1206
1
D MOD_RING
2
9 N/C
2 Q25
26 EN_WOL#
1
G JP22 10 18 LED2_YELP
2N7002 MOD_RING VH1 RING ANODE2
S
1
3 MOD_TIP 1
2 DSSA-P3100SB 11 TIP
2
AUDIO MINI_GNDA
GND 12 N/C GND 14
1
C529 C528 HEADER 2 MOD_TIP
1
C489
1000PF_1206_2KV 1000PF_1206_2KV
IDSEL : AD27 RJ-45 & RJ-11 .1UF
2
+5VS
Add by Charles
1
C96
at 4/19 for EMI
1
JP25 C90 C49 C99
TIP RING +
1000PF .1UF .1UF 4.7UF_10V_0805
KEY KEY
2
3 3 4 4
LAN RESERVED 5 6 LAN RESERVED RP60
5 6
7 7 8 8 1 16
2 9 10 2 15 2
LED1_GRNP 9 10 LED2_YELP
11 11 12 12 3 14
Add by Charles at 3/27 LED1_GRNN 13 14 LED2_YELN +3VS AD31 4 13 S_AD31
R449 10 13 14 AD29 S_AD29
15 15 16 16 5 12
PIRQD# 1 2 17 18 W=30mils +5VS AD27 6 11 S_AD27
13,14 PIRQD# 17 18
1
W=40mils 19 20 1 2 PIRQB# 13,14,15,23 C82 AD25 7 10 S_AD25
+3VS 19 20 PIRQB#
1
REQ#0 1 R483 2 21 22 1 R450 102 GNT#0 C55 C78 C87 C46 AD23 8 9 S_AD23
8 REQ#0 10 23
21 22
24 W=40mils R484 10 GNT#0 8 +
PCLK_MINI 23 24 S_PCIRST#
+3VAUX
1000PF 4.7UF_10V_0805 .1UF .1UF
+ 16P8R-33
Add by 10 PCLK_MINI 25 25 26 26
W=40mils
R451 10 4.7UF_10V_0805
2
27 28
Charles at REQ#1 27 28
2 GNT#1
+3VS
2
8 REQ#1 1 2 29 29 30 30 1 GNT#1 8
12/1 31 32 R452 10
S_AD31 31 32 S_PME# Add by Charles at 3/27
33 33 34 34
S_AD29 35 36 1 R486 102
35 36 S_AD30
37 37 38 38 Add by Charles RP61
S_AD27 39 40 +3VAUX 8 9 S_IRDY#
PCLK_MINI R485 S_AD25 41
39 40
42 S_AD28 at 12/1 8,13,14 IRDY# CLKRUN# 7 10 S_CLKRUN#
S_IRDY# 15,17
41 42 8,13,14,23,27 CLKRUN# S_CLKRUN# 15
S_AD26 1 2 43 44 S_AD26 6 11 S_SERR#
43 44 8,13,14 SERR# S_SERR# 15
1
S_C/BE#3 S_AD24 R65 C250 S_PERR#
45 45 46 46 14 PERR# 5 12 S_PERR# 15
1
1
S_AD23 47 48 MINI_IDSEL 1 2 S_AD27 C52 C95 C54 AD1 4 13 S_AD1
R264 100 49
47 48
50
+ AD3 3 14 S_AD3
S_AD21 49 50 S_AD22 1000PF .1UF .1UF 4.7UF_10V_0805 AD5 S_AD5
51 51 52 52 2 15
10 S_AD19 S_AD20 100 AD7 S_AD7
2
53 53 54 54 1 16
55 56 S_PAR Add by
S_AD17 55 56 S_AD18
12
57 58
S_C/BE#2 59
57 58
60 S_AD16 16P8R-33 Charles at
C283 S_IRDY# 59 60
61 61 62 62 3/27
63 64 S_FRAME#
15PF S_CLKRUN# 63 64 S_TRDY#
2
65 65 66 66
3 S_SERR# S_STOP# RP62 3
67 67 68 68
69 70 RP63 AD21 1 16 S_AD21
S_PERR# 69 70 S_DEVSEL# AD15 S_AD15 AD19 S_AD19
71 71 72 72 8 9 2 15
S_C/BE#1 73 74 AD13 7 10 S_AD13 AD17 3 14 S_AD17
73 74
Change by S_AD14 75 75 76 76 S_AD15 AD11 6 11 S_AD11
8,13 C/BE#1 4 13 S_C/BE#1
S_C/BE#1 15,17
Charles at 77 78 S_AD13 AD9 5 12 S_AD9 AD14 5 12 S_AD14
S_AD12 77 78 S_AD11 AD6 S_AD6 AD12 S_AD12
79 79 80 80 4 13 6 11
2/25 S_AD10 81 82 AD4 3 14 S_AD4 AD10 7 10 S_AD10
81 82 S_AD9 AD2 S_AD2 AD8 S_AD8
83 83 84 84 2 15 8 9
S_AD8 85 86 S_C/BE#0 AD0 1 16 S_AD0
S_AD7 85 86 16P8R-33
87 87 88 88
89 90 S_AD6
MD_BITCLK S_AD5 89 90 S_AD4 16P8R-33
91 91 92 92
93 94 S_AD2
S_AD3 93 94 S_AD0
95 95 96 96
1
+5VS W=30mils 97 98 RP64

R424 S_AD1 97 98 S_C/BE#2
99 99 100 100 8,13 C/BE#2 1 16 S_C/BE#2 15,17
101 102 2 15 S_C/BE#3
101 102 8,13 C/BE#3 S_C/BE#3 15,17
10 103 104 PAR 3 14 S_PAR
17 MD_SYNC 103 104 AC_SDATAO 8,13,14 PAR S_PAR 15,17
105 106 FRAME# 4 13 S_FRAME#
17 MD_SDATAI 105 106 MD_SDATAO 17 8,13,14 FRAME# S_FRAME# 15,17
MD_BITCLK TRDY# S_TRDY#
12
17 MD_BITCLK 107 107 108 108 RP66 8,13,14 TRDY# 5 12 S_TRDY# 15,17
AC_CLK24 109 110 AC_RST# 1 2 AD30 8 9 S_AD30 STOP# 6 11 S_STOP#
109 110 MD_RST# 17 8,13,14 STOP# S_STOP# 15,17
C501 MOD_SPK 1 2 111 112 R462 @0 AD28 7 10 S_AD28 DEVSEL# 7 10 S_DEVSEL#
111 112 8,13,14 DEVSEL# S_DEVSEL# 15,17
R90 113 114 1 2 S_PCIRST# AD26 6 11 S_AD26 C/BE#0 8 9 S_C/BE#0
113 114 8,13 C/BE#0 S_C/BE#0 15,17
15PF 0 MOD_SPK R463 0 AD24 S_AD24
2
17 MOD_MIC 115 115 116 116 MOD_SPK 17 5 12

117 118 AD22 4 13 S_AD22 16P8R-33
117 118 AD20 S_AD20
119 119 120 120 3 14
121 122 Add R462,R463 by Peter Liu 3/30 AD18 2 15 S_AD18
+5VS W=30mils 121 122 W=40mils+3VAUX AD16 S_AD16 S_PCIRST#1
4 123 123 124 124 1 16 15,17 S_PCIRST# 2 PCIRST# PCIRST# 7,13,16 4
R453 33
127 128 16P8R-33 S_PME# 1 2 PME#
127 128 15,17 S_PME# PME# 23,26
R454 33
Mini-PCI SLOT
15,17 S_AD[0..31]
S_AD[0..31]
S_C/BE#[0..3]
15,17 S_C/BE#[0..3]
AD[0..31] Title
8,13 AD[0..31] THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
C/BE#[0..3]
8,13 C/BE#[0..3]
B 4C
A B C D E
A B C D E
+5VS +5VS +5VS
JP5 JP7
1 1 1 27 27 1 1 1
27 INDEX# INDEX# 2 28 INDEX# 2
2 28 2
3 3 29 29 26 TPAD_ON/OFF# 3 3
27 DRV0# DRV0# 4 30 DRV0# RP3 +5VS 4
4 30 26 TPAD_LED# 4
5 5 31 31 5 5
27 DSKCHG# DSKCHG# 6 32 DSKCHG# TRACK0# 1 8 25 PS2_DATA 6
6 32 DSKCHG# 25 PS2_CLK 6
7 7 33 33 2 7 7 7
8 34 INDEX# 3 6 8
8 34 WP# 8
9 9 35 35 4 5
1
27 MTR0# MTR0# 10 36 MTR0#
10 36 C499 C500 HEADER 8
11 37 8P4R_1K
27 FDDIR# FDDIR# 11 37 FDDIR# @22PF @22PF
12 12 38 38
27 3MODE# 3MODE# 3MODE#
2
13 13 39 39
27 STEP# STEP# 14 40 STEP#
14 40
15 15 41 41
27 WDATA# WDATA# WDATA# RP26
16 16 42 42
17 43 STEP# 6 5 +5VS
17 43
27 WGATE# WGATE# 18 18 44 44 WGATE# FDDIR# 7 4 WDATA# Add by Charles at 2/22 for EMI
19 45 MTR0# 8 3 WGATE#
27 TRACK0# TRACK0# 19 45 TRACK0# RDATA#
20 20 46 46 9 2
21 47 10 1 HDSEL#
27 WP# WP# 21 47 WP# +5VS
22 22 48 48
23 49 JP8
27 RDATA# RDATA# 23 49 RDATA# 10P8R_1K
24 24 50 50 19 SPKR+ 1 1
25 25 51 51 2 2
27 HDSEL# HDSEL# HDSEL# 19 SPKR-
26 26 52 52 19 SPKL+ 3 3
+5VS 1 2 DRV0# DRV0# 27 4 4
19 SPKL-
FDD_CONN R285 1K U37C
10
1
2 14 74HCT125 HEADER 4 2
Modify by C545 C546 C547 C548 Add by
9 8 FDDLED# 220PF 220PF 220PF 220PF
Charles at
Charles
2
+5VALW POWER at 1/17 5/20 for
EMI
7
Add by Charles at 1/4 JP9
19,33 LINE_OUT_PLUG 1 1
2 2
3 3
19,33 LINEOUT_R 4 4
5 5
19,33 LINEOUT_L
6 6
1
Add by Charles C549 C550 C551
220PF 220PF 220PF HEADER 6
at 1/4
2
1 2
Add by
JOPEN8
Charles at 2MM
5/20 for EMI
JP13
VOL_DW# 1 48 VOL_DW#
3 26 VOL_DW# 1 48 3
VOL_UP# 2 47 VOL_UP#
26 VOL_UP# 2 47
EC_ACT# 3 46 EC_ACT#
25 EC_ACT# 3 46
51ON# 4 45 51ON#
29,35 51ON# 4 45
LCD_MODE# 5 44 LCD_MODE#
26 LCD_MODE# 5 44
DJ_ON/OFF# 6 43 DJ_ON/OFF#
26 DJ_ON/OFF# 6 43
PLAYBTN# 7 42 PLAYBTN#
20,26 PLAYBTN# 7 42
FRDBTN# 8 41 FRDBTN#
20,26 FRDBTN# 8 41
REVBTN# 9 40 REVBTN#
20,26 REVBTN# 9 40
STOPBTN# 10 39 STOPBTN#
20,26 STOPBTN# 10 39
SMC 11 38 SMC
3,5,20,25,26,33,38 SMC 11 38
+5VALW +5VS SMD 12 37 SMD
+5VCD C530 3,5,20,25,26,33,38 SMD 12 37
+5VALW 13 13 36 36 +5VALW
Change by
INVPWR .1UF Add by Charles at 4/19 14 14 35 35 Charles at
1 2 for EMI 15 15 34 34
JP10 20,26 CD_PLAY_ON# CD_PLAY_ON# 16 33 CD_PLAY_ON# 5/3
16 33
1 1 21 21 Change by Charles 26 BACKLED#
BACKLED# 17 17 32 32 BACKLED#
2 2 22 22 at 2/25 18 18 31 31
Change by Charles 3 3 23 23 Change by 19 19 30 30
4 24 DOT_CLK 20 29 DOT_CLK
at 2/25 4 24 Charles at 26 DOT_CLK
DOT_DATA 20 29 DOT_DATA
5 5 25 25 ON/OFF 13,25,29 26 DOT_DATA 21 21 28 28
6 26 2/10 DOT_CS# 22 27 DOT_CS#
6 26 SUSPBTN# 26,33 26 DOT_CS# 22 27
7 27 DOT_A0 23 26 DOT_A0
25 SCROLLED# 7 27 USER_BTN1# 26 26 DOT_A0 23 26
8 28 DOT_PRES# 24 25 DOT_PRES#
25 NUMLED# 8 28 USER_BTN2# 26 26 DOT_PRES# 24 25
9 9 29 29 USER_BTN3# 26
25 CAPSLED# FDDLED# 10 10 30 30 USER_BTN4# 26
11 11 31 31 LID_SW# 13,25,26
21,26 CDLED#
21 HDDLED# 12 12 32 32 EC_ACT# 25 HEADER 24
13 13 33 33
4 19 INT_MIC 14 14 34 34 51ON# 29,35 4
15 35 SMC Change by Charles at 2/22
15 35 SMD
23 DISPOFF# 16 16 36 36
25 DAC_BRIG 17 17 37 37
18 18 38 38
25 INVT_PWM 19 19 39 39
20 40
20 40
Title
HEADER 40
B 4C
A B C D E
A B C D E
DOCKING 100 PIN

LPD[0..7]
27,28 LPD[0..7]
JP26
1 1 2 2 VIN
1 25,29 KBD_DATA 3 3 4 4 1
25,29 KBD_CLK 5 5 6 6
25,29 EXT_CLK 7 7 8 8
25,29 EXT_DATA 9 9 10 10
11 11 12 12
13 13 14 14
31 LAN_TX+ 15 15 16 16
31 LAN_TX- 17 17 18 18
19 19 20 20
31 LAN_RX+ 21 21 22 22 SMD 3,5,20,25,26,32,38
31 LAN_RX- 23 23 24 24 SMC 3,5,20,25,26,32,38
25 25 26 26 SUSPBTN# 26,32
27 27 28 28
28 DCD1# 29 29 30 30 DTR1# 28
28 DSR1# 31 31 32 32 CTS1# 28
28 TXD1 33 33 34 34 RTS1# 28
35 35 36 36 RI1# 28
28 RXD1
37 37 38 38
LPD1 39 40
39 40 ON/OFFBTN# 29
LPD3 41 42 LPD0
LPD5 41 42 LPD2
43 43 44 44
LPD7 45 46 LPD4
45 46 LPD6
27,28 LPTSTB# 47 47 48 48
49 49 50 50
27,28 LPTAFD#
51 51 52 52
27,28 LPTERR#
27,28 LPTINIT# 53 53 54 54 LPTSLCT 27,28
27,28 LPTSLCTIN# 55 55 56 56 LPTPE 27,28
57 57 58 58 LPTBUSY 27,28
59 59 60 60 LPTACK# 27,28
2 23,24 COMPS 2
23,24 TV_GND 61 61 62 62
63 63 64 64 +5VS
23,24 R 65 65 66 66
67 67 68 68 VSYNC 23,24
23,24 G 69 69 70 70 HSYNC 23,24
71 71 72 72 M_SEN# 23,24,25
23,24 B 73 73 74 74 DDC_MD2 23
23,24 CRTGND 75 75 76 76 DDC_CLK 23,24
19 INTSPKOFF# 77 77 78 78 DDC_DATA 23,24
19,32 LINE_OUT_PLUG
79 79 80 80 +5VALW
Modify by Charles at 2/16
19 INTMICOFF# 81 81 82 82
83 83 84 84 OVCUR#0 13,28
85 85 86 86 OVCUR#1 13,28
19,32 LINEOUT_L
19,32 LINEOUT_R 87 87 88 88
89 89 90 90 USB0_D+ 28
17 DOCK_LIN_L 91 91 92 92 USB0_D- 28
17 DOCK_LIN_R 93 93 94 94
95 95 96 96 USBP1_D+ 28
19 DOCK_MIC 97 97 98 98 USBP1_D- 28
99 100 CONA#
99 100 CONA# 26
101
102
103
104
101
102
103
104
DOCKING 100
3 3
4 4

Title
B 4C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
401138
A B C D E
A B C D E
B+
PD1
B+ 1 2
P6
RB751V +12VALWP
PR1
10_1206 PC1
PC5 PD2 4.7UF_1206_25V
0.1UF_0805_25V VL
RB751V PC2
1 1
8
7
6
5
8
7
6
5
2 1 PL1 2.2UF_1206_25V
PC8 PQ2 1UH_BLM3216 25V
D
D
D
D
D
D
D
D
PQ1 SI4800 1 2
0.1UF_0805_25V PC10 PD35 FDS6690S + PC7 PC6
@BYS10-45
1
PC9 4.7UF_1210_25V PC4 0.1UF_0805_25V 4.7UF_1206_16V PC12
G
S
S
S
S
S
S
4.7UF_C_35V 470PF_0805_100V PD4
2
4.7UF_1210_25V 25V PC13 PC11 EC11FS2
0.1UF_0805_25V 1UF_0805_25V
1
2
3
4
1
2
3
4
22
21
PC14
0.1UF_0805_25V
2
25 4 PR3
VL
V+
BST3 12OUT
VDD 5 22_1206 PT1
27 DH3 BST5 18 4 2
PR129 0 16 PR130
PU1 DH5
26 17 B+ P7 P8
LX3 LX5 10UH_SDT-1205P-100-120
24 DL3 DL5 19 PQ3
P5 20 SI4800 1 3
PGND 0 P9
CSH5 14
1 CSH3 CSL5 13
2
8
7
6
5
PC18 2 12 PC20
PL3 @1000PF CSL3 MAX1632 FB5
3 15 PC21
D
D
D
D
FB3 SEQ
8
7
6
5
1
10 9 4.7UF_1210_25V 0.1UF_0805_25V
10UH_SPC-1207P-100 SKIP# REF
23 6
D
D
D
D
SHDN# SYNC PR4
RST# 11
G
S
S
S
7 0.015_2512
TIME/ON5 PQ4 PD5 1W
1
G
S
S
S
PC19 FDS6690S @BYS10-45
1
2
3
4
2
28
GND
PR131 RUN/ON3 4.7UF_1210_25V
PR5 26,28,30 SUSP#
1
2
3
4
2 0.015_2512 2
8
+3VALWP @0
PR132 PC23
10K @1000PF
1
PZD1 + + + +
@RLZ4.3B PC25 PC26 PR123
PD7 47UF_D_6.3V 47UF_D_6.3V @1M PR6
2
RB051L-40 100K
2
PC24 PC166 +5VALWP

47UF_D_6.3V 47UF_D_6.3V
1
PC27 PZD2 PD8
PC28 @RLZ6.2C RB051L-40
1
PR124 + 47UF_D_6.3V + 47UF_D_6.3V
PR125 @1M
0 PC29
2
VREF
PZD3
1 2 PC30
+5VP 4.7UF_1206_10V
PR7 0.047UF PR126
47K 16V 0
RLZ3.6B 5%
PC31
PR8 +5VP
1000PF 120K
50V 5%
3 3
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY

OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE Title
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R &D DEPARTMENT EXCEPT AS SCHEMATIC, M/B LA-733
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR Size Document Number Rev
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY B 4C
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRON ICS, 401138
INC. Date: Tuesday, August 21, 2001 Sheet 34 of 47
A B C D E
A B C D E
ADAPTER CURRENT 2.9A PR163

P2 @0
P1 B+
PR9
VIN PQ5 PQ7 0.02_2512 PC33 PQ6
8 1 1 8 @100P 1 8
D S S D S D P3
7 D S 2 2 7 2 S D 7
S D 1W PQ13
6 D S 3 3 6 3 S D 6 VMB
S D PL4
5 D G 4 PR11 4 5 4 G D 5 1 S D 8
PR12 G D
200K 2 S D 7 1 2
10K SI4835 SI4435 SI4435 3 6
S D PR27 PC37 PC102 PC38 PC39
4 G D 5 22UH_SPC-1207P-220
1
0.02_2512 + 4.7UF_1210_25V 4.7UF_1210_25V4.7UF_1210_25V 1
FDS4435 P4 1W
2
PC40 PC41 PC42 PD13 33UF_EC_25V
PR18 4.7UF_1210_25V EA60QC04
150K PC43
4.7UF_1210_25V 0.1UF_0805_25V
PR22 4.7UF_1210_25V
VIN
3
1 47K
2
PQ9 3 PACIN 36,38
2
2N7002
PD11 PR205
1SS355 PR26
47K
Modify by CT
4.7
OVP# 38
at 2/25
1
B+
PU10
1 -INC2 +INC2 24
PR165 PR184 PR185
1
10K
2 23 0 @0
OUTC2 GND PC140
PQ14 2200PF
100K
2 DTC115EK 3 22
25 ACOFF +INE2 CS
2 2
100K PC142 4 21
PR168 4700PF_0805_50V -INE2 VCC(o) PC141
PR169
3
PR170 30.1K_1% 0.1UF

5 FB2 OUT 20
10K_1% 10K
PC148 6 19
VREF VH
2200PF_0805_50V Add by CT at 26 FSTCHG TRICKLE 25
PR171 PC165
5/3
7 FB1 VCC 18
PR172 10K
PC149 PR173 0.1UF_0805_25V
0.1UF 24.9K_1%
8 -INE1 RT 17
2
68K
9 +INE1 -INE3 16
PD40 PD41
PR174 PR183 PR175 PR176 PC146 1SS355 1SS355
16.9K 1%
1
10 OUTC1 FB3 15
1.2K_0.5% PC164 PR177 10K 324K_1%
0.1UF_0805_25V
10K_1% 11 14 1500PF
OUTD CTL
1
1 2 PQ107
25 TRICKLE PQ100
2
3
3 12 -INC1 +INC1 13
PR191
CV:LI-ION 13.241V
2N7002 47K
2N7002 MB3878
NI-MH 16.202V
3 3
CC: 2.87A LI-ION FAST

P1 PR178 CC: 2A NI-MH FAST
69.8K_0.5% PR179
PD16 CC: 0.273A LI-ION TRICKLE
2
RB751V 150K_0.5%
VMB 2 1 PD18 CC: 0.265A NI-MH TRICKLE
RLS4148 PR180
VS 3 1
215K_0.5% CHGRTCP
PQ101
1
PQ24 PC56 2N7002 PR181 PR45

PU6
TP0610T 0.1UF 38 NIMH/LI#
2
CHGRTCP 2 100K +5VP S-81235SG 200_0805
1 3 1 1 2 1 2
+5VP
1
PR58 PR59 RTCVREF
1
PZD4 47_1206 10K PC147 PQ102 3 2

3 2
1
1
RLZ6.2C PR61
2
PR60 PC55 150K PZD5 0.1UF DTC115EK

100K
1
100K 0.1UF_0805_25V RLZ5.1B 2 LI/NIMH# 25,38 PC52 PZD6
PC51 1UF_0805_25V RLZ16B
2
10UF_1206_10V
2
1
100K
2
29,32 51ON# 1 2
PC54
PR62 0.22UF_1206_25V
3
22K
4 4

CUSTODY OF THE COMPETENT DIVISION OF R& D DEPARTMENT EXCEPT AS SCHEMATIC, M/B LA-733
INC. Date: Tuesday, August 21, 2001 Sheet 35 of 47
A B C D E
A B C D E
+5VALWP
VREF
4
5
6
2
+5VALWP
D
D
S
PD38 PR157
Change
PC136 RB751V PQ99
value by 0.1UF_0805_25VPR158
G
D
D
PR92 1 47K
Charles at 200K_0.5% 2.2K SI3443DV
1
2
3
2
1
1
2/2 3 1
+5VALWP PU7A
PC137
8
LM393 PQ45
1000PF 2SC2411K
3 +
1
1
2 - PQ46 PD30
2SA1036K RB051L-40
1
PR93
100K PC72 PR94
4
0.047UF 300K_0.5%
2
2
100K
2 PL9
2.2UH_SPC1002
100K
PQ30
1
DTC115EK PR96
1
5.1K
PQ31
DTC115EK CPU_IOP
100K PC138
6,26,36 VR_ON 2 PR99
@1M_1% @1000PF
VREF 25V +
100K PR98 PC139
@1M 47UF_D_6.3V
3
PR159 +5VS +3VS

PR100 5.6M
200K_1%
2 PR154 PR162 2
PU7B 10K 10K
8
LM393
5 + JOPEN2
6 -
7 VR_POK 6 +2.5VP 1 2 +VCLK 80mil
PD3 2MM
PR101 1 2 V_GATE 6,36
200K_1% PR160
4
JOPEN1
100K_1% 1 2
CPU_IOP +VCPU_IO
RB751V PR102
220K 2MM
JOPEN4
2 1 +5VALWP 1 2 +5VALW
PC76
0.047UF_1206_16V RB751V 3MM
PD27 JOPEN3
+3VALWP 1 2 +3VALW
3MM
CPU_COREP +VCC_CORE
3 3
CUT POWER PLANE

JOPEN5
+12VALWP 1 2 +12VALW
2MM
4 4

OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERRED FROM THE Title
CUSTODY OF THE COMPETENT DIVISION OF R &D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR SCHEMATIC, M/B LA-733
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY Size Document Number Rev
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRON ICS, B 4C
INC. 401138
A B C D E
A B C D E
+5VALWP
PR127
100K PF1
7A PCN1
VMB
LI/NIMH# 1 8
25,35 LI/NIMH# 2
1 +5VALWP PR128 B/I 1
PD31 1K_1% TS 3
PR63 SLD 4
6.49K_1% SLC 5
3 3 6
PC100 7 9
1 1
PR64 BATT CONN.
2 2 1000PF
1K
+5VALWP
@BAS40-04 PR67
PD20 PC101 1K
@BAS40-04
Add by CT at 2/25 0.01UF
PR186 25 BATT_TEMP
@470 +5VALWP
PR187 3
@10K +5VALWP
PR69
1
200
PU11 2
PC150 @MAX4490
5
@100PF PQ108 INVPWR
@SI3443DV PD22
1 + @BAS40-04
4
3 -
3
2
1
PR188 3,5,20,25,26,32,33 SMD
@11K_1% + +5VALWP
G
D
D
PR189 PC152 PC153 PC151
2
3
2 @100K @0.1UF @10UF_1206_10V @47UF_D_6.3V 2
PR71
1
D
D
S
200
2
4 PD23
5
6
VREF
PR190 @BAS40-04
+5VALWP
3,5,20,25,26,32,33 SMC
0_0805
VIN
Change by James VMB
PCN2 PD24
1 BYS10-45
for NIMH battrey
1 issue.
3
2
1
3 PT2 PR227 PC190

2 @2.2K_0805 @0.47UF_0805 PR230 1
3 PC61 PC62 JBT0385-100805-4 PR229 @470 2
1
1
2 1000PF 0.01UF_0805_25V PC63 PC64 LI/NIMH# @0 3
DC JACK 1000PF 0.01UF_0805_25V PQ116
PR228 PD45 PC191 @2N7002
2
1
@0 2 @1SS355@1000PF
3 3 3
PC189 PQ115
2
P1 @1UF_0805 @2N7002
P1 VMB
PR211
22 PD25
@1SS355
VREF
LI-ION OVP 14.55V
PR88 10K 35 OVP# PR72
NI-MH OVP 17.55V
2 1
@1.2M_1% PR74
PR73
VIN PC163 @39K PR75 @1M_1%
0.1UF_25V_0805 PU4B
8
PR80 PR82 LM393 0
PR81
1M_1% 1 @324K_1% + 5 PR76
10K
PR79 2 7
ACIN 25,30
100K_1% 3 - 6 @1M
PU4A PQ25
@2N7002 PR83 PQ26
@100K_1% 1
8
PR85 2 NIMH/LI#
4
PR86 LM393 NIMH/LI# 35
3 + PR87 PC67 0 @1M 3
1 @100K PC66 @1000P PC65
22K PACIN 35,36
PR89 2 - @1UF_1206 @1UF_0805_16VPR84 @2N7002
32.4K_1%
25V
PC68
4
1000PF PD26 PR90

RLZ5.1B 10K
RTCVREF
2
4 4
PC69
0.22UF_0805_16V PR91
100K

CUSTODY OF THE COMPETENT DIVISION OF R &D DEPARTMENT EXCEPT AS SCHEMATIC, M/B LA-733
INC. Date: Wednesday, August 29, 2001 Sheet 38 of 47
A B C D E
A B C D E
HOLEA : Hole 3mm +0mm -0.05mm, With ring 8mm PTH

For HDD
HOLEB : Hole 3mm+/- 0.05mm, With ring 8mm, NPTH
HOLEC : Hole 4.5mm, NPTH H7 H13 H11 H8
HOLED : Hole 5.2mm, with ring 8mm PTH HOLE_HDD_D3 HOLE_HDD_D3.5 HOLE_HDD_D3.5 HOLE_HDD_D3.5
1
1 1
FD17 FD12 FD16 FD1 FD21 FD20

H4 H6 H5 H2 H9 H17 H3 H12 FMARK FMARK FMARK FMARK FMARK FMARK
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
1
1
1
PIIX4M TI1420 440ZXM
H1 H18 H19 H14 H16 H10 H15 FD19 FD11 FD4 FD8
FMARK FMARK FMARK FMARK
HOLEB HOLEC HOLEC_1 HOLED HOLED HOLED HOLED
1
1
1
For Tooling For Boss
SMC37N869 NS87570
2 2

FMARK FMARK FMARK FMARK FMARK FMARK FMARK FMARK FMARK FMARK FMARK FMARK
1
1
ESS 1988 OZ163
3 3
4 4

Title
B 4C
A B C D E
5 4 3 2 1
P.I.R. (1) LIST

D
Revision History D
Date: 2000/01/14 REV#: 0.2 Description: A1-TEST TO A2-TEST
1. PAGE 5 - R388, RP2, R71, R59 delete placement, U38 pin 18 connect to ground, Q2 changed value to SI2302DS.
2. PAGE 6 - R346, R350, R347 delete placement and Y3 and Y4 both pin 2 direct connection U9 pin 25. L27, C371, C373 delete placement and U9 pin 7 and 30
direct connection +3V power.
3. PAGE 6 - R336, R357, R345, R112 delete placement and RP56 pin 16 change connection signal from "VGA_SUS_STAT#" to "SUSTAT1#", RP56 pin 1 signal
short to "VGA_SUS_STAT#" signal, Q59 (SI2302DS), R452 (10K) add for Intel's Geyserville issue.
4. PAGE 6 - "VR_HI/LO#" signal add R443 (10K) pullhigh to +3V power, "GT_SUSTAT1#" signal add R444 (10K) pullhigh to +3V power, R353 and R107 delete
placement, "SUSTAT1#" siganl add R445 (10K) pullhigh to +3V power.
5. PAGE 6 - R119 delete placement and RP19 pin 1 change signal from "IGNNE#" to "CPUINIT#", "PWRGD_CPU" signal of R356 serial D45 (RB751V) to "VR_POK"
signal.
6. PAGE 6 - U9 pin 29 change signal from "VR_POK" to "V_GATE", U9 pin 32 change signal from "V_GOOD" to "VR_POK".
7. PAGE 7 - R175 and R177 delete placement, R189 change connection signal from "RRAS#4" to "RRAS#2", R176 change connection signal from "RRAS#5" to
RRAS#3", R190 change connection signal from "RRAS#2" to "RRAS#4", R191 change connection signal from "RRAS#3" to "RRAS#5".
C
8. PAGE 7 - R192 pin 1 change connection U34 pin AC22, R184 pin 1 change connection U34 pin AF23. C
9. PAGE 9 - R83 and R338 delete placement, U34 pin M24 and pin F17 change power source from "+VCC_CORE" to "+VCPU_IO".
10. PAGE 10 - Signal "PCLK_SIO" add R427 (22) connection to U10 pin 11.
11. PAGE 11 - JP23 pin 61 change signal to "CLK_SDRAM3", JP23 pin 74 change signal to "CLK_SDRAM2", JP23 pin 69 change signal to "RRAS#3", JP23 pin
71 change signal to "RRAS#2", JP23 pin 62 change signal to "CKE3", JP23 pin 68 change signal to "CKE2".
12. PAGE 13 - U11 pin P16 change signal to "LID#".
13. PAGE 15 - U37 pin 148 used a 2N7002 to gatting leakage by "SYS_ALW" signal.
14. PAGE 17 - R398, R403, C494, R44, U42 delete placement, C465, C466, C467 change power source from +8VS to +5VS and serial L44 (HB1M2012-601JT) to
AVDD power, U3 pin 39 add R44 (10K) pullhigh to +3VS power, R1, R2, R3 changed value to 20K, R16, R17, R18 changed value to 24K.
15. PAGE 18 - R8, R7, R425, R426 change value to 22K, C22, C23, C503, C500 change value to 470PF, C6, C10, C510, C508 change value to 8200PF, C1, C4, C515,
C514 change value to 4700PF, C2, C3, C513, C509 change value to 150PF, C7, C11, C507, C502 change value to 68PF.
16. PAGE 19 - Audio AMP. changed to TDA8552, JP1 pin 3 add bais CKT (R429, R430, R428, C517), C9 delete placement and U43 pin 7 connect signal "MICIN",
Gatting internal MIC CKT changed to new one.
17. PAGE 20 - R258, R263, R267 delete placement, U32 pin 93 connect signal "SIORDY", U32 pin 12 connect signal "IRQ_15", U32 pin 12 connect signal
"SDDREQ", Q39 change value to 2N7002 and gate by "CD_PLAY_ON#", Q32, Q31 change value to 2N7002, U30 changed value to SI4800, R455 (100K),
Q60(2N7002) add part to control U30.
18. PAGE 21 - JP11 pin 44 change to no connection, JP11pin 21 serial R431 (82), JP11 pin 27 serial R432 (82), JP15 pin 27 serial R258 (82), JP15 pin 22 serial
B R267 (82). B
19. PAGE 22 - R322 and R160 both changed value to 5.6K.

20. PAGE 24 - C109 pin 2 change connection to L9 pin 2, JP6 pin 2 change connection to C109 pin 1 and signal "TV_GND".
21. PAGE 25 - U24 pin 94 changed to no connection.
22. PAGE 26 - U25 pin 2 and pin5 changed to no connection, U25 pin 9 connect signal "CD_PLAY", U25 pin 16 change connection signal "CD_PLAY_ON#".
23. PAGE 27 - Super I/O change to SMC37N869 CKT.
24. PAGE 28 - R278 and R207 delete placement.
25. PAGE 29 - U35 pin 4 change connection signal "VR_POK", U39 pin 13 add pullhigh R448(10K) to +3V power.
26. PAGE 30 - U18, U15, U17, U16 changed value to SI4800, Q11 changed value to SI3861, C202, C204, C203, C183, C184, C196 changed value to 4.7UF, C210,
C208, C294, R264, C182, C185, C299, R270, C309, C209, C207, C278, R255, C199, C195, C297, R265 delete placement.
27. PAGE 30 - R266, Q35, R47, Q1, C198, C190, R211, R209, Q14, Q16, C197, C194, C218, C215, R213, R212, Q17, Q18, C217, C216 delete placement.
28. PAGE 32 - Delete battery status LED CKT, signal "DRV0#" add level-shift CKT, JP12 changed pin difinition, JP9 pin 21 and pin 22 change to no connection,
JP9 pin 13 and pin 15 connect to "AGND", JP9 pin 14 change connection to signal "INT_MIC", JP9 pin 12 change connection to signal "HDDLED#" and add JP29
to support headphone board.
29. PAGE 33 - JP25 delete placement, JP26 pin 15, pin 17, pin 21, pin 23 direct connection to JP22 in page 31.
29. PAGE 17 - AVDD power supply change by MOS.
A A
Title
B 4C
5 4 3 2 1
5 4 3 2 1
P.I.R. (2) LIST

Revision History 02/25/2000
Date: 2000/02/14 REV#: 0.3 Description: A2-TEST TO B-TEST 1. Issue A2C008 : Can't mute completely (Page 20)
- add resistor divider R1(20K-serial), R16 (24K-to AGND) on INT_CD_L
D
- add resistor divider R3(20K-serial), R18 (24K-to AGND) on INT_CD_R D
- add C502 (1UF_0603) to decouple the small signal of INT_CD_L

1. PAGE 6 - Q12 (GCL_SI2302DS) swap pin 1, 3.
- add C503 (1UF_0603) to decouple the small signal of INT_CD_R
2. PAGE 6 - U10 (GCL_AMI11686-001) pin 32 and R304 (10K) changed connection net to "G_VR_POK", R304 changed pull-high power source from
+3V to +3VS. - add R426,R427 (both @10K) on INT_CD_L small signal voltage divider to be 2.5V (reserved)
3. PAGE 10 - R127 changed value from 22 to 10 Ohm, C121 (33PF) change to reserved in PCB. - add R428,R429 (both @10K) on INT_CD_R small signal voltage divider to be 2.5V (reserved)
4. PAGE 17 - R44 changed value form 33 to 10 Ohm, C38 changed value from 22 to 15PF. - add R436,R437 (both @10K) on LEFT_EQ and RIGHT_EQ for noise improvement (reserved)
5. PAGE 17 - Audio has one clean power source changed to two, one (+5VAMP) for AMP. and EQ, other (AVDD) for CODEC. - add R432,R433 (@24K,@20K) on CDROM_L for noise improvement (reserved)
6. PAGE 18 - R8, R215, U1 and U21 changed power source from +5VCD to +5VAMP. - add R434,R435 (@24K,@20K) on CDROM_R for noise improvement (reserved)
7. PAGE 19 - U2 changed power source from +5VCD to +5VAMP. 2. Correct CD-ROM CD_AGND pin assignment (page 21)
8. PAGE 19 - Q6 pin 3 add a serial resistor (2.2K) to connect JP1 pin 3 and 2. - change JP16 pin4 connection from CD_AGND to GND
9. PAGE 20 - Q42, Q43 and Q32 swap pin 1 and 3, U33 (OZ163) pin 56 change 1K pull-down ground to 10K pull-high +5VCD of R366. 3. No load D20(level shift gate for VR_POK) for Geyservelli inside (page 6)
10. PAGE 25 -U41 (87570) add "FIR_PRE#" signal at pin 84, RP56 (8P4R_10K) add "FIR_PRE#" signal at pin 5 and "BT_PRE#" signal at pin 7. 4. Add amplify mute AMP_MUTE for reservation only (page 17,19)
11. PAGE 26 - "PLAYBTN#", "REVBTN#", FRDBTN#, STOPBTN#, "DJ_ON/OFF#", VOL_UP#, VOL_DW# and "CONA#" signals add RP55 pull-high array. - add Q54 (@FDV301), R430(@100K), R431(@10K)
12. PAGE 27 - R205 change value from 33 to 10 ohm, C176 change value from 10 to 15PF. - AMP_MUTE was inverse from the output of ESS1988 pin63
13. PAGE 27 - U15 pin 81 changed to connect to "DTRA#" signal, pin 80 changed to connect to "CTSA#" signal, pin 79 changed to connect to "RTSA#" - AMP_MUTE was connected to TDA8552TS pin5
signal, pin 78 changed to connect to "DSRA#" signal, pin 77 changed to connect to "TXDA", pin 76 changed connect to "RXDA" signal, pin 83 changed to 5. Add M_SEN# for CRT monitor detection (page24,25)
connect to "DCDA#" signal.
- add D45(DAN217), R425(100K), C371(68PF)
14. PAGE 29 - U8 pin 11 changed to connect to "FIR_PRE#" signal.
- M_SEN# was coming from JP11 pin11
15. PAGE 29 - U8 (MAX708) pin 1 changed to connect to "G_VR_POK" signal, R283 changed value from 240K to 113K and pin 1 changed to connect to
+3VS power, , U8 (MAX708) pin 5 serial a resistor (2.2M) to R283 pin 2. - M_SEN# was going to EC pin83
16. PAGE 29 - U26F (74LVC14) pin 13 add one +5V RC delay CKT. 6. Exchange IR module pin11 and pin13 (page 28)
17. PAGE 32 - JP12 pin 17 changed power source from +5VS to +5VALW, JP12 pin 17 changed signal from NC to "DOT_PRES#", JP9 pin 25 changed - pin11 will be GND
signal from "ON/OFFBTN#" to "ON/OFF" (Old components' references). 7. Add CP8,9,10,11,12,13 (@8P4C_22PF) on keyboard signals for reserve(page 29)
C C
18. PAGE 33 - JP26 pin 80 and 82 changed power source from +5V to +5VALW.
8. Change MAX708 to be MAX6342 for cost improvement (page 29)
9. Delete three beads HB1M1608-121JT on Mini-PCI connector pin28,19,123 (pass through) (page 31)
02/18/2000 10. MD_BITCLK improvement for EMI (page 17,31)
1. SpeedStep Workarond for CPU_STP# timming (page 6) - add R423(22 ohm) serial on MD_BITCLK(nearby ESS1988)
- add D19 (@RB717), pin1 connect CPU_STP#, pin2 connectVRCHGNG#, pin3 connectGCL_CPUSTP# - add R424(10 ohm), C501(15PF) AC termination on MD_BITCLK (nearby Mini-PCI CN)
2. Remove CPU_LO/HI# pull high (CPU had internal pull high) (page 6) 11. Internal PS2 signals add two decouple CAPs for EMI improvement
- no load R100 (@GCL_1.5K) - C499(@22PF) on PS2_CLK - C500(@22PF) on PS2_DATA
3. Reserve 14.318MHz from Clock generator to Geyserville control logic (page 6,10) 12. Dot-Matrix connector change from 30 pins 0.5 pitch to 24 pins 1.0 pitch (page 32)
- add R298 (@GCL_0) serial on the trace 14.3M_GCL 13. Switch Board change pin definition for Inverter Power (page 32)
- U11 pin26 add a serial R114 (@22) on 14.3M_GCL - JP10 pin3,4,5,6 change from +5VS to be INVPWR - JP10 pin21,22 change from NC to be +5VS
4. Remove North Bridge TESTIN# pull high (according to updated RDDP) (page 7) 02/29/2000
- no load R329 (@10K) 1. Modify the references of some components for easy layout
5. No connection DCLKRD input of the North Bridge (arrording to RDDP) (page 6) - R433 <=> R1 => R433=20K,R1=0 ohm
- let U31 pin AB22 to be NC - R432 <=> R16 => R432=24K,R16=@24k
6. Change AGPREF to meet RDDP (page 8) - R435 <=> R3 => R435=20K,R3=0 ohm
- R152 change value from 1K_1% to be 3.48K_1% - R434 <=> R18 => R434=24K,R18=@24K
- R154 change value from 2K_1% to be 2.32K_1% 2. Scheme correct (page 6)
7. Redundance ECC serial resistors remove (page 12) - D19 pin3 change net from GCL_CPUSTP# to CPU_CPU_STP#
- no load RP47 (@16P8R-10) - D20 pin1 add a output module VR_POK for external connection
8. Improve PIIX4 32KHz crystal RC value for more reliable (page 13) 3. A2H001 & A2C045 (CD-ROM copy compare fail & low performance)
B
- R172 change value from 1M to be 22M - IRQ14 damping R306 change from 82 ohm to 33 ohm B
- C164,C165 change value from 22PF to be 12PF - IRQ15 damping R333 change from 82 ohm to 33 ohm
9. MIC circuit improve (page 19) - PIORDY damping R309 change from 82 ohm to 33 ohm
- add a serial R53 (2.2K) on Q6 pin3 - connect JP24 pin2,3 together - PIORDY pull high R311 change from 1K ohm to 10K ohm
- no load U22,C8,C239,C240,R234 - change R23 from 27K to be 0 ohm - SIORDY damping R378 change from 82 ohm to 0 ohm
- change R29 from 10K to be 0 ohm - change C20 from 1UF to be 0 ohm - SIORDY pull high R341 change from 1K ohm to 10K ohm
- change R32 from 2K to be 2.2K - add Q1 (2S2411EK) just like Q56 but only pin3 connect to R32 pin1 - PDDREQ damping R320 change from 82 ohm to 33 ohm
10. For layout space improve (page 20) - CD_DREQ damping R380 change from 82 ohm to 33 ohm
- C429 change value from 10UF_10V_1206 to be 1UF_0603 03/01/2000
- R359 change from 10K to be 100K 1. Add MUTE function for amplify (page 17,19,26)
11. CD_AGND improvement (page 21) - add "MUTE" signal on U3 pin63
- add R356 (0_0603 ohm) between CD_AGND & GND (at the middle of the trace) - add "EC_MUTE" signal on U39 pin5
- add R288 (0_0603 ohm) between CD_AGND & GND (close CD-ROM module) - add U47 (NC7ST32-SC70) to "OR" "MUTE & "EC_MUTE"
12. Modify BlueTooth connector definition (U47 pin1 = "MUTE", pin2 = "EC_MUTE" , pin4 connect to U2(Amplify) pin5)
- pin 1 : NC -> BT_DET - pin 6 : GND -> BT_ON# - add C504(0.1UF) for U47 power decoupling
- pin 3 : NC -> BT_WAKE_UP - pin 8 : NC -> BT_PRE# - add R438(0 ohm) serial on "EC_MUTE" for reserve only
- pin 7 : NC -> BT_USB1_D+ - pin 10 : BT_PRE# -> GND - no load R36 to be @0 ohm (original pull down on U2 pin5
- pin 9 : NC -> BT_USB_D- - pin 12: BT_WAKE_UP -> TO_USB1_D+ 2. Add some CAPs for noise cross reference (help for EMI & signal quality)
- pin 13 : NC -> BT_RST# - pin 14 : NC -> TO_USB1_D- - for PCI BUS on +3VS,+5VS : C505,C508 (0.1UF) ; on +3VS,+3V : C510,C511 (0.1UF) ;
- pin 16 : BT_ON# -> GND on +3VS,+3VALW : C513 (0.1UF) on +3V,+3VALW : C515 (0.1UF)
- pin 18 : BT_RST# -> NC - for CD-ROM IDE BUS on +3V,+5VS : C512 (0.1UF) ; on +3VS,+3V : C514 (0.1UF) ; on +5VS,+5VCD : C516 (0.1UF)
A
- pin 20 : BT_DET -> NC - for HDD IDE BUS on +3VS,+3V : C506 (0.1UF) ; on +5VS,+3V : C509 (0.1UF) A
- add R317,R324,R318,R325 (0 ohm) & R316,R323,R319,R326 (@0) - for AGP BUS on +3V,+3VS : C507 (0.1UF)
for USB1 signals switching (BlueTooth or non-BlueTooth) 03/08/2000
1. Improve EQ quality (page 18)
- R31,R231 change from 120K to 12K - R28,R233 change from 1M to 180K - C7,C10,C229,C234 change from 68PF to 0.22UF
- R27,R223 change from 120K to 20K - R24,R226 change from 1M to 270K
- R213,R12 change from 120K to 16K - R13,R217 change from 1M to 240K
Title
Compal Electronics, inc. - R218,R214 change from 120K to 24K - R11,R221 change from 1M to 330K
SCHEMATIC, M/B LA-733 - R227,R232 change from 120K to 1.5K - R25,R229 change from 1M to 24K
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE Size Document Number Rev - C21,C22,C235,C237 change from 470PF to 3300PF - C6,C9,C228,C230 change from 8200PF to 330PF
4C
- C1,C4,C222,C223 change from 4700PF to 5600PF - C2,C3,C224,C227 change from 150PF to 180PF
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D
Revision History D
Date: 2000/03/23 REV#: 0.4 Description: B1-TEST TO B2-TEST

03/23/2000 03/30/2000
1. Correct ON/OFF button signal for PIIX4 (page 13) 2. MODEM can't work was caused by the mal-reset of MD_RST# (page 31)
- D9 pin1 change connection from ON/OFFBTN# to ON/OFF - add R462 @0 for MD_RST#
2. Correct DM_ON signal for OZ163 direct CD-PLAY function (page 20) - add R463 0 for PCIRST# (default)
- change D26 pin1 from CD_PLAY_ON# to DM_ON 3. CMOS data lost (caused by +5VALW undershoot too big while unplug the AC) (page 34)
3. Correct Bluetooth power supply (page 24) - change PD8 from BYS10-45 to RB051L40 (the same as PD30)
- JP20 pin15,17,19 change connection from +3VS to +3VALW 4. IRQ8 need to pullhigh (because BIOS change the programming method) (page 13)
- JP20 pin18,20 change connection from N.C. to +5VALW for USB hub on Bluetooth module - load R167 1K
4. Add a option resistor for G_VR_POK for 733L while Geyservilli ASIC was no load (page 6)
- add R448 L@0, pin1 connect V_GATE, pin2 connect G_VR_POK
04/05/2000
1. Speed up the +3V discharge time (page 30)
5. For Factory ATE testing (page 6)
- R371 change from 470 ohm to 33 ohm
C
- change R117,R121 from LN_0 to LN_1K C
- add R447 LN_1K on U10 pin43

6. Improvement for Issue A2C008 (page 20)
- change R432,R434 from 24K to 33K
- add C517,C518 1UF_0603 serial in front of the EQ for LEFT_EQ & RIGHT_EQ respectively
7. Improve the reserved "MUTE" function (page 19)
- add R445 100K
- add D46,D48,D49 RB751V
- add R444 @0
- add C526 @.1UF
- add U48 @NC7ST32
- no load R43,R33 to be @100K
- no load R235 to be @10K
03/28/2000
B 1. Reserve Pull high for VID[0..4] (page 5) B
- add RP65 @8P4R-4.7K & R461 @4.7K

2. Improve PCI signal quality (add damping resistors)
- for miniPCI : add RP60,RP61,RP62,RP63,RP64,Rp66 16P8R-33 ohm (page 31)
- for miniPCI : R453,R454 33 ohm & R450R452,R449,R451 10 ohm (page 31)
- for PCI1420 : R458,R459,R460 10 ohm (page 15)
- for ESS1988 : R455,R456,R451 10 ohm (page 17)
3. Add pad junction for TV_GND for EMI request (page 24)
- add JOPEN6 2MM for TV_GND
03/30/2000
1. FIR module change from HP3600 to VISHAY TFDS6101E (page 28)
- change R286 from LN_2.2_1206 to @LN_3.3_1206 (change to be on load)
- change R97 from LN_560 to LN_0_0805
- delete R287 (original @0)
A A
- change R102 from original LN_0 to 100K
- change C111 from LN_220PF to LN_0.1UF
- delete C368 (original LN_0.47UF_16V_0805)
- change U9 from LN_HSDL_3600 to LN_TFDS6101E Title
- add R446 LN_3.3_1206 SCHEMATIC, M/B LA-733
- add C525 LN_100PF DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE Size Document Number Rev
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Revision History
D D
Date: 2000/04/20 REV#: 0.5 Description: B2-TEST TO B3-TEST

04/20/2000 05/03/2000
1. Correct MOS switch (74HCT4066) for switching headphone or Int. speaker (page 18) 17. Add more damping capicator in +VCPU_IO and VGTLREF_BX. (page 9)
- Add Q55 and Q54(2N7002) to use "HPS" signal to switching L-R channel. - add C541, C539, C540 (.01UF).
- Add R466 (10K) and R465 (10K) pullhigh +5VCD - add C538 (1UF).
- Add one MOS switch (74HCT4066) to switching L-R channel. - add R476 (1K).
- Add R464 (@0) and R464 (@0) only for reserved, that can bypass MOS switch. - add R477 (2K).
2. Add MOS to gatting MIC signal (page 19). - change value C532, C533 (4.7UF).
- Add Q58(SI2304DS) and Q59(2N7002) to disconnect MIC. signal. - change value C122, C142 (1UF).
- Add R470(100K) pullhigh resistor. 18. Add more damping capicator in +3V. (page 23)
- Add R471(10K) pulldown resistor. - add C534 (10UF).
- Add R473(@10K) pulldown resistor. 19. Modify and reserved for FAN control function. (page 30)
C
- Load R444(0), C526(.1UF) and U48(NC7ST32) for control "MUTE_AUD" signal - add C542 (@10UF). C
- No load R29(0). - direct to connect Q29 pin 2, U4 pin7 and C274 pin 2.
3. Add JOPEN for EMI (page 24) - remove R52 (0) and the resistor reserved for connect "EN_DFAN" signal and Q29 pin 2.
4. Add pullhigh resistor for "BIOSCS#" signal (page 25)
- add R472 (10K).
5. Add a diod to reserved for S/W (page 13)
- add D50 (@RB751V).
6. Add capicator on JP22 (RJ11) for EMI request. (page 31)
- add C529 and C529 (1000PF_2KV_1206).
7. Add capicator on JP10 "+5VCD" power pin for EMI request. (page 32)
- add C530(0.1UF).
8. Change EQ RC value. (page 18)
9. Add damping capicator C532 and C533 (1UF) on U31 power pin VTTA(M24) and
VTTB(F17) for WIN98 Multi-task will be halt. (page 9)
B - add C532, C533(1UF). B
10. Diconnect MIC Jack (JP24) pin 3 and pin 2 for EXT. MIC can't record voice.
(page 19)
11. Add capicator and change value for TV-OUT quility. (page 24)
- add C531(27PF).
- change C106 and C105 value (330PF).
12. Add CKT for gatting ME-OFF reset. (page 25)
- add Q56 and Q57(2N7002).
- add R468 (10K).
- add R469 (100K).
- add R474 (0).
13. Add resistor reserved for FAN control function. (page 30)
- add R475(@0).
14. Add +5VALW power pin at LCD status board connector (JP13) pin 15 and 34. (page 32)
15. Add ATE and function testing point.
A A
16. Change RC value for beep sound is very loud. (page 19)
- change value R266(10K_1%).
- change value C285(.22UF).
- "PCM_SPK#" signal change to connect U26 pin 5 and C306 pin 1 change to connect U26 pin 6. Title
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Revision History
D D
Date: 2000/06/15 REV#: 1.0 Description: B3-TEST TO C-TEST

05/20/2000
1. Fix high pitch noise issue (page 18)
- Add C543 and C544 (0.01UF).
2. Fix PO-PO sound noise when power on (page 19).
- Add Q62, Q63, Q64, Q65 (SI2304DS).
- Add Q61(2N7002).
- Add R480(100K).
3. Fix USB power leakage (page 28)
- Add Q60(SI2306DS).
- Add R478(100K).
4. Fix CD-direct play will into sleep mode after 2 second (page 20)
C
- Delete R362 (10K). C
- Add R364 (10K).

5. Fix 733 and 733C can't identify M/B (page 25)
- Add R479 (@10K).
6. For EMI change (page 32).
- Add C545, C546, C547, C548, C549, C550, C551 (220PF).
7. BOM change for EMI.
- C121 (@33PF --> 33PF) and R127 (10 --> 15 Ohm) for "48M" (page 10).
- C148 (@15PF --> 15PF) and R150 (@10 --> 33 Ohm) for "HCLK" (page 7).
- C163 (@22PF --> 22PF) for "DCLKO" (page 7).
- C160 (@22PF --> 22PF) for "GCLKO" (page 8).
- C169 (@10PF --> 22PF) and R187 (@33 --> 33 Ohm) for "DCLKO" (page 10).
- C444, C445, C460, C458 (@15PF --> 22PF) for SDRAM_CLK (page 11).
- R384, R385, R382, R383 (@33 --> 33 Ohm) for SDRAM_CLK (page 11).
8. Change value for FIR setting. (page 28)
B B
- R98 (0 --> 10K).
- R102 (100K --> @10K).
9. Delete double pullup in "CDLED#" signal (The signal already had R189 pullup in page 21). (page 26)
- R350 (100K --> @100K).
10. Fix unplug AC-IN in SPR then system shut down. (page 29)
- Q51 (2N7002 --> @2N7002).
11. Fix "GCLKO" signal waveform quility on the EA report. (page 8)
- R162 (10 --> 22).
12. Fix "PCLK_MINI" signal waveform quility on the EA report. (page 10)
- R120 (33 --> 15).
06/08/2000
13. Fix IR noise. (page 28)
- C110 (10UF_10V_1206 --> @10UF_10V_1206).
A A
06/15/2000
14. Fix "CLK_SDRAM2"~"CLK_SDRAM5" signal waveform quility on the EA report. (page 10)
- R346, R347, R348, R349 ( 22 --> 15 Ohm ).
Title
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Revision History
D D
Date: 2000/06/26 REV#: 2.0 Description: C-TEST TO MP-TEST

05/20/2000
11/03/2000 ( Modify for N32N-733B )
1. Fix winstone99 will be hang issue (page 4)
- Add C553(1UF), C554(1000PF) and C555(.01UF) for "CPU_IO" power. - Change C427,C428 from "10PF" to "BN_10PF".
- Change value C338, C288, C67, C63, C61 and C324 from 0.1UF to 1000PF for "CPU_IO" power. - Change C115 from "10UF_10V_1206" to "BN_10UF_10V_1206".
- Change value C344, C287, C68, C64 and C60 from 0.1UF to 0.01UF for "CPU_IO" power. - Change C111,C430,C432,C435 from ".1UF" to "BN_.1UF".
- Change value C62, C59 and C66 from 0.1UF to 1UF for "CPU_IO" power. - Change C525 from "100PF" to "BN_100PF".
2. Fix noise sound when plug-in headphone (page 17). - Change D25 from "1N4148" to "BN_1N4148".
- Add Q66(2N7002). - Change D26,D27,D28,D29,D30 from "RB751V" to "BN_RB751V".
- Add R481(33). - Change U33 from "OZ163" to "BN_OZ163".
3. Fix T.P mouse move cause audio noise (page 17) - Change U9 from "TFDU6101E" to "BN_TFDU6101E".
- Delete L17, L13 and L3 (0_0805). - Change JP13 from "HEADER24" to "BN_HEADER24".
C
4. Fix U2 pin 4 floting problem (page 19) - Change JP26 from "DOCKING 100" to "BN_DOCKING 100". C
- Add R482 (100K). - Change Q33,Q34,Q44 from "2N7002" to "BN_2N7002".

5. Fix +5VCD discharge slowly problem (page 20)
- Change R391 value from 470 to 33 Ohm.
6. Fix EA problem (page 10)
- Change value R346, R347, R348 and R349 from 22 to 10 Ohm for memory clock.
- Delete C121 (33PF) for 48M clock.
11/03/2000 ( Modify for N32N-733B )

1. BOM modified for N32N-733B (page 20,28,32,33)
- Change RP49 from "8P4R-10K" to "BN_8P4R-10K".
- Change RP48 from "10P8R_10K" to "BN_10P8R_10K".
- Change RP51,RP53 from "10P8R_4.7K" to "BN_10P8R_4.7K".
- Change RP52 from "@16P8R_33" to "B@16P8R_33".
B - Change RP54,RP50 from "@16P8R_0" to "B@16P8R_0". B
- Change R361 from "1M" to "BN_1M".

- Change R359,R394 from "100K" to "BN_100K".
- Change R361 from "1M" to "BN_1M".
- Change R360,R363,R364,R366,R367,R368,R98 from "10K" to "BN_10K".
- Change R102 from "@10K" to "B@10K".
- Change R355 from "1K" to "BN_1K".
- Change R375 from "5.6K" to "BN_5.6K".
- Change R374 from "47K" to "BN_47K".
- Change R97 from "0_0805" to "BN_0_0805".
- Change R446 from "3.3_1206" to "BN_3.3_1206".
- Change R369 from "33" to "BN_33".
- Change R370 from "@33" to "B@33".
- Change R379,R376,R377 from "@0" to "B@0".
- Change L41 from "HB1M2012-601JT" to "BN_HB1M2012-601JT".
A A
- Change X2 from "8MHZ" to "BN_8MHZ".
Title
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D
Revision History D
Date: 2000/12/20 REV#: 3.0 Description: C2-TEST for H1.6/MP-TEST for H1.5
12/20/2000
1. Fix C0-step after CPU (page 4)
- Change U7 P1 pin power source from "+VCPU_IO" to "+VCC_CORE".
2. Mini-PCI add 4 signal for 802.11b combo module (page 31)
- Add R483(10) for "REQ#0" signal on pin 21 of Mini-PCI connector (JP25) .
- Add R485(100) for "S_AD26" signal for IDSEL on pin 43 of Mini-PCI connector (JP25) .
- Add R484(10) for "GNT#0" signal on pin 22 of Mini-PCI connector (JP25) .
- Add R486(10) for "PME#" signal for 802.11b device on pin 36 of Mini PCI connector (JP25) .
3. Fix Microphone feedback sound issue
- Add new signal (AUTO_GAIN_CONTROL) output from U3 (ESS1988) pin 49 (Page 17) that connect U44 pin 4 (Page 26).
4. Capacitor change value to met Intel 1GHz CPU requirement (page 4)
C C
- C299, C300 change value from 1UF to 10UF.
- C292, C354 change value from 0.1UF to 10UF.
- C309, C350, C364, C361 change value from 0.01UF to 10UF.
- C298, C349 change value from 1000PF to 10UF.
12/26/2000 Power Change List For Hurricane 1.6

1. Use MAX1711 instead of AD3421 (Control PWM IC) and AD3410 (Driver) in CPU-CORE circuitry. (page 36)
2. One MOSFET (FDS7764A) is reserved for 21.1A peak current in 1GHz Intel CPU. (page 36)
3. PU14 is added for 2.5V CLK_VCC (The Linear regulator is included in AD3421 for original LA733 design). (page 36)
Date: 2000/02/02 REV#: 4.0 Description: MP-TEST

B 02/02/2001 B
1. Fix 1GHz CPU voltage transient issue (page 4)

- C555, C319, C326 and C303 change value from 0.01UF to 0.1UF.
- C554 and C325 change value from 1000PF to 0.1UF.
2. Del R97 (0 ohm_0805) because of PCB trace connected. (page 28)
02/02/2001 Power Change List For Hurricane 1.6

1. PR92 change value from 174K to 200K for "CPU_IO" voltage down from 1.58V to 1.5V. (page 37)
2. PR215 change value from 150K to 215K for current limit protection. (page 36)
3. Add PR226 (2.2 Ohm) for EMI requirement. (page 36)
4. Add PC184, PC185, PC186, PC187 and PC188 6 pcs capaciator those value all are 0.1UF_0805_25V for EMI requirement. (page 36)
5. Add one circuit for EMI requirement. (page 38)
- Add PQ116 (2N7002).
- Add PC190 (0.47UF_0805) and PC191 (1000PF).
A A
- Add PD45 (ISSS355).
- Add PR230 (470 Ohm).
- Reserved PR229 (0 Ohm), PR228 (0 Ohm) and PR227 (2.2K_0805).
- Reserved PQ115 (2N7002). Title
- Reserved PC189 (1UF_0805). SCHEMATIC, M/B LA-733
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D
Revision History D
Date: 2001/03/05 REV#: 4A Description: C3-TEST for H1.6/MP-TEST for H1.5

03/05/2001
1. Modify the Res.'s value to meet U36 NM24C16 2nd source's SPEC (Page 26) .
- R397,R398,R399 change value from 100K ohm to 1K ohm .
2. Modify the FIR related C.K.T. to fix the nun-work issue (Page 28) .
- Cut the connection between C115.2,C111.2,C525.2,U9.8 and GND signal .
- Connect C115.2,C111.2,C525.2,U9.8 to JOPEN11.1 .
- Connect JOPEN11.2 to JOPEN10.1 .
- Connect JOPEN10.2 to GND signal near C98 side .
3. Make a table to show the H1.5/H1.6 ID selection (Page 25) .
- Remove R416(10K ohm),R479(10K ohm) and add R420(10K ohm) when selected for H1.6 Celeron .
- Remove R416(10K ohm),R420(10K ohm) and add R479(10K ohm) when selected for H1.6 PIII .
C C
- Remove R479(10K ohm) and add R420(10K ohm),R416(10K ohm) when selected for H1.5 PIII .
- Remove R420(10K ohm) and add R479(10K ohm),R416(10K ohm) when selected for H1.5 Celeron .
4. Add three resistors for EMI solution (Page 17) .
- Add L17,L13,L3 (0 ohm 0805) to fix the EMI issue .
03/09/2001
1. Add R488 10K ohm Res. for platform ID (Page 25) .
- C3-test (REV:4A) M/B lose it . It will be put into REV:4B M/B and rework on REV:4A .
03/19/2001
1. Return the making table for showing the H1.5/H1.6 ID selection action (Page 25) .
- Add R416(10K ohm),R479(10K ohm) and remove R420(10K ohm) when selected for H1.6 Celeron .
- Add R416(10K ohm),R420(10K ohm) and remove R479(10K ohm) when selected for H1.6 PIII .
- Remove R479(10K ohm) and add R420(10K ohm),R416(10K ohm) when selected for H1.5 PIII .
B - Remove R420(10K ohm) and add R479(10K ohm),R416(10K ohm) when selected for H1.5 Celeron . B
2. Cancel R488 10K ohm Res. rework for platform ID (Page 25) .
- C3-test cancel the R488(10K ohm) rework for platform ID selection action but still reserve that to connect GND on REV:4B PCB for future .
3. Change PR181 from 22uF_6.3V Tan. Cap. to 22uF_10V Ceramic Cap. for ME (Page 36)
.
03/21/2001
1. Add CAP to fix FIR issue (Page 28) .
- Add C556(22U_10V_1206) to close C111 ASAP on REV:4B PCB . Put C556 to close C111 on REV:4A PCB by rework this time .
A A
Title
B 4C
5 4 3 2 1
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A B C D E

N32N LA-733 REV. 4A SCHEMATIC DOCUMENT

Compal Electronics, inc.

Gerserville Coppermine (uPGA2) CPU

Board, FDD, CLK_SDRAM(0..3)

CONN.page 32 page 11,12 +3V

14M_5V DC-DC Screw Hole

FIR FDD KBD page 34,36,37,38

BIOS PS/2 SM Bus Compal Electronics, inc.

AA18 APIC C6 Signal name Default Mode Software Debug Mode

PICD0 LOCK# TDI 1K PULL-DOWN 150 PULL-UP TO +CPU_IO

TCK 1K PULL-DOWN 1K PULL-UP TO +CPU_IO

1K COPPERMINE SOCKET +VCPU_IO TMS 1K PULL-DOWN 1K PULL-UP TO +CPU_IO

7 HIT# R85 R109 TDO X 150 PULL-UP TO +CPU_IO

C329 C315 C357 N9 AA6

P8 VCC VCCT W17

2 C98 C366 C103 C109 C94 2

T16 VCC VCCT G7

10UF_10V_1206 10UF_10V_1206 10UF_10V_1206

VID4 VID3 VID2 VID1 VID0 +VCC_CORE

Compal Electronics, inc.

26,36,37 VR_ON 15 VR_ON GHI# 10

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL Title

CRESET# M26 AF23 CKE3_BX R1961 2 33

AE23 CRESVB DCLKO AB21 1 2 DCLKO 10

place closely to 443zx Add by Charles

Compal Electronics, inc.

13,14,31 FRAME# 1R314 0 2 FRAME#_BX E2 FRAME# GFRAME# W3 GFRAME# 23

PCI ARB & PWR MGT

place closely to 443zx N3 3.48K_1% R328 8.2K

R143 1K R331 8.2K

C128 1000PF .01UF 1UF 2.32K_1% PIPE# 1 2

MEMORY DATA BUS

HOST DATA BUS

.01UF .01UF 1UF 1UF

Compal Electronics, inc.

CLOCK GENERATOR & BUFFER

13,25 SUSA# 2 W48C111-17

Charles at CLK_SDRAM5 23 1 2 CLK_SDRAM5 11

Compal Electronics, inc.

SO-DIM 144 PINS RAM MODULE CONN.

SO-DIM 144 PINS RAM MODULE CONN.

RP47 change to be no load. 2/16 2

Placement near to 440ZXM Compal Electronics, inc.

C/BE3# OC0# OVCUR#0 28,33

R172 22M 15PF

12PF 12PF +3V R177 @100K

+3VS FOR PIIX4 +3VS

+3VS +3VS +3V

Compal Electronics, inc.

Add by Charles at 1/4

16 S2_CE1# 28 B_CE1#/CC/BE0# A_CE1#/CC/BE0# 94 S1_CE1# 16

16 S2_RST B_RESET/CRST# A_RESET/CRST# PCM_INTA#

1 2 S2_VCC 1 2 SIRQ 13,14,27 1 2 +3V

PCMCIA POWER CTRL.

Compal Electronics, inc.

GD3 / ECLK / VOLDN#

GPIO12 / PCGNT# / GTO# / GS0

GPIO5 / ISLR / GS0 / GT0#