C E L E B R AT I N G 1 5 Y E A R S O F E X C E L L E N C E I N V L S I T R A I N I N G

Online VLSI
Design Methodologies
1L+
Global Learners

Industry Experts Certification Mobile App Value for Money

O N L I N E V L S I D E S I G N M E T H O D O LO G I E S E L E A R N . M AV E N - S I L I C O N . C O M

MAVEN SILICON Maven Silicon is a leading provider of VLSI training for students and professionals. We offer a
range of high-quality VLSI training programs and internships, taught by experienced industry
professionals, aimed at helping engineers to upskill and advance their careers in the
fast-growing Semiconductor Industry. From digital design and verification to physical design
and design for testing, Maven Silicon covers a wide variety of topics along with labs and
projects through Industry standard EDA tools. Our state-of-the-art training facilities,
coupled with innovative training methods, provide students with hands-on experience and a
strong foundation in the latest VLSI technologies. Our curriculum is designed to meet the
demands of the industry and is constantly updated to keep pace with the latest advance-
ments. In addition, Maven Silicon offers flexible scheduling options and customized training
programs to accommodate student's busy schedules.

With a commitment to excellence and a passion for empowering students and professionals,
Maven Silicon is dedicated to providing the highest quality hands-on training to help
engineers reach their full potential in the Semiconductor industry.

My vision is to create an excellent learning ecosystem of

superior technical expertise, hands-on training experience,
and industry-oriented courses with innovative learning
processes.

For more than 15 years, Maven Silicon has been a benchmark

for the VLSI training ecosystem in India, offering high-quality
VLSI training courses for VLSI aspirants, professionals, and
organizations across the globe.

Sivakumar P R
Founder and CEO

Our CEO, Sivakumar P R, has 25+ years of experience in the engineering and semiconductor industries. He has worked as a Verification
Consultant in the top EDA companies like Synopsys, Cadence, and Mentor Graphics. During this tenure, he worked very closely with
various ASIC and FPGA design houses and helped them to use the EDA solutions effectively for the successful tape-outs of multi-million
gate designs.

To know more about our CEO, visit https://www.linkedin.com/in/sivapr/

C O P Y R I G H T 2 0 2 4 M AV E N S I L I C O N , A L L R I G H T S R E S E R V E D
O N L I N E V L S I D E S I G N M E T H O D O LO G I E S E L E A R N . M AV E N - S I L I C O N . C O M

COURSE CURRICULUM

Online VLSI
Design Methodologies
04 Modules

Introduction to VLSI Verilog HDL - RTL Coding and Synthesis Verilog Mini Project RTL Coding and Synthesis
MODULE IV

Module I Continued... Module IV

VLSI Design Flow Verilog Operators Project Specification Analysis

ASIC Vs FPGA Logical operators Understanding the architecture
RTL Design Methodologies Bitwise and Reduction operators Module-level implementation and
VLSI Design Flow Steps Concatenation and conditional verification
Relational and arithmetic Building the top-level module
Shift and Equality operators
Operators precedence
Digital Design
Assignments Free Course Access
Module II
Type of assignments Digital Design - Hands On
Introduction to Digital Electronics
Arithmetic Circuits Continuous assignments
Verilog HDL - Hands On
Timing references
Data processing Circuits
Procedures
Combinational Circuits - Design and
Analysis Blocking and Non-Blocking
assignments Reference Materials
Latches
MODULE III and Flip flops
Shift Registers and Counters Execution branching
Sequential Circuits - Design and Tasks and Functions
Analysis
Live Q&A Sessions
Memories and PLD Finite State Machine
Finite State Machine Basic FSM structure
Moore Vs Mealy
Common FSM
coding styles
Registered outputs
Verilog HDL - RTL Coding and Synthesis

Module III Advanced Verilog for Verification

Introduction to Verilog HDL System Tasks

Compiler directives
Applications of Verilog HDL
Internal variable
Verilog HDL language concept
monitoring
Verilog language basics and
File input and output
constructs
Abstraction levels Synthesis Coding Style

Data Types Unwanted latches

Synthesizable operators
Type Concept
RTL coding styles
Nets and registers
Non-hardware equivalent Synthesis errors
variables
Arrays

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Your Career
Path

Maven Online VLSI Course

Upgrade to Advanced ASIC Verification Course/Advanced

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