Interrupts

An interrupt is a signal generated by an event that alters the sequence in which a

processor executes instructions. There are times when a process needs the attention of the
CPU, even though another process might have its attention. Interrupts are generated from
some device or source seeking the attention of the processor. The interrupt signal is sent
along a control line to the processor, and the currently executing program is suspended
while control is passed to an interrupt service routine.

Interrupt Handling
Interrupts are generated by the hardware of the computer system but are initiated by either
the currently running process or by some event which may or may not be related to the
currently running process. Sometimes, depending on the type of interrupt, the CPU will ignore
the interrupt temporarily so that it can complete the current job as quickly as possible. An
interrupt might occur
✔to signal to the CPU that there is something so important that it cannot be ignored and
must be dealt with immediately regardless of the other tasks at hand;
✔To let the CPU know that it has finished a task.
When an interrupt occurs, the operating system saves the state of the interrupted process
and passes control to the appropriate routine.

Types of Interrupt
- Interrupts generated by the running process. The process might need to perform I/O,
obtain more storage or communicate with the operator.
- I/O interrupts are initiated by the I/O hardware and signal to the CPU that the status of
a channel or device has changed. An I/O interrupt will occur when an I/O operation is
completed, when an error occurs or when a device is made ready.
- Timer interrupts are generated by a timer within the processor, and allow the operating
system to perform certain functions at regular intervals. For example, each user in a
multi—user system may be allocated a certain amount of processor time before a timer
interrupt is generated and control of the processor passes to the next user in turn.
- Program interrupts are caused by program errors such as division by zero.
- Machine check interrupts are caused by malfunctioning hardware.
- External Interrupts are caused by an external source such as the computer operator,
external sensor or monitoring device, or another computer. External interrupts are a
mechanism for I/O devices that communicate infrequently with the CPU to get the
attention of the CPU. Rather than have the CPU constantly check to see if the I/O device
needs attention - polling; the device interrupts the CPU. These could be caused by the

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 interval timer on expiry of a time-slice, or the operator pressing an interrupt key, or the
receipt of a signal from another processor on a multiprocessor system.
- Restart Interrupts occur when the operator selects the restart function or presses the
restart button
How the interrupt mechanism works
There is a special register in the CPU called the interrupt register. At the beginning of the
fetch-execute cycle, the interrupt register is checked. Each bit of the register represents a
different type of interrupt, and if a bit is set to 1, a context switch occurs.

A Context Switch is an action performed by the operating system to remove a process from
the run state and replace it with another.

The following steps are taken during a context switch

1. save the complete state of the current process in the process control block (PCB);
2. Select the next process to run: OS routes control to the appropriate Interrupt
Handler. A different Interrupt Handler is provided for each different source of
interrupt.
3. Restore the complete state of the ready process.

A typical sequence of actions when an interrupt occurs would be:

1. The current fetch-execute cycle is completed
2. The contents of the program counter (PC), (a register) which points to the next
instruction of the user program to be executed, must be stored away safely so it can
be restored after servicing the interrupt.
3. The contents of other registers used by the user program are stored away safely for
later restoration.
4. The source of the interrupt is identified
5. Interrupts of a lower priority are disabled
6. The program counter is loaded with the start address of the relevant interrupt service
routine
7. The interrupt service routine is executed
8. The saved values belonging to the user program for registers other than the program
counter are restored to the processor’s registers.
9. Interrupts are re-enabled
10. The program counter is restored to point to the next instruction to be fetched and
executed in the user program.