UNIVERSITI KUALA LUMPUR

ASSESSMENT BRIEF

COURSE DETAILS
INSTITUTE UniKL BRITISH MALAYSIAN INSTITUTE
COURSE NAME SEMICONDUCTOR MATERIALS AND DEVICES
COURSE CODE BEB36403
COURSE LEADER DR MOHD AMIR ABAS
LECTURER DR MOHD AMIR ABAS, DR AZRAIE
SEMESTER & YEAR MARCH 2024

ASSESSMENT DETAILS
TITLE/NAME ASSIGNMENT
WEIGHTING 20%
DATE/DEADLINE 19/4/2024, 4.00PM
COURSE LEARNING CLO1: Describe type of semiconductor materials and their atomic structure
OUTCOME(S) in formulating various solid-state switching devices. (C2, PLO3)
INSTRUCTIONS Perform the following tasks:
1. You are required to prepare a report.
2. All answer must be in English Language only
The report must be written in English language only.

Student Name: ID: Group:

Assessor’s Comment: Marks:

Verified by: Course Leader [MOAA] QSC format PC/HOS content

Prepared by: [MOAA] verification validation

I hereby declare that all my team members have agreed with

this assessment. All team members are certain that this
assessment complies with the Course Syllabus.

Signature:
Date : 20/3/24
17 / 04 /2024
TASK NO CLO MARKING SCHEME MARKS
1 1 Correct calculation for energy gap 10

Correct total number of carriers and 10

explanation on the difference

Correct explanation on hot condition of pn

10
junction.

2 1 Correct resistivity
5
Correct size
5
3 1 Correct description on concentration of free 5
electron (cm -3) for Intrinsic silicon (dotted
line) and extrinsic silicon.
Correct explanation on pure silicon without 5
stability condition and extrinsic silicon with
stability condition
Correct description on good value of extrinsic 5
silicon
Accepted suggestion on performance 5
of microchip above stability condition
(3 1000T-1)
4 Correct description on electron movement for 5
no bias
Correct description on process of collision at 5
PN junction for biased condition
Correct descriptionon the concentration for C, 5
B and E and the size of the layer
Correct description on process of electron
movement when the channel is biased or 5
controlled by field.
Correct description on VG is positive while IG
is zero. 5
5 1 Correct size for the resistor ( 90 x 90 µm2) 5
Correct largest resistor value 5
Correct drawing for width and gap 5
 Assignment 1: Semiconductor Physic
In a production you are formulating a silicon diode structure for current rating 1 A. The
process begins with calculating the concentration of the doped Arsenic and followed with the
size of the silicon structure. The work emphasizing deep knowledge on electron and holes
density in semiconductor materials. They are functioning as carriers and generating current
flow in the materials. How much the amount of current is generated and what factors increase
the current flow? Hence to explore the knowledge write the process of formulation based on
the following example.

1. Energy band gap for silicon devices

a. A Si is doped with Arsenic 1017 As atom/cm3.

i. State the majority carrier in the new doped Silicon.

ii. Calculate minority carrier in the new doped Silicon.
𝑛
iii. Calculate − = 𝑘𝑇 ln 𝑒
𝐸𝐹 𝑛𝑖
𝐸𝑖
iv. Sketch the energy level EF - Ei in energy gap bridge

b. If the size of the doped silicon is 0.2 um (L) x 0.01 um (t) x 0.1 um (W)

i. Calculate the total of silicon atom and Arsenic atom in the structure.
ii. Calculate majority and minority carrier in the structure.
iii. Calculate the resistance, R, of the structure.
iv. Explain why minority carrier is less than intrinsic concentration (ni) after doping.

c. When the junction is supplied with large amount of current (overcurrent )

describe the following phenomena.
i. Iniatialy the diode is hot. Why the diode is hot.
ii. After few second the diodes is damaged. What happened to the atomic
structure of PN junction.
iii. Why this issue occurs in a diode when it is used in DC circuit but not in AC
circuit (Bridge rectifier).

2. The same amount of Boron (1017 atom/cm3) is doped into Silicon structure for
making p-type silicon. The length of the p-type silicon would ocuppy space of 1.3
µm. Assume hole mobility of the silicon is 450 cm2 V-1s-1.

I. Find the resistivity (𝜌) of the silicon

II. Roughly what would be the size of the P-Type silicon in allowing 1 A current
flow for 12 V DC. Assume the width and thickness are fixed for 0.1 um x 0.02
um respectively.
3. Read reference book of page 96 and 97 of Solid State Electronic Devices by
streeman. The graph shows a doped silicon characteristic againts temperature.
There are three conditions of characteristic in the doped silicon: ionized .
extrinsic and intrinsic. Explain the graph that representing the characteristic of
the two silicons
i. In ionization stage, the concentration of free electron (cm -3) for extrinsic silicon is
increasing when temperature increase. Explain the movement of electron at this low
temperature.
ii. When the temperature increase 10 (1000T-1 ) to 3 (1000T-1 ) the concentration of free
electron in extrinsic silicon is stable (10 15 cm -3 ) while in intrinsic silicon (dotted
line) it has no stabil condition. Why this stable state in extrinsic silicon is good for
semiconductor devices.
iii. At temperature 3 (high temperature) and above both silicons show same
characteristic (increasing higher) . What do you suggests the performance of
microchip at this condition.

Temperature

Figure 1: Carrier concentration vs temperature for Silicon doped with 1015 donors/cm3

4. Electron movement in Silicon

i. Figure 2 shows the movement of free electron in silicon. It is known as random
collision. Describe the process of the movement when there is no bias voltage.
ii. Explain the process of collision at PN junction when the junction is biased with
potential difference E v/cm
 iii. In BJT there is a condition known as Current Injection. Explain the detail on
biasing, concentration for C, B and E and the size of the layer.
iv. In FET difference strategy is used. The stucture use channel and Field concept to
control the channel. Explain the process of electron movement when the channel
is biased or controlled by field. In biasing why VG is positive while IG is zero.

Figure 2: Electron in Silicon Figure 3: Silion after biased

5. Design a Microchip Resistor

In microchip a metal with known resistivity is used to fabricate pasive components like
resistor.The design process could be implemented as the following example.

A thin film of metal is deposited on a chip surface and pattern in into a long strip to get
resistance between the end. The structure is folded as shown below to get the longest length
for the highest resistance.
Skecth the layout and calculate the largest reistance possible that would fit into an area of
100 x 100 µm2 using a metal ribbon 0.01 µm thick with resistivity 3.15 x 10 -6 Ωm with the
restriction that the metal track widths and gaps between them can be no smaller than 10 µm.