Acer Aspire 3 Quanta ZAS Rev 1A PDF

5 4 3 2 1
PCB STACK UP
LAYER 1 : TOP ZAS BLOCK DIAGRAM 01
LAYER 2 : GND1
DDR4 SO-DIMM Channel A0
LAYER 3 : IN1 Memory
STD P9
LAYER 4 : SVCC GFX
D D
LAYER 5 : IN2 Memory Down STONEY

Channel A1
LAYER 6 : IN3 P10 DIMM+Down:1600~1866 MT/s
FT4 (BGA769)
LAYER 7 : GND2
I2C-0 (Touch Pad)
LAYER 8 : BOT 15h (70h-7Fh) I2C
SATA - HDD SATA 0
SATA
P18
DP0
eDP/CCD/MIC CONN
SATA 1 DP P11
SATA - SSD USB2-3 (CCD)
P15
DP1 HDMI CONN
P12
USB3 Type-C CONN USB2 - 4

USB3.0 RJ45 CONN P13
(CC:TPS25810) P20 USB3 - 0 & 1 LAN+Card Reader
C GPP0 C
GPP RTL8411B P13
USB2 - 6
C.R. CONN P13
USB3 Con. USB3 - 2 X'TAL
P21 APU 25 MHz
BGA769 GPP1
USB2-2 (BT)
M.2
WLAN+BT w/ Debug
P17
USB2 CONN x2 FFC I/O Board CONN USB2-0 & USB2-1 USB2.0
Phone Jack
P21
USB2-2 (BT) GPP2 & GPP3 M.2
SATA 1 SSD
USB2-3 (CCD) P16
ROM 128 kB
3.3 V P15
USB2-4 (Type-c)
USB2-6 (USB3) P2,3,4,5,6,7,8

X'TAL
32.768 kHz
Vinafix
X'TAL 48 MHz
B
ODD CONN U2 to SATA USB2-7 (ODD) Power source B
P15 ASM1153 P15
X'TAL SPI
SPI ROM 8MB
25 MHz 1.8 V P6 BQ24737RGRR M5671RE1U
CLK Batery Charger P25 1.8V P31
RTC
BATT
P7 TPS51225R G9336ADJTP1U
Azalia HDA 3V/5V P26 0.775V P31
LPC G-Sensor
SMBUS
P19
G5335QT2U G5719CTB1U
TPM VDDP P27 1.5V P31
NPCT650 P19
AUDIO CODEC RT8231B TPS61087DRCR
ALC255-CG +1.2VSUS P28 12V(PANEL) P33
P14 EC
ROM 128 kB
IT8987E/BX PS/2 P24 3.3 V P24 P29, P30
RT3662AC
A CPU CORE / VDDNB A
Speaker DMIC
P14 P14 I2C-0
LED(DB) K/B CONN K/B BL CONN HALL SENSOR FAN CONN Touch Pad Reset Button
P21 P23 P23 P11
(PWM)
P23
CONN
P22 P24 Quanta Computer Inc.
PROJECT : ZAS
Size Document Number Rev
1A
Squirtle_SR SSID : 1192 Block Diagram
Date: Friday, April 07, 2017 Sheet 1 of 35
5 4 3 2 1
(CPU)
02
supporting both Gen 2and Gen 3 operation is 220 nF
U19B supporting Gen 3 operation only is 220 nF
PCIE supporting Gen 2 operation only is 100 nF
U4 P_GPP_RXP0 P_GPP_TXP0 D2 PCIE_TX0_C C353 0.1u/16V_4

[13] PCIE_RX0 PCIE_TX0#_C PCIE_TX0 [13]
LAN U5 P_GPP_RXN0 P_GPP_TXN0 D1 C350 0.1u/16V_4 LAN
[13] PCIE_RX0# PCIE_TX0# [13]
R8 P_GPP_RXP1 P_GPP_TXP1 C2 PCIE_TX1_C C355 0.1u/16V_4
WLAN R10 P_GPP_RXN1 P_GPP_TXN1 C1 C354 0.1u/16V_4 WLAN
VDDP_S0
R5 P_GPP_RXP2 P_GPP_TXP2 B2 PCIE_TX2_C C357 SSDP@0.22u/10V_4
SSD R4 P_GPP_RXN2 P_GPP_TXN2 B1 C356 SSDP@0.22u/10V_4 SSD
N4 P_GPP_RXP3 P_GPP_TXP3 A3 PCIE_TX3_C C359 SSDP@0.22u/10V_4
SSD N5 P_GPP_RXN3 P_GPP_TXN3 B3 C361 SSDP@0.22u/10V_4 SSD
Samsung SM951 (M.2 PCIE Gen3 SSD)

L5 P_GFX_RXP0 P_GFX_TXP0 A4
L4 P_GFX_RXN0 P_GFX_TXN0 B4
J5 P_GFX_RXP1 P_GFX_TXP1 A5
J4 P_GFX_RXN1 P_GFX_TXN1 B5
VDDP_S0
G5 P_GFX_RXP2 P_GFX_TXP2 A6
G4 P_GFX_RXN2 P_GFX_TXN2 B6
D7 P_GFX_RXP3 P_GFX_TXP3 A7
E7 P_GFX_RXN3 P_GFX_TXN3 B7
VDDP_0.95V R40 196_1%_4 P_ZVDDP U8 P_ZVDDP P_ZVSS W8 P_ZVSS R36 196_1%_4
SP@AMD_SR_FT4
Quanta Computer Inc.

PROJECT : ZAS
1A
FT4 PCIE I/F(1/7)
(CPU) [9,10] M_A_A[13:0] M_A_A0
M_A_A1
M_A_A2
M_A_A3
AG38
W35
W38
W34
U19A
M_ADD0
M_ADD1
M_ADD2
M_ADD3
MEMORY
M_DATA0
M_DATA1
M_DATA2
M_DATA3
A34
B34
A38
B38
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ[0..63] [9,10]
03
M_A_A4 U38 M_ADD4 M_DATA4 A33 M_A_DQ4
M_A_A5 U37 M_ADD5 M_DATA5 B33 M_A_DQ5
M_A_A6 U34 M_ADD6 M_DATA6 A37 M_A_DQ6
M_A_A7 R35 M_ADD7 M_DATA7 B37 M_A_DQ7
M_A_A8 R38 M_ADD8
M_A_A9 N38 M_ADD9 M_DATA8 B41 M_A_DQ8
M_A_A10 AG34 M_ADD10 M_DATA9 C40 M_A_DQ9
M_A_A11 R34 M_ADD11 M_DATA10 F41 M_A_DQ10
M_A_A12 N37 M_ADD12 M_DATA11 G40 M_A_DQ11
M_A_A13 AN35 M_ADD13 M_DATA12 A40 M_A_DQ12
L38 M_ADD14/M_BG1 M_DATA13 B40 M_A_DQ13
[9,10] M_A_BG1 M_A_DQ14
L35 M_ADD15/M_ACT_L M_DATA14 E41
[9,10] M_A_ACT# F40 M_A_DQ15
M_DATA15
AJ38 M_BANK0
[9,10] M_A_BANK0 AG35 J40 M_A_DQ16
M_BANK1 M_DATA16
[9,10] M_A_BANK1 N34 J41 M_A_DQ17
M_BANK2/M_BG0 M_DATA17
[9,10] M_A_BG0 M_A_DQ18
M_DATA18 N40
[9,10] M_A_DM[7..0] M_A_DM0 B35 N41 M_A_DQ19
M_DM0 M_DATA19
M_A_DM1 D40 M_DM1 M_DATA20 H40 M_A_DQ20
M_A_DM2 K40 M_DM2 M_DATA21 H41 M_A_DQ21
M_A_DM3 T41 M_DM3 M_DATA22 M40 M_A_DQ22
M_A_DM4 AE41 M_DM4 M_DATA23 M41 M_A_DQ23
M_A_DM5 AL40 M_DM5
M_A_DM6 AU40 M_DM6 M_DATA24 R40 M_A_DQ24
M_A_DM7 BA37 M_DM7 M_DATA25 T40 M_A_DQ25
M_DATA26 W40 M_A_DQ26
M_DATA27 Y40 M_A_DQ27
B36 M_DQS_H0 M_DATA28 P40 M_A_DQ28
[9,10] M_A_DQS0 M_A_DQ29
A36 M_DQS_L0 M_DATA29 P41
[9,10] M_A_DQS#0 E40 V40 M_A_DQ30
M_DQS_H1 M_DATA30
[9,10] M_A_DQS1 D41 V41 M_A_DQ31
M_A_RST# [9,10] M_A_DQS#1 M_DQS_L1 M_DATA31
L40 M_DQS_H2
[9,10] M_A_DQS2 K41 AD41 M_A_DQ32
M_DQS_L2 M_DATA32
[9,10] M_A_DQS#2 M_A_DQ33
U41 M_DQS_H3 M_DATA33 AD40
C109 [9,10] M_A_DQS3 U40 AH41 M_A_DQ34
M_DQS_L3 M_DATA34
*0.1u/16V_4 [9,10] M_A_DQS#3 AF41 AH40 M_A_DQ35
M_DQS_H4 M_DATA35
[9,10] M_A_DQS4 M_A_DQ36
AE40 M_DQS_L4 M_DATA36 AB40
[9,10] M_A_DQS#4 AM40 AC40 M_A_DQ37
M_DQS_H5 M_DATA37
R98 [9,10] M_A_DQS5 M_A_DQ38
AM41 M_DQS_L5 M_DATA38 AF40
*10_5%_6 [9,10] M_A_DQS#5 AV40 AG40 M_A_DQ39
M_DQS_H6 M_DATA39
[9,10] M_A_DQS6 AV41 M_DQS_L6
[9,10] M_A_DQS#6 M_A_DQ40
BA36 M_DQS_H7 M_DATA40 AK41
[9,10] M_A_DQS7 AY36 AK40 M_A_DQ41
M_DQS_L7 M_DATA41
[9,10] M_A_DQS#7 M_A_DQ42
M_DATA42 AP41
M_DATA43 AP40 M_A_DQ43
M_DATA44 AJ41 M_A_DQ44
AC35 M_CLK_H0 M_DATA45 AJ40 M_A_DQ45
[9] M_A0_CLK0 AC34 AN41 M_A_DQ46
M_CLK_L0 M_DATA46
[9] M_A0_CLK0# M_A_DQ47
A0-DIMM AA34 M_CLK_H1 M_DATA47 AN40
[9] M_A0_CLK1 AA32 M_CLK_L1
[9] M_A0_CLK1# AE38 AT40 M_A_DQ48
M_CLK_H2 M_DATA48
[10] M_A1_CLK0 M_A_DQ49
A1-ON BOARD AE37 M_CLK_L2 M_DATA49 AU41
[10] M_A1_CLK0# AA37 AY40 M_A_DQ50
M_CLK_H3 M_DATA50
AA38 M_CLK_L3 M_DATA51 BA40 M_A_DQ51
M_DATA52 AR40 M_A_DQ52
G38 M_RESET_L M_DATA53 AT41 M_A_DQ53
[9,10] M_A_RST# M_A_DQ54
A0-DIMM AA41 M_EVENT_L M_DATA54 AW40
[9] M_A_EVENT# AY41 M_A_DQ55
M_DATA55
J38 M0_CKE0
[9] M_A0_CKE0 J34 BA38 M_A_DQ56
A0-DIMM [9] M_A0_CKE1 M0_CKE1 M_DATA56
M_A_DQ57
A1-ON BOARD L34 M1_CKE0 M_DATA57 AY37
[10] M_A1_CKE0 M_A_DQ58
J37 M1_CKE1 M_DATA58 BA34
M_DATA59 BA33 M_A_DQ59
AN37 M0_ODT0 M_DATA60 AY39 M_A_DQ60
[9] M_A0_ODT0 AU38 AY38 M_A_DQ61
A0-DIMM [9] M_A0_ODT1 M0_ODT1 M_DATA61
M_A_DQ62
A1-ON BOARD AL34 M1_ODT0 M_DATA62 AY35
[10] M_A1_ODT0 M_A_DQ63
AN34 M1_ODT1 M_DATA63 AY34
AL35 M0_CS_L0
[9] M_A0_CS#0 AR37
A0-DIMM [9] M_A0_CS#1 M0_CS_L1
A1-ON BOARD AJ34 M1_CS_L0
[10] M_A1_CS#0
AR38 M1_CS_L1
AJ37 M_RAS_L/M_RAS_L_ADD16
[9,10] M_A_RAS# AN38 M_CAS_L/M_CAS_L_ADD15
[9,10] M_A_CAS# AL38 +1.2VSUS
M_WE_L/M_WE_L_ADD14
[9,10] M_A_WE#
M_A_VREF AA40
TP72
TP70
M_A_VREFDQ Y41
M_VREF
M_VREFDQ M_ZVDDIO_MEM_S3 AB41 M_A_ZVDDIO R514 39.2_1%_4 Quanta Computer Inc.
R513 *1K_1%_4
+1.2VSUS
R512 *1K_1%_4 PROJECT : ZAS
SP@AMD_SR_FT4 Size Document Number Rev
only for DDR3 need mount FT4 DDR4 I/F(2/7) 1A

(CPU)
[29]
[29]
APU_SVT
APU_SVC
SVT need 0R in power side
R459
R464
*short_4
*short_4
APU_SVC_R
APU_SVD_R
H27
E27
D27
U19C
SVT
SVC
SVD
DISPLAY/SVI2/JTAG/TEST
DP_BLON
DP_DIGON
DP_VARY_BL
B23
B24
A24
APU_DIGON
APU_BLPWM
APU_DISP_BLEN [11,24]
VDD_18
+3V
R441
10K_1%_4
04
[29] APU_SVD
2
APU_SIC B30 D21 DP_AUX_ZVSS
1.8V
SIC DP_AUX_ZVSS R55 150_1%_4 LCD 3.3V
APU_SID B29 SID DP_ZVSS B18 DP_ZVSS R444 2K_1%_4 APU_BLPWM 1 3
APU_ALERT# A30 APU_DISP_PWM [11]
ALERT_L Q20
APU_PWRGD_D R456 HDT@0_5%_4 APU_PROCHOT# A31 G15 PJA138K
PROCHOT_L DP0_AUXP EDP_AUX [11]
C475 *0.1u/16V_4 DP0_AUXN H15 EDP_AUX# [11]
VDD_18 R455 *short_4 APU_PWRGD G25 PWROK DP0_HPD D15
[29] APU_PWRGD_SVID_REG 1.8V_S0 EDP_HPD [11]
APU_RST# D29 RESET_L
1.8V_S0 APU_DIGON R448 *short_4
G17 APU_DISP_ON [11]
DP1_AUXP
APU_SIC H17 HDMI_DDCCLK [12]
R483 1K_1%_4 DP1_AUXN 1.8V EN:>1.5V
APU_SID APU_TDI B25 D17 HDMI_DDCDATA [12]
R489 1K_1%_4 R452 C365 C371 TDI DP1_HPD HDMI_HPD [12]
R481 1K_1%_4 APU_ALERT#
*220_1%_4 *27p/50V_4 *27p/50V_4 APU_TDO A27 TDO
R493 1K_1%_4 APU_PROCHOT# APU_TCK B27 TCK DP2_AUXP G19
APU_TMS B26 TMS DP2_AUXN H19
R454 300_5%_4 APU_PWRGD APU_TRST# A29 TRST_L DP2_HPD D19
R477 300_5%_4 APU_RST# APU_DBRDY A26 DBRDY
FOR DEBUG, PLACE THESE CAPS CLOSE TO APU APU_DBREQ# A25 DBREQ_L DP0_TXP0 A9
EDP_TX0 [11]
DP0_TXN0 B9
EDP_TX0# [11]
DP0_TXP1 A10 eDP FHD
EDP_TX1 [11]
DP0_TXN1 B10
EDP_TX1# [11]
DP0_TXP2 A11
EDP_TX2 [11]
B11 eDP UHD
Serial VID
DP0_TXN2 EDP_TX2# [11]
DP0_TXP3 A12
EDP_TX3 [11]
DP0_TXN3 B12
EDP_TX3# [11]
DP1_TXP0 A14
VDD_18 +3V HDMI_TX2 [12]
D9 RSVD_1 DP1_TXN0 B14
HDMI_TX2# [12]
D11 RSVD_2 DP1_TXP1 A15 AMD DG HDMI
HDMI_TX1 [12] APU P0 - conn P2
D13 RSVD_3 DP1_TXN1 B15
VDD_18 VDDP_S0 HDMI_TX1# [12] APU P1 - conn P1
E4 RSVD_4 DP1_TXP2 A16 HDMI
HDMI_TX0 [12] APU P2 - conn P0
R494 E31 RSVD_5 DP1_TXN2 B16
HDMI_TX0# [12] APU P3 - conn CK
R471 R447 R62 10K_1%_4 H11 RSVD_6 DP1_TXP3 A17
HDMI_CLK [12]
5
*1K_1%_4 *1K_1%_4 *1K_1%_4 3V_S0 H13 RSVD_7 DP1_TXN3 B17
HDMI_CLK# [12]
L11 RSVD_8
3 4 APU_PROCHOT# AE34 RSVD_9 DP2_TXP0 A19
APU_SVT [24,25,29] CORE_PWM_PROCHOT# AM15 B19
RSVD_10 DP2_TXN0
APU_SVC Q23A PJT138K 1.8_S0 AM17 RSVD_11 DP2_TXP1 A20
APU_SVD AM19 RSVD_12 DP2_TXN1 B20
Q23B PJT138K AN8 RSVD_13 DP2_TXP2 A21
6 1 APU_ALERT# AP13 RSVD_14 DP2_TXN2 B21
R463 R450 [23] THERM_ALERT#
AP15 RSVD_15 DP2_TXP3 A22
*220_1%_4 *220_1%_4 3V_S0 (PU in FAN side) AP17 RSVD_16 DP2_TXN3 B22
AR13 RSVD_17
2
AR15 RSVD_18
AR17 RSVD_19 H29
TEST4 APU_TEST4
APU_TEST5 TP10
VDD_18 AU4 RSVD_20 G29
TEST5
AU13 H25 APU_TEST6 TP13
RSVD_21 TEST6
AU15 APU_TEST9 TP8
RSVD_22 TEST9 R32
AU17 APU_TEST10 TP18
RSVD_23 TEST10 N32
APU_TEST14 TP16
VFIX MODE AV7 TEST14 G21 R61 *1K_1%_4
VID Override table (VDD) AV9
RSVD_24
TEST15 H21 APU_TEST15
SMBUS(Internal Thermal sensor) AV11
AV13
RSVD_25
RSVD_26 TEST16 D23
TEST17 E23
APU_TEST16
APU_TEST17
TP9
R457
R65
*1K_1%_4
*1K_1%_4
SVC SVD Boot Voltage AV15
RSVD_27
APU_TEST18
RSVD_28 TEST18 A28 R468 1K_1%_4
VDD_18 AV17 TEST19 B28 APU_TEST19 R476 1K_1%_4
0 0 1.1V AY3
RSVD_29
RSVD_30 TEST28_H N8 APU_TEST28_H
AY7 APU_TEST28_L TP3
TEST28_L N10
0 1 1.0V RSVD_31
TP5
5
TEST31 H31 APU_TEST31 R66 *39.2_1%_4 M_TEST CONNECTION TBD

DP_STEREOSYNC
VDD_18
DP_STEREOSYNC/TEST36 D25 R69 *39.2_1%_4
1 0 0.9V 3 4 APU_SIC
1.8V_S0
TEST41 B31 TMON_CAL R449 1K_1%_4 PU : Enable HDMI (1.8V_S0 by 1k)
[24] 2ND_MBCLK TP69 VDD_18 PD : Disable HDMI
R446 *1K_1%_4
1 1 0.8V 3V_S5 Q21A PJT138K 1.8_S0 VDDCR_CPU_SENSE D31 TP17
APU_VDD_RUN_FB_H [29]
for normal operation open all switches VDDCR_NB_SENSE E33 TP14
(PU in EC side ) APU_VDDNB_RUN_FB_H [29]
Q21B PJT138K VDDIO_MEM_S3_SENSE D35 TP20
6 1 APU_SID VDDP_SENSE AM21 TP6
[24] 2ND_MBDATA APU_VDDP_RUN_FB_H [27]
VSS_SENSE_A D33 APU_VSS_SENSE_A R500 *short_4
APU_VDD_RUN_FB_L [29]
VSS_SENSE_B AM23 R499 *short_4
APU_VDDNB_RUN_FB_L [29]
2
APU_VSS_SENSE_B R432 *short_4

APU_VDDP_RUN_FB_L [27]
VDD_18 SP@AMD_SR_FT4 Power design no 1.2VSUS_H/L & VDDNB_L sense (the same ZAB/ZRZ)
HDT(Hardware Debug Tool ) Connector

VDD_18
VDD_18 VDD_18 VDD_18
CN6
R525 1 2 APU_TCK R508 HDT@1K_1%_4 C381
HDT@1K_1%_4 3 4 APU_TMS R507 HDT@1K_1%_4 HDT@0.1u/16V_4
5 6 HDT_APU_TDI R505 HDT@0_5%_4 APU_TDI R506 HDT@1K_1%_4
7 8 APU_TDO U20
APU_TRST# R524 HDT@33_5%_4 HDT_TRST# 9 10 APU_PWROK_BUF R526 HDT@1K_1%_4
R523 HDT@10K_1%_4 DBRDY3 11 12 APU_RST_L_BUF R527 HDT@1K_1%_4 APU_RST# 1 A1 Y1 6 APU_RST_L_BUF
R522 HDT@10K_1%_4 DBRDY2 13 14 APU_DBRDY
C384 R521 HDT@10K_1%_4 DBRDY1 15 16 HDT_DBREQ# R509 HDT@33_5%_4 APU_DBREQ# R520 HDT@1K_1%_4 2 5
17 18 APU_TEST19 GND VCC
HDT@0.01u/50V_4
19 20 APU_TEST18 APU_PWRGD_D 3 4 APU_PWROK_BUF
A2 Y2
*HDT@HDT CONN C382
*HDT@0.01u/50V_4
C383
HDT@0.01u/50V_4
*HDT@SN74LVC2G07DCKR Quanta Computer Inc.
PLACE HDT CONNECTOR ON TOP PROJECT : ZAS
1A
FT4 DISPLAY/MISC(3/7)
(CPU)
+3V_S5
VDD_18_S5 05
R16 10K_1%_4 PCIE_WAKE# R390
15K_1%_4 U19D
ACPI/SD/AZ/GPIO/RTC/MISC
R17 10K_1%_4 LR_LED_L S0A3_GPIO pin R27 33_5%_4 PCIE_RST# AE4 PCIE_RST_L/EGPIO26 3V_S5 3V_S0 SD_WP/EGPIO101 BA28
DGPU_PWREN
Checklist v1.04 change to left unconnected D16 [13,16,17] PCIERST# TP64
R383 *10K_1%_4 S0A3 C15 150p/50V_4 3V_S0 SD_PWR_CTRL/AGPIO102AY29 ODD_PLUGIN# [15]
R384 10K_1%_4 DNBSWON# 1 2 PCH_RSMRST#_R AG1 RSMRST_L SD_CD/AGPIO25 AY13
[24] RSMRST# 1.8V_S5 3V_S5
R389 10K_1%_4 USB_OC1# 3V_S0 SD_CLK/EGPIO95 BA14 BOARD_ID4
R391 10K_1%_4 USB_OC2# AMD : 10ms RC-delay AD2 PWR_BTN_L/AGPIO0 3V_S5 3V_S0 SD_CMD/EGPIO96 AY15 BOARD_ID5
RB500V-40 [24] DNBSWON# SYS_PWRGD AE2 BOARD_ID6
PWR_GOOD 3V_S0 3V_S0 SD_LED/EGPIO93 BA29
C352 SYS_RST# AF1 SYS_RESET_L/AGPIO1 SD_LED/EGPIO93 : unused need PU 10K to 3V or GND
0.1u/16V_4 R15 *short_4 PCIE_WAKE# AE7 WAKE_L/AGPIO2 SD_DATA0/EGPIO97AY14 BOARD_ID0
AGPIO8 [13] PCIE_LAN_WAKE# BA13 BOARD_ID1
R392 10K_1%_4 C14 *100p/50V_4 SD_DATA1/EGPIO98
R385 *10K_1%_4 S3_RESUME SD_DATA2/EGPIO99BA16 BOARD_ID2
AC2 SLP_S3_L SD_DATA3/EGPIO100 AY16
BOARD_ID3
PCH_RSMRST#_R [24] SUSB# AG4 SLP_S5_L 3V_S0
[24] SUSC# AB1
S0A3 S0A3_GPIO/AGPIO10
AA7 S5_MUX_CTRL/EGPIO42 3V_S5 SCL0/I2C2_SCL/EGPIO113AY33
[32] APU_S5_MUX_CTRL CLK_SCLK [9,19]
C344 S0A3: SDA0/I2C2_SDA/EGPIO114BA32
if unused, need PU VDD_33_S5 10K or PD 10K CLK_SDATA [9,19]
+3V_S5 R388 *10K_1%_4 *0.1u/16V_4
APU_TEST0 AF2 TEST0 3V_S5 SCL1/I2C3_SCL/AGPIO19AC5 SCL1
1 2 SYS_RST# APU_TEST1 AE1 TP2
J1 TEST1/TMS 3V_S5 SDA1/I2C3_SDA/AGPIO20AC4 SDA1
APU_TEST2 AC8 TP1
R379 TEST2
*SHORT_PAD PU in STRAPS PINS side *10_5%_6
AH2 AC_PRES/USB_OC4_L/IR_RX0/AGPIO23 AGPIO3 AJ7
[25] ACPRESENT S5 GEVENT2# [6]
AA4 IR_TX0/USB_OC5_L/AGPIO13 S5 AGPIO4 AK2 AGPIO4
+3V [20] APU_TYPEC_UFP# AG8 AK1 PCH_ODD_EN TP51
IR_TX1/USB_OC6_L/AGPIO14 3V_S5 S5 AGPIO5
TP52
AL5 IR_RX1/AGPIO15 3V_S5 AGPIO6/LDT_RST_L AL4
CLK_SCLK LR_LED_L AE8 AJ2 AGPIO7 ACCEL_INTA [19]
R510 2.2K_5%_4 IR_LED_L/LLB_L/AGPIO12 3V_S5 AGPIO7/LDT_PWROK
CLK_SDATA AJ4 AGPIO8 TP53
R504 2.2K_5%_4 S5 AGPIO8
AGPIO9 AG5 DEVSLP_GATE# need use S5 domain
CLK_REQ3_L
S5 DEVSLP_GATE# [16,18]
R497 10K_1%_4 AY32 CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/AGPIO92 S5 AGPIO40 AD1 R32 *SSD_DS@100K_1%_4
PCIE_REQ_GPU#_R [13] PCIE_REQ_LAN# AY31 S3_RESUME R406
R503 10K_1%_4 CLK_REQ1_L/AGPIO115 10K_1%_4
[17] PCIE_CLKREQ_WLAN# AV29
[16] PCIE_CLKREQ_SSD# CLK_REQ2_L/AGPIO116 3V_S0
CLK_REQ3_L AP31 CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/EGPIO131 S3 resume time measure point
PCIE_REQ_GPU#_R AV35 CLK_REQG_L/OSCIN/EGPIO132 3V_S5 BLINK/USB_OC7_L/AGPIO11AJ8
[20] CC_OC# DGPU_RST_L AGPIO11 [6]
OC0: Type-c CLK_REQ0,3,G: S0 GENINT2_L/AGPIO90 AR29
OC1: USB3.0 [21] USB_OC1# if unused, need PU VDD_33 10K or PD 10K TP15
3V_S0 SPKR/AGPIO91 AP29
OC2: USB2.0 [21] USB_OC2# AB2 SPKR [14]
USB_OC0_L/TRST_L/AGPIO16 3V_S0 GA20IN/AGPIO126 AU35
AG2 SIO_A20GATE [24]
USB_OC1_L/TDI/AGPIO17
C477 C478 C479 AJ1 3V_S5 AV33 APU_TP_INT#
USB_OC2_L/TCK/AGPIO18 3V_S0 FANIN0/AGPIO84
TP19
*0.1u/16V_4 *0.1u/16V_4 *0.1u/16V_4 AH1 USB_OC3_L/TDO/AGPIO24 3V_S0 FANOUT0/AGPIO85 AU33
ACZ_RST#_R APU_I2C_INT# [22]
R415 1K_1%_4
R410 1K_1%_4 ACZ_SYNC_R 1.AZ_BITCLK BLINK/USB_OC7_L/AGPIO11
R412 1K_1%_4 ACZ_SDOUT_R FT4 CRB:1K(stuff), FT4 CL:10K(DNI) R419 33_5%_4 ACZ_BCLK_R AY6 AZ_BITCLK/I2S_BCLK_MIC UART0_CTS_L/EGPIO135AP23 FP4 PU, FT4 DNI
ACZ_BCLK_R 2016/11/30 AMD : install 1K or 10K . (follow CRB 1K first) [14] PCH_AZ_CODEC_BITCLK BA6 2016/11/30 AMD :BLINK is not implemented at design
R420 1K_1%_4 AZ_SDIN0/I2S_DATA_MIC0 UART0_RXD/EGPIO136 AP25
PCH_AZ_CODEC_SDIN0 2.AZ_RST#/SYNC/SDOUT [14] PCH_AZ_CODEC_SDIN0 AZ_SDIN1 AY5 follow FP4 PU OK
R418 *10K_1%_4 AZ_SDIN1/I2S_LR_PLAYBACK UART0_RTS_L/EGPIO137AR25
AZ_SDIN1 FT4 CL:1K(stuff), FP4 CL :1K(DNI) AZ_SDIN2 BA5
R416 10K_1%_4 AZ_SDIN2/I2S_DATA_PLAYBACK VDDIO_AUDIO UART0_TXD/EGPIO138 AV25
AZ_SDIN2 2016/11/30 AMD : stuff ACZ_RST#_R
R417 10K_1%_4 R414 33_5%_4 AY4 AZ_RST_L/I2S_LR_MIC UART0_INTR/AGPIO139 AU23
[14] PCH_AZ_CODEC_RST# ACZ_SYNC_R BA3
R411 33_5%_4 AZ_SYNC/I2S_BCLK_PLAYBACK 1.8V_S0
[14] PCH_AZ_CODEC_SYNC ACZ_SDOUT_R BA4 AP21 BOARD_ID7
R413 33_5%_4 AZ_SDOUT/I2S_DATA_MIC1 UART1_CTS_L/BT_I2S_BCLK/EGPIO140
[14] PCH_AZ_CODEC_SDOUT AV21 BOARD_ID8
UART1_RXD/BT_I2S_SDI/EGPIO141
UART1_RTS_L/EGPIO142AP19 BOARD_ID9
VDD_18 UART1_TXD/BT_I2S_SDO/EGPIO143AV23 PE_PWRGD
AY22 AR21 TP87
I2C0_SCL/EGPIO145 UART1_INTR/BT_I2S_LRCLK/AGPIO144
I2C_SCL_TP [22] I2C_SCL_TP BA22
R451 2.2K_5%_4 I2C0_SDA/EGPIO146
I2C_SDA_TP [22] I2C_SDA_TP I2C_SCL_TS AU19 1.8V_S0
R460 2.2K_5%_4 I2C1_SCL/EGPIO147
R443 10K_1%_4 I2C_SCL_TS I2C_SDA_TS AV19 I2C1_SDA/EGPIO148 3V_S0 HVBEN_L AP27 Hardwave validated boot(HVB)
I2C_SDA_TS Use for I2C bus: TP12 Enable : connected to GND
R440 10K_1%_4
PU VDD_18 2.2K Dissable : floating
I2C Not Implemented: 3V_S5 RTCCLK AN4
Used as EGPIO or PU VDD_18 10K or PD VSS 10K RTC_CLK [6]
R19 *22_5%_4
32K_X1 BA2 SUS_CLK [17]
C349 18p/50V_4 X32K_X1
1
RTC
Y3
32.768KHZ/20ppm R404 32K_X2 AY2 X32K_X2
20M_5%_4
BOARD ID C348 18p/50V_4 2 SP@AMD_SR_FT4

DGPU_PWREN_A : ZAB chose 3V_S0 GPIO
AMD CL maximum ESR of the XTAL is 65 kΩ

+3V TXC:BG332768111 20PPM (ESR 70kΩ)Metal shell
NDK:BG332768108 20PPM (ESR 70kΩ)Metal shell
R431 TPM@10K_1%_4 BOARD_ID0 R430 NTPM@10K_1%_4 SEIKO:BG632768006 20PPM (ESR 70kΩ)Metal shell
BOARD_ID1 **SEG:BG332768453 20PPM (ESR 70kΩ)Glass shell +3V
R425 NTYP_C@10K_1%_4 R424 TYP_C@10K_1%_4
R429 NGS@10K_1%_4 BOARD_ID2 R438 GS@10K_1%_4
R427
R437
EV@10K_1%_4
SP@10K_1%_4
BOARD_ID3
BOARD_ID4
R435
R436
UMA@10K_1%_4
SP@10K_1%_4
SYS PWRGD
R426 SP@10K_1%_4 BOARD_ID5 R434 SP@10K_1%_4 R377
R501 SP@10K_1%_4 BOARD_ID6 R502 SP@10K_1%_4 4.7K_5%_4
Test mode setting (Follow AMD's suggestion) 1 2 1N4148WS SYS_PWRGD_R SYS_PWRGD
D14 R378 *short_4
[24] EC_PWROK
VDD_18
+3V_S5 D13 1 2 *1N4148WS
BOARD_ID7 R637
NC,no install by default [6] SYS_RST#
R635 SSDS@ 10K_1%_4 SSDP@ 10K_1%_4 C342 C343
R636 SP@10K_1%_4 BOARD_ID8 R638 SP@10K_1%_4 R387 *2.2K_5%_4 APU_TEST0 R408 15K_1%_4 SUSB# D12 1 2 *1N4148WS 0.22u/10V_4 *0.1u/16V_4
R639 SP@10K_1%_4 BOARD_ID9 R640 SP@10K_1%_4 +3V_S5
R386 *1K_1%_4 APU_TEST1 R407 15K_1%_4
R380
R25 *2.2K_5%_4 APU_TEST2 R29 15K_1%_4 *10_5%_6
R382
GPIO High Low 100K_1%_4
TEST2 TEST1 TEST0 Description

BOARD_ID0 dTPM iTPM
6
BOARD_ID1 non-Type C Type C 0 0 0 FCH TAP accessible from APU when TAPEN is asserted
FCH JTAG pins are overloaded for multiple
5 2
BOARD_ID2 non-G sensor G sensor functions, in this configuration the FCH JTAG are [24] HWPG
used as non-JTAG pins
BOARD_ID3 GPU UMA Q19A Q19B
2N7002KDW 2N7002KDW
1
BOARD_ID4 Memory ID Memory ID 0 0 1 Reserved
BOARD_ID5 Memory ID Memory ID
0 1 X Reserved
BOARD_ID6 Memory ID Memory ID FCH JTAG multi-function pins are configured as
BOARD_ID7 SATA SSD PCIE SSD 1 TMS 0 JTAG pins, in this configuration the FCH TAP
can be accessed from FCH JTAG pins Quanta Computer Inc.
BOARD_ID8 Reserve Reserve Reserve:Default PD Use on ATE only PROJECT : ZAS
BOARD_ID9 Reserve Reserve 1 TMS 1 Yuba JTAG enabled
Reserve:Default PD Size Document Number Rev
1A
FT4 GPIO/AZ/I2C/UARTS/ACPI(4/7)
HDD
[18]
[18]
SATA_TX0
SATA_TX0#
BA10
AY10
AY12
U19E
SATA_TX0P
SATA_TX0N
SATA_RX0N
CLK/SATA/USB/SPI/LPC
3V_S5 USBCLK/25M_48M_OSC
USB_ZVSS
AL8
AN7 USB_ZVSS R34 11.8K_1%_4

VDD_18
06
[18] SATA_RX0# VDD_18
BA12 SATA_RX0P USB_HSD0P AW1
[18] SATA_RX0 USB0 [21]
USB_HSD0N AW2 USB2.0/DB
VDDP_S0 USB0# [21]
AY9 SATA_TX1P
[16] SATA_TX1
BA9 SATA_TX1N USB_HSD1P AV1 R519
[16] SATA_TX1# USB1 [21]
AV2 USB2.0/DB
SSD BA8 SATA_RX1N
USB_HSD1N
USB1# [21] 10K_1%_4
R480 C374
[16] SATA_RX1#
AY8 SATA_RX1P USB_HSD2P AU1 10K_1%_4 0.1u/16V_4
[16] SATA_RX1 USB2 [17] U21
USB_HSD2N AU2 BT
SATA_ZVSS USB2# [17] SPI_CS# SPI_CS_A
R46 1K_1%_4 AU11 SATA_ZVSS R518 33_5%_4 TP74 1 8 TP66
R45 1K_1%_4 SATA_ZVDD AP11 AT1 SPI_CLK R479 33_5%_4 SPI_SCK_A TP68 6 CS VCC
VDDP_0.95V SATA_ZVDDP USB_HSD3P
USB3 [11] CLK
USB_HSD3N AT2 CCD TP67 5
USB3# [11] DI SPI_HOLD#
3V_S5 C375
*22p/50V_4 TP73 2 7 TP65
R496 10K_1%_4 AGPIO130 AY30 AR1 SPI EMI DO HOLD
SATA_ACT_L/AGPIO130 USB_HSD4P
DEVSLP_HDD USB4 [20] SPI_SI SPI_SDI_A
[18] DEVSLP_HDD AV31 DEVSLP0/EGPIO67 3V_S0 USB_HSD4N AR2 Type-C R478 33_5%_4 TP71 3 4
DEVSLP_SSD USB4# [20] SPI_SO SPI_SDO_A WP GND
DEVSLP +3V R492 NDS@10K_1%_4 AU31 DEVSLP1/EGPIO70 AMD ST4 U2/U3 pair R517 33_5%_4
connects to device : don't PU R498 SSD_NDS@10K_1%_4 USB_HSD5P AP1 USB5 U2P4_U3P0 R516 10K_1%_4
unused : Need PU TP54 U2P5_U3P1 VDD_18
[16] DEVSLP_SSD USB_HSD5N AP2 USB5# Type-C SP@W25Q64FWSSIG
TP57 U2P6_U3P2 SPI_WP SPI_WP_R
H2 GFX_CLKP R515 *short_4
H1 GFX_CLKN USB_HSD6P AN1 BIOS every pin need add TP2675(First)/TP2650 for ICT test
USB6 [21] test pad must place in TOP side
USB_HSD6N AN2 USB3.0
CLK_PCIE_LAN_C USB6# [21]
R401 *short_4 M2
[13]
[13]
CLK_PCIE_LAN
CLK_PCIE_LAN# R402 *short_4 CLK_PCIE_LAN#_C M1
GPP_CLK0P
GPP_CLK0N USB_HSD7P AM1 SP@ socket P/N: DG008000011 only for A-TEST
USB7 [15]
USB_HSD7N AM2 ODD
CLK_PCIE_WLAN_C USB7# [15]
[17] CLK_PCIE_WLAN R399 *short_4 L2 GPP_CLK1P SPI ROM Vender Size Quanta P/N Vender P/N
VDDP_S0
R400 *short_4 CLK_PCIE_WLAN#_C L1 GPP_CLK1N
[17] CLK_PCIE_WLAN#
W4 USBSS_CALP R30 1K_1%_4
R397 *short_4 CLK_PCIE_SSD_C K2
USB_SS_ZVSS
W5 USBSS_CALN R31 1K_1%_4
WND 8M AKE5EZN0N00 W25Q64FWSSIG
[16] CLK_PCIE_SSD
R398 *short_4 CLK_PCIE_SSD#_C K1
GPP_CLK2P USB_SS_ZVDDP VDDP_0.95V_S5 TYP13
[16] CLK_PCIE_SSD#
CLK:Not connected to any test points.
GPP_CLK2N
USB_SS_0TXP T1 1.8V GGD 8M AKE5EG-0Q00 GD25LQ64CSIGR
USB30_TX0 [20]
C346 4.7p/50V_4 TP55 J2 T2
J1
GPP_CLK3P
GPP_CLK3N
USB_SS_0TXN
USB30_TX0# [20] EON 8M
Type-C
2
1
USB_SS_0RXP V2
USB30_RX0 [20]
Y2 R403 USB_SS_0RXN V1
48M_X1 USB30_RX0# [20]
TXC:BG648000021 15PPM 48MHZ/15ppm 1M_1%_4 F2 X48M_X1
HHE:BG648000026 15PPM USB_SS_1TXP R1
VDDP_S5 USB30_TX1 [20]
F1 X48M_X2 USB_SS_1TXN R2
USB30_TX1# [20]
4
3
C347 5.6p/50V_4 TP56 48M_X2 VDDP_S0 Type-C CLK_LPC_DEBUG

USB_SS_1RXP W2 C370 33p/50V_4
USB30_RX1 [20] PCLK_TPM
all XTAL need add TP2650 for ICT test AU27 X25M_48M_OSC 3V_S0 USB_SS_1RXN W1 C367 *15p/50V_4
test pad must place in Bottom side USB30_RX1# [20] CLK_PCI_EC
C378 15p/50V_4
USB_SS_2TXP P1
USB30_TX2 [21]
USB_SS_2TXN P2 20160205_EMI
USB30_TX2# [21] 20170104_EMI modunt CLK_LPC_DEBUG 33pF
R491 22_5%_4 USB_SS_2RXP Y2 USB3.0
[24] CLK_PCI_EC LPCCLK0 USB30_RX2 [21]
R467 22_5%_4 BA25 LPCCLK0/EGPIO74 USB_SS_2RXN Y1
[19] PCLK_TPM USB30_RX2# [21]
R474 22_5%_4 LPCCLK1 BA24 LPCCLK1/EGPIO75
[17] CLK_LPC_DEBUG
AY24 LFRAME_L
[17,19,24] LPC_LFRAME# SPI_CLK
BA26 LAD0 3V_S0 SPI_CLK/ESPI_CLK/EGPIO117 AY17
[17,19,24] LPC_LAD0 SPI_SI
AY28 LAD1 SPI_DO/ESPI_DAT0/EGPIO121 AY20
[17,19,24] LPC_LAD1 SPI_SO
AY25 LAD2 1.8V_S0 SPI_DI/ESPI_DAT1/EGPIO120 BA17
[17,19,24] LPC_LAD2 SPI_HOLD#
AY23 LAD3 SPI_HOLD_L/ESPI_DAT3/EGPIO133 BA18
[17,19,24] LPC_LAD3 SPI_WP
C379 150p/50V_4 SPI_WP_L/ESPI_DAT2/EGPIO122 BA20
R495 33_5%_4LPC_RST#_R AY27 LPC_RST_L SPI_CS1_L/EGPIO118 AY21 SPI_CS#
[17,19,24] PLTRST# 3V_S5
R490 *short_4 LPC_CLKRUN#_R AY26 LPC_CLKRUN_L/AGPIO88 3V_S0 3V_S0 SPI_TPM_CS_L/AGPIO76 BA21 AGPIO76 R453 10K_1%_4
[19,24] CLKRUN#
AC1 LPC_PD_L/AGPIO21 3V_S5
[19] LPCPD#
AA8 LPC_PME_L/AGPIO22 3V_S5 3V_S0 ESPI_ALERT_L/LDRQ0_L AY18
[24] SIO_EXT_SCI# SIO_EXT_SMI# TP58
BA27 LPC_SMI_L/AGPIO86 S5 3V_S0 ESPI_RESET_L/KBRST_L/AGPIO129 BA30
TP63 SIO_RCIN# [24]
AV27 SERIRQ/AGPIO87 3V_S0 1.8V_S0 SPI_CS2_L/ESPI_CS_L/EGPIO119 AY19 EGPIO119 R445 10K_1%_4
[19,24] SERIRQ
SP@AMD_SR_FT4
STRAPS PINS
+3V +3V +3V +3V_S5 +3V_S5 +3V_S5 +3V_S5
BLINK/USB_OC7_L/AGPIO11
R484 R473 R466 R20 R393 R381 R396 FP4 PU, FT4 DNI
2016/11/30 AMD :BLINK is not implemented at design
*10K_1%_4 10K_1%_4 10K_1%_4 10K_1%_4 10K_1%_4 10K_1%_4 10K_1%_4 follow FP4 PU OK
LPCCLK0 Int pull-up Int pull-up Int pull-up Int pull-up
LPC_CLK0 LPC_CLK1 LFRAME# RTC_CLK GEVENT2# (AGPIO3) SYS_RST# AGPIO11(BLINK)

LPCCLK1
CZ-L TYP13
LPC_LFRAME#
Use 48Mhz crystal clock
BOOT Fail Timer and generate both internal SPI ROM Enhanced Reset logic normal reset mode LDT_RST#/LDT_PWRGD
[5] RTC_CLK PU and external clocks Coin battery 1.8V SPI ROM
ENABLE is on board. (for quicker S5 resume) output to APU
[5] GEVENT2#
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT
[5] SYS_RST#
BOOT Fail Timer Use 100Mhz PCIE clock as LPC ROM Coin battery 3.3V SPI ROM Default to
[5] AGPIO11 PD DISABLE reference clock and generate
isn't on board. traditional reset logic short reset mode LDT_RST#/LDT_PWRGD
internal clocks only
output to Pads
DEFAULT DEFAULT
R485 R472 R465 R18 R394 R409 R395
2K_1%_4 *2K_1%_4 *2K_1%_4 *2K_1%_4 *2K_1%_4 *2K_1%_4 *2K_1%_4

PROJECT : ZAS
1A
FT4 SATA/USB/LPC/SPI/eSPI(5/7)
(CPU)
07
+1.2VSUS VDDCR_NB
U19F
Place under APU J35 VDDIO_MEM_S3_1
POWER
VDDCR_NB_1 E9 Place under APU
L32 VDDIO_MEM_S3_2 VDDCR_NB_2 E11
L37 VDDIO_MEM_S3_3 VDDCR_NB_3 E13
C111 C96 C98 C80 C94 C100 N35 VDDIO_MEM_S3_4 VDDCR_NB_4 E15 C43 C54 C11 C44 C38 C81
22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 R37 VDDIO_MEM_S3_5 VDDCR_NB_5 E17 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6
U32 VDDIO_MEM_S3_6 VDDCR_NB_6 E19
CRB:22u*9, 1u*2, 180p*X1 BU BU BU BU BU BU U35 VDDIO_MEM_S3_7 VDDCR_NB_7 G7 BU BU BU BU BU BU CRB:22u*11, 180p*X1
CL: 22u*9, 1u*3, W 32 VDDCR_NB_8 J7 CL: 22u*11, 1u*1
Place under APU W 37
VDDIO_MEM_S3_8
VDDIO_MEM_S3_9 VDDCR_NB_9 K11
Place under APU
AA35 VDDIO_MEM_S3_10 VDDCR_NB_10 K13
AC32 VDDCR_NB_11 K15
C86 C84 C87 C85 C95 C102 C106 AC37
VDDIO_MEM_S3_11
VDDIO_MEM_S3_12
1.9A VDDCR_NB_12 K17 C33 C45 C12 C34 C13 C23 C32
180p/50V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 AE32 VDDIO_MEM_S3_13 VDDCR_NB_13 K19 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 1u/6.3V_4 180p/50V_4
AE35 VDDIO_MEM_S3_14 VDDCR_NB_14 L7
BU BU BU BU BU BU BU AG32 VDDIO_MEM_S3_15 VDDCR_NB_15 L10 BU BU BU BU BU BU BU
AG37 VDDIO_MEM_S3_16 VDDCR_NB_16 L15
AJ32 VDDIO_MEM_S3_17 VDDCR_NB_17 L17
AJ35 VDDIO_MEM_S3_18 VDDCR_NB_18 N7
AL32 VDDIO_MEM_S3_19 VDDCR_NB_19 N11
AL37 VDDIO_MEM_S3_20 VDDCR_NB_20 N13
VDDCR_CPU AR35 VDDIO_MEM_S3_21 VDDCR_NB_21 N15
VDDCR_NB_22 N17
VDDCR_NB_23 N19
VDD_18
Place under APU K21 VDDCR_CPU_1
24A VDDCR_NB_24 R7
K23 VDDCR_CPU_2 VDDCR_NB_25 U7
K25 VDDCR_CPU_3 VDDCR_NB_26 U11
CRB:22u*7, 1u*1, 180p*X1 C63 C47 C46 C79 C53 K27 VDDCR_CPU_4 VDDCR_NB_27 U13
CL: 22u*7, 1u*2 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 K29 VDDCR_CPU_5 VDDCR_NB_28 U15 C41 C42 C40 CRB:22u*1, 1u*X2
K31 VDDCR_CPU_6 VDDCR_NB_29 U17 1000p/50V_4 1u/6.3V_4 10u/6.3V_4 CL: 10u*1, 1u*1, 1n*1
BU BU BU BU BU N21 VDDCR_CPU_7 VDDCR_NB_30 U19
N23 VDDCR_NB_31 U21 BU
Place under APU N25
VDDCR_CPU_8
VDDCR_CPU_9 VDDCR_NB_32 W 7 VDD_18_S5
N27 VDDCR_CPU_10 VDDCR_NB_33 AA11
N29 VDDCR_NB_34 AA13 VDD_18_S5C R37 *short_4
C61 C64 C69 C65 C82 N31
VDDCR_CPU_11
VDDCR_CPU_12
29A VDDCR_NB_35 AA15
180p/50V_4 1u/6.3V_4 1u/6.3V_4 22u/6.3V_6 22u/6.3V_6 U23 VDDCR_CPU_13 VDDCR_NB_36 AA17
U25 VDDCR_CPU_14 VDDCR_NB_37 AA19 C29 C28 C27
BU BU BU BU U27 VDDCR_CPU_15 VDDCR_NB_38 AA21 1000p/50V_4 1u/6.3V_4 10u/6.3V_4 CRB:22u*1, 1u*X2
U29 VDDCR_CPU_16 VDDCR_NB_39 AA23 CL: 10u*1, 1u*1, 1n*1
VDDCR_FCH_S5 VDDCR_FCH_ALW U31 VDDCR_NB_40 AE11
VDDCR_CPU_17 BU +3V
AA25 VDDCR_CPU_18 VDDCR_NB_41 AE13
R26 *0_5%_4 VDDCR_FCH_ALW AA27 VDDCR_CPU_19 VDDCR_NB_42 AE15
AA29 VDDCR_CPU_20 VDDCR_NB_43 AE17 3VC R77 *short_4
AA31 VDDCR_CPU_21 VDDCR_NB_44 AE19
CRB:22u*1, 1u*4 C16 C19 C20 C18 C17 VDDCR_NB_45 AE21
CL: 10u*1, 1u*2, 1n*2 10u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1000p/50V_4 1000p/50V_4 VDDCR_NB_46 AE23 C75 C74 C73 CRB:22u*1, 1u*X2
AR4 VDDCR_FCH_S5_1 VDDCR_NB_47 AE25 1000p/50V_4 1u/6.3V_4 10u/6.3V_4 CL: 10u*1, 1u*1, 1n*1
BU BU AR5 VDDCR_FCH_S5_2 VDDCR_NB_48 AE27
AR7 VDDCR_NB_49 AE29 BU
VDDP_0.95V_S5 AU7
VDDCR_FCH_S5_3
VDDCR_FCH_S5_4
0.4A VDDCR_NB_50 AE31
+3V_S5
R42 *short_6 VDDP_S5 AJ11 VDDP_S5_1 3V_S5C R60 *short_4

AL11 AJ15 VDD_18
AL13
VDDP_S5_2
VDDP_S5_3
0.8A 1.5A VDD_18_1
VDD_18_2 AL17
CRB:22u*1, 1u*3 C37 C31 C30 C57 C56 C55 CRB:22u*1, 1u*X2
CL: 10u*1, 1u*1, 1n*1 AJ13 VDD_18_S5C CL: 10u*1, 1u*1, 1n*1
10u/6.3V_4 1u/6.3V_4 1000p/50V_4
AJ21 VDDP_1
0.5A VDD_18_S5_1
VDD_18_S5_2 AL15
1000p/50V_4 1u/6.3V_4 10u/6.3V_4
BU AJ23 VDDP_2 BU
AJ25 AJ19 3VC
VDDP_0.95V AJ27
VDDP_3
VDDP_4
0.2A VDD_33_1
VDD_33_2 AL21 +1.5V
AL23
CRB:22u*2, 1u*8, 180p*1
Place under APU AL25
VDDP_5
7A AJ17 3V_S5C VDDIO_AZ R33 *short_4
CL: 22u*5, 10u*2, 1n*4 AL27
VDDP_6
VDDP_7
0.2A VDD_33_S5_1
VDD_33_S5_2 AL19
AL29 VDDP_8 CRB:22u*11, 1u*X1
C72 C77 C76 C78 C68 C26 C25 C24 CL: 1u*1, 1n*2
22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 AM11 VDDBT_RTC_G 1000p/50V_4 1000p/50V_4 1u/6.3V_4
VDDIO_AZ AM13 BU
BU BU BU BU BU
VDDIO_AUDIO
0.2A
C22
SP@AMD_SR_FT4
0.22u/10V_4
C59 C71 C70 C60 C39 C62 BU

10u/6.3V_4 10u/6.3V_4 1000p/50V_4 1000p/50V_4 1000p/50V_4 1000p/50V_4
20MIL Q29
RTC (RTC)
20MIL R572 1K_1%_4 +1.5V_RTC 1 +3VRTC
VOUT
3 20MIL +3VPCU Charge function
VIN
1
C21 C423 +VCCRTC_2

+1.5V_RTC_RST#
2 D36
*0.1u/16V_4 1u/6.3V_4 GND BAT54CW 20MIL
G1
2
R28 *SHORT_PAD AP2138N-1.5TRG1 C437 R339

*10_5%_6 1u/6.3V_4 1K_1%_4
+5V_S5
+BAT
20MIL 20MIL 20MIL
+VCCRTC_4 +VCCRTC_3 3 1 1220 charge function
R347 4.7K_5%_4 R348 4.7K_5%_4
CN12 ZHP RTC BATTERY
3
PMST3904 Q15
AHL03001031
1
2 Q27 AAA-BAT-046-K03
[24] CLR_CMOS
2
2N7002K R337 AHL03001057
+
68.1K_1%_4 4 3
R589
For EC reset RTC 20MIL
1
ZHP RTC connector
-
100K_1%_4 +VCCRTC_5
DFHS02FS032
2
DFHS02FS083
+1.2VSUS DECOUPLING BETWEEN PROCESSOR AND DIMMs R345
150K_1%_4
ACROSS VDDIO AND VSS SPLIT

C152
C153 C99 C103
Charge function
0.22u/10V_4
0.22u/10V_4 180p/50V_4 180p/50V_4
PROJECT : ZAS
1A
2x0.22UF (0402)+2x180PF(0402) FT4 POWER(6/7)
(CPU)
08
U19G U19H
GND GND
AJ31 VSS_215 VSS_59 L13 AC21 VSS_120 VSS_182 AU39
R19 VSS_214 VSS_60 L19 AC23 VSS_121 VSS_183 AW3
H23 VSS_213 VSS_61 L21 AC25 VSS_122 VSS_184 AW5
A2 VSS_1 VSS_62 L23 AC27 VSS_123 VSS_185 AW7
A35 VSS_7 VSS_68 L41 AE3 VSS_129 VSS_191 AW19
A39 VSS_8 VSS_69 N1 AE5 VSS_130 VSS_192 AW21
B8 VSS_9 VSS_70 N2 AE10 VSS_131 VSS_193 AW23
B13 VSS_10 VSS_71 N3 AE39 VSS_132 VSS_194 AW25
B32 VSS_11 VSS_72 N39 AG3 VSS_133 VSS_195 AW27
B39 VSS_12 VSS_73 R3 AG7 VSS_134 VSS_196 AW29
C3 VSS_13 VSS_74 R11 AG10 VSS_135 VSS_197 AW31
C15 VSS_19 VSS_80 R25 AG21 VSS_141 VSS_203 AY1
C17 VSS_20 VSS_81 R27 AG23 VSS_142 VSS_204 AY11
C19 VSS_21 VSS_82 R29 AG25 VSS_143 VSS_205 BA7
C27 VSS_25 VSS_86 U1 AG39 VSS_147 VSS_209 BA23
C29 VSS_26 VSS_87 U2 AG41 VSS_148 VSS_210 BA31
C31 VSS_27 VSS_88 U3 AJ3 VSS_149 VSS_211 BA35
C33 VSS_28 VSS_89 U10 AJ5 VSS_150 VSS_212 BA39
C35 VSS_29 VSS_90 U39 AJ10 VSS_151
C37 VSS_30 VSS_91 W3 AJ29 VSS_152
C39 VSS_31 VSS_92 W10 AJ39 VSS_153
C41 VSS_32 VSS_93 W11 AL1 VSS_154
E1 VSS_33 VSS_94 W13 AL2 VSS_155
E21 VSS_36 VSS_97 W19 AL10 VSS_158
E25 VSS_37 VSS_98 W21 AL31 VSS_159
E29 VSS_38 VSS_99 W23 AL39 VSS_160
E35 VSS_39 VSS_100 W25 AL41 VSS_161
E38 VSS_40 VSS_101 W27 AM25 VSS_162
E39 VSS_41 VSS_102 W29 AM27 VSS_163
G1 VSS_42 VSS_103 W31 AM29 VSS_164
G2 VSS_43 VSS_104 W39 AM31 VSS_165
G3 VSS_44 VSS_105 W41 AN3 VSS_166
G11 VSS_45 VSS_106 AA1 AN5 VSS_167
G13 VSS_46 VSS_107 AA2 AN39 VSS_168
G23 VSS_47 VSS_108 AA3 AR3 VSS_169
G27 VSS_48 VSS_109 AA5 AR11 VSS_170
G31 VSS_49 VSS_110 AA10 AR19 VSS_171
G35 VSS_50 VSS_111 AA39 AR23 VSS_172
G37 VSS_51 VSS_112 AC3 AR27 VSS_173
G39 VSS_52 VSS_113 AC7 AR31 VSS_174
G41 VSS_53 VSS_114 AC10 AR39 VSS_175
J3 VSS_54 VSS_115 AC11 AR41 VSS_176
J8 VSS_55 VSS_116 AC13 AU3 VSS_177
J39 VSS_56 VSS_117 AC15 AU9 VSS_178
L3 VSS_57 VSS_118 AC17 AU21 VSS_179
L8 VSS_58 VSS_119 AC19 AU25 VSS_180
AU29 VSS_181
SP@AMD_SR_FT4 SP@AMD_SR_FT4

PROJECT : ZAS
1A
FT4 GND(7/7)
5 4 3 2 1
SODIMM (SDM)
Address A0 [3,10] M_A_A[13:0]
M_A_A0
M_A_A1
M_A_A2
144
133
132
JDIM1A
A0
A1
DQ0
DQ1
8
7
20
M_A_DQ0
M_A_DQ1
M_A_DQ3
M_A_DQ[63:0]
+1.2VSUS
JDIM1B
+3V
R92
*short_4
09
M_A_A3 131 A2 DQ2 21 M_A_DQ2 111
M_A_A4 128 A3 DQ3 4 M_A_DQ4 0-7 2250mA 112 VDD1
M_A_A5 126 A4 DQ4 3 M_A_DQ5 117 VDD2
M_A_A6 127 A5 DQ5 16 M_A_DQ7 118 VDD3 255 C108 1u/6.3V_4
M_A_A7 122 A6 DQ6 17 M_A_DQ6 123 VDD4 VDDSPD
M_A_A8 125 A7 DQ7 28 M_A_DQ8 124 VDD5
M_A_A9 121 A8 DQ8 29 M_A_DQ9 129 VDD6 257
D M_A_A10 A9 DQ9 M_A_DQ15 VDD7 VPP1 +2.5VSUS 0.5A D
146 41 130 259 C127 1u/6.3V_4
M_A_A11 120 A10/AP DQ10 42 M_A_DQ14 8-15 135 VDD8 VPP2
M_A_A12 119 A11 DQ11 24 M_A_DQ12 136 VDD9
M_A_A13 158 A12 DQ12 25 M_A_DQ13 141 VDD10 258
151 A13 DQ13 38 M_A_DQ11 142 VDD11 VTT +SMDDR_VTT 0.6A
[3,10] M_A_WE# 156 A14/W E# DQ14 37 M_A_DQ10 147 VDD12
[3,10] M_A_CAS# 152 A15/CAS# DQ15 50 M_A_DQ16 148 VDD13
[3,10] M_A_RAS# A16/RAS# DQ16 49 M_A_DQ17 153 VDD14 164 M_A0_VREFCA
162 DQ17 62 M_A_DQ18 154 VDD15 VREFCA
TP76 165 CS2#/C0 DQ18 63 M_A_DQ19 16-23 159 VDD16
TP75 CS3#/C1 DQ19 46 M_A_DQ20 160 VDD17 C149
+1.2VSUS DQ20 45 M_A_DQ21 163 VDD18
DQ21 VDD19 1000p/50V_4
114 58 M_A_DQ23
[3,10] M_A_ACT# M_A_PARITY ACT# DQ22 M_A_DQ22
143 59
R169 1K_1%_4 M_A_ALERT# R101 *short_4 M_A_ALERT# 116 PARITY DQ23 70 M_A_DQ25 1 2
DDR4 SODIMM 260 PIN

M_A_EVENT# 134 ALERT# DQ24 71 M_A_DQ29 5 VSS1 VSS48 6
R144 1K_1%_4 M_A_EVENT# [3] M_A_EVENT# 108 EVENT# DQ25 83 M_A_DQ26 9 VSS2 VSS49 10
[3,10] M_A_RST# RESET# DQ26 M_A_DQ27 24-31 VSS3 VSS50
84 15 14
DQ27 66 M_A_DQ24 19 VSS4 VSS51 18
DDR4 SODIMM 260 PIN

EXT-11723:ALERT# PU need mount DQ28 67 M_A_DQ28 23 VSS5 VSS52 22
DQ29 79 M_A_DQ31 27 VSS6 VSS53 26
DQ30 80 M_A_DQ30 31 VSS7 VSS54 30
DQ31 174 M_A_DQ37 35 VSS8 VSS55 36
DQ32 173 M_A_DQ36 39 VSS9 VSS56 40
DQ33 187 M_A_DQ35 43 VSS10 VSS57 44
DQ34 186 M_A_DQ39 47 VSS11 VSS58 48
DQ35 170 M_A_DQ32 33-39 51 VSS12 VSS59 52
DQ36 169 M_A_DQ33 57 VSS13 VSS60 56
DQ37 183 M_A_DQ38 61 VSS14 VSS61 60
DQ38 182 M_A_DQ34 65 VSS15 VSS62 64
DQ39 195 M_A_DQ41 69 VSS16 VSS63 68
(260P)
C 150 DQ40 194 M_A_DQ40 73 VSS17 VSS64 72 C
[3,10] M_A_BANK0 BA0 DQ41 M_A_DQ47 VSS18 VSS65
145 207 77 78
[3,10] M_A_BANK1 115 BA1 DQ42 208 M_A_DQ43 81 VSS19 VSS66 82
[3,10] M_A_BG0 BG0 DQ43 M_A_DQ45 40-47 VSS20 VSS67
(260P)
113 191 85 86
[3,10] M_A_BG1 BG1 DQ44 190 M_A_DQ44 89 VSS21 VSS68 90
149 DQ45 203 M_A_DQ46 93 VSS22 VSS69 94
[3] M_A0_CS#0 CS0# DQ46 M_A_DQ42 VSS23 VSS70
157 204 99 98
[3] M_A0_CS#1 109 CS1# DQ47 216 M_A_DQ48 103 VSS24 VSS71 102
[3] M_A0_CKE0 110 CKE0 DQ48 215 M_A_DQ49 107 VSS25 VSS72 106
[3] M_A0_CKE1 CKE1 DQ49 M_A_DQ51 VSS26 VSS73
228 167 168
137 DQ50 229 M_A_DQ50 48-55 171 VSS27 VSS74 172
[3] M_A0_CLK0 139 CK0 DQ51 211 M_A_DQ53 175 VSS28 VSS75 176
[3] M_A0_CLK0# CK0# DQ52 M_A_DQ52 VSS29 VSS76
138 212 181 180
[3] M_A0_CLK1 140 CK1 DQ53 224 M_A_DQ55 185 VSS30 VSS77 184
[3] M_A0_CLK1# CK1# DQ54 225 M_A_DQ54 189 VSS31 VSS78 188
155 DQ55 237 M_A_DQ60 193 VSS32 VSS79 192
[3] M_A0_ODT0 161 ODT0 DQ56 236 M_A_DQ56 197 VSS33 VSS80 196
[3] M_A0_ODT1 ODT1 DQ57 249 M_A_DQ59 201 VSS34 VSS81 202
253 DQ58 250 M_A_DQ58 205 VSS35 VSS82 206
[5,19] CLK_SCLK 254 SCL DQ59 232 M_A_DQ61 56-63 209 VSS36 VSS83 210
[5,19] CLK_SDATA SDA DQ60 233 M_A_DQ57 213 VSS37 VSS84 214
256 DQ61 245 M_A_DQ63 217 VSS38 VSS85 218
260 SA0 DQ62 246 M_A_DQ62 223 VSS39 VSS86 222
R201 *short_4 SA2 166 SA1 DQ63 227 VSS40 VSS87 226
SA2 M_A_DQS0 M_A_DQS[7:0] [3,10] VSS41 VSS88
13 231 230
92 DQS0 34 M_A_DQS1 235 VSS42 VSS89 234
91 CB0 DQS1 55 M_A_DQS2 239 VSS43 VSS90 238
87 CB4 DQS5 221 M_A_DQS6 VSS47 VSS94
100 CB5 DQS6 242 M_A_DQS7
B B
104 CB6 DQS7 97
[3,10] M_A_DM[7..0] CB7 DQS8 263
263 261
M_A_DM0 M_A_DQS#0 M_A_DQS#[7:0] [3,10] GND#1
12 11 264 262
M_A_DM1 33 DM0 DQS#0 32 M_A_DQS#1 GND#2
DM1 DQS#1 264
M_A_DM2 54 53 M_A_DQS#2
M_A_DM3 75 DM2 DQS#2 74 M_A_DQS#3
M_A_DM4 178 DM3 DQS#3 177 M_A_DQS#4 D4AS0-26001-1P52
96 DM7 DQS#7 95
DBI8# DQS#8
D4AS0-26001-1P52
+1.2VSUS
Place these Caps near So-Dimm A
+1.2VSUS +1.2VSUS From Power Chip (+0.6V) R199
1K_1%_4
+SMDDR_VREF
C133 C119 C121 C137 C131 C105 C136 C115 C129 C141 C142 C128 C122 C138 C124 R203 *0_5%_6 M_A0_VREFCA
0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 180p/50V_4 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 3mA
R200
1K_1%_4 C148
A A
+1.2VSUS (+MEM_VPP) 0.1u/16V_4
+SMDDR_VTT
+2.5VSUS
C132 C118 C123 C143 C120

*0.1u/16V_4 *0.1u/16V_4 *0.1u/16V_4 *0.1u/16V_4 *0.1u/16V_4 C144 C135
4.7u/6.3V_4 0.1u/16V_4 C117
180p/50V_4
C114
0.1u/16V_4
C126
0.1u/16V_4
DECOUPLING CAPS
PROJECT : ZAS
1A
DDR4 DIMM CHA0 (STD)
5 4 3 2 1
5 4 3 2 1
On board memory(OBM)
[3,9]
Address A2
M_A_DQ[63:0]
15ohm Series resistor to DRAM Placed between DIMM
and DRAM at a distance of <10mm from the DIMM. 10
DQ bit swapping is allowed in a byte lane
BYTE7(56-63) BYTE2(16-23) BYTE5(40-47) BYTE0(0-7)

BYTE6(48-55) BYTE3(24-31) BYTE4(32-39) BYTE1(8-15)
D U10 U8 U9 U7 D
M_A1_VREFCA M1 G2 M_A_DQC56 R187 15_5%_4 M_A_DQ56 M_A1_VREFCA M1 G2 M_A_DQC16 R159 15_5%_4 M_A_DQ16 M_A1_VREFCA M1 G2 M_A_DQC40 R181 15_5%_4 M_A_DQ40 M_A1_VREFCA M1 G2 M_A_DQC0 R151 15_5%_4 M_A_DQ0
B1 VREFCA DQL0 F7 M_A_DQC62 R190 15_5%_4 M_A_DQ62 B1 VREFCA DQL0 F7 M_A_DQC23 R164 15_5%_4 M_A_DQ23 B1 VREFCA DQL0 F7 M_A_DQC42 R172 15_5%_4 M_A_DQ42 B1 VREFCA DQL0 F7 M_A_DQC6 R118 15_5%_4 M_A_DQ6
+2.5VSUS VPP#B1 DQL1 M_A_DQC57 M_A_DQ57 +2.5VSUS VPP#B1 DQL1 M_A_DQC20 M_A_DQ20 +2.5VSUS VPP#B1 DQL1 M_A_DQC44 M_A_DQ44 +2.5VSUS VPP#B1 DQL1 M_A_DQC4 M_A_DQ4
R9 H3 R175 15_5%_4 R9 H3 R162 15_5%_4 R9 H3 R196 15_5%_4 R9 H3 R157 15_5%_4
VPP#R9 DQL2 H7 M_A_DQC58 R191 15_5%_4 M_A_DQ58 VPP#R9 DQL2 H7 M_A_DQC19 R148 15_5%_4 M_A_DQ19 VPP#R9 DQL2 H7 M_A_DQC46 R143 15_5%_4 M_A_DQ46 VPP#R9 DQL2 H7 M_A_DQC2 R136 15_5%_4 M_A_DQ2
DQL3 H2 M_A_DQC60 R147 15_5%_4 M_A_DQ60 t:P DQL3 H2 M_A_DQC21 R132 15_5%_4 M_A_DQ21 t:P DQL3 H2 M_A_DQC41 R149 15_5%_4 M_A_DQ41 t:P DQL3 H2 M_A_DQC1 R137 15_5%_4 M_A_DQ1
M_A_A[13:0] t:P DQL4 H8 M_A_DQC63 R139 15_5%_4 M_A_DQ63
c:N DQL4 H8 M_A_DQC22 R158 15_5%_4 M_A_DQ22
M_A_A0 DQL5 M_A_DQC61 M_A_DQ61 M_A_A0 DQL5 M_A_DQC17 M_A_DQ17 M_A_A0 DQL5 M_A_DQC45 M_A_DQ45 M_A_A0 DQL5 M_A_DQC5 M_A_DQ5
M_A_A1
P3
P7 A0 c:N DQL6
J3
J7 M_A_DQC59
R194
R142
15_5%_4
15_5%_4 M_A_DQ59 M_A_A1
P3
P7 A0 DQL6
J3
J7 M_A_DQC18
R146
R195
15_5%_4
15_5%_4 M_A_DQ18 M_A_A1
P3
P7 A0 DQL6
J3
J7 M_A_DQC43
R192
R204
15_5%_4
15_5%_4 M_A_DQ43 M_A_A1
P3
P7 A0 DQL6
J3
J7 M_A_DQC3
R150
R154
15_5%_4
15_5%_4 M_A_DQ3
M_A_A2 R3 A1 DQL7 M_A_A2 R3 A1 DQL7 M_A_A2 R3 A1 DQL7 M_A_A2 R3 A1 DQL7
M_A_A3 N7 A2 M_A_A3 N7 A2 M_A_A3 N7 A2 M_A_A3 N7 A2
M_A_A4 N3 A3 A3 M_A_DQC53 R110 15_5%_4 M_A_DQ53 M_A_A4 N3 A3 A3 M_A_DQC24 R165 15_5%_4 M_A_DQ24 M_A_A4 N3 A3 A3 M_A_DQC33 R107 15_5%_4 M_A_DQ33 M_A_A4 N3 A3 A3 M_A_DQC13 R112 15_5%_4 M_A_DQ13
M_A_A5 P8 A4 DQU0 B8 M_A_DQC55 R185 15_5%_4 M_A_DQ55 M_A_A5 P8 A4 DQU0 B8 M_A_DQC27 R168 15_5%_4 M_A_DQ27 M_A_A5 P8 A4 DQU0 B8 M_A_DQC34 R179 15_5%_4 M_A_DQ34 M_A_A5 P8 A4 DQU0 B8 M_A_DQC11 R160 15_5%_4 M_A_DQ11
M_A_A6 P2 A5 DQU1 C3 M_A_DQC52 R182 15_5%_4 M_A_DQ52 M_A_A6 P2 A5 DQU1 C3 M_A_DQC25 R166 15_5%_4 M_A_DQ25 M_A_A6 P2 A5 DQU1 C3 M_A_DQC32 R176 15_5%_4 M_A_DQ32 M_A_A6 P2 A5 DQU1 C3 M_A_DQC9 R104 15_5%_4 M_A_DQ9
M_A_A7 R8 A6 DQU2 C7 M_A_DQC50 R116 15_5%_4 M_A_DQ50 M_A_A7 R8 A6 DQU2 C7 M_A_DQC31 R106 15_5%_4 M_A_DQ31 M_A_A7 R8 A6 DQU2 C7 M_A_DQC35 R125 15_5%_4 M_A_DQ35 M_A_A7 R8 A6 DQU2 C7 M_A_DQC10 R135 15_5%_4 M_A_DQ10
M_A_A10 M3 A9 DQU5 D3 M_A_DQC48 R183 15_5%_4 M_A_DQ48 M_A_A10 M3 A9 DQU5 D3 M_A_DQC28 R119 15_5%_4 M_A_DQ28 M_A_A10 M3 A9 DQU5 D3 M_A_DQC37 R177 15_5%_4 M_A_DQ37 M_A_A10 M3 A9 DQU5 D3 M_A_DQC8 R156 15_5%_4 M_A_DQ8
M_A_A11 T2 A10/AP DQU6 D7 M_A_DQC51 R186 15_5%_4 M_A_DQ51 M_A_A11 T2 A10/AP DQU6 D7 M_A_DQC30 R167 15_5%_4 M_A_DQ30 M_A_A11 T2 A10/AP DQU6 D7 M_A_DQC39 R180 15_5%_4 M_A_DQ39 M_A_A11 T2 A10/AP DQU6 D7 M_A_DQC15 R129 15_5%_4 M_A_DQ15
M_A_A12 M7 A11 DQU7 M_A_A12 M7 A11 DQU7 M_A_A12 M7 A11 DQU7 M_A_A12 M7 A11 DQU7
M_A_A13 T8 A12/BC +1.2VSUS M_A_A13 T8 A12/BC +1.2VSUS M_A_A13 T8 A12/BC +1.2VSUS M_A_A13 T8 A12/BC +1.2VSUS
L2 A13 M_A_WE# L2 A13 M_A_WE# L2 A13 M_A_WE# L2 A13
[3,9] M_A_WE# WE_n/A14 M_A_CAS# WE_n/A14 M_A_CAS# WE_n/A14 M_A_CAS# WE_n/A14
M8 B3 M8 B3 M8 B3 M8 B3
[3,9] M_A_CAS# CAS_n/A15 VDD#B3 M_A_RAS# CAS_n/A15 VDD#B3 M_A_RAS# CAS_n/A15 VDD#B3 M_A_RAS# CAS_n/A15 VDD#B3
L8 B9 L8 B9 L8 B9 L8 B9
[3,9] M_A_RAS# RAS_n/A16 VDD#B9 RAS_n/A16 VDD#B9 RAS_n/A16 VDD#B9 RAS_n/A16 VDD#B9
D1 D1 D1 D1
VDD#D1 G7 VDD#D1 G7 VDD#D1 G7 VDD#D1 G7
VDD#G7 J1 VDD#G7 J1 VDD#G7 J1 VDD#G7 J1
N2 VDD#J1 J9 M_A_BANK0 N2 VDD#J1 J9 M_A_BANK0 N2 VDD#J1 J9 M_A_BANK0 N2 VDD#J1 J9
[3,9] M_A_BANK0 BA0 VDD#J9 M_A_BANK1 BA0 VDD#J9 M_A_BANK1 BA0 VDD#J9 M_A_BANK1 BA0 VDD#J9
N8 L1 N8 L1 N8 L1 N8 L1
[3,9] M_A_BANK1 M2 BA1 VDD#L1 L9 M_A_BG0 M2 BA1 VDD#L1 L9 M_A_BG0 M2 BA1 VDD#L1 L9 M_A_BG0 M2 BA1 VDD#L1 L9
[3,9] M_A_BG0 BG0 VDD#L9 BG0 VDD#L9 BG0 VDD#L9 BG0 VDD#L9
R1 R1 R1 R1
VDD#R1 T9 VDD#R1 T9 VDD#R1 T9 VDD#R1 T9
VDD#T9 VDD#T9 VDD#T9 VDD#T9
K7 A1 M_A1_CLK0 K7 A1 M_A1_CLK0 K7 A1 M_A1_CLK0 K7 A1
[3] M_A1_CLK0 CK_t VDDQ#A1 M_A1_CLK0# CK_t VDDQ#A1 M_A1_CLK0# CK_t VDDQ#A1 M_A1_CLK0# CK_t VDDQ#A1
K8 A9 K8 A9 K8 A9 K8 A9
[3] M_A1_CLK0# CK_c VDDQ#A9 M_A1_CKE0 CK_c VDDQ#A9 M_A1_CKE0 CK_c VDDQ#A9 M_A1_CKE0 CK_c VDDQ#A9
K2 C1 K2 C1 K2 C1 K2 C1
[3] M_A1_CKE0 CKE VDDQ#C1 CKE VDDQ#C1 CKE VDDQ#C1 CKE VDDQ#C1
D9 D9 D9 D9
VDDQ#D9 F2 VDDQ#D9 F2 VDDQ#D9 F2 VDDQ#D9 F2
K3 VDDQ#F2 F8 M_A1_ODT0 K3 VDDQ#F2 F8 M_A1_ODT0 K3 VDDQ#F2 F8 M_A1_ODT0 K3 VDDQ#F2 F8
[3] M_A1_ODT0 L7 ODT VDDQ#F8 G1 E9 DRAM SPEC M_A1_CS#0 L7 ODT VDDQ#F8 G1 M_A1_CS#0 L7 ODT VDDQ#F8 G1 M_A1_CS#0 L7 ODT VDDQ#F8 G1
[3] M_A1_CS#0 CS VDDQ#G1 x16(DDP):UZQ CS VDDQ#G1 CS VDDQ#G1 CS VDDQ#G1
G9 G9 G9 G9
C R188 15_5%_4 M_A_DQS7_C G3 VDDQ#G9 J2 other :GND R141 15_5%_4 M_A_DQS2_C G3 VDDQ#G9 J2 R173 15_5%_4 M_A_DQS5_C G3 VDDQ#G9 J2 R133 15_5%_4 M_A_DQS0_C G3 VDDQ#G9 J2 C
[3,9] M_A_DQS7 M_A_DQS6_C DQSL_t VDDQ#J2 [3,9] M_A_DQS2 M_A_DQS3_C DQSL_t VDDQ#J2 [3,9] M_A_DQS5 M_A_DQS4_C DQSL_t VDDQ#J2 [3,9] M_A_DQS0 M_A_DQS1_C DQSL_t VDDQ#J2
R123 15_5%_4 B7 J8 240ohm: CS12402FB03 R171 15_5%_4 B7 J8 240ohm: CS12402FB03 R126 15_5%_4 B7 J8 240ohm: CS12402FB03 R198 15_5%_4 B7 J8 240ohm: CS12402FB03
[3,9] M_A_DQS6 DQSU_t VDDQ#J8 [3,9] M_A_DQS3 DQSU_t VDDQ#J8 [3,9] M_A_DQS4 DQSU_t VDDQ#J8 [3,9] M_A_DQS1 DQSU_t VDDQ#J8
M_A_DQS#7_C F3
x16(DDP):240ohm M_A_DQS#2_C F3
x16(DDP):240ohm
R189 15_5%_4 B2 R140 15_5%_4 B2 R174 15_5%_4 B2 R134 15_5%_4 B2
[3,9] M_A_DQS#7
R122 15_5%_4 M_A_DQS#6_C A7 DQSL_c VSS#B2 E1
x16(SDP):0ohm [3,9] M_A_DQS#2
x16(SDP):0ohm
[3,9] M_A_DQS#6 DQSU_c VSS#E1 [3,9] M_A_DQS#3 DQSU_c VSS#E1 [3,9] M_A_DQS#4 DQSU_c VSS#E1 [3,9] M_A_DQS#1 DQSU_c VSS#E1
E9 G1 R212 *shortSP@0_5%_4 E9 G2 R210 *shortSP@0_5%_4 E9 G3 R213 *shortSP@0_5%_4 E9 G4 R211 *shortSP@0_5%_4
VSS#E9 G8 VSS#E9 G8 VSS#E9 G8 VSS#E9 G8
VSS#G8 K1 VSS#G8 K1 VSS#G8 K1 VSS#G8 K1
VSS#K1 K9 VSS#K1 K9 VSS#K1 K9 VSS#K1 K9
R124 15_5%_4 M_A_DMC7 E7 VSS#K9 M9 G1A R243 *shortSDP@0_5%_4 R163 15_5%_4 M_A_DMC2 E7 VSS#K9 M9 G1B R240 *shortSDP@0_5%_4 R120 15_5%_4 M_A_DMC5 E7 VSS#K9 M9 G1C R236 *shortSDP@0_5%_4 R152 15_5%_4 M_A_DMC0 E7 VSS#K9 M9 G1D R231 *shortSDP@0_5%_4
[3,9] M_A_DM7 M_A_DMC6 DML_n/DBIL_n VSS#M9 [3,9] M_A_DM2 M_A_DMC3 DML_n/DBIL_n VSS#M9 [3,9] M_A_DM5 M_A_DMC4 DML_n/DBIL_n VSS#M9 [3,9] M_A_DM0 M_A_DMC1 DML_n/DBIL_n VSS#M9
R184 15_5%_4 E2 N1 R131 15_5%_4 E2 N1 R178 15_5%_4 E2 N1 R138 15_5%_4 E2 N1
[3,9] M_A_DM6 DMU_n/DBIU_nVSS#N1 [3,9] M_A_DM3 DMU_n/DBIU_nVSS#N1 [3,9] M_A_DM4 DMU_n/DBIU_nVSS#N1 [3,9] M_A_DM1 DMU_n/DBIU_nVSS#N1
T1 R242 DDP@0_5%_4 T1 R253 DDP@0_5%_4 M_A_BG1 T1 R248 DDP@0_5%_4 M_A_BG1 T1 R239 DDP@0_5%_4 M_A_BG1
VSS#T1 M_A_BG1 [3,9] VSS#T1 VSS#T1 VSS#T1
x16(DDP):BG1 x16(DDP):BG1 x16(DDP):BG1 x16(DDP):BG1
[3,9] M_A_RST#
P1 A2
x16(SDP):GND M_A_RST# P1 A2
x16(SDP):GND
R216 240_1%_4 M_A1_ZQ0 F9 RESET_n VSSQ#A2 A8 R214 240_1%_4 M_A1_ZQ1 F9 RESET_n VSSQ#A2 A8 R220 240_1%_4 M_A1_ZQ2 F9 RESET_n VSSQ#A2 A8 R215 240_1%_4 M_A1_ZQ3 F9 RESET_n VSSQ#A2 A8
N9 ZQ VSSQ#A8 C9 M9 DRAM SPEC N9 ZQ VSSQ#A8 C9 N9 ZQ VSSQ#A8 C9 N9 ZQ VSSQ#A8 C9
TEN VSSQ#C9 D2 x4/x8/x16(DDP):have BG0 and BG1 TEN VSSQ#C9 D2 TEN VSSQ#C9 D2 TEN VSSQ#C9 D2
DRAM SPEC :TEN is Test Mode Enable VSSQ#D2 D8 x16 :have only BG0 VSSQ#D2 D8 VSSQ#D2 D8 VSSQ#D2 D8
M_A1_ALERT# P9 VSSQ#D8 E3 M_A1_ALERT# P9 VSSQ#D8 E3 M_A1_ALERT# P9 VSSQ#D8 E3 M_A1_ALERT# P9 VSSQ#D8 E3
ALERT_n VSSQ#E3 Note M_A_ACT# ALERT_n VSSQ#E3 M_A_ACT# ALERT_n VSSQ#E3 M_A_ACT# ALERT_n VSSQ#E3
[3,9] M_A_ACT# L3 E8 x4/x8 :76 ball L3 E8 L3 E8 L3 E8
M_A1_PAR T3 ACT_n VSSQ#E8 F1 M_A1_PAR T3 ACT_n VSSQ#E8 F1 M_A1_PAR T3 ACT_n VSSQ#E8 F1 M_A1_PAR T3 ACT_n VSSQ#E8 F1
x16/x16(DDP):96 ball
PAR VSSQ#F1 H1 PAR VSSQ#F1 H1 PAR VSSQ#F1 H1 PAR VSSQ#F1 H1
VSSQ#H1 H9 VSSQ#H1 H9 VSSQ#H1 H9 VSSQ#H1 H9
R287 SP@0_5%_4 MIC0 T7 VSSQ#H9 R307 SP@0_5%_4 MIC1 T7 VSSQ#H9 R289 SP@0_5%_4 MIC2 T7 VSSQ#H9 R301 SP@0_5%_4 MIC3 T7 VSSQ#H9
NC NC NC NC
MICRON DDP 16Gb:GND 96-BALL MICRON DDP 16Gb:GND 96-BALL MICRON DDP 16Gb:GND 96-BALL MICRON DDP 16Gb:GND 96-BALL
DDR4 DDR4 DDR4 DDR4
Other:NC Other:NC Other:NC Other:NC
SP@DDR4_96P SP@DDR4_96P SP@DDR4_96P SP@DDR4_96P
78-ball FBGA package:x4, x8

96-ball FBGA package:x16
+1.2VSUS Memory ID
B B
+1.2VSUS +SMDDR_VTT
R265
+SMDDR_VTT C191 0.22u/10V_4 C246 0.22u/10V_4 +SMDDR_VREF 1K_1%_4
C166 0.22u/10V_4 C252 0.22u/10V_4 Vendor Vendor P/N STN B/S P/N Size Board 6 Board 5 Board 4
R241 *0_5%_6 M_A1_VREFCA
M_A_BANK0 R267 39_1%_4 C190 0.22u/10V_4 C232 0.22u/10V_4
CMD M_A_BANK1 R305 39_1%_4 C182 0.22u/10V_4 C178 0.22u/10V_4 R266 H5AN8G6NAFR-UHC
C210 C244 Hynix AKD5QGSTW05 *4
M_A_BG0 R258 39_1%_4 +1.2VSUS C199 0.22u/10V_4 C185 0.22u/10V_4
1K_1%_4
0.1u/16V_4 1000p/50V_4
DDRIV 2400 8Gb
x16(SDP) 4GB 0 0 0
M_A_BG1 R257 DDP@39_1%_4 x16(DDP): Stuff C161 0.22u/10V_4
x16(SDP): DNI
M_A_A0
K4A8G165WB-BCRC
R294 39_1%_4 C194 C162 0.22u/10V_4 Samsung AKD5QZ0T504 *4
0.01u/50V_4
DDRIV 2400 8Gb
x16(SDP) 4GB 0 0 1
M_A_A1 R295 39_1%_4 C179 0.22u/10V_4
M_A1_CLK0 R226 39_1%_4 CLK_A1_PN
M_A_A2 R284 39_1%_4 C160 0.22u/10V_4
M_A1_CLK0# R223 39_1%_4
MT40A512M16JY-083E
MICRON AKD5QGSTL18 *4 4GB
M_A_A3 R293 39_1%_4 C203 0.22u/10V_4
+1.2VSUS
DDRIV 2400 8Gb
x16(SDP) 0 1 0
M_A_A4 R291 39_1%_4 C202 0.22u/10V_4 +1.2VSUS +SMDDR_VTT
M_A_A5 C227 0.1u/16V_4 M_A1_VREFCA

R304 39_1%_4 C164 0.22u/10V_4
M_A_A6 R310 39_1%_4 C167 0.22u/10V_4

C177 0.22u/10V_4
C247 0.1u/16V_4
0 1 1
C171 0.22u/10V_4
M_A_A7 R303 39_1%_4 +1.2VSUS C170 0.22u/10V_4 C249 0.1u/16V_4
C168 0.22u/10V_4
M_A_A8 R273 39_1%_4
M_A1_ALERT# R269 1K_1%_4
C180 0.22u/10V_4
C169 0.22u/10V_4
C251 0.1u/16V_4
1 0 0
M_A_A9 R300 39_1%_4 C154 0.22u/10V_4 pute cap near every chip.
EXT-11723:ALERT# PU to +1.2VSUS C172 0.22u/10V_4
M_A_A10 R221 39_1%_4 C158 0.22u/10V_4
M_A_A11 R278 39_1%_4 M_A1_PAR R306 *short_4 C165 0.22u/10V_4

1 0 1
M_A_A12 R292 39_1%_4 C151 0.22u/10V_4
A M_A_A13 R302 39_1%_4

M_A_RST# C110 *0.1u/16V_4
C163 0.22u/10V_4
+2.5VSUS
1 1 0 A
M_A_WE# R219 39_1%_4
M_A_CAS# R298 39_1%_4 C243 0.22u/10V_4

K4A8G165WB-BCPB
Samsung AKD5FG0T506 *4 4GB
M_A_RAS# R299 39_1%_4 C245 0.22u/10V_4
DDRIV 2133 8Gb
x16(SDP) 1 1 1
M_A_ACT# R250 39_1%_4 C250 0.22u/10V_4
M_A1_CS#0 R296 39_1%_4 C248 0.22u/10V_4
M_A1_ODT0
CTL R297 39_1%_4 C157 10u/6.3V_4
M_A1_CKE0 R234 39_1%_4 C156 10u/6.3V_4

PROJECT : ZAS
pute cap near every chip. Size Document Number Rev
3A
DDR4 MEMORY DOWNx16 CHA1
5 4 3 2 1
1 2 3 4 5 6 7 8
LCD (LDS)
+3V
LCD Power (LDS)
+3V
11
+3V
1u/6.3V_4
G524B1T11U
V_BLIGHT C1
R13 5 1 LCDVCC
IN OUT
*1K_1%_4
C4 C92 C330 C473 C331 C474 2
A GND C7 C2 C5 C6 C3 A
0.1u/16V_4 1000p/50V_4 4.7u/25V_8 0.1u/25V_4 1000p/50V_4 100p/50V_4
EDP_HPD 4 3 *0.1u/16V_4 *2.2u/16V_6 0.1u/16V_4 0.01u/50V_4 22u/6.3V_6
[4] EDP_HPD [4] APU_DISP_ON EN OC
0.1uF and 100p for prevention LCD flicker issue CN3 U1
R14 196538-40041-3 R1
100K_1%_4 100K_1%_4
Enable:High Active /2.5A
42
GMT: AL000524004
+VIN R369 NVL@0_5%_8
40
BCD : AL022802000
R367 VL@0_5%_8 V_BLIGHT
+12V_Panel 39
R368 *SP@0_5%_6 LCDVCC_R1 38
reserve for 4Kx2K panel 37
LCDVCC R370 *short_6 LCDVCC_R 36
35
34
CCD+DMIC +3V R4
C8
*short_4
*22u/6.3V_6
CCD_DMIC_PWR 33
32 Backlight Control (LDS)
C9 *0.1u/16V_4 31
R10 0_5%_4 DUAL_DMIC_PWR 30 +3VPCU
Dual DMIC +3V 29
VDD_18 R12 *0_5%_4
R9 *short_4 BRIGHT 28
[4] APU_DISP_PWM BL_ON 27
+3V EDP_HPD R11 33_5%_4 EDP_HPD_R 26 R8
C10 180p/50V_4 25
24 *100K_1%_4
R371 *100K_1%_4 EDP_AUX_C R372 *100K_1%_4 C332 0.1u/16V_4 EDP_AUX_C
EDP_AUX#_C [4] EDP_AUX EDP_AUX#_C 23
R373 *100K_1%_4 R374 *100K_1%_4 C333 0.1u/16V_4 LID591#,HALL intrnal PU
[4] EDP_AUX# 22 +3V +3V
B +3VPCU LID# [24] B
C334 0.1u/16V_4 EDP_TX0_C 21
[4] EDP_TX0 EDP_TX0#_C 20
eDP FHD C335 0.1u/16V_4
[4] EDP_TX0# 19
1
C336 0.1u/16V_4 EDP_TX1_C 18 R6 R2 R5 D1
[4] EDP_TX1 EDP_TX1#_C 17
C337 0.1u/16V_4 10K_1%_4 *10K_1%_4 10K_1%_4 1N4148WS
[4] EDP_TX1# 16
C338 0.1u/16V_4 EDP_TX2_C 15
[4] EDP_TX2
2
C339 0.1u/16V_4 EDP_TX2#_C 14 BL_ON
eDP UHD
Front Camera (FCM) [4]
[4]
EDP_TX2#
EDP_TX3
C340 0.1u/16V_4 EDP_TX3_C
13
12
11
3
C341 0.1u/16V_4 EDP_TX3#_C
[4] EDP_TX3# 10
3
R375 *short_4 USB3_R USB3_R 9 BL# 2 Q1 2
[6] USB3 USB3#_R 8 EC_FPBACK# [24]
CCD USB 7 2N7002K
Q3
6 DDTC144EUA-7-F
1
5
3
Touch Panel USB 4 R3 2.2K_5%_4 APU_BLEN_R 2 Q2
3 [4,24] APU_DISP_BLEN
[14] DMIC_DAT_L 2 METR3904-G
R376 *short_4 USB3#_R R405 0_5%_4 DMIC_CLK_L1 1.8V_S0
[6] USB3# [14] DMIC_CLK_L
1
1 R7
*AZ5725-01F.R7G
*AZ5725-01F.R7G
*AZ5725-01F.R7G
*AZ5725-01F.R7G
100K_1%_4
41
*10p/50V_4
2
C C
C351
D18
D17
D11
D15
Lid Switch (HSR)
1
1 +3VPCU
R145
2.2_1%_6
PIN30,31 TP power
PIN28 TP Enable
PIN4,5 TP USB LID#
2
D5 MR1 C130
OUTPUT
VCC
*TVL 0402 01 AB1 YB8251ST23 1u/6.3V_4
GND
2
S
N
3
AL008251000 -- YBT
AL008132004 -- ANC
D D

PROJECT : ZAS
1A
eDP/Hall/CCD
1 2 3 4 5 6 7 8
5 4 3 2 1
HDMI(HDM)
close to connector
12
U26
C125 0.1u/16V_4 HDMI_TX2_C HDMI_TX1_C 1 10 HDMI_TX1_C
[4] HDMI_TX2 Line-1 NC#4
20
22
C116 0.1u/16V_4 HDMI_TX2#_C HDMI_TX1#_C 2 9 HDMI_TX1#_C
[4] HDMI_TX2# Line-2 NC#3
D HDMI_TX2_C D
3 1 D2+
GND#1 2 D2_shield
C107 0.1u/16V_4 HDMI_TX1_C HDMI_CLK_C 4 7 HDMI_CLK_C HDMI_TX2#_C 3
[4] HDMI_TX1 Line-3 NC#2 HDMI_TX1_C D2-
4
D1+
C104 0.1u/16V_4 HDMI_TX1#_C HDMI_CLK#_C 5 6 HDMI_CLK#_C 5
[4] HDMI_TX1# Line-4 NC#1 HDMI_TX1#_C D1_shield
6
D1-
HDMI_TX0_C 7
*AZ1045-04F.R7G D0+
8
D0_shield
HDMI_TX0#_C 9
U27 HDMI_CLK_C D0-
10
CLK+
C113 0.1u/16V_4 HDMI_TX0_C HDMI_TX2_C 1 10 HDMI_TX2_C 11
[4] HDMI_TX0 Line-1 NC#4 HDMI_CLK#_C
CLK_shield
12 CLK-
C112 0.1u/16V_4 HDMI_TX0#_C HDMI_TX2#_C 2 9 HDMI_TX2#_C 13
[4] HDMI_TX0# Line-2 NC#3 CEC
14
NC
3 HDMI_DDCCLK_MB 15
GND#1 DDC CLK
HDMI_DDCDATA_MB 16
DDC DATA
C101 0.1u/16V_4 HDMI_CLK_C HDMI_TX0_C 4 7 HDMI_TX0_C 17
[4] HDMI_CLK Line-3 NC#2 GND
+HDMI_5V 18
+5V
C97 0.1u/16V_4 HDMI_CLK#_C HDMI_TX0#_C 5 6 HDMI_TX0#_C HDMI_HPD_MB R511 *short_4 HP_DET_CN 19
[4] HDMI_CLK# Line-4 NC#1 HP DET
*AZ1045-04F.R7G R86 D21 D22 D20 CN7
21
23
R87 R89 R94 R99 R90 R93 R102 R115 100K_1%_4
499_1%_4 499_1%_4 499_1%_4 499_1%_4 499_1%_4 499_1%_4 499_1%_4 499_1%_4 HMRBL-AK120C
*MLVG0402220NV05BP
*MLVG0402220NV05BP
*MLVG0402220NV05BP
3
close to connector
C C
Q10
+5V R117 *short_4 2
R121 2N7002K
100K_1%_4
1
+HDMI_5V
Q6
1
OUT
+5V 3
IN C93 D2
2 *220p/50V_4 *MLVG0402220NV05BP
GND
close to connector
G5250Q1T73U
BCD : AL002802002
GMT : AL005250003
HDMI DDC (HDM) HDMI-detect (HDM)

B B
+3V +5V EMI

+HDMI_5V
HDMI_TX2_C
R85 R114 *120_1%_4

2
10K_1%_4
HDMI_TX2#_C
D4 D3
+3V RB500V-40 RB500V-40 HDMI_TX1_C
+3V [4] HDMI_HPD R84
1
6 10K_1%_4 R91 *120_1%_4
HDMI_TX1#_C
R95 R100 R97
2
2.2K_5%_4 2.2K_5%_4 2.2K_5%_4 HDMI_TX0_C
2
3
HDMI_DDCCLK_MB Q8B R96 *120_1%_4
1 6
1
[4] HDMI_DDCCLK 2N7002KDW 5 HDMI_HPD_MB

HDMI_TX0#_C
Q9B 2N7002KDW
R103
Q8A HDMI_CLK_C
5
2.2K_5%_4
4
2N7002KDW
HDMI_DDCDATA_MB R88 *120_1%_4
4 3
[4] HDMI_DDCDATA
HDMI_CLK#_C
Q9A 2N7002KDW
A A

PROJECT : ZAS
1A
HDMI
5 4 3 2 1
5 4 3 2 1
LAN & Card reader Combo (LAN)
C176
25MHz 2016 size
BG625000181 TXC
BG625000185 Muruta
BG625000182 NDK
BG6250000D0 HOSONIC
10p/50V_4 LAN_XTALI SP8
Tramsformer
All termination trace > 40 mils
13
U18 GST5009B LF
2
1
C173 *10p/50V_4 1 24 LAN_MCT0
Y1 MDI_0+ 2 TCT1 MCT1 23 LAN_MX0+
TP23 MDI_0- 3 TD1+ MX1+ 22 LAN_MX0-
25MHZ/30ppm TD1- MX1-
PCIE_LAN_WAKE#_R
4 21 LAN_MCT1
4
3
LAN_XTAL2 MDI_1+ TCT2 MCT2 LAN_MX1+
TP24
TP21
TP22
TP25
C175 10p/50V_4 5 20
MDI_1- 6 TD2+ MX2+ 19 LAN_MX1-
VDD10 TD2- MX2-
R218 2.49K_1%_4 RSET 7 18 LAN_MCT2
D MDI_2+ 8 TCT3 MCT3 17 LAN_MX2+ D
10 mils TD3+ MX3+
C174 *10p/50V_4 MDI_2- 9 16 LAN_MX2-
+LANVCC TD3- MX3-
10 15 LAN_MCT3
U12 MDI_3+ 11 TCT4 MCT4 14 LAN_MX3+
48
47
46
45
44
43
42
41
40
39
38
37
GND
RTL8411B-CG MDI_3- 12 TD4+ MX4+ 13 LAN_MX3-
75_1%_8
75_1%_8
75_1%_8
75_1%_8
TD4- MX4-
AVDD33
AVDD10
CKXTAL2
CKXTAL1
MS_CD#
SD_CD#
LED0
LED3
LED_CR
RSET
LED1/GPO
LANWAKEB
49
25
E_PAD
C358
+3V 0.01u/50V_4
REGOUT Gigalan H=4
R21
R22
R23
R24
VDDREG Priority 1- DB0X81LAN01 PSK:A-8300G(w/Surge)
MDI_0+ 1
MDIP0 REGOUT
36 Priority 2- DB0Z06LAN00 BOT:GST5009B LF
MDI_0- 2 35 R249 *short_8 R559
MDIN0 VDDREG +LANVCC Priority 3- DB0LL1LAN00 FCE:NS892407
TERM9
3 34 ENSWREG R233 *short_4 1K_1%_4
VDD10 MDI_1+ AVDD10#1 ENSWREG_H
4 33 VDD10
MDI_1- 5 MDIP1 DVDD10 32 R238 *short_4
MDI_2+ MDIN1 DVDD33 +LANVCC
6 31 ISOLATEB
MDI_2- 7 MDIP2 ISOLATEB 30 C345
8 MDIN2 PERSTB 29 PCIE_REQ_LAN#_R PCIERST# [5,16,17]
VDD10 AVDD10#2 CLKREQB 1000p/3KV_1808
MDI_3+ 9 28 SP7 R562
MDI_3- 10 MDIP3 SD_WP/MS_BS 27 VDD33/18
MDIN3 VDD33/18 15K_1%_4
11 26 PCIE_RX0#_C1 C236 0.1u/16V_4
+LANVCC AVDD33#1 HSON PCIE_RX0_C1 PCIE_RX0# [2]
12 25 C235 0.1u/16V_4
+3V DVDD33_CR HSOP PCIE_RX0 [2]
SD_CMD/MS_D2
SD_CLK/MS_D0
SD_D2/MS_CLK
C233
SD_D0/MS_D1
SD_D3/MS_D3
0.1u/16V_4 Crad Reader Connector
REFCLK_N
REFCLK_P
CARD_3V3
EVDD10
SD_D1
HSIN
HSIP
14
13
15
13
14
15
16
17
18
19
20
21
22
23
24
C C
GND#2
+CARD_3V3
SP1
Hole#2
Hole#1
SP2
C237 SP3
SP4 CLK_PCIE_LAN# [6]
0.1u/16V_4
SP5 CLK_PCIE_LAN [6] EMI
SP6 PCIE_TX0# [2]
PCIE_TX0 [2] SP5 R630 *short_4 SP5_C 1
CD/DAT3
EVDD10 SP4 R629 *short_4 SP4_C 2
CMD
3
VSS
R587 *short_4 SD_VDD 4
+LANVCC +CARD_3V3
+3V_S5 VDD
SP3 R586 *short_4 SD_CLK 5
RTL8111H (LDO mode) close to each VDD10 pin-- 3, 8, 33, 46 close to each VDD10 pin-- 46 CLK
R327 *short_8 (reserve) 6
REGOUT
40 mils (Iout=1A) 40 mils (Iout=1A)
VDD10
SP2 R579 *short_4 SP2_C 7
VSS#2
TAI - SOL
C260 C272 C273 C261 R217 *short_8 DAT0
10u/6.3V_4 0.1u/16V_4 *0.1u/16V_4 *0.1u/16V_4 SP1 R574 *short_4 SP1_C 8
DAT1
C184 C183 C206 C224 C209 C196 C195 SP6 R631 *short_4 SP6_C 9
0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 *1u/6.3V_4 *0.1u/16V_4 DAT2
SP8 10
CD
SP7 11
For RTL8111H WP
Place 0.1 uF close to each pin 11, 32,48
+LANVCC VDD10 EVDD10 VDDREG
10 mils 30 mils 40 mils
40 mils (Iout=1A)
VDD33/18 R312 *short_6
GND#1
R604 C442 C443
*2K_1%_4 4.7u/6.3V_4 0.1u/16V_4
C181 C229 C189 C228 C222 C254 C253 C192 C193
B B
0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 *4.7u/6.3V_4 0.1u/16V_4 1u/6.3V_4 0.1u/16V_4 *4.7u/6.3V_4 0.1u/16V_4 CN2
12
10 mils 156-1001902602
Close to CONN
Place close to pin 27 Close to Pin20 Place connect to Pin35
Leakage circuit EMI

RJ45 Connector SP1
SP2
SP3
SP4
SP5
SP6
+3V +3V +3V C424 C431 C436 C470 C471 C472

*10p/50V_4 *10p/50V_4 *10p/50V_4 *10p/50V_4 *10p/50V_4 *10p/50V_4
R317 R280 CN4

10K_1%_4 *10K_1%_4
3V_S0 9
2
9
1 3 PCIE_REQ_LAN#_R 10
[5] PCIE_REQ_LAN# LAN_MX0+ 1 10
LAN_MX0- 2 0+
Q14 MAIN POWER(3V_S0) LAN_MX1+ 0- Share Pin
*2N7002K 3
LAN_MX2+ 4 1+
R290 *short_4
2+
SP1 SD_D1
LAN_MX2- 5 SP2 SD_D0 MS_D1
LAN_MX1- 6 2-
1-
SP3 SD_CLK MS_D0
LAN_MX3+ 7 SP4 SD_CMD MS_D2
LAN_MX3- 8 3+
3-
SP5 SD_D3 MS_D3
SP6 SD_D2 MS_CLK
A 11 SP7 SD_WP MS_BS A
11
SP8 SD_CD#
12 SP9 MS_INS#
12
RJ45
[5] PCIE_LAN_WAKE#
R209 *short_4 PCIE_LAN_WAKE#_R Quanta Computer Inc.
APU 3V_S5(Ext PU) PROJECT : ZAS
1A
LAN-CR COMBO(RTL8411B)
5 4 3 2 1
5 4 3 2 1
Codec(ADO)
HP-R2
HP-L2
DC-DET circuit(ADO)
14
LINE1-VREFO-L
LINE1-VREFO-R
MIC2-VREFO
CODEC_VREF C268 2.2u/10V_4 ADOGND

D INT_AMIC-VREFO C271 D
10u/6.3V_4
1u/6.3V_4
1u/6.3V_4
10u/6.3V_4
ADOGND +5VA
R331 100K_1%_4
C303 C304
C241
C242
C255
0.1u/16V_4 10u/6.3V_4
+AZA_VDD Place next to pin 26
U13
36
35
34
33
32
31
30
29
28
27
26
25
+1.5VA ALC255-CG
ADOGND
HP-OUT-L
LINE1-VREFO-L
AVDD1
AVSS1
CPVDD
CBN
HP-OUT-R
LINE1-VREFO-R
VREF
MIC2-VREFO
CPVEE
LDO1-CAP
C230 C418
10u/6.3V_4 0.1u/16V_4
ADOGND 37 24
Mute(ADO)
CBP LINE2-L
ADOGND 38 23
AVSS2 LINE2-R
Place next to pin 40
C231 10u/6.3V_4 39 22 LINE1-L +AZA_VDD
LDO2-CAP LINE1-L
Analog 40 21 LINE1-R
AVDD2 LINE1-R +1.5V
Digital L15 1 2 PBY160808T-600Y-N +5V_PVDD 41 20 R619 *short_6 +3VPCU R288
+5V PVDD1 VD33 STB analog digital 1K_1%_4
L_SPK+ 42 19 C466 10u/6.3V_4
2
SPK-L+ MIC-CAP ADOGND
C427 C226 L_SPK- 43 18 SLEEVE PD# 2 1 3 1 PCH_AZ_CODEC_RST#
SPK-L- MIC2-R/SLEEVE trace width of SLEEVE & RING2 D34 *RB500V-40
10u/6.3V_4 0.1u/16V_4
R_SPK- 44 17 RING2 are required at least 40mil and Q25
SPK-R- MIC2-L/RING2 its length should be asshort as possible R271 C234 *PJA138K
R_SPK+ 45 16 *10K_1%_4 *1u/6.3V_4
Low is power down SPK-R+ MONO-OUT
C amplifier output 46 15 2 1 C
PVDD2 SPDIFO/FRONT JD/GPIO3 AMP_MUTE# [24]
D33 RB500V-40
GPIO0/DMIC-DATA
GPIO1/DMIC-CLK
PD# 47 14 Placement near Audio Codec
PDB MIC2/LIN2 JD
C225 C426 48 13 SENSEA R344 200K_1%_4 HP_JD#
SDATA-OUT
TP32 SPDIF-OUT HP/LINE1 JD
LDO3-CAP
SDATA-IN
10u/6.3V_4 0.1u/16V_4
DVDD-IO
PCBEEP
RESETB
DC DET
R341 100K_1%_4 +3V

DVDD
SYNC
49 BCLK
DGND
Analog
Digital
1
10
11
12
DMIC_DAT
DMIC_CLK
10u/6.3V_4
DC-DET
1.6Vrms
*short_4
+3V R282 *short_6 +AZA_VDD PCBEEP C307 0.1u/16V_4 BEEP_1 R338 22K_5%_4 D35 1N4148WS
SPKR [5] Internal Speaker(ADO)
D37 1N4148WS
20170104 EMI PCBEEP_EC [24]
C239 C238
mount R308, R577 C311 R346
C269
10u/6.3V_4 0.1u/16V_4
R322
100p/50V_4 10K_1%_4
Tied at one point only under
the codec or near the codec +3V +1.5V
R308 *short_4
R613 *0_5%_4 4 ohm : 40mil for each signal
5
PCH_AZ_CODEC_RST# [5]
R355 *0_5%_4 R335 *0_5%_4
R577 *short_4 R314 *short_4 R_SPK+ R611 *short_6 R_SPK+_1
[11] DMIC_DAT_L PCH_AZ_CODEC_SYNC [5] R_SPK- R_SPK-_1 1
R578 *short_4 APU 1.5V R610 *short_6
R268 *0_5%_4 R320 22_5%_4 DVDD_IO R328 *short_4 L_SPK- R609 *short_6 L_SPK-_1 2
[11] DMIC_CLK_L L_SPK+ L_SPK+_1 3
C305 *1000p/50V_4 R608 *short_6
C440 0.1u/16V_4 4
C258 ACZ_SDIN R326 33_5%_4
PCH_AZ_CODEC_SDIN0 [5]
6
33p/50V_4 C276 C275 C464 C463 C462 C461
ADOGND PCH_AZ_CODEC_BITCLK [5] 0.1u/16V_4 10u/6.3V_4 1000p/50V_4 1000p/50V_4 1000p/50V_4 1000p/50V_4
Cap need near AVDD1 and AVDD2 20170104 EMI C262 *22p/50V_4 CN17
B C258 change from 10pF to 33pF B
power source input Place these EMI components next to codec 50278-00401-001
(CRB 10pF) Place next to pin 9
PCH_AZ_CODEC_SDOUT [5]
AMD CL: use 0.1µF connecting AGND to DGND
Codec PWR 5V(ADO) HEADPHONE/MIC/LINE combo (ADO)

DIGITAL ANALOG
MIC2-VREFO R607 2.2K_5%_4
L16 1 2 HCB2012KF-220T60
+5V +5VA R606 2.2K_5%_4
U25
3 4
IN OUT SLEEVE R621 *short_4 SLEEVE_R
2 SLEEVE_R [21]
C458 C467 GND C445 C460 RING2 R620 *short_4 RING2_R
RING2_R [21]
*10u/6.3V_4 *0.1u/16V_4 1 5 R622 *29.4K_1%_4 *10u/6.3V_4 *0.1u/16V_4
SHDN SET HP-L2 R605 62_5%_4 HP-L3
HP-L3 [21]
R623
*G923-330T1UF HP-R2 R618 62_5%_4 HP-R3
*10K_1%_4 HP-R3 [21]
close pin3 ADOGND
HP_JD#
HP_JD# [21]
R350 *0_5%_4 LINE1-L C444 4.7u/6.3V_4
R598 R616 C469 C468 C451 C465
LINE1-VREFO-L R595 4.7K_5%_4 *10K_1%_4 *10K_1%_4 100p/50V_4 100p/50V_4 100p/50V_4 100p/50V_4
ADOGND
LINE1-VREFO-R R594 4.7K_5%_4
A A
LINE1-R C459 4.7u/6.3V_4 EMI suggest mount in MB side
Codec PWR 1.5V(ADO) ADOGND
+1.5VA
DIGITAL ANALOG
+1.5V L14 2 1 BLM15AG121SN1D

C412 PROJECT : ZAS
1u/6.3V_4 Size Document Number Rev
1A
Codec(ACL255)
5 4 3 2 1
5 4 3 2 1
U2 to SATA (ODD)
R538
*shortODD@0_5%_4
+3.3V_48
R548
GPIO7
0
GPIO3
(CLK_SEL1)(CLK_SEL0)
0 25MHz
15
+1.2V_48
Close to ASM1153 ODD@100K_1%_4
TP77
TP78
Internal 1.2V voltage (Switching)
+1.2V_48 +3.3V_48 Close to ASM1153 GPIO6 SPI_EN#
RST_48
C401 ODD@10u/6.3V_4 PGND_48
D D
C421 ODD@0.1u/16V_4 C392 ODD@0.1u/16V_4 0 Enable
VCC12O_48
UART_RX_48
L13 ODD@4.7uH/1A_2X2 C413
UART_TX_48
+1.2V_48
HDDPC_48
C419 ODD@0.1u/16V_4 C394 ODD@0.1u/16V_4 > 40mIL use 1A choke, ODD@1u/6.3V_4
GPIO6_48
can't use beed 1 Disable
C409 ODD@0.1u/16V_4 C420 ODD@0.1u/16V_4
C395 ODD@0.1u/16V_4 C422 ODD@0.1u/16V_4
C400 ODD@0.1u/16V_4 C406 ODD@0.1u/16V_4 U23
49
48
47
46
45
44
43
42
41
40
39
38
37
ODD@ASM1153 GPIO3_48 R530 ODD@4.7K_5%_4
C411 ODD@0.1u/16V_4 GPIO7_48 R571 ODD@4.7K_5%_4
EPAD
PGND
HDDPC
TEST_EN
LXI
UART_TX
UART_RX
VDD#3
GPIO1
GPIO0
VCC#2
RST#
GPIO6
This Cap +3.3V_48 GPIO6_48 R561 ODD@4.7K_5%_4
Power side closer to Pin 1 UREXT_48 R541 ODD@12.1K_1%_4
GND side closer to Pin47 +1.2V_48
PGND_48 C393 ODD@4.7u/6.3V_4 1 36

I2C_DATA_48 2 VCCIN VDD#2 35 GPIO7_48
SPI ROM
AKE35ZN0N00 (1 Mb)...EC
I2C_CLK_48 3
4
I2C_DATA
I2C_CLK
GPIO7
VCCS
34
33 STXP_48
AKE37FN0N05 (4 Mb)...ODD GPIO5_48 5 VCC#1 STXP 32 STXN_48 ASM1153
+3.3V_48 GPIO4_48 6 GPIO5 STXN 31 TX connect connector TX
U22 7 GPIO4 GNDA#2 30 SRXN_48 RX connect connector RX
+5V_48 +1.2V_48 VDD#1 SRXN
GPIO4_48 1 8 GPIO3_48 8 29 SRXP_48
I2C_DATA_48 2 CE# VDD 7 9 GPIO3 SRXP 28
3 SO HOLD# 6 I2C_CLK_48 R529 ODD@4.7K_5%_4VBUS_DET_48 10 GPIO2 VDDS 27
+3.3V_48 WP# SCK VBUS VCCTXL
4 5 GPIO5_48 11 26 XO_48
VSS SI 12 VBUS_LDO XO 25 XI_48
C +3.3V_48 VCCO XI C
3
4
ODD@W25X40CLSNIG
ASM1153 C387 ASM1153 Y4
GNDA#1
VDDU#1
VCCU#1
VCCU#2
VDDU#2
Pin2 connect connector SO ODD@0.1u/16V_4 Pin11 5V in, Pin12 3V out C416 ODD@25MHZ/30ppm
URXN
URXP
Pin5 connect connector SI
UTXN
UTXP
REXT
C396 C391 ODD@8.2p/50V_4
UDM
UDP
ODD@2.2u/10V_4 ODD@1u/6.3V_4
1
2
13
14
15
16
17
18
19
20
21
22
23
24
25MHz 2016 size
+5V +5V_48 BG625000181 TXC
+3.3V_48 BG625000185 Muruta
R528 ODD@0_5%_8 BG625000182 NDK
+1.2V_48 BG6250000D0 HOSONIC
UREXT_48
C402
ODD@0.1u/16V_4
USB7
USB7#
[6]
[6]
B
SATA ODD (ODD) ODD POWER Control (reserve) B
+5V 1.5A 60mil +5V_ODD

Cable type +15V to VIN
R581 *shortODD@0_5%_8
+3VPCU +VIN
6
5 4
R576 ODD@10K_1%_4 +3V 2
+3.3V_48 1 Q30
19
EC_ODD_EJ# [24] +5V_ODD R321 R315 *ODD@AO6402A

R281
1.5A 60mil *ODD@100K_1%_4 *ODD@100K_1%_4
3
18GND1 +5V_ODD_R R569 *shortODD@0_5%_8
MOD_EN_5V
GND2 *ODD@22_5%_8
ODD_EN_Q
EJ R547
5V1
6
C429 C434 C433 C430 C425 C439 *ODD@100K_1%_4
5V2
3
5V3 ODD@0.01u/50V_4 ODD@0.01u/50V_4 *ODD@0.1u/16V_4 *ODD@0.1u/16V_4 ODD@10u/6.3V_4 *ODD@100u/6.3V_12
HDDPC_48 ODD_EN 5 2 ODD_EN_Q 2 Q26
5V4
5V5 *ODD@2N7002K
C223 ODD@180p/50V_4 C259
5V6 R263 ODD@33_5%_4 R542 C408 Q13A Q13B
1
ODD_PLUGIN# [5] *ODD@0.1u/16V_4
1
5V7 SATA_DP R255 ODD@10K_1%_4 *ODD@2N7002KDW *ODD@2N7002KDW
DP +3V *ODD@4.7K_5%_4 *ODD@10u/6.3V_4
GND3 SRXP_48_C C452 ODD@0.01u/50V_4 SRXP_48
RXP SRXN_48_C C453 ODD@0.01u/50V_4 SRXN_48
A RXN A
GND4 STXN_48_C C454 ODD@0.01u/50V_4 STXN_48
TXN STXP_48_C C455 ODD@0.01u/50V_4 STXP_48
TXP
1GND5
20
PROJECT :ZAS
ODD@132F18-100000-A2-R 1A
CN15 ASM1153/ODD
5 4 3 2 1
5 4 3 2 1
NGFF_M.2 SSD (NGF) M-KEY

16
6/25 Add R580/R581 by Kingston SSD. CN5 +3V_SATA
+3V 1.5A +3V_SATA
Close SSD CONN rating = 1A @ 128G
76
78
R421 *shortSSD@0_5%_4 SSD_PRESENCE
D R482 *shortSSD@0_5%_8 1 2 D
3 4
5 6
C376 C377 C373 C372 C51 C50 C52 7 8 DAS
9 10 TP61
*SSD@10u/6.3V_4 *SSD@0.1u/16V_4 SSD@10u/6.3V_4 SSD@0.1u/16V_4 SSD@0.1u/16V_4 SSD@0.1u/16V_4 SSD@0.1u/16V_4 11 12
13 14
15 16
17 18
19 20
21 22
Co-Layout 23 24
25 26
R423 SSDP@0_5%_4 PCIER0_SATAB- 27 28
[2] PCIE_RX2 PCIER0#_SATAB+ [2] PCIE_RX3# 29_RN 30
R422 SSDP@0_5%_4
[2] PCIE_RX2# PCIET0_SATAA+ [2] PCIE_RX3 31_RP 32
R433 SSDP@0_5%_4 Non-Device sleep
[2] PCIE_TX2 PCIET0#_SATAA- 33 34
R428 SSDP@0_5%_4
[2] PCIE_TX2# [2] PCIE_TX3# 35_TN 36 DEVSLP_SSD_C R462 *SSD_NDS@10K_1%_4 +3V_SATA
[2] PCIE_TX3 37_TP 38 R461 SSD_NDS@1K_1%_4
PCIER0#_SATAB+ 39 40
C360 SSDS@0.01u/50V_4 PCIER0#_SATAB+ PCIER0_SATAB- 41_RN_B+ 42
[6] SATA_RX1 43_RP_B- 44
[6] SATA_RX1# C362 SSDS@0.01u/50V_4 PCIER0_SATAB-
PCIET0#_SATAA- 45 46
C363 SSDS@0.01u/50V_4 PCIET0#_SATAA- PCIET0_SATAA+ 47_TN_A- 48 NGFF1_RST# R470 SSDP@0_5%_4
C [6] SATA_TX1# 49_TP_A+ 50 PCIERST# [5,13,17] C
C364 SSDS@0.01u/50V_4 PCIET0_SATAA+ CLKREQ_SSD# R469 SSDP@0_5%_4 PCIE_CLKREQ_SSD# [5]
[6] SATA_TX1 CLK_PCIE_SSD#_S 51 52
CLK_PCIE_SSD_S 53_CLKN 54 R488 SSDP@10K_1%_4
55_CLKP 56 TP62 +3V
CLK_PCIE_SSD#_S 57 58 TP60
R439 SSDP@0_5%_4
[6] CLK_PCIE_SSD# CLK_PCIE_SSD_S
R442 SSDP@0_5%_4
[6] CLK_PCIE_SSD
RESET_C PCH_SUSCLK
TP4 SSD_PEDET 67 68 TP59
69 70
71 72
SSD PIN69 R35 73 74
SATA Card: GND 75
pin Type Description *shortSSDS@0_5%_4
77
79
PCIE Card: NC SSD@NGFF_SSD
This pin is grounded on the SSD. May be used by host to

1 PRESENCE determine if slot is empty or populated Card pin69 = Ground (SATA card)
10 DAS# Device Activity Signal

B B
21 WWAN/SSDIND_N This pin connect to Ground
+3V_SATA
38 Device Sleep Signal If system didn't support DEVSLP, set DEVSLP Sleep Signal pin
power high and keep (from power on), device will ignore. Device sleep
If system support DEVSLP, set DEVSLP Sleep Signal pin power low
(from power on) device, device will support DEVSLP function. R487
*SSD_DS@33K_1%_4
Device Sleep Signal H: SSD enter sleep model. R475 ***SSD_DS@0_5%_4
Device Sleep Signal L: SSD exit sleep model.
1 3 DEVSLP_SSD_C
[6] DEVSLP_SSD
53 REFCLKN no connect on SSD
Q22
R486
2
*SSD_DS@2N7002K
[5,18] DEVSLP_GATE# R458 *SSD_DS@0_5%_4 ***SSD_DS@33K_1%_4
55 REFCLKP no connect on SSD
C366
56 MFG1 Manufacturing pin. Use determined by vendor. *SSD_DS@1000p/50V_4
Must be a noconnect on the host board
A A
58 MFG2 Manufacturing pin. Use determined by vendor.

Must be a noconnect on the host board
68 SUSCLK no connect on SSD PROJECT : ZAS
69 IFDET This pin connect to Ground M.2 SSD 1A

5 4 3 2 1
5 4 3 2 1
NGFF_M.2 WiFi & BT (NGF) E-KEY

17
76
78
+WL_VDD
CN9
APCI0076-P001A
76
78
1 2 +WL_VDD +3V
3 1 2 4
D [6] USB2 3 4 D
5 6 R274 *short_8
[6] USB2# 7 5 6 8
9 7 8 10
11 9 10 12 +WL_VDD
13 11 12 14
15 13 14 16
17 15 16 18 C432 10u/6.3V_4
19 17 18 20 C389 0.1u/16V_4
21 19 20 22 C388 0.1u/16V_4
23 21 22 C390 0.1u/16V_4
23 C435 0.1u/16V_4
32
33 32 34
35 33 34 36
[2] PCIE_TX1 35 36
37 38
[2] PCIE_TX1# 37 38
39 40
41 39 40 42
[2] PCIE_RX1 41 42
43 44
[2] PCIE_RX1# 43 44
45 46
47 45 46 48 R272 *short_4 WIFI card reset (non-IOAC)
[6] CLK_PCIE_WLAN 47 48 PCIERST# [5,13,16]
49 50 SUSCLK
[6] CLK_PCIE_WLAN# 49 50
51 52 WLAN_RST# R264 *0_5%_4 Debug card reset
C 51 52 PLTRST# [6,19,24] C
CLKREQ_WLAN# 53 54
53 54 BT_EN [24]
TP36 1WAKE_WLAN# 55 56 RF_EN [24]
57 55 56 58
59 57 58 60
61 59 60 62
63 61 62 64 A_LAD0_R R277 *short_4
63 64 LPC_LAD0 [6,19,24]
65 66 A_LAD1_R R283 *short_4
65 66 LPC_LAD1 [6,19,24]
67 68 A_LAD2_R R309 *short_4
67 68 LPC_LAD2 [6,19,24]
69 70 A_LAD3_R R316 *short_4
69 70 LPC_LAD3 [6,19,24]
R313 *0_5%_4 CLK_LPC_DEBUG_C 71 72
[6] CLK_LPC_DEBUG 71 72 +WL_VDD
R318 *0_5%_4 LPC_LFRAME#_C 73 74
[6,19,24] LPC_LFRAME# 73 74
75
FOR Debug card, MP remove them. 75
77
79
77
79
+3V
Leakage circuit
+WL_VDD R270
B *4.7K_5%_4 B
R262 *short_4 CLKREQ_WLAN#

[5] PCIE_CLKREQ_WLAN#
R252
APU 3V_S0(Int PU) WLAN S0
2
*10K_1%_4
[5] SUS_CLK 3 1 SUSCLK
APU 3V_S5(Ext PU) Q11 *2N7002K +WL_VDD

C219
R235 *0_5%_4 *22p/50V_4
A A

PROJECT : ZAS
1A
NGFF(WiFi&BT combo)
5 4 3 2 1
5 4 3 2 1
EQ2 DE1
SATA Re-driver (HDD)
18
+601_VCC H - 14dB H - -2dB
X - 0dB X - -4dB
+3V +601_VCC L - 7dB L - 0dB
R534 SRD@4.7K_5%_4 EQ2 R532 *SRD@4.7K_5%_4
R536 *SRD@4.7K_5%_4 EQ1 R533 *SRD@4.7K_5%_4 EQ1 DE2
R537 *shortSRD@0_5%_4 R535 SRD@4.7K_5%_4 DEW1 R531 *SRD@4.7K_5%_4 H - 14dB H - -2dB
X - 0dB X - -4dB
L - 7dB L - 0dB
C403 C397 C405 C221 C220 R261 *SRD@4.7K_5%_4 DE1 R554 *SRD@4.7K_5%_4
SRD@10u/6.3V_4 SRD@1u/6.3V_4 SRD@1u/6.3V_4 SRD@0.1u/16V_4 SRD@0.1u/16V_4 R260 *SRD@4.7K_5%_4 DE2 R553 *SRD@4.7K_5%_4 DEW1 DEW2
D R256 SRD@4.7K_5%_4 DEW2 R550 *SRD@4.7K_5%_4 H - Long Duration H - Long Duration D
X - NC (Long) X - NC (Long)
L - Short Duration L - Short Duration
R259 *SRD@4.7K_5%_4 EN R552 SRD@4.7K_5%_4
near Pin10 & Pin20 SW7 - EN
H - Enabled
L - Standby Mode
DEW1
EQ2
EQ1
+601_VCC
20
19
18
17
16
VCC#2
EQ2
GND#3
EQ1
DEW1
21
C186 SRD@0.01u/50V_4 SATA_TX0#_S 1 PPAD
[6] SATA_TX0# SATA_TX0_S 2 RX1P 15 SATA_TX0#_PS SATA_TX0#_C
C200 SRD@0.01u/50V_4 C187 SRD@0.01u/50V_4
[6] SATA_TX0 RX1N TX1P SATA_TX0_PS SATA_TX0_C
3 14 C197 SRD@0.01u/50V_4
C207 SRD@0.01u/50V_4 SATA_RX0_S 4 GND#1 TX1N 13
[6] SATA_RX0 TX2N GND#2
[6] SATA_RX0# C218 SRD@0.01u/50V_4 SATA_RX0#_S 5 12 SATA_RX0_PS C204 SRD@0.01u/50V_4 SATA_RX0_C
TX2P RX2N 11 SATA_RX0#_PS C211 SRD@0.01u/50V_4 SATA_RX0#_C
DEW2 6 RX2P
EN 7 DEW2 22
C EN GND#4 C
DE2 8 23
DE1 9 DE2 GND#5 24
10 DE1 GND#6 25
+601_VCC VCC#1 GND#7 26 Co-Layout
Co-Layout GND#8
near connector
U11
SRD@SN75LVCP601RTJR
SATA_TX0 R227 NSRD@0_5%_4 SATA_TX0_R C198 NSRD@0.01u/50V_4 SATA_TX0_C

SATA_TX0# R222 NSRD@0_5%_4 SATA_TX0#_R C188 NSRD@0.01u/50V_4 SATA_TX0#_C
SATA_RX0# R251 NSRD@0_5%_4 SATA_RX0#_R C212 NSRD@0.01u/50V_4 SATA_RX0#_C

SATA_RX0 R237 NSRD@0_5%_4 SATA_RX0_R C205 NSRD@0.01u/50V_4 SATA_RX0_C
2.5" SATA HDD (HDD)

B Cable type connector B
CN11
+5V
GS12201-1011-9H
Device sleep
25
+5V
23
21
R573
DEVSLP_HDD_C ***DS@33K_1%_4
1NC5 R570 ***DS@0_5%_4
60mil NC4
5V4 1 3 DEVSLP_HDD_C
5V3 [6] DEVSLP_HDD
C308 C267 C266 C264 C293 C265 5V2 Q16
5V1 R563
2
*100u/6.3V_12 10u/6.3V_4 *0.1u/16V_4 *0.1u/16V_4 0.01u/50V_4 0.01u/50V_4 NC3 *DS@2N7002K
[5,16] DEVSLP_GATE# R357 *DS@0_5%_4 ***DS@33K_1%_4
GND6
GND5
over ME height limit GND4 C319
NC2
NC1 *DS@1000p/50V_4
R285 GS@0_5%_4 ACCEL_INT2_C
[19] ACCEL_INT2 ACCEL
R286 NGS@0_5%_4 SATA_RX0_C GND3
SATA_RX0#_C RXP
RXN
A SATA_TX0#_C GND2 A
SATA_TX0_C TXN
acer BIOS requirement reserve ACCEL_INT connection to GND. TXP
G-sensor:DNI, Non G-sensor:mount 20GND1
26 22
24
PROJECT : ZAS
1A
HDD/REDRIVER
5 4 3 2 1
5 4 3 2 1
G-sensor (H3D)
R365 GS@0_5%_6 +3V
19
+G_SEN_PW
D U16 D
C321 C324 1 2
14 Vdd_IO NC#1 3
GS@0.1u/16V_4 GS@10u/6.3V_4 VDD NC#2
C310 GS@22p/50V_4
10
D8 1 2 GS@RB500V-40 ACCEL_INTA_R 11 RES 15
[5] ACCEL_INTA 2 GS@RB500V-40 ACCEL_INT2_R 9 INT1 ADC2
D9 1
[18] ACCEL_INT2 INT2
R351 *short_4 G_SA0 7
R352 *short_4 G_MBDATA_R 6 SDO/SA0 5
[5,9] CLK_SDATA SDA/SDI/SDO GND#1
R364 *short_4 G_MBCLK_R 4 12
[5,9] CLK_SCLK SCL/SPC GND#2 13
PU on CPU side 8 ADC3 16
+G_SEN_PW CS ADC1
CLK_SDATA C312 GS@33p/50V_4
CLK_SCLK C318 GS@33p/50V_4 GS@LIS3DHTR
C C
+G_SEN_PW R353 *GS@4.7K_5%_4G_MBDATA_R

R361 *GS@4.7K_5%_4G_MBCLK_R
TPM (TPM) +TPM_VDD
R334 *shortTPM@0_5%_4
+TPM_VSB
DECOUPLING CAPACITORS
22 U15 NOTE:
14
8
1
TPM@NPCT650ABBYX Place 0.1 uF capacitors as close as
SERIRQ: R360 possible to the device power pins.
VSB
VHIO#2
VHIO#1
PU 10k on EC side (reserved) VDD1
*TPM@10K_1%_4
+3V_S5 +TPM_VSB
15 4 R340 TPM@0_5%_4
[6,17,24] LPC_LAD3 LAD3 PP TP45
B 18 3 B
[6,17,24] LPC_LAD2 LAD2/SPI_IRQ GPX/GPIO2 TP44
[6,17,24] LPC_LAD1 21 30
24 LAD1/MOSI GPIO1/SCL TP40
[6,17,24] LPC_LAD0 C302 C274
20 LAD0/MISO 29 TPM@10u/6.3V_4
[6,17,24] LPC_LFRAME# LFRAME/SCS SDA/GPIO0 TP39 TPM@0.1u/16V_4
R329 SERIRQ_R
*shortTPM@0_5%_4 27 6 BADD R343 *TPM@10K_1%_4
[6,24] SERIRQ SERIRQ GPIO3/BADD
R349 PCLK_TPM_R 19
*shortTPM@0_5%_4 5
[6] PCLK_TPM LCLK/SCLK TEST
CLKRUN#: R359 LPC_CLKRUN#_D 13
*shortTPM@0_5%_4 2 +3V +TPM_VDD
[6,24] CLKRUN# CLKRUN/GPIO04/SINT NC1
PU 8.2 K on EC side PLTRST#_R 17 7
1 2 LPCPD#_R 28 LRESET/SPI_RST/SRESET NC2 10 R356 TPM@2.2_1%_6
[6,17,24] PLTRST# LPCPD NC3
D10 TPM@RB500V-40 11
26 NC4 12
+3V_S5 31 NC7 Reserved 25 C313 C306 C323 C315
NC8 NC6
GND1
GND2
GND3
GND4
EPAD
TPM@10u/6.3V_4 TPM@0.1u/16V_4 TPM@0.1u/16V_4 TPM@0.1u/16V_4
R332
33
9
16
23
32
*10K_1%_4
1 2
[6] LPCPD#
D6 TPM@RB500V-40
AMD CL R333 This module is LPC interface

A w/o TPM: Stuff NTPM@10K_1%_4 IF SPI interface , reset need link PCIERST# A
with TPM: DNI

PROJECT : ZAS
1A
TPM (NPCT650)/G-sensor
5 4 3 2 1
5 4 3 2 1
USB Type C (UTC)
+5V_S5 +CC_PWR
20
R58 *shortTYP_C@0_5%_8
R59 *shortTYP_C@0_5%_8 Type-C CC
Vendor suggest input cap 120u Q4

D +TYPEC_VBUS_C TYP_C@AON7401 +TYPEC_VBUS +TYPEC_VBUS D
+CC_PWR
+TYPEC_VBUS_C 3
S
U3
C380 TYP_C@150u/6.3V_3528H1.9 5 2 C369 TYP_C@0.1u/25V_4
1
+
2
C66 TYP_C@10u/6.3V_4 2 15 C58 TYP_C@10u/6.3V_4 +5V_S5 C368 TYP_C@0.1u/25V_4
IN1#1 OUT#2
G
C67 TYP_C@10u/6.3V_4 3 14 R78 D19
4 IN1#2 OUT#1 C83 TYP_C@10K_1%_4 TYP_C@AZ5725-01F.R7G
4
5 IN2 11 25810_CC1 TYP_C@0.1u/25V_4
1
AUX CC1 13 25810_CC2 R83 25810_UFP#_G2
25810_EN CC2 For PD 5V
R56 *shortTYP_C@0_5%_4 6 TYP_C@10K_1%_4
[24] EC_TypeC_EN EN 1 25810_FAULT# R70 *shortTYP_C@0_5%_4 R82 TYP_C@100K_1%_4
BC005725Z00 Amazingic (AZ5725-01F.R7G)
TYPEC_CHG 7 FAULT 20 25810_LD_DET# CC_OC# [5]
TYPEC_CHG_HI 8 CHG LD_DET 19 25810_UFP#
3
R43 *shortTYP_C@0_5%_4 R76 *shortTYP_C@0_5%_4
[24] EC_TypeC_CHG_HI CHG_HI UFP 25810_POL# APU_TYPEC_UFP# [5] 25810_UFP#_G1 2
18 Q5
25810_REF POL 25810_AUO# 25810_POL# [24]
10 17 TYP_C@2N7002K
REF AUDIO 16 25810_DBG#
3
R53 TYP_C@100K_1%_4 25810_REF_RTN 9 REF_RTN DEBUG 25810_UFP# 2 Q7
1
12 21 TYP_C@2N7002K
GND#1 PwPd
Close to connector
1
TYP_C@TPS25810RVCR
USB2.0 ESD R64 TYP_C@0_5%_4
USB4_C
[6] USB4
USB4#_C
[6] USB4#
+3V_S5
R63 TYP_C@0_5%_4
C 25810_FAULT# CN1 C
R71 TYP_C@10K_1%_4
25810_UFP# R75 TYP_C@10K_1%_4
25810_EN R57 *TYP_C@10K_1%_4
A2 USB30_TX0_R
C89 TYP_C@0.47u/25V_6 +TYPEC_VBUS A4 SSTXp1 A3 USB30_TX0#_R
Test Only C91 TYP_C@0.47u/25V_6 B4 VBUS#1 SSTXn1 B11 USB30_RX0
C88 TYP_C@0.47u/25V_6 A9 VBUS#3 SSRXp1 B10 USB30_RX0#
25810_AUO# R73 TYP_C@10K_1%_4 C90 TYP_C@0.47u/25V_6 B9 VBUS#2 SSRXn1
25810_DBG# R72 TYP_C@10K_1%_4 VBUS#4
B2 USB30_TX1_R
SSTXp2 B3 USB30_TX1#_R
SSTXn2 A11 USB30_RX1
R81
R74
*TYP_C@0_5%_4
*TYP_C@0_5%_4
25810_LD_DET#
25810_POL#
R79
R80
TYP_C@10K_1%_4
TYP_C@10K_1%_4 A1
A12 GND#1
SSRXp2
SSRXn2
A10 USB30_RX1#
Type C1_HSIO_ ESD
R47 *TYP_C@0_5%_4 TYPEC_CHG R48 TYP_C@10K_1%_4 B1 GND#2
R52 *TYP_C@0_5%_4 TYPEC_CHG_HI R50 *TYP_C@10K_1%_4 B12 GND#3 A6 USB4_C
1 GND#4 Dp1 A7 USB4#_C
2 GND#5 Dn1 B6
3 GND#6 Dp2 B7 USB30_TX0_R
GND#7 Dn2 [6] USB30_TX0
4 C35 TYP_C@0.1u/16V_4
5 GND#8
6 NC#1 A5 25810_CC1 USB30_TX0#_R
NC#2 CC1 25810_CC2 [6] USB30_TX0#
B5 C36 TYP_C@0.1u/16V_4
CC2
A8 TYPEC_SBU1
SBU1 TYPEC_SBU2 TP11
B8
SBU2 TP7
[6] USB30_RX0
B B
[6] USB30_RX0#
TYP_C@AUSB0181-P101A
[6] USB30_TX1 USB30_TX1_R

C49 TYP_C@0.1u/16V_4
USB30_TX1#_R
[6] USB30_TX1#
C48 TYP_C@0.1u/16V_4
U2
USB30_TX1_R 1 9 USB30_TX1#_R
USB30_RX1 LINE-1 LINE-2 USB30_RX1# U4
2 8
LINE-3 LINE-4 USB4_C 1 1 6 USB4#_C
6
3 2 5 +5V_S5
GND 25810_CC2 25810_CC1 [6] USB30_RX1
3 GND VDD 4
USB30_TX0_R 4 7 USB30_TX0#_R 3 4
USB30_RX0 5 LINE-6 LINE-5 6 USB30_RX0#
LINE-8 LINE-7 TYP_C@AZC099-04S.R7G [6] USB30_RX1#
TYP_C@AZ1045-08F.R7G
USE 5V TVS for U3 USE 4CH TVS for U2/CC

BC104508Z00 Amazingic BC09904SZ00 Amazing
A BC605S8QZ00 PANJIT BCSRV05WZ01 PANJIT A
BC38109LZ00 INPAQ BCST2304Z00 INPAQ

PROJECT : ZAS
1A
Type-C
5 4 3 2 1
5 4 3 2 1
USB 3.0 Connector (UB3)

USB 3.0(5V)
BC106506000
BCD5326DZ00
BC12010LZ00
+USBPWR1
6CH
Amazing(10KV)
willsemi(10KV)
INPAQ(8KV_can't use)
21
U6
AZ1065-06F.R7G
USB30_TX2_R 1
I/O-1 10 USB30_TX2#_R
D C159 *1.6p/50V_4 2 I/O-6 D
VDD 9
3 GND#1
[6] USB30_RX2# NC#1 8
11
12
+5V_S5 [6] USB30_RX2 USB6#_R 4 NC#2
CN8
C155 *1.6p/50V_4 I/O-2 7 USB6_R
U5 Shield Shield I/O-5
G524B2T11U 5 USB30_RX2 5
GND#2
StdA_SSRX- I/O-3 USB30_RX2#
C134 1u/6.3V_4 5 3 R206 0_5%_4 4 6
IN OCB USB_OC1# [5] GND C386 I/O-4
6 StdA_SSRX+
+USBPWR1 USB6_R 3 0.1u/16V_4
D+
Close to CONN 7
[6] USB6
11
USB6#_R GND_Drain
4 1 2
[24] USBON# EN GND OUT [6] USB6# 8
D-
StdA_SSTX-
2 +USBPWR1 1
VBUS
C146 C145 C385 R205 0_5%_4 9 StdA_SSTX+ USB protection diodes for ESD.
Enable: Low Active /2.5A 470p/50V_4 0.1u/16V_4 100u/6.3V_12 Shield Shield
GMT:AL000524007 as close as possible to USB connector pins.
53930-00902-V01
10
13
EMS:AL005203001 C140 0.1u/16V_4 USB30_TX2#_R
BCD:AL002822000 [6] USB30_TX2# USB30_TX2_R
C139 0.1u/16V_4
[6] USB30_TX2
C150 C147
C *1.6p/50V_4 *1.6p/50V_4 C
DB USB2.0 (UB2)
+5V_S5
U17 +USBPWR2 CN16
35
G524B2T11U 196332-34041-3
C327 1u/6.3V_4 5 3
IN OCB USB_OC2# [5] 1
+USBPWR2 2
3
Close to CONN 4
B USBON# 4 1 B
EN GND OUT 5
6
2 [7,11,14,15,23,24,25,26,31] +3VPCU
C325 C326 C322 7
Enable: Low Active /2.5A 470p/50V_4 0.1u/16V_4 *100u/6.3V_12 Power LED [24]
[24]
PWRLED#
SUSLED#
8
9
GMT:AL000524007 Battery LED [24]
[24]
BATLED0#
BATLED1#
10
11
EMS:AL005203001 12
over ME height limit
BCD:AL002822000 13
[6] USB1 14
[6] USB1# 15
16
17
[6] USB0 18
[6] USB0# 19
20
21
[14] HP_JD# 22
23
24
[14] SLEEVE_R 25
26
27
A
[14] RING2_R 28 A
29
30
[14] HP-L3 31
[14] HP-R3
32
33
34
PROJECT : ZAS
36
1A
ADOGND
USB3/USB2 DB
5 4 3 2 1
5 4 3 2 1
TOUCH PAD(TPD)
+3V +3V TP_PWR C480
VDD_18
TP_PWR 22
0.1u/16V_4
R590 R591
Q32A 2.2K_5%_4 2.2K_5%_4
5
D R628 R627 D
PJT138K
10K_1%_4 10K_1%_4
4 3 I2C_SCL_TP_R
2
[5] I2C_SCL_TP
1 3 I2C_INT#_TP
[5] APU_I2C_INT# 1.8V_S0 +3V_S5
2
Q37 2N7002K
R626 *0_5%_4 1 6 I2C_SDA_TP_R

[5] I2C_SDA_TP
Q32B
PJT138K
R583 0_5%_4 TP_PWR

Discharge circuit
+3V_S5 R615 *short_4 1 3
+3V +VIN TP_PWR
C447 Q35 C441 C446
2
C C
*0.1u/16V_4 *PJA3413 0.22u/10V_4 0.1u/16V_4
TP_PWR R624 R617
R603 *1M_5%_6 *22_5%_8
R597 *10K_1%_4 *10K_1%_4
[24] PTP_PWR_EN#
R592 R593 C438
3
10K_1%_4 10K_1%_4 *1000p/50V_4
3
PTP_PWR_EN# 2 2 2 Q33
R602 *short_4 TPCLK_CN 1 R625
[24] TPCLK 2 *2N7002K
R601 *short_4 TPDATA_CN *1M_5%_6
[24] TPDATA 3 Q34 Q36
1
1
1
I2C_SDA_TP_R R600 *short_4 CLK_SDATA_R 4 *DDTC144EUA-7-F *DDTC144EUA-7-F
C449 C448 I2C_SCL_TP_R R599 *short_4 CLK_SCLK_R 5
I2C_INT#_TP R612 *short_4 6
10p/50V_4 10p/50V_4 7
8
[24] TPD_INT#
10
20160205_EMI [24] TPD_EN
CN14
B 51653-0080N-V02 B
HOLE(OTH)
HOLE6 HOLE5
HOLE2 HOLE4 HOLE15 HOLE13 HOLE1 *H-TC315BC161D161PT *H-TC315BC161D161PT
*HG-EJ-AP-1 *HG-ZAS-1 *HG-C354D126P2 *HG-C315D95P2 *hg-c236d95p2 HOLE10 HOLE7 HOLE3 SPAD1 SPAD4 SPAD2 SPAD3
7 6 7 6 7 6 7 6 7 6 *H-C122D122N *O-EJ-KBL-1 *H-TC315BC161D161PT *SPAD-C315NP *SPAD-C236NP *SPAD-C236NP *SPAD-C236NP
8 5 8 5 8 5 8 5 8 5
9 4 9 4 9 4 9 4 9 4
1
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
SPAD6 SPAD5
R632 R633 R634 *SPAD-C177NP *SPAD-C177NP
*short_4 *short_4 *short_4
HOLE9
HOLE8 HOLE14 HOLE11 HOLE12 H-C236D126P2
1
*HG-C315D165P2 *HG-C315D165P2 *HG-C354D220P2 *HG-C354D220P2
7 6 7 6 7 6 7 6
A 8
9
5
4
8
9
5
4
8
9
5
4
8
9
5
4
PUT in BOT A
CPU HOLE
1

1
2
3
1
2
3
1
2
3
1
2
3
WLAN NUT : MBZ8P003010 PROJECT : ZAS

1A
Touch Pad/HOLE
5 4 3 2 1
5 4 3 2 1
KEYBOARD (KBC)
CN13
29
1
MX0
MX1
MX0 [24]
MX4
<EMI>
C288 *220p/50V_4
CPU FAN CTRL(THM)
23
2 MX1 [24]
MX2 MX5 C287 *220p/50V_4
3 MX2 [24] +5V +5V
MX3 MX6 C286 *220p/50V_4 +3V +3V
4 MX3 [24]
MX4 MX7 C285 *220p/50V_4
D 5 MX4 [24] D
MX5 MY3 C281 *220p/50V_4
6 MX5 [24]
MX6 MY2 C280 *220p/50V_4 R540 *short_6 C404 10u/6.3V_4
7 MX6 [24]
MX7 MY1 C279 *220p/50V_4
8 MX7 [24] R546 R539 R555
MY17 MY0 C278 *220p/50V_4 C398 0.1u/16V_4
9 MY17 [24]
MY16 MY7 C277 *220p/50V_4 10K_5%_4 10K_5%_4 10K_5%_4
10 MY16 [24]
MY15 MY6 C284 *220p/50V_4
11 MY15 [24]
MY14 MY5 C283 *220p/50V_4 R545 *0_5%_4
5
12 MY14 [24] [4] THERM_ALERT#
MY13 MY4 C282 *220p/50V_4
13 MY13 [24]
2
MY12 MY11 C297 *220p/50V_4 FAN1_RPM [24] +5V_FANVCC
14 MY12 [24] 1
MY11 MY10 C296 *220p/50V_4
15 MY11 [24] FAN_PWM_CN 2
MY10 MY9 C295 *220p/50V_4 1 3
16 MY10 [24] [24] FAN1_PWM 3
MY9 MY8 C294 *220p/50V_4
17 MY9 [24] Q24 4
MY8 MX0 C292 *220p/50V_4 EC PWM SIGNAL
18 MY8 [24] METR3904-G
MY7 MX1 C291 *220p/50V_4 C414 C399
19 MY7 [24]
6
MY6 MX2 C290 *220p/50V_4 0.01u/50V_4 *220p/50V_4
20 MY6 [24]
MY5 MX3 C289 *220p/50V_4
21 MY5 [24]
MY4 MY15 C301 *220p/50V_4
22 MY4 [24]
MY3 MY14 C300 *220p/50V_4 CN10
23 MY3 [24]
MY2 MY13 C299 *220p/50V_4 50278-00401-001
24 MY1
MY2 [24]
MY12 C298 *220p/50V_4 For EMI
25 MY1 [24]
MY0
26 MY0 [24]
27 NBSWON#_R R342 33_5%_4
28 NBSWON# [24]
C C
1
30
D7
*AZ5725-01F.R7G C314
180p/50V_4
2
196153-28021-35
+3VPCU
+3V_LDO_EC
10 1 MX0
MX7 9 2 MX1
MX6 8 3 MX2
R560 reserve switch for test MX5 7 4 MX3
10K_1%_4 MX4 6 5
(MP remove)
SW1
*TME-532W-Q-T/R(439) RP1 *10K_6_10P8R
Stich cap
NBSWON# 2 3
1 4
C410
6
0.1u/16V_4
B B
KB_BL LED (KBL) +5V

+5V
C317 *KBL@2.2u/16V_6
R363
1
KBL@10K_1%_4
Q17
2 KBL@PJA3413
CN18
5
20mil 20mil
3
KBL@50591-00401-001
3
+5V_KB R366 +5V_KB_R 1

2 *shortKBL@0_5%_4
[24] KB_BL_LED 2
A 3 A
Q18 C328 C329 4
KBL@DDTC144EUA-7-F
1
KBL@4.7u/6.3V_4 KBL@0.01u/50V_4
6

PROJECT : ZAS
1A
KB/FAN/Stich cap
5 4 3 2 1
5 4 3 2 1
+3V_LDO_EC
EC(KBC)
1
L11
2
BLM15AG121SN1D
C309
0.1u/16V_4
+A3VPCU
EC different with ZAB list
11/09 change pin 97 from USB-BC_ON to PANEL_LED_EN
11/10 FAN change from DAC to PWM :exchange Pin32 & Pin81
11/15 the same with 11/10(confirm Pin32:FAN1_PWM, Pin 47: FAN1_RPM)
S5_ON R247 10K_1%_4
+3V_S5
24
SIO_EXT_SCI# R596 *10K_1%_4 SIO_EXT_SCI# : AMD CL don't PU
ECAGND
12 mils +3VPCU_EC
+3V_LDO_EC R224 2.2_1%_6 +3V
SIO_A20GATE R549 *10K_1%_4

C208 C457 C456 C215 C217 C257 +VSTBY_FSPI SIO_RCIN# R275 10K_1%_4
0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 (For PLL Power) SERIRQ R580 *10K_1%_4 SERIRQ : AMD CL don't PU
+3VPCU_ECPLL 1 2
+3VPCU_EC
L9 BLM15AG121SN1D
D D
SUSON R230 100K_1%_4
+VSTBY_FSPI R319 2.2_1%_6 +3V_EC C417 C214 MAINON R362 100K_1%_4
+3V
0.1u/16V_4 0.1u/16V_4 VRON R614 100K_1%_4
+3V_LDO_EC R556 2.2_1%_6 PLTRST# R330 100K_1%_4
Reserved for EC debug +3V_S5 R323 *2.2_1%_6 C256 RSMRST# R558 *10K_1%_4 ITE suggest RSMRST# PD
R557 *2.2_1%_6 0.1u/16V_4 CPU_ID R551 *SP@0_5%_4
+3V_S5 U14
114
121
106
127
CPU_ID:
11
26
50
92
74
IT8987E/BX CZ@: Internal PU
TYP3@: External PD
VSTBY_1
VSTBY_2
VSTBY_3
VSTBY_4
VSTBY_6
VCC
AVCC
VSTBY_FSPI
VSTBY(PLL)
10 84
[6,17,19] LPC_LAD0 LAD0 EGCLK/GPE3 POA_EN# SB_ACDC [25]
9 83 1
[6,17,19] LPC_LAD1 8 LAD1 EGCS#/GPE2 TP42
[6,17,19] LPC_LAD2 LAD2
7 82
+3V_LDO_EC
[6,17,19]
[6,17,19]
LPC_LAD3
PLTRST#
22
13
LAD3
LPCRST#/GPD2
VCC
VSTBY
EGAD/GPE1
56
BT_EN [17]
SM BUS PU(KBC)
[6] CLK_PCI_EC LPCCLK/GPM4 VCC KSO16/SMOSI/GPC3 MY16 [23]
6 57
CLK_PCI_EC [6,17,19] LPC_LFRAME# LFRAME#/GPM5 VSTBY KSO17/SMISO/GPC5 MY17 [23]
PROCHOT_EC 17 LPC 19 POA_PWR_INT# 1 +3V_LDO_EC
LPCPD#/GPE6 L80HLAT/BAO/GPE0 20 POA_POWERREQ 1 TP81
1
C476 *0.1u/16V_4
L80LLAT/GPE7 TP83
R575 D32 126 VSTBY
VSTBY MBCLK R568 4.7K_5%_4
[5] SIO_A20GATE GA20/GPB5
R325 100K_1%_4 RB500V-40 5 GPIO 122 MBDATA R567 4.7K_5%_4
[6,19] SERIRQ SERIRQ/GPM6 VCC DTR1/SBUSY/GPG1/ID7 DDR4_SUSON_2V5 [28]
*short_4 15 99 Layout put in device side
[20] 25810_POL# ECSMI#/GPD4 VSTBY GPH6/ID6 TPD_EN_R USBON# [21]
23 98 C216 180p/50V_4
[6] SIO_EXT_SCI# VSTBY
2
WRST# 14 ECSCI#/GPD3 GPH5/ID5 97 R244 33_5%_4 Change EC SMBus PU voltage from

SIO_RCIN#_C WRST# VSTBY GPH4/ID4 USB_CHARGE_ON 1 PANEL_LED_EN [33] TPD_EN [22] +3V_GFX to +3V_S5 due to it also
R276 *short_4 4 VSTBY 96 +3V_S5
[6] SIO_RCIN# IOAC_WLAN_WAKE# KBRST#/GPB6 GPH3/ID3 TP35 connect to CPU(SIC/SID) and GPU.
TP80 1 16 95 C240 180p/50V_4
C270 C428 PWUREQ#/BBO/GPC7 VSTBY CTX1/SOUT1/SMDAT3/GPH2/ID2 94 EC_ODD_EJ#_R AC_Protect [25]
R279 33_5%_4 2ND_MBCLK R566 4.7K_5%_4
CRX1/SIN1/SMCLK3/GPH1/ID1 EC_ODD_EJ# [15] 2ND_MBDATA EC need read CPU temperature even
33p/50V_4 1u/6.3V_4 93 R565 4.7K_5%_4 in UMA mode or GPU off mode
CLKRUN#/GPH0/ID0 CLKRUN# [6,19]
R311 8.2K_5%_4 Layout put in device side
+3V
113 3
original design
R:22 ohm (DNI)
C:10pF(DNI)
[23]
[5]
KB_BL_LED
DNBSWON#
123
86
CRX0/GPC0
CTX0/TMA0/GPB2 IT8987
VSTBY
GPH7 D/C# [25]
R564
C415
Layout put in device side
33_5%_4
180p/50V_4
LID# [11] CORE_PWM_PROCHOT# [4,25,29]
[11]
1 EC_FPBACK# IOAC_RST# 85 PS2DAT0/TMB1/GPF1 117 1
3
TP37
20170104 EMI change APU_DISP_BLEN_C PS2CLK0/TMB0/CEC/GPF0 SMCLK2/PECI/GPF6 LID#_R TP34 PROCHOT_EC 2
R:0ohm(Mount) R324 *short_4 88 118 D31 TVM0G5R5M220R_22p Q28
[4,11] APU_DISP_BLEN IOAC_LAN_WAKE# PS2DAT1/RTS0#/GPF3 SMDAT2/PECIRQT#/GPF7
TP38 1 87 110 ESD Closed to EC
C:33pF(Mount)
1.8V_S0 90 PS2CLK1/DTR0#/GPF2 PS/2 SMCLK0/GPB3 111 MBCLK [25] 2N7002K
[22] TPDATA PS2DAT2/GPF5 SMDAT0/GPB4 MBDATA [25]
89 SM_BUS 115 TVS PN: R588
1
C 2ND_MBCLK [4] C
[22] TPCLK PS2CLK2/GPF4 SMCLK1/GPC1 116
SMDAT1/GPC2 2ND_MBDATA [4] Priority1: CY000220Z00 100K_1%_4
Priority2: CY402220B00
119
[5] SUSB# DSR0#/GPG6
33
[5] EC_PWROK GINT/CTS0#/GPD5 24
UART PWM0/GPA0 PWRLED# [21]
25
PWM1/GPA1 BATLED1# [21]
108 28
[14] AMP_MUTE# 1 109 RXD/SIN0/GPB0 PWM2/GPA2 29 SUSLED# [21]
TP33
TXD/SOUT0/GPB1 PWM3/GPA3
PWM4/GPA4
30
31 USB_CTL1 1
BATLED0# [21]
MAINON [26,28,31]
SPI NOR FLASH(128KB) (KBC) +3V_LDO_EC
PWM5/GPA5 TP86
125 32
[22] PTP_PWR_EN# EC_SPI_SCK SSCE1#/GPG0 PWM6/SSCK/GPA6 FAN1_PWM [23]
105 34
FSCK/GPG7 PWM7/RIG1#/GPA7 PCBEEP_EC [14]
R246 *10K_1%_4 EC_SPI_SDI EC_SPI_SDO 103 FLASH PWM 47 R585
FMISO/GPG5 TACH0A/GPD6 FAN1_RPM [23] +3V_LDO_EC
R245 *10K_1%_4 EC_SPI_SDO EC_SPI_SDI 102 48 POA_AUTH_ERR 1 10K_1%_4
EC_SPI_CS0# FMOSI/GPG4 TACH1A/TMA1/GPD7 TP85
101
FSCE#/GPG3 U24
Don't place any pull-up resistor 100 EC requirement 25mA
[26,27,31] S5_ON SSCE0#/GPG2 77 SYS_HWPG_R R336 SYS_HWPG +3V_LDO_EC 8 1 EC_SPI_CS0#
*short_4
on GPG0, GPG2, and GPG6 36 GPJ1 76 POA_FP_PWREN# 1 VCC CS 6 EC_SPI_SCK
(Reserved hardware strapping). [23] MY0 37 KSO0/PD0 TACH2/GPJ0 TP46 CLK 5 EC_SPI_SDI
[23] MY1 KSO1/PD1 EC_SPI_HOLD# 7 DI EC_SPI_SDO
38 120 2
[23] MY2 KSO2/PD2 TMR0/GPC4 CPU_ID SUSON [28] HOLD DO
39 124 R543 10K_1%_4 C407
[23] MY3 40 KSO3/PD3 TMR1/GPC6 4 3
[23] MY4 KSO4/PD4 GND WP *10p/50V_4
41
[23] MY5 42 KSO5/PD5 107 EC_SPI_WP#
[23] MY6 KSO6/PD6 PWRSW/GPE4 NBSWON# [23] W25X10CLSNIG +3V_LDO_EC
43 18 R584 10K_1%_4
[23] MY7 KSO7/PD7 RI1#/GPD0 SUSC# [5]
44 WAKE UP 21 HWPG
[23] MY8 45 KSO8/ACK# RI2#/GPD1
[23] MY9 KSO9/BUSY KBMX
46 35 WLANPWR# 1
SM BUS ARRANGEMENT TABLE [23] MY10 51 KSO10/PE RTS1#/GPE5 112 TP84
[23] MY11 KSO11/ERR# RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7 RSMRST# [5]
52 Layout put in device side(ESD)
[23] MY12 KSO12/SLCT
SM Bus 1 Battery 53 R358 33_5%_4
[23] MY13 54 KSO13 RF_EN [17]
C320 180p/50V_4
[23]
[23]
MY14
MY15
55
58
KSO14
KSO15 ADC0/GPI0
66
67
RF_EN_C
C316 10u/6.3V_4 ECAGND
ICMNT [25]
HWPG(KBC) +3V
SM Bus 2 APU [23] MX0 KSI0/STB# ADC1/GPI1
59 68 DGPU_OPP 1
B [23] MX1 KSI1/AFD# ADC2/GPI2 TP47 B
60 A/D D/A 69
[23] MX2 61 KSI2/INIT# ADC3/GPI3 70 1 VRON [29]
SM Bus 3 N/A LANPWR# R544
[23] MX3 KSI3/SLIN# ADC4/GPI4 ODD_POWER TP48
62 71 1 10K/F_4
[23] MX4 63 KSI4 ADC5/DCD1#/GPI5 72 TP49
[23] MX5 KSI5 ADC6/DSR1#/GPI6 ACIN [25]
SM Bus 4 N/A 64 73 1 2 HWPG
[23] MX6 KSI6 ADC7/CTS1#/GPI7 TEMP_MBAT# [25] [31] HWPG_0.775VS5 HWPG [5]
65 D26 *1N4148WS
[23] MX7 KSI7 1 2
If need TS_EN function, need add 180p+33R and Layout put in device side [31] HWPG_1.8VS5
81 TS_EN 1 D27 *1N4148WS
TPD_INT#_C 128 DAC5/RIG0#/GPJ5 80 TP41 1 2
R229 33_5%_4 CLOCK
VCORE
VSS_2
VSS_3
VSS_4
VSS_5
VSS_1
[22] TPD_INT# GPJ6 DAC4/DCD0#/GPJ4 EC_TypeC_EN [20] [29] VRM_PWRGD

AVSS
2 79 D25 1N4148WS
[26,31] SYS_SHDN# GPJ7 DAC3/TACH1B/GPJ3 CLR_CMOS [7]
78 1 2
DAC2/TACH0B/GPJ2 EC_TypeC_CHG_HI [20] [28] HWPG_VDDR
C213 D30 *1N4148WS
180p/50V_4 1 2
[27] HWPG_0.95VS5
1
27
49
91
104
ECAGND 75
12
D28 *1N4148WS
1 2
[26] SYS_HWPG
Layout put in device side(ESD) D29 *1N4148WS
C263
1 2
L10 0.1u/16V_4 1 2
[31] HWPG_1.5V
BLM15AG121SN1D D24 *1N4148WS
1 2
[28] HWPG_2.5V
D23 *1N4148WS
Power sequence Battery B/I SW (FSW) R232 *0_5%_4 +3VRTC

R225 *0_5%_4 +3VPCU
BATT Detect SW
R228
NBSWON# 1 *10K_1%_4
TP26 SW2 +3VRTC
NDT016-G1A-KKKT WRST#
DNBSWON# 1 * TP27 ZAS no GPU, no need this Circuit.
SUSON 1 * 2 4
TP28 R254 C201
A 1 3 A
1 [25] BI# 100K_1%_4 *0.1u/16V_4
SUSB# *
3
TP30 Vgs = 1.5V

3
6
EC_PWROK 1 * TP82 2 BI_GATE 5 2

PLTRST# 1 * TP43 SW3 Q12A Q12B
3
4
Q31 C450 TME-532W-Q-T/R(439)

1
HWPG 1 R582 *SP@0_5%_4 *PJ4N3KDW *PJ4N3KDW

4
* TP79 5
PJA138K *0.1u/16V_4
MAINON 1
Vgs = 1.5V
* TP50
Just for A
RSMRST# 1 * TP31 6 Quanta Computer Inc.
S5_ON 1 * TP29 PROJECT : ZAS
2
1
* Size Document Number Rev

1A
EC (ITE8987E/BX)
5 4 3 2 1
5 4 3 2 1
Double Check ADP-IN Connector

25
with ME PQ11 VA2 PQ17
PJ14 VA1 TPCA8109 TPCA8109
PD3 PR103
SV1040 0.02_1%_0612 +VIN
D
3 1 3
4 2 5 3 2 5
3 1 2 1
2 PR107
G
D 1 D
1
*SHORT_4
PC107 PC105 PC108 PR104 24737_ACN PC122 PC124 PR124
4
CI2504P1H02-RB-NH 0.1u/25V_4 2200p/50V_4 PC106 PD2 0.1u/25V_4 220K_1%_4 0.1u/25V_4 2200p/50V_4 33K_1%_4
0.1u/25V_4 P4SMAFJ20A
24737_ACP
2
PR109
3 4 PR101 *SHORT_4
2
PR108 *SHORT_4 PR133
220K_1%_4 2 5 10K_5%_4
D/C# [24]
PD4
1N4148WS 1 6
1
recommend 200mA at least. PQ13
IMD2AT108
3
2
24737_ACP PQ20
2N7002K
1
24737_ACN
PC110
PC204 0.1u/25V_4 PC202
PR223
63.4K_1%_4
+3VPCU 0.1u/25V_4 0.1u/25V_4
1
+VIN
PR224 PC209
ACP
ACN
11K_1%_4 1u/16V_4
C 24737_ACDET 6 24737_REGN C
100K_1%_4
100K_1%_4
16
*10K_5%_4
0.1u/25V_4
ACDET REGN
PC109
2
PR110
PR105
PR106
24737_VCC 20 PD7 PC116 PC115

VCC PR126 RB500V-40 2200p/50V_4 10u/25V_8
PR122 *short_6
1
20_5%_12 PC205 17 24737_BST PQ16
[24] ACIN BTST
0.47u/25V_6 AON7410
5
PC203 D
[5] ACPRESENT
0.047u/50V_6 G
PR113 18 24737_DH 4
*0_5%_4 5 HIDRV S
[24] SB_ACDC ACOK
6
1
2
3
PR114 PU8 19 24707_LX
*SHORT_4 2 5 PR123 BQ24737RGRR PHASE
PQ14B *SHORT_4 PR130
2N7002KDW PQ14A MBDATA 8 PL12 0.01_1%_0612
2N7002KDW SDA 6.8uH_7x7x3
1
15 24737_DL 1 2 BAT-V
LODRV
PC113 MBCLK 9
0.1u/25V_4 SCL PQ19
5
+3VPCU PR129 AON7410 PR137
*SHORT_4 14 D *4.7_5%_6
PC114 GND#1
G
*100p/50V_4 if no external switch control=> stuff PR134 10K_5%_4 24737_BM# 11 4 PR139 PR138
PJ16 BM S *SHORT_4 *SHORT_4
if has external switch control=> DNI
50458-00801-V02_Header PC211
1
2
3
PR115 10K_5%_4 24737_CMPOUT 3 0.1u/25V_4
BAT-V CMPOUT 13 24737_SRP PC214 24737_SRP PC123 PC121 PC8111
SRP PR135 10_5%_4 *680p/50V_6 2200p/50V_4 10u/25V_8 *10u/25V_8
B PR131 316K_1%_4 24737_ILIM 10 24737_SRN PC120 PC8110 B
10
BI# [24] ILIM PC213 10u/25V_8 *10u/25V_8

PR117 *0_5%_4 0.1u/25V_4
8 24737_CMPIN 4 12 24737_SRN
7 CMPIN SRN PR136 7.5_5%_6
GND#2
GND#3
GND#4
GND#5
GND#6
6 PR112 100_1%_4 TEMP_MBAT# PC210
5 TEMP_MBAT# [24] IOUT 0.1u/25V_4
4
3 PR132 PR228
+3VPCU
7
21
22
23
24
25
2 *100K_5%_4 100K_1%_4
1 PR111
1M_5%_6
SRP／SRN
9
R2
PR119 PR118
PR230 PC212
100_1%_4 100_1%_4
100K_1%_4 0.01u/50V_4 4-Cells Others
bq24707A 0／0 10／7.5
3
Double Check BATT Connector PR116

24737_BM# 2 SP@115K_1%_4 PR120
with ME MBCLK [24] R1 *0_5%_4 CORE_PWM_PROCHOT# [4,24,29]
PQ18 bq24737 10／7.5 10／7.5
1
[24] ICMNT
MBDATA [24] *2N7002K
3
1
24737_CMPOUT 2
PQ15
PC111 PC112 PC206 2N7002K
REGN MAX voltage 6.5V
*47p/50V_4 *47p/50V_4 100p/50V_4
V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr
1
2
=0.793V for 3.965A current limit

PD6 PD5 PR222
A
PDZ5.6B PDZ5.6B
R1 R2 *SHORT_4
A
Pin10 ILIM=0.793V
45W
ZRZL UMA 51K 100K Rsr = 0.01ohm
CS35102FB04
65W [24] AC_Protect For BATT Only
ZAB UMA 115K 100K
CS41152FB08 Quanta Computer Inc.
78W
ZAB DIS 162K 100K PROJECT : ZAS
CS41622FB11 Size Document Number Rev
1A
Charger(BQ24737RGRR)
5 4 3 2 1
5 4 3 2 1
26
3V_LDO no need Intersheet References, EE side connection with 3V_LDO_EC
+VIN [11,15,22,25,27,28,30,31,32,33] VL [31]
+5VPCU [27,31]
+3VPCU [7,11,14,15,21,23,24,25,31] SYS_SHDN# [24,31]
PR77
*SHORT_6
+3VPCU VL 3V_LDO
[24] SYS_HWPG
+VIN +VIN
*33u/25V_D6.3H4.5
SYS_SHDN# PR209
10u/6.3V_6
0.1u/25V_4
D D
10K_1%_4
PC152
+
PC172 PC177 PC92 PC186
10u/25V_8 2200p/50V_4 PR80 2200p/50V_4 10u/25V_8
PR204 PR212 10K_5%_4 PC179
PC87
PC180
*SHORT_4 *SHORT_4 4.7u/6.3V_4
51225_VIN
PQ31 +3VPCU
5
AON7410 3.3 Volt +/- 5%
PR210 D
+5VPCU 100K_1%_4 TDC : 8.4A
13
12
G
3
5 Volt +/- 5% PQ30
4
S PEAK : 11.2A
VREG5
VREG3
VIN
TDC : 7.91A
2
AON6978 OCP : 14A +3VPCU
1
2
3
+5VPCU 7 6 SYS_SHDN#
PEAK : 10.6A
D1
Width : 340mil
D1
D1
PGOOD EN2
OCP : 14A 51225_EN1 20
EN1 DRVH2
10 51225_DH2
PC91
Width : 320mil PL8 G1 1 51225_DH1 16 9 51225_VBST2 PR81 PL9
2.2uH_7x7x3 PC83 PR72 DRVH1 VBST2 1_1%_4 2.2uH_7x7x3
2 1 51225_SW1 9 S1/D2 51225_VBST1 17 PU5 8 51225_SW2 0.1u/25V_4 1 2
VBST1 TPS51225RUKR SW2
0.1u/25V_4 1_1%_4 51225_SW1 18 11 51225_DL2
G2 8 SW1 DRVL2
5
51225_DL1 15 4 51225_FB2 PR208
DRVL1 VFB2
PR205 D PR215 6.49K_1%_4
15.8K_1%_4 PR71 51225_FB1 2 21 *4.7_5%_6
G
S2
S2
S2
+ *4.7_5%_6 VFB1 GND#1 4 +
PC178 PC78 14 22 S PC93 PC187
GND#6
GND#5
GND#4
GND#3
5
6
7
VO1 GND#2
VCLK
220u/6.3V_D6.3H4.2 0.1u/25V_4 0.1u/25V_4 220u/6.3V_D6.3H4.2
1
2
3
CS1
CS2
PQ32
PR75 AON7752 PC188 PR76
10K_1%_4 *680p/50V_6 9.31K_1%_4
19
26
25
24
23
PC81
C *680p/50V_6 C
51225_CS1
51225_CS2
PR203
*SHORT_6
Rds(on)=14.5m ohm
OCP:14A OCP:14A
L(ripple current)
Rds(on)=4.9m ohm L(ripple current)
=(9-5)*5/(2.2u*0.3M*9) PR74 PR79 =(9-3.3)*3.3/(2.2u*0.355M*9)
=3.367A 49.9K_1%_4 150K_1%_4 ~2.676A
Iocp=14-(3.367/2)=12.316A Iocp=14-(2.676/2)=13.162A
Vth=(12.316A*4.9mOhm)+1mV Vth=(12.662A*14.5mOhm)+1mV
=61.35mV =184.599mV
R(Ilim)=(61.35mV*8)/10uA Power auto recovery R(Ilim)=(184.599mV*8)/10uA
~49.08K =147.68K
3V_LDO PR206
*SHORT_6 +3V_LDO_EC
+3VPCU
+3V_LDO_EC +3V_LDO_EC
+3V_LDO_EC [23,24]
TDC : 100MA
PR207
*0_5%_6
For EC power auto recovery

Don't change to short pad
+5V_S5 [7,20,21,28,29,32,33] +3V_S5 [5,6,7,13,19,20,22,24,28,32]

+5V [12,14,15,18,23,31] +3V [4,5,6,7,9,11,12,13,14,15,16,17,18,19,22,23,24,27,28,29,31]
B B
+5VPCU +5VPCU +3VPCU +3VPCU
TDC : 5.25A TDC : 2.66A TDC : 1.65A TDC : 3.72A

PEAK : 7A PC82 PC85
PEAK : 3.54A PEAK : 2.2A PC90 PC94
PEAK : 4.97A
Width : 220mil 1u/25V_4 1u/25V_4 Width : 120mil Width : 80mil 1u/25V_4 1u/25V_4 Width : 160mil
1
7
+5V_S5 +5V +3V_S5 +3V
VIN1#1
VIN1#2
VIN2#1
VIN2#2
VIN1#1
VIN1#2
VIN2#1
VIN2#2
13 13
PC84 PC86 14 VOUT1#1 8 PC80 PC79 PC96 PC95 14 VOUT1#1 8 PC89 PC88
10u/6.3V_6 0.1u/16V_4 VOUT1#2 OUT2#1 9 0.1u/16V_4 10u/6.3V_6 10u/6.3V_6 0.1u/16V_4 VOUT1#2 OUT2#1 9 0.1u/16V_4 10u/6.3V_6
OUT2#2 OUT2#2
PU4 PU6
+5VPCU
4 AOZ1331DI 11 +5VPCU
4 AOZ1331DI 11
PC171 VBIAS GND#1 PC183 VBIAS GND#1
15 15
GND#2 GND#2
0.1u/16V_4 0.1u/16V_4
S5_ON 3 5 MAINON S5_ON 3 5 MAINON
[24,27,31] S5_ON ON1 ON2 ON1 ON2
CT1
CT2
CT1
CT2
MAINON [24,28,31]
PC175 PC174 PC184 PC181

12
10
12
10
*0.1u/16V_4 *0.1u/16V_4 *0.1u/16V_4 *0.1u/16V_4
A A
PC173 PC185 PC182

PC176 1000p/50V_4 1000p/50V_4 1000p/50V_4
1000p/50V_4
Soft-Start Soft-Start
PROJECT : ZAS
1A
SYSTEM 5V/3V (TPS51225R)
5 4 3 2 1
5 4 3 2 1
27
+VIN [11,15,22,25,26,28,30,31,32,33]
VDDP_0.95V_S5 [6,7,31]
VDDP_0.95V [2,6,7,31]
+5VPCU [26,31]
+3V [4,5,6,7,9,11,12,13,14,15,16,17,18,19,22,23,24,26,28,29,31]
Fsw=550KHz PC74
*0.01u/50V_4
+VIN
PR199
73.2K_1%_4
G5335-TON-1
D D
10u/25V_8
2200p/50V_4
*0.1u/25V_4
6
PC72
PC71
PC170
PU13
7 8
VDDP_0.95V_S5
TON
+5VPCU PR59 NC V+#1 9
V+#2
10_5%_4
G5335-VCC-1 21 V+#3
22
24 AM9420AYN23AC 0.95V
0.95 Volt +/- 5%
VCC V+#4 AM9220AYN23AC 0.95V
AM9120AYN23AC 0.95V
TDC : 6.15A
PC67 PEAK : 8.2A
+3V 10u/6.3V_6 AMD requirements (depends on OPN) Width : 260mil
Refer to datasheet...SR: 55366 / BR:53557 / SR FT4:55367
1.05V: 2.49K ohm, CS22492FB22
PR195 20 G5335-BST-1 0.95V: 0 ohm, CS00002JB38 VDDP_0.95V_S5
100K_1%_4 BST
PR196 25 PR61 PC66
*SHORT_4 LX#1 10 2.2_1%_6 0.1u/25V_4 PL7
G5335-PWRGD-1 1 LX#2 11 0.68uH_7x7x3
[24] HWPG_0.95VS5 PGOOD LX#3 16 G5335-LX-1 1 2
+5VPCU PR63 LX#4 17
*0_5%_4 LX#5 18
G5335-PFM-1 3 LX#6
22u/6.3V_6
22u/6.3V_6
22u/6.3V_6
22u/6.3V_6
22u/6.3V_6
0.1u/16V_4
*22u/6.3V_6
*22u/6.3V_6
PFM
PC76
PC73
PC75
PC63
PC69
PC65
PC64
PC77
PR60
G5335-AGND-1 12 *4.7_5%_6
G5335-EN-1 2 PGND#1 13
PR197 EN PGND#2 14 PR68 PC169
*SHORT_4 PGND#3 15 SP@0_5%_4 *1000p/50V_4
C Pulse-Skipping mode PGND#4 19
C
PGND#5 4
AGND G5335-AGND-1
PC68 R1
*680p/50V_6
PR62
*SHORT_4 PR65
G5335-SS-1 23 5 G5335-FB-1 3.83K_1%_4
[24,26,31] S5_ON SS FB
PC168 PC70 G5335QT2U

*0.047u/16V_4 0.047u/16V_4
G5335-AGND-1 G5335-AGND-1 PR198

20K_1%_4 PR69
1_1%_4
VDDP_0.95V
PR64 VFB=0.8V R2
APU_VDDP_RUN_FB_H [4]
*SHORT_4
APU_VDDP_RUN_FB_L [4]
PR67
*SHORT_4
PR66
G5335-AGND-1 Vo=0.8*(R1+R2)/R2 *SHORT_4
=0.95V
B B
G5335-AGND-1
VDDP_0.95V_S5
5
D
G PQ29
MAIND 4 AON6752
[31] MAIND S
+0.95V
1
2
3
TDC : 5.25A
PEAK : 7A
VDDP_0.95V Width : 220mil
A A

PROJECT : ZAS
1A
VDDP_0.95V_S5 (G5335QT2U)
5 4 3 2 1
5 4 3 2 1
+3V
+VIN [11,15,22,25,26,27,30,31,32,33]
+1.2VSUS [3,7,9,10]
+SMDDR_VTT [9,10]
+5V_S5 [7,20,21,26,29,32,33]
+3V [4,5,6,7,9,11,12,13,14,15,16,17,18,19,22,23,24,26,27,29,31]
28
PR93 +SMDDR_VREF [9,10]
100K_1%_4
PR92
*SHORT_4
[24] HWPG_VDDR
[24] SUSON
D PR95 D
*SHORT_4 PC197
Ilimit=10A
*0.1u/16V_4
PR86
249K_1%_4
+VIN
Fsw=500KHz
1P35V_PGOOD
[24,26,31] MAINON
1P35V_CS
1P35V_S3
1P35V_S5
PR94 PR96
*SHORT_4 PC196 499K_1%_4
*0.1u/16V_4 1P35V_TON
+1.2VSUS
10u/25V_8
10u/25V_8
0.1u/25V_4
2200p/50V_4
0.1u/25V_4
1.2 Volt +/- 5%
PC98
PC99
PC97
PC189
PC190
10
13
TDC : 5.6A
9
TDC : 0.38A PQ33
PEAK : 7.46A
S3
S5
PGOOD
TON
CS
5
PEAK : 0.5A +SMDDR_VTT AON7410
Width : 20mil 20
D OCP : 9.06A
G
VTT 17 1P35V_UGATE 4 Width : 240mil
2 UGATE S
PC102 VTTSNS PR85 PC101 +1.2VSUS
1
2
3
10u/6.3V_6 18 1P35V_BOOT
TDC : 0.45A 1 BOOT PL10
VTTGND
PEAK : 0.6A +SMDDR_VREF
PR218 PU7 16 1P35V_PHASE
2.2_1%_6 0.1u/25V_4
1
2.2uH_7x7x3
2
Width : 20mil 100_1%_4 RT8231BGQW PHASE
4 15 1P35V_LGATE
0.1u/16V_4
22u/6.3V_6
22u/6.3V_6
22u/6.3V_6
22u/6.3V_6
VTTREF LGATE
PC200
PC199
PC192
PC198
PC194
PR83
19 12 1P35V_VDD D *4.7_5%_6
VLDOIN VDD +5V_S5
PC195 PC193 PR91
22u/6.3V_6
G
4
PC191
0.1u/16V_4 0.033u/10V_4 PR88 *SHORT_4

*SHORT_4 S
PC103
1
2
3
PGND
VDDQ
1u/6.3V_4 PQ34 PC100
GND
PAD
VID
AON7752 *680p/50V_6
FB
C +1.2VSUS C
3
11
14
21
PR217
*SHORT_4
1P35V_VID
1P35V_FB
PR221 Rds(on)=14.5mohm
*0_5%_4 PR89 1P35V_VDDQ
1P35V_S3 1P35V_S5 *SHORT_4
+5V_S5 R1
PR220 *0_5%_4 PR90
7.87K_1%_4
VID Ref. Voltage PR219

R2 10K_1%_4
High 0.675V
Low 0.75V
S3 S5 VDDQ VTTREF VTT
OCP=10A
L ripple current S0 1 1 ON ON ON
=(19-1.2)*1.2/(1u*500k*19)
=2.248A S3 (mainon off) 0 1 ON ON OFF
Vtrip=10-(2.248/2)*14.5mohm DDR=1.2V
=128.702mV R1=7.87K/F_4
R2=10K/F_4 S4/S5 0 0 OFF OFF OFF
Rlimit=128.702mV/5uA*10=257.4Kohm
B B
+2.5VSUS Power Rail For DDR4

+3V_S5 [5,6,7,13,19,20,22,24,26,32] +2.5VSUS
+2.5VSUS [9,10]
2.5Volt +/- 5%
+3V
+3V_S5
TDC : 0.78A
PEAK : 1.04A
PC119 Width : 40mil
PR226
Check PU high with HW 100K_1%_4
4.7u/6.3V_4
+2.5VSUS
4
PR227 PL11
*SHORT_4 2.2uH_2.5x2.0x1.2
VIN
5 3 G5719LX2.5V1 2
[24] HWPG_2.5V PG LX
PU14
G5719CTB1U
SUSON PR231 1 2
10u/6.3V_6
0.1u/16V_4
*10u/6.3V_6
EN GND
PC118
PC117
PC207
*10K_5%_4 PR127
VFB
*SHORT_4
PC208
PR229 0.47uF/6.3V_2
[24] DDR4_SUSON_2V5
6
A *SHORT_4 PR125 A
47.5K_1%_4
R1
PR128
R2 15K_1%_4
Vo=(0.6(R1+R2)/R2)
=2.5V Quanta Computer Inc.
PROJECT : ZAS
1A
DDR4_+1.2VSUS (RT8231BGQW)
5 4 3 2 1
5 4 3 2 1
29
3662AC_VCC +5V_S5
+VIN [11,15,22,25,26,27,28,30,31,32,33]
VDDCR_NB [7,30,32] PR152
4.7_5%_4 +5V_S5
VDDCR_CPU [7,30] +VIN
PR151
*SHORT_4
3622AC_PVCC PR176
2.2u/10V_4
+5V_S5 [7,20,21,26,28,32,33] PC5 4.7_5%_4
PC141
VDD_18 [4,5,6,7,11,22,31] 2.2u/10V_4
+3V [4,5,6,7,9,11,12,13,14,15,16,17,18,19,22,23,24,26,27,28,31]
PC137
0.1u/25V_4
D D
PR144 PR143
17
34
28
10.5K_1%_4 28K_1%_4
3662ACSET1 13 PR183
VCC
PVCC
VIN
VREF_PINSET_CPU SET1 1_5%_6
PR153 PR146 f=400KHz 31 3662NBUGATENB
UGATE_NB 3662AC_NB_HG1 [30]
10K_1%_4 4.53K_1%_4
PR29 PR18 3662ACNBISENP [30]
300K_1%_4 19.1K_1%_4 3662ACNBISENN [30]
PR17 3662AC_TSEN_NB 23
VREF_PINSET_CPU TSEN_NB
60.4K_1%_4 30 3662NBBOOTNB
PR16 PUT COLSE BOOT_NB PR21
*short_4 TO VDDNB PR37 PC21
HOT SPOT 825/F_4
PR28 PR19 1 2 *short_6 0.1u/25V_4
10K_1%_4 14K_1%_4 PR175 100K_NTC_4_1% PC130
32 3662AC_NB_LX1 0.47uF/6.3V_2
PHASE_NB 3662AC_NB_LX1 [30]
PR149 PR159 PR27 3662AC_TSEN 12 33 3662AC_NB_LG1
VREF_PINSET_CPU TSEN LGATE_NB 3662AC_NB_LG1 [30]
9.31K_1%_4 60.4K_1%_4 60.4K_1%_4
PR167 PUT COLSE PR165
*short_4 TO VDDC 25 3662AC_ISENP_NB PC132
1 2 HOT SPOT ISENP_NB 0.1u/16V_4
PR173 100K_NTC_4_1% 24 357_1%_4
PR150 PR160 ISENN_NB
10K_1%_4 22.6K_1%_4 27 3662ACCOMP_NB PC13 68p/50V_4 PC136 150p/50V_4
COMP_NB PR48
PR170 42.2K_1%_4 PR25 10K_1%_4 100_1%_4
PR33 *SHORT_4 3662AC_EN 29
[24] VRON EN 3662ACFB_NB VDDCR_NB
26
FB_NB PR45
Vih=2V APU_VDDNB_RUN_FB_H [4]
C PC14 *SHORT_4 C
*1000p/50V_4 PR42
1_5%_6
37 3662AC_HG1 3662AC_RGND PR46
UGATE1 3662AC_CPU_HG1 [30] APU_VDDNB_RUN_FB_L [4]
*SHORT_4
38 3662AC_BOOT1
BOOT1
PR156 *SHORT_4 3662AC_VDDIO 22 PR41 PC27
VDD_18 VDDIO 36 3662AC_CPU_LX1 *short_6 0.1u/25V_4 3662AC_CPU_LX1 [30]
PHASE1
PC8 35 3662AC_CPU_LG1 PR154
LGATE1 3662AC_CPU_LG1 [30]
*1u/6.3V_4 825/F_4
9 3662AC_ISEN1P_CPU
3662AC_PWROK ISEN1P 3662AC_CPUISEN1P [30]
PR5 *SHORT_4 18
[4] APU_PWRGD_SVID_REG PW ROK 3662AC_CPUISEN1N [30]
PU2
RT3662ACGQW PR10 PC7
PR4 *SHORT_4 3662AC_SVC 19 357_1%_4 0.47uF/6.3V_2 N side connected with 1N
[4] APU_SVC SVC
10
ISEN1N
3662AC_SVD 3662AC_HG2 3662AC_CPUISEN2P [30]
PR8 *SHORT_4 20 1 PR38
[4] APU_SVD SVD UGATE2 3662AC_CPU_HG2 [30] 3662AC_CPUISEN1N
1_5%_6
PC129 PR161
2 3662AC_BOOT2 0.1u/16V_4 825/F_4
PR7 *SHORT_4 3662AC_SVT 21 BOOT2
[4] APU_SVT SVT PR35 PC19 PC128
*short_6 0.1u/25V_4 0.47uF/6.3V_2
40 3662AC_CPU_LX2
PHASE2 3662AC_CPU_LX2 [30]
39 3662AC_CPU_LG2
B LGATE2 3662AC_CPU_LG2 [30] B
[24] VRM_PWRGD 3662AC_ISEN2P_CPU
7
PR32 *SHORT_4 3662AC_PGOOD 3 ISEN2P
+3V PGOOD PR166
PR24 PC12 68p/50V_4 PC134 150p/50V_4 357_1%_4
10K_1%_4
PR6 *SHORT_4 3662AC_VRHOT 11

[4,24,25] CORE_PWM_PROCHOT# VRHOT_L 3662ACCOMP_CPU
5 PR23 33.2K_1%_4 PR169 10K_1%_4
COMP VDDCR_CPU
PUT COLSE TO
VDDC HOT SPOT PR163 LL~4m
2.87K_1%_4
PHASE 1 3662AC_IMON_CPU14
IMON 6 3662ACFB_CPU
Ispike~45A FB
PR50
100_1%_4
Vset1 874.6mV
2
PC126 PR13
PR172 *100p/50V_4 VREF_PINSET_CPU *SHORT_4
8 VSEN_CPU VGFX_CORE_SENSE_SRC PR190
Delta Vset1 1149mV 100K_NTC_4_1%
15 VSEN *SHORT_4 APU_VDD_RUN_FB_H [4]
PR14 VREF_PINSET PC135
IMON_NB
1
10.2K_1%_4 *82p/50V_4
Vtsen 1.02V PR2 4 3662AC_RGND PR187
GND
PR30 3.9_1%_4 RGND *SHORT_4 APU_VDD_RUN_FB_L [4]

13.3K_1%_4
Vtsen_NB 223mV
PR31
13K_1%_4
PR11
16
41
16.2K_1%_4 PR51
100_1%_4
3662AC_IMON_NB
PC3
1
0.47uF/6.3V_2
A A
PR174
100K_NTC_4_1%
2
PUT COLSE PR158

TO VDDNB 4.32K_1%_4 PC127
*100p/50V_4
HOT SPOT
PROJECT : ZAS
1A
VGACORE( RT3662EB2)
5 4 3 2 1
5 4 3 2 1
30
+VIN [11,15,22,25,26,27,28,31,32,33]
VDDCR_CPU [7,29] +VIN
VDDCR_NB [7,29,32]
*33u/25V_D6.3H4.5
10u/25V_8
10u/25V_8
2200p/50V_4
*10u/25V_8
0.1u/25V_4
PC149
PC142
PC151
PC25
PC24
PC139
+
5
D
G PQ22
4 AON6414AL
D [29] 3662AC_CPU_HG1 S D
VDDCR_CPU
Isat=40A
1
2
3
DCR(MAX)=2.8 mohm FT4 APU 15W
PL4
1 2 VDDCR_CPU
[29] 3662AC_CPU_LX1
330u/2V_7343H1.9
330u/2V_7343H1.9
0.22uH_7x7x3
*220u/2.5V_5x3.8
*220u/2.5V_5x3.8
Countinue current:22A
Peak current:29A
PC34
PC35
PC161
PC160
PR47 + + + +
5
*2.2_5%_6
D PR155 PR148 OCP minimum:40A
*SHORT_4 *SHORT_4
4
G
PQ26 LL= -4mV/A
[29] 3662AC_CPU_LG1 S AON6752
1
2
3
PC33
*2200p/50V_4 PR147
1_1%_4
3662AC_CPUISEN1P
[29] 3662AC_CPUISEN1P
3662AC_CPUISEN1N
[29] 3662AC_CPUISEN1N
RDSon(MAX)=2.5 mohm
+VIN
10u/25V_8
10u/25V_8
2200p/50V_4
*10u/25V_8
0.1u/25V_4
PC146
PC147
PC145
PC22
PC23
C C
5
D
G PQ21
4 AON6414AL
[29] 3662AC_CPU_HG2 S
Isat=40A
1
2
3
VDDCR_CPU
DCR(MAX)=2.8 mohm
PL2
1 2
[29] 3662AC_CPU_LX2 0.22uH_7x7x3
22u/6.3V_6
22u/6.3V_6
22u/6.3V_6
22u/6.3V_6
*22u/6.3V_6
*22u/6.3V_6
*22u/6.3V_6
*22u/6.3V_6
*22u/6.3V_6
*22u/6.3V_6
PC37
PC51
PC47
PC48
PC49
PC50
PC54
PC46
PC52
PC53
PR43
5
*2.2_5%_6
D PR162 PR12
G *SHORT_4 *SHORT_4
4 PQ25
[29] 3662AC_CPU_LG2 S AON6752
1
2
3
PC29
*2200p/50V_4
PR9
1_1%_4
22u/6.3V_6 , total > 20pcs ( Power+HW)
3662AC_CPUISEN2P
[29] 3662AC_CPUISEN2P
RDSon(MAX)=2.5 mohm 3662AC_CPUISEN1N
N side connected with 1N

B B
+VIN
FT4 APU 15W
VDDCR_NB
10u/25V_8
10u/25V_8
2200p/50V_4
*10u/25V_8
0.1u/25V_4
Countinue current:18A
PC150
PC144
PC140
PC20
PC26
Peak current:24A
5
D OCP minimum:30A
G PQ23
4 AON6414AL
[29] 3662AC_NB_HG1 S LL= -4mV/A
VDDCR_NB
Isat=40A
1
2
3
DCR(MAX)=2.8 mohm
PL5
1 2
[29] 3662AC_NB_LX1
330u/2V_7343H1.9
0.22uH_7x7x3
*220u/2.5V_5x3.8
*22u/6.3V_6
*22u/6.3V_6
*22u/6.3V_6
*22u/6.3V_6
*22u/6.3V_6
*22u/6.3V_6
*22u/6.3V_6
*22u/6.3V_6
*22u/6.3V_6
*22u/6.3V_6
PC36
PC155
PC45
PC38
PC39
PC40
PC42
PC43
PC41
PC56
PC55
PC44
+ +
PR44
5
*2.2_5%_6
D PR22 PR164
G PQ24 *SHORT_4 *SHORT_4
4 AON6752
A [29] 3662AC_NB_LG1 S A
1
2
3
PC32
*2200p/50V_4
22u/6.3V_6 , total > 16pcs ( Power+HW)
3662ACNBISENP
[29] 3662ACNBISENP
3662ACNBISENN
RDSon(MAX)=2.5 mohm [29] 3662ACNBISENN
PROJECT : ZAS
1A
VGACORE( RT3662EB2)
5 4 3 2 1
5 4 3 2 1
31
+3VPCU [7,11,14,15,21,23,24,25,26] VL [26]
VDD_18_S5 [5,7] +VIN [11,15,22,25,26,27,28,30,32,33]
VDD_18 [4,5,6,7,11,22,29] +3V [4,5,6,7,9,11,12,13,14,15,16,17,18,19,22,23,24,26,27,28,29]
VDDP_0.95V_S5 [6,7,27] +5V [12,14,15,18,23,26]
VDDCR_FCH_S5 [7,32]
+1.5V [7,14] VDDP_0.95V [2,6,7,27]
+5VPCU [26,27]
VDD_18_S5
1.8 Volt +/- 5%
+3V TDC : 1.67A
PEAK : 2.23A VDD_18_S5
Width : 80mil
PR179 PC148 PR182
100K_1%_4 *2200p/50V_4 *2.2_5%_6 VDD_18_S5
D D
PR180
*SHORT_4
3
8068PG_1.8V PU9 PL3
[24] HWPG_1.8VS5 1uH_7x7x3
4 1 8068LX_1.8V 1 2 MAIND 2 PQ27
POK NC#1 8068FB_1.8V_S AO3404
9 2
0.1u/25V_4
22u/6.3V_6
+3VPCU PR39
VIN#1 SW#1
PC158
PC157
PC18 *SHORT_4
1
10 3 *22p/50V_4 PR34
VIN#2 SW#2 20K_1%_4
7 8068NC_1.8V
R1
PR171
NC#2 VDD_18
10_5%_4 PC17 *68p/50V_4
8068SVIN_1.8V 8 6 8068FB_1.8V
VCC FB
11 5 8068EN_1.8V TDC : 1.13A
0.01u/50V_4
10u/6.3V_6
1u/6.3V_4
GND EN Vo=0.6*(R1+R2)/R2 PEAK : 1.5A
PC16
PC143
PC15
*0.1u/16V_4
PR36
PC28
PR40 R2 10K_1%_4
M5671RE1U *SHORT_4 =1.8V Width : 60mil
Thermal Protection
S5_ON
S5_ON [24,26,27] Need fine tune
PR191
for thermal protect point
150_5%_4 Note placement position
VL TEMP=80'C
PC164
VDDP_0.95V_S5 VDDCR_FCH_S5 0.1u/16V_4
PQ28
5
PR193
AO3404 *SHORT_4
VCC
3 SYS_SHDN#
3 1 OT SYS_SHDN# [24,26]
+3V
C PU12 C
10u/6.3V_4
0.1u/16V_4
10u/6.3V_4
10u/6.3V_4
PR194 TMP708AIDBVR
PC162
PC166
PC163
PC165
30K_1%_4
2
PR58 1
SET
HYST
100K_1%_4 PR55
GND
PU3 56_1%_4
G9336ADJTP1U
Rg VDDCR_FCH_S5
0.775 Volt +/- 5% Rset(Kohm)=0.0012T*T-0.9308T+96.147
4
3 HYST=VCC for 10
[24] HWPG_0.775VS5 PGD 6 TDC : 0.3A =25.69 K ohm
S5_ON DRV degree Hys.
4
PR192 EN PEAK : 0.4A HYST=GND for 30
Vout = (1+Rg/Rh)*0.5 degree Hys.
*SHORT_4 PR56
=0.78V Width : 20mil
+5VPCU 1 5 47_1%_4
GND
VCC ADJ
*0.1u/16V_4
PC167
PR57
0.1u/16V_4
100_1%_4
2
PC62
PC61 Rh
0.033u/10V_4
+1.5V
1.5Volt +/- 5%
+3V +3VPCU
TDC : 0.57A
PC60
PEAK : 0.76A
4.7u/6.3V_4 Width : 40mil
PR188
100K_1%_4 +1.5V
4
B B
PL6
VIN
[24] HWPG_1.5V 5 3 G5719LX1.5V 1 2

PG LX 2.2uH_2.5x2.0x1.2
PU11
G5719CTB1U
1 2
10u/6.3V_6
0.1u/16V_4
MAINON
*10u/6.3V_6
PR54
EN GND
PC58
PC57
PC159
*SHORT_4
VFB
PR49
10K_5%_4 PC59
0.47uF/6.3V_2
6
R1
PR53
22.6K_1%_4
R2 PR52
15K_1%_4
Vo=(0.6(R1+R2)/R2)
=1.5V
+VIN +3V +5V VDD_18 VDDP_0.95V +VIN
PR99 PR102 PR216 PR84 PR100 PR97

1M_5%_6 22_5%_8 *220_5%_8 22_5%_8 22_5%_8 1M_5%_6
A A
MAINON_ON_G MAIND
PQ8 MAIND [27]
DDTC144EUA-7-F
3
PR98
2 1M_5%_6 2 2 2 2 2
[24,26,28] MAINON PC104
PQ12 PQ35 PQ7 PQ10 PQ9 *2200p/50V_4
2N7002K *2N7002K 2N7002K 2N7002K 2N7002K
1
1
1
PR87
*100K_1%_6
PROJECT : ZAS
1A
+1.8V/+0.775V/+1.5V/Thermal
5 4 3 2 1
5 4 3 2 1
32
D D
For Type 1 & 3
+5V_S5 +5V_S5 VDDCR_NB

PQ4 PQ5
AO3416 AO3416
+3V_S5 +VIN VDDCR_FCH_S5 VDDCR_NB 3 1 1 3
PR181
*0.1u/16V_4
1K_1%_4
VDDCR_FCH_ALW
PC31
2
2
8
C PR26
100K_1%_4
PR15
1M_5%_6 3
0.775~1.2 Volt +/- 5% C
PR177 + 1 COMP_OUT1 TDC : 0.15A
3
2
2 PQ2
*0_5%_4
- PU10A
PEAK : 0.2A
2N7002K AS393MTR-E1 Width : 20mil
4
VDDCR_FCH_ALW
1
+5V_S5 VDDCR_FCH_S5
FCH_PC PQ3 PQ6
3
2 AO3416 AO3416
[5] APU_S5_MUX_CTRL
3 1 1 3
100K_1%_4
PR184
*0.1u/16V_4
PR168
22u/6.3V_6
22u/6.3V_6
0.1u/16V_4
PQ1 PC138 1K_1%_4
1
PC30
PC156
PC153
PC154
2N7002K *0.1u/16V_4
2
PR178 5
*0_5%_4 + 7
B B
6
-
PU10B
COMP_OUT1 AS393MTR-E1
A A
PROJECT : ZAS
1A
VDDCR_FCH_ALW
5 4 3 2 1
5 4 3 2 1
33
D +5V_S5 [7,20,21,26,28,29,32] D
+12V_Panel [11]
Panel Spec (TFT-LCD 14'')
VLED : 6V~21V (Tpy:12.5V)
Power Consumption : 3W (MAX)
+12V_Panel
12.5 Volt +/- 5%
PEAK : 0.35A
Width : 20mil
PL1
1 2
+12V_Panel
VL@3.3uH_5x5x1.8 40V, 2A
+5V_S5
PD1
PR9235 PQ9054 PU1 VL@TPS61087DRCR VL@DFLS240-7
C
VL@0_5%_8 S VL@AO3415 D C
1 3 8 6 61087SW 2 1
IN SW #1
G
2
PC8109 PR9243 PC6 PC4 PC1 PR141 *VL@0_5%_4 61087EN 3 7 PR145 R1 PC11 PC133 PC10 PC131
*VL@0.1u/25V_4 VL@100K_1%_4 VL@10u/25V_8 VL@10u/25V_8 VL@1u/6.3V_4 EN SW #2 VL@100K_1%_4 VL@10u/25V_8 VL@10u/25V_8 VL@10u/25V_8 VL@10u/25V_8
VFB=1.238V
PR20 61087FREQ 9 2 61087FB
FREQ FB
VGS=-4.5V VL@0_5%_4
PR9242 PANEL_LED_EN PR140 VL@0_5%_4 4 1 61087COMP PR142

[24] PANEL_LED_EN AGND COMP
VL@10K_5%_4 VL@11K_1%_4 R2
EPAD#1
EPAD#2
EPAD#3
EPAD#4
EPAD#5
EPAD#6
PR1
PC125 5 10 61087SS VL@100K_1%_4
VL@0.1u/16V_4 PR157 PGND SS
PR9236 *VL@0_5%_4
3
VL@0_5%_4
11
12
13
14
15
16
PANEL_LED_EN 2 PQ9051 PC9
VL@2N7002K VL@0.1u/25V_4
PC2 Vo =1.238*(1+R1/R2)
VL@820p/50V_4 =12V
1
B B
BL Discharge Circuit
+VIN +12V_Panel
PR9240 PR9238
VL@1M_5%_6 VL@22_5%_8
PQ9053
VL@DDTC144EUA-7-F
3
PR9241
3
VL@0_5%_4 PR9239
PANEL_LED_EN 2 VL@1M_5%_6 2
A PQ9052 A
VL@2N7002K
1
1
PR9237
*VL@100K_1%_6 Quanta Computer Inc.
PROJECT :
1A
LED Panel (TPS61087)
5 4 3 2 1
5 4 3 2 1
Power Tree
+3VPCU +3V APU LCD EC SSD WLAN AUDIO TPM CCD Cardreader G-sersor ASM1061
34
TDC:7.91A TDC:3.72A 0.2A 0.7A 0.001A 1.8A 1A 0.05A 0.01A 0.15A 0.4A 0.001A 0.3A
PEAK:10.6A PEAK:4.97A
440mil 200mil 20mil 60mil 10mil 80mil 40mil 10mil 10mil 20mil 20mil 10mil 20mil
EC
D 0.03A D
10mil
+3V_S5 +2.5VSUS DDR-DIMM

TDC:1.65A TDC:0.78A 0.5A
180mil 50mil 20mil
APU TPM LAN

0.5A 1.4A
0.2A
20mil 20mil 60mil
+VIN VDD_18_S5 VDD_18 APU

45W TDC:1.67A TDC:1.13A 1.5A
12V,3.75A PEAK:2.33A PEAK:1.5A
200mil 100mil 60mil 60mil
APU
0.5A
C C
20mil
+1.5V APU AUDIO

TDC:0.57A 0.2A 0.06A
PEAK:0.76A
40mil 10mil 10mil
+5VPCU +5V +12V_Panel HDD AUDIO FAN

TDC:8.4A TDC:2.66A 0.57A 1.5A 1A 1A
450mil 150mil 40mil 60mil 40mil 40mil
+5V_S5 USB2x2port USB3x1port Type-c

TDC:5.25A 2.5A 2.5A 3A
PEAK:7A
VDDP_0.95V_S5 VDDP_0.95V
TDC:6.15A TDC:5.25A
PEAK:8.2A PEAK:7A
B 330mil 280mil B
APU
0.8A
40mil
VDDCR_FCH_S5
TDC:0.3A
PEAK:0.4A
20mil
+1.2VSUS APU DDR-DIMM DDR-DOWN

TDC:6.15A 1.9A 2.21A 2.21A
PEAK:8.2A
VDDCR_CPU
TDC:22A
PEAK:29A
1160mil
A A
VDDCR_NB VDDCR_FCH_ALW
TDC:18A TDC:0.15A
PEAK:24A PEAK:0.2A
960mil 20mil
LCD Quanta Computer Inc.

0.57A PROJECT : ZAS
1A
40mil Power Tree
5 4 3 2 1

Acer Aspire 3 Quanta ZAS Rev 1A PDF

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Acer Aspire 3 Quanta ZAS Rev 1A PDF

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5 4 3 2 1

LAYER 5 : IN2 Memory Down STONEY

USB3 Type-C CONN USB2 - 4

USB2-6 (USB3) P2,3,4,5,6,7,8

P15 ASM1153 P15

U4 P_GPP_RXP0 P_GPP_TXP0 D2 PCIE_TX0_C C353 0.1u/16V_4

Samsung SM951 (M.2 PCIE Gen3 SSD)

VDDP_0.95V R40 196_1%_4 P_ZVDDP U8 P_ZVDDP P_ZVSS W8 P_ZVSS R36 196_1%_4

Quanta Computer Inc.

Date: Friday, April 07, 2017 Sheet 3 of 35

TEST31 H31 APU_TEST31 R66 *39.2_1%_4 M_TEST CONNECTION TBD

APU_VSS_SENSE_B R432 *short_4

HDT(Hardware Debug Tool ) Connector

BOARD ID C348 18p/50V_4 2 SP@AMD_SR_FT4

AMD CL maximum ESR of the XTAL is 65 kΩ

TEST2 TEST1 TEST0 Description

AN7 USB_ZVSS R34 11.8K_1%_4

C347 5.6p/50V_4 TP56 48M_X2 VDDP_S0 Type-C CLK_LPC_DEBUG

LPCCLK0 Int pull-up Int pull-up Int pull-up Int pull-up

LPC_CLK0 LPC_CLK1 LFRAME# RTC_CLK GEVENT2# (AGPIO3) SYS_RST# AGPIO11(BLINK)

Quanta Computer Inc.

R42 *short_6 VDDP_S5 AJ11 VDDP_S5_1 3V_S5C R60 *short_4

C59 C71 C70 C60 C39 C62 BU

C21 C423 +VCCRTC_2

R28 *SHORT_PAD AP2138N-1.5TRG1 C437 R339

ZHP RTC connector

Quanta Computer Inc.

Quanta Computer Inc.

DDR4 SODIMM 260 PIN

DDR4 SODIMM 260 PIN

C132 C118 C123 C143 C120

BYTE7(56-63) BYTE2(16-23) BYTE5(40-47) BYTE0(0-7)

78-ball FBGA package:x4, x8

M_A_A5 C227 0.1u/16V_4 M_A1_VREFCA

M_A_A6 R310 39_1%_4 C167 0.22u/10V_4

M_A_A11 R278 39_1%_4 M_A1_PAR R306 *short_4 C165 0.22u/10V_4

A M_A_A13 R302 39_1%_4

M_A_WE# R219 39_1%_4

M_A_CAS# R298 39_1%_4 C243 0.22u/10V_4

M_A1_CS#0 R296 39_1%_4 C248 0.22u/10V_4

M_A1_CKE0 R234 39_1%_4 C156 10u/6.3V_4

Enable:High Active /2.5A

Quanta Computer Inc.

*AZ1045-04F.R7G R86 D21 D22 D20 CN7

HDMI DDC (HDM) HDMI-detect (HDM)

+3V +5V EMI

R85 R114 *120_1%_4

6 10K_1%_4 R91 *120_1%_4

[4] HDMI_DDCCLK 2N7002KDW 5 HDMI_HPD_MB

Quanta Computer Inc.

LAN & Card reader Combo (LAN)

Leakage circuit EMI

+3V +3V +3V C424 C431 C436 C470 C471 C472

R317 R280 CN4

CODEC_VREF C268 2.2u/10V_4 ADOGND

R341 100K_1%_4 +3V

Codec PWR 5V(ADO) HEADPHONE/MIC/LINE combo (ADO)

Codec PWR 1.5V(ADO) ADOGND

+1.5V L14 2 1 BLM15AG121SN1D

C395 ODD@0.1u/16V_4 C422 ODD@0.1u/16V_4

C400 ODD@0.1u/16V_4 C406 ODD@0.1u/16V_4 U23

PGND_48 C393 ODD@4.7u/6.3V_4 1 36

+5V 1.5A 60mil +5V_ODD

EC_ODD_EJ# [24] +5V_ODD R321 R315 *ODD@AO6402A

R42 short_6 VDDP_S5 AJ11 VDDP_S5_1 3V_S5C R60 short_4

HWPG 1 R582 SP@0_5%_4 PJ4N3KDW *PJ4N3KDW