1 2 3 4 5 6 7 8

NLA CFL-H & N17P SYSTEM DIAGRAM 01

For Layout Review
Charge
A PG.40 Config#3 SODIMM 1DPC NVIDIA N17P-G0-A1 VRAM gDDR5 x 4pcs A
PEG

INTEL
X8 Lane
Package 29 x 29mm 128M x32 / 256M x32
DDR4 SODIMM1 DDR4 2133MHz 2.5GHz
PG.43 Max. 8GB Coffee Lake -H 40W
PG.19~23
PG.24~25
STD PG.17 Channel A
27MHz
CPU Core PAGE 21
HDMI v2.0
Processor : Quad Core
PG.46~48
SODIMM2 DDR4 2133MHz Power : 45 (Wat t) PG.27
Max. 8GB Package : BGA1440
+1.0V/+1.2VSUS Channel B Size : 42 x 28 (mm)
RSV PG.18 eDP (5.4Gb/s) eDP 15.6" eDP Panel
PG.50 Die Size : 13.6 x 9.1 (mm) HD/FHD/UHD
PG.2~8
PG.26
+3V/+5V S5 DMI
PG.42

USB 3.0
B
+VGACORE SATA0 6GB/s B
PG.51~53 PORT1 PORT2 PORT4
SATA1A
M.2 2280-D5 SSD PCIEx4 32GB/s
+1.35V_GFX USB 3.0 Ports USB 3.0 Ports USB3.0 (TYPE C)
PG.54 PG.34 LANE9,10,11,12
INTEL PCH (DB) PG.33
PG.30 PG.37

SATA0 6GB/s Lynx Point PORT1 PORT2

HDD PG.34 SATA4 USB 2.0

Power : Wat t PORT5

Package : FCBGA837
Size : 23 x 23 (mm)
HD CAM
PCI-E x 1 Gen1
PG.26
C LANE14 LANE16 LANE15 C

USB 2.0
LAN Card Reader WLAN
PORT7
RTL8111HSH-CG. cdp
RTS5227S BT COMBO
PG.36 PG.37 PG.34

SPI
ROM cdp PG.9~16
PG.12
Azalia
LPC
LPC
KBC
ITE IT8987E/BX PG.37 AUDIO CODEC
ALC255-CG Combo Jack
D
KB TP FAN Hp (DB) D

PG.28 MIC PG.37

PG.39 PG.39 PG.39

Speaker Dual Digital MIC PROJECT : NLA

INT CAM MIC Quanta Computer Inc.
Size Document Number R ev
PG.28 PG.26 PG.26 Custom
01 -- Block Diagram 1A

Date: Monday, April 09, 2018 Sheet 1 of 56

1 2 3 4 5 6 7 8
 5 4 3 2 1

CFL-H Processor (CLK,MISC,JTAG)

02
Processor pull-up (CPU)

H_PROCHOT# Host CLK:

R1554 1K_5%_4 +1.05V Trace length < 11000 mils
XDP_TDO_CPU Trace spacing = 15 / 20 mils, Impendence 85 ohmUX1E CFG[4] Ra
R1583 51_4 +1.05V
XDP_TMS_CPU R1578 *51_4
XDP_TDI_CPU R1070 *51_4
XDP_PREQ# R1100 *51_4 CLK_CPU_BCLKP B31 BN25 CFG0
[11] CLK_CPU_BCLKP CLK_CPU_BCLKN BCLKP CFG_0 TP1026 EDP Output from DGPU Hi Non Stuff
A32 BN27 CFG1
XDP_TCK_CPU [11] CLK_CPU_BCLKN BCLKN CFG_1 TP1024
R1581 51_4 BN26 CFG2 *
D XDP_TRST# R1557 *51_4 CPU_PCI_BCLKP D35 CFG_2 BN28 CFG3 D
[11] CPU_PCI_BCLKP *
SI : no stuff R1557 CPU_PCI_BCLKN C36 PCI_BCLKP CFG_3 BR20 CFG4
[11] CPU_PCI_BCLKN PCI_BCLKN CFG_4 EDP Output from iGPU Low Stuff
BM20 CFG5
CLK_DPLL_NSCCLKP E31 CFG_5 BT20 CFG6
[11] CLK_DPLL_NSCCLKP CLK_DPLL_NSCCLKN D31 CLK24P CFG_6 BP20 CFG7
[11] CLK_DPLL_NSCCLKN CLK24N CFG_7 BR23 TP1098
CFG8
CFG_8 BR22 TP1016
CFG9 *
XDP_TDO_CPU CFG_9 BT23 TP1023
CFG10
PROCHOT# (50ohm)
XDP_TMS_CPU
R12206
R12207
*0_4
*0_4
JTAG_TDO_PCH [10]
JTAG_TMS_PCH [10]
CFG_10 BT22 CFG11
*
* TP1017
Processor Strapping
XDP_TDI_CPU R12208 *0_4 CFG_11 BM19 CFG12
Trace Length <11 inches XDP_TCK_CPU R12209 *0_4
JTAG_TDI_PCH [10] CFG_12 BR19 CFG13 *
JTAGX_PCH [10] CFG_13
Cb need placment near VR BP19 CFG14 The CFG signals have a default value of '1' if not terminated on the board.
H_CPU_SVIDALRT# BH31 CFG_14 BT19 TP1100
CFG15
VR_SVID_CLK_R BH32 VIDALERT# CFG_15 TP1099
*
H_CPU_SVIDDAT BH29 VIDSCK BN23 CFG16 * TP1025
H_PROCHOT#_R BR30 VIDSOUT CFG_17 BP23 CFG17
H_PROCHOT#_R PROCHOT# CFG_16 BP22 TP1015
[38,46,55] H_PROCHOT# R1555 499_1%_4 CFG18 * 0 Enable; SET DFX ENABLED BIT IN DEBUG
DDR_VTT_CNTL BT13 CFG_19 BN22 TP1096
CFG19 *
[18] DDR_VTT_CNTL DDR_VTT_CNTL CFG_18 TP1097
C1928
* 1 , Disable;
*
*47P/50V_4 BR27 XDP_BPM0 CFG3 R1584 *1K_4
BPM#_0 BT27 XDP_BPM1 TP1095
BPM#_1 BM31 XDP_BPM2 TP1094
* TP1018
H_VCCST_PWRGD H13 BPM#_2 BT30 XDP_BPM3 * TP1092
VCCST_PWRGD BPM#_3 CFG2 R1586 1K_5%_4
*
H_PWRGD BT31
Layout Notes: [10] H_PWRGD CPU_PLTRST#R BP35 PROCPWRGD BT28 XDP_TDO_CPU
*
CFG4
[11] CPU_PLTRST#R RESET# PROC_TDO TP1027
R1599 Ra 1K_5%_4
BM34 BL32 XDP_TDI_CPU
[11] PM_SYNC H_PM_DOWN_R PM_SYNC PROC_TDI XDP_TMS_CPU TP1004
H_PWRGD (50ohm) R1099 20_4 BP31 BP28 * CFG5 R1603 1K_5%_4
[11] H_PM_DOWN EC_PECI BT34 PM_DOWN PROC_TMS BR28 XDP_TCK_CPU TP1014
*
C Trace Length: 1~11 inches [11,38] EC_PECI PM_THRMTRIP# J31 PECI PROC_TCK
*
TP1022
CFG6 R1600 *1K_4 C
THERMTRIP# BP30 XDP_TRST# * XDP_TRST#[15]
SKTOCC_N_R R1071 SKTOCC_N BR33 PROC_TRST# BL30 XDP_PREQ# CFG10 R1594 *1K_4
CPU_PLTRST# (50ohm) [13] SKTOCC_N_R
*Short_0402 PROC_SEL# BN1 SKTOCC# PROC_PREQ# BP27 XDP_PRDY# XDP_PREQ# [15]
Trace Length: 10~17 inches PROC_SELECT# PROC_PRDY# XDP_PRDY# [15]
CFG12 R1605 *1K_4
R1573 *10K_4 CATERR# BM30
+VCCSTPLL CATERR# CFG_RCOMP
PM_SYNC (50ohm) BT25 49.9/F_4 R1588 CFG13 R1606 *1K_4
AT13 CFG_RCOMP
Trace Length: 1~11.25 inches AW13 ZVM#
MSM#
AU13
Design Note(CFG_RCOMP):
AY13 RSVD#AU13 DEFENSIVE DESIGN 50-OHM FOR R40PR (SV REQ)
RSVD#AY13

CPU CORE SVID 5 OF 13

Configuration Signals: The CFG signals have a default value of '1' if not terminated on the board.
*CPU_CFL-H_1440P
Layout note:
1.Need routing together CFG[0] Stall reset sequence after PCU PLL Note that some of the Intel reference designs board might connect CFG[0] to
lock until de-asserted HOOK[2]. This route is not needed on a OxM board.
2.ALERT need between CLK and DATA.
x1 = Normal operation
CFG[2] PCI Express Static Lane Reversal
+VCCSTPLL x0 = Lane numbers reversed
x1 = Disabled
PLACE THE PU RESISTORS Close to CPU CFG[4] eDP enable
CLOSE TO VR x0 = Enabled
PULL UP IS IN THE VR MODULE R1051 x00 = 1 x8 & 2 x4 PCI Express
*54.9/F_4
B SVID CLK x01 = reserved B

VR_SVID_CLK_R
CFG[6:5] PCI Express Bifurcation
R1054 *Short_0402 VR_SVID_CLK [46] x10 = 2 x8 PCI Express
x11 = 1 x16 PCI Express
THERMTRIP# (50ohm)
Trace Length: 1.1~12 inches x1 = PEG train follow RESETB de-asseted
CFG[7] PEG defer training
Rb need placment near PCH x0 = PEG wait for BIOS fro training
+VCCSTPLL

Close to CPU
CLOSE TO CPU R1055 PM_THRMTRIP#
PLACE THE PU RESISTORS [11,38] PM_THRMTRIP#
56.2/F_4
SVID ALERT R1273 1K_5%_4
CPU VDDQ
H_CPU_SVIDALRT# +VCCSTPLL +1.05V
R1047 220_5%_4 VR_SVID_ALERT# [46] Note: please keep plane is enough for VDDQ 2.8A
HWPD
Placement close to CPU.
R1110 +1.2VSUS
Ra close to CPU side
1K_5%_4
H_VCCST_PWRGD trace 0.3" - 1.5" C1466 0.1u/16V_4

C1502 *0.1U/16V_4
+VCCSTPLL D1004
CLOSE TO CPU PROC_SEL# 1 2 H_VCCST_PWRGD_R R1117 60.4/F_4 H_VCCST_PWRGD
A PLACE THE PU RESISTORS [10,38,42,43,44,45] HWPG A

Close to CPU RB500V-40 C1355

R1048 R1613 *10P/50V_4
100_1%_4 *0_4

SVID DATA PROJECT : NLA

Quanta Computer Inc.
H_CPU_SVIDDAT [6,10,17,18,43,45] +1.2VSUS
R1044 VR_SVID_DATA [46] [6,10,38,44,55] +1.05V
*Short_0402

Size Document Number Rev

Custom
CFL 1/7 (JTAG/MISC) 1A

Date: Monday, April 09, 2018 Sheet 2 of 56

5 4 3 2 1
 5 4 3 2 1

+1.2VSUS [2,6,10,17,18,43,45]
CFL-H Processor (DMI,PEG,FDI) 03
+3VS5[10,12,14,28,30,31,32,34,38,42,43,44,45,46,50,55]
+3V [9,10,11,13,14,16,17,18,21,22,26,28,29,34,35,36,37,38,39,46,49,50,54,55]

UX1C
E25 B25
D25 PEG_RXP_0 PEG_TXP_0 A25
PEG_RXN_0 PEG_TXN_0
E24 B24
F24 PEG_RXP_1 PEG_TXP_1 C24
PEG_RXN_1 PEG_TXN_1
D E23 B23 D
D23 PEG_RXP_2 PEG_TXP_2 A23
PEG_RXN_2 PEG_TXN_2
E22 B22
F22 PEG_RXP_3 PEG_TXP_3 C22
PEG_RXN_3 PEG_TXN_3
E21 B21
D21 PEG_RXP_4 PEG_TXP_4 A21
PEG_RXN_4 PEG_TXN_4
E20 B20
F20 PEG_RXP_5 PEG_TXP_5 C20
PEG_RXN_5 PEG_TXN_5
E19 B19
D19 PEG_RXP_6 PEG_TXP_6 A19
PEG_RXN_6 PEG_TXN_6

Reserve for Layout E18

F18 PEG_RXP_7 PEG_TXP_7
B18
C18
Reserve for Layout
PEG_RXN_7 PEG_TXN_7
[19] PEG_RXP7 D17 A17 PEG_TXP7_C C1960 0.22u/10V_4
E17 PEG_RXP_8 PEG_TXP_8 B17 PEG_TXN7_C PEG_TXP7[19]
[19] PEG_RXN7 C1958 0.22u/10V_4
PEG_RXN_8 PEG_TXN_8 PEG_TXN7[19]

[19] PEG_RXP6 F16 C16 PEG_TXP6_C C1961 0.22u/10V_4

PEG_RXP_9 PEG_TXP_9 PEG_TXP6[19]
[19] PEG_RXN6 E16 B16 PEG_TXN6_C C1965 0.22u/10V_4
PEG_RXN_9 PEG_TXN_9 PEG_TXN6[19]
D15 A15 PEG_TXP5_C C1967 0.22u/10V_4
[19] PEG_RXP5 PEG_RXP_10 PEG_TXP_10 PEG_TXP5[19]
[19] PEG_RXN5 E15 B15 PEG_TXN5_C C1966 0.22u/10V_4
PEG_RXN_10 PEG_TXN_10 PEG_TXN5[19]
F14 C14 PEG_TXP4_C
dGPU [19] PEG_RXP4 C1969 0.22u/10V_4
E14 PEG_RXP_11 PEG_TXP_11 B14 PEG_TXN4_C PEG_TXP4[19]
dGPU
[19] PEG_RXN4 C1971 0.22u/10V_4
PEG_RXN_11 PEG_TXN_11 PEG_TXN4[19]

[19] PEG_RXP3 D13 A13 PEG_TXP3_C C1973 0.22u/10V_4

PEG_RXP_12 PEG_TXP_12 PEG_TXP3[19]
[19] PEG_RXN3 E13 B13 PEG_TXN3_C C1970 0.22u/10V_4
PEG_RXN_12 PEG_TXN_12 PEG_TXN3[19]

[19] PEG_RXP2 F12 C12 PEG_TXP2_C C1974 0.22u/10V_4

E12 PEG_RXP_13 PEG_TXP_13 B12 PEG_TXN2_C PEG_TXP2[19]
[19] PEG_RXN2 C1975 0.22u/10V_4
PEG_RXN_13 PEG_TXN_13 PEG_TXN2[19]
C C
[19] PEG_RXP1 D11 A11 PEG_TXP1_C C1978 0.22u/10V_4
E11 PEG_RXP_14 PEG_TXP_14 B11 PEG_TXN1_C PEG_TXP1[19]
[19] PEG_RXN1 C1977 0.22u/10V_4
PEG_RXN_14 PEG_TXN_14 PEG_TXN1[19]
F10 C10 PEG_TXP0_C C1979 0.22u/10V_4
[19] PEG_RXP0 PEG_RXP_15 PEG_TXP_15 PEG_TXP0[19]
Layout Note: PEG_RCOMP E10 B10 PEG_TXN0_C C1981 0.22u/10V_4
[19] PEG_RXN0 PEG_RXN_15 PEG_TXN_15 PEG_TXN0[19]

Max Trace length = 600 MILS +VCCIO R1617 24.9/F_4 PEG_COMP G2

PEG_RCOMP
Min Trace width = 5 MILS
Trace spacing to others = 15 MILS
D8 B8
[9] DMI_RXP0 E8 DMI_RXP_0 DMI_TXP_0 A8 DMI_TXP0[9]
[9] DMI_RXN0 DMI_RXN_0 DMI_TXN_0 DMI_TXN0 [9]
E6 C6
[9] DMI_RXP1 DMI_RXP_1 DMI_TXP_1 DMI_TXP1[9]
F6 B6
[9] DMI_RXN1
D5
DMI_RXN_1 DMI_TXN_1
B5
DMI_TXN1 [9]
DMI
DMI [9] DMI_RXP2
[9] DMI_RXN2
E5 DMI_RXP_2
DMI_RXN_2
DMI_TXP_2
DMI_TXN_2
A5
DMI_TXP2[9]
DMI_TXN2 [9]
J8 D4
[9] DMI_RXP3 J9 DMI_RXP_3 DMI_TXP_3 B4 DMI_TXP3[9]
[9] DMI_RXN3 DMI_RXN_3 3 OF 13 DMI_TXN_3
DMI_TXN3 [9]
*CPU_CFL-H_1440P

B B

UX1D

K36 D29 CPU_EDP_TXP0

[31] DDI1_TX0_DP DDI1_TXP_0 EDP_TXP_0 CPU_EDP_TXN0 CPU_EDP_TXP0 [26]
[31] DDI1_TX0_DN K37 E29 CPU_EDP_TXN0 [26]
J35 DDI1_TXN_0 EDP_TXN_0 F28 CPU_EDP_TXP1
[31] DDI1_TX1_DP DDI1_TXP_1 EDP_TXP_1 CPU_EDP_TXN1 CPU_EDP_TXP1 [26]
[31] DDI1_TX1_DN J34 E28 CPU_EDP_TXN1 [26]
H37 DDI1_TXN_1 EDP_TXN_1 A29 CPU_EDP_TXP2
[31] DDI1_TX2_DP
H36 DDI1_TXP_2 EDP_TXP_2 B29 CPU_EDP_TXN2 CPU_EDP_TXP2 [26]
eDP
DP for Type C [31] DDI1_TX2_DN
[31] DDI1_TX3_DP
J37
J38
DDI1_TXN_2
DDI1_TXP_3
EDP_TXN_2
EDP_TXP_3
C28
B28
CPU_EDP_TXP3
CPU_EDP_TXN3
CPU_EDP_TXN2 [26]
CPU_EDP_TXP3 [26]
[31] DDI1_TX3_DN DDI1_TXN_3 EDP_TXN_3 CPU_EDP_TXN3 [26]
D27 C26 CPU_EDP_AUXP
[31] DDI1_AUX_DP DDI1_AUXP EDP_AUXP CPU_EDP_AUXN CPU_EDP_AUXP [26]
E27 B26
[31] DDI1_AUX_DN DDI1_AUXN EDP_AUXN CPU_EDP_AUXN [26]
H34
H33 DDI2_TXP_0
F37 DDI2_TXN_0 A33 EDP_DISP_UTIL
G38 DDI2_TXP_1 EDP_DISP_UTIL TP1091
F34 DDI2_TXN_1
*
F35 DDI2_TXP_2 D37 EDP_RCOMP R1101 24.9/F_4
DDI2_TXN_2 DISP_RCOMP +VCCIO
E37
DDI2_TXP_3
E36 Layout Note: DISP_RCOMP
DDI2_TXN_3
F26 Max Trace length = 600 MILS
E26 DDI2_AUXP
DDI2_AUXN Min Trace width = 5 MILS
C34
DDI3_TXP_0
Isolation Spacing = 20 MILS
D34
B36 DDI3_TXN_0
B34 DDI3_TXP_1
F33 DDI3_TXN_1
E33 DDI3_TXP_2
A DDI3_TXN_2 A
C33
B33 DDI3_TXP_3
DDI3_TXN_3 G27 AUD_AZACPU_SCLK
A27 PROC_AUDIO_CLK G25 AUD_AZACPU_SDO_R AUD_AZACPU_SCLK [10]
DDI3_AUXP PROC_AUDIO_SDI AUD_AZACPU_SDI_R AUD_AZACPU_SDO_R [10]
B27 G29 R1103 20_4
DDI3_AUXN PROC_AUDIO_SDO AUD_AZACPU_SDI [10]
4 of 13

*CPU_CFL-H_1440P
PROJECT : NLA
Quanta Computer Inc.
Size Document Number Rev
Custom CFL 2/7 (DMI/EDP/PEG) 1A

Date: Monday, April 09, 2018 Sheet 3 of 56

5 4 3 2 1
 5 4 3 2 1

CFL-H Processor (DDR4) 04

[18] M_B_DQ[63:0]
UX1B
M_B_DQ0 BT11 AM9
M_B_DQ1 DDR1_DQ_0/DDR0_DQ_16 DDR1_CKP_0/DDR1_CKP_0 M_B_CLKP0 [18]
UX1A BR11 AN9
[17] M_A_DQ[63:0] M_A_DQ0 M_B_DQ2 DDR1_DQ_1/DDR0_DQ_17 DDR1_CKN_0/DDR1_CKN_0 M_B_CLKN0 [18]
BR6 AG1 BT9 AM7
M_A_DQ1 DDR0_DQ_0/DDR0_DQ_0 DDR0_CKP_0/DDR0_CKP_0 M_A_CLKP0 [17] M_B_DQ3 DDR1_DQ_2/DDR0_DQ_18 DDR1_CKP_1/DDR1_CKP_1 M_B_CLKP1 [18]
D BT6 AG2 BR8 AM8 D
M_A_DQ2 DDR0_DQ_1/DDR0_DQ_1 DDR0_CKN_0/DDR0_CKN_0 M_A_CLKN0 [17] M_B_DQ4 DDR1_DQ_3/DDR0_DQ_19 DDR1_CKN_1/DDR1_CKN_1 M_B_CLKN1 [18]
BP3 AK2 BP11 AM11
M_A_DQ3 DDR0_DQ_2/DDR0_DQ_2 DDR0_CKP_1/DDR0_CKP_1 M_A_CLKP1 [17] M_B_DQ5 DDR1_DQ_4/DDR0_DQ_20 NC/DDR1_CKP_2
BR3 AK1 BN11 AM10
M_A_DQ4 DDR0_DQ_3/DDR0_DQ_3 DDR0_CKN_1/DDR0_CKN_1 M_A_CLKN1 [17] M_B_DQ6 DDR1_DQ_5/DDR0_DQ_21 NC/DDR1_CKN_2
BN5 AL3 BP8 AJ10
M_A_DQ5 BP6 DDR0_DQ_4/DDR0_DQ_4 NC/DDR0_CKP_2 AK3 M_B_DQ7 BN8 DDR1_DQ_6/DDR0_DQ_22 NC/DDR1_CKP_3 AJ11
M_A_DQ6 BP2 DDR0_DQ_5/DDR0_DQ_5 NC/DDR0_CKN_2 AL2 M_B_DQ8 BL12 DDR1_DQ_7/DDR0_DQ_23 NC/DDR1_CKN_3
M_A_DQ7 BN3 DDR0_DQ_6/DDR0_DQ_6 NC/DDR0_CKP_3 AL1 M_B_DQ9 BL11 DDR1_DQ_8/DDR0_DQ_24 AT8
M_A_DQ8 DDR0_DQ_7/DDR0_DQ_7 NC/DDR0_CKN_3 M_B_DQ10 DDR1_DQ_9/DDR0_DQ_25 DDR1_CKE_0/DDR1_CKE_0 M_B_CKE0 [18]
BL4 BL8 AT10
M_A_DQ9 DDR0_DQ_8/DDR0_DQ_8 M_B_DQ11 DDR1_DQ_10/DDR0_DQ_26 DDR1_CKE_1/DDR1_CKE_1 M_B_CKE1 [18]
BL5 AT1 BJ8 AT7
M_A_DQ10 DDR0_DQ_9/DDR0_DQ_9 DDR0_CKE_0/DDR0_CKE_0 M_A_CKE0 [17] M_B_DQ12 DDR1_DQ_11/DDR0_DQ_27 DDR1_CKE_2/DDR1_CKE_2
BL2 AT2 BJ11 AT11
M_A_DQ11 DDR0_DQ_10/DDR0_DQ_10 DDR0_CKE_1/DDR0_CKE_1 M_A_CKE1 [17] M_B_DQ13 DDR1_DQ_12/DDR0_DQ_28 DDR1_CKE_3/DDR1_CKE_3
BM1 AT3 BJ10
M_A_DQ12 BK4 DDR0_DQ_11/DDR0_DQ_11 DDR0_CKE_2/DDR0_CKE_2 AT5 M_B_DQ14 BL7 DDR1_DQ_13/DDR0_DQ_29 AF11
M_A_DQ13 DDR0_DQ_12/DDR0_DQ_12 DDR0_CKE_3/DDR0_CKE_3 M_B_DQ15 DDR1_DQ_14/DDR0_DQ_30 DDR1_CS#_0/DDR1_CS#_0 M_B_CS#0 [18]
BK5 BJ7 AE7
M_A_DQ14 DDR0_DQ_13/DDR0_DQ_13 M_B_DQ16 DDR1_DQ_15/DDR0_DQ_31 DDR1_CS#_1/DDR1_CS#_1 M_B_CS#1 [18]
BK1 AD5 BG11 AF10
M_A_DQ15 DDR0_DQ_14/DDR0_DQ_14 DDR0_CS#_0/DDR0_CS#_0 M_A_CS#0 [17] M_B_DQ17 DDR1_DQ_16/DDR0_DQ_48 NC/DDR1_CS#_2
BK2 AE2 BG10 AE10
M_A_DQ16 DDR0_DQ_15/DDR0_DQ_15 DDR0_CS#_1/DDR0_CS#_1 M_A_CS#1 [17] M_B_DQ18 DDR1_DQ_17/DDR0_DQ_49 NC/DDR1_CS#_3
BG4 AD2 BG8
M_A_DQ17 BG5 DDR0_DQ_16/DDR0_DQ_32 NC/DDR0_CS#_2 AE5 M_B_DQ19 BF8 DDR1_DQ_18/DDR0_DQ_50 AF7
M_A_DQ18 DDR0_DQ_17/DDR0_DQ_33 NC/DDR0_CS#_3 M_B_DQ20 DDR1_DQ_19/DDR0_DQ_51 DDR1_ODT_0/DDR1_ODT_0 M_B_DIM0_ODT0 [18]
BF4 BF11 AE8
M_A_DQ19 DDR0_DQ_18/DDR0_DQ_34 M_B_DQ21 DDR1_DQ_20/DDR0_DQ_52 NC/DDR1_ODT_1 M_B_DIM0_ODT1 [18]
BF5 AD3 BF10 AE9
M_A_DQ20 DDR0_DQ_19/DDR0_DQ_35 DDR0_ODT_0/DDR0_ODT_0 M_A_DIM0_ODT0 [17] M_B_DQ22 DDR1_DQ_21/DDR0_DQ_53 NC/DDR1_ODT_2
BG2 AE4 BG7 AE11
M_A_DQ21 DDR0_DQ_20/DDR0_DQ_36 NC/DDR0_ODT_1 M_A_DIM0_ODT1 [17] M_B_DQ23 DDR1_DQ_22/DDR0_DQ_54 NC/DDR1_ODT_3
BG1 AE1 BF7
M_A_DQ22 BF1 DDR0_DQ_21/DDR0_DQ_37 NC/DDR0_ODT_2 AD4 M_B_DQ24 BB11 DDR1_DQ_23/DDR0_DQ_55 AH10
M_A_DQ23 DDR0_DQ_22/DDR0_DQ_38 NC/DDR0_ODT_3 M_B_DQ25 DDR1_DQ_24/DDR0_DQ_56 DDR1_CAB_3/DDR1_MA_16 M_B_RAS# [18]
BF2 BC11 AH11 M_B_WE#[18]
M_A_DQ24 BD2 DDR0_DQ_23/DDR0_DQ_39 AH5 M_B_DQ26 BB8 DDR1_DQ_25/DDR0_DQ_57 DDR1_CAB_2/DDR1_MA_14 AF8
M_A_DQ25 DDR0_DQ_24/DDR0_DQ_40 DDR0_CAB_4/DDR0_BA_0 M_A_BA0[17] M_B_DQ27 DDR1_DQ_26/DDR0_DQ_58 DDR1_CAB_1/DDR1_MA_15 M_B_CAS# [18]
BD1 AH1 BC8
M_A_DQ26 DDR0_DQ_25/DDR0_DQ_41 DDR0_CAB_6/DDR0_BA_1 M_A_BA1[17] M_B_DQ28 DDR1_DQ_27/DDR0_DQ_59
BC4 AU1 BC10 AH8
M_A_DQ27 DDR0_DQ_26/DDR0_DQ_42 DDR0_CAA_5/DDR0_BG_0 M_A_BG#0[17] M_B_DQ29 DDR1_DQ_28/DDR0_DQ_60 DDR1_CAB_4/DDR1_BA_0 M_B_BA0[18]
BC5 BB10 AH9
M_A_DQ28 DDR0_DQ_27/DDR0_DQ_43 M_B_DQ30 DDR1_DQ_29/DDR0_DQ_61 DDR1_CAB_6/DDR1_BA_1 M_B_BA1[18]
BD5 AH4 BC7 AR9
M_A_DQ29 DDR0_DQ_28/DDR0_DQ_44 DDR0_CAB_3/DDR0_MA_16 M_A_RAS# [17] M_B_DQ31 DDR1_DQ_30/DDR0_DQ_62 DDR1_CAA_5/DDR1_BG_0 M_B_BG#0[18]
BD4 AG4 BB7
M_A_DQ30 DDR0_DQ_29/DDR0_DQ_45 DDR0_CAB_2/DDR0_MA_14 M_A_WE#[17] M_B_DQ32 DDR1_DQ_31/DDR0_DQ_63 M_B_A[13:0] [18]
BC1 AD1 M_A_CAS# [17] AA11 AJ9 M_B_A0
C M_A_DQ31 BC2 DDR0_DQ_30/DDR0_DQ_46 DDR0_CAB_1/DDR0_MA_15 M_B_DQ33 AA10 DDR1_DQ_32/DDR1_DQ_16 DDR1_CAB_9/DDR1_MA_0 AK6 M_B_A1 C
M_A_DQ32 DDR0_DQ_31/DDR0_DQ_47 M_A_A0 M_A_A[13:0] [17] M_B_DQ34 DDR1_DQ_33/DDR1_DQ_17 DDR1_CAB_8/DDR1_MA_1
AB1 AH3 AC11 AK5 M_B_A2
M_A_DQ33 AB2 DDR0_DQ_32/DDR1_DQ_0 DDR0_CAB_9/DDR0_MA_0 AP4 M_A_A1 M_B_DQ35 AC10 DDR1_DQ_34/DDR1_DQ_18 DDR1_CAB_5/DDR1_MA_2 AL5 M_B_A3
M_A_DQ34 AA4 DDR0_DQ_33/DDR1_DQ_1 DDR0_CAB_8/DDR0_MA_1 AN4 M_A_A2 M_B_DQ36 AA7 DDR1_DQ_35/DDR1_DQ_19 NC/DDR1_MA_3 AL6 M_B_A4
M_A_DQ35 AA5 DDR0_DQ_34/DDR1_DQ_2 DDR0_CAB_5/DDR0_MA_2 AP5 M_A_A3 M_B_DQ37 AA8 DDR1_DQ_36/DDR1_DQ_20 NC/DDR1_MA_4 AM6 M_B_A5
M_A_DQ36 AB5 DDR0_DQ_35/DDR1_DQ_3 NC/DDR0_MA_3 AP2 M_A_A4 M_B_DQ38 AC8 DDR1_DQ_37/DDR1_DQ_21 DDR1_CAA_0/DDR1_MA_5 AN7 M_B_A6
M_A_DQ37 AB4 DDR0_DQ_36/DDR1_DQ_4 NC/DDR0_MA_4 AP1 M_A_A5 M_B_DQ39 AC7 DDR1_DQ_38/DDR1_DQ_22 DDR1_CAA_2/DDR1_MA_6 AN10 M_B_A7
M_A_DQ38 AA2 DDR0_DQ_37/DDR1_DQ_5 DDR0_CAA_0/DDR0_MA_5 AP3 M_A_A6 DDR1_DQ_39/DDR1_DQ_23 DDR1_CAA_4/DDR1_MA_7
M_A_DQ39 AA1 DDR0_DQ_38/DDR1_DQ_6 DDR0_CAA_2/DDR0_MA_6 AN1 M_A_A7 M_B_DQ40 W8 AN8 M_B_A8
M_A_DQ40 V5 DDR0_DQ_39/DDR1_DQ_7 DDR0_CAA_4/DDR0_MA_7 AN3 M_A_A8 M_B_DQ41 W7 DDR1_DQ_40/DDR1_DQ_24 DDR1_CAA_3/DDR1_MA_8 AR11 M_B_A9
M_A_DQ41 V2 DDR0_DQ_40/DDR1_DQ_8 DDR0_CAA_3/DDR0_MA_8 AT4 M_A_A9 M_B_DQ42 V10 DDR1_DQ_41/DDR1_DQ_25 DDR1_CAA_1/DDR1_MA_9 AH7 M_B_A10
M_A_DQ42 U1 DDR0_DQ_41/DDR1_DQ_9 DDR0_CAA_1/DDR0_MA_9 AH2 M_A_A10 M_B_DQ43 V11 DDR1_DQ_42/DDR1_DQ_26 DDR1_CAB_7/DDR1_MA_10 AN11 M_B_A11
M_A_DQ43 U2 DDR0_DQ_42/DDR1_DQ_10 DDR0_CAB_7/DDR0_MA_10 AN2 M_A_A11 M_B_DQ44 W 11 DDR1_DQ_43/DDR1_DQ_27 DDR1_CAA_7/DDR1_MA_11 AR10 M_B_A12
M_A_DQ44 V1 DDR0_DQ_43/DDR1_DQ_11 DDR0_CAA_7/DDR0_MA_11 AU4 M_A_A12 M_B_DQ45 W 10 DDR1_DQ_44/DDR1_DQ_28 DDR1_CAA_6/DDR1_MA_12 AF9 M_B_A13
M_A_DQ45 V4 DDR0_DQ_44/DDR1_DQ_12 DDR0_CAA_6/DDR0_MA_12 AE3 M_A_A13 M_B_DQ46 V7 DDR1_DQ_45/DDR1_DQ_29 DDR1_CAB_0/DDR1_MA_13 AR7
M_A_DQ46 DDR0_DQ_45/DDR1_DQ_13 DDR0_CAB_0/DDR0_MA_13 M_B_DQ47 DDR1_DQ_46/DDR1_DQ_30 DDR1_CAA_9/DDR1_BG_1 M_B_BG#1[18]
U5 AU2 V8 AT9
M_A_DQ47 DDR0_DQ_46/DDR1_DQ_14 DDR0_CAA_9/DDR0_BG_1 M_A_BG#1[17] M_B_DQ48 DDR1_DQ_47/DDR1_DQ_31 DDR1_CAA_8/DDR1_ACT# M_B_ACT#[18]
U4 AU3 R11
M_A_DQ48 DDR0_DQ_47/DDR1_DQ_15 DDR0_CAA_8/DDR0_ACT# M_A_ACT#[17] M_B_DQ49 DDR1_DQ_48/DDR1_DQ_48
R2 P11 AJ7
M_A_DQ49 DDR0_DQ_48/DDR1_DQ_32 M_B_DQ50 DDR1_DQ_49/DDR1_DQ_49 NC/DDR1_PAR M_B_PARITY [18]
P5 AG3 P7 AR8
M_A_DQ50 DDR0_DQ_49/DDR1_DQ_33 NC/DDR0_PAR M_A_PARITY [17] M_B_DQ51 DDR1_DQ_50/DDR1_DQ_50 NC/DDR1_ALERT# M_B_ALERT#[18]
R4 AU5 R8
M_A_DQ51 DDR0_DQ_50/DDR1_DQ_34 NC/DDR0_ALERT# M_A_ALERT#[17] M_B_DQ52 DDR1_DQ_51/DDR1_DQ_51
P4 R10
M_A_DQ52 DDR0_DQ_51/DDR1_DQ_35 M_B_DQ53 DDR1_DQ_52/DDR1_DQ_52 M_B_DQSN0 M_B_DQSN[7:0] [18]
R5 P10 BN9
M_A_DQ53 DDR0_DQ_52/DDR1_DQ_36 M_A_DQSN0 M_A_DQSN[7:0] [17] M_B_DQ54 DDR1_DQ_53/DDR1_DQ_53 DDR1_DQSN_0/DDR0_DQSN_2 M_B_DQSN1
P2 BR5 R7 BL9
M_A_DQ54 R1 DDR0_DQ_53/DDR1_DQ_37 DDR0_DQSN_0/DDR0_DQSN_0 BL3 M_A_DQSN1 M_B_DQ55 P8 DDR1_DQ_54/DDR1_DQ_54 DDR1_DQSN_1/DDR0_DQSN_3 BG9 M_B_DQSN2
M_A_DQ55 P1 DDR0_DQ_54/DDR1_DQ_38 DDR0_DQSN_1/DDR0_DQSN_1 BG3 M_A_DQSN2 M_B_DQ56 L11 DDR1_DQ_55/DDR1_DQ_55 DDR1_DQSN_2/DDR0_DQSN_6 BC9 M_B_DQSN3
M_A_DQ56 M4 DDR0_DQ_55/DDR1_DQ_39 DDR0_DQSN_2/DDR0_DQSN_4 BD3 M_A_DQSN3 M_B_DQ57 M11 DDR1_DQ_56/DDR1_DQ_56 DDR1_DQSN_3/DDR0_DQSN_7 AC9 M_B_DQSN4
M_A_DQ57 M1 DDR0_DQ_56/DDR1_DQ_40 DDR0_DQSN_3/DDR0_DQSN_5 AA3 M_A_DQSN4 M_B_DQ58 L7 DDR1_DQ_57/DDR1_DQ_57 DDR1_DQSN_4/DDR1_DQSN_2 W9 M_B_DQSN5
M_A_DQ58 L4 DDR0_DQ_57/DDR1_DQ_41 DDR0_DQSN_4/DDR1_DQSN_0 U3 M_A_DQSN5 M_B_DQ59 M8 DDR1_DQ_58/DDR1_DQ_58 DDR1_DQSN_5/DDR1_DQSN_3 R9 M_B_DQSN6
M_A_DQ59 L2 DDR0_DQ_58/DDR1_DQ_42 DDR0_DQSN_5/DDR1_DQSN_1 P3 M_A_DQSN6 M_B_DQ60 L10 DDR1_DQ_59/DDR1_DQ_59 DDR1_DQSN_6/DDR1_DQSN_6 M9 M_B_DQSN7
M_A_DQ60 M5 DDR0_DQ_59/DDR1_DQ_43 DDR0_DQSN_6/DDR1_DQSN_4 L3 M_A_DQSN7 M_B_DQ61 M10 DDR1_DQ_60/DDR1_DQ_60 DDR1_DQSN_7/DDR1_DQSN_7
B M_A_DQ61 M2 DDR0_DQ_60/DDR1_DQ_44 DDR0_DQSN_7/DDR1_DQSN_5 M_B_DQ62 M7 DDR1_DQ_61/DDR1_DQ_61 BP9 M_B_DQSP0 M_B_DQSP[7:0] [18] B
M_A_DQ62 L5 DDR0_DQ_61/DDR1_DQ_45 BP5 M_A_DQSP0 M_A_DQSP[7:0] [17] M_B_DQ63 L8 DDR1_DQ_62/DDR1_DQ_62 DDR1_DQSP_0/DDR0_DQSP_2 BJ9 M_B_DQSP1
M_A_DQ63 L1 DDR0_DQ_62/DDR1_DQ_46 DDR0_DQSP_0/DDR0_DQSP_0 BK3 M_A_DQSP1 DDR1_DQ_63/DDR1_DQ_63 DDR1_DQSP_1/DDR0_DQSP_3 BF9 M_B_DQSP2
DDR0_DQ_63/DDR1_DQ_47 DDR0_DQSP_1/DDR0_DQSP_1 BF3 M_A_DQSP2 AW 11 DDR1_DQSP_2/DDR0_DQSP_6 BB9 M_B_DQSP3
BA2 DDR0_DQSP_2/DDR0_DQSP_4 BC3 M_A_DQSP3 AY11 NC/DDR1_ECC_0 DDR1_DQSP_3/DDR0_DQSP_7 AA9 M_B_DQSP4
BA1 NC/DDR0_ECC_0 DDR0_DQSP_3/DDR0_DQSP_5 AB3 M_A_DQSP4 AY8 NC/DDR1_ECC_1 DDR1_DQSP_4/DDR1_DQSP_2 V9 M_B_DQSP5
AY4 NC/DDR0_ECC_1 DDR0_DQSP_4/DDR1_DQSP_0 V3 M_A_DQSP5 AW 8 NC/DDR1_ECC_2 DDR1_DQSP_5/DDR1_DQSP_3 P9 M_B_DQSP6
AY5 NC/DDR0_ECC_2 DDR0_DQSP_5/DDR1_DQSP_1 R3 M_A_DQSP6 AY10 NC/DDR1_ECC_3 DDR1_DQSP_6/DDR1_DQSP_6 L9 M_B_DQSP7
BA5 NC/DDR0_ECC_3 DDR0_DQSP_6/DDR1_DQSP_4 M3 M_A_DQSP7 AW 10 NC/DDR1_ECC_4 DDR1_DQSP_7/DDR1_DQSP_7
BA4 NC/DDR0_ECC_4 DDR0_DQSP_7/DDR1_DQSP_5 AY7 NC/DDR1_ECC_5 AW 9
AY1 NC/DDR0_ECC_5 AY3 AW 7 NC/DDR1_ECC_6 DDR1_DQSP_8/DDR1_DQSP_8 AY9
AY2 NC/DDR0_ECC_6 DDR0_DQSP_8/DDR0_DQSP_8 BA3 NC/DDR1_ECC_7 DDR1_DQSN_8/DDR1_DQSN_8
1 OF 13
NC/DDR0_ECC_7 DDR0_DQSN_8/DDR0_DQSN_8
DDR CHANNEL A *CPU_CFL-H_1440P

R1616 121_1%_4 SM_RCOMP_0 G1 BN13 SM_VREF

SM_RCOMP_1 H1 DDR_RCOMP_0 DDR_VREF_CA SM_VREF [17]
R1615 75/F_4 BP13
SM_RCOMP_2 J2 DDR_RCOMP_1 DDR0_VREF_DQ BR13 SMDDR_VREF_DQ1_M3 TP1034
R1614 100_1%_4 2 OF 13 SMDDR_VREF_DQ1_M3 [18]
DDR_RCOMP_2 DDR1_VREF_DQ
*
DDR CHANNEL B *CPU_CFL-H_1440P

Layout Note: Please Close to CPU

A A

PROJECT : NLA
Quanta Computer Inc.
Size Document Number Rev
Custom CFL 3/7 (DDR4 I/F) 1A

Date: Monday, April 09, 2018 Sheet 4 of 56

5 4 3 2 1
 5 4 3 2 1

From CFL-H Power Map

SKYLAKE Processor (POWER) 05
+VCCGT [46,49]
+VCCGT Iccmax = 32A +1.2VSUS [2,6,10,17,18,43,45]

+VCCGT IccPL2 = 25A +VCCGT

UX1K
+VCCGT

AT14 BD35
AT31 VCCGT1
VCCGT2
VCCGT80
VCCGT81
BD36 IO Thrm Protect
D AT32 BE31 D
AT33 VCCGT3 VCCGT82 BE32 Location need thermal confirm
AT34 VCCGT4 VCCGT83 BE33
AT35 VCCGT5 VCCGT84 BE34
C1102
22u/6.3V_6
C1937
22U/6.3V_6
C1115
22U/6.3V_6
C1127
22u/6.3V_6
C1128
22U/6.3V_6
C1113
22U/6.3V_6
C1948
22U/6.3V_6 AT36 VCCGT6 VCCGT85 BE35 For CPU USE For PIPE USE
AT37 VCCGT7 VCCGT86 BE36
AT38 VCCGT8 VCCGT87 BE37 +3VPCU +3VPCU
AU14 VCCGT9 VCCGT88 BE38
AU29 VCCGT10 VCCGT89 BF13
AU30 VCCGT11 VCCGT90 BF14
AU31 VCCGT12 VCCGT91 BF29 R36 R38
AU32 VCCGT13 VCCGT92 BF30 20K/F_4 20K/F_4
C1936 C1377 C1217 C1949 C1357 AU35 VCCGT14 VCCGT93 BF31
10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 AU36 VCCGT15 VCCGT94 BF32
AU37 VCCGT16 VCCGT95 BF35
AU38 VCCGT17 VCCGT96 BF36
For 75 degree, 1.2v limit, (HW) For 75 degree, 1.2v limit, (HW)
AV29 VCCGT18 VCCGT97 BF37 THRM_MOINTOR2 THRM_MOINTOR1
VCCGT19 VCCGT98 THRM_MOINTOR2 [38] THRM_MOINTOR1 [38]
AV30 BF38
AV31 VCCGT20 VCCGT99 BG29
AV32 VCCGT21 VCCGT100 BG30
C1125 C1935 C1950 C1130 C1946 AV33 VCCGT22 VCCGT101 BG31 TM0 C45 TM1 C47
10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 AV34 VCCGT23 VCCGT102 BG32 100K_4 NTC 0.1U/16V_4 100K_4 NTC
AV35 VCCGT24 VCCGT103 BG33 0.1U/16V_4
AV36 VCCGT25 VCCGT104 BG34
AW 14 VCCGT26 VCCGT105 BG35
AW 31 VCCGT27 VCCGT106 BG36
AW 32 VCCGT28 VCCGT107 BH33
AW 33 VCCGT29 VCCGT108 BH34
AW 34 VCCGT30 VCCGT109 BH35
C1934 C1358 C1338 C1339 C1340 C1378 AW 35 VCCGT31 VCCGT110 BH36
C 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 AW 36 VCCGT32 VCCGT111 BH37 C
AW 37 VCCGT33 VCCGT112 BH38
AW 38 VCCGT34 VCCGT113 BJ16
AY29 VCCGT35 VCCGT114 BJ17
AY30 VCCGT36 VCCGT115 BJ19
AY31 VCCGT37 VCCGT116 BJ20
AY32 VCCGT38 VCCGT117 BJ21
C1116 C1947 C1117 C1114 C1925 C1944 AY35 VCCGT39 VCCGT118 BJ23
1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 1u/10V_2 AY36 VCCGT40 VCCGT119 BJ24
AY37 VCCGT41 VCCGT120 BJ26
AY38 VCCGT42 VCCGT121 BJ27
BA13 VCCGT43 VCCGT122 BJ37
BA14 VCCGT44 VCCGT123 BJ38
BA29 VCCGT45 VCCGT124 BK16
BA30 VCCGT46 VCCGT125 BK17
BA31 VCCGT47 VCCGT126 BK19
BA32 VCCGT48 VCCGT127 BK20
C10036 C1112 C1922 BA33 VCCGT49 VCCGT128 BK21
47u/6.3VS_8 47u/6.3VS_8 47u/6.3VS_8 BA34 VCCGT50 VCCGT129 BK23
BA35 VCCGT51 VCCGT130 BK24
BA36 VCCGT52 VCCGT131 BK26
BB13 VCCGT53 VCCGT132 BK27
BB14 VCCGT54 VCCGT133 BL15
BB31 VCCGT55 VCCGT134 BL16
BB32 VCCGT56 VCCGT135 BL17
BB33 VCCGT57 VCCGT136 BL23
BB34 VCCGT58 VCCGT137 BL24
BB35 VCCGT59 VCCGT138 BL25
BB36 VCCGT60 VCCGT139 BL26
BB37 VCCGT61 VCCGT140 BL27
B BB38 VCCGT62 VCCGT141 BL28 B
BC29 VCCGT63 VCCGT142 BL36
BC30 VCCGT64 VCCGT143 BL37
BC31 VCCGT65 VCCGT144 BM15
BC32 VCCGT66 VCCGT145 BM16
BC35 VCCGT67 VCCGT146 BM17
BC36 VCCGT68 VCCGT147 BM36
BC37 VCCGT69 VCCGT148 BM37
BC38 VCCGT70 VCCGT149 BN15
BD13 VCCGT71 VCCGT150 BN16
BD14 VCCGT72 VCCGT151 BN17
BD29 VCCGT73 VCCGT152 BN36
BD30 VCCGT74 VCCGT153 BN37
BD31 VCCGT75 VCCGT154 BN38
BD32 VCCGT76 VCCGT155 BP15
BD33 VCCGT77 VCCGT156 BP16
BD34 VCCGT78 VCCGT157 BP17
BP37 VCCGT79 VCCGT158 BR37
BP38 VCCGT159 VCCGT164 BT15
BR15 VCCGT160 VCCGT165 BT16
BR16 VCCGT161 VCCGT166 BT17
BR17 VCCGT162 VCCGT167 BT37
VCCGT163 VCCGT168

AH37
VSSGT_SENSE VSSGT_SENSE [46]
AH38
11 OF 13 VCCGT_SENSE VCCGT_SENSE [46]
*CPU_CFL-H_1440P

A A

PROJECT : NLA
Quanta Computer Inc.
Size Document Number Rev
Custom CFL 4/7 (POWER) 1A

Date: Monday, April 09, 2018 Sheet 5 of 56

5 4 3 2 1
 5 4 3 2 1

+VCCSA [46,49]

+VCCIO [3,45]

+1.2VSUS [2,10,17,18,43,45] Follow CFL-H Power Map 45W(GT2): VCCSA=11.1A

Follow CFL-H Power Map 45W: VDDQ=11.5A
06
+VCCSA +1.2VSUS
UX1L

J30
11.1 A 11.5A AA6
K29 VCCSA1 VDDQ1 AE12
D C10037 C10039 C10038 C1943 C1910 K30 VCCSA2 VDDQ2 AF5 C1493 C1507 C1497 C1506 D
47u/6.3VS_8 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 K31 VCCSA3 VDDQ3 AF6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6
K32 VCCSA4 VDDQ4 AG5
K33 VCCSA5 VDDQ5 AG9
K34 VCCSA6 VDDQ6 AJ12
K35 VCCSA7 VDDQ7 AL11
L31 VCCSA8 VDDQ8 AP6
L32 VCCSA9 VDDQ9 AP7
L35 VCCSA10 VDDQ10 AR12 C1511 C1495 C1492 C1505 C1481 C10040
C1932 C1915 C1099 C1086 C1109 C1124 C1923 L36 VCCSA11 VDDQ11 AR6 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4
10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 L37 VCCSA12 VDDQ12 AT12
L38 VCCSA13 VDDQ13 AW6
M29 VCCSA14 VDDQ14 AY6
M30 VCCSA15 VDDQ15 J5
M31 VCCSA16 VDDQ16 J6
C1227 M32 VCCSA17 VDDQ17 K12 C1516 C1508 C1483 C1489 C1494
1u/10V_2 M33 VCCSA18 VDDQ18 K6 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4
M34 VCCSA19 VDDQ19 L12
M35 VCCSA20 VDDQ20 L6
M36 VCCSA21 VDDQ21 R6
+VCCIO VCCSA22 VDDQ22 T6
Follow CFL-H Power Map45W: VCCIO = 6.4A VDDQ23 W6
VDDQ24 Y12
AG12
6.4A VDDQ25
G15 VCCIO1
C10041 C1329 C1342 G17 VCCIO2
10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 G19 VCCIO3 BH13
VCCIO4 VCCPLL_OC1 +VCCPLL_OC
G21 0.15A VCCPLL_OC2 BJ13
H15 VCCIO5 G11 +VCCSTPLL
H16 VCCIO6 VCCPLL_OC3
C H17 VCCIO7 H30 C
H19 VCCIO8 0.06A VCCST
H20 VCCIO9 H29 C1251
VCCIO10 VCCSTG2 +VCCSTG
H21 0.02A 1u/10V_2
C1326 C1273 C1259 H26 VCCIO11 G30
10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 H27 VCCIO12 VCCSTG1
J15 VCCIO13 H28 +VCCIO
VCCIO14 VCCPLL1 +VCCPLL
J16 0.15 A J28
J17 VCCIO15 VCCPLL2
J19 VCCIO16 R1121
J20 VCCIO17 M38
VCCIO18 VCCSA_SENSE VCCSA_SENSE [46] *100_5%_4
J21 M37
VCCIO19 VSSSA_SENSE VSSSA_SENSE [46]
J26
J27 VCCIO20 H14 VCCIO_VCCSENSE
VCCIO21 VCCIO_SENSE VCCIO_VSSSENSE VCCIO_VCCSENSE [45]
J14
12 OF 13 VSSIO_SENSE VCCIO_VSSSENSE [45]

*CPU_CFL-H_1440P R1123
*100_5%_4
For C10
9/14 Sense connect to PWR IC and no stuff PH/PD Res.

Close CPU
Under CPU +VCCIO +VCCPLL
B
For C10 B
+VCCSTG +VCCPLL_OC SI : 0830 Add C1011

C1279 C1203 C10011

C1197 C1401 1u/10V_2 1u/10V_2 47u/6.3VS_8 +VCCPLL_OC
C1399
1u/10V_2 1u/10V_2 1u/10V_2

+1.2V_VCCPLL_OC

R1208 *Short_0603

+1.05V
+VCCSTPLL

R1093 *Short_0402

A A

+VCCPLL

R1098 *Short_0402
PROJECT : NLA
Quanta Computer Inc.
Size Document Number Rev
Custom CFL 5/7 (POWER&GND ) 1A

Date: Monday, April 09, 2018 Sheet 6 of 56

5 4 3 2 1
 5 4 3 2 1

+VCC_CORE [46,47,48]

07
+VCC_CORE
+VCC_CORE +VCC_CORE +VCC_CORE
D D

Follow CFL-H Power Map 6 + 2 45W 80A UX1I UX1J

AA13 AH13
AA31 VCC#AA13 VCC#AH13 AH14 K14 W35
AA32 VCC#AA31 VCC#AH14 AH29 L13 VCC#K14 VCC#W35 W36
C1093 C1105 C1134 C1916 C1131 C1919 AA33 VCC#AA32 VCC#AH29 AH30 C1219 C1402 C1292 C1221 C1912 C1291 C1404 C1289 C1245 L14 VCC#L13 VCC#W36 W37
22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 AA34 VCC#AA33 VCC#AH30 AH31 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 N13 VCC#L14 VCC#W37 W38
AA35 VCC#AA34 VCC#AH31 AH32 N14 VCC#N13 VCC#W38 Y29
AA36 VCC#AA35 VCC#AH32 AJ14 N30 VCC#N14 VCC#Y29 Y30
AA37 VCC#AA36 VCC#AJ14 AJ29 N31 VCC#N30 VCC#Y30 Y31
AA38 VCC#AA37 VCC#AJ29 AJ30 N32 VCC#N31 VCC#Y31 Y32
AB29 VCC#AA38 VCC#AJ30 AJ31 N35 VCC#N32 VCC#Y32 Y33
AB30 VCC#AB29 VCC#AJ31 AJ32 N36 VCC#N35 VCC#Y33 Y34
C1133 C1918 C1348 C1952 C1933 C1095 AB31 VCC#AB30 VCC#AJ32 AJ33 N37 VCC#N36 VCC#Y34 Y35
22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 AB32 VCC#AB31 VCC#AJ33 AJ34 C10017 C10023 C10024 C1317 C1290 C10022 C10018 C10025 N38 VCC#N37 VCC#Y35 Y36
AB35 VCC#AB32 VCC#AJ34 AJ35 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 P13 VCC#N38 VCC#Y36
AB36 VCC#AB35 VCC#AJ35 AJ36 P14 VCC#P13
AB37 VCC#AB36 VCC#AJ36 AK31 P29 VCC#P14
AB38 VCC#AB37 VCC#AK31 AK32 P30 VCC#P29
AC13 VCC#AB38 VCC#AK32 AK33 P31 VCC#P30
AC14 VCC#AC13 VCC#AK33 AK34 P32 VCC#P31
AC29 VCC#AC14 VCC#AK34 AK35 P33 VCC#P32
AC30 VCC#AC29 VCC#AK35 AK36 P34 VCC#P33
AC31 VCC#AC30 VCC#AK36 AK37 C10015 C10033 C10034 C10021 C1288 C10032 C10028 C10035 P35 VCC#P34
AC32 VCC#AC31 VCC#AK37 AK38 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 1U/10V_2 P36 VCC#P35
AC33 VCC#AC32 VCC#AK38 AL13 R13 VCC#P36
AC34 VCC#AC33 VCC#AL13 AL29 R31 VCC#R13
C1106 C1917 C1139 AC35 VCC#AC34 VCC#AL29 AL30 R32 VCC#R31
10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 AC36 VCC#AC35 VCC#AL30 AL31 R33 VCC#R32
C AD13 VCC#AC36 VCC#AL31 AL32 R34 VCC#R33 C
AD14 VCC#AD13 VCC#AL32 AL35 R35 VCC#R34
AD31 VCC#AD14 VCC#AL35 AL36 R36 VCC#R35
AD32 VCC#AD31 VCC#AL36 AL37 R37 VCC#R36
AD33 VCC#AD32 VCC#AL37 AL38 R38 VCC#R37
AD34 VCC#AD33 VCC#AL38 AM13 T29 VCC#R38
AD35 VCC#AD34 VCC#AM13 AM14 T30 VCC#T29
AD36 VCC#AD35 VCC#AM14 AM29 T31 VCC#T30
AD37 VCC#AD36 VCC#AM29 AM30 T32 VCC#T31
AD38 VCC#AD37 VCC#AM30 AM31 T35 VCC#T32
C1914 C1942 C1121 C1103 C1082 C1945 C1138 C1081 C1083 AE13 VCC#AD38 VCC#AM31 AM32 T36 VCC#T35
10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 AE14 VCC#AE13 VCC#AM32 AM33 T37 VCC#T36
AE30 VCC#AE14 VCC#AM33 AM34 T38 VCC#T37
AE31 VCC#AE30 VCC#AM34 AM35 U29 VCC#T38
AE32 VCC#AE31 VCC#AM35 AM36 U30 VCC#U29
AE35 VCC#AE32 VCC#AM36 AN13 U31 VCC#U30
AE36 VCC#AE35 VCC#AN13 AN14 U32 VCC#U31
AE37 VCC#AE36 VCC#AN14 AN31 U33 VCC#U32
AE38 VCC#AE37 VCC#AN31 AN32 U34 VCC#U33
AF29 VCC#AE38 VCC#AN32 AN33 U35 VCC#U34
C1119 C1220 C1244 C1246 C1104 C1242 C1268 C1403 C1364 AF30 VCC#AF29 VCC#AN33 AN34 U36 VCC#U35
10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 AF31 VCC#AF30 VCC#AN34 AN35 V13 VCC#U36
AF32 VCC#AF31 VCC#AN35 AN36 V14 VCC#V13
AF33 VCC#AF32 VCC#AN36 AN37 V31 VCC#V14
AF34 VCC#AF33 VCC#AN37 AN38 V32 VCC#V31
AF35 VCC#AF34 VCC#AN38 AP13 V33 VCC#V32
AF36 VCC#AF35 VCC#AP13 AP30 V34 VCC#V33
AF37 VCC#AF36 VCC#AP30 AP31 V35 VCC#V34
AF38 VCC#AF37 VCC#AP31 AP32 V36 VCC#V35
AG14 VCC#AF38 VCC#AP32 AP35 V37 VCC#V36
B AG31 VCC#AG14 VCC#AP35 AP36 +VCC_CORE Sense resistor should be placed within 2 V38 VCC#V37 B
VCC#AG31 VCC#AP36 VCC#V38
C10014 C10013 C10012 C1397 C1362
AG32
AG33 VCC#AG32 VCC#AP37
AP37
AP38
inches (50.8 mm) of the processor socket W13
W14 VCC#W13
47u/6.3VS_8 47u/6.3VS_8 47u/6.3VS_8 47u/6.3VS_8 47u/6.3VS_8 AG34 VCC#AG33 VCC#AP38 K13 W29 VCC#W14
AG35 VCC#AG34 VCC#K13 R1559 Trace Impendence 50 ohm W30 VCC#W29
AG36 VCC#AG35 W31 VCC#W30 10 OF 13
VCC#AG36 100_5%_4 VCC#W31
W32
VCC#W32
*CPU_CFL-H_1440P
AG37 VCC_SENSE
VCC_SENSE VSS_SENSE VCC_SENSE [46]
9 OF 13 AG38 VSS_SENSE [46]
VSS_SENSE
*CPU_CFL-H_1440P
R1560
100_5%_4

VCC_SENSE R1562 *49.9/F_4 VSS_SENSE

A A

PROJECT : NLA
Quanta Computer Inc.
Size Document Number Rev
Custom CFL 6/7 (POWER&GND ) 1A

Date: Monday, April 09, 2018 Sheet 7 of 56

5 4 3 2 1
 5 4 3 2 1

UX1F UX1G UX1H

08
A10 AK4 AW 5 BJ15 BN4 F15
A12 VSS_1 VSS_82 AL10 AY12 VSS_163 VSS_244 BJ18 BN7 VSS_325 VSS_409 F17
A16 VSS_2 VSS_83 AL12 AY33 VSS_164 VSS_245 BJ22 BP12 VSS_326 VSS_410 F19
A18 VSS_3 VSS_84 AL14 AY34 VSS_165 VSS_246 BJ25 BP14 VSS_327 VSS_411 F2
A20 VSS_4 VSS_85 AL33 B9 VSS_166 VSS_247 BJ29 BP18 VSS_328 VSS_412 F21
A22 VSS_5 VSS_86 AL34 BA10 VSS_167 VSS_248 BJ30 BP21 VSS_329 VSS_413 F23 UX1M
D A24 VSS_6 VSS_87 AL4 BA11 VSS_168 VSS_249 BJ31 BP24 VSS_330 VSS_414 F25 D
A26 VSS_7 VSS_88 AL7 BA12 VSS_169 VSS_250 BJ32 BP25 VSS_331 VSS_415 F27
A28 VSS_8 VSS_89 AL8 BA37 VSS_170 VSS_251 BJ33 BP26 VSS_332 VSS_416 F29 TP1102 E2
A30 VSS_9 VSS_90 AL9 BA38 VSS_171 VSS_252 BJ34 BP29 VSS_333 VSS_417 F3 E3 RSVD_TP5
A6 VSS_10 VSS_91 AM1 BA6 VSS_172 VSS_253 BJ35 BP33 VSS_334 VSS_418 F31 E1 IST_TRIG
A9 VSS_11 VSS_92 AM12 BA7 VSS_173 VSS_254 BJ36 BP34 VSS_335 VSS_419 F36 D1 RSVD_TP4
AA12 VSS_12 VSS_93 AM2 BA8 VSS_174 VSS_255 BK13 BP7 VSS_336 VSS_420 F4 * RSVD_TP3
AA29 VSS_13 VSS_94 AM3 BA9 VSS_175 VSS_256 BK14 BR12 VSS_337 VSS_421 F5 BR1 BK28
AA30 VSS_14 VSS_95 AM37 BB1 VSS_176 VSS_257 BK15 BR14 VSS_338 VSS_422 F8 BT2 RSVD_TP1 RSVD11 BJ28
AB33 VSS_15 VSS_96 AM38 BB12 VSS_177 VSS_258 BK18 BR18 VSS_339 VSS_423 F9 RSVD_TP2 RSVD10
AB34 VSS_16 VSS_97 AM4 BB2 VSS_178 VSS_259 BK22 BR21 VSS_340 VSS_424 G10 BN35
AB6 VSS_17 VSS_98 AM5 BB29 VSS_179 VSS_260 BK25 BR24 VSS_341 VSS_425 G12 RSVD15
AC1 VSS_18 VSS_99 AN12 BB3 VSS_180 VSS_261 BK29 BR25 VSS_342 VSS_426 G14 J24
AC12 VSS_19 VSS_100 AN29 BB30 VSS_181 VSS_262 BK6 BR26 VSS_343 VSS_427 G16 H24 RSVD28
AC2 VSS_20 VSS_101 AN30 BB4 VSS_182 VSS_263 BL13 BR29 VSS_344 VSS_428 G18 BN33 RSVD27
AC3 VSS_21 VSS_102 AN5 BB5 VSS_183 VSS_264 BL14 BR34 VSS_345 VSS_429 G20 BL34 RSVD14
AC37 VSS_22 VSS_103 AN6 BB6 VSS_184 VSS_265 BL18 BR36 VSS_346 VSS_430 G22 RSVD13
AC38 VSS_23 VSS_104 AP10 BC12 VSS_185 VSS_266 BL19 BR7 VSS_347 VSS_431 G23 N29
AC4 VSS_24 VSS_105 AP11 BC13 VSS_186 VSS_267 BL20 BT12 VSS_348 VSS_432 G24 R14 RSVD30
AC5 VSS_25 VSS_106 AP12 BC14 VSS_187 VSS_268 BL21 BT14 VSS_349 VSS_433 G26 AE29 RSVD31
AC6 VSS_26 VSS_107 AP33 BC33 VSS_188 VSS_269 BL22 BT18 VSS_350 VSS_434 G28 AA14 RSVD#AE29
AD10 VSS_27 VSS_108 AP34 BC34 VSS_189 VSS_270 BL29 BT21 VSS_351 VSS_435 G4 AP29 RSVD1
AD11 VSS_28 VSS_109 AP8 BC6 VSS_190 VSS_271 BL33 BT24 VSS_352 VSS_436 G5 AP14 RSVD5
AD12 VSS_29 VSS_110 AP9 BD10 VSS_191 VSS_272 BL35 BT26 VSS_353 VSS_437 G6 R1112 *Short_0402 A36 RSVD4
AD29 VSS_30 VSS_111 AR1 BD11 VSS_192 VSS_273 BL38 BT29 VSS_354 VSS_438 G8 VSS_A36
AD30 VSS_31 VSS_112 AR13 BD12 VSS_193 VSS_274 BL6 BT32 VSS_355 VSS_439 G9 R1113 *Short_0402 A37
AD6 VSS_32 VSS_113 AR14 BD37 VSS_194 VSS_275 BM11 BT5 VSS_356 VSS_440 H11 VSS_A37
AD8 VSS_33 VSS_114 AR2 BD6 VSS_195 VSS_276 BM12 C11 VSS_357 VSS_441 H12 PCH_2_CPU_TRIGGER H23
VSS_34 VSS_115 VSS_196 VSS_277 VSS_358 VSS_442 [15] PCH_2_CPU_TRIGGER PROC_TRIGIN
AD9 AR29 BD7 BM13 C13 H18
[15] CPU_2_PCH_TRIGGER R1109 30_1%_4 CPU_2_PCH_TRIGGER_R J23
AE33 VSS_35 VSS_116 AR3 BD8 VSS_197 VSS_278 BM14 C15 VSS_359 VSS_443 H22 PROC_TRIGOUT
C AE34 VSS_36 VSS_117 AR30 BD9 VSS_198 VSS_279 BM18 C17 VSS_360 VSS_444 H25 F30 C
AE6 VSS_37 VSS_118 AR31 BE1 VSS_199 VSS_280 BM2 C19 VSS_361 VSS_445 H32 RSVD24
AF1 VSS_38 VSS_119 AR32 BE2 VSS_200 VSS_281 BM21 C21 VSS_362 VSS_446 H35
AF12 VSS_39 VSS_120 AR33 BE29 VSS_201 VSS_282 BM22 C23 VSS_363 VSS_447 J10 E30
AF13 VSS_40 VSS_121 AR34 BE3 VSS_202 VSS_283 BM23 C25 VSS_364 VSS_448 J18 RSVD23
AF14 VSS_41 VSS_122 AR35 BE30 VSS_203 VSS_284 BM24 C27 VSS_365 VSS_449 J22
AF2 VSS_42 VSS_123 AR36 BE4 VSS_204 VSS_285 BM25 C29 VSS_366 VSS_450 J25 B30 BL31
AF3 VSS_43 VSS_124 AR37 BE5 VSS_205 VSS_286 BM26 C31 VSS_367 VSS_451 J32 C30 RSVD7 RSVD12 AJ8
AF4 VSS_44 VSS_125 AR38 BE6 VSS_206 VSS_287 BM27 C37 VSS_368 VSS_452 J33 RSVD21 RSVD3 G13
AG10 VSS_45 VSS_126 AR4 BF12 VSS_207 VSS_288 BM28 C5 VSS_369 VSS_453 J36 RSVD25
AG11 VSS_46 VSS_127 AR5 BF33 VSS_208 VSS_289 BM29 C8 VSS_370 VSS_454 J4 G3
AG13 VSS_47 VSS_128 AT29 BF34 VSS_209 VSS_290 BM3 C9 VSS_371 VSS_455 J7 J3 RSVD26 C38
AG29 VSS_48 VSS_129 AT30 BF6 VSS_210 VSS_291 BM33 D10 VSS_372 VSS_456 K1 RSVD29 RSVD22 C1
AG30 VSS_49 VSS_130 AT6 BG12 VSS_211 VSS_292 BM35 D12 VSS_373 VSS_457 K10 RSVD20 BR2
AG6 VSS_50 VSS_131 AU10 BG13 VSS_212 VSS_293 BM38 D14 VSS_374 VSS_458 K11 BR35 RSVD17 BP1
AG7 VSS_51 VSS_132 AU11 BG14 VSS_213 VSS_294 BM5 D16 VSS_375 VSS_459 K2 BR31 RSVD19 RSVD16 B38
AG8 VSS_52 VSS_133 AU12 BG37 VSS_214 VSS_295 BM6 D18 VSS_376 VSS_460 K3 BH30 RSVD18 RSVD8 B2
AH12 VSS_53 VSS_134 AU33 BG38 VSS_215 VSS_296 BM7 D20 VSS_377 VSS_461 K38 RSVD9 RSVD6
AH33 VSS_54 VSS_135 AU34 BG6 VSS_216 VSS_297 BM8 D22 VSS_378 VSS_462 K4 13 OF 13
AH34 VSS_55 VSS_136 AU6 BH1 VSS_217 VSS_298 BM9 D24 VSS_379 VSS_463 K5
AH35 VSS_56 VSS_137 AU7 BH10 VSS_218 VSS_299 BN12 D26 VSS_380 VSS_464 K7 *CPU_CFL-H_1440P
AH36 VSS_57 VSS_138 AU8 BH11 VSS_219 VSS_300 BN14 D28 VSS_381 VSS_465 K8
AH6 VSS_58 VSS_139 AU9 BH12 VSS_220 VSS_301 BN18 D3 VSS_382 VSS_466 K9
AJ1 VSS_59 VSS_140 AV37 BH14 VSS_221 VSS_302 BN19 D30 VSS_383 VSS_467 L29
AJ13 VSS_60 VSS_141 AV38 BH2 VSS_222 VSS_303 BN2 D33 VSS_384 VSS_468 L30
AJ2 VSS_61 VSS_142 AW 1 BH3 VSS_223 VSS_304 BN20 D6 VSS_385 VSS_469 L33
AJ3 VSS_62 VSS_143 AW 12 BH4 VSS_224 VSS_305 BN21 D9 VSS_386 VSS_470 L34
AJ37 VSS_63 VSS_144 AW 2 BH5 VSS_225 VSS_306 BN24 E34 VSS_387 VSS_471 M12
AJ38 VSS_64 VSS_145 AW 29 BH6 VSS_226 VSS_307 BN29 E35 VSS_388 VSS_472 M13
AJ4 VSS_65 VSS_146 AW 3 BH7 VSS_227 VSS_308 BN30 E38 VSS_389 VSS_473 N10
B AJ5 VSS_66 VSS_147 AW 30 BH8 VSS_228 VSS_309 BN31 E4 VSS_390 VSS_474 N11 B
AJ6 VSS_67 VSS_148 AW 4 BH9 VSS_229 VSS_310 BN34 E9 VSS_391 VSS_475 N12
W4 VSS_68 VSS_149 U6 T2 VSS_230 VSS_311 P38 N3 VSS_392 VSS_476 N2
W5 VSS_69 VSS_150 V12 T3 VSS_231 VSS_312 P6 N33 VSS_393 VSS_477 BT8
Y10 VSS_70 VSS_151 V29 T33 VSS_232 VSS_313 R12 N34 VSS_394 VSS_478 BR9
Y11 VSS_71 VSS_152 V30 T34 VSS_233 VSS_314 R29 N4 VSS_395 VSS_479
Y13 VSS_72 VSS_153 A14 T4 VSS_234 VSS_315 AY14 N5 VSS_396 A3
Y14 VSS_73 VSS_154 AD7 T5 VSS_235 VSS_316 BD38 N6 VSS_397 VSS_A3 A34
Y37 VSS_74 VSS_155 V6 T7 VSS_236 VSS_317 R30 N7 VSS_398 VSS_A34 A4
Y38 VSS_75 VSS_156 W1 T8 VSS_237 VSS_318 T1 N8 VSS_399 VSS_A4 B3
Y7 VSS_76 VSS_157 W 12 T9 VSS_238 VSS_319 T10 N9 VSS_400 VSS_B3 B37
Y8 VSS_77 VSS_158 W2 U37 VSS_239 VSS_320 T11 P12 VSS_401 VSS_B37 BR38
Y9 VSS_78 VSS_159 W3 U38 VSS_240 VSS_321 T12 P37 VSS_402 VSS_BR38 BT3
AK29 VSS_79 VSS_160 W 33 BJ12 VSS_241 VSS_322 T13 M14 VSS_403 VSS_BT3 BT35
AK30 VSS_80 VSS_161 W 34 BJ14 VSS_242 VSS_323 T14 M6 VSS_404 VSS_BT35 BT36
VSS_81 VSS_162 VSS_243 VSS_324 N1 VSS_405 VSS_BT36 BT4
*CPU_CFL-H_1440P F11 VSS_406 VSS_BT4 C2
6 OF 13 7 OF 13
*CPU_CFL-H_1440P F13 VSS_407 VSS_C2 D38
VSS_408 VSS_D38
*CPU_CFL-H_1440P
8 OF 13

A A

PROJECT : NLA
Quanta Computer Inc.
Size Document Number Rev
Custom CFL 7/7 (GND) 1A

Date: Monday, April 09, 2018 Sheet 8 of 56

5 4 3 2 1
 5 4 3 2 1

[3] DMI_TXN0
[3] DMI_TXP0
[3] DMI_RXN0
K34
J35
C33
US1B
DMI0_RXN
DMI0_RXP
USB2N_1
USB2P_1
J3
J2
N13
USBP1- [30]
USBP1+ [30] USB2.0 Combo USB3.0 MB
09
DMI0_TXN USB2N_2 USBP2- [37]
[3] DMI_RXP0 B33 N15 USB2.0 Combo USB3.0 Small Board
DMI0_TXP USB2P_2 USBP2+ [37]
[3] DMI_TXN1 G33 K4 TPS47
F34 DMI1_RXN USB2N_3 K3 +3V
[3] DMI_TXP1
C32 DMI1_RXP USB2P_3 M10
TPS48 USB2.0 Combo USB3.0 Small Board
[3] DMI_RXN1 DMI1_TXN USB2N_4 USBP4- [33]
[3] DMI_RXP1 B32 L9 USB2.0 For Type C
DMI1_TXP USB2P_4 USBP4+ [33]
[3] DMI_TXN2 K32 M1
DMI2_RXN USB2N_5 USBP5- [26] DGPU_PWR_EN
[3] DMI_TXP2 J32 L2 IR CAM RS2 10K_5%_4
DMI2_RXP USB2P_5 USBP5+ [26] DGPU_PWROK_Q
D USB 2.0 PORT [3] DMI_RXN2 C31 K7 RS3 10K_5%_4 D
DMI2_TXN USB2N_6 USBP6- [26] EXT_SMI#
[3] DMI_RXP2 B31 K6 CAMERA RS4 10K_5%_4
DMI2_TXP USB2P_6 USBP6+ [26] EC_RCIN#
PORT1 USB2 MB [3] DMI_TXN3 G30 L4 RS5 10K_5%_4
DMI3_RXN USB2N_7 USBP7- [34] GC6FBEN_Q
[3] DMI_TXP3 F30 L3 WLAN RS6 10K_5%_4
DMI3_RXP USB2P_7 USBP7+ [34]
PORT2 USB2 DB-1 [3] DMI_RXN3 C29 G4
B29 DMI3_TXN USB2N_8 G5 +3V_DEEP_SUS
[3] DMI_RXP3 DMI3_TXP USB2P_8
PORT3 NC A25 M6
B25 DMI7_TXP USB2N_9 N8
P24 DMI7_TXN USB2P_9 H3 USB_OC4# RS7 10K_5%_4
PORT4 USB2.0 For Type C R24 DMI7_RXP USB2N_10 H2 USB_OC5# RS8 10K_5%_4
C26 DMI7_RXN USB2P_10 R10 USB_OC6# RS9 10K_5%_4
PORT5 IR CAM B26 DMI6_TXP USB2N_11 P9 PCH_AOCS# RS10 10K_5%_4
F26 DMI6_TXN USB2P_11 G1
PORT6 CAMERA G26 DMI6_RXP USB2N_12 G2
PORT7 WLAN B27 DMI6_RXN
DMI5_TXP
USB2P_12
USB2N_13
N3 GFX Present
C27 N2
L26 DMI5_TXN USB2P_13 E5
PORT8 NC M26 DMI5_RXP USB2N_14 F6
Rb Ra +3V
PORT9-14 NC D29 DMI5_RXN
DMI4_TXP
USB2P_14 DIS only
E28 AH36 DGPU_HOLD_RST# DGPU_HOLD_RST# [19] RS11 *100K_4GPU_EVENT# RS12 10K_5%_4
K29 DMI4_TXN GPP_E9/USB2_OC0# AL40 GPU_EVENT#
DMI4_RXP GPP_E10/USB2_OC1# GPU_EVENT# [21]
M29 AJ44 DGPU_PWR_EN
DMI4_RXN GPP_E11/USB2_OC2# AL41 DGPU_PWROK_Q
DGPU_PWR_EN [22]
DGPU_PWROK_Q [21,38]
BOM:UMA only BOM:DIS and Optimus
G17 GPP_E12/USB2_OC3# AV47 USB_OC4#
F16 PCIE1_RXN/USB31_7_RXN GPP_F15/USB2_OC4# AR35 USB_OC5#
USB 3.0 PORT A17 PCIE1_RXP/USB31_7_RXP GPP_F16/USB2_OC5# AR37 USB_OC6#
PCIE1_TXN/USB31_7_TXN GPP_F17/USB2_OC6# SG(Default) UMA
PORT1 USB3 MB B17 AV43 PCH_AOCS#
R21 PCIE1_TXP/USB31_7_TXP GPP_F18/USB2_OC7#
PCIE2_RXN/USB31_8_RXN USB2_COMP
Stuff Ra Rb
PORT2 USB3 DB-1 P21 F4 RS13 113_1%_4
B18 PCIE2_RXP/USB31_8_RXP USB2_COMP F3 NC Rb Ra
C18 PCIE2_TXN/USB31_8_TXN USB2_VBUSSENSE U13
PORT3 NC K18 PCIE2_TXP/USB31_8_TXP RSVD1 G3
J18 PCIE3_RXN/USB31_9_RXN USB2_ID
PORT4 USB Typec w/o TBT B19 PCIE3_RXP/USB31_9_RXP BE41 GPD_7
C C
C19 PCIE3_TXN/USB31_9_TXN GPD7
N18 PCIE3_TXP/USB31_9_TXP G45
R18 PCIE4_RXN/USB31_10_RXN PCIE24_TXP G46
D20 PCIE4_RXP/USB31_10_RXP PCIE24_TXN Y41
RS14 RS15
1K_5%_4 1K_5%_4
If OTG is not implemented on the platform,
PCIE4_TXN/USB31_10_TXN PCIE24_RXP
C20
F20 PCIE4_TXP/USB31_10_TXP PCIE24_RXN
Y40
G48
then USB2_ID and USB2_VBUSSENSE should both
G20 PCIE5_RXN
PCIE5_RXP
PCIE23_TXP
PCIE23_TXN
G49 be connected to ground.
B21 W44
A22 PCIE5_TXN PCIE23_RXP W43
K21 PCIE5_TXP PCIE23_RXN H48
J21 PCIE6_RXN PCIE22_TXP H47
D21 PCIE6_RXP PCIE22_TXN U41 DGPU_HOLD_RST#
C21 PCIE6_TXN PCIE22_RXP U40 GPD_7 Reserved [19] DGPU_HOLD_RST#
B23 PCIE6_TXP PCIE22_RXN F46
PCIE7_TXP PCIE21_TXP External pull-up is required. Recommend 100K.
C23 G47 R1818
J24 PCIE7_TXN PCIE21_TXN R44
This strap should sample HIGH. There should NOT be
any on-board device driving it to opposite direction
BOM:DIS Only 100K_5%_4
L24 PCIE7_RXP PCIE21_RXP T43
F24 PCIE7_RXN PCIE21_RXN during strap sampling
G24 PCIE8_RXN
B24 PCIE8_RXP XTAL INPUT +3V_DEEP_SUS
C24 PCIE8_TXN
PCIE8_TXP HIGH -> DIFFERENTIAL
2 OF 13
LOW -> SINGLE ENDED
*PCH_CFL-H_874P
RS229
100K_5%_4

GPD_7

RS212
*10K_5%_4
B US1F B
F9
[30] USB30_TX1- USB31_1_TXN
F7 BB39 LAD0 LAD0 [34,35,38]
[30] USB30_TX1+ USB31_1_TXP GPP_A1/LAD0/ESPI_IO0
D11 AW37
USB3.0 (M/B) [30] USB30_RX1-
C11 USB31_1_RXN GPP_A2/LAD1/ESPI_IO1 AV37
LAD1
LAD2
LAD1 [34,35,38]
LAD2 [34,35,38]
[30] USB30_RX1+ USB31_1_RXP GPP_A3/LAD2/ESPI_IO2 BA38 LAD3 LAD3 [34,35,38]
C3 GPP_A4/LAD3/ESPI_IO3
[37] USB30_TX2- USB31_2_TXN SERIRQ [35,38]
D4 BE38 LFRAME# LFRAME# [34,35,38]
[37] USB30_TX2+ USB31_2_TXP GPP_A5/LFRAME#/ESPI_CS0#
B9 AW35
USB3.0 (Small Board-1) [37] USB30_RX2-
C9 USB31_2_RXN GPP_A6/SERIRQ/ESPI_CS1# BA36
SERIRQ
BOARD_ID8
RS16 8.2K_4 +3V
[37] USB30_RX2+ USB31_2_RXP GPP_A7/PIRQA#/ESPI_ALERT0# EC_RCIN# BOARD_ID8 [13]
BE39
C17 GPP_A0/RCIN#/ESPI_ALERT1# BF38 BOARD_ID7 EC_RCIN# [38] ECS1 18p/50V_4
C16 USB31_6_TXN GPP_A14/SUS_STAT#/ESPI_RESET# BOARD_ID7 [13]
G14 USB31_6_TXP
F14 USB31_6_RXN BB36 CLK_PCI_EC_R RS17 22/F_4
USB31_6_RXP GPP_A9/CLKOUT_LPC0/ESPI_CLK CLK_PCI_LPC_R CLK_24M_KBC [38]
BB34 RS18 22/F_4 CLK_24M_DEBUG [34]
C15 GPP_A10/CLKOUT_LPC1
B15 USB31_5_TXN T48 EXT_SMI#
USB31_5_TXP GPP_K19/SMI# EXT_SMI# [38]
J13 T47 EMI(near PCH)
K13 USB31_5_RXN GPP_K18/NMI# ECS2 18p/50V_4
USB31_5_RXP R84 *22/F_4 CLK_PCI_TPM [35]
TPS49 G12 AH40 Ra
F11 USB31_3_TXP GPP_E6/SATA_DEVSLP2 AH35 GC6FBEN_Q
TPS50 USB31_3_TXN GPP_E5/SATA_DEVSLP1 GC6FBEN_Q [21]
C10 AL48
USB3.0 (Small Board-2) TPS51
TPS52 B10 USB31_3_RXP GPP_E4/SATA_DEVSLP0 AP47
DEVSLP0 DEVSLP0 [34]
Rc EC3
USB31_3_RXN GPP_F9/SATA_DEVSLP7 AN37
GPP_F8/SATA_DEVSLP6 *18P/50V_4
C14 AN46
[31] USB30_TX4+ USB31_4_TXP GPP_F7/SATA_DEVSLP5
B14 AR47 EMI(near PCH)
USB3.0 (Type C) [31] USB30_TX4-
[31] USB30_RX4+
J15
K16
USB31_4_TXN
USB31_4_RXP 6 OF 13
GPP_F6/SATA_DEVSLP4
GPP_F5/SATA_DEVSLP3
AP48
[31] USB30_RX4- USB31_4_RXN BOM : HW TPM need Ra,Rc stuff
*PCH_CFL-H_874P

A [10,12,13,14,16,18,45] +3V_DEEP_SUS A

PROJECT : NLA
Quanta Computer Inc.
Size Document Number Rev
Custom PCH 1/7 (DMI/USB/PCIE) 1A

Date: Monday, April 09, 2018 Sheet 9 of 56

5 4 3 2 1
 5 4 3 2 1

10
HDA Bus(CLG)
[9,12,13,14,16,18,45] +3V_DEEP_SUS
[12,14,36,41] +BAT_RTC
US1D
ACZ_BCLK BD11 BF36
HDA_BCLK/I2S0_SCLK GPP_A12/BM_BUSY#/ISH_GP6/SX_EXIT_HOLDOFF# BOARD_ID9 [13]
BE11 AV32 CLKRUN#
ACZ_BCLK [28] ACZ_SDIN0 ACZ_SDOUT HDA_SDI0/I2S0_RXD GPP_A8/CLKRUN# CLKRUN# [38]
RS20 33_4 BF12
[28] BIT_CLK_AUDIO ACZ_RST# [16] ACZ_SDOUT ACZ_SYNC HDA_SDO/I2S0_TXD LAN_DISABLE
RS24 33_4 CS3 BG13 BF41
[28] ACZ_RST#_AUDIO ACZ_SDOUT HDA_SYNC/I2S0_SFRM GPD11/LANPHYPC TPX23
[28] ACZ_SDOUT_AUDIO RS21 33_4 *10P/50V_4
RS22 33_4 ACZ_SYNC ACZ_RST# BE10 BD42 * TPX24
[28] ACZ_SYNC_AUDIO HDA_RST#/I2S1_SCLK GPD9/SLP_WLAN#
BF10
BE12 HDA_SDI1/I2S1_RXD BB46 DDR4_DRAMRST#
RS23 RS451 BD12 I2S1_TXD/SNDW2_DATA DRAM_RESET# BE32 GPP_B2
* DDR4_DRAMRST# [17,18] For CNVi power control
I2S1_SFRM/SNDW2_CLK GPP_B2/VRALERT# +3V_DEEP_SUS
*1M_4 *1M_4
GPP_B1/GSPI1_CS1#/TIME_SYNC1
BF33 0925
BE29 CNVi_EN#
D AUD_AZACPU_SDO GPP_B0/GSPI0_CS1# CNVi_EN# [34] D
[3] AUD_AZACPU_SDO_R
RS25 30_4 AM2
HDACPU_SDO GPP_K17/ADR_COMPLETE
R47 For CNVi power control 0925
AUD_AZACPU_SDI AN3 AP29 CNVi_EN# RS26 *10K_5%_4
[3] AUD_AZACPU_SDI AUD_AZACPU_SCLK_R AM3 HDACPU_SDI GPP_B11/I2S_MCLK AU3 SYS_PWROK
RS27 30_4
[3] AUD_AZACPU_SCLK HDACPU_SCLK SYS_PWROK +1.2VSUS
CS4 BB47 PCIE_WAKE#
WAKE# SLP_A# PCIE_WAKE# [36,37]
*22P/50V_4 AV18 BE40
+3V_DEEP_SUS GPP_D8/I2S2_SCLK GPD6/SLP_A# TPS1 DDR4_DRAMRST# RS28
AW18 BF40 470/F_4
MODEM_CLKREQ BA17 GPP_D7/I2S2_RXD SLP_LAN# BC28 PCH_SLP_S0ix#
[34] MODEM_CLKREQ CNV_RF_RESET# GPP_D6/I2S2_TXD/MODEM_CLKREQ GPP_B12/SLP_S0# SLP_S3# PCH_SLP_S0ix# [46]
BE16 BF42
[34] CNV_RF_RESET# GPP_D5/I2S2_SFRM/CNV_RF_RESET# GPD4/SLP_S3# SLP_S3#[38]
RS29 2.2K_4 SMB_ME0_CLK BF15 BE42 SLP_S4#
SLP_S4#[38] +3V
RS30 2.2K_4 SMB_ME0_DAT BD16 GPP_D20/DMIC_DATA0/SNDW4_DATA GPD5/SLP_S4# BC42 SLP_S5#
GPP_D19/DMIC_CLK0/SNDW4_CLK GPD10/SLP_S5# TPS3
RS31 2.2K_4 SMB_ME1_CLK AV16 SYS_RESET# RS32 10K_5%_4
RS33 2.2K_4 SMB_ME1_DAT AW15 GPP_D18/DMIC_DATA1/SNDW3_DATA BE45 SUSCLK_32K 9/13 Change net name
GPP_D17/DMIC_CLK1/SNDW3_CLK GPD8/SUSCLK SUSCLK_32K [34]
RS35 2.2K_4 SMB_PCH_CLK BF44 BATLOW#
TPS4
GPP_B2 RS36 10K_5%_4
RS37 2.2K_4 SMB_PCH_DAT GPD0/BATLOW# BE35 SUSACK# RS38 *Short_0402 SUSWARN#
RS39 RF_OFF_PCH
10K_5%_4 RTC_RST# BE47 GPP_A15/SUSACK# BC37 SUSWARN#
RS40 *10K_4 SUSWARN# SRTC_RST# BD46 RTCRST# GPP_A13/SUSWARN#/SUSPWRDNACK
RS41 *10K_4 SUSACK# SRTCRST#
AY42 BG44 RF_OFF_PCH
[38] EC_PWROK PCH_PWROK GPD2/LAN_WAKE# TPS40
RSMRST# BA47 BG42
[38] RSMRST# RSMRST# GPD1/ACPRESENT AC_PRESENT_EC [38]
RS42 1K_5%_4 ACZ_SDOUT BD39 SLP_SUS#_EC
SLP_SUS#_EC [38]
+1.05V
[38] GPIO33_EC SLP_SUS# BE46 DNBSWON#
DSWROK_EC_R GPD3/PWRBTN# SYS_RESET# DNBSWON# [38]
AW41 AU2
DSW_PWROK SYS_RESET# ACZ_SPKR TPS5
SMLALERT# BE25 AW29
[16] SMLALERT# SMB_PCH_CLK GPP_C2/SMBALERT# GPP_B14/SPKR H_PWRGD ACZ_SPKR [16,28]
BE26 AE3
TPS41 SMB_PCH_DAT GPP_C0/SMBCLK CPUPWRGD H_PWRGD [2]
BF26
RSMRST# CS5 *220P/50V_4 SML0ALERT# BF24 GPP_C1/SMBDATA AL3 ITP_PMODE RS43 1K_5%_4 RS46 RS44 RS45
EC_PWROK SMB_ME0_CLK GPP_C5/SML0ALERT# ITP_PMODE JTAGX_PCH +1.05V_DEEP_SUS
CS6 *220P/50V_4 BF25 AH4 *210/F_4 *210/F_4 51_4
SMB_ME0_DAT BE24 GPP_C3/SML0CLK PCH_JTAGX AJ4 JTAG_TMS_PCH JTAGX_PCH[2]
SML1ALERT#_R BD33 GPP_C4/SML0DATA PCH_JTAG_TMS AH3 JTAG_TDO_PCH JTAG_TMS_PCH[2] JTAG_TMS_PCH
BIT_CLK_AUDIO CS7 [12] SML1ALERT#_R SMB_ME1_CLK GPP_B23/SML1ALERT#/PCHHOT# PCH_JTAG_TDO JTAG_TDI_PCH JTAG_TDO_PCH [2] JTAG_TDI_PCH
*33P/50V_4 BF27 AH2
SMB_ME1_DAT BE27 GPP_C6/SML1CLK PCH_JTAG_TDI AJ3 JTAG_TCK_PCH JTAG_TDI_PCH [2] JTAG_TDO_PCH
C GPP_C7/SML1DATA 4 OF 13 PCH_JTAG_TCK JTAG_TCK_PCH C

EMI *PCH_CFL-H_874P SLP_S3# CS73 0.033u/10V_4

SLP_S4# CS74 0.033u/10V_4 RS47 RS48 RS49 RS50
SLP_SUS#_EC CS75 0.033u/10V_4 *100/F_4 *100/F_4 *100/F_4 *51_4

For DS3 Sequence

System PWR_OK(CLG)
SYS_PWROK RS51 *Short_0402 EC_PWROK For DS3 -->Ra
Non-DS3 -->Rb
Rb
RSMRST# RS52 0_5%_4
RS53
10K_1%_4
RS54 *0_4 DSWROK_EC_R
[38] DSWROK_EC
Ra

+3V

+3VS5
2

+3V RS55 4.7K_4

1 6 SMB_PCH_DAT
B [17,18,39] SMB_RUN_DAT B
QS6600B 2N7002KDW
Touch Pad 1K_5%_4 PCIE_WAKE#
XDP For HWPG Sequence RS58
5

RS56 4.7K_4 +3VS5

+3V

[17,18,39] SMB_RUN_CLK
4 3 SMB_PCH_CLK DDR4
QS6600A 2N7002KDW +5VS5 +3V

RS60
*10K_4 RS62 8.25K_1%_4 CLKRUN#
+1.05V

RTC Circuitry(RTC)
RS61
100K_5%_4 HWPG
HWPG [2,38,42,43,44,45]
+BAT_RTC
RS65 For Power Sequence.
15K_5%_4

3
J1001 +1.05V_PWRGD_G2 2
RS64 30mils *SOLDERJUMPER-2 QS1
1 2 RTC_RST# RS67 RSMRST# RS68 10K_5%_4
0_5%_4 2N7002K
100K_5%_4
DSWROK_EC

3
RS66 RS69 100K_5%_4

1
RTC_RST# +1.05V_PWRGD_G1 2 QS3
METR3904-G
20K/F_4
3

1
QS2 2 CS8 RS72
EC_RTC_RST [38]
RTC Power trace width 20mils. CX204 0.1u/16V_4 100K_5%_4
1u/6.3V_4 2N7002K
1

RS71 RS70 10K_5%_4

+3V_RTC_D SRTC_RST#

20K/F_4
CS9 SRTC_RST#
A A
CS10
1u/6.3V_4 1u/6.3V_4
3

QS4 2
EC_SRTC_RST [38]

RTC_RST#
*2N7002K
For Power Sequence, pull high reuest
PROJECT : NLA
RS73 *0_6 SRTC_RST# +3V_DEEP_SUS
Quanta Computer Inc.
1

RS74 *10K_4

BATLOW# RS75 10K_5%_4 Size Document Number R ev

Custom PCH 2/7 (HDA/SMBUS) 1A

Date: Monday, April 09, 2018 Sheet 10 of 56

5 4 3 2 1
 5 4 3 2 1

AR2
AT5
AU4

P48
US1C
CL_CLK
CL_DATA
CL_RST#
PCIE9_RXN
PCIE9_RXP
PCIE9_TXN
G36
F36
C34
D34
PCIE_SATA_RXN9
PCIE_SATA_RXP9
PCIE_SATA_TXN9
[34]
[34]
[34] SSD PCIE x4 (SATA0A) LANE
11
GPP_K8 PCIE9_TXP PCIE_SATA_TXP9 [34]
HSIO MUX PORT V47
V48 GPP_K9 K37
GPP_K10 PCIE10_RXN PCIE_SATA_RXN10 [34]
PCIE1-4 NC W47 J37
GPP_K11 PCIE10_RXP PCIE_SATA_RXP10 [34]
C35
PCIE5 NC L47 PCIE10_TXN B35
PCIE_SATA_TXN10 [34] SSD PCIE x4 LANE
GPP_K0 PCIE10_TXP PCIE_SATA_TXP10 [34]
L46
U48 GPP_K1 F44
D PCIE6 NC U47 GPP_K2 PCIE15_RXN/SATA2_RXN E45
PCIE_RXN6_WLAN [34] D

GPP_K3 PCIE15_RXP/SATA2_RXP PCIE_RXP6_WLAN [34]

PCIE7 NC N48 B40 PCIE_TXN6_WLAN [34] WLAN
N47 GPP_K4 PCIE_15_SATA_2_TXN C40
GPP_K5 PCIE15_TXP/SATA2_TXP PCIE_TXP6_WLAN [34]
PCIE8 NC P47
R46 GPP_K6 L41
GPP_K7 PCIE16_RXN/SATA3_RXN PCIE_RXN7_CARD [37]
PCIE9 M40
PCIE16_RXP/SATA3_RXP PCIE_RXP7_CARD [37]
[34] PCIE_SATA_TXP11 C36 B41 PCIE_TXN7_CARD [37] CardReader
B36 PCIE11_TXP/SATA0A_TXP PCIE16_TXN/SATA3_TXN C41
PCIE10 [34] PCIE_SATA_TXN11 PCIE11_TXN/SATA0A_TXN PCIE16_TXP/SATA3_TXP PCIE_TXP7_CARD [37]
SSD PCIE * 4 F39
PCIE11
SSD PCIE x4 LANE [34] PCIE_SATA_RXP11
[34] PCIE_SATA_RXN11 G38 PCIE11_RXP/SATA0A_RXP K43
PCIE11_RXN/SATA0A_RXN PCIE17_RXN/SATA4_RXN SATA_RXN2 [34] +3V
K44
PCIE17_RXP/SATA4_RXP SATA_RXP2 [34]
PCIE12 AR42 A42
AR48 GPP_F10/SATA_SCLOCK PCIE17_TXN/SATA4_TXN B42
SATA_TXN2 [34] HDD1 (SATA2 6Gb/s)
GPP_F11/SATA_SLOAD PCIE17_TXP/SATA4_TXP SATA_TXP2 [34]
PCIE13 NC AU47 SATAGP0 RS76 10K_5%_4
AU46 GPP_F13/SATA_SDATAOUT0 P41 9/5 update net name
GPP_F12/SATA_SDATAOUT1 PCIE18_RXN/SATA5_RXN R40
PCIE14 LAN C39 PCIE18_RXP/SATA5_RXP C42
[36] PCIE_TXN5_LAN PCIE14_TXN/SATA1B_TXN PCIE18_TXN/SATA5_TXN +3V
D39 D42
PCIE15 Wlan [36] PCIE_TXP5_LAN
D46 PCIE14_TXP/SATA1B_TXP PCIE18_TXP/SATA5_TXP SATA_LED# GPIO35:
LAN [36] PCIE_RXN5_LAN
C47 PCIE14_RXN/SATA1B_RXN AK48 RS77 10K_5%_4
SATA_LED# [34,36]
SSD SATA IF => High
PCIE16 Cardreader [36] PCIE_RXP5_LAN PCIE14_RXP/SATA1B_RXP GPP_E8/SATA_LED# +3V
B38 AH41 SATAGP0
SSD PCIE IF => Low GPIO35 RS78 10K_5%_4
PCIE17 HDD1 PCIE13_TXN/SATA0B_TXN GPP_E0/SATAXPCIE0/SATAGP0
C38 AJ43 GPIO35 GPIO35 [34]
C45 PCIE13_TXP/SATA0B_TXP GPP_E1/SATAXPCIE1/SATAGP1 AK47
PCIE18-20 NC For SSD Det (SATA0A)
C46 PCIE13_RXN/SATA0B_RXN
PCIE13_RXP/SATA0B_RXP
GPP_E2/SATAXPCIE2/SATAGP2
GPP_F0/SATAXPCIE3/SATAGP_3
AN47 BOM:SSD only
AM46
E37 GPP_F1/SATAXPCIE4/SATAGP4 AM43
[34] PCIE_SATA_TXP12 PCIE12_TXP/SATA1A_TXP GPP_F2/SATAXPCIE5/SATAGP5
D38 AM47
SSD PCIE x4 LANE [34] PCIE_SATA_TXN12
[34] PCIE_SATA_RXP12 J41 PCIE12_TXN/SATA1A_TXN GPP_F3/SATAXPCIE6/SATAGP6 AM48
H42 PCIE12_RXP/SATA_1A_RXP GPP_F4/SATAXPCIE7/SATAGP7
[34] PCIE_SATA_RXN12 PCIE12_RXN/SATA1A_RXN AU48 PCH_DPST_PWM
GPP_F21/EDP_BKLTCTL PCH_DPST_PWM [26]
B44 AV46 PCH_LVDS_BLON PCH_LVDS_BLON [26]
C
A44 PCIE20_TXP/SATA7_TXP GPP_F20/EDP_BKLTEN AV44 PCH_DISP_ON C
PCIE20_TXN/SATA7_TXN GPP_F19/EDP_VDDEN PCH_DISP_ON [26]
R37
R35 PCIE20_RXP/SATA7_RXP AD3 PM_THRMTRIP#
PCIE20_RXN/SATA7_RXN THRMTRIP# EC_PECI_PCH PM_THRMTRIP# [2,38]
D43 AF2 RS79 13_1%_4
PCIE19_TXP/SATA6_TXP PECI PM_SYNC_R EC_PECI [2,38]
C44 AF3 RS80 30_4 PM_SYNC [2]
N42 PCIE19_TXN/SATA6_TXN PM_SYNC AG5 CPU_PLTRST# RS81 *Short_0402
M44 PCIE19_RXP/SATA6_RXP PLTRST_CPU# AE2 H_PM_DOWN CPU_PLTRST#R [2] Ra
PCIE19_RXN/SATA6_RXN 3 OF 13 PM_DOWN H_PM_DOWN [2]
RS82 CS11
*PCH_CFL-H_874P *10K_4 *47P/50V_4

Please follow Intel CFL-H DG 571391 to meet Layout Requirment Ca

"12.3.224 MHz Input Clock Routing Guidelines"
XTAL24_IN_R
H_PECI (50ohm)
CS12 27P/50V_4 Trace Length: <0.5 iches
Ra,Ca need placement close to PCH.
33_4 XTAL24_IN
2
1

RS84 RS83 US1G

YS1 GPP_A16 BE33
TPS39 GPP_A16/CLKOUT_48
24MHZ/20ppm 1M_5%_4 RS85 33_4 XTAL24_OUT Y3 CK_XDP_N_R
TPS9
D7 CLKOUT_ITPXDP Y4 CK_XDP_P_R
[2] CLK_DPLL_NSCCLKP * TPS10
C6 CLKOUT_CPUNSSC_P CLKOUT_ITPXDP_P
[2] CLK_DPLL_NSCCLKN *
CLKOUT_CPUNSSC
4
3

B6 *
CPU_PCI_BCLKN [2]
CS13 27P/50V_4 B8 CLKOUT_CPUPCIBCLK A6
[2] CLK_CPU_BCLKP CLKOUT_CPUBCLK_PCLKOUT_CPUPCIBCLK_P CPU_PCI_BCLKP [2] +3V
[2] CLK_CPU_BCLKN C8
XTAL24_OUT_R CLKOUT_CPUBCLK AJ6
XTAL24_OUT U9 CLKOUT_PCIE_N0 AJ7
XTAL24_IN XTAL_OUT CLKOUT_PCIE_P0 TPS11
U10
XTAL_IN AH9 PCIE_CLKREQ_WLAN# RS87 10K_5%_4
* CLK_PCIE_LANN [36]
XCLK_RBIAS T3 CLKOUT_PCIE_N1 AH10
B
Crystal Components with Surrounding 10 mil Wide GND Shield Trace XCLK_BIASREF CLKOUT_PCIE_P1 CLK_PCIE_LANP [36] LAN PCIE_CLKREQ_LAN# RS88 10K_5%_4
B

Break Out:4-10 mil Wide GND Shield Trace RS86 RTC_X1

RTC_X2
BA49
RTCX1 CLKOUT_PCIE_N2
AE14 CLK_PCIE_WLANN [34] PCIE_CLKREQ_CR#
BA48 AE15 CLK_PCIE_WLANP [34] WLAN RS89 10K_5%_4
RTCX2 CLKOUT_PCIE_P2
60.4/F_4

PCIE_CLKREQ0# BF31 AE6 PCIE_CLKREQ_VGA# RS90 10K_5%_4

[36] PCIE_CLKREQ_LAN#
TPS53 PCIE_CLKREQ_LAN#
PCIE_CLKREQ_WLAN#
BE31 GPP_B5/SRCCLKREQ0#
GPP_B6/SRCCLKREQ1#
CLKOUT_PCIE_N3
CLKOUT_PCIE_P3
AE7
CLK_PCIE_CRN [37]
CLK_PCIE_CRP [37] Card Reader BOM:DIS only
[34] PCIE_CLKREQ_WLAN# * AR32
PCIE_CLKREQ_CR# BB30 GPP_B7/SRCCLKREQ2# AC2
[37] PCIE_CLKREQ_CR# PCIE_CLKREQ_VGA# GPP_B8/SRCCLKREQ3# CLKOUT_PCIE_N4 CLK_VGA_N [19] PCIE_CLKREQ_SSD#
BA30 AC3 VGA RS92 10K_5%_4
[19] PCIE_CLKREQ_VGA#
[34] PCIE_CLKREQ_SSD#
PCIE_CLKREQ_SSD#
PCIE_CLKREQ_TBT#
AN29 GPP_B9/SRCCLKREQ4#
GPP_B10/SRCCLKREQ5#
CLKOUT_PCIE_P4 CLK_VGA_P [19]
BOM:SSD only
TPS54 AE47 AB2
GPP_H0/SRCCLKREQ6# CLKOUT_PCIE_N5 CLK_PCIE_SSDN [34]
AC48 AB3 CLK_PCIE_SSDP [34] SSD
AE41 GPP_H1/SRCCLKREQ7# CLKOUT_PCIE_P5
*
AF48 GPP_H2/SRCCLKREQ8# W4
AC41 GPP_H3/SRCCLKREQ9# CLKOUT_PCIE_N6 W3
AC39 GPP_H4/SRCCLKREQ10# CLKOUT_PCIE_P6
RTC Clock 32.768KHz AE39
AB48
GPP_H5/SRCCLKREQ11#
GPP_H6/SRCCLKREQ12# CLKOUT_PCIE_N7
W7
W6
CS14 15P/50V_4 RTC_X1_R RS197 0_5%_4 RTC_X1 AC44 GPP_H7/SRCCLKREQ13# CLKOUT_PCIE_P7
AC43 GPP_H8/SRCCLKREQ14# AC14
GPP_H9/SRCCLKREQ15# CLKOUT_PCIE_N8
1

AC15
YS2 V2 CLKOUT_PCIE_P8
V3 CLKOUT_PCIE_N15 U2
32.768KHZ/20ppm CLKOUT_PCIE_P15 CLKOUT_PCIE_N9 U3
RS99 T2 CLKOUT_PCIE_P9
10M_5%_4 T1 CLKOUT_PCIE_N14 AC9
CLKOUT_PCIE_P14 CLKOUT_PCIE_N10 AC11
CLKOUT_PCIE_P10
2

CS15 18p/50V_4 RTC_X2_R RS198 0_5%_4 RTC_X2 AA1

Y2 CLKOUT_PCIE_N13 AE9
CLKOUT_PCIE_P13 CLKOUT_PCIE_N11 AE11
CLKOUT_PCIE_P11 LS1
AC7
AC6 CLKOUT_PCIE_N12 R6 PULSAR_38P4M_REFCLK_R 2 1
A CLKOUT_PCIE_P12 7 OF 13 CLKIN_XTAL PULSAR_38P4M_REFCLK [34] A
RS197 RS198 for Debug used. BLM15AG121SN1D
9/8 Add CS76,RS454 / RS258 --> LS1
Please do not change to Short pad *PCH_CFL-H_874P L < 5" 4.7pF
5" < L < 9" 2.2pF to 3.3pF
RS454 CS76 9" < L < 10" 1pF to 2.2pF
10K_5%_4 2.2p/50V_4

PROJECT : NLA
Close to PCH Quanta Computer Inc.
Size Document Number Rev
Custom PCH 3/7 (SATA/LPC/CLK) 1A

Date: Monday, April 09, 2018 Sheet 11 of 56

5 4 3 2 1
 5 4 3 2 1

12
US1A
AV29 PLTRST#
PCI_PME# GPP_B13/PLTRST# PLTRST#[19,34,35,36,37,38]
TPS23 BE36
GPP_A11/PME#/SD_VDD2_PW R_EN# [10,14,36,41] +BAT_RTC
* R15 Y47 RS452
R13 RSVD#R15 GPP_K16/GSXCLK Y46
RSVD#R13 GPP_K12/GSXDOUT *100K_5%_4
Y48
GPP_K13/GSXSLOAD W 46
AL37 GPP_K14/GSXDIN AA45
AN35 VSS GPP_K15/GSXSRESET#
TP#AN35
PCH_SPI1_SI AU41 AL47

D
PCH SPI ROM(CLG) PCH_SPI1_SO
PCH_SPI_CS0#
PCH_SPI1_CLK
BA45
AY47
AW 47
SPI0_MOSI
SPI0_MISO
SPI0_CS0#
GPP_E3/CPU_GP0
GPP_E7/CPU_GP1
GPP_B3/CPU_GP2
AM45
BF32
BC33 D
AW 48 SPI0_CLK GPP_B4/CPU_GP3
PCH_SPI_CS0#_R SPI0_CS1# AE44
TPS25 PCH_SPI1_CLK_R PCH_SPI_IO2 AY48 GPP_H18/SML4ALERT# AJ46
TPS26 PCH_SPI1_SI_R PCH_SPI_IO3 BA46 SPI0_IO2 GPP_H17/SML4DATA AE43
TPS27* PCH_SPI1_SO_R SPI_TPM_CS# AT40 SPI0_IO3 GPP_H16/SML4CLK AC47
TPS42 SML3ALERT#
TPS28* BIOS_WP# SPI0_CS2# GPP_H15/SML3ALERT# AD48
TPS29* HOLD# GPP_D1 BE19 GPP_H14/SML3DATA AF47
TPS24
TPS30* *
BF19 GPP_D1/SPI1_CLK/SBK1_BK1 GPP_H13/SML3CLK AB47
* SML2ALERT#
TPM_PIRQ# BF18 GPP_D0/SPI1_CS#/SBK0_BK0 GPP_H12/SML2ALERT# AD47
Place to TOP
* TPS43
[38] HRESET
*
RS109 *0_4 BE18 GPP_D3/SPI1_MOSI/SBK3_BK3
GPP_D2/SPI1_MISO/SBK2_BK2
GPP_H11/SML2DATA
GPP_H10/SML2CLK
AE48
* BC17
PCH_SPI_CS0#_R BD17 GPP_D22/SPI1_IO3 BB44 SM_INTRUDER# RS255 1M_4
[38] PCH_SPI_CS0#_R PCH_SPI1_CLK_R GPP_D21/SPI1_IO2 1 OF 13 INTRUDER# +BAT_RTC
[38] PCH_SPI1_CLK_R PCH_SPI1_SI_R
[38] PCH_SPI1_SI_R *PCH_CFL-H_874P
PCH_SPI1_SO_R
[38] PCH_SPI1_SO_R

PCH_SPI1_CLK RS453 100K_5%_4

9/6 Add RS453 = 100K ohm on PCH_SPI1_CLK RS121 *0_4

+3VS5
RS123 *Short_0402 8/22 Update ROM parts list
+3V_DEEP_SUS

PCH_SPI_CS0# RS125 PCH_SPI_CS0#_R 1

US3
8 +3VSPI
Vender Size P/N
15_1%_4 +3VSPI
PCH_SPI1_CLK RS126 PCH_SPI1_CLK_R 6 CE# VDD
PCH_SPI1_SI RS127
15_1%_4
PCH_SPI1_SI_R 5 SCK MAX 16MB AKE3DZN0Z03 (MX25L12873FM2I-10G)
15_1%_4 RS128 1K_5%_4
PCH_SPI1_SO RS129 PCH_SPI1_SO_R 2 SI 7 HOLD#
15_1%_4
SO HOLD#
RS130 15_1%_4 Winbond 16MB AKE3DF-KN01 (W25Q128JVSIQ)
CS18
C 3 4 PCH_SPI_IO3 C
W P# VSS
0.1u/16V_4 GigaDevice 16MB AKE3DZN0Q02 (GD25B127DSIGR) ESPI FLASH SHARING MODE
CS17
22P/50V_4 W25Q128JVSIQ Socket DFHS08FS023 (DG008000011) This signal has a weak internal pull-down.
AKE3DF-KN01 0 = Master Attached Flash Sharing (MAFS) enabled
CX205 1u/6.3V_4 +3VSPI RS131 1K_5%_4 (Default)
PCH_SPI_IO2 1 = Slave Attached Flash Sharing (SAFS) enabled.
RS132 15_1%_4 BIOS_WP#
Notes:
1. The internal pull-down is disabled after RSMRST#
de-asserts.
2. This signal is in the primary well.

BOOT SELECT STRAP RESERVED RESERVED +3V_DEEP_SUS

This Signal has a weak internal pull-down. External pull-up is required. Recommend 100K if pulled This signal has an internal pull-down.
This field determines the destination of accesses to the up to 3.3V or 75K if pulled up to 1.8V. 0 = Disable IntelR DCI-OOB (Default)
BIOS memory range. Also controllable using Boot BIOS 1 = Enable IntelR DCI-OOB
This strap should sample HIGH. There should NOT be RS208
Destination bit (Bus0, Device31, Function0, offset DCh, any on-board device driving it to opposite direction *100K_4
bit 6). during strap sampling. +3V_DEEP_SUS +3V_DEEP_SUS
+3V_DEEP_SUS SML2ALERT#
HIGH:LPC
LOW: SPI. (Default)
RS200 RS230
R12358 100K_5%_4 *4.7K_4
*4.7K_4
B B
PCH_SPI1_SI
SML1ALERT#_R
GPP_B22 [10] SML1ALERT#_R
[13] GPP_B22
RS232
*20K/F_4

10/5 Del +1.8V_DEEP_SUS PULL HIGHT RESERVED

External pull-up is required. Recommend 100K if pulled
up to 3.3V or 75K if pulled up to 1.8V.
This strap should sample HIGH. There should NOT be
any on-board device driving it to opposite direction
during strap sampling.
ESPI/LPC SELECT STRAP RESERVED RESERVED
HIGH:eSPI Is selected for EC. External pull-up is required. Recommend 100K if pulled External pull-up is required. Recommend 100K if pulled
+3V_DEEP_SUS
LOW: LPC Is selected for EC. (Default) up to 3.3V or 75K if pulled up to 1.8V. up to 3.3V or 75K if pulled up to 1.8V.
This strap should sample HIGH. There should NOT be This strap should sample HIGH. There should NOT be
any on-board device driving it to opposite direction
any on-board device driving it to opposite direction during strap sampling. +3V_DEEP_SUS RS204
during strap sampling. +3V_DEEP_SUS 100K_5%_4

RS203 PCH_SPI_IO3
RS213 100K_5%_4
100K_5%_4
RS205
PCH_SPI_IO2 *100K_5%_4
A 10/5 Del SML3ALERT# A

RS119
*4.7K_4

10/5 Del +1.8V_DEEP_SUS PULL HIGHT PROJECT : NLA

Quanta Computer Inc.
Size Document Number Rev
Custom PCH 4/7 (GPIO/MISC) 1A

Date: Monday, April 09, 2018 Sheet 12 of 56

5 4 3 2 1
 5 4 3 2 1

13
[9,10,12,14,16,18,45] +3V_DEEP_SUS

US1K
GPP_B22 BA26 TPS56
US1M
[12] GPP_B22 BD30 GPP_B22/GSPI1_MOSI BA20 ACC_LED#
CNV_WR_CLK_DN PCI_SERR#_R GPP_B21/GSPI1_MISO GPP_D9/ISH_SPI_CS#/GSPI2_CS0# TPS57
AW 13 BD4 RS135 100_5%_4 AU26 BB20
GPP_G0/SD_CMD CNV_W R_CLKN CNV_WR_CLK_DP CNV_WR_CLK_DN [34] [38] PCI_SERR# GPP_B20/GSPI1_CLK GPP_D10/ISH_SPI_CLK/GSPI2_CLK SPK_ID
BE9 BE3 AW 26 BB16
D BF8 GPP_G1/SD_D0 CNV_W R_CLKP CNV_WR_CLK_DP [34] GPP_B19/GSPI1_CS0# GPP_D11/ISH_SPI_MISO/GP_BSSB_CLK/GSPI2_MISO AN18 BT_OFF * D
BF9 GPP_G2/SD_D1 BB3 CNV_WR_LANE0_DN BE30 GPP_D12/ISH_SPI_MOSI/GP_BSSB_DI/GSPI2_MOSI
GPP_G3/SD_D2 CNV_W R_D0N CNV_WR_LANE0_DP CNV_WR_LANE0_DN [34] GPP_B18/GSPI0_MOSI *
BG8 BB4
CNV_WR_LANE0_DP [34] [17,18] PM_EXTTS#0 RS136 *0_4 PM_EXTTS#0_R BD29 BF14
BE8 GPP_G4/SD_D3 CNV_W R_D0P BA3 CNV_WR_LANE1_DN * TPS55 EXTTS#1 BF29 GPP_B17/GSPI0_MISO GPP_D16/ISH_UART0_CTS#/CNV_W CEN AR18
GPP_G5/SD_CD# CNV_W R_D1N CNV_WR_LANE1_DP CNV_WR_LANE1_DN [34] TP_INTH# GPP_B16/GSPI0_CLK GPP_D15/ISH_UART0_RTS#/GSPI2_CS1#/CNV_W FEN
BD8 BA2 BB26 BF17 Codec Output
GPP_G6/SD_CLK CNV_W R_D1P CNV_WR_LANE1_DP [34] [39] TP_INTH# GPP_B15/GSPI0_CS0# GPP_D14/ISH_UART0_TXD/I2C2_SCL
AV13 BE17 GPP_D11
GPP_G7/SD_W P BC5 CNV_WT_CLK_DN GPP_D13/ISH_UART0_RXD/I2C2_SDA GPIO SPK_ID
CNV_W T_CLKN BB6 CNV_WT_CLK_DP CNV_WT_CLK_DN [34] BB24 Hi : SABLE
AP3 CNV_W T_CLKP CNV_WT_CLK_DP [34] BE23 GPP_C9/UART0_TXD Definition Low : VECO
AP2 GPP_I11/M2_SKT2_CFG0 BE6 CNV_WT_LANE0_DN AP24 GPP_C8/UART0_RXD
AN4 GPP_I12/M2_SKT2_CFG1 CNV_W T_D0N BD7 CNV_WT_LANE0_DP CNV_WT_LANE0_DN [34] BA24 GPP_C11/UART0_CTS#
AM7 GPP_I13/M2_SKT2_CFG2 CNV_W T_D0P BG6 CNV_WT_LANE1_DN CNV_WT_LANE0_DP [34] GPP_C10/UART0_RTS# AG45
GPP_I14/M2_SKT2_CFG3 CNV_W T_D1N BF6 CNV_WT_LANE1_DP CNV_WT_LANE1_DN [34] BD21 GPP_H20/ISH_I2C0_SCL AH46
CNV_W T_D1P BA1 CNV_WT_RCOMP CNV_WT_LANE1_DP [34] AW 24 GPP_C15/UART1_CTS#/ISH_UART1_CTS# GPP_H19/ISH_I2C0_SDA
CNV_W T_RCOMP AP21 GPP_C14/UART1_RTS#/ISH_UART1_RTS#
For C10 AV6 B12 PCIECOMP_N AU24 GPP_C13/UART1_TXD/ISH_UART1_TXD AH47
RS139 100_1%_4
CPU_VCCIO_PWR_GATE# AY3 GPP_J0/CNV_PA_BLANKING PCIE_RCOMPN A13 PCIECOMP_P RS140 GPP_C12/UART1_RXD/ISH_UART1_RXD GPP_H22/ISH_I2C1_SCL AH48
AR13 GPP_J1/CPU_VCCIO_PW R_GATE# PCIE_RCOMPP BE5 SD_RCOMP_1P8 RS141 200_1%_4 150_1%_4 SIO_EXT_SCI# AV21 GPP_H21/ISH_I2C1_SDA
GPP_J11/A4W P_PRESENT SD_RCOMP_1P8 SD_RCOMP_3P3 RS142 [38] SIO_EXT_SCI# ACCEL_INTA# GPP_C23/UART2_CTS#
AV7 BE4 200_1%_4 TPS44 AW 21
AW 3 GPP_J10 SD_RCOMP_3P3 BD1 TPS37 UART2_TXD BE20 GPP_C22/UART2_RTS# AV34 BOARD_ID6
AT10 GPP_J_2 GPPJ_RCOMP_1P81 BE1 RS143 200_1%_4 TPS38 * UART2_RXD BD20 GPP_C21/UART2_TXD GPP_A23/ISH_GP5 AW 32 BOARD_ID5
CNV_BRI_DT AV4 GPP_J_3 GPPJ_RCOMP_1P82 BE2 GPP_C20/UART2_RXD GPP_A22/ISH_GP4 BA33 BOARD_ID4
[16,34] CNV_BRI_DT *
CNV_BRI_RSP AY2 GPP_J_4_CNV_BRI_DT_UART0_RTSB GPPJ_RCOMP_1P83 BE21 GPP_A21/ISH_GP3 BE34 BOARD_ID3
[34] CNV_BRI_RSP [39] I2C1_SCL *
CNV_RGI_DT BA4 GPP_J5/CNV_BRI_RSP/UART0_RXD Y35 BF21 GPP_C19/I2C1_SCL GPP_A20/ISH_GP2 BD34 BOARD_ID2
[16,34] CNV_RGI_DT CNV_RGI_RSP AV3 GPP_J6/CNV_RGI_DT/UART0_TXD RSVD2 [39] I2C1_SDA GPP_C18/I2C1_SDA GPP_A19/ISH_GP1 BOARD_ID1
Y36 BC22 BF35
[34] CNV_RGI_RSP GPP_J7/CNV_RGI_RSP/UART0_CTS# RSVD3 GPP_C17/I2C0_SCL GPP_A18/ISH_GP0 BOARD_ID0
AW 2 BF23 BD38
GPP_J9 AU9 GPP_J8/CNV_MFUART2_RXD BC1 GPP_C16/I2C0_SDA GPP_A17/SD_VDD1_PW R_EN#/ISH_GP7
[16] GPP_J9 GPP_J9/CNV_MFUART2_TXD RSVD#BC1 AL35 BE15
TP TPS34 GPP_D4/ISH_I2C2_SDA/I2C3_SDA/SBK4_BK4
13 OF 13 +1.8V_DEEP_SUS +3V_DEEP_SUS BE14 11 OF 13
For C10 GPP_D23/ISH_I2C2_SCL/I2C3_SCL +3V_DEEP_SUS
*PCH_CFL-H_874P *
C *PCH_CFL-H_874P C
+1.8V_DEEP_SUS
+1.8V_DEEP_SUS ACC_LED# RS144 10K_5%_4
R12465
CNV_BRI_RSP RS456 20K_4 BT_OFF RS145 10K_5%_4
100K/F_4
R12464
CNV_RGI_RSP RS457 20K_4 SPK_ID RS148 10K_5%_4
100K/F_4

2
Q9078 DMG1012T-7
TCH_PNL_INT#_R RS151 10K_5%_4
CPU_VCCIO_PWR_GATE# 1 3 PWR_GATE#
PWR_GATE# [45] SIO_EXT_SCI# RS154 10K_5%_4

+3V_DEEP_SUS UART2_TXD RS137 49.9K/F_4

RS455
UART2_RXD RS138 49.9K/F_4
*2.2K_4
R222 *10K_4 BOARD_ID0 R223 10K_4

R224
G1 *10K_4 BOARD_ID1 R225
G0 10K_4
NLA Board ID
R228 *10K_4 BOARD_ID2 R229 10K_4

R231 10K_4 BOARD_ID3 R232 *10K_4

Model BOARD_ID[9] BOARD_ID[8] BOARD_ID[7] Board ID [4] Board ID [3] BOARD_ID[2:1] BOARD_ID[6:5:0]
BOARD_ID4 ID9 ID8 ID7 ID4 ID3 ID2;ID1 ID6:ID5:ID0
R233 10K_4 R234 *10K_4
BOARD_ID5 0 : Normal CAM 0 0 0 ：NL5 C
R235 *10K_4 R236 10K_4
Definition 1 : IR CAM 0 : Normal CPU 0 : LG Customer Reserve Reserve 00 : Reserve
BOARD_ID6 Default = 0 Default = 0 0 0 1 ：NL5 T +3V
R237 10K_4 R238 *10K_4 1: Turbo CPU 1: None LG Customer 01 : Reserve
BOARD_ID7 0 1 0 ：NL5 U PCI_SERR#
B
R239 *10K_4 R240 10K_4 10 : N17P-G1 (150W) RS165 10K_5%_4
B
BOARD_ID8 0 1 1 ：NL A TCH_PNL_INT#_R
R241 10K_4 R242 *10K_4 11 : N17P-G0 (120W) RS168 10K_5%_4
BOARD_ID9 1 0 0 ：NL9 U
R124572 10K_4 R124571 *10K_4
BOARD_ID7
BOARD_ID8 BOARD_ID7 [9] +3V
US1E
BOARD_ID9 BOARD_ID8 [9] AL13 GPP_I6 / DDPB_CTRLDATA:
BOARD_ID9 [10] GPP_I5/DDPB_CTRLCLK
TypeC1_DDI1_HPD_Q AT6 GPP_I6/DDPB_CTRLDATA
AR8
AN13
DDPC_CTRLDATA
This signal has a weak internal pull-down.
Reserve EDP_HPD opposites circuit! TPS46 DP_HPD_PCH_Q AN10 GPP_I0/DDPB_HPD0/DISP_MISC0 GPP_I7/DDPC_CTRLCLK AL10 SDVO_DATA 0 = Port B is not detected. (Default)
GPP_I1/DDPC_HPD1/DISP_MISC1 GPP_I8/DDPC_CTRLDATA
+3V
HDMI_HPD_Q AP9
GPP_I2/DPPD_HPD2/DISP_MISC2 GPP_I9/DDPD_CTRLCLK
AL9
DDPD_CTRLDATA
1 = Port B is detected. SDVO_DATA RS172 *2.2K_4
* AL15 AR3
GPP_I3/DPPE_HPD3/DISP_MISC3 GPP_I10/DDPD_CTRLDATA AN40
GPP_F23/DDPF_CTRLDATA AT49 GPP_I8 / DDPC_CTRLDATA:
GPP_F22/DDPF_CTRLCLK
AP41 SKTOCC_N_R
This signal has a weak internal Pull-down. DDPC_CTRLDATA RS175 2.2K_4
RS177
*10K/F_4 [26] CPU_EDP_HPD
CPU_EDP_HPD AN6 GPP_F14/EXT_PW R_GATE#/PS_ON# SKTOCC_N_R [2] 0 = Port C is not detected. (Default)
GPP_I4/EDP_HPD/DISP_MISC4
HPD0 ---> mDP GPP_K23/IMGCLKOUT1
M45 1 = Port C is detected. DDPD_CTRLDATA
L48 RS178 *2.2K_4
CPU_EDP_HPD HPD1 ---> Type-C DP GPP_K22/IMGCLKOUT0
GPP_K21
T45
GPP_I10 /DDPD_CTRLDATA:
T46
HPD2 ---> HDMI GPP_K20 AJ47 This signal has a weak internal pull-down.
RS179 5 OF 13 GPP_H23/TIME_SYNC0
100K_5%_4 *PCH_CFL-H_874P 0 = Port D is not detected. (Default)
+3V
1 = Port D is detected.

+3V
A A
RS459
8/3 QS5 swpa 1,3 pin
2

1M_5%_4

RS458 *Short_0402 TypeC1_DDI1_HPD_Q RS461

[31,32] TypeC1_DDI1_HPD 3 1
1M_5%_4
PROJECT : NLA

2
QS5
2N7002K
[21,27] HDMI_HPD 3 1
HDMI_HPD_Q
Quanta Computer Inc.
TypeC1_DDI1_HPD_R RS259 *0_5%_4 TypeC1_DDI1_HPD_Q
[31] TypeC1_DDI1_HPD_R QS7005 Size Document Number Rev
2N7002K Custom PCH 5/7 (GPIO) 1A

Date: Monday, April 09, 2018 Sheet 13 of 56

5 4 3 2 1
 5 4 3 2 1

VCCPRIM_3P3
14
Without CNVi = Icc = 0mA
With CNVi = 582mA
Chipset will use this power rail to internal
LDO and output 1.24V for CNVi used.
**Layout Note: +VCCPRIM_1P5 total :5.42A**
+1.05V_DEEP_SUS
+VCCPRIM_3P3
D US1H D
AA22 AW9
AA23 VCCPRIM_1P051 VCCPRIM_3P32
CS19 AB20 VCCPRIM_1P052 BF47
VCCPRIM_1P053 DCPRTC1 DCPRTC
1u/6.3V_4 AB22 BG47 CS20 1u/6.3V_4
AB23 VCCPRIM_1P054 DCPRTC2
AB27 VCCPRIM_1P055 V23
VCCPRIM_1P056 VCCPRIM_3P35 +VCCPRIM_3P3
AB28
AB30 VCCPRIM_1P057 AN44 +VCCSPI RS185 *Short_0402
VCCPRIM_1P058 VCCSPI +3V_DEEP_SUS
AD20
AD23 VCCPRIM_1P059 BC49 +VCCRTC RS187 *Short_0402
VCCPRIM_1P0510 VCCRTC1 +BAT_RTC
AD27 BD49
AD28 VCCPRIM_1P0511 VCCRTC2 CS21 1u/6.3V_4
AD30 VCCPRIM_1P0512 AN21 CS22 0.1u/16V_4
AF23 VCCPRIM_1P0513 VCCPGPPG_3P3
AF27 VCCPRIM_1P0516 AY8 +VCCPRIM_3P33 RS188 *Short_0402
+1.05V_DEEP_SUS VCCPRIM_1P0517 VCCPRIM_3P33 +3V_DEEP_SUS
AF30 BB7 CS23 1u/6.3V_4
VCCPRIM_1P0518 VCCPRIM_3P34 CS47 4.7U/6.3V_4
U26 AC35 SI : Add CS47
U29 VCCPRIM_1P0523 VCCPGPPHK1 AC36
CS24 VCCPRIM_1P0524 VCCPGPPHK2 +3V_DEEP_SUS
CS26 V25 AE35 CS25 0.1u/16V_4
22U/6.3V_6 1u/6.3V_4 V27 VCCPRIM_1P0525 VCCPGPPEF1 AE36 CS27 0.1u/16V_4
V28 VCCPRIM_1P0526 VCCPGPPEF2
V30 VCCPRIM_1P0527 AN24 +VCCP RS228
VCCPRIM_1P0528 VCCPGPPD +3V_DEEP_SUS
V31 AN26 *Short_0402
VCCPRIM_1P0529 VCCPGPPBC1 AP26
AD31 VCCPGPPBC2
+1.05V_DEEP_SUS VCCPRIM_1P0514 +VCCPRIM_3P3 +3V_DEEP_SUS
AN32
AE17 VCCPGPPA
VCCPRIM_1P0515
RS217 *Short_0402 +VCCDUSB W22 AT44
+1.05V_DEEP_SUS VCCDUSB_1P051 VCCPRIM_3P31 +VCCPRIM_3P3
W23 RS462 *Short_0603
8/4 Add CS38/CS39/CS40/CS41/CS42 VCCDUSB_1P052 BE48 +VCCDSW 3P3 RS190
VCCDSW_3P31 +3VS5
RS218 *0_5%_4 +VCCDSW BG45 BE49 CS28 0.1u/16V_4 *Short_0402
+1.05V_DEEP_SUS VCCDSW_1P051 VCCDSW_3P32 +V3.3DX_1.5DX_ADO +3V
1u/6.3V_4 CS38 BG46
VCCDSW_1P052 BB14
+VCCPRIM_MPHY W31 VCCHDA +V3.3DX_1.5DX_ADO
+1.05V_DEEP_SUS RS257 *Short_0402
1u/6.3V_4 CS39 VCCPRIM_MPHY_1P05 AG19 RS216 *0_5%_4
D1 VCCPRIM_1P83 AG20 +VCCPRIM_1P8A RS237
+1.05V_DEEP_SUS VCCPRIM_1P0521 VCCPRIM_1P84 +1.8V_DEEP_SUS +3V_DEEP_SUS
1u/6.3V_4 CS40 E1 AN15 CS29 4.7U/6.3V_4 *Short_0402
VCCPRIM_1P0522 VCCPRIM_1P85 AR15
C
RS219 *Short_0402 +VCCAMPHYPLL C49 VCCPRIM_1P86 BB11 CS30 1u/6.3V_4 C
+1.05V_DEEP_SUS VCCAMPHYPLL_1P051 VCCPRIM_1P87
1u/6.3V_4 CS31 D49 RS236 *Short_0603
*22U/6.3V_6 CS41 E49 VCCAMPHYPLL_1P052 AF19 +VCCPRIM_1P8B RS238 *0_5%_4 +VCCPRIM_1P8A
VCCAMPHYPLL_1P053 VCCPRIM_1P81 AF20 CS37 4.7U/6.3V_4
RS224 *Short_0402 +VCCA_XTAL P2 VCCPRIM_1P82
+1.05V_DEEP_SUS VCCA_XTAL_1P051
*22U/6.3V_6 CS42 P3 AG31
RS225 *Short_0402 +VCCA_SRC W19 VCCA_XTAL_1P052 VCCPRIM_1P0520 AF31 +VCCPRIM_1P0520 RS239
+1.05V_DEEP_SUS VCCA_SRC_1P051 VCCPRIM_1P0519 +1.05V_DEEP_SUS
W20 *Short_0402
VCCA_SRC_1P052 AK22 +VCCDPHY_1P24_P1 CS43 1u/6.3V_4
C1 VCCPRIM_1P241 AK23
C2 VCCAPLL_1P054
VCCAPLL_1P055
VCCPRIM_1P242
RS260 *Short_0402
VCCPRIM_1P8
AJ22 +VCCDPHY_1P24_P2
+1.05V_DEEP_SUS RS226 *Short_0402 SI : Add CS46 +VCCA_BCLK V19
VCCA_BCLK_1P05
VCCDPHY_1P241
VCCDPHY_1P242
AJ23 RS261
CS44
*0_5%_4
1u/6.3V_4
Without CNVi = Icc = 0mA
BG5 +VCCDPHY_1P24_P3
+1.05V_DEEP_SUS RS227 *Short_0402
1U/6.3V_4 CS46
+VCCAPLL B1
VCCAPLL_1P051
VCCDPHY_1P243
CS45 4.7U/6.3V_4
With CNVi = 582mA
B2 K47
1u/6.3V_4 CS32 B3 VCCAPLL_1P052 VCCMPHY_SENSE K46 TPS35 Chipset will use this power rail to internal
TPS36
VCCAPLL_1P053 8 OF 13 VSSMPHY_SENSE
*PCH_CFL-H_874P
* LDO and output 1.24V for CNVi used.
*

When you use external Power to provide 1.24V to CNVi,

Please connect here

Please follow below table to check Layout

B B

+3VS5 +3V_DEEP_SUS

for DS3
CS33
RS196 1u/6.3V_4 US4
100K_5%_4
5 1
IN#2 OUT
4 2
IN#1 GND
3 CS34
[31,38,44] SLP_SUS_ON EN
0.1u/16V_4

CS35 G5245AT11U
*10P/50V_4

A [10,12,36,41] +BAT_RTC A
[9,10,12,13,16,18,45] +3V_DEEP_SUS

PROJECT : NLA
Quanta Computer Inc.
Size Document Number R ev
Custom PCH 6/7 (POWER) 1A

Date: Monday, April 09, 2018 Sheet 14 of 56

5 4 3 2 1
 5 4 3 2 1

15
US1I US1L
A2 AL12 BG3 M24 US1J
D A28 VSS_1 VSS_73 AL17 BG33 VSS_145 VSS_196 M32 Y14 D
A3 VSS_2 VSS_74 AL21 BG37 VSS_146 VSS_197 M34 RSVD#Y14 Y15
A33 VSS_3 VSS_75 AL24 BG4 VSS_147 VSS_198 M49 RSVD#Y15
A37 VSS_4 VSS_76 AL26 BG48 VSS_148 VSS_199 M5 U37
A4 VSS_5 VSS_77 AL29 C12 VSS_149 VSS_200 N12 RSVD#U37 U35
A45 VSS_6 VSS_78 AL33 C25 VSS_150 VSS_201 N16 RSVD#U35
A46 VSS_7 VSS_79 AL38 C30 VSS_151 VSS_202 N34 N32
A47 VSS_8 VSS_80 AM1 C4 VSS_152 VSS_203 N35 RSVD#N32 R32
A48 VSS_9 VSS_81 AM18 C48 VSS_153 VSS_204 N37 RSVD#R32
A5 VSS_10 VSS_82 AM32 C5 VSS_154 VSS_205 N38 AH15
A8 VSS_11 VSS_83 AM49 D12 VSS_155 VSS_206 P26 RSVD#AH15 AH14
AA19 VSS_12 VSS_84 AN12 D16 VSS_156 VSS_207 P29 RSVD#AH14
AA20 VSS_13 VSS_85 AN16 D17 VSS_157 VSS_208 P4
AA25 VSS_14 VSS_86 AN34 D30 VSS_158 VSS_209 P46 10 OF 13 AL2
VSS_15 VSS_87 VSS_159 VSS_210 PREQ# XDP_PREQ# [2]
AA27 AN38 D33 R12 AM5
VSS_16 VSS_88 VSS_160 VSS_211 PRDY# XDP_PRDY# [2]
AA28 AP4 D8 R16 AM4
VSS_17 VSS_89 VSS_161 VSS_212 CPU_TRST# XDP_TRST#[2]
AA30 AP46 E10 R26 AK3 PCH_2_CPU_TRIGGER_RRS184 30_4 PCH_2_CPU_TRIGGER
VSS_18 VSS_90 VSS_162 VSS_213 TRIGGER_OUT CPU_2_PCH_TRIGGER PCH_2_CPU_TRIGGER [8]
AA31 AR12 E13 R29 AK2
AA49 VSS_19 VSS_91 AR16 E15 VSS_163 VSS_214 R3 TRIGGER_IN CPU_2_PCH_TRIGGER [8]
AA5 VSS_20 VSS_92 AR34 E17 VSS_164 VSS_215 R34 *PCH_CFL-H_874P
AB19 VSS_21 VSS_93 AR38 E19 VSS_165 VSS_216 R38
AB25 VSS_22 VSS_94 AT1 E22 VSS_166 VSS_217 R4
AB31 VSS_23 VSS_95 AT16 E24 VSS_167 VSS_218 T17
AC12 VSS_24 VSS_96 AT18 E26 VSS_168 VSS_219 T18
AC17 VSS_25 VSS_97 AT21 E31 VSS_169 VSS_220 T32
AC33 VSS_26 VSS_98 AT24 E33 VSS_170 VSS_221 T4
AC38 VSS_27 VSS_99 AT26 E35 VSS_171 VSS_222 T49
AC4 VSS_28 VSS_100 AT29 E40 VSS_172 VSS_223 T5
AC46 VSS_29 VSS_101 AT32 E42 VSS_173 VSS_224 T7
AD1 VSS_30 VSS_102 AT34 E8 VSS_174 VSS_225 U12
C AD19 VSS_31 VSS_103 AT45 F41 VSS_175 VSS_226 U15 C
AD2 VSS_32 VSS_104 AV11 F43 VSS_176 VSS_227 U17
AD22 VSS_33 VSS_105 AV39 F47 VSS_177 VSS_228 U21
AD25 VSS_34 VSS_106 AW 10 G44 VSS_178 VSS_229 U24
AD49 VSS_35 VSS_107 AW 4 G6 VSS_179 VSS_230 U33
AE12 VSS_36 VSS_108 AW 40 H8 VSS_180 VSS_231 U38
AE33 VSS_37 VSS_109 AW 46 J10 VSS_181 VSS_232 V20
AE38 VSS_38 VSS_110 B47 J26 VSS_182 VSS_233 V22
AE4 VSS_39 VSS_111 B48 J29 VSS_183 VSS_234 V4
AE46 VSS_40 VSS_112 B49 J4 VSS_184 VSS_235 V46
AF22 VSS_41 VSS_113 BA12 J40 VSS_185 VSS_236 W 25
AF25 VSS_42 VSS_114 BA14 J46 VSS_186 VSS_237 W 27
AF28 VSS_43 VSS_115 BA44 J47 VSS_187 VSS_238 W 28
AG1 VSS_44 VSS_116 BA5 J48 VSS_188 VSS_239 W 30
AG22 VSS_45 VSS_117 BA6 J9 VSS_189 VSS_240 Y10
AG23 VSS_46 VSS_118 BB41 K11 VSS_190 VSS_241 Y12
AG25 VSS_47 VSS_119 BB43 K39 VSS_191 VSS_242 Y17
AG27 VSS_48 VSS_120 BB9 M16 VSS_192 VSS_243 Y33
AG28 VSS_49 VSS_121 BC10 M18 VSS_193 VSS_244 Y38
AG30 VSS_50 VSS_122 BC13 M21 VSS_194 VSS_245 Y9
AG49 VSS_51 VSS_123 BC15 VSS_195 VSS_246
AH12 VSS_52 VSS_124 BC19 12 OF 13
AH17 VSS_53 VSS_125 BC24 *PCH_CFL-H_874P
AH33 VSS_54 VSS_126 BC26
AH38 VSS_55 VSS_127 BC31
AJ19 VSS_56 VSS_128 BC35
AJ20 VSS_57 VSS_129 BC40
AJ25 VSS_58 VSS_130 BC45
AJ27 VSS_59 VSS_131 BC8
AJ28 VSS_60 VSS_132 BD43
B AJ30 VSS_61 VSS_133 BE44 B
AJ31 VSS_62 VSS_134 BF1
AK19 VSS_63 VSS_135 BF2
AK20 VSS_64 VSS_136 BF3
AK25 VSS_65 VSS_137 BF48
AK27 VSS_66 VSS_138 BF49
AK28 VSS_67 VSS_139 BG17
AK30 VSS_68 VSS_140 BG2
AK31 VSS_69 VSS_141 BG22
AK4 VSS_70 VSS_142 BG25
AK46 VSS_71 9 OF VSS_143
13 BG28
VSS_72 VSS_144
*PCH_CFL-H_874P

A A

PROJECT : NLA
Quanta Computer Inc.
Size Document Number Rev
Custom PCH 7/7 (GND) 1A

Date:
Monday, April 09, 2018 Sheet 15 of 56
5 4 3 2 1
 5 4 3 2 1

TOP SWAP OVERRIDE STRAP

The signal has a weak internal pull-down.
0 = Disable “ Top Swap” mode. ( Def ault)
1 = Enable “ Top Swap” mode. This i nver ts an addr ess
+3V
D D
RS240
TLS CONFIDENTIALITY ENABLED
This signal has a weak internal pull-down.
0 = Disable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (no confidentiality). (Default)
16
1 = Enable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (with confidentiality). Must be
pulled up to support Intel AMT with TLS.
+3V_DEEP_SUS

*150K/F_4

[10,28] ACZ_SPKR ACZ_SPKR RS241

*4.7K_4

[10] SMLALERT# SMLALERT#

RS243
*20K/F_4

This signal has a weak internal pull-down.

NO REBOOT IF SAMPLED HIGH 0 = Enable security measures defined in the Flash
The signal has a weak internal pull-down. Descriptor. (Default)
0 = Disable “ No Reboot” mode. ( Def ault) 1 = Disable Flash Descriptor Security (override). This
1 = Enable “ No Reboot” mode ( PCH wil l di sable t he strap should only be asserted high using external
TCO Timer system reboot feature). This function is Pull-up in manufacturing/debug environments
ONLY. +3V_DEEP_SUS
useful when running ITP/XDP.
C C
RS133
*1K_4

ACZ_SDOUT
[10] ACZ_SDOUT

RS134
*1K_4

B B

GPP_J9 1.8V VCCPSPI:

XTAL Frequency Select The signal has a weak internal pull-down
M.2 CNVi Mode Select This signal has a weak internal pull-down. 0 = VCCSPI is connected to 3.3V rail
An external pull-up or pull-down is required. An external pull-up is required on this strap since 38.4 1 = VCCSPI is connected to 1.8V rail
0 = Integrated CNVi enable. +1.8V_DEEP_SUS MHz XTAL is not supported on the PCH. +1.8V_DEEP_SUS Note: If VCCSPI is connected to 1.8V rail, this pin
1 = Integrated CNVi disable. 0 = 38.4 XTAL frequency selected. (Default) strap must be a ‘ 1’ for t he pr oper f unct i onali ty
1 = 24MHz XTAL frequency selected. of the SPI (Flash) I/Os +1.8V_DEEP_SUS

RS245 RS246
10K_4 10K_4
RS247
*10K_4
CNV_RGI_DT CNV_BRI_DT
[13,34] CNV_RGI_DT [13,34] CNV_BRI_DT
GPP_J9
[13] GPP_J9
RS248 RS249
*10K_4 *10K_4
RS211
10K_5%_4

A A

PROJECT : NLA
Quanta Computer Inc.
Size Document Number Rev
APS(NA) 1A

Date: Monday, April 09, 2018 Sheet 16 of 56

5 4 3 2 1
 5 4 3 2 1

17
M_A_DQ[63:0] [4]
JDIM1A +1.2VSUS
[4] M_A_A[13:0] M_A_A0 M_A_DQ0 JDIM1B
144 8
M_A_A1 133 A0 DQ0 7 M_A_DQ4 111
M_A_A2 132 A1 DQ1 20 M_A_DQ3 112 VDD1
M_A_A3 131 A2 DQ2 21 M_A_DQ6 2.48A 117 VDD2
M_A_A4 128 A3 DQ3 4 M_A_DQ1 118 VDD3 255
M_A_A5 126 A4 DQ4 3 M_A_DQ5 123 VDD4 VDDSPD +3V
M_A_A6 127 A5 DQ5 16 M_A_DQ2 124 VDD5
M_A_A7 122 A6 DQ6 17 M_A_DQ7 129 VDD6 257
M_A_A8 A7 DQ7 M_A_DQ9 VDD7 VPP1 +2.5V_SUS
125 28 130 259
M_A_A9 121 A8 DQ8 29 M_A_DQ12 135 VDD8 VPP2
M_A_A10 146 A9 DQ9 41 M_A_DQ10 136 VDD9
D M_A_A11 120 A10/AP DQ10 42 M_A_DQ14 141 VDD10 258 D
M_A_A12 A11 DQ11 M_A_DQ8 VDD11 VTT DDR_VTT
119 24 142
M_A_A13 158 A12 DQ12 25 M_A_DQ13 147 VDD12
151 A13 DQ13 38 M_A_DQ11 148 VDD13
[4] M_A_WE# A14/W E# DQ14 M_A_DQ15 VDD14 +SMDDR_VREF_DQ0 R285 +SMDDR_VREF_DIMM
156 37 153 164 *0_6/S
[4] M_A_CAS# A15/CAS# DQ15 M_A_DQ17 VDD15 VREFCA
152 50 154
[4] M_A_RAS# A16/RAS# DQ16 M_A_DQ21 VDD16
49 159
TP62 162 DQ17 62 M_A_DQ18 160 VDD17
TP61 165 CS2#/C0/NC DQ18 63 M_A_DQ22 163 VDD18
CS3#/C1/NC DQ19 46 M_A_DQ16 VDD19
1002 modify DQ20 45 M_A_DQ20

DDR4 SODIMM 260 PIN

114 DQ21 58 M_A_DQ19 1 2
[4] M_A_ACT# 143 ACT# DQ22 59 M_A_DQ23 5 VSS1 VSS48 6
+1.2VSUS R286 240_4
[4] M_A_PARITY 116 PARITY DQ23 70 M_A_DQ25 9 VSS2 VSS49 10
PM_EXTTS#0 [4] M_A_ALERT# 134 ALERT# DQ24 71 M_A_DQ29 15 VSS3 VSS50 14
[13,18] PM_EXTTS#0 EVENT# DQ25 M_A_DQ31 VSS4 VSS51
108 83 19 18
[10,18] DDR4_DRAMRST# RESET# DQ26 M_A_DQ27 VSS5 VSS52

DDR4 SODIMM 260 PIN

84 23 22
C259 *0.1U/16V_4 DQ27 66 M_A_DQ24 27 VSS6 VSS53 26 +2.5V_SUS
DQ28 67 M_A_DQ28 31 VSS7 VSS54 30
DQ29 79 M_A_DQ30 35 VSS8 VSS55 36 C260 1U/6.3V_4
DQ30 80 M_A_DQ26 39 VSS9 VSS56 40
DQ31 174 M_A_DQ33 43 VSS10 VSS57 44 C261 1U/6.3V_4
DQ32 173 M_A_DQ37 47 VSS11 VSS58 48
DQ33 187 M_A_DQ34 51 VSS12 VSS59 52 C262 10U/6.3V_4
DQ34 186 M_A_DQ39 57 VSS13 VSS60 56
DQ35 170 M_A_DQ32 61 VSS14 VSS61 60 C263 10U/6.3V_4
DQ36 169 M_A_DQ36 65 VSS15 VSS62 64
DQ37 M_A_DQ35 VSS16 VSS63

(260P)
183 69 68
DQ38 182 M_A_DQ38 73 VSS17 VSS64 72 +1.2VSUS
DQ39 195 M_A_DQ45 77 VSS18 VSS65 78
C 150 DQ40 194 M_A_DQ44 81 VSS19 VSS66 82 C264 10U/6.3V_4 C
[4] M_A_BA0 BA0 DQ41 M_A_DQ47 VSS20 VSS67
145 207 85 86
[4] M_A_BA1 BA1 DQ42 M_A_DQ42 VSS21 VSS68
115 208 89 90 C265 10U/6.3V_4
[4] M_A_BG#0 BG0 DQ43 VSS22 VSS69

(260P)
+3V 113 191 M_A_DQ40 93 94
[4] M_A_BG#1 BG1 DQ44 M_A_DQ41 VSS23 VSS70
190 99 98 C266 10U/6.3V_4
149 DQ45 203 M_A_DQ46 103 VSS24 VSS71 102
[4] M_A_CS#0 CS0# DQ46 M_A_DQ43 VSS25 VSS72
157 204 107 106 C267 10U/6.3V_4
[4] M_A_CS#1 CS1# DQ47 M_A_DQ54 VSS26 VSS73
109 216 167 168
[4] M_A_CKE0 CKE0 DQ48 M_A_DQ50 VSS27 VSS74
110 215 171 172 C268 10U/6.3V_4
[4] M_A_CKE1 CKE1 DQ49 M_A_DQ55 VSS28 VSS75
228 175 176
R287 R288 R289 137 DQ50 229 M_A_DQ49 181 VSS29 VSS76 180 C269 10U/6.3V_4
[4] M_A_CLKP0 CK0 DQ51 M_A_DQ52 VSS30 VSS77
*10K_4 *10K_4 *10K_4 139 211 185 184
[4] M_A_CLKN0 CK0# DQ52 M_A_DQ48 VSS31 VSS78
138 212 189 188 C270 10U/6.3V_4
CHA_SA0 CHA_SA1 CHA_SA2 [4] M_A_CLKP1 CK1 DQ53 M_A_DQ53 VSS32 VSS79
140 224 193 192
[4] M_A_CLKN1 CK1# DQ54 M_A_DQ51 VSS33 VSS80
225 197 196 C271 10U/6.3V_4
R290 R291 R292 155 DQ55 237 M_A_DQ56 201 VSS34 VSS81 202
[4] M_A_DIM0_ODT0 ODT0 DQ56 M_A_DQ61 VSS35 VSS82
10K_4 10K_4 10K_4 161 236 205 206 C272 1U/6.3V_4
[4] M_A_DIM0_ODT1 ODT1 DQ57 M_A_DQ63 VSS36 VSS83
249 209 210
SMB_RUN_CLK 253 DQ58 250 M_A_DQ62 +1.2VSUS 213 VSS37 VSS84 214 C273 1U/6.3V_4
[10,18,39] SMB_RUN_CLK SMB_RUN_DAT 254 SCL DQ59 232 M_A_DQ57 +1.2VSUS 217 VSS38 VSS85 218
[10,18,39] SMB_RUN_DAT SDA DQ60 233 M_A_DQ60 223 VSS39 VSS86 222 C274 1U/6.3V_4
CHA_SA0 256 DQ61 245 M_A_DQ59 227 VSS40 VSS87 226
CHA_SA1 260 SA0 DQ62 246 M_A_DQ58 231 VSS41 VSS88 230 C275 1U/6.3V_4
Follow reference board DIMM0 SA0,1,2=LLL +1.2VSUS CHA_SA2 166 SA1 DQ63 235 VSS42 VSS89 234
20150527 SA2 EZIW 13 M_A_DQSP0 M_A_DQSP[7:0] [4] 239 VSS43 VSS90 238
R293 R295 C276 1U/6.3V_4
M_A_CB0 92 DQS0 34 M_A_DQSP1 243 VSS44 VSS91 244
R294 *240_4 CB0/NC DQS1 240_4 240_4 VSS45 VSS92
M_A_CB1 91 55 M_A_DQSP2 247 248 C277 1U/6.3V_4
R296 *240_4 CB1/NC DQS2 VSS46 VSS93
M_A_CB2 101 76 M_A_DQSP3 M_A_DQSP8 M_A_DQSN8 251 252
R297 *240_4 CB2/NC DQS3 VSS47 VSS94
M_A_CB3 105 179 M_A_DQSP4 C278 1U/6.3V_4
R298 *240_4 CB3/NC DQS4
M_A_CB4 88 200 M_A_DQSP5
R299 *240_4 CB4/NC DQS5
B M_A_CB5 87 221 M_A_DQSP6 C279 1U/6.3V_4 B
R300 *240_4 CB5/NC DQS6 263
M_A_CB6 100 242 M_A_DQSP7 263 261
R301 *240_4 CB6/NC DQS7 GND#1
M_A_CB7 104 97 M_A_DQSP8 264 262
R302 *240_4 CB7/NC DQS8 GND#2
M_A_DQSN0 M_A_DQSN[7:0] [4] 264
12 11 DDR_VTT
+1.2VSUS 33 DM0_n/DBI0_n DQS#0 32 M_A_DQSN1
DM1_n/DBI1_n DQS#1 M_A_DQSN2 D4AS0-26001-1P40
54 53 C280 1U/6.3V_4
75 DM2_n/DBI2_n DQS#2 74 M_A_DQSN3
178 DM3_n/DBI3_n DQS#3 177 M_A_DQSN4 C281 1U/6.3V_4
199 DM4_n/DBI4_n DQS#4 198 M_A_DQSN5
220 DM5_n/DBI5_n DQS#5 219 M_A_DQSN6 C282 1U/6.3V_4
241 DM6_n/DBI6_n DQS#6 240 M_A_DQSN7
96 DM7_n/DBI7_n DQS#7 95 M_A_DQSN8 C283 1U/6.3V_4
DBI8# DQS#8
D4AS0-26001-1P40 C284 10U/6.3V_4

C285 10U/6.3V_4

Place these Caps near So-Dimm0.

+1.2VSUS
Place these Caps near So-Dimm0.

R303
1uF/10uF 4pcs on each side of connector
+SMDDR_VREF_DQ0 1K_4
A C288 *0.1U/16V_4 A
SM_VREF R304 2/F_6 +SMDDR_VREF_DIMM
[4] SM_VREF +1.2VSUS [2,6,10,18,43,45]
C289 *2.2U/10V_4
+3V[9,10,11,13,14,16,18,21,22,26,28,29,34,35,36,37,38,39,46,49,50,54,55]
R305
+3V
PROJECT : NLA
C290 1K_4
0.022U/25V_4
C291 0.1U/16V_4

C292 2.2U/10V_4
R306 24.9/F_4 Quanta Computer Inc.
Size Document Number Rev
Custom
17 -- DDR4 DIMM0-STD(4.0H) 1A

Date: Monday, April 09, 2018 Sheet 17o f 56

5 4 3 2 1
 5 4 3 2 1

JDIM2A [9,10,12,13,14,16,45] +3V_DEEP_SUS

[4] M_B_A[13:0] M_B_A0 M_B_DQ5 [42,44,50,55] +5VPCU
144 8 +1.2VSUS
M_B_A1 A0 DQ0 M_B_DQ0 M_B_DQ[63:0] [4] JDIM2B [2,6,10,17,43,45] +1.2VSUS
133 7
M_B_A2 132 A1 DQ1 20 M_B_DQ3 111 [17,43] DDR_VTT
2.48A

18
M_B_A3 131 A2 DQ2 21 M_B_DQ7 112 VDD1 [10,29,30,31,32,33,37,42,43,44,45,50,51,52,54,56] +5VS5
M_B_A4 128 A3 DQ3 4 M_B_DQ4 117 VDD2 [9,10,11,13,14,16,17,21,22,26,28,29,34,35,36,37,38,39,46,49,50,54,55] +3V
M_B_A5 126 A4 DQ4 3 M_B_DQ1 118 VDD3 255
M_B_A6 A5 DQ5 M_B_DQ2 VDD4 VDDSPD +3V
127 16 123
M_B_A7 122 A6 DQ6 17 M_B_DQ6 124 VDD5
M_B_A8 125 A7 DQ7 28 M_B_DQ9 129 VDD6 257
M_B_A9 A8 DQ8 M_B_DQ10 VDD7 VPP1 +2.5V_SUS
121 29 130 259
M_B_A10 146 A9 DQ9 41 M_B_DQ11 135 VDD8 VPP2
M_B_A11 120 A10/AP DQ10 42 M_B_DQ13 136 VDD9
D M_B_A12 119 A11 DQ11 24 M_B_DQ8 141 VDD10 258 DDR_VTT +1.2VSUS D
M_B_A13 A12 DQ12 M_B_DQ14 VDD11 VTT DDR_VTT
158 25 142
151 A13 DQ13 38 M_B_DQ12 147 VDD12 C293 1U/6.3V_4
[4] M_B_WE# A14/W E# DQ14 M_B_DQ15 VDD13
156 37 148
[4] M_B_CAS# A15/CAS# DQ15 M_B_DQ17 VDD14 +SMDDR_VREF_DQ1 R307
[4] M_B_RAS#
152 50 153 164 *0_6/S SMDDR_VREF_DQ1_M1 C294 1U/6.3V_4
A16/RAS# DQ16 49 M_B_DQ22 154 VDD15 VREFCA
TP63 162 DQ17 62 M_B_DQ23 159 VDD16 C295 1U/6.3V_4
TP64 165 CS2#/C0/NC DQ18 63 M_B_DQ21 160 VDD17
CS3#/C1/NC DQ19 46 M_B_DQ16 163 VDD18 C296 1U/6.3V_4
DQ20 45 M_B_DQ18 VDD19
114 DQ21 58 M_B_DQ19 C297 1U/6.3V_4

DDR4 SODIMM 260 PIN

[4] M_B_ACT# 143 ACT# DQ22 59 M_B_DQ20 1 2
[4] M_B_PARITY 116 PARITY DQ23 70 M_B_DQ25 5 VSS1 VSS48 6 C298 1U/6.3V_4
[4] M_B_ALERT# PM_EXTTS#0 134 ALERT# DQ24 71 M_B_DQ27 9 VSS2 VSS49 10
[13,17] PM_EXTTS#0 EVENT# DQ25 M_B_DQ29 VSS3 VSS50
108 83 15 14 C299 1U/6.3V_4
[10,17] DDR4_DRAMRST# RESET# DQ26 M_B_DQ26 VSS4 VSS51

DDR4 SODIMM 260 PIN

84 19 18
C300 *0.1U/16V_4 DQ27 66 M_B_DQ28 23 VSS5 VSS52 22 C301 1U/6.3V_4
DQ28 67 M_B_DQ30 27 VSS6 VSS53 26
DQ29 79 M_B_DQ24 31 VSS7 VSS54 30 C302 10U/6.3V_4
DQ30 80 M_B_DQ31 35 VSS8 VSS55 36 C303 10U/6.3V_4
DQ31 174 M_B_DQ38 39 VSS9 VSS56 40
DQ32 173 M_B_DQ35 43 VSS10 VSS57 44 C304 10U/6.3V_4
DQ33 187 M_B_DQ36 47 VSS11 VSS58 48 C305 10U/6.3V_4
DQ34 186 M_B_DQ32 51 VSS12 VSS59 52
DQ35 170 M_B_DQ39 57 VSS13 VSS60 56 C306 10U/6.3V_4
DQ36 169 M_B_DQ34 61 VSS14 VSS61 60 +SMDDR_VREF_DQ1 C307 10U/6.3V_4
DQ37 183 M_B_DQ37 65 VSS15 VSS62 64
DQ38 M_B_DQ33 VSS16 VSS63

(260P)
182 69 68 C308 *0.1U/16V_4 C309 10U/6.3V_4
DQ39 195 M_B_DQ44 73 VSS17 VSS64 72 C310 10U/6.3V_4
150 DQ40 194 M_B_DQ41 77 VSS18 VSS65 78 C311 *2.2U/10V_4
[4] M_B_BA0 BA0 DQ41 M_B_DQ46 VSS19 VSS66
C 145 207 81 82 C
[4] M_B_BA1 BA1 DQ42 M_B_DQ43 VSS20 VSS67
115 208 85 86
[4] M_B_BG#0 BG0 DQ43 VSS21 VSS68

(260P)
113 191 M_B_DQ45 89 90 DDR_VTT
[4] M_B_BG#1 BG1 DQ44 M_B_DQ40 VSS22 VSS69
190 93 94
149 DQ45 203 M_B_DQ47 99 VSS23 VSS70 98
+3V [4] M_B_CS#0 CS0# DQ46 M_B_DQ42 VSS24 VSS71
157 204 103 102 C313 1U/6.3V_4
[4] M_B_CS#1 CS1# DQ47 M_B_DQ54 VSS25 VSS72
109 216 107 106
[4] M_B_CKE0 CKE0 DQ48 M_B_DQ48 VSS26 VSS73
110 215 167 168 C315 1U/6.3V_4
[4] M_B_CKE1 CKE1 DQ49 M_B_DQ49 VSS27 VSS74
228 171 172
137 DQ50 229 M_B_DQ50 175 VSS28 VSS75 176 C316 1U/6.3V_4
[4] M_B_CLKP0 CK0 DQ51 M_B_DQ52 VSS29 VSS76
139 211 181 180
[4] M_B_CLKN0 CK0# DQ52 M_B_DQ51 VSS30 VSS77 +2.5V_SUS
138 212 185 184 C317 1U/6.3V_4
[4] M_B_CLKP1 CK1 DQ53 M_B_DQ53 VSS31 VSS78
R308 R309 R310 140 224 189 188
[4] M_B_CLKN1 CK1# DQ54 M_B_DQ55 VSS32 VSS79
*10K_4 10K_4 *10K_4 225 193 192 C318 1U/6.3V_4 C319 10U/6.3V_4
M_B_DIM0_ODT0 155 DQ55 237 M_B_DQ57 197 VSS33 VSS80 196
CHB_SA0 CHB_SA1 CHB_SA2 [4] M_B_DIM0_ODT0 M_B_DIM0_ODT1 161 ODT0 DQ56 M_B_DQ62 VSS34 VSS81
236 201 202 C320 1U/6.3V_4 C321 10U/6.3V_4
[4] M_B_DIM0_ODT1 ODT1 DQ57 M_B_DQ58 VSS35 VSS82
249 205 206
R311 R312 R313 253 DQ58 250 M_B_DQ56 209 VSS36 VSS83 210 C322 10U/6.3V_4
[10,17,39] SMB_RUN_CLK 254 SCL DQ59 232 M_B_DQ59 213 VSS37 VSS84 214
10K_4 *10K_4 10K_4
[10,17,39] SMB_RUN_DAT SDA DQ60 233 M_B_DQ61 217 VSS38 VSS85 218 C323 10U/6.3V_4
CHB_SA0 256 DQ61 245 M_B_DQ63 223 VSS39 VSS86 222
CHB_SA1 260 SA0 DQ62 246 M_B_DQ60 227 VSS40 VSS87 226 +3V
+1.2VSUS CHB_SA2 166 SA1 DQ63 +1.2VSUS 231 VSS41 VSS88 230
SA2 13 M_B_DQSP0 M_B_DQSP[7:0] [4] 235 VSS42 VSS89 234 C324 0.1U/16V_4
M_B_CB0 92 DQS0 34 M_B_DQSP1 239 VSS43 VSS90 238
R314 *240_4 CB0/NC DQS1 VSS44 VSS91
M_B_CB1 91 55 M_B_DQSP2 243 244 C325 2.2U/10V_4
R315 *240_4 CB1/NC DQS2 VSS45 VSS92
Follow reference board DIMM1 SA0,1,2=LHL M_B_CB2 101 76 M_B_DQSP3 247 248
R316 *240_4 CB2/NC DQS3 VSS46 VSS93
20150527 M_B_CB3 105 179 M_B_DQSP4 R319 251 252
R317 *240_4 CB3/NC DQS4 VSS47 VSS94
M_B_CB4 88 200 M_B_DQSP5
R318 *240_4 CB4/NC DQS5 240_4
M_B_CB5 87 221 M_B_DQSP6
R320 *240_4 CB5/NC DQS6
B M_B_CB6 100 242 M_B_DQSP7 M_B_DQSP8 B
R321
R322
*240_4
*240_4
M_B_CB7 104 CB6/NC DQS7 97 M_B_DQSP8 263
263
261 Place these Caps near So-Dimm1.
CB7/NC DQS8 +1.2VSUS 264 GND#1 262
12 11 M_B_DQSN0 M_B_DQSN[7:0] [4] GND#2
+1.2VSUS 33 DM0_n/DBI0_n DQS#0 32 M_B_DQSN1 264 1uF/10uF 4pcs on each side of connector
54 DM1_n/DBI1_n DQS#1 53 M_B_DQSN2
DM2_n/DBI2_n DQS#2 M_B_DQSN3 ADDR0107-P005A
75 74
178 DM3_n/DBI3_n DQS#3 177 M_B_DQSN4 R323
199 DM4_n/DBI4_n DQS#4 198 M_B_DQSN5
DM5_n/DBI5_n DQS#5 240_4
220 219 M_B_DQSN6 +1.2VSUS
241 DM6_n/DBI6_n DQS#6 240 M_B_DQSN7 M_B_DQSN8
96 DM7_n/DBI7_n DQS#7 95 M_B_DQSN8 VREF DQ1 M1 Solution
DBI8# DQS#8
ADDR0107-P005A R324
1K_4

+1.2VSUS SMDDR_VREF_DQ1_M3 R325 2/F_6 SMDDR_VREF_DQ1_M1

+3V_DEEP_SUS [4] SMDDR_VREF_DQ1_M3

Co-lay for ODT C326

0.022U/25V_4
R326
1K_4

R327 R328 R329

From Intel MOW, ODT directly connection to CPU
*47K/F_4 *47K/F_4 *47K/F_4 R330
24.9/F_4
2

A A

[2] DDR_VTT_CNTL
1

Q8
3

*DRC5144E0L
DDR_VTT_PG_CTRL R331 *0_4 DDR_VTT_PG_CTRL_R [43]

Vinafix.com PROJECT : NLA

Quanta Computer Inc.
Size Document Number Rev
Custom
18 -- DDR4 DIMM1-RVS(4.0H) 1A

Date: Monday, April 09, 2018 Sheet 18o f 56

5 4 3 2 1
 5 4 3 2 1

DG:1.8V
1V8_AON
INS44773774
?
U10A
COMMON
*N17P-G0-A1
1/17 PCI_EXPRESS
1.0V 1.8V
1V8_AON

1V8_MAIN
[21,22,23,51,55] 1V8_AON
[21,55] PEX_VDD
[20,22,23,27,55] 1V8_MAIN
[20,22,23,24,25,54] FBVDDQ_MEM
19
PEX_VDD

[21,22] DGPU_PW ROK R1001

10K_4 PEX_DVDD AG19
Under GPU Near GPU
22U/6.3VS_6 C1004
3V3_SYS
PEGX_RST#

2
AJ12 AG21
PEX_RST PEX_DVDD
AG22 10U/6.3VS_4 C9115
NVVDD
PEX_DVDD
3 1 AK12 PEX_CLKREQ PEX_DVDD AG24 1U/6.3V_4 C9114 4.7U/6.3V_4 C1006
[11] PCIE_CLKREQ_VGA#
AH21 1U/6.3V_4 C9113 4.7U/6.3V_4 C8698
Q1001 AL13
PEX_DVDD
AH25 1U/6.3V_4 C9111
NVVDDS
D [11] CLK_VGA_P PEX_REFCLK PEX_DVDD D
DMG1012T-7 AK13 PEX_REFCLK 1U/6.3V_4 C9112
[11] CLK_VGA_N
0.22U/10V_4 C1005 PEG_RXP0_C AK14 1.0V PEX_VDD
[3] PEG_RXP0
[3] PEG_RXN0 0.22U/10V_4 C1007 PEG_RXN0_C AJ14
PEX_TX0
PEX_TX0
1.8V
1V8_MAIN
AN12
FBVDD/Q
[3] PEG_TXP0 PEX_RX0
AM12 PEX_RX0 PEX_HVDD AG13
[3] PEG_TXN0
PEX_HVDD AG15
[3] PEG_RXP1 0.22U/10V_4 C1012 PEG_RXP1_C AH14 PEX_TX1 PEX_HVDD AG16 22U/6.3VS_6 C1002
[3] PEG_RXN1 0.22U/10V_4 C1013 PEG_RXN1_C AG14 PEX_TX1 PEX_HVDD AG18 10U/6.3VS_4 C1003
PEX_HVDD AG25 10U/6.3VS_4 C1010
AN14 PEX_RX1 PEX_HVDD AH15 4.7U/6.3V_4 C1019
[3] PEG_TXP1
[3] PEG_TXN1 AM14 PEX_RX1 PEX_HVDD AH18 4.7U/6.3V_4 C8696
PEX_HVDD AH26 1U/6.3V_4 C9119
[3] PEG_RXP2 0.22U/10V_4 C1017 PEG_RXP2_C AK15 PEX_TX2 PEX_HVDD AH27 1U/6.3V_4 C9118
[3] PEG_RXN2 0.22U/10V_4 C1001 PEG_RXN2_C AJ15 PEX_TX2 PEX_HVDD AJ27 1U/6.3V_4 C9116
PEX_HVDD AK27 1U/6.3V_4 C9117
AP14 AL27

Near GPU
[3] PEG_TXP2 PEX_RX2 PEX_HVDD
AP15 PEX_RX2 PEX_HVDD AM28
[3] PEG_TXN2
PEX_HVDD AN28
C1020 PEG_RXP3_C AL16
[3] PEG_RXP3
[3] PEG_RXN3
0.22U/10V_4
0.22U/10V_4 C1022 PEG_RXN3_C AK16
PEX_TX3
PEX_TX3 Under GPU
AN15 PEX_RX3
[3] PEG_TXP3
AM15 PEX_RX3
[3] PEG_TXN3

[3] PEG_RXP4 0.22U/10V_4 C1023 PEG_RXP4_C AK17 PEX_TX4

[3] PEG_RXN4 0.22U/10V_4 C1024 PEG_RXN4_C AJ17 PEX_TX4

AN17 PEX_RX4
[3] PEG_TXP4
AM17
[3] PEG_TXN4 PEX_RX4
1.8V
[3] PEG_RXP5 0.22U/10V_4 C1025 PEG_RXP5_C AH17 PEX_TX5
1V8_MAIN
[3] PEG_RXN5 0.22U/10V_4 C1026 PEG_RXN5_C AG17 PEX_TX5
PEX_PLL_HVDD
PEX_PLL_HVDD AH12 *0_4/S R1006
AP17 PEX_RX5
[3] PEG_TXP5
AP18 PEX_RX5
C [3] PEG_TXN5 C
2017/1/4 Modufy
[3] PEG_RXP6 0.22U/10V_4 C1028 PEG_RXP6_C AK18 PEX_TX6 C1027
[3] PEG_RXN6 0.22U/10V_4 C1029 PEG_RXN6_C AJ18 PEX_TX6 0.1U/16V_4

AN18 PEX_RX6
[3] PEG_TXP6
[3] PEG_TXN6 AM18 PEX_RX6

[3] PEG_RXP7 0.22U/10V_4 C1032 PEG_RXP7_C AL19 PEX_TX7

[3] PEG_RXN7 0.22U/10V_4 C1033 PEG_RXN7_C AK19 PEX_TX7

[3] PEG_TXP7 AN20 PEX_RX7

AM20 PEX_RX7
[3] PEG_TXN7
AK20 PEX_TX8
AJ20 PEX_TX8

AP20 PEX_RX8
AP21 PEX_RX8

AH20 PEX_TX9
AG20 PEX_TX9

AN21 PEX_RX9
AM21 PEX_RX9

AK21 PEX_TX10
AJ21 PEX_TX10

AN23 PEX_RX10
AM23 PEX_RX10

AL22 PEX_TX11
AK22 PEX_TX11

AP23 PEX_RX11
AP24 PEX_RX11
B B
AK23 PEX_TX12
AJ23 PEX_TX12

AN24 PEX_RX12
AM24 PEX_RX12

AH23 PEX_TX13
AG23 PEX_TX13

AN26 PEX_RX13
AM26 PEX_RX13

AK24 PEX_TX14
AJ24 PEX_TX14

AP26 PEX_RX14
AP27 PEX_RX14

AL25 PEX_TX15
AK25 PEX_TX15

AN27 PEX_TERMP
PEX_RX15 PEX_TERMP AP29 R1010 2.49K/F_4
AM27 PEX_RX15

1V8_AON
Rc
N17_RST power sequence
1V8_AON
N17_GPU RST# Ca
A A
Cb Rg U8512 C1056 R1172 *10K_4 1V8_AON R1173 *10K_4 1V8_AON
SYS_PEX_RST_MON# [21] *0.1U/16V_4
5

C1055 0.1U/16V_4
SYS_PEX_RST_MON# 1
Rd Rb
U1002 PEGX_RST# D8520 D1005
Ub 4
PEGX_RST# [21,22] SYS_PEX_RST_MON#
5

NL17SZ08DFT2G 2 PLTRST# 1 1
[21] GPU_PEX_RST_HOLD# SYS_PEX_RST_MON# PEGX_RST#
[9] DGPU_HOLD_RST# 1 3 3
4 SYS_PEX_RST_MON# R1000 *0_4/S PEGX_RST# DGPU_HOLD_RST# 2 GPU_PEX_RST_HOLD# 2
Ua
3

2
Re
PROJECT : NLA
[12,34,35,36,37,38] PLTRST# R1015
*NL17SZ08DFT2G *100K_4 *BAT54AW -L
*BAT54AW -L
Db Da
Quanta Computer Inc.
3

Rf R1014
100K_4
if stuff Db,Rd, do not stuff Ub,Cb,Rf,Rg if stuff Da,Rb, do not stuff Ua,Ca,Rc,Re Size Document Number Rev
N17P-G0-A1-1/9 1A

Custom Date: Monday, April 09, 2018 Sheet 19 of 56

5 4 3 2 1
 5 4 3 2 1

[19,22,23,27,55] 1V8_MAIN
[22,23,24,25,54] FBVDDQ_MEM
20
INS44775919
INS44775300
?
?
U10B
COMMON U10C
COMMON
*N17P-G0-A1 *N17P-G0-A1
2/17 FBA 3/17 FBB
D D
VMA_DQ[63:0]
[24] VMA_DQ[63:0] [25] VMB_DQ[63:0]

VMA_DQ0 L28 VMB_DQ0 G9

FBA_D0 FBB_D0
VMA_DQ1 M29 VMB_DQ1 E9
VMA_DQ2
VMA_DQ3
L29
M28
FBA_D1
FBA_D2 0.4A VMB_DQ2
VMB_DQ3
G8
F9
FBB_D1
FBB_D2
VMA_DQ4 N31
FBA_D3
FBA_D4
1.8V VMB_DQ4 F11
FBB_D3
FBB_D4
VMA_DQ5 P29 K27 FBA_PLL_AVDD VMB_DQ5 G11
FBA_D5 FB_REFPLL_AVDD FBB_D5
VMA_DQ6 R29 VMB_DQ6 F12
FBA_D6 FBB_D6
VMA_DQ7 P28 VMB_DQ7 G12
FBA_D7 FBB_D7
VMA_DQ8 J28 C1057 VMB_DQ8 G6
FBA_D8 FBB_D8
VMA_DQ9 H29 0.1U/16V_4 VMB_DQ9 F5
FBA_D9 FBB_D9
VMA_DQ10 J29 VMB_DQ10 E6
FBA_D10 FBB_D10
VMA_DQ11 H28 VMB_DQ11 F6
FBA_D11 FBB_D11
VMA_DQ12 G29 VMB_DQ12 F4
FBA_D12 FBB_D12
VMA_DQ13 E31 VMB_DQ13 G4
FBA_D13 FBB_D13
VMA_DQ14 E32 VMB_DQ14 E2
FBA_D14 FBB_D14
VMA_DQ15 F30 VMB_DQ15 F3
FBA_D15 FBB_D15
VMA_DQ16 C34 VMB_DQ16 C2
FBA_D16 FBB_D16
VMA_DQ17 D32 VMB_DQ17 D4
FBA_D17 FBB_D17
VMA_DQ18 B33 VMB_DQ18 D3
FBA_D18 FBB_D18
VMA_DQ19 C33 VMB_DQ19 C1
FBA_D19 FBB_D19
VMA_DQ20 F33 VMB_DQ20 B3
FBA_D20 FBB_D20
VMA_DQ21 F32 VMB_DQ21 C4
FBA_D21 FBB_D21
VMA_DQ22 H33 VMB_DQ22 B5
FBA_D22 FBB_D22
VMA_DQ23 H32 VMB_DQ23 C5
FBA_D23 FBB_D23
VMA_DQ24 P34 VMB_DQ24 A11
FBA_D24 FBB_D24
VMA_DQ25 P32 VMB_DQ25 C11
FBA_D25 FBB_D25
VMA_DQ26 P31 VMB_DQ26 D11
FBA_D26 FBB_D26
VMA_DQ27 P33 VMB_DQ27 B11
FBA_D27 FBB_D27
VMA_DQ28 L31 VMB_DQ28 D8
FBA_D28 FBB_D28
VMA_DQ29 L34 VMB_DQ29 A8
FBA_D29 FBB_D29
VMA_DQ30 L32 VMB_DQ30 C8
FBA_D30 FBB_D30
VMA_DQ31 L33 VMB_DQ31 B8
FBA_D31 FBB_D31
VMA_DQ32 AG28 VMB_DQ32 F24
FBA_D32 FBB_D32
VMA_DQ33 AF29 U30 FBA_CMD0 VMB_DQ33 G23 D13 FBB_CMD0
C FBA_D33 FBA_CMD0 FBB_D33 FBB_CMD0 C
VMA_DQ34 FBA_CMD1 FBA_CMD[31:0] [24] VMB_DQ34 FBB_CMD1 FBB_CMD[31:0] [25]
AG29 FBA_D34 FBA_CMD1 T31 E24 FBB_D34 FBB_CMD1 E14
VMA_DQ35 AF28 U29 FBA_CMD2 VMB_DQ35 G24 F14 FBB_CMD2
FBA_D35 FBA_CMD2 FBB_D35 FBB_CMD2
VMA_DQ36 AD30 R34 FBA_CMD3 VMB_DQ36 D21 A12 FBB_CMD3
FBA_D36 FBA_CMD3 FBB_D36 FBB_CMD3
VMA_DQ37 AD29 R33 FBA_CMD4 VMB_DQ37 E21 B12 FBB_CMD4
FBA_D37 FBA_CMD4 FBB_D37 FBB_CMD4
VMA_DQ38 AC29 U32 FBA_CMD5 VMB_DQ38 G21 C14 FBB_CMD5
FBA_D38 FBA_CMD5 FBB_D38 FBB_CMD5
VMA_DQ39 AD28 U33 FBA_CMD6 VMB_DQ39 F21 B14 FBB_CMD6
FBA_D39 FBA_CMD6 FBB_D39 FBB_CMD6
VMA_DQ40 AJ29 U28 FBA_CMD7 VMB_DQ40 G27 G15 FBB_CMD7
FBA_D40 FBA_CMD7 FBB_D40 FBB_CMD7
VMA_DQ41 AK29 V28 FBA_CMD8 VMB_DQ41 D27 F15 FBB_CMD8
FBA_D41 FBA_CMD8 FBB_D41 FBB_CMD8
VMA_DQ42 AJ30 V29 FBA_CMD9 VMB_DQ42 G26 E15 FBB_CMD9
FBA_D42 FBA_CMD9 FBB_D42 FBB_CMD9
VMA_DQ43 AK28 V30 FBA_CMD10 VMB_DQ43 E27 D15 FBB_CMD10
FBA_D43 FBA_CMD10 FBB_D43 FBB_CMD10
VMA_DQ44 AM29 U34 FBA_CMD11 VMB_DQ44 E29 A14 FBB_CMD11
FBA_D44 FBA_CMD11 FBB_D44 FBB_CMD11
VMA_DQ45 AM31 U31 FBA_CMD12 VMB_DQ45 F29 D14 FBB_CMD12
FBA_D45 FBA_CMD12 FBB_D45 FBB_CMD12
VMA_DQ46 AN29 V34 FBA_CMD13 VMB_DQ46 E30 A15 FBB_CMD13
FBA_D46 FBA_CMD13 FBB_D46 FBB_CMD13
VMA_DQ47 AM30 V33 FBA_CMD14 VMB_DQ47 D30 B15 FBB_CMD14
FBA_D47 FBA_CMD14 FBB_D47 FBB_CMD14
VMA_DQ48 AN31 Y32 FBA_CMD15 VMB_DQ48 A32 C17 FBB_CMD15
FBA_D48 FBA_CMD15 FBB_D48 FBB_CMD15
VMA_DQ49 AN32 AA31 FBA_CMD16 VMB_DQ49 C31 D18 FBB_CMD16
FBA_D49 FBA_CMD16 FBB_D49 FBB_CMD16
VMA_DQ50 AP30 AA29 FBA_CMD17 VMB_DQ50 C32 E18 FBB_CMD17
FBA_D50 FBA_CMD17 FBB_D50 FBB_CMD17
VMA_DQ51 AP32 AA28 FBA_CMD18 VMB_DQ51 B32 F18 FBB_CMD18
FBA_D51 FBA_CMD18 FBB_D51 FBB_CMD18
VMA_DQ52 AM33 AC34 FBA_CMD19 VMB_DQ52 D29 A20 FBB_CMD19
FBA_D52 FBA_CMD19 FBB_D52 FBB_CMD19
VMA_DQ53 AL31 AC33 FBA_CMD20 VMB_DQ53 A29 B20 FBB_CMD20
FBA_D53 FBA_CMD20 FBB_D53 FBB_CMD20
VMA_DQ54 AK33 AA32 FBA_CMD21 VMB_DQ54 C29 C18 FBB_CMD21
FBA_D54 FBA_CMD21 FBB_D54 FBB_CMD21
VMA_DQ55 AK32 AA33 FBA_CMD22 VMB_DQ55 B29 B18 FBB_CMD22
FBA_D55 FBA_CMD22 FBB_D55 FBB_CMD22
VMA_DQ56 AD34 Y28 FBA_CMD23 VMB_DQ56 B21 G18 FBB_CMD23
FBA_D56 FBA_CMD23 FBB_D56 FBB_CMD23
VMA_DQ57 AD32 Y29 FBA_CMD24 VMB_DQ57 C23 G17 FBB_CMD24
FBA_D57 FBA_CMD24 FBB_D57 FBB_CMD24
VMA_DQ58 AC30 W31 FBA_CMD25 VMB_DQ58 A21 F17 FBB_CMD25
FBA_D58 FBA_CMD25 FBB_D58 FBB_CMD25
VMA_DQ59 AD33 Y30 FBA_CMD26 VMB_DQ59 C21 D16 FBB_CMD26
FBA_D59 FBA_CMD26 FBB_D59 FBB_CMD26
VMA_DQ60 AF31 AA34 FBA_CMD27 VMB_DQ60 B24 A18 FBB_CMD27
FBA_D60 FBA_CMD27 FBB_D60 FBB_CMD27
VMA_DQ61 AG34 Y31 FBA_CMD28 VMB_DQ61 C24 D17 FBB_CMD28
FBA_D61 FBA_CMD28 FBB_D61 FBB_CMD28
VMA_DQ62 AG32 Y34 FBA_CMD29 VMB_DQ62 B26 A17 FBB_CMD29
FBA_D62 FBA_CMD29 FBB_D62 FBB_CMD29
VMA_DQ63 AG33 Y33 FBA_CMD30 VMB_DQ63 C26 B17 FBB_CMD30
FBA_D63 FBA_CMD30 FBB_D63 FBB_CMD30
V31 FBA_CMD31 E17 FBB_CMD31
FBA_CMD31 FBB_CMD31
FBA_CMD32 R28 FBB_CMD32 G14
FBA_DBI0 P30 AC28 FBB_DBI0 E11 G20
[24] FBA_DBI[7:0] FBA_DQM0 FBA_CMD33 [25] FBB_DBI[7:0] FBB_DQM0 FBB_CMD33
FBA_DBI1 F31 R32 FBA_DEBUG0 TP8570 FBB_DBI1 E3 C12 FBB_DEBUG0 TP8572
FBA_DQM1 FBA_CMD34 FBB_DQM1 FBB_CMD34
FBA_DBI2 F34 AC32 FBA_DEBUG1 TP8571 FBB_DBI2 A3 C20 FBB_DEBUG1 TP8573
FBA_DQM2 FBA_CMD35 FBB_DQM2 FBB_CMD35
FBA_DBI3 M32 FBB_DBI3 C9
FBA_DQM3 FBB_DQM3
FBA_DBI4 AD31 FBB_DBI4 F23
FBA_DQM4 FBB_DQM4
B FBA_DBI5 AL29 FBB_DBI5 F27 B
FBA_DQM5 FBB_DQM5
FBA_DBI6 AM32 FBB_DBI6 C30
FBA_DQM6 FBB_DQM6
FBA_DBI7 AF34 FBB_DBI7 A24
FBA_DQM7 FBB_DQM7

FBA_EDC0 M31 FBB_EDC0 D10

[24] FBA_EDC[7:0] FBA_DQS_WP0 [25] FBB_EDC[7:0] FBB_DQS_WP0
FBA_EDC1 G31 FBB_EDC1 D5
FBA_DQS_WP1 FBB_DQS_WP1
FBA_EDC2 E33 R30 FBB_EDC2 C3 D12
FBA_DQS_WP2 FBA_CLK0 VMA_CLK0 [24] FBB_DQS_WP2 FBB_CLK0 VMB_CLK0 [25]
FBA_EDC3 M33 R31 FBB_EDC3 B9 E12
FBA_DQS_WP3 FBA_CLK0 VMA_CLK0# [24] FBB_DQS_WP3 FBB_CLK0 VMB_CLK0# [25]
FBA_EDC4 AE31 AB31 FBB_EDC4 E23 E20
FBA_DQS_WP4 FBA_CLK1 VMA_CLK1 [24] FBB_DQS_WP4 FBB_CLK1 VMB_CLK1 [25]
FBA_EDC5 AK30 AC31 FBB_EDC5 E28 F20
FBA_DQS_WP5 FBA_CLK1 VMA_CLK1# [24] FBB_DQS_WP5 FBB_CLK1 VMB_CLK1# [25]
FBA_EDC6 AN33 FBB_EDC6 B30
FBA_DQS_WP6 FBB_DQS_WP6
FBA_EDC7 AF33 FBB_EDC7 A23
FBA_DQS_WP7 FBB_DQS_WP7

M30 FBA_DQS_RN0 FBA_WCK01 K31 D9 FBB_DQS_RN0 FBB_WCK01 F8

H30 L30 VMA_WCK01 [24] E4 E8 VMB_WCK01[25]
FBA_DQS_RN1 FBA_WCK01 VMA_WCK01# [24] FBB_DQS_RN1 FBB_WCK01 VMB_WCK01#[25]
E34 FBA_DQS_RN2 FBA_WCK23 H34 B2 FBB_DQS_RN2 FBB_WCK23 A5
VMA_WCK23 [24] VMB_WCK23[25]
M34 FBA_DQS_RN3 FBA_WCK23 J34 A9 FBB_DQS_RN3 FBB_WCK23 A6
AF30 AG30 VMA_WCK23# [24] D22 D24 VMB_WCK23#[25]
FBA_DQS_RN4 FBA_WCK45 VMA_WCK45 [24] FBB_DQS_RN4 FBB_WCK45 VMB_WCK45[25]
AK31 FBA_DQS_RN5 FBA_WCK45 AG31 D28 FBB_DQS_RN5 FBB_WCK45 D25
AM34 AJ34 VMA_WCK45# [24] A30 B27 VMB_WCK45#[25]
FBA_DQS_RN6 FBA_WCK67 VMA_WCK67 [24] FBB_DQS_RN6 FBB_WCK67 VMB_WCK67[25]
AF32 FBA_DQS_RN7 FBA_WCK67 AK34 B23 FBB_DQS_RN7 FBB_WCK67 C27
VMA_WCK67# [24] VMB_WCK67#[25]
FBA_WCKB01 J30 FBB_WCKB01 D6
FBA_WCKB01 J31 FBB_WCKB01 D7
FBA_WCKB23 J32 FBB_WCKB23 C6
FBVDDQ_MEM FBVDDQ_MEM FBA_WCKB23 J33 FBB_WCKB23 B6
FBA_WCKB45 AH31 FBB_WCKB45 F26
FBA_WCKB45 AJ31 FBVDDQ_MEM FBVDDQ_MEM FBB_WCKB45 E26
FBA_WCKB67 AJ32 1V8_MAIN FBB_WCKB67 A26
FBA_WCKB67 AJ33 FBB_WCKB67 A27
L1000
R1002 R1003
10K_4 10K_4 H31 U27 FBA_PLL_AVDD 1 2 H17 FBA_PLL_AVDD
FB_VREF FBA_PLL_AVDD FBB_PLL_AVDD
R1017 R1018
FBA_CMD14 10K_4 10K_4
FBA_CMD30 HCB1005KF-330T30
FBB_CMD14
A
FBA_CMD13
FBA_CMD29
C1048 C8975 0.4A FBB_CMD30
0.1U/16V_4
C1060
A

0.1U/16V_4 22U/6.3VS_6 FBB_CMD13

FBB_CMD29
R1004 R1005
10K_4 10K_4

R1023 R1024
10K_4 10K_4
PROJECT : NLA
Quanta Computer Inc.
Size Document Number Re v
N17P-G0-A1-2/9 1A

Custom Date: Monday, April 09, 2018 Sheet 20 of 56

5 4 3 2 1
 5 4 3 2 1

21
[19,55] PEX_VDD
INS44778550
[19,22,23,51,55] 1V8_AON
U10N
?
[19,20,22,23,27,55] 1V8_MAIN
COMMON
*N17P-G0-A1 [5,30,34,36,38,41,42,46] +3VPCU
6/17 IFPCD [22] CORE_PLLVDD
INS44778697
INS44779100 U10M
?
COMMON
U10L
? *N17P-G0-A1
COMMON
*N17P-G0-A1 7/17 IFPEF
5/17 IFPAB IFPC_RSET
AF8 IFPCD_RSET
R8567 1K_4
DVI HDMI DP

SL/ D L
HDMI/Re-Driver
IFPA_L3 AN6 DVI HDMI DP
TXC/T XC
IFPA_L3 AM6
TXC/T XC
AJ8 IFPAB_RSET
SL/DL
DVI HDMI DP
IFPE_AUX_SDA AB4
AN3 SL/DL TP8569 AB3
TXD0/ 0 IFPA_L2 CORE_PLLVDD IFPE_AUX_SCL
AP3 AF7 AG2 AB8
TP8556 TXD0/ 0 IFPA_L2
1.8V IFPCD_PLLVDD IFPC_AUX_SDA
IFPC_AUX_SCL AG3
GPU_DDCDATA [27]
GPU_DDCCLK [27]
IFPEF_PLLVDD

AH8 AC5
D
IFPAB_PLLVDD
TXD1/ 1 IFPA_L1 AM5 0.4A AD6 IFPEF_RSET
TXC/T XC
TXC/T XC
IFPE_L3
IFPE_L3 AC4 D
IFPA_L1 AN5 C8964 IFPC_L3 AG4
TXD1/ 1 TXC/T XC GPU_CLK# [27]
IFPC_L3 AG5 IFPE_L2 AC3
TXC/T XC GPU_CLK [27] TXD0/ 0 AC2

0.1U/16V_4
IFPE_L2
AK6 AH4 TXD0/ 0
IFPA_L0 IFPC_L2 GPU_D0# [27]
TXD2/ 2
TXD2/ 2 IFPA_L0 AL6 IFPC TXD0/ 0
TXD0/ 0
IFPC_L2 AH3
GPU_D0 [27] IFPE TXD1/ 1 IFPE_L1 AC1
IFPE_L1 AD1
TXD1/ 1
IFPC_L1 AJ2
TXD1/ 1 GPU_D1# [27]
IFPA_AUX_SDA AH6 IFPC_L1 AJ3 IFPE_L0 AD3
TXD1/ 1 GPU_D1 [27] TXD2/ 2
IFPA_AUX_SCL AJ6 IFPE_L0 AD2
AJ1 TXD2/ 2
IFPC_L0 GPU_D2# [27]
TXD2/ 2 AK1

PEX_VDD TXC IFPB_L3 AH9 Under GPU TXD2/ 2

IFPC_L0 GPU_D2 [27]
GPU_DDCDATA
IFPB_L3 AJ9
TXC GPU_DDCCLK
AG8 IFP_IOVDD
IFPB_L2 AP5
TXD0/ 3
AG9 IFP_IOVDD IFPB_L2 AP6
TXD0/ 3
R12168 R12169
1.0V *100K/F_4 *100K/F_4
TXD1/ 4 IFPB_L1 AL7 PEX_VDD HDMI PEX_VDD
DVI HDMI DP
TXD1/ 4 IFPB_L1 AM7

0.4A
SL/DL
AF6 IFP_IOVDD AC7 IFP_IOVDD
AM8 DVI HDMI DP AF2
TXD2/ 5 IFPB_L0 IFPF_AUX_SDA
AN8 SL/DL AF3
TXD2/ 5 IFPB_L0 IFPF_AUX_SCL
AG6 IFP_IOVDD IFPD_AUX_SDA AK2 AC8 IFP_IOVDD
IFPD_AUX_SCL AK3
IFPB_AUX_SDA AL8 C9171 C9181 C8595 C8594 TXC IFPF_L3 AF1
IFPB_AUX_SCL AK8 4.7u/6.3V_4 0.1U/16V_4 0.1U/16V_4 1U/6.3V_4 TXC IFPF_L3 AG1
TXC IFPD_L3 AK5
TXC IFPD_L3 AK4 IFPF_L2 AD5
TXD0/ 3
IFPF_L2 AD4
IFPAB IFPD_L2 AL4 IFPF TXD0/ 3

IFPD TXD0/ 3
AL3 AF5
Under GPU TXD0/ 3 IFPD_L2 TXD1/ 4
TXD1/ 4
IFPF_L1
IFPF_L1 AF4
TXD1/ 4 IFPD_L1 AM4
TXD1/ 4 IFPD_L1 AM3 IFPF_L0 AE4
TXD2/ 5
IFPF_L0 AE3
TXD2/ 5
IFPD_L0 AM2
TXD2/ 5
IFPD_L0 AM1
TXD2/ 5

STRAP[2:0] VRAM Table for N17P-G0/G1 GDDR5 Recommended Memories

RAMCFG
[2:0] DESCRIPTION Vendo r Vendor P/N Haier consign P/N QB P/N
C 0x 0 GDDR5 256Mx32 8 GHz AKD58WWT500 C
Samsung B die K4G80325FB-HC25 AKG58WWT505
0x 2 GDDR5 256Mx32 8 GHz Hynix M die H5GQ8H24MJR-R4C AKG5RF0TW03 AKD5RF0TW00

0x 0 GDDR5 256Mx32 7 GHz Samsung B die K4G80325FB-HC28 AKG5QGDT513 AKG5QGDT506

0x 2 GDDR5 256Mx32 7 GHz Hynix M die H5GC8H24MJR-R0C AKG5QGUTW02

1V8_AON 1V8_AON
GFx SMBus Isolat i on(f or EC)

R12070 R12069

5
2K/F_4 2K/F_4
1V8_AON GFx_SCL
3 4
[38] GPUT_CLK
Q7736A PJT138K

2
GFx_SDA
6 1
[38] GPUT_DATA
Q7736B PJT138K
R1046 R124556 R124547 R1049 R1050 R12060
*100K/F_4 *100K/F_4 *100K/F_4 *100K/F_4 *100K/F_4 *100K/F_4

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
STRAP5

1V8_AON

R124557 R1056 R1057 R12122 R124553 R12061

100K/F_4 100K/F_4 100K/F_4 100K/F_4 100K/F_4 100K/F_4
INS44779416
U10Q
?
COMMON
*N17P-G0-A1
10/17 MISC1
B R12068 R12067 1V8_AON B
2K/F_4 2K/F_4
GFx_SCL
I2CS_SCL T4
GFx_SDA
I2CS_SDA T3
I2CC_SCL_GFX
OVERT# M1 OVERT I2CC_SCL R2 R12091 R12090
INS44779227
[21,22] OVERT# I2CC_SDA_GFX
I2CC_SDA R3 2K/F_4 2K/F_4
?
TS_VREF
U10P TP8559 AP9 TS_VREF
COMMON
I2CB_SCL_G
*N17P-G0-A1 I2CB_SCL R7
I2CB_SDA_G
12/17 MISC2 TP1008 THERMDN K4 THERMDN I2CB_SDA R6

TP1009 THERMDP K3 THERMDP

NVVDD_PWM_GPU R12009 10K_4
1V8_AON GPIO0 P6
JTAG_TCK NVVDD_PWM_GPU [51]
ROM_CS H6 AM10 JTAG_TCK GPIO1 M3 GC6FBEN
JTAG_TMS GC6FBEN [21,22]
AP11 JTAG_TMS GPIO2 L6 GPUEVENT#
ROM_SI 1V8_AON JTAG_TDI NVVDDS_VID
ROM_SI H5 AM11 JTAG_TDI GPIO3 P5
ROM_SO JTAG_TDO 1V8_MAIN_EN
ROM_SO H7 TP1010 AP12 JTAG_TDO GPIO4 P7
ROM_SCLK JTAG_TRST# 1V8_MAIN_EN [22,51,55]
STRAP0 J2 STRAP0 ROM_SCLK H4 AN11 JTAG_TRST GPIO5 L7
JTAG_SEL
STRAP1 J7 STRAP1 R1033 R1034 R1035 TP8554 AK11 NVJTAG_SEL GPIO6 M7 PSI
JTAG_TMS PSI [51]
STRAP2 J6 STRAP2 100K/F_4 100K/F_4 100K/F_4 R1067 *10K/F_4 GPIO7 N8
MEM_VDD_CTRL
STRAP3 J5 STRAP3 GPIO8 L3 R12121 10K_4
ROM_SI JTAG_TDI THER_ALERT#
STRAP4 J3 STRAP4 R1069 *10K/F_4 GPIO9 M2
ROM_SO MEM_VREF_CTL MEM_VDD_CTRL [54]
STRAP5 J1 STRAP5 GPIO10 L1 R1068 100K_4
ROM_SCLK JTAG_TRST#
R124549 10K/F_4 GPIO11 M5
PWR_LEVEL
GPIO12 N3
JTAG_TCK MEM_VREF_CTL [24,25]
R124551 *10K/F_4 GPIO13 M4
BUFRST E1 GPIO14 N4
JTAG_SEL 1V8_AON
R1038 R1039 R1040 R12167 *10K/F_4 GPIO15 P2
SYS_PEX_RST_MON#_R
*100K/F_4 *100K/F_4 *100K/F_4 GPIO16 R8 R12020 *0_4 SYS_PEX_RST_MON# [19]
GPIO17 M6
GPIO18 R1 GPUEVENT# R12011 10K_4
1V8_MAIN_EN
GPIO19 P3 R12012 10K_4
NVVDDS_PSI
GPIO20 P4 TP8574
P1 PSI R12014 10K_4
modify/0517 GPIO21
GPIO22 P8
GPU_PEX_RST_HOLD#
THER_ALERT#
PWR_LEVEL R12016 10K_4
GPIO23 T8 R12018 100K/F_4
+3V GPU_PEX_RST_HOLD# [19] SYS_PEX_RST_MON#_R
GPIO24 L2 R12019 10K_4
GPU_PEX_RST_HOLD#
GPIO25 R4 R12021 10K_4
NVVDDS_VID
GPIO26 R5 R124543 *10K_4
GC6FBEN_Q [9] GPIO27_IFPC_HPD
GPIO27 U3
R7740
3

10K_4
D1000
1V8_AON GPU_EVENT#
2 GPUEVENT# 2 1
GPU_EVENT# [9]
DMG1012T-7
DMG1012T-7 RB500V-40
3

Q7730
A R8645 Q7719 A
Event
1

10K/F_4
[21,22] GC6FBEN 2

Throttle PEGX_RST#[19,22]
GPIO27_IFPC_HPD
HDMI-HPD DMG1012T-7 1V8_AON R1075 10K_4
R1076 10K_4 +3VPCU
1
3

2
1V8_AON PWR_LEVEL DGPU_PROCHOT_EC#
1 3
DGPU_PROCHOT_EC# [38,55] DGPU_OVT#
2017/1/4 Modufy OVERT# 1 3
GPIO27_IFPC_HPD_Q HDMI_HPD [21,22] OVERT# DGPU_OVT# [38]
Q7729 2 R8647 100K_4 R8644 *0_4/S Q1003
HDMI_HPD [13,27]
2

DMG1012T-7

2
[9,38] DGPU_PWROK_Q
DGPU_PWROK_Q
3 1 DGPU_PWROK [19,22]
GPIO12 AC
AC high
detect
Overt shutdown Q7720
DMG1012T-7
20160524
R8646 C8689 C8690 1V8_AON DC low
1

PROJECT : NLA
100K_4 *220P/50V_4 *220P/50V_4 DMG1012T-7 Q7733
Nvidia :
suggest to
R8648 *0_4
GND connect this Quanta Computer Inc.
GND GND GND pin to EC only
Siz e Document Number Re v
N17P-G0-A1-3/9 1A

Custom Date: Monday, April 09, 2018 Sheet 21 of 56

5 4 3 2 1
 5 4 3 2 1

INS44781570
U10H
?
COMMON
*N17P-G0-A1 INS44781085
9/17 XVDD INS44782168 U10J
?
[21] CORE_PLLVDD
COMMON
? *N17P-G0-A1 [19,21,23,51,55] 1V8_AON

22
CONF IGURABLE U10I
COMMON 16/17 GND_2/2 [19,20,23,27,55] 1V8_MAIN
POWER NVVDD *N17P-G0-A1
[20,23,24,25,54] FBVDDQ_MEM
CHANNELS 15/17 GND_1/2 N19 GND GND T28
XVDD U4 A2 GND GND AM25 N2 GND GND T32
U5 A33 AN1 N21 T5
XVDD
XVDD U6 AA13
GND
GND
GND
GND AN10 N23
GND
GND
GND
GND T7 20160524
XVDD U7 AA15 GND GND AN13 N28 GND GND U12
XVDD U8 AA17 GND GND AN16 N30 GND GND U14
XVDD V1 AA18 GND GND AN19 N32 GND GND U16 FBVDDQ_MEM R12175 4.7K_4
1V8_AON +3V
XVDD V2 AA20 GND GND AN22 N33 GND GND U19
V3 AA22 AN25 N5 U21 [21] OVERT#
XVDD GND GND GND GND
XVDD V4 AB12 GND GND AN30 N7 GND GND U23
AB14 GND GND AN34 P13 GND GND V12 Q7728

2
AB16 GND GND AN4 P15 GND GND V14 C14023 10U/6.3V_4 DMG1012T-7
XVDD V5 AB19 GND GND AN7 P17 GND GND V16 C14026 10U/6.3V_4
V6 AB2 AP2 P18 V19 1 3
TO EC
XVDD GND GND GND GND C8918 10U/6.3V_4 C14022 10U/6.3V_4 OVERT#
[19,21] PEGX_RST# GPU_OVERT#_EC [38]
D XVDD V7 AB21 GND GND AP33 P20 GND GND V21 C8917 10U/6.3V_4 C14024 10U/6.3V_4 D
XVDD V8 AB23 GND GND B1 P22 GND GND V23 C14006 10U/6.3V_4
W2 AB28 B10 R12 W13 C14005 10U/6.3V_4 1V8_AON

1
XVDD GND GND GND GND
W3 AB30 B22 R14 W15
XVDD
XVDD W4 AB32
GND
GND
GND
GND B25 R16
GND
GND
GND
GND W17
C9123
C9122
1u/6.3V_4
1u/6.3V_4
R12051
10K_4
D8513
RB500V-40
20160524

3
XVDD W5 AB5 GND GND B28 R19 GND GND W18 C8921 1u/6.3V_4
W7 AB7 B31 R21 W20 D8510
XVDD GND GND GND GND C8925 1u/6.3V_4 R12049

2
AC13 GND GND B34 R23 GND GND W22 C14025 22U/6.3V_6 C8926 1u/6.3V_4 10K_4 2 1
NVVDD_PG_LOOP_OVT NVVDD_CORE1_EN [22,51]
AC15 GND GND B4 T13 GND GND W28 C8908 22U/6.3V_6 C8922 1u/6.3V_4 2
W8 AC17 B7 T15 Y12 D8509
XVDD
XVDD Y1 AC18
GND
GND
GND
GND C10 T17
GND
GND
GND
GND Y14
C8910
C8909
22U/6.3V_6
22U/6.3V_6
C8920
C8924
1u/6.3V_4
1u/6.3V_4
[22,51] NVVDDPG
1 2 R12057 RB500V-40
1K_4 20160524

3
XVDD Y2 AC20 GND GND C13 T18 GND GND Y16 C8912 22U/6.3V_6 C8923 1u/6.3V_4 Q7727

3
XVDD Y3 AC22 GND GND C19 T2 GND GND Y19 C8919 1u/6.3V_4 DMG1012T-7 R12056 C8744
RB500V-40

1
Y4 AE2 C22 T20 Y21

Near GPU
XVDD GND GND GND GND C1137 1u/6.3V_4 *1.21K_4 *0.1U/16V_4
XVDD Y5 AE28 GND GND C25 T22 GND GND Y23 C14008 22U/6.3V_6 C1141 1u/6.3V_4 2
XVDD Y6 AE30 GND GND C28 AG11 GND GND AH11 C14009 22U/6.3V_6 2
Y7 AE32 C7 [22] NVVDDSPG 2 1
XVDD GND GND C14007 22U/6.3V_6 Q7726 1V8_MAIN_EN [21,51,55]
XVDD Y8 AE33 GND GND D2 C14010 22U/6.3V_6 Q7725 DMG1012T-7 *RB500V-40 D8518
AE5 GND GND D31 C14011 22U/6.3V_6 DMG1012T-7
D8511

1
AE7 D33

Under GPU
GND GND

1
XVDD AA1 AH10 GND GND E10 1 2
PEXVDD_EN [22,55]
XVDD AA2 AH13 GND GND E22
AA3 AH16 E25
XVDD
XVDD AA4 AH19
GND
GND
GND
GND E5
11/24 moddify
[21,22] GC6FBEN
R12054RB500V-40
100K/F_4 20160524
XVDD AA5 AH2 GND GND E7 C8745
AA6 AH22 F28
XVDD
XVDD AA7 AH24
GND
GND
GND
GND F7 20160524 R12058
*12.1K/F_4
*0.22U/10V_4 R12059
*0_4
XVDD AA8 AH28 GND GND G10
AH29 G13
AH30
AH32
GND
GND
GND
GND
GND
GND
G16
G19
GND_OPT
GND_OPT
C16
W32
G35D-DB
AH33 GND GND G2
AH5 G22 [22,51] NVVDDPG
AH7
AJ7
GND
GND
GND
GND
GND
GND
G25
G28
Optional CMD GNDs (2)
NC for 4-Lyr cards NVVDD POWER GOOD LOOPBACK
AK10 G3
AK7
AL12
GND
GND
GND
GND G30
G32
Overt temp ckt for NVVDD and NVVDDS
GPU All power good
GND GND
AL14 GND GND G33
AL15 GND GND G5
AL17 GND GND G7
AL18 GND GND K2
AL2 GND GND K28 1V8_AON
AL20 GND GND K30
AL21 K32
C
AL23
GND
GND
GND
GND K33 20160527 C

AL24 GND GND K5

AL26 GND GND K7 R12064 1V8_AON
AL28 GND GND M13 10K_4
AL30 M15
for GC6
GND GND D8514
AL32 GND GND M17
AL33 GND GND M18 1 R12066
AL5 M20 [22,51] NVVDDPG 3 1V8_AON
GND GND 10K_4
PS_FBVDD_PGOOD
AM13 GND GND M22 2
AM16 GND GND N12 1V8_AON
DGPU_PWROK
AM19 GND GND N14 Ca
AM22 N16 BAT54AW-L DGPU_PWROK [19,21]
GND GND R12065

3
C14021 1V8_AON 10K_4
1V8_AON 1V8_AON
0.1U/16V_4 Rb
R1176 *10K_4 U8513 2
U8514

3
*NL17SZ08DFT2G

5
NVVDDSPG 1 *NL17SZ08DFT2G Q7732
2 [22] NVVDDSPG 4 1
PEX_VDD_PG C8794 DMG1012T-7
4 PEX_VDD_PG [22,55] 2 4 2 *0.1U/16V_4
[54] FBVDD_EN [22,55] PEX_VDD_PG

1
1 2
GC6FBEN [21,22]
U1004

3
74LVC1G32GW Q7731

3
Ua DMG1012T-7

1
PS_FBVDD_PGOOD
20160524
[22,54] PS_FBVDD_PGOOD

INS44781933
U10K
?
COMMON
*N17P-G0-A1

For Power off sequence

4/17 NC

AC6 NC INS44782813
AG10 NC U10O
?
AG12 NC
COMMON
*N17P-G0-A1
AG26 NC
1V8_MAIN 11/17 XTAL_PLL
B AG7 NC
B
CORE_PLLVDD
AJ11 NC L1002 1 2HCB1005KF-330T30 AD8 XS_PLLVDD
AJ26 H26 +1.8V
AJ28
AJ4
NC
NC 0.4A C8978 C8792 C1068 C1069
CORE_PLLVDD
AE8
GPCPLL_AVDD
SP_PLLVDD 1V8_AON
NC
AJ5 22U/6.3V_6 4.7U/6.3V_4 0.1U/16V_4 0.1U/16V_4 AD7

C1065

C1066
NC VID_PLLVDD
AK26 U8517
NC

5
AK9 NC NL17SZ08DFT2G
DGPU_PWR_EN
AL10 NC 2 1
AL11 4 4 DGPU_PWR_EN [9]
NC [55] 1V8_AON_EN [22,55] PEXVDD_EN
AL9 NC 1 PS_FBVDD_PGOOD [22,54] 2

0.1U/16V_4

0.1U/16V_4
AM9 H1 J4 NVVDDPG [22,51]
NC XTALSSIN XTAL_SSIN XTAL_OUTBUFF XTALOUTBUFF U8516
AN2 NC 74LVC1G32GW

3
AN9 NC VGA_XTALIN VGA_XTALOUT
AP8 NC H3 XTAL_IN XTAL_OUT H2
C15 NC
D19 NC
D20 NC
D23 NC
D26 NC
V32 NC +3V
90 ohms +/- 15%
Differential Impedance
VGA_XTALIN
R12176 *10K_4 1V8_AON
VGA_XTALOUT

2
XTALOUTBUFF
XTALSSIN
Y1000 NVVDD_CORE1_EN
R12177 *10K_4 1 3
+3V NVVDD_CORE1_EN [22,51]
2 4 Q7752 *SMD DTC144EUA
1 3

27MHZ/10ppm R1086 R1085

C1072 C1073 10K_4 10K_4
10p/50V_4 10p/50V_4

A A

PROJECT : NLA
Quanta Computer Inc.
Size Document Number Rev
N17P-G0-A1-4/9 1A

Custom Date: Monday, April 09, 2018 Sheet 22 of 56

5 4 3 2 1
 5 4 3 2 1

23
INS44785174
U10D
? INS44785556
COMMON
*N17P-G0-A1 ? [22,51,52] NVVDD
13/17 NVVDD U10E
COMMON
NVVDD FBVDDQ_MEM *N17P-G0-A1
14/17 FBVDDQ
AA14 VDD
AA21 VDD AA27 FBVDDQ
NVVDD
AB13 VDD AA30 FBVDDQ
AB15 AB27

Near GPU
VDD FBVDDQ
AB17 VDD AB33 FBVDDQ
AB18 VDD AC27 FBVDDQ
AB20 VDD AD27 FBVDDQ
D AB22 VDD AE27 FBVDDQ C8906 *330u/2.5V_3528 D
AC12 VDD AF27 FBVDDQ
NVVDD

+
INS44784827
AC16 VDD AG27 FBVDDQ
NVVDD U10G
?
AC19 VDD B13 FBVDDQ *N17P-G0-A1
COMMON

AC23 VDD B16 FBVDDQ 8/17 VDDS

M12 B19

Near GPU
VDD FBVDDQ
M16 VDD E13 FBVDDQ AA12 VDDS C8902 10U/6.3V_4
M19 VDD E16 FBVDDQ AA16 VDDS C8899 10U/6.3V_4
M23 VDD E19 FBVDDQ AA19 VDDS
N13 VDD H10 FBVDDQ C8833 330u/2.5V_3528 AA23 VDDS C9178 22U/6.3V_6
N15 VDD H11 FBVDDQ AC14 VDDS C9179 22U/6.3V_6

+
N17 H12 AC21
Under GPU
VDD FBVDDQ C8834 *330u/2.5V_3528 VDDS C9180 22U/6.3V_6
N18 VDD H13 FBVDDQ M14 VDDS

+
N20 VDD H14 FBVDDQ M21 VDDS
N22 VDD H15 FBVDDQ P12 VDDS
P14 VDD H16 FBVDDQ P16 VDDS
P21 VDD H18 FBVDDQ C8876 22U/6.3V_6 C8845 1U/6.3V_4 P19 VDDS
R13 H19 P23
Under GPU
VDD FBVDDQ C8877 22U/6.3V_6 C8846 1U/6.3V_4 VDDS
R15 VDD H20 FBVDDQ C8878 22U/6.3V_6 C8848 1U/6.3V_4 T14 VDDS
R17 VDD H21 FBVDDQ C8879 22U/6.3V_6 C8847 1U/6.3V_4 T21 VDDS
R18 VDD H22 FBVDDQ C9146 22U/6.3V_6 C8849 1U/6.3V_4 U17 VDDS C8884 1U/6.3V_4
R20 VDD H23 FBVDDQ C9147 22U/6.3V_6 C8850 1U/6.3V_4 V18 VDDS C8883 1U/6.3V_4
R22 VDD H24 FBVDDQ C9148 22U/6.3V_6 C8852 1U/6.3V_4 W14 VDDS C8885 1U/6.3V_4
T12 VDD H8 FBVDDQ C8851 1U/6.3V_4 W21 VDDS C8886 1U/6.3V_4
T16 VDD H9 FBVDDQ C8854 *1U/6.3V_4 C8888 1U/6.3V_4
T19 VDD L27 FBVDDQ C8875 10U/6.3V_4
T23 VDD M27 FBVDDQ C8865 10U/6.3V_4 11/25 moddify
U13 VDD N27 FBVDDQ C8866 10U/6.3V_4 C9157 4.7U/6.3V_4 VDDS_SENSE U1 TP9168
U15 VDD P27 FBVDDQ C9159 4.7U/6.3V_4 C9173 10U/6.3V_4
U18 VDD R27 FBVDDQ C9160 4.7U/6.3V_4 GNDS_SENSE U2 TP9169 C9174 10U/6.3V_4
U20 VDD T27 FBVDDQ C9149 10U/6.3V_4 C9163 4.7U/6.3V_4 C9175 10U/6.3V_4
C U22 VDD T30 FBVDDQ C9150 10U/6.3V_4 C9162 4.7U/6.3V_4 C9177 4.7U/6.3V_4 C
V13 VDD T33 FBVDDQ C9151 10U/6.3V_4 C9165 4.7U/6.3V_4
V15 VDD V27 FBVDDQ C9152 10U/6.3V_4 C9167 4.7U/6.3V_4
V17 VDD W27 FBVDDQ C9153 10U/6.3V_4 C9168 4.7U/6.3V_4 C9176 4.7U/6.3V_4
V20 VDD W30 FBVDDQ C9154 10U/6.3V_4
V22 VDD W33 FBVDDQ 4/28 change to 0402 package due to
W12 Y27 11/25 moddify C9156 4.7U/6.3V_4
W16
VDD FBVDDQ
C9158 4.7U/6.3V_4
placement concern, only for G37D.
VDD
W19 VDD C9164 4.7U/6.3V_4
W23 VDD C9169 4.7U/6.3V_4
Y13 VDD C9161 4.7U/6.3V_4
Y15 VDD C9155 4.7U/6.3V_4
Y17 VDD C9166 4.7U/6.3V_4
Y18 F1 FBVDDQ_SENSE C9170 4.7U/6.3V_4
VDD FBVDDQ_SENSE FBVDDQ_SENSE [54]
Y20 VDD
Y22 F2 FB_GND_SENSE TP8568
VDD PROBE_FB_GND 4/28 change to 0402 package due to
J27 FB_CAL_PD_VDDQ R12164 40.2/F_4
placement concern, only for G37D.
FB_CAL_PD_VDDQ FBVDDQ_MEM
H27 FB_CAL_PU_GND R12165 40.2/F_4
FB_CAL_PU_GND

H25 FB_CAL_TERM_GND R12166 60.4/F_4

FB_CALTERM_GND

PLACE CLOSE TO GPU BALLS INS44785429

?
U10F
COMMON
*N17P-G0-A1
17/17 VDD18/AON
1V8_AON

L4
B
VDD_SENSE VGPU_CORE_SENSE [51]
J8
Under GPU Near GPU B
1V8_AON
GND_SENSE L5 1V8_AON K8
VSS_GPU_SENSE [51]

VDD18 L8 C9145 C9144 C9130

1V8_MAIN
VDD18 M8 0.1U/16V_4 0.1U/16V_4 C9140 1u/6.3V_4
4.7U/6.3V_4

C9134 1u/6.3V_4

C9139 4.7U/6.3V_4 Near GPU

C9129 0.1U/16V_4
C9136 0.1U/16V_4

Under GPU

A A

PROJECT : NLA
Quanta Computer Inc.
Size Document Number Re v
N17P-G0-A1-5/9 1A

Custom Date: Monday, April 09, 2018 Sheet 23 of 56

5 4 3 2 1
 5 4 3 2 1

CHANNEL A: 2G/4G GDDR5 [20,22,23,25,54] FBVDDQ_MEM

24
Channel 0 Channel 1
<0-31> <32-63>
MF=0 Non-mirrored MF=1 mirrored FBVDDQ_MEM
FBVDDQ_MEM
[20] VMA_DQ[31..0] [20] VMA_DQ[63..32]
VRAM1000 VRAM1001
VMA_DQ31 M2 B1 C8982 22U/6.3V_6 VMA_DQ39 M2 B1 C8999 22U/6.3V_6
VMA_DQ30 M4 DQ31 | DQ7 VDDQ-B1 B3 C8781 22U/6.3V_6 VMA_DQ38 M4 DQ31 | DQ7 VDDQ-B1 B3 C8996 22U/6.3V_6
VMA_DQ29 N2 DQ30 | DQ6 VDDQ-B3 B12 C8981 22U/6.3V_6 VMA_DQ37 N2 DQ30 | DQ6 VDDQ-B3 B12 C8991 22U/6.3V_6

QD24~31
D VMA_DQ28 DQ29 | DQ5 VDDQ-B12 VMA_DQ36 DQ29 | DQ5 VDDQ-B12 D
N4 B14 C8783 22U/6.3V_6 N4 B14 C8997 22U/6.3V_6
VMA_DQ27
VMA_DQ26
VMA_DQ25
VMA_DQ24
T2
T4
U2
DQ28 | DQ4
DQ27 | DQ3
DQ26 | DQ2
DQ25 | DQ1
VDDQ-B14
VDDQ-D1
VDDQ-D3
VDDQ-D12
D1
D3
D12
C8784 22U/6.3V_6
QD32~39 VMA_DQ35
VMA_DQ34
VMA_DQ33
VMA_DQ32
T2
T4
U2
DQ28 | DQ4
DQ27 | DQ3
DQ26 | DQ2
DQ25 | DQ1
VDDQ-B14
VDDQ-D1
VDDQ-D3
VDDQ-D12
D1
D3
D12
C8998 22U/6.3V_6

U4 D14 C8983 1u/6.3V_4 U4 D14 C9000 1u/6.3V_4

VMA_DQ23 M13 DQ24 | DQ0 VDDQ-D14 E5 C8985 1u/6.3V_4 VMA_DQ47 M13 DQ24 | DQ0 VDDQ-D14 E5 C9002 1u/6.3V_4
VMA_DQ22 M11 DQ23 | DQ15 VDDQ-E5 E10 C8984 1u/6.3V_4 VMA_DQ46 M11 DQ23 | DQ15 VDDQ-E5 E10 C9001 1u/6.3V_4
VMA_DQ21 N13 DQ22 | DQ14 VDDQ-E10 F1 C8986 1u/6.3V_4 VMA_DQ45 N13 DQ22 | DQ14 VDDQ-E10 F1 C9003 1u/6.3V_4

QD16~23 VMA_DQ20
VMA_DQ19
VMA_DQ18
VMA_DQ17
N11
T13
T11
DQ21 | DQ13
DQ20 | DQ12
DQ19 | DQ11
DQ18 | DQ10
VDDQ-F1
VDDQ-F3
VDDQ-F12
VDDQ-F14
F3
F12
F14
C1230
C1232
1u/6.3V_4
1u/6.3V_4 QD40~47
VMA_DQ44
VMA_DQ43
VMA_DQ42
VMA_DQ41
N11
T13
T11
DQ21 | DQ13
DQ20 | DQ12
DQ19 | DQ11
DQ18 | DQ10
VDDQ-F1
VDDQ-F3
VDDQ-F12
VDDQ-F14
F3
F12
F14
C8992
C8994
1u/6.3V_4
1u/6.3V_4
U13 G2 C1234 1u/6.3V_4 U13 G2 C8993 1u/6.3V_4
VMA_DQ16 U11 DQ17 | DQ9 VDDQ-G2 G13 C1236 1u/6.3V_4 VMA_DQ40 U11 DQ17 | DQ9 VDDQ-G2 G13 C8995 1u/6.3V_4
VMA_DQ15 F13 DQ16 | DQ8 VDDQ-G13 H3 VMA_DQ55 F13 DQ16 | DQ8 VDDQ-G13 H3
VMA_DQ14 F11 DQ15 | DQ23 VDDQ-H3 H12 C8987 10U/6.3V_4 VMA_DQ54 F11 DQ15 | DQ23 VDDQ-H3 H12 C9004 10U/6.3V_4
VMA_DQ13 E13 DQ14 | DQ22 VDDQ-H12 K3 C8988 10U/6.3V_4 VMA_DQ53 E13 DQ14 | DQ22 VDDQ-H12 K3 C9005 10U/6.3V_4

QD8~15 VMA_DQ12
VMA_DQ11
E11
B13
DQ13 | DQ21
DQ12 | DQ20
VDDQ-K3
VDDQ-K12
K12
L2
C8989
C8990
*22U/6.3V_6
*22U/6.3V_6
VMA_DQ52
VMA_DQ51
E11
B13
DQ13 | DQ21
DQ12 | DQ20
VDDQ-K3
VDDQ-K12
K12
L2
C9006
C9007
*22U/6.3V_6
*22U/6.3V_6
VMA_DQ10
VMA_DQ9
VMA_DQ8
VMA_DQ7
B11
A13
A11
DQ11 | DQ19
DQ10 | DQ18
DQ9 | DQ17
DQ8 | DQ16
VDDQ-L2
VDDQ-L13
VDDQ-M1
VDDQ-M3
L13
M1
M3
QD48~55 VMA_DQ50
VMA_DQ49
VMA_DQ48
VMA_DQ63
B11
A13
A11
DQ11 | DQ19
DQ10 | DQ18
DQ9 | DQ17
DQ8 | DQ16
VDDQ-L2
VDDQ-L13
VDDQ-M1
VDDQ-M3
L13
M1
M3
F2 M12 F2 M12
VMA_DQ6 F4 DQ7 | DQ31 VDDQ-M12 M14 VMA_DQ62 F4 DQ7 | DQ31 VDDQ-M12 M14
VMA_DQ5 E2 DQ6 | DQ30 VDDQ-M14 N5 VMA_DQ61 E2 DQ6 | DQ30 VDDQ-M14 N5

QD0~7 VMA_DQ4
VMA_DQ3
E4
B2
DQ5 | DQ29
DQ4 | DQ28
VDDQ-N5
VDDQ-N10
N10
P1
VMA_DQ60
VMA_DQ59
E4
B2
DQ5 | DQ29
DQ4 | DQ28
VDDQ-N5
VDDQ-N10
N10
P1
VMA_DQ2
VMA_DQ1
VMA_DQ0
B4
A2
A4
DQ3 | DQ27
DQ2 | DQ26
DQ1 | DQ25
DQ0 | DQ24
VDDQ-P1
VDDQ-P3
VDDQ-P12
VDDQ-P14
P3
P12
P14
QD56~63 VMA_DQ58
VMA_DQ57
VMA_DQ56
B4
A2
A4
DQ3 | DQ27
DQ2 | DQ26
DQ1 | DQ25
DQ0 | DQ24
VDDQ-P1
VDDQ-P3
VDDQ-P12
VDDQ-P14
P3
P12
P14
T1 T1
VDDQ-T1 T3 VDDQ-T1 T3
VDDQ-T3 T12 VDDQ-T3 T12
VDDQ-T12 T14 VDDQ-T12 T14
VDDQ-T14 VDDQ-T14
FBA_CMD9 J5 FBA_CMD25 J5
[20] FBA_CMD9 FBA_CMD6 RFU/A12/NC [20] FBA_CMD25 FBA_CMD26 RFU/A12/NC
K4 C5 K4 C5
[20] FBA_CMD6 FBA_CMD7 A7/A8 | A0/A10 VDD-C5 [20] FBA_CMD26 FBA_CMD27 A7/A8 | A0/A10 VDD-C5
K5 C10 [20] FBA_CMD27 K5 C10
[20] FBA_CMD7 FBA_CMD4 A6/A11 | A1/A9 VDD-C10 FBA_CMD17 A6/A11 | A1/A9 VDD-C10
K10 D11 K10 D11
[20] FBA_CMD4 FBA_CMD3 K11 A5/BA1 | A3/BA3 VDD-D11 G1 [20] FBA_CMD17 FBA_CMD18 K11 A5/BA1 | A3/BA3 VDD-D11 G1
[20] FBA_CMD3 FBA_CMD1 H10 A4/BA2 | A2/BA0 VDD-G1 G4 [20] FBA_CMD18 FBA_CMD20 H10 A4/BA2 | A2/BA0 VDD-G1 G4
[20] FBA_CMD1 FBA_CMD2 A3/BA3 | A5/BA1 VDD-G4 [20] FBA_CMD20 FBA_CMD19 A3/BA3 | A5/BA1 VDD-G4
H11 G11 H11 G11
[20] FBA_CMD2 FBA_CMD11 A2 /BA0 | A4/BA2 VDD-G11 [20] FBA_CMD19 FBA_CMD23 A2 /BA0 | A4/BA2 VDD-G11
H5 G14 H5 G14
[20] FBA_CMD11 FBA_CMD10 A1/A9 | A6/A11 VDD-G14 [20] FBA_CMD23 FBA_CMD22 A1/A9 | A6/A11 VDD-G14
H4 L1 [20] FBA_CMD22 H4 L1
[20] FBA_CMD10 A0/A10 | A7/A8 VDD-L1 L4 A0/A10 | A7/A8 VDD-L1 L4
VDD-L4 L11 VDD-L4 L11
VDD-L11 L14 VDD-L11 L14
VMA_WCK01 D4 VDD-L14 P11 VMA_WCK67 D4 VDD-L14 P11
C [20] VMA_WCK01 VMA_WCK01# WCK01 | WCK23 VDD-P11 [20] VMA_WCK67 VMA_WCK67# WCK01 | WCK23 VDD-P11 C
D5 R5 [20] VMA_WCK67# D5 R5
[20] VMA_WCK01# WCK01# | WCK23# VDD-R5 R10 WCK01# | WCK23# VDD-R5 R10
VMA_WCK23 P4 VDD-R10 VMA_WCK45 P4 VDD-R10
[20] VMA_WCK23 VMA_WCK23# WCK23 | WCK01 [20] VMA_WCK45 VMA_WCK45# WCK23 | WCK01
P5 P5
[20] VMA_WCK23# WCK23# | WCK01# [20] VMA_WCK45# WCK23# | WCK01#
A1 A1
FBA_EDC3 R2 VSSQ-A1 A3 FBA_EDC4 R2 VSSQ-A1 A3
[20] FBA_EDC3 FBA_EDC2 EDC3 | EDC0 VSSQ-A3 [20] FBA_EDC4 FBA_EDC5 EDC3 | EDC0 VSSQ-A3
R13 A12 R13 A12
[20] FBA_EDC2 FBA_EDC1 EDC2 | EDC1 VSSQ-A12 [20] FBA_EDC5 FBA_EDC6 EDC2 | EDC1 VSSQ-A12
C13 A14 C13 A14
[20] FBA_EDC1 FBA_EDC0 EDC1 | EDC2 VSSQ-A14 [20] FBA_EDC6 FBA_EDC7 EDC1 | EDC2 VSSQ-A14
C2 C1 C2 C1
[20] FBA_EDC0 EDC0 | EDC3 VSSQ-C1 [20] FBA_EDC7 EDC0 | EDC3 VSSQ-C1
C3 C3
FBA_DBI3 P2 VSSQ-C3 C4 FBA_DBI4 P2 VSSQ-C3 C4
[20] FBA_DBI3 FBA_DBI2 DBI3# | DBI0# VSSQ-C4 [20] FBA_DBI4 FBA_DBI5 DBI3# | DBI0# VSSQ-C4
P13 C11 P13 C11
[20] FBA_DBI2 FBA_DBI1 DBI2 #| DBI1# VSSQ-C11 [20] FBA_DBI5 FBA_DBI6 DBI2 #| DBI1# VSSQ-C11
D13 C12 D13 C12
[20] FBA_DBI1 FBA_DBI0 DBI1# | DBI2# VSSQ-C12 [20] FBA_DBI6 FBA_DBI7 DBI1# | DBI2# VSSQ-C12
D2 C14 D2 C14
[20] FBA_DBI0 DBI0# | DBI3# VSSQ-C14 [20] FBA_DBI7 DBI0# | DBI3# VSSQ-C14
E1 E1
VSSQ-E1 E3 VSSQ-E1 E3
VSSQ-E3 E12 VSSQ-E3 E12
FBA_CMD12 G3 VSSQ-E12 E14 FBA_CMD31 G3 VSSQ-E12 E14
[20] FBA_CMD12 FBA_CMD15 RAS# | CAS# VSSQ-E14 [20] FBA_CMD31 FBA_CMD28 RAS# | CAS# VSSQ-E14
L3 F5 L3 F5
[20] FBA_CMD15 CAS# | RAS# VSSQ-F5 [20] FBA_CMD28 CAS# | RAS# VSSQ-F5
F10 F10
VSSQ-F10 C8725 VSSQ-F10
H2 H2
C8724 FBA_CMD14 J3 VSSQ-H2 H13 VMA_CLK1# FBA_CMD30 J3 VSSQ-H2 H13
40.2/F_4 R12042 [20] FBA_CMD30
VMA_CLK0# [20] FBA_CMD14 VMA_CLK0# J11 CKE# VSSQ-H13 K2 VMA_CLK1# J11 CKE# VSSQ-H13 K2
40.2/F_4 R8636
[20] VMA_CLK0# VMA_CLK0 CK# VSSQ-K2 [20] VMA_CLK1# VMA_CLK1 CK# VSSQ-K2
J12 K13 J12 K13
[20] VMA_CLK0 CK VSSQ-K13 0.01u/50V_4 [20] VMA_CLK1
M5 40.2/F_4 R12041 VMA_CLK1 CK VSSQ-K13 M5
0.01u/50V_4 40.2/F_4 R8635 VMA_CLK0 VSSQ-M5 M10 VSSQ-M5 M10
FBA_CMD0 G12 VSSQ-M10 N1 FBA_CMD21 G12 VSSQ-M10 N1
[20] FBA_CMD0 FBA_CMD5 CS# | WE# VSSQ-N1 [20] FBA_CMD21 FBA_CMD16 CS# | WE# VSSQ-N1
L12 N3 L12 N3
[20] FBA_CMD5 WE# | CS# VSSQ-N3 [20] FBA_CMD16 WE# | CS# VSSQ-N3
N12 N12
VSSQ-N12 N14 VSSQ-N12 N14
R124550 120/F_4 J13 VSSQ-N14 R1 R1092 120/F_4 J13 VSSQ-N14 R1
R12025 *0_4/S SEN_A0 J10 ZQ VSSQ-R1 R3 R12026 *0_4/S SEN_A2 J10 ZQ VSSQ-R1 R3
2017/1/4 Modify SEN VSSQ-R3 R4 2017/1/4 Modify SEN VSSQ-R3 R4
VSSQ-R4 R11 VSSQ-R4 R11
FBA_CMD13 J2 VSSQ-R11 R12 FBA_CMD29 J2 VSSQ-R11 R12
[20] FBA_CMD13 RESET# VSSQ-R12 [20] FBA_CMD29 RESET# VSSQ-R12
J1 R14 FBVDDQ_MEM J1 R14
R1096 1K_4 MF VSSQ-R14 U1 R1097 1K_4 MF VSSQ-R14 U1
VSSQ-V1 U3 VSSQ-V1 U3
VSSQ-V3 U12 VSSQ-V3 U12
VSSQ-V12 U14 VSSQ-V12 U14
A5 VSSQ-V14 A5 VSSQ-V14
U5 Vpp,NC U5 Vpp,NC
FBVDDQ_MEM Vpp,NC1 B5 Vpp,NC1 B5
A10 VSS-B5 B10 A10 VSS-B5 B10
U10 VREFD1 VSS-B10 D10 U10 VREFD1 VSS-B10 D10
VREFD2 VSS-D10 G5 VREFD2 VSS-D10 G5
R124552 VSS-G5 G10 VSS-G5 G10
B VSS-G10 VSS-G10 B
549/F_4 H1 H1
VSS-H1 H14 VSS-H1 H14
VREFC_VMA1 0.4MM=16mils
VSS-H14 K1 VSS-H14 K1
FBA_VREFC J14 VSS-K1 K14 FBA_VREFC J14 VSS-K1 K14
VREFC VSS-K14 L5 VREFC VSS-K14 L5
VSS-L5 L10 VSS-L5 L10
R1108 R124554 VSS-L10 P10 VSS-L10 P10
1.33K/F_4 931/F_4 C1206 FBA_CMD8 J4 VSS-P10 T5 FBA_CMD24 J4 VSS-P10 T5
[20] FBA_CMD8 ABI# VSS-T5 [20] FBA_CMD24 ABI# VSS-T5
820p/50V_4 T10 C8713 T10
VSS-T10 820p/50V_4 VSS-T10

*GDDR5 VRAM1000 *GDDR5 VRAM1001

MEM_VREF_CTL_QA
3

MEM_VREF_CTL 2
[21,25] MEM_VREF_CTL
DMG1012T-7

Q7721
1

A A

PROJECT : NLA
Quanta Computer Inc.
Size Document Number Rev
N17P-G0-A1-6/9 1A

Custom Date: Monday, April 09, 2018 Sheet 24 of 56

5 4 3 2 1
 5 4 3 2 1

CHANNEL B: 2G/4G GDDR5 [20,22,23,24,54] FBVDDQ_MEM

25
Channel 0 Channel 1
<0-31> <32-63>
MF=0 Non-mirrored MF=1 mirrored
FBVDDQ_MEM FBVDDQ_MEM
[20] VMB_DQ[31..0] [20] VMB_DQ[63..32]
VRAM1002 VRAM1003
VMB_DQ31 M2 B1 C9016 22U/6.3V_6 VMB_DQ39 M2 B1 C9033 22U/6.3V_6
VMB_DQ30 M4 DQ31 | DQ7 VDDQ-B1 B3 C9014 22U/6.3V_6 VMB_DQ38 M4 DQ31 | DQ7 VDDQ-B1 B3 C9031 22U/6.3V_6
D VMB_DQ29 DQ30 | DQ6 VDDQ-B3 VMB_DQ37 DQ30 | DQ6 VDDQ-B3 D
N2 B12 C9008 22U/6.3V_6 N2 B12 C9025 22U/6.3V_6

QD24~31 VMB_DQ28
VMB_DQ27
VMB_DQ26
VMB_DQ25
N4
T2
T4
DQ29 | DQ5
DQ28 | DQ4
DQ27 | DQ3
DQ26 | DQ2
VDDQ-B12
VDDQ-B14
VDDQ-D1
VDDQ-D3
B14
D1
D3
C9013
C9015
22U/6.3V_6
22U/6.3V_6
QD32~39
VMB_DQ36
VMB_DQ35
VMB_DQ34
VMB_DQ33
N4
T2
T4
DQ29 | DQ5
DQ28 | DQ4
DQ27 | DQ3
DQ26 | DQ2
VDDQ-B12
VDDQ-B14
VDDQ-D1
VDDQ-D3
B14
D1
D3
C9030
C9032
22U/6.3V_6
22U/6.3V_6

U2 D12 U2 D12
VMB_DQ24 U4 DQ25 | DQ1 VDDQ-D12 D14 C9018 1u/6.3V_4 VMB_DQ32 U4 DQ25 | DQ1 VDDQ-D12 D14 C9035 1u/6.3V_4
VMB_DQ23 M13 DQ24 | DQ0 VDDQ-D14 E5 C9020 1u/6.3V_4 VMB_DQ47 M13 DQ24 | DQ0 VDDQ-D14 E5 C9037 1u/6.3V_4
VMB_DQ22 M11 DQ23 | DQ15 VDDQ-E5 E10 C9017 1u/6.3V_4 VMB_DQ46 M11 DQ23 | DQ15 VDDQ-E5 E10 C9034 1u/6.3V_4
VMB_DQ21 N13 DQ22 | DQ14 VDDQ-E10 F1 C9019 1u/6.3V_4 VMB_DQ45 N13 DQ22 | DQ14 VDDQ-E10 F1 C9036 1u/6.3V_4

QD16~23 VMB_DQ20
VMB_DQ19
VMB_DQ18
VMB_DQ17
N11
T13
T11
DQ21 | DQ13
DQ20 | DQ12
DQ19 | DQ11
DQ18 | DQ10
VDDQ-F1
VDDQ-F3
VDDQ-F12
VDDQ-F14
F3
F12
F14
C9010
C9012
1u/6.3V_4
1u/6.3V_4 QD40~47
VMB_DQ44
VMB_DQ43
VMB_DQ42
VMB_DQ41
N11
T13
T11
DQ21 | DQ13
DQ20 | DQ12
DQ19 | DQ11
DQ18 | DQ10
VDDQ-F1
VDDQ-F3
VDDQ-F12
VDDQ-F14
F3
F12
F14
C9027
C9029
1u/6.3V_4
1u/6.3V_4
U13 G2 C9009 1u/6.3V_4 U13 G2 C9026 1u/6.3V_4
VMB_DQ16 U11 DQ17 | DQ9 VDDQ-G2 G13 C9011 1u/6.3V_4 VMB_DQ40 U11 DQ17 | DQ9 VDDQ-G2 G13 C9028 1u/6.3V_4
VMB_DQ15 F13 DQ16 | DQ8 VDDQ-G13 H3 VMB_DQ55 F13 DQ16 | DQ8 VDDQ-G13 H3
VMB_DQ14 F11 DQ15 | DQ23 VDDQ-H3 H12 C9021 10U/6.3V_4 VMB_DQ54 F11 DQ15 | DQ23 VDDQ-H3 H12 C9038 10U/6.3V_4
VMB_DQ13 E13 DQ14 | DQ22 VDDQ-H12 K3 C9022 10U/6.3V_4 VMB_DQ53 E13 DQ14 | DQ22 VDDQ-H12 K3 C9039 10U/6.3V_4

QD8~15 VMB_DQ12
VMB_DQ11
VMB_DQ10
VMB_DQ9
E11
B13
B11
DQ13 | DQ21
DQ12 | DQ20
DQ11 | DQ19
DQ10 | DQ18
VDDQ-K3
VDDQ-K12
VDDQ-L2
VDDQ-L13
K12
L2
L13
C9023
C9024
*22U/6.3V_6
*22U/6.3V_6
QD48~55
VMB_DQ52
VMB_DQ51
VMB_DQ50
VMB_DQ49
E11
B13
B11
DQ13 | DQ21
DQ12 | DQ20
DQ11 | DQ19
DQ10 | DQ18
VDDQ-K3
VDDQ-K12
VDDQ-L2
VDDQ-L13
K12
L2
L13
C9040
C9041
*22U/6.3V_6
*22U/6.3V_6

A13 M1 A13 M1
VMB_DQ8 A11 DQ9 | DQ17 VDDQ-M1 M3 VMB_DQ48 A11 DQ9 | DQ17 VDDQ-M1 M3
VMB_DQ7 F2 DQ8 | DQ16 VDDQ-M3 M12 VMB_DQ63 F2 DQ8 | DQ16 VDDQ-M3 M12
VMB_DQ6 F4 DQ7 | DQ31 VDDQ-M12 M14 VMB_DQ62 F4 DQ7 | DQ31 VDDQ-M12 M14

QD0~7 VMB_DQ5
VMB_DQ4
E2
E4
DQ6 | DQ30
DQ5 | DQ29
VDDQ-M14
VDDQ-N5
N5
N10
VMB_DQ61
VMB_DQ60
E2
E4
DQ6 | DQ30
DQ5 | DQ29
VDDQ-M14
VDDQ-N5
N5
N10
VMB_DQ3
VMB_DQ2
VMB_DQ1
VMB_DQ0
B2
B4
A2
DQ4 | DQ28
DQ3 | DQ27
DQ2 | DQ26
DQ1 | DQ25
VDDQ-N10
VDDQ-P1
VDDQ-P3
VDDQ-P12
P1
P3
P12
QD56~63 VMB_DQ59
VMB_DQ58
VMB_DQ57
VMB_DQ56
B2
B4
A2
DQ4 | DQ28
DQ3 | DQ27
DQ2 | DQ26
DQ1 | DQ25
VDDQ-N10
VDDQ-P1
VDDQ-P3
VDDQ-P12
P1
P3
P12
A4 P14 A4 P14
DQ0 | DQ24 VDDQ-P14 T1 DQ0 | DQ24 VDDQ-P14 T1
VDDQ-T1 T3 VDDQ-T1 T3
VDDQ-T3 T12 VDDQ-T3 T12
VDDQ-T12 T14 VDDQ-T12 T14
VDDQ-T14 VDDQ-T14
FBB_CMD9 J5 FBB_CMD25 J5
[20] FBB_CMD9 FBB_CMD6 RFU/A12/NC [20] FBB_CMD25 FBB_CMD26 RFU/A12/NC
K4 C5 K4 C5
[20] FBB_CMD6 FBB_CMD7 A7/A8 | A0/A10 VDD-C5 [20] FBB_CMD26 FBB_CMD27 A7/A8 | A0/A10 VDD-C5
K5 C10 K5 C10
[20] FBB_CMD7 FBB_CMD4 K10 A6/A11 | A1/A9 VDD-C10 D11 [20] FBB_CMD27 FBB_CMD17 K10 A6/A11 | A1/A9 VDD-C10 D11
[20] FBB_CMD4 FBB_CMD3 K11 A5/BA1 | A3/BA3 VDD-D11 G1 [20] FBB_CMD17 FBB_CMD18 K11 A5/BA1 | A3/BA3 VDD-D11 G1
[20] FBB_CMD3 FBB_CMD1 A4/BA2 | A2/BA0 VDD-G1 [20] FBB_CMD18 FBB_CMD20 A4/BA2 | A2/BA0 VDD-G1
H10 G4 H10 G4
[20] FBB_CMD1 FBB_CMD2 A3/BA3 | A5/BA1 VDD-G4 [20] FBB_CMD20 FBB_CMD19 A3/BA3 | A5/BA1 VDD-G4
H11 G11 H11 G11
[20] FBB_CMD2 FBB_CMD11 A2 /BA0 | A4/BA2 VDD-G11 [20] FBB_CMD19 FBB_CMD23 A2 /BA0 | A4/BA2 VDD-G11
H5 G14 H5 G14
[20] FBB_CMD11 FBB_CMD10 H4 A1/A9 | A6/A11 VDD-G14 L1 [20] FBB_CMD23 FBB_CMD22 H4 A1/A9 | A6/A11 VDD-G14 L1
[20] FBB_CMD10 A0/A10 | A7/A8 VDD-L1 L4 [20] FBB_CMD22 A0/A10 | A7/A8 VDD-L1 L4
VDD-L4 L11 VDD-L4 L11
VDD-L11 L14 VDD-L11 L14
C VMB_WCK01 VDD-L14 VMB_WCK67 VDD-L14 C
D4 P11 [20] VMB_WCK67 D4 P11
[20] VMB_WCK01 VMB_WCK01# D5 WCK01 | WCK23 VDD-P11 R5 VMB_WCK67# D5 WCK01 | WCK23 VDD-P11 R5
[20] VMB_WCK01# WCK01# | WCK23# VDD-R5 [20] VMB_WCK67# WCK01# | WCK23# VDD-R5
R10 R10
VMB_WCK23 P4 VDD-R10 VMB_WCK45 P4 VDD-R10
[20] VMB_WCK23 VMB_WCK23# WCK23 | WCK01 [20] VMB_WCK45 VMB_WCK45# WCK23 | WCK01
P5 [20] VMB_WCK45# P5
[20] VMB_WCK23# WCK23# | WCK01# WCK23# | WCK01#
A1 A1
FBB_EDC3 R2 VSSQ-A1 A3 FBB_EDC4 R2 VSSQ-A1 A3
[20] FBB_EDC3 FBB_EDC2 R13 EDC3 | EDC0 VSSQ-A3 A12 [20] FBB_EDC4 FBB_EDC5 R13 EDC3 | EDC0 VSSQ-A3 A12
[20] FBB_EDC2 FBB_EDC1 EDC2 | EDC1 VSSQ-A12 [20] FBB_EDC5 FBB_EDC6 EDC2 | EDC1 VSSQ-A12
C13 A14 C13 A14
[20] FBB_EDC1 FBB_EDC0 EDC1 | EDC2 VSSQ-A14 [20] FBB_EDC6 FBB_EDC7 EDC1 | EDC2 VSSQ-A14
C2 C1 C2 C1
[20] FBB_EDC0 EDC0 | EDC3 VSSQ-C1 [20] FBB_EDC7 EDC0 | EDC3 VSSQ-C1
C3 C3
FBB_DBI3 P2 VSSQ-C3 C4 FBB_DBI4 P2 VSSQ-C3 C4
[20] FBB_DBI3 FBB_DBI2 P13 DBI3# | DBI0# VSSQ-C4 C11 [20] FBB_DBI4 FBB_DBI5 P13 DBI3# | DBI0# VSSQ-C4 C11
[20] FBB_DBI2 FBB_DBI1 DBI2 #| DBI1# VSSQ-C11 [20] FBB_DBI5 FBB_DBI6 DBI2 #| DBI1# VSSQ-C11
D13 C12 D13 C12
[20] FBB_DBI1 FBB_DBI0 DBI1# | DBI2# VSSQ-C12 [20] FBB_DBI6 FBB_DBI7 DBI1# | DBI2# VSSQ-C12
D2 C14 D2 C14
[20] FBB_DBI0 DBI0# | DBI3# VSSQ-C14 [20] FBB_DBI7 DBI0# | DBI3# VSSQ-C14
E1 E1
VSSQ-E1 E3 VSSQ-E1 E3
VSSQ-E3 E12 VSSQ-E3 E12
FBB_CMD12 G3 VSSQ-E12 E14 FBB_CMD31 G3 VSSQ-E12 E14
[20] FBB_CMD12 FBB_CMD15 RAS# | CAS# VSSQ-E14 [20] FBB_CMD31 FBB_CMD28 RAS# | CAS# VSSQ-E14
L3 F5 L3 F5
[20] FBB_CMD15 CAS# | RAS# VSSQ-F5 [20] FBB_CMD28 CAS# | RAS# VSSQ-F5
F10 F10
VSSQ-F10 H2 VSSQ-F10 H2
C8723 FBB_CMD14 J3 VSSQ-H2 H13 C8726 FBB_CMD30 J3 VSSQ-H2 H13
VMB_CLK0# [20] FBB_CMD14 VMB_CLK0# CKE# VSSQ-H13 VMB_CLK1# [20] FBB_CMD30 VMB_CLK1# CKE# VSSQ-H13
40.2/F_4 R8638 J11 K2 40.2/F_4 R12043 J11 K2
[20] VMB_CLK0# VMB_CLK0 CK# VSSQ-K2 [20] VMB_CLK1# VMB_CLK1 CK# VSSQ-K2
J12 K13 J12 K13
[20] VMB_CLK0 CK VSSQ-K13 [20] VMB_CLK1 CK VSSQ-K13
M5 M5
0.01u/50V_4 40.2/F_4 R8637 VMB_CLK0 VSSQ-M5 M10 0.01u/50V_4 40.2/F_4 R12044 VMB_CLK1 VSSQ-M5 M10
FBB_CMD0 G12 VSSQ-M10 N1 FBB_CMD21 G12 VSSQ-M10 N1
[20] FBB_CMD0 FBB_CMD5 CS# | WE# VSSQ-N1 [20] FBB_CMD21 FBB_CMD16 CS# | WE# VSSQ-N1
L12 N3 L12 N3
[20] FBB_CMD5 WE# | CS# VSSQ-N3 [20] FBB_CMD16 WE# | CS# VSSQ-N3
N12 N12
VSSQ-N12 N14 VSSQ-N12 N14
R1114 120/F_4 J13 VSSQ-N14 R1 R124555 120/F_4 J13 VSSQ-N14 R1
R12030 *0_4/S SEN_B0 J10 ZQ VSSQ-R1 R3 R12031 *0_4/S SEN_B2 J10 ZQ VSSQ-R1 R3
2017/1/4 Modify SEN VSSQ-R3 R4 2017/1/4 Modify SEN VSSQ-R3 R4
VSSQ-R4 R11 VSSQ-R4 R11
FBB_CMD13 J2 VSSQ-R11 R12 FBB_CMD29 J2 VSSQ-R11 R12
[20] FBB_CMD13 J1 RESET# VSSQ-R12 R14 [20] FBB_CMD29 J1 RESET# VSSQ-R12 R14
MF VSSQ-R14 FBVDDQ_MEM MF VSSQ-R14
R1116 1K_4 U1 R124548 1K_4 U1
VSSQ-V1 U3 VSSQ-V1 U3
VSSQ-V3 U12 VSSQ-V3 U12
VSSQ-V12 U14 VSSQ-V12 U14
A5 VSSQ-V14 A5 VSSQ-V14
U5 Vpp,NC U5 Vpp,NC
FBVDDQ_MEM Vpp,NC1 B5 Vpp,NC1 B5
A10 VSS-B5 B10 A10 VSS-B5 B10
U10 VREFD1 VSS-B10 D10 U10 VREFD1 VSS-B10 D10
VREFD2 VSS-D10 G5 VREFD2 VSS-D10 G5
B VSS-G5 VSS-G5 B
G10 G10
R12027 VSS-G10 H1 VSS-G10 H1
VSS-H1 H14 VSS-H1 H14
549/F_4 VREFC_VMA1 0.4MM=16mils VREFC_VMB2 0.4MM=16mils
VSS-H14 K1 VSS-H14 K1
FBB_VREFC J14 VSS-K1 K14 FBB_VREFC J14 VSS-K1 K14
VREFC VSS-K14 L5 VREFC VSS-K14 L5
VSS-L5 L10 VSS-L5 L10
R12028 VSS-L10 P10 VSS-L10 P10
1.33K/F_4 C8714 FBB_CMD8 J4 VSS-P10 T5 FBB_CMD24 J4 VSS-P10 T5
[20] FBB_CMD8 ABI# VSS-T5 T10 [20] FBB_CMD24 ABI# VSS-T5 T10
R12029 820p/50V_4
931/F_4 VSS-T10 C8715 VSS-T10
820p/50V_4
*GDDR5 VRAM1002 *GDDR5 VRAM1003
3MEM_VREF_CTL_QB

MEM_VREF_CTL 2
[21,24] MEM_VREF_CTL
DMG1012T-7

Q7722
1

A A

PROJECT : NLA
Quanta Computer Inc.
Size Document Number Rev
N17P-G0-A1-7/9 1A

Custom Date: Monday, April 09, 2018 Sheet 25 of 56

5 4 3 2 1
 1 2 3 4 5 6 7 8

eDP Conn.
26
EDP_CONN

LID Switch 51519-0400t-v02-40p-l

DFFC40FR102
CN7000

42
+3VLCD_CON 40
D7000 INT_eDP_AUXP_C 39
C7001 22P/50V_4
R7001 PN_BLON 2 1 BLON_CON INT_eDP_AUXN_C 38

0.047U/25V_4

0.047U/25V_4
[38] EMU_LID 37
*Short_0402 R7002 100K/F_4
INT_eDP_TXN0_C 36
LVDS_BLON1 R7003 1K/F_4 RB500V-40 INT_eDP_TXP0_C 35
34
LVDS_BLON1 R7005 100K/F_4 INT_eDP_TXN1_C 33
A INT_eDP_TXP1_C 32 A
31

C7003

C7002
INT_eDP_TXN2_C 30
INT_eDP_TXP2_C 29
28
INT_eDP_TXN3_C 27
INT_eDP_TXP3_C 26
25
USBP5-_C 24
IR CAN USBP5+_C 23
R124544 ULT_EDP_HPD_R 22
[13] CPU_EDP_HPD +3.5V_CAM_IR_L 21
*Short_0402
20
19
18
17
+VIN_BLIGHT +3VLCD_CON 16
15
2A / 80mils USBP6-_C 14
USBP6+_C 13

+VIN L7000 *0_8/S +VIN_BLIGHT CAN 12

L7002 2 1 120/300MA DIGITAL_CLK_L 11
[28] DIGITAL_CLK DIGITAL_D1_L 10
2 1 120/300MA
C7005 0.1u/25V_4
MIC [28] DIGITAL_D1
L7003
+3V_CAM 9
8
C7006 0.01U/50V_4 L7516 7
*MCM2012B900GBE C7007 C7008 VADJ1 6
+VIN USBP5+ 4 3 USBP5+_L *10P/50V_4 *10P/50V_4 BLON_CON 5
USBP5- 1 2 USBP5-_L L7001 4
+VIN_BLIGHT 3
B
L2000 USBP6+ 1
*MCM2012B900GBE
2 USBP6+_L 2A/80mils 2
B

C7009 C7014 R5523 0_4 USBP5+_L 1 3 USBP5+_C USBP6- 4 3 USBP6-_L 1

[9] USBP5+

41
C7010 C7011 C7012 USB2_IN_P USB2_OUT_P
4.7U/25V_6 0.1u/25V_4 0.1u/25V_4 0.1u/25V_4 4.7U/25V_6 [9] USBP5- R5522 0_4 USBP5-_L 2 4 USBP5-_C
USB2_IN_N USB2_OUT_N
L2005
5 13 R124580 *0_4 USBP6+_L 1 3 USBP6+_C
C1_1 Via13 [9] USBP6+ USB2_IN_P USB2_OUT_P
6 14 R124579 *0_4 USBP6-_L 2 4 USBP6-_C
C2_1 Via14 [9] USBP6- USB2_IN_N USB2_OUT_N
7 15

C7700
18p/25V_2

C7701
18p/25V_2
C1_2 Via15 5 13
CAN 8
C2_2 Via16
16
6
C1_1

C2_1
Via13

Via14
14
23 17
Via23 Via17 7 15

C7702
*18p/25V_2

C7703
*18p/25V_2
24 18 C1_2 Via15
Via24 Via18 8 16
25 19 C2_2 Via16
+3V Via25 Via19 23 17
R429 *0_5%_2 9 20 Via23 Via17
R1_1 Via20 24 18
R17863 *0_8/S +3V_CAM R430 *0_5%_2 10 21 Via24 Via18
R2_1 Via21 25 19
C7000 C7022 22 Via25 Via19
*0.01U/50V_4 11 Via22 R124574 *0_5%_2 9 20
*4.7U/6.3V_4 R1_2 R1_1 Via20
12 R124573 *0_5%_2 10 21
R2_2 R2_1 Via21
C C
*EU10AA1018BQC 22
11 Via22
R1_2
12
R2_2
*EU10AA1018BQC

+VIN_BLIGHT
C7016 0.1U/16V_4 INT_eDP_TXP0_C

IR CAN VO=(0.6(R1+R2)/R2) EDP:2A

[3] CPU_EDP_TXP0
[3] CPU_EDP_TXN0
[3] CPU_EDP_TXP1
C7017
C7018
C7019
0.1U/16V_4
0.1U/16V_4
0.1U/16V_4
INT_eDP_TXN0_C
INT_eDP_TXP1_C
INT_eDP_TXN1_C
EC14010
EC14009
22P/50V_4
10U/25V_8
[3] CPU_EDP_TXN1 INT_eDP_TXP2_C
C14001 *4.7U/6.3V_4 +3.5V +/- 5% [3] CPU_EDP_TXP2 C7020
C7023
0.1U/16V_4
0.1U/16V_4 INT_eDP_TXN2_C +3V
[3] CPU_EDP_TXN2 INT_eDP_TXP3_C
[3] CPU_EDP_TXP3 C7024 0.1U/16V_4
R14001 C7025 0.1U/16V_4 INT_eDP_TXN3_C R7011 *1K_4 BRIGHT
+5V +3.5V_CAM_IR [3] CPU_EDP_TXN3 INT_eDP_AUXN_C LVDS_BLON1
[3] CPU_EDP_AUXN C7026 0.1U/16V_4 R7012 *1K_4
INT_eDP_AUXP_C
4

*0_6/S U14001 [3] CPU_EDP_AUXP C7027 0.1U/16V_4

L14001 F7706 BRIGHT R7008 1K/F_4 VADJ1
VIN

5 3 1 2 +3.5V_CAM_IR_L BRIGHT

R7010
100K/F_4
+5V R14002 *10K/F_4 [11] PCH_DPST_PWM R7013 10_4 C7021 33P/50V_4
PG LX *2.2uH/1.85A_2520 *0_5%_8/S R7014 *0_4/S LVDS_BLON1
[11] PCH_LVDS_BLON DISP_ON
[11] PCH_DISP_ON R7015 *0_4/S
R14003

+5V R14004 *10K/F_4 SY8002EN_1.8

1 2 *0_2/S
EN GND
C14003 C14004
FB

+3V +3VLCD_CON
C14002 U7000
2.5A / 100mils
*10U/6.3V_4

*0.1U/10V_4

*0.1U/10V_4 *RT8097ALGE
6

D R14005 5 1 L7004 2 1 TI160808U600 [9,10,11,13,14,16,17,18,21,22,28,29,34,35,36,37,38,39,46,49,50,54,55] +3V D

*10.5K/F_4 IN OUT
R1 DISP_ON 4 2
[5,21,30,34,36,38,41,42,46] +3VPCU

C7029
0.01U/50V_4

C7030
0.1U/16V_4

C7031
10U/6.3V_4
EN GND [27,28,29,34,39,47,48,49,50,52] +5V
[29,39,40,41,42,43,44,45,46,47,48,49,52,54] +VIN
3
C7028
1U/6.3V_4

R7016
100K/F_4

R14006 FLG

R2 *2K/F_4
TDC:1A SY6288C20AAC
PROJECT : NLA
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
LCD CONN/LID/CAM
Date: Monday, April 09, 2018 Sheet 26 of 56
1 2 3 4 5 6 7 8
 5 4 3 2 1

27
01/11 unstuff for HDMI output from GPU
[9,10,11,13,14,16,17,18,21,22,26,28,29,34,35,36,37,38,39,46,49,50,54,55] +3V 01/11 change to 0 ohm for NV suggest
[26,28,29,34,39,47,48,49,50,52] +5V EMI Solut i on
TX2_HDMI+R8574 6.8/F_4 TX2_HDMI+CN
TX2_HDMI- R8571 6.8/F_4 TX2_HDMI-CN TX2_HDMI+ R7716 *120/F_4 TX2_HDMI-

TX1_HDMI+R8573 6.8/F_4 TX1_HDMI+CN TX1_HDMI+ R7717 *120/F_4 TX1_HDMI-

TX1_HDMI- R8576 6.8/F_4 TX1_HDMI-CN
TX0_HDMI+ R7719 *120/F_4 TX0_HDMI-
TX0_HDMI+R8572 6.8/F_4 TX0_HDMI+CN
TX0_HDMI- R8569 6.8/F_4 TX0_HDMI-CN TXC_HDMI+ R7722 *120/F_4 TXC_HDMI-

D TXC_HDMI+R8575 6.8/F_4 TXC_HDMI+CN D

TXC_HDMI-R8570 6.8/F_4 TXC_HDMI-CN

DGPU_CL_HDMIP R7727 499/F_4 TX2_HDMI+

R7728 499/F_4 TX2_HDMI-

TX1_HDMI+

3
1V8_MAIN Q7704 R7729 499/F_4
DMG1012T-7 R7730 499/F_4 TX1_HDMI-

2 R7733 499/F_4 TX0_HDMI+

11/03 modify for HDMI2.0 R7734 499/F_4 TX0_HDMI-

R7737 499/F_4 TXC_HDMI+

R7738 499/F_4 TXC_HDMI-

1
C7723 0.1U/16V_4 TX0_HDMI+
R7741 1M_4 05/20/16 Modify
[21] GPU_D0 TX0_HDMI-
[21] GPU_D0# C7724 0.1U/16V_4 C7728 0.1U/16V_4

C7721 0.1U/16V_4 TX1_HDMI+

[21] GPU_D1 TX1_HDMI-
[21] GPU_D1# C7722 0.1U/16V_4

C7725 0.1U/16V_4 TX2_HDMI+

[21] GPU_D2 TX2_HDMI-
[21] GPU_D2# C7726 0.1U/16V_4

C7727 0.1U/16V_4 TXC_HDMI+

[21] GPU_CLK TXC_HDMI-
[21] GPU_CLK# C7729 0.1U/16V_4
C C

[21] GPU_DDCCLK
[21] GPU_DDCDATA

HDMI SMBus Isolat i on

ESD Close to HDMI connector
U7701 R8602 *0_4
TX0_HDMI-CN 1
IN1 10 TX0_HDMI-CN
TX0_HDMI+CN 2 NC#4 1V8_MAIN
IN2 9 TX0_HDMI+CN
3 NC#3 R8583 10K_4
GND#1 1V8_MAIN

5
8
TXC_HDMI-CN 4 GND#2
IN3 7 TXC_HDMI-CN GPU_DDCCLK 4 3 HDMI_SCLK CN7701 20 22
TXC_HDMI+CN 5 NC#2 Q7734A PJT138K GND GND
IN4 6 TXC_HDMI+CN TX2_HDMI+CN 1
NC#1 D2+

2
2 D2_Shield
TX2_HDMI-CN 3
GPU_DDCDATA HDMI_SDATA TX1_HDMI+CN D2-
*AZ1045-04F.R7G 1 6 4 D1+
Q7734B PJT138K 5 D1_shield
TX1_HDMI-CN 6
U7702 TX0_HDMI+CN D1-
1V8_MAIN R8582 10K_4 7 D0+
TX1_HDMI-CN 1 8
IN1 TX1_HDMI-CN TX0_HDMI-CN D0_shield
B 10 9 B
TX1_HDMI+CN NC#4 TXC_HDMI+CN D0-
2 10
IN2 TX1_HDMI+CN R8603 *0_4 CLK+
9 11
NC#3 D7701 TXC_HDMI-CN CLK_shield
3 12
GND#1 CLK-
8 1 13
TX2_HDMI-CN GND#2 5V_HSMBCK R7751 CEC
4 3 2.2K_4 14
IN3 TX2_HDMI-CN +5V_HDMIC 5V_HSMBDT R7752 HDMI_SCLK RSVD
7 2 2.2K_4 15
TX2_HDMI+CN NC#2 HDMI_SDATA DDC_CLK
5 16
IN4 TX2_HDMI+CN DDC_DATA
6 C7730 *10P/50V_4 17
NC#1 BAT54AW-L GND#1
C7731 *10P/50V_4 18 +5V
F7701
*AZ1045-04F.R7G
+5V
40 mils 2 1 40 mils +5V_HDMIC
19 HP_DET
GND GND
FUSE SMD 1.5A 6V POLY HDMI_HPD 21 23 HDMI CONN
11/24 moddify
VC7702 C7740 VC7703 C7741
*TVM0G5R5M220R 0.1U/16V_4 *TVM0G5R5M220R 220P/50V_4

HDMI_HPD [13,21]

A R7747 A
20K/F_4

PROJECT : NLA
Quanta Computer Inc.
Size Document Number Rev
Custom
27 -- HDMI/HDMI REDRIVER 1A

Date: Monday, April 09, 2018 Sheet 27o f 56

5 4 3 2 1
 A B C D E

+3V
+3VS5
+5V
+5VS5
+3V[9,10,11,13,14,16,17,18,21,22,26,29,34,35,36,37,38,39,46,49,50,54,55]
+3VS5 [10,12,14,30,31,32,34,38,42,43,44,45,46,50,55]
+5V[26,27,29,34,39,47,48,49,50,52]
+5VS5 [10,29,30,31,32,33,37,42,43,44,45,50,51,52,54,56]
41
+5V_AVDD

L2016 1 2 HCB1005KF-181T15 +3V_DVDD

+3V
Vset=1.2 4 2 V
C2347 C2361 C2349

3.3Vx0.51mA
1U/6.3V_4 10U/6.3VS_4 0.1U/16V_4

Close to PIN1
Close to PIN26 L2031 2 1 HCB1005KF-181T15
+5V

8~20mil

1
C2611 10P/50V_4
>40mils trace C2623
10U/6.3VS_4
C2621
0.1U/16V_4
C2632
*AZ2015-01H.R7G

2
[26] DIGITAL_D1 R2455 *Short_0402
TO Digital MIC

5Vx4.81mA
[26] DIGITAL_CLK R2459 100/F_4 AGND

20mil
C2612 10P/50V_4
+1.5V_AVDD
[10] ACZ_SDOUT_AUDIO
L2013 2 1 HCB1005KF-181T15
+1.5V
[10] BIT_CLK_AUDIO R2467 *Short_0402

[10] ACZ_SDIN0
R2471 33_4 U2025
ALC255-CG
C2608
10U/6.3VS_4
Close to PIN40
+3V_DVDD-IO Digital power for HDA link. 1 26 8mil
(Digital VCC (3.3V or 1.5V) DVDD D0@5Vx4.81mW AVDD1 40 AGND
L2018 1 2 *HCB1005KF-181T15 DMIC0 2 D0@3.3Vx0.51mW D0@1.5Vx13.42mW AVDD2
20150209A-Change POWER
from +1.5V to +3V.
+1.5V GPIO0/ DMIC-DATA 1.5Vx13.42mA AGND DGND
DMIC_CLK_R 3 25
L2020 1 2 HCB1005KF-181T15 GPIO1 / DMIC-CLK AVSS1 38 R2473 100K_4
+3V AVSS2 AGND

Analog
C2376 C2364
0.1U/16V_4 10U/6.3VS_4 R124566 *Short_0603 4 27 C2620 10U/6.3VS_4
DVSS LDO1-CAP 39 AGND
ACZ_SDOUT_AUDIO 5 LDO2-CAP
C2607 10U/6.3VS_4
Close to PIN27 & 39
SDATA-OUT
HD_BCLK 6 28 C2618 0.1U/16V_4
Close to PIN28
BCLK VREF
[10] ACZ_SYNC_AUDIO
C2365 10U/6.3VS_4 7 C2613 2.2U/10V_6
LDO3-CAP AGND
[10] ACZ_RST#_AUDIO Close to PIN7
HD_SDIN0 8 32 LINEOUT_L AGND SHIELD
+5V_AVDD SDATA-IN HPOUT-L LINEOUT_L [37]
C2624 33 LINEOUT_R AGND SHIELD
HPOUT-R LINEOUT_R [37]
*0.1U/16V_4 9
DVDD-IO AGND SHIELD
R2173
3.3Vx0.51mA 15~20mil D0@1.5Vx0.005mW 24
ACZ_SYNC_AUDIO 10 LINE2-L 23
10K_4 SYNC LINE2-R

Digital
11
RESETB 22 C2628 4.7U/6.3V_4
C2382 0.1U/16V_4 AMP_BEEP_R2 R2493 10K/F_4 AMP_BEEP_L C2625 0.1U/16V_4 AMP_BEEP 12 LINE1-L 21 C2633 4.7U/6.3V_4
PCBEEP LINE1-R
34
CPVEE 20 +3VS5
VD33 STB
3

R2492 C2629 19 C2630 10U/6.3VS_4

2 CAP- 35 MIC CAP AGND
[10,16] ACZ_SPKR Q2024 10K_1%_4 0.1U/16V_4 C2362 C14032 1u/10V_4
1u/10V_4 CBN 31 LINE1_L R2464 4.7K_4
2N7002K LINE1-VREFO-L LINE1_R
CAP+ 37 30 R2463 4.7K_4 20150713A-PV-R for
CBP LINE1-VREFO-R
+3V_DVDD record issue.
1

AGND 36
+3V_DVDD CPVDD 18 MIC_R1
AGND
3.3Vx0.0012mA 20mil D0@3.3Vx0.0012mW MIC2-R (PORTF) 17
C2635 0_6 R2498 0_5%_4
1 MIC2-L (PORTF) MIC_L1 1
AGND C2348
L_SPK+
C2636 *2.2U/6.3V_6 MV shorpad
42
Close to Pin 34,35,36 4.7U/6.3V_4 SPK-L+
D0@5Vx0.0012mW
29 R2491 0_5%_4 AGND

SPDIF-OUT/GPIO2
L_SPK- 43 MIC2-VREFO
SPK-L- R0402
R_SPK- MONO-OUT
16
VREFOUT_C MV shorpad
44
INT. Speaker
R2165 2.2K_4
SPK-R-

JD3/GPIO3
R_SPK+ 45

PVDD1

PVDD2
SPK-R+ C2360

PDB

JD1

JD2
CN7706 *1U/6.3V_4

NC
DFHD04MS403
3801-04-1-4p-l +3V

49

41

46

47

48

13

14

15
SPK_CONN Close to Speaker AGND
6

L_SPK+_R L2001 1 2 PBY160808T-600Y-N

4 L_SPK-_R L2002 1 2 PBY160808T-600Y-N R2170 Close to codec
3 R_SPK-_R L2003 1 2 PBY160808T-600Y-N
2 R_SPK+_R 100K/F_4
L2004 1 2 PBY160808T-600Y-N
1
30mil 40mil SENSE_A_1
C2014

C2013

C2012

C2011

R2172 200K_4 SENSE_A [37]

5

5Vx0.001mA R2171 *39.2K/F_4

1000P/50V_4

1000P/50V_4

1000P/50V_4

1000P/50V_4

COMBO_GPI R2159 *22K/F_4 EXT_MIC_L

EXT_MIC_L[37]
R2164
*22K/F_4
C2338
*10U/6.3V_4

AGND AGND
+5V +5V_DVDD

L2015 1 2 HCB1005KF-181T15 +5V_DVDD 25mil

Class-D power supply C2341 0.1U/16V_4
FOR EMI
C2343 10U/6.3VS_4 EC2006 1000P/50V_4
ACZ_SDIN0 EC2036 *33P/50V_4 Close to Pin 41 2013/07/05 Reserve for 1.5V power supply
25mil EC2010 1000P/50V_4
ACZ_SDOUT_AUDIO EC2034 *10P/50V_4 EC2009 1000P/50V_4
C2340 0.1U/16V_4 +3VS5 +1.5V_AUDIO +1.5V_AVDD

ACZ_SYNC_AUDIO EC2037 *10P/50V_4 C2344 10U/6.3VS_4

GND AGND EC2004 1000P/50V_4

Close to Pin 46 L2012 1 2 HCB1005KF-181T15 EC2007 1000P/50V_4

BIT_CLK_AUDIO EC2035 *33P/50V_4
U2011 +3V_DVDD-IO AGND Close to CODEC
+1.5V
C2372
1 5 20mil L2019 1 2 *HCB1005KF-181T15
for intel HSW ULT 2.2U/6.3V_4
VIN VOUT R2175 *0_8/S
Q7 2
BA039040000 GND
BA039040020 3 4
R2494 AGND
*2.2K_4 +3V_DVDD ON/OFF NC

G9090-150T11U place to near Audio Chip or under Audio Chip.

C2324 C2325
+3V
2

R2456 *0.1U/16V_4 *1U/6.3V_4

*1K/F_4
ACZ_RST#_AUDIO 1 3
Q2020 PD#
*METR3904-G
2
[38] VOLMUTE#
1 D2010 RB500V-40 R2460

PROJECT : NLA
*10K_4

Quanta Computer Inc.

Size Document Number R ev
Custom Azalia ALC255-CG 1A

Date: Monday, April 09, 2018 Sheet 28 of 56

A B C D E
 5 4 3 2 1

Head Phone out

29
D D

C C

HOLE
Place BOT side
RF
H13 H14 H15 H16
H1 H2 H3 H4 *H-C236I186D146P2 *H-TIC236BC268D146P2 H-C197D140P2 *H-G75A-1 +VIN

B
*H-G75A-2 *H-O256X177D157X79P2 *H-O256X177D157X79P2 *H-NFL15-HN-2
+5V +3V +VIN +5VS5
EMI request for ISN B
1

1
EC14005 EC14006 EC14007 EC14008 EC5 EC6 EC7 EC8
1

10p/50V_4 10p/50V_4 10p/50V_4 10p/50V_4 *10U/25V_8 *10U/25V_8 *10U/25V_8 *10U/25V_8

H18 H19 H20

H5 H6 H7 H8 *H-NLA-5 *SPAD-NLA-1NP *H-NLA-1
*H-C177D87P2 *H-NFL15-2 *H-C315D118P2 H-C197D106P2
+PRWSRC
EMI request for ISN
1

1
Place BOT side
1

EC9 EC10 EC11 EC4

*10U/25V_8 *10U/25V_8 *10U/25V_8 *10U/25V_8

H9 H10 H11 H12 H21 H22 H23 PAD1 PAD2

*H-TIC236BC268D146P2 *H-TIC236BC268D146P2 *H-TIC236BC268D146P2 *H-TIC236BC268D146P2 *H-NLA-2 *H-NLA-3 *H-NLA-4 *SPAD-RE394X220NP *spad-re200x100np

2
1

1
EC7002

D8519

C14012

R8514

R8600
A A
1

*64.9K_1%_4
*820p/50V_4
MLVS0402M04_270p

*TVL5VB1-DFN1006-2L
2

PROJECT : NLA
0_4

Quanta Computer Inc.

Size Document Number Rev
Custom 29-- HP AMP HPA022642RTJR 1A

Date: Monday, April 09, 2018 Sheet 29 of 56

5 4 3 2 1
 5 4 3 2 1

USB 2.0/3.0 Combo

30

R5501

R5502
T5
+5V_USBP1
[10,12,14,36,41] +BAT_RTC

20K_1%_4

15 48.7K_1%_4
C5504
220u/6.3V_D6.3H4.2

+
CN7500
D +5VS5 ub3-55923-00902-v01-9p-smt D

17

16

14

13
U5501 C5503 470p/50V_4 DFHS09FR759
C5501 4.7u/6.3V_4 55923-00902-V01 11 13

ILIM_HI

FAULT
ILIM_LO
GND#2

GND#1
Shield #2
C5502 0.1U/16V_4 5 StdA_SSRX- Shield #4
1 12 [9] USB30_RX1-
IN 4 GND
OUT 6
USB1-_CHA [9] USB30_RX1+ USBP1+_C StdA_SSRX+
USBP1- 2 11 3
[9] USBP1- DM_OUT DM_IN D+
7 GND_Drain
USBP1+ 3 10 USB1+_CHA USBP1-_C 2
[9] USBP1+ DP_OUT DP_IN USB30_TX1-_C D-
C7505 0.1U/16V_4 8 StdA_SSTX-
4 9 [9] USB30_TX1- +5V_USBP1
+5VS5 R5503 100K_5%_4 100K_5%_4 R17865 +5VS5 1 VBUS
ILIM_SEL STATUS USB30_TX1+_C
C7506 0.1U/16V_4 9 StdA_SSTX+
[9] USB30_TX1+

CTL2

CTL3
CTL1
Shield #3

EN
Shield #1

+3VS5 R17873 10K_5%_4 TPS2546RTER

2A 10 12

8
C7503 1000P/50V_4
USBPW_ON VC7501 *AVLC5S_4
[38] USBPW_ON
C7502 470P/50V_4
[34,38,43,44,45,50,56] MAINON C7501 0.1U/16V_4
[38] USB_CTL2
USB_CTL2 ESD
USBP1-_C
USBP1+_C
[38] USB_CTL3

2
C7520
MESD05N92ULA
C C

Daughter Board
L14004

3
USB1+_CHA 4 3 USB1+_CHA_L
USB1-_CHA 1 2 USB1-_CHA_L
1123 Add PWR LED MOS Circuit
*MCM2012B900GBE
L14002
U7052 USB1+_CHA R8552 0_4 USB1+_CHA_L 1 3 USBP1+_C
+3VPCU USB30_RX1- 1 USB2_IN_P USB2_OUT_P
IN1 10 USB30_RX1- USB1-_CHA R8551 0_4 USB1-_CHA_L 2 4 USBP1-_C
USB30_RX1+ 2 NC#4 USB2_IN_N USB2_OUT_N
R8615 IN2 9 USB30_RX1+
*10K_4 3 NC#3 5 13
GND#1 8 C1_1 Via13
USB30_TX1-_C 4 GND#2 6 14
IN3 7 USB30_TX1-_C C2_1 Via14
DEEP_PWRLED# USB30_TX1+_C 5 NC#2 7 15

C14033
18p/25V_2

C14034
18p/25V_2
Q7711 DEEP_PWRLED# [36] IN4 6 USB30_TX1+_C C1_2 Via15
2N7002K NC#1 8 16
3

PWR_LED 2 C2_2 Via16

[38] PWR_LED 23 17
AZ1045-04F.R7G
Via23 Via17
C8633 R17892 24 18
1

0.1U/16V_4 100K_5%_4 Via24 Via18

1125 Reserve ESD protection component 25
Via25 Via19
19

R124576 *0_5%_2 9 20
R1_1 Via20
R124575 *0_5%_2 10 21
R2_1 Via21
22
B 11 Via22 B
R1_2
12
R2_2
*EU10AA1018BQC

A A

PROJECT : NLA
Quanta Computer Inc.
Size Document Number Rev
Custom 30 -- USB3.0/DB 1A
Date: Monday, April 09, 2018 Sheet 30 of 56
5 4 3 2 1
 5 4 3 2 1

CE_DP CE_USB FLIP

L
L
L
L
PS8802 Mode Selection
L Chip Power Down
H Chip Power Down
41
D
L H L One Port USB 3.1 - No Flip D

L H H One Port USB 3.1 - With Flip

TYPEC1_RX2P_R
H L L 4 Lane DP - No Flip RX2P R758 *0_2/S
TYPEC1_RX2N_R TYPEC1_RX2p_R [33]
RX2N R759 *0_2/S TYPEC1_RX2n_R [33]
H L H 4 Lane DP - With Flip
TYPEC1_RX1N_R
H H L One Port USB 3.1 + 2 Lane DP - No Flip RX1N R761 *0_2/S
TYPEC1_RX1P_R TYPEC1_RX1n_R [33]
RX1P R760 *0_2/S TYPEC1_RX1p_R [33]
H H H One Port USB 3.1 + 2 Lane DP - With Flip +5VS5 +1.8V_DEEP_SUS

T8533
VDD_DM

VDD_DM
VDD_R2
VDD_R1
U14002
PS8802 Pin Control Mode C10042
1
VBIAS VIN
6
C10043

1u/6.3V_4 +1.2V_DEEP_SUS

2 5 4.7u/6.3V_4

10
U5 GND VOUT

9
8
7
6
5
4
3
2
1
R12460

RX2p
RX2n

RX1n
RX1p
VDD_DM#2

VDD_R2
VDD_R1

VDD_DM#1
TEST
RSV
SLP_SUS_ON R12462 0_4 3 4 51.1K_1%_4 C10044
[14,38,44] SLP_SUS_ON EN VADJ
53 4.7u/6.3V_4
EPAD C10045
C246 0.22u/25V_4 B2_SSRXN 11 52 *0.1u/16V_4 G9183-12TP1U
[9] USB30_RX4- C243 B2_SSRXP SSRXn VDD33 +3VS5
0.22u/25V_4 12 51 T8529 C14038 0.01u/50V_4 +3VS5
[9] USB30_RX4+ VDD_A1 13 SSRXp DCI_DATA 50
B2_SSTXN VDD_A1 DCI_CLK
T8530 C14037 0.1u/16V_4 Vout=0.8(1+R1/R2)
C140310.22u/25V_4 14 49 R12461
USB3.0 HOST [9] USB30_TX4- C140300.22u/25V_4 B2_SSTXP 15 SSTXn VDD_DCI 48 CEQ C14039 0.01u/50V_4
+3VS5
100K/F_4
[9] USB30_TX4+ VDD_DM 16 SSTXp CEQ 47 VDD_A2 C14040 0.1u/16V_4
DDI1_TX0_DP C228 0.22u/25V_4 DP_TX0P 17 VDD_DM#3 VDD_A2 46 SSEQ R40
[3] DDI1_TX0_DP DDI1_TX0_DN C224 DP_TX0N ML0p SSEQ C218 TYPEC1_TX2P_R
0.22u/25V_4 18 45 TX2P 0.22u/25V_4 10K_5%_4
C [3] DDI1_TX0_DN ML0n TX2p C215 TYPEC1_TX2N_R TYPEC1_TX2p_R [33] C
ADDR 19 44 TX2N 0.22u/25V_4
DDI1_TX1_DP C219 DP_TX1P ADDR TX2n TYPEC1_TX2n_R [33]
0.22u/25V_4 20 43
[3] DDI1_TX1_DP DDI1_TX1_DN C217 DP_TX1N ML1p RESET# C212 0.22u/25V_4 TYPEC1_TX1N_R
DisplayPort Source 0.22u/25V_4 21 42 TX1N
[3] DDI1_TX1_DN ML1n TX1n C208 0.22u/25V_4 TYPEC1_TX1P_R TYPEC1_TX1n_R [33]
DPEQ 22 41 TX1P
DDI1_TX2_DP C214 DP_TX2P DPEQ TX1p TypeC1_DDI1_HPD_R TYPEC1_TX1p_R [33]
0.22u/25V_4 23 40 R762 *0_2 C7 +1.2V_DEEP_SUS
[3] DDI1_TX2_DP DDI1_TX2_DN C210 DP_TX2N ML2p IN_HPD TypeC1_DDI1_HPD [13,32]
0.22u/25V_4 24 39 R39 4.99K_1%_4
[3] DDI1_TX2_DN DDI1_TX3_DP DP_TX3P ML2n REXT VDD_DM
[3] DDI1_TX3_DP
C206 0.22u/25V_4 25 38 1u/25V_4 R124585 *Short_0201 VDD_DM C14043 0.01u/50V_4
DDI1_TX3_DN C207 0.22u/25V_4 DP_TX3N 26 ML3p VDD_DM#4 37 B1_SW0 R204 *Short_0201 TPYEC1_MUXSEL_FLIP C14044 0.1u/16V_4
[3] DDI1_TX3_DN ML3n FLIP TPYEC1_MUXSEL_FLIP [32]

VDD33#1

CE_USB
VDD_D1

CE_DP
*Short_0201 VDD_A1

CSDA
R124586 C14045 0.01u/50V_4

CSCL

AUXp
AUXn
SBU1
SBU2
+3VS5 C14046 0.1u/16V_4

PS8802QFN52GTR-A1 +3VS5 R124587 *Short_0201 VDD_A2 C14047 0.01u/50V_4

27
28
29
VDD_D1 30
31
32
33
34
35
36
C14048 0.1u/16V_4
R124558
100K_2 R124588 *Short_0201 VDD_R1 C14049 0.01u/50V_4

CSDA
+3VS5

CSCL
0.01u/50V_4 C14041 R199 C14050 0.1u/16V_4
0.1u/16V_4 C14042 *4.7K_4
B2_AUXN R124589 *Short_0201 VDD_R2 C14051 0.01u/50V_4
B2_AUXP C14052 0.1u/16V_4
B1_SW1 R205 *Short_0201 TPYEC1_MUXSEL_CTL0

T8531
T8532
B1_SW2 R206 TPYEC1_MUXSEL_CTL0 [32]
*Short_0201 TPYEC1_MUXSEL_CTL1 TPYEC1_MUXSEL_CTL1 [32] R124590 *Short_0201 VDD_D1 C14053 0.01u/50V_4
R230 DDI1_AUX_DP C168 0.22u/25V_4 B2_AUXP TYPEC1_SBU2 C14054 0.1u/16V_4
[3] DDI1_AUX_DP DDI1_AUX_DN C169 TYPEC1_SBU2 [33]
100K_2 0.22u/25V_4 B2_AUXN TYPEC1_SBU1
TYPEC1_SBU1 [33]
[3] DDI1_AUX_DN

B B

Strapping Pins

ADDR: I2C control bus address. Internally pull down at 150k次, +3VS5 +3VS5
+3VS5
3.3V I/O. +3VS5
L: Slave address 0x10-0x2F(default)
H: Slave address 0x30-0x4F

5
DPEQ:DP Receiver equalization setting; Internally pull down at 150k次, 3.3V R12407 MBDATA2 3 4 CSDA
[38] MBDATA2
R8 R9 R10 R11 10K_4 R12409 *2N7002DW Q9083A
I/O. TypeC1_DDI1_HPD_R
10K_4
L: Compensation for channel loss up to 12dB(Default) [13] TypeC1_DDI1_HPD_R
4.7K_5%_4

*4.7K_5%_4

*4.7K_5%_4

*4.7K_5%_4

H: Compensation for channel loss up to 18dB

2
ADDR 5 TypeC1_DDI1_HPD_R_Q MBCLK2 6 1 CSCL
DPEQ CEQ: USB Type-C connector facing Rx channel receiver equalization setting; [38] MBCLK2
*2N7002DW Q9083B
Internally pull down at 150k次 , 3.3V I/O.

6
CEQ Q9076A R12408 C10005 +3VS5 R124591 *4.7K_4 CSDA
SSEQ L: Compensation for channel loss up to 16dB(Default) R124592 *4.7K_4 CSCL

499K_1%_4
2N7002DW
4
2 TypeC1_DDI1_HPD
H: Compensation for channel loss up to 18dB

1U/6.3V_4
R124593 0_4 CSDA
[38] MBDATA2
R18 R19 R21 R20
SSEQ: USB Host facing Rx channel receiver equalization setting; 2N7002DW
[38] MBCLK2
R124594 0_4 CSCL

1
Internally pull down at 150k次 , 3.3V I/O.
*4.7K_5%_4

*4.7K_5%_4

*4.7K_5%_4

*4.7K_5%_4

Q9076B
L: Compensation for channel loss up to 12dB(Default)
H: Compensation for channel loss up to 18dB
A A

PROJECT : NLA
Quanta Computer Inc.
Size Document Number Rev
PORTA_TUSB546I MUX 1A
Date: Monday, April 09, 2018 Sheet 31 o f 56
5 4 3 2 1
 5 4 3 2 1

PN : ARNL9US0000 32
CYPT4126 +3V3PD

+5VS5 +5VS5 VDDD_SUPPLY R12191 *0_4/S

+3VS5
D U30 D

1 R418 *0_8/S
GND
3
IN L24 *0_6/S +3VS5 C388 C389
2 2 1 C390 VDDD_SUPPLY U23
OUT
1u/10V_4 CCG4 40-QFN

0.1U/16V_4

0.1U/16V_4
C478 C479 C481 C480 R12403 *0_6
0.1U/16V_4 G5250Q1T73U 31 11
VDDD VBUS_P_CTRL_P1 TYPEC1_CCG4_VBUS_P_CTRL [33]

0.1U/16V_4
0.01U/50V/X7R_4

10U/6.3V_4
32 12 TYPEC1_CCG4_VBUS_C_CTRL T6
VDDIO VBUS_C_CTRL_P1
C391
20 TYPEC1_CCG4_VBUS_DISCHARGE [33]
33 VBUS_DISCHARGE_P1/GPIO
VCCD

1u/10V_4

+5VS5
SI, 0221, change R459 to 0ohm and unstuf f R466 TypeC1_DDI1_HPD [13,31] +3V3PD
R450 *0.3/F_6
for 5V VDDD_SUPPLY VCONN_5V_P1 8
VCONN_V5V_P1 18 TypeC1_DDI1_HPD R487 10K/F_4
23 HPD_P1
VCONN_5V_P1 trace width VCONN_V5V_P2
C487 C403 C408 R459 must be 25mil above. R12213 *100K/F_4
*0_4/S 7
CC2_P1 TYPEC1_CCG1_CC2 [33]
*1u/10V_4
0.1U/16V_4
*10U/6.3V_4

3 C240
VCONN_VMON_P1 I2C_SDA_SCB2_AR/GPIO
390P/50V_4
4
I2C_SCL_SCB2_AR/GPIO
R466 5 9
I2C_INT_AR_P1/GPIO CC1_P1 TYPEC1_CCG1_CC1 [33]
*2M/F_4
VCONN_VMON_P1 6 C413
C I2C_INT_AR_P2 C
390P/50V_4
C421 0.1U/16V_4 +3V3PD
TYPEC1_USB0 R488 100K/F_4
R489 10K/F_4 13
VBUS_MON_P1 26 TPYEC1_MUXSEL_CTL1
MUX_CTRL3_P1/SDA_3/GPIO TPYEC1_MUXSEL_CTL0 TPYEC1_MUXSEL_CTL1 [31] TPYEC1_MUXSEL_CTL1 R12194
28 TPYEC1_MUXSEL_CTL0 [31] 10K/F_4
MUX_CTRL2_P1/SDA_4 29 TPYEC1_MUXSEL_FLIP TPYEC1_MUXSEL_CTL0 R441 10K/F_4
MUX_CTRL1_P1/SCL_4 TPYEC1_MUXSEL_FLIP [31] TPYEC1_MUXSEL_FLIP R435 10K/F_4

+3V3PD
37
VBUS_MON_P2

R177 30
CCG4_SWD_IO 1 HPD_P2
10K/F_4 SWD_IO/AR_RST#/GPIO
CCG4_SWD_CLK 2 22 VDDD_SUPPLY
SWD_CLK/I2C_CFG_EC/GPIO CC1_P2
If SWD Clock IO is floating, Slave address is 0x08
CCG4_INT_EC 15
[38] CCG4_INT_EC I2C_INT_EC
CCG4_I2C_DATA
R7744 If SWD Clock IO is low, Slave address is 0x40
R12193 16 *4.7K_4
[38] MBDATA2 I2C_SDA_SCB1_EC
*Short_0402 24
CCG4_I2C_CLK 17 CC2_P2
[38] MBCLK2
R12192
I2C_SCL_SCB1_EC CCG4_SWD_CLK
If SWD Clock IO is high, Slave address is 0x42
*Short_0402
7/25 Add SMBus level shift +3V3PD

19 R7745
VSEL1_P1/VCONN_VMON_P1
5

*4.7K_4
14
3 4 CCG4_I2C_DATA [33] CCG4_BC_ILIM_SEL VSEL2_P1/OVP_TRIP_P1 34
MBDATA2
*2N7002DW Q9077A MUX_CTRL3_P2/GPIO 35
MUX_CTRL2_P2/GPIO 36
B 25 MUX_CTRL1_P2/GPIO B
VSEL1_P2/SCL_3/VCONN_VMON_P2
2

MBCLK2 6 1 CCG4_I2C_CLK
27
VSEL2_P2/GPIO 0824 add
*2N7002DW Q9077B 38
R12410 4.7K_4 CCG4_I2C_DATA 21 VBUS_C_CTRL_P2 VDDD_SUPPLY
+3V3PD CCG4_I2C_CLK OVP_TRIP_P2 TP13053
R12411 4.7K_4 39 GND
VBUS_P_CTRL_P2 CCG4_XRES TP13154
* TP8656
R176 40 CCG4_SWD_CLK *
VBUS_DISCHARGE_P2/GPIO CCG4_SWD_IO TP8658
VDDD_SUPPLY * TP8659
*
4.7K_4 CCG4_XRES 10 *
XRES 41
EPAD
C14027
0.1U/16V_4
CCG4
PART_NUMBER = CYPD4125-40LQXIT
3

2 Manufacturer = Cypress
[38] CCG4_RST# *PJA138K
Q42
1

R179
*10K/F_4

A A

PROJECT : NLA
Quanta Computer Inc.
Size Document Number Rev
1A
Cypress CCG4- USB3.1 PD_A
Date: Monday, April 09, 2018 Sheet 32 of 56
5 4 3 2 1
 A B C D E

32
,55] +3V
9,50,52] +5V
46] +3VPCU

USBP4+ 1 2 USBP4+_L
USBP4- 4 3 USBP4-_L

*MCM2012B900GBE
L7524
L14003 CN13
[9] USBP4+ USBP4+R124581 0_4 USBP4+_L 1 3 TYPEC_USBP4+_L TYPEC1_USB0
USB2_IN_P USB2_OUT_P
[9] USBP4- USBP4-R124582 0_4 USBP4-_L 2 4 TYPEC_USBP4-_L
USB2_IN_N USB2_OUT_N
TYPEC1_TX1P_R A2 A4 1 2
[31] TYPEC1_TX1P_R TYPEC1_TX1N_R A3 SSTXp1 VBUS#1
5 13 [31] TYPEC1_TX1N_R B4 D6
4 C1_1 Via13 TYPEC1_RX1P_R B11 SSTXn1 VBUS#3 4
[31] TYPEC1_RX1P_R A9 P4SMAFJ20A
6 14 TYPEC1_RX1N_R B10 SSRXp1 VBUS#2
[31] TYPEC1_RX1N_R SSRXn1 VBUS#4 B9
C2_1 Via14
7 15 TYPEC1_TX2P_R B2

C14035
18p/25V_2

C14036
18p/25V_2
FP need apply
[31] TYPEC1_TX2P_R SSTXp2 GND#1 A1
C1_2 Via15 TYPEC1_TX2N_R B3
[31] TYPEC1_TX2N_R SSTXn2 GND#2 A12
8 16 TYPEC1_RX2P_R A11 B1
C2_2 Via16 [31] TYPEC1_RX2P_R TYPEC1_RX2N_R A10 SSRXp2 GND#3
[31] TYPEC1_RX2N_R SSRXn2 GND#4 B12
23 17 13
Via23 Via17 TYPEC_USBP4+_L GND#5
A6 Dp1 GND#6 14
24 18 TYPEC_USBP4-_L A7 15
Via24 Via18 TYPEC_USBP4+_L Dn1 GND#7
B6 Dp2 GND#8 16
25 19 TYPEC_USBP4-_L B7 17
Via25 Via19 Dn2 GND#9
18
9 20 GND#10
R124578 *0_5%_2 19
R1_1 Via20 TYPEC1_CCG1_CC1 GND#11
A5 20
[32] TYPEC1_CCG1_CC1 TYPEC1_CCG1_CC2 CC1 GND#12
R124577 *0_5%_2 10 21 B5 21
R2_1 Via21 [32] TYPEC1_CCG1_CC2 CC2 GND#13
22
TYPEC1_SBU1 GND#14
22 A8 SBU1 23
11 Via22 [31] TYPEC1_SBU1 TYPEC1_SBU2 NC#1
D8515 D4 B8 SBU2 24
R1_2 [31] TYPEC1_SBU2 NC#2
12

EGA10402V05AH_0.2p

EGA10402V05AH_0.2p
R2_2
*EU10AA1018BQC

TYPE_C_CONN
TYPEC1_SBU2
TYPEC1_SBU1

R17765 R17766
2M_5%_4 2M_5%_4

U2042
3 3
TYPEC1_RX1P_R 1
IN1 10 TYPEC1_RX1P_R
TYPEC1_RX1N_R 2 NC#4
IN2 9 TYPEC1_RX1N_R
3 NC#3
GND#1 8
TYPEC1_TX1P_R 4 GND#2
IN3 7 TYPEC1_TX1P_R
TYPEC1_TX1N_R 5 NC#2
IN4 6 TYPEC1_TX1N_R
NC#1

AZ1045-04F.R7G
U8519 +5VS5 U2043 11/24 moddify
FPF2595UCX TYPEC1_RX2P_R 1
TYPEC1_USB0 IN1 10 TYPEC1_RX2P_R TYPEC_USBP4-_L
A3 A1 TYPEC1_RX2N_R 2 NC#4 TYPEC_USBP4+_L
Vout#1 Vin#1 IN2 9 TYPEC1_RX2N_R
B3 B1 3 NC#3
Vout#2 Vin#2 GND#1

2
C488 8
C3 C1 TYPEC1_TX2P_R 4 GND#2 U2040

1U/25V_6
Vout#3 Vin#3 IN3 7 TYPEC1_TX2P_R
NC#2 MESD05N92ULA
R17860 D1 TYPEC1_TX2N_R 5
OCflagb IN4

3
470_5%_6 D2 6 TYPEC1_TX2N_R
GND#3

GND#2

GND#1

Q9049B D3 Iset NC#1

ON
6

2N7002KDW
AZ1045-04F.R7G
2 R17857 R588 R562
[32] TYPEC1_CCG4_VBUS_DISCHARGE
B2

A2
C2

649_1%_4 *649_1%_4 324_1%_4

Q9049A
1

2N7002KDW
R569
5
[32] CCG4_BC_ILIM_SEL TYPEC1_CCG4_VBUS_P_CTRL [32]
2 2
4.7K_5%_4
4

R17856
4.7K_5%_4

CCG4_BC_ILIM_SEL : S3/S0: LOW-->0.9A

S5: HIGH-->3A

1 1

PROJECT : NLA
Quanta Computer Inc.
Size Document Number Rev
C
32 -- HDD/ODD 1A
Date: Monday, April 09, 2018 Sheet 33 of 56
A B C D E
 5 4 3 2 1

SSD
1
CN4901
NASM0-S6701-TS40
DFHS75FR392
ngff-apci0107-p001a-75p-km

NGFF MKEY 2 +3V_SSD R1831

2.5A
*Short_0805
33
GND#1 3.3Vaux_1 +3V
3 4
R1801 *Short_0402 PCIE_SATA_RXN9_C 5 GND#3 3.3Vaux_2 6
[11] PCIE_SATA_RXN9 PCIE_SATA_RXP9_C 7 PETN3 NC#10 8
R1806 *Short_0402 D8512 RB500V-40
[11] PCIE_SATA_RXP9 9 PETP3 NC#11 10 2
1
C2116 0.22U/10V_4 PCIE_SATA_TXN9_C 11 GND#7 DAS/DSS#(I)(OD) 12 SATA_LED# [11,36] C2132 C2137 C2096
[11] PCIE_SATA_TXN9 PCIE_SATA_TXP9_C 13 PERN3 3.3Vaux_3 14
C2110 0.22U/10V_4 0.01U/50V_4 0.1U/16V_4 4.7U/6.3V_4
D [11] PCIE_SATA_TXP9 15 PERP3 3.3Vaux_4 16 D
17 GND#8 3.3Vaux_5 18
[11] PCIE_SATA_RXN10 19 PETN2 3.3Vaux_6 20 +3V
[11] PCIE_SATA_RXP10 21 PETP2 NC#12 22
C2128 0.22U/10V_4 PCIE_SATA_TXN10_C 23 GND#2 NC#13 24
[11] PCIE_SATA_TXN10 PCIE_SATA_TXP10_C 25 PERN2 NC#14 26
C2125 0.22U/10V_4
[11] PCIE_SATA_TXP10 27 PERP2 NC#15 28 R1824
29 GND#9 NC#16 30
[11] PCIE_SATA_RXN11 PETN1 NC#17 10K_4
31 32
[11] PCIE_SATA_RXP11 33 PETP1 NC#2 34
C2135 0.22U/10V_4 PCIE_SATA_TXN11_C 35 GND#10 NC#3 36
[11] PCIE_SATA_TXN11 PCIE_SATA_TXP11_C 37 PERN1 NC#4 38
C2131 0.22U/10V_4 R1816 *0_4 DEVSLP0 [9] HD4600
[11] PCIE_SATA_TXP11 39 PERP1 DEVSLP 40 51625-01001-001-10p-l
41 GND#11 NC#5 42 DFFC10FR110
[11] PCIE_SATA_RXP12 43 SATA B+/PETN0 NC#6 44 SATA_HDD
[11] PCIE_SATA_RXN12 45 SATA B-/PETP0 NC#7 46
C2140 0.22U/10V_4 PCIE_SATA_TXN12_C 47 GND#12 NC#8 48
[11] PCIE_SATA_TXN12 PCIE_SATA_TXP12_C 49 SATA A-/PERN0 NC#9 50 12 10
C2136 0.22U/10V_4 R1805 *Short_0402
[11] PCIE_SATA_TXP12 51 SATA A+/PERP0 PERST#/NC 52 PLTRST#[12,19,35,36,37,38] SATA_TXP1B_C
R1798 *Short_0402 C4600 0.01U/50V_4
53 GND#13 CLKREQ#/NC 54 PCIE_CLKREQ_SSD# [11] 9 SATA_TXP2[11]
[11] CLK_PCIE_SSDN 55 REFCLKN PEW AKE#/NC 56 SATA_TXN1B_C C4601 0.01U/50V_4
[11] CLK_PCIE_SSDP 57 REFCLKP NC#18 58 8 SATA_TXN2[11]
+3V GND#14 NC#19
7
SATA_RXN1B_C C4602 0.01U/50V_4
6 SATA_RXN2[11]
*PAD
67 68 SATA_RXP1B_C C4603 0.01U/50V_4
NC#1 SUSCLK TP1125 5 SATA_RXP2[11]
R1769 PEDET 69
71 PEDET(OC-PCIE/GND-SATA) 70 +3V_SSD R1828 *Short_0805
100K/F_4 GND#4 3.3Vaux_7 +3V 4
73 72
C 75 GND#5 3.3Vaux_8 74 C
GND#6 3.3Vaux_9 3 +5V +5V

76
77
78
79
[11] GPIO35 R1803 *Short_0402 C4604 *10U/6.3VS_4
2

76
77
78
79
Mini Card EC1054
470p/50V/X7R_4
EC1044
10U/6.3V_4
EC1045
10U/6.3V_4
11 1 C4605 10U/6.3VS_4

WLAN/BT(Opt i on)
3

2 PEDET
HDD
Q1056 C4606 0.1U/16V_4
2N7002K
PULSAR_38P4M_REFCLK_R1 R12470 *10K_5%_4
1

SUSCLK_32KHZ R12471 *100K/F_4

Near connector

+3VPCU +3VPCU +3VS5 +3V_WLAN_P +3V_WLAN_P

0925 for CNVi power control
1.5A
CN1012 +3V_WLAN_P
R1188 R124531 C2072 C2071 C2068 DFHS75FR119
10K_4 10K_4 +3V_WLAN_P 0.1U/16V_4 0.01U/25V_4 10U/6.3V_4 ngff-nase0-s6701-tsh4-ke-smt
NASE0-S6701-TSH4 6.4H
1

Q1018 NGFF EKEY

R1187 200K_4 2 PJA3415 1 2 R1635 4.7K_4
GND#3 3.3Vaux#1 +3V_WLAN_P
C14015 C14014 3 4
[9] USBP7+ USB_D+ 3.3Vaux#2 WLAN_LED#
3

10U/6.3V_4 0.1U/16V_4 5 6 R1640 0_5%_4

B [9] USBP7- 7 USB_D- LED#1 8 B
Q9079A 60mil GND#4 PCM_CLK
3

5 CNV_WR_LANE1_DN 9 10 CNV_RF_RESET#_L
2N7002KDW [13] CNV_WR_LANE1_DN SDIO CLK(O) PCM_SYNC
C1793 CNV_WR_LANE1_DP 11 12
[13] CNV_WR_LANE1_DP SDIO CMD(IO) PCM_IN MODEM_CLKREQ_L
6

13 14
Q9079B *0.022U/25V_4 C14013 CNV_WR_LANE0_DN 15 SDIO DAT0(IO) PCM_OUT 16
[13] CNV_WR_LANE0_DN SDIO DAT1(IO) LED#2
4

2 CNV_WR_LANE0_DP 17 18
[10] CNVi_EN# 2N7002KDW [13] CNV_WR_LANE0_DP SDIO DAT2(IO) GND#13
0.1U/16V_4 19 20
CNV_WR_CLK_DN 21 SDIO DAT3(IO) UART W ake 22 CNV_BRI_RSP_L R12475 22/F_4
[13] CNV_WR_CLK_DN CNV_WR_CLK_DP SDIO W ake(I) UART Rx CNV_BRI_RSP [13]
23
[13] CNV_WR_CLK_DP SDIO Reset
1

CNVi RBI_RSP, RGI_RSP 22 Ohm, to be placed close to the connector.

R23026 CNVi RBI_DT, RGI_DT 33 Ohm, to be placed close to the PCH.
75K_1%_4
32
For EMI Suggest i on 33 UART Tx 34
R12476 33_4
CNV_RGI_RSP_L R12477 22/F_4 CNV_RGI_DT [13,16]
CNV_RGI_RSP [13]
C2083 0.1U/16V_4 PCIE_TXP6_WLAN_C 35 GND#5 UART RTS 36 R124532 33_4
CLK_24M_DEBUG [11] PCIE_TXP6_WLAN PETp0 UART CTS CNV_BRI_DT [13,16]
EC1037 *33P/50V_4 [11] PCIE_TXN6_WLAN C2080 0.1U/16V_4 PCIE_TXN6_WLAN_C 37 38
R1715 *0_4 39 PETn0 Clink RESET 40
[30,38,43,44,45,50,56] MAINON GND#6 CLink DATA
41 42
Support Wake Funct
R1333
i *Short_0402
on ( Res er ve) REQ_WLAN# [11] PCIE_RXP6_WLAN
[11] PCIE_RXN6_WLAN
43
45
PERp0
PERn0
CLink CLK
COEX3
44
46
[11] PCIE_CLKREQ_WLAN# GND#7 COEX2
47 48 9/13 Change net name
[11] CLK_PCIE_WLANP REFCLKP0 COEX1 SUSCLK_32KHZ R12443 SUSCLK_32K
49 50 *0_2
[11] CLK_PCIE_WLANN REFCLKN0 SUSCLK(32KHz) SUSCLK_32K [10]
51 52 PLTRST#
TP1058 *PAD REQ_WLAN# 53 GND#8 PERST0# 54 INT_BT_OFF# R1690 10K_4
MINICAR_PME# CLKREQ0# W _DISABLE2# INT_RF_OFF# +3V_WLAN_P
55 56 R1693 10K_4
57 PEW ake0# W _DISABLE1# 58 LAD0
+1.8V_DEEP_SUS +1.8V_DEEP_SUS CNV_WT_LANE1_DN GND#9 NFC_I2C_SM_DATA CLK_24M_DEBUG LAD0 [9,35,38]
59 60
[13] CNV_WT_LANE1_DN CNV_WT_LANE1_DP PETp1 NFC_I2C_SM_CLK CLK_24M_DEBUG [9]
61 62 LFRAME#
Q9080 Q9081 [13] CNV_WT_LANE1_DP PETn1 NFC_I2C_IRQ PULSAR_38P4M_REFCLK_R1LFRAME# [9,35,38]
63 64 R12421 *Short_0201 PULSAR_38P4M_REFCLK [11]
CNV_WT_LANE0_DN GND#10 GPIO0_NFC_RESET#
5

NL17SZ08DFT2G NL17SZ08DFT2G 65 66 LAD1

[13] CNV_WT_LANE0_DN CNV_WT_LANE0_DP PERp1 UIM_SW P/PERST1# LAD1 [9,35,38]
A 1 1 67 68 LAD2 A
MODEM_CLKREQ_L CNV_RF_RESET#_L [13] CNV_WT_LANE0_DP PERn1 UIM_POW ER_SNK LAD2 [9,35,38]
4 4 69 70 LAD3
MODEM_CLKREQ [10] CNV_RF_RESET# [10] CNV_WT_CLK_DN GND#11 UIM_POW ER_SRC LAD3 [9,35,38]
2 2 71 72
[13] CNV_WT_CLK_DN CNV_WT_CLK_DP Reserved1 3.3Vaux#3
73 74
[13] CNV_WT_CLK_DP

GND#1
GND#2
R124534 R124533 R124535 R124536 75 Reserved2 3.3Vaux#4

NC#2
NC#1
GND#12
3

75K_1%_4 10K_4 75K_1%_4 10K_4

PROJECT : NLA
Quanta Computer Inc.

79
78
76
77
Pin71 and 73 need connect to CNV WT CLK
But it will impact Debug Card signal Size Document Number Rev
Need verify it. Custom
33 -- SSD/WLAN 1A

Date: Monday, April 09, 2018 Sheet 34 of 56

5 4 3 2 1
 5 4 3 2 1

TPM (2.0) +3V 34

+3V
PN:AL009665K01 C6000 *0.1U/16V_4
D U6000 +3V D
LAD0 R6000 *0_4 LAD0_T 26 10
[9,34,38] LAD0 LAD1_T 23 LAD0 VDD_1 19
LAD1 R6003 *0_4
[9,34,38] LAD1 LAD2_T LAD1 VDD_2
LAD2 R6001 *0_4 20 24
[9,34,38] LAD2 LAD3_T 17 LAD2 VDD_3 5
LAD3 R6004 *0_4 C6003 C6001 C6002 R6005
[9,34,38] LAD3 CLK_PCI_TPM_R LAD3 VSB
[9] CLK_PCI_TPM R6002 *0_4 21 *0.1U/16V_4 *0.1U/16V_4 *0.1U/16V_4 *4.7K_4
LCLK 4
LFRAME# R6006 *0_4 LFRAME#_T 22 GND_1 11
[9,34,38] LFRAME# LFRAME# GND_2
16 18
[12,19,34,36,37,38] PLTRST# 28 LRESET# GND_3 25 TPM_PP
SERIRQ 27 LPCPD# GND_4
[9,38] SERIRQ SERIRQ 6 R6007 *4.7K_4 +3V
9 GPIO 2
TEST/BADD GPIO2 R6008
15 7 TPM_PP *0_4
CLKRUN# PP 8
1 TESTI
3 NC_1 13
12 NC_2 XTALI/32K IN 14
NC_3 XTALO
*SLB9665 T2.0

C C

Accelerometer Sensor

B B

A A

PROJECT : NLA
<Title> Quanta Computer Inc.
B Size
34 -- TPM/G-Sensor Document Number 1A R e v

Monday, April 09, 2018 35 56

Date: Sheet of
5 4 3 2 1
 5 4 3 2 1

LAN & RJ45

35
D D

LAN Daughter Board

C C
CN5502
LANB_CONN

26
24
+3V +3VLANVCC [30] DEEP_PWRLED# 23

4 Pin for LED PCIE_TXN5_LAN

[11,34] SATA_LED#
[38] MBATLED0#
PCIE_TXN5_LAN_C
22
21
20
CS1 0.1u/16V_4
[11] PCIE_TXN5_LAN PCIE_TXP5_LAN PCIE_TXP5_LAN_C 19
CS2 0.1u/16V_4
[11] PCIE_TXP5_LAN 18
C9332 C9333
*0.1U/16V_4 *0.1U/16V_4 17
[11] PCIE_RXN5_LAN 16
[11] PCIE_RXP5_LAN 15
14

16 Pin for LAN [11] CLK_PCIE_LANN

[11] CLK_PCIE_LANP
13
12
11
[11] PCIE_CLKREQ_LAN# 10
[10,37] PCIE_WAKE# 9
[12,19,34,35,37,38] PLTRST# 8
+3V 7
+3VLANVCC 6
5
+3VPCU 4
[38] NBSWON1# NBSWON1#
LID_EC# 3

B
4 Pin for PWR [38] LID_EC#
+BAT_RTC
2
1
25 B

C14018 C14019 C9329 C9331

*220p/50V_4 *220p/50V_4 *220p/50V_4 *220p/50V_4

A A

PROJECT : NLA
Quanta Computer Inc.
Size Document Number Rev
Custom 35 -- LAN RTL8107ESH-CG/RJ45 1A

Date: Monday, April 09, 2018 Sheet 36 of 56

5 4 3 2 1
 5 4 3 2 1

RTS5237S PCIE CARD READER Controller

USBP2+ 1 2 USBP2+_L
36
USBP2- 4 3 USBP2-_L

*MCM2012B900GBE
L14005
CR Daughter Board
D CN7707 D
LVDS EDP CONN
51519-0400T-V02-40P-L
DFFC40FR102

G_0
1
+5VS5 2
3
C14017 220p/50V_4 4
5
USBPW_ON# 6
[38] USBPW_ON# 7
USB30_TX2+ 8
17 Pin for USB [9] USB30_TX2+ USB30_TX2- 9
[9] USB30_TX2- 10
R124584 *Short_0402 USBP2-_L 11
[9] USBP2- USBP2+_L 12
[9] USBP2+ R124583 *Short_0402
13
USB30_RX2+ 14
[9] USB30_RX2+ USB30_RX2- 15
[9] USB30_RX2- 16
SENSE_A 17
[28] SENSE_A 18
EXT_MIC_L AGND 19
[28] EXT_MIC_L 20
LINEOUT_R AGND 21
8 Pin for Jack [28] LINEOUT_R 22
LINEOUT_L AGND 23
C
[28] LINEOUT_L 24 C
AGND 25
26
[10,36] PCIE_WAKE# 27
[12,19,34,35,36,38] PLTRST# 28
[11] PCIE_CLKREQ_CR# PCIE_TXP7_CARD_C 29
[11] PCIE_TXP7_CARD CS78 0.1u/16V_4
CS77 0.1u/16V_4 PCIE_TXN7_CARD_C 30
[11] PCIE_TXN7_CARD 31
32
[11] CLK_PCIE_CRP 33
15 Pin for CR [11] CLK_PCIE_CRN 34
35
[11] PCIE_RXP7_CARD 36
[11] PCIE_RXN7_CARD 37
38
1.32A 39
+3V 40

G_1

B B

A A

PROJECT : NLA
Quanta Computer Inc.
Size Document Number Rev
Custom 36 -- CR RTS5237S/CR SOCKET 1A

Date: Monday, April 09, 2018 Sheet 37 of 56

5 4 3 2 1
 5 4 3 2 1

37

+3V_ECACC
EC_WRST

+3V_VSTBY
+3V +3VPCU_KBC +3VPCU_KBC
C5101 0.1U/16V_4 +3VPCU
C5102 0.1U/16V_4 R371 2.2_6 +3VPCU
Q5101

1
Close to PCH C5103 0.1U/16V_4 C5104 0.1U/16V_4 R5101 4.7K_4 +3V

3
C5105 0.1U/16V_4 D8504 METR3904-G
EXT_SMI# R8731 *0_4 HRESET_C C5107 0.1U/16V_4 PDZ5.6B C14016 2 OVT_DETC 2 1 EC_PWROK R5102
[9] EXT_SMI#

114
121

106

127
C5106 0.1U/16V_4 0.1U/16V_4 D5101 *RB500V-40

11
26
50
92

74
DC_PROCHOT_OFF U5100 100K_4
[55] DC_PROCHOT_OFF

1
VSTBY_FSPI
VSTBY_1
VSTBY_2
VSTBY_3
VSTBY_4
VSTBY_6

VSTBY_5
AVCC
VCC
LAD0 10 84 CCG4_RST# R5105 10K_4 EC_WRST
[9,34,35] LAD0 LAD0 EGCLK/W UI27/GPE3 CCG4_RST# [32] +3VPCU
LAD1 9 83 VRON
[9,34,35] LAD1 8 LAD1 EGCS#/W UI26/GPE2 VRON [46] THRM_ALERT_HW#1
LAD2 C5108
[9,34,35] LAD2 LAD2 SUSACK#_EC_R
LAD3 7 82 T8519
[9,34,35] LAD3 22 LAD3 EGAD/W UI25/GPE1
[12,19,34,35,36,37] PLTRST# PLTRST# Open Drain need pu high 1U/10V_4
D CLK_24M_KBC 13 LPCRST#/W UI4/GPD2 56 D
[9] CLK_24M_KBC LPCCLK KSO16/SMOSI/GPC3 MPC_EN TP13160
LFRAME# 6 57
[9,34,35] LFRAME# LFRAME# KSO17/SMISO/GPC5 MPC_PE [46] [2,46,55] H_PROCHOT#
Q5102 *2N7002K
17 LPC 19 CRY1 R5103 *0_4/S 3 1
TP13159 LPCPD#/W UI6/GPE6 L80HLAT/BAO/W UI24/GPE0 EC_PWROK AC_PRESENT_EC [10] DGPU_OVT# [21] H_PROCHOT#
10K_4 R8620 20
DC_PROCHOT_OFF R5104 *0_4 DC_PROCHOT_OFF_R 126 L80LLAT/W UI7/GPE7 EC_PWROK [10]
5 GA20/GPB5 122 EC_RST_LED#
SERIRQ GPIO DTR1/SBUSY/GPG1/ID7

2
[9,35] SERIRQ SERIRQ EC_RST_LED#
R12174 *0_4/S HRESET_C 15 99 PCI_SERR#
PCI_SERR# [13]
[12] HRESET SIO_EXT_SCI# 23 ECSMI#/GPD4 HMOSIGPH6/ID6 98 DGPU_PWROK_Q [9,21]
HWPG *AVLC5S_4 VC5100

3
[13] SIO_EXT_SCI# EC_WRST ECSCI#/GPD3 HMISO/GPH5/ID5 HWPG [2,10,42,43,44,45] H_PROCHOT#_EC
14 97 ACIN R5107 4.7K_4 2 Q5104 C5110
EC_RCIN# W RST# HSCK/GPH4/ID4 DGPU_PROCHOT_EC# ACIN [41,55] +1.05V
4 96 2N7002K *47P/50V_4
[9] EC_RCIN# GPUT_CLK KBRST#/GPB6 HSCE#/W UI19/GPH3/ID3 DGPU_PROCHOT_EC# [21,55]
16 95 MBDATA1 R5109
[21] GPUT_CLK PW UREQ#/BBO/GPC7 CTX1/W UI18/GPH2/SMDAT3/ID2 MBDATA1[46]

2
94 MBCLK1 C5109 220P/50V_4

1
CRX1/W UI17/GPH1/SMCLK3/ID1 93 MBCLK1 [46]
CLKRUN# *10K_4
CLKRUN#/W UI16/GPH0/ID0 CLKRUN# [10] 3 1
BATSHIP 113 3 SUSWARN#_EC_R PM_THRMTRIP# [2,11]

IT8987 H_PECI (50ohm)

T8520
[41] BATSHIP LID_EC# 123 CRX0/GPC0 GPH7 Q5103
[36] LID_EC# TMA0/GPB2 Route on microstrip only METR3904-G
86
Spacing >18 mils
TPDATA EC_PECI (50ohm)
[39] TPDATA
TPCLK 85 PS2DAT0/TMB1/GPF1 117 EC_PECI_R Trace Length: <0.5 iches Trace Length: 0.4~6.125 iches
For Touch-Pad [39] TPCLK SLP_S3# PS2CLK0/TMB0/GPF0 SMCLK2/W UI22/GPF6/PECI GPUT_DATA
R5108 33_4
EC_PECI [2,11]
88 118 For GPU thermal
[10] SLP_S3# DSWROK_EC 87 PS2DAT1/RTS0#/GPF3 SMDAT2/W UI23/GPF7 110 GPUT_DATA [21]
[10] DSWROK_EC SLP_SUS#_EC PS2CLK1/DTR0#/GPF2 PS/2 SMCLK0/GPB3 MBCLK [41]
90 111 for Battery charge/charge
[10] SLP_SUS#_EC 89 PS2DAT2/W UI21/GPF5 SMDAT0/GPB4 115 MBDATA[41]
[14,31,44] SLP_SUS_ON PS2CLK2/W UI20/GPF4 SM_BUS SMCLK1/GPC1
MBCLK2
MBCLK2 [32]
116 MBDATA2 for DDR Thermal IC/CCG4M/SPEAKER AMP
SMDAT1/GPC2 MBDATA2[32]

RSMRST# 119
[10] RSMRST# 33 DSR0#/GPG6
MAINON
[30,34,43,44,45,50,56] MAINON GINT/CTS0#/GPD5 PWR_LED
UART 24
D5102 PW M0/GPA0 25 PWR_LED [30]
C MBATLED0# C
2 108 PW M1/GPA1 28 BREATHE_LED MBATLED0#[36]
[10] GPIO33_EC 1 T8523
GC6FBEN_Q_EC 109 RXD/SIN0/GPB0 PW M2/GPA2 29 FAN2_PWM
TXD/SOUT0/GPB1 PW M3/GPA3 FAN1_PWM FAN2_PWM [39]
T8521 30
RB500V-40 PW M4/GPA4 KB_LED_EN# FAN1_PWM [39]
Close to BIOS 31
USBPW_ON# 125 PW M5/GPA5 KB_LED_EN# [39]
32 VOLMUTE#
[37] USBPW_ON# SSCE1#/GPG0 PW M6/SSCK/GPA6 VOLMUTE#[28]
[12] PCH_SPI1_CLK_R R5110 15/F_4 BIOS_SPI_CLK 105 34 Front_LED T8526
FSCK/GPG7 PW M7/GPA7
BIOS_RD# 103 47
[12] PCH_SPI1_SO_R R5111 15/F_4
BIOS_WR# FMISO/GPG5 FLASH PWM TACH0/GPD6
FAN1SIG
FAN1SIG [39]
R5112 15/F_4 102 48 FAN2SIG
[12] PCH_SPI1_SI_R
R5116 15/F_4 BIOS_CS# 101 FMOSI/GPG4 TACH1/TMA1/GPD7 FAN2SIG [39] Model BOARD_ID
[12] PCH_SPI_CS0#_R S5_ON FSCE#/GPG3
100
[42] S5_ON SSCE0#/GPG2 GPU_OVERT#_EC
77 0 : White KB
MY0 36 DAC1/GPJ1 76 USB_CTL3 GPU_OVERT#_EC [22] Definition
[39] MY0
MY1 37 KSO0/PD0 DAC0/GPJ0 USB_CTL3 [30] for GPU OT_0224 1 : RGB KB
[39] MY1 38 KSO1/PD1 120 TEMP_MBAT
MY2
[39] MY2 39 KSO2/PD2 TMR0/W UI2/GPC4 124 H_PROCHOT#_EC TEMP_MBAT[41]
MY3
[39] MY3 40 KSO3/PD3 TMR1/W UI3/GPC6
MY4
[39] MY4 41 KSO4/PD4 MBID_0
MY5 +3VPCU R17825 *10K_4 R17826 10K_4
[39] MY5 42 KSO5/PD5 107
MY6 NBSWON1#
[39] MY6 43 KSO6/PD6 PW RSW /GPE4 18 SLP_S4# NBSWON1# [36]
MY7
[39] MY7 44 KSO7/PD7 RI1#/W UI0/GPD0 21 SLP_S4# [10]
[39] MY8
MY8
KSO8/ACK# WAKE UP RI2#/W UI1/GPD1
DNBSWON#
DNBSWON# [10]
MY9 45 KBMX
[39] MY9 46 KSO9/BUSY 35
[39] MY10 MY10 SUSON SUSON [43,50]
MY11 51 KSO10/PE W UI5/GPE5 112 LAN_POWER
[39] MY11 KSO11/ERR# RING#/PW RFAIL#/CK32KOUT/LPCRST#/GPB7 LAN_POWER [50]
MY12 52
[39] MY12 KSO12/SLCT
MY13 53
[39] MY13 KSO13
MY14 54
[39] MY14 KSO14
MY15 55 66
[39] MY15 KSO15 ADC0/GPI0 TP_EN [39]
MX0 58 67 R5113 *0_4/S EC_RTC_RST EC_RTC_RST [10]
B [39] MX0 MX1 59 KSI0/STB# ADC1/GPI1 68 SYS_I B
[39] MX1 60 KSI1/AFD# ADC2/GPI2 69 AD_AIR SYS_I [41] GPIO33_EC
[39] MX2
MX2
KSI2/INIT# A/D D/A ADC3/GPI3
T8525 +3V R5120 *10K_4
GPUT_CLK
MX3 61 70 R5139 *0_4/S R5121 4.7K_4 R5122 10K_4 NBSWON1#
[39] MX3 KSI3/SLIN# ADC4/W UI28/GPI4 THRM_MOINTOR2 [5] GPUT_DATA +3VPCU
MX4 62 71 R17875 *0_4 R5123 4.7K_4 R5124 4.7K_4 MBCLK
[39] MX4 KSI4 ADC5/W UI29/GPI5 THRM_MOINTOR1 EC_SRTC_RST [10]
MX5 63 72 R5125 4.7K_4 MBDATA
[39] MX5 MX6 64 KSI5 ADC6/W UI30/GPI6 73 USB_CTL2 THRM_MOINTOR1 [5] DGPU_PROCHOT_EC# LID_EC#
USB_CTL2 [30] R5126 4.7K_4 R5129 47K/F_4
[39] MX6 65 KSI6 ADC7/W UI31/GPI7 S5_ON
MX7 R5131 10K_4
[39] MX7 KSI7
81 EMU_LID R20124 *4.7K_4 GC6FBEN_Q_EC
128 DAC5/RIG0#/GPJ5 80 THRM_ALERT_HW#1 EMU_LID [26]
CLOCK R5133 10K_4 DNBSWON#
VCORE

[42] 5VS5_ON GPJ6 DAC4/DCD0#/GPJ4 +3VS5

VSS_2

VSS_3
VSS_4
VSS_5
VSS_1

MBID_0 2 79 R17870 *0_4/S R5132 100K_4 VRON R8501 4.7K_4 MBDATA1

AVSS

GPJ7 DAC3/GPJ3 78 CCG4_INT_EC [32]

USBPW_ON [30] R5135 100K_4 MAINON R8502 4.7K_4 MBCLK1
DAC2/GPJ2 R5136 100K_4 SUSON R5128 4.7K_4 MBCLK2
+3V_ECACC L5100 1 2
*HCB1608KF-181T15_S0_6/S R5130 4.7K_4 MBDATA2
+3VPCU
1

27
49
91
104

75

12

L5101 1 2*HCB1608KF-181T15_S0_6/S AJ089870F01 R17840 4.7K_4 EC_RST_LED#

IT8987E/BX C5113 C5115

C5114 1U/6.3V_4 1000P/50V_4 THRM_MOINTOR1
IT8502_AGND 0.1U/16V_4 THRM_MOINTOR2
CLK_24M_KBC *10_4 R5137 *10P/50V_4 C5100
+3V_VSTBY L5102 1 2 2.2_6
+3VPCU
1

IT8502_AGND C5117 C5118

D8516 HWPG C5119 0.1U/16V_4
*PDZ5.6B C5120 *0.1U/16V_4 *0.1U/16V_4
0.1U/16V_4
2

CLOSE to EC Pin
A A

[9,10,11,13,14,16,17,18,21,22,26,28,29,34,35,36,37,39,46,49,50,54,55] +3V
[10,12,14,28,30,31,32,34,42,43,44,45,46,50,55] +3VS5
[5,21,30,34,36,41,42,46] +3VPCU

PROJECT : NLA
Quanta Computer Inc.
Size Document Number Rev
Custom
37 -- EC (IT8987) 1A

Date: Monday, April 09, 2018 Sheet 38o f 56

5 4 3 2 1
 A B C D E

KEYBOARD Con.
MY[15:0]
KEYBOARD PULL-UP
Touch Pad Connector
[13] I2C1_SCL

[10,17,18] SMB_RUN_CLK
R17879

R17877
*Short_0402

*0_4 TP_SCL 4
Q9082A
2N7002KDW
3 TP_SMB_CLK
38
[38] MY[15:0]
CN6500
Dual R6600 4.7K_4
MX[7:0] KB_CONN
[38] MX[7:0]

5
748442605c1-26p-l MY5 C6500 220P/50V_4 +3V +3VSUS
DFFC26FR068 MY6 C6501 220P/50V_4

2
MY3 C6502 220P/50V_4 R6601 4.7K_4
MY7 C6503 220P/50V_4
4 MX1 26 R17878 *0_4 TP_SDA 1 6 TP_SMB_DATA 4
26 [10,17,18] SMB_RUN_DAT
MX7 25 MY8 C6504 220P/50V_4
MX6 24 25 27 MY9 C6505 220P/50V_4 *10P/50V_4 C6603 TP_SMB_CLK
23 24 27 [13] I2C1_SDA Q9082B
MY9 MY10 C6506 220P/50V_4 R17880 *Short_0402
MX4 22 23 MY11 C6507 220P/50V_4 2N7002KDW *10P/50V_4 C6604 TP_SMB_DATA
MX5 21 22 R17872 4.7K_4 TP_INTH#
21 +3V TP_INTH#_L
MY0 20 R17871 4.7K_4
MX2 19 20 R6602 4.7K_4 TPCLK C6600 0.1U/16V_4
19 +3VSUS +3VSUS
MX3 18 MY1 C6508 220P/50V_4 R6603 4.7K_4 TPDATA
MY5 17 18 MY2 C6509 220P/50V_4 R17888 *10K_4 TP_EN
MY1 16 17 MY4 C6510 220P/50V_4 TP_CONN
MX0 15 16 MY0 C6511 220P/50V_4 CN7708

9
MY2 14 15 C6601 10P/50V_4
MY4 13 14 MX4 C6512 220P/50V_4
MY7 12 13 MX6 C6513 220P/50V_4 1
L6600 2HCB1005KF-330T30 TPCLK-1 1
12 [38] TPCLK 2
MY8 11 MX3 C6514 220P/50V_4 1
L6601 2HCB1005KF-330T30 TPDATA-1
11 [38] TPDATA 3
MY6 10 MX2 C6515 220P/50V_4
MY3 9 10 C6602 10P/50V_4 TP_SMB_DATA 4
MY12 8 9 TP_SMB_CLK 5
MY13 7 8 MX7 C6516 220P/50V_4 TP_INTH#_L 6
MY14 6 7 MX0 C6517 220P/50V_4 R8508 *0_4/S 7
6 Q8503 [38] TP_EN 8
MY11 5 MX5 C6518 220P/50V_4
MY10 4 5 MX1 C6519 220P/50V_4 DMN53D0L-7

10
MY15 3 4 28 TP_INTH#_L 3 1 R17864 *0_4/S
2 3 28 TP_INTH# [13]
MY12 C6520 220P/50V_4
1 2 MY13 C6521 220P/50V_4
1 MY14 C6522 220P/50V_4

2
+3V
MY15 C6523 220P/50V_4

3
FAN
3

+5V R124567 0_5%_6 C7200 10U/6.3VS_6

+12V_FAN R124568 *0_5%_6 C7201 0.1U/16V_4

FAN7201
DFHD04MS403
3801-04-1-4p-l
FAN_CONN

6
FAN1_PWM C7202 *220P/50V_4
[38] FAN1_PWM 4 FAN1SIG C7203 *220P/50V_4
3
[38] FAN1SIG 2
1

5
R7201 4.7K_4
+3V

Close to EC Side

2 R124569 0_5%_6 C8529 10U/6.3VS_6 2

+5V

+12V_FAN R124570 *0_5%_6 C8528 0.1U/16V_4

FAN7202
DFHD04MS403
3801-04-1-4p-l
FAN_CONN

6
[38] FAN2_PWM 4 FAN2_PWM C8531 *220P/50V_4
3
[38] FAN2SIG 2 FAN2SIG C8530 *220P/50V_4
1

5
R8509 4.7K_4
+3V
+VIN +5V

KB LIGHT CONN Close to EC Side

R6509
1M_4 20mil
3

Q6503
2 PJA3404 CN6501
DFFC06FR172
196479-06021-3-6p-l
1 KBBL_CONN 1
7
1

Q6504
2N7002K R6510
20mil +5V_LED_KBLIGHT
3

2 2M_4 1
[38] KB_LED_EN# 2
C6527
3
PROJECT : NLA
C6526 0.1U/16V_4
0.1U/16V_4 4
1

5
6
Quanta Computer Inc.
8

Size Document Number Rev

Custom
38 -- KB/TP/FAN/HOLE 1A

Date: Monday, April 09, 2018 Sheet 39 of 56

A B C D E
 5 4 3 2 1

[29,41] +PRWSRC
[26,29,39,41,42,43,44,45,46,47,48,49,52,54] +VIN
[41] +VA
40
+PRWSRC +VIN +VA +VA
+PRWSRC +PRWSRC
+VIN +VIN
D D
EC14011 EC14012
EC8001 EC8002 EC8003 EC8004 EC8005 EC8006 EC8007 EC8008
*10u/25V_6 *10u/25V_6 *10u/25V_6 *10u/25V_6 *10u/25V_6 *10u/25V_6 *10u/25V_6 *10u/25V_6 2200p/50V_4 EC14013 EC14014 EC14015 EC14016
2200p/50V_4 2200p/50V_4 2200p/50V_4
2200p/50V_4 2200p/50V_4

+VIN_FBVDDQ_MEM

+ PC10001

*10u/25V_3528H1.4
C +VIN_3VS5 +VIN_5VS5 +VIN_DDR +VIN_0.95V +VIN_VCCIO +VIN_VCORE +VIN_VCORE +VIN_SA +VIN_VGACORE C

+ PC9970 + PC9971 + PC9972 + PC9973 + PC9974 + PC9975 + PC9976 + PC9978 + PC9979

*15u/25V_3528H1.9

*15u/25V_3528H1.9

*15u/25V_3528H1.9

*15u/25V_3528H1.9

*15u/25V_3528H1.9

*15u/25V_3528H1.9

*15u/25V_3528H1.9

*15u/25V_3528H1.9

*10u/25V_3528H1.4
+VIN

+ PC10007
*100u/25V_D6.3H5.8

B B

A A

PROJECT : G3BD
Quanta Computer Inc.
Size Document Number Rev

NB5 EMI 1A

Date: Monday, April 09, 2018 Sheet 40 of 56

5 4 3 2 1
 5 4 3 2 1

41
PQ1015 +BAT_RTC
AP0203GMT-HF NLA CFL+ N17P 1214 , 2nd ok
3 B_RTC
150W/19.5V/7.7A Do Not add test pad on PR34 100_1%_4

S
5 2
Do Not add test pad on BATDIS_G signal BQBATDRV/BATDIS_ID_DOD signal

1
1
DC_JACK PD1

G
PC34

*PDZ5.6B
100p/50V_4
4

2
BATDIS_G
+BATCHG BAT1001
+VA_AC PQ1001
D
DC_JACK +VA Idss< 5uA QM3092M6
BTJ-08KVBRZB
D
CN1001 PL9018 PQ1003 PQ1002 BATT+

10
1 AP0203GMT-HF +VAD QM3092M6 +PRWSRC 3

S
VDD1 2 *Short_0805 5 2 BATT+
VDD2 3 3 3 1 8

D
PL9019

S
VDD3 10 5 2 2 5 PC1003 SMD SMC 7
VDD10 11 *Short_0805 1 1 PC1006 SMD 6

G
VDD11 B_RTC 5

1
12

0.1u/25V_4

0.1u/25V_4
VDD12 PR1002 4

4
PC1002 PD1002 PR1005 SMC

G
4 PC1004 PC1009 3M_5%_4 BQBATDRV BATDIS_ID_DOD 3

0.1u/25V_4

P4SMAFJ20A
GND4 2

4
5 PC1008 PR10083 PC1005 +3VPCU

0.1u/25V_4

0.1u/25V_4

B_TEMP_MBAT
1
GND5 6 1

2200p/50V_4

0.01u/50V_4
GND6 2N7002K 4.02K_1%_4

2
7 2
NVPRO 0.005_1%_12 +VIN
GND7 8 PQ1004

9
PR1003 PR1004
GND8 9 330_5%_4 330_5%_4

3
GND9
DC-IN_CONN_12P PR1006 Place this ZVS close to
ZVS close to DC jack

1M_5%_4
Far-Far away +VIN [38] MBDATA PR1016

3S1P 52.5Whr
200K_1%_4

1
BATDIS_G [38] MBCLK
PD1003
PD1001 PR1017

*P4SMAFJ20A
TEMP_MBAT[38]
PD1004 1K_1%_4

1
PR1010 PR1011

*PDZ5.6B

*PDZ5.6B
2
*Short_0201 *Short_0201 PC1016 PC1017

0.01u/50V_4

0.01u/50V_4
PR1014
4.02K_1%_4 +VAD

2
PC1015 PC1014 PC1022 PC1021
PC1010 PC1011

10u/25V_6

0.1u/25V_4
C C

2200p/50V_4

1000p/25V_2

*100p/50V_4

*100p/50V_4
REGN6V
Place this cap
PR1015
close to EC
PC1020

BQACN
BQACP
4.02K_1%_4 PC1013
PC1018 PC1019

0.1u/25V_4
PQ1006

5
2.2u/10V_4 QM3002M3

16
2

1
0.1u/25V_4 0.1u/25V_4 D
G

ACP

REGN
ACN
18 BQHIDRV 4
BQCMSRC 3 HIDRV S
CMSRC 1 2
REGN6V

1
2
3
PD1005 RB500V-40
BQACDRV 4 17 BQB_2 BQB_1 PR1020
ACDRV BTST PR1018 1_5%_6 0.01_1%_12 +BATCHG
PL1001
PC1023
19 BQPHASE 1 2 BQLR
REGN6V PR1019 100K_1%_4
PHASE
0.047u/25V_4
PU1001
ACIN 5 BQ24738HRGRR 4.7uH_7x7x3 PC1024 PC1025 PC1026

1
PD1012
2 1 [38,55] ACIN ACPRES 15 BQLODRV PR1023 PD1006
+VA LODRV

5
PR1022 100K_1%_4 PQ1007 2.2_5%_6

*RB500V-40
SNCRG
QM3002M3 D

10u/25V_6

10u/25V_6
BAS316

0.1u/25V_4
14 G
GND#1

2
PD1013 PR1026 21 4
2 1 BQVCC 20 GND#2 S PR1024 PR1025
+BATCHG VCC PC1029 PC1027

*Short_0201

*Short_0201
1
2
3
BAS316 22_5%_8 2200p/50V_4
PC1028
B 0.47u/25V_4 0.1u/25V_4 B
MBDATA BQDATA 8 13 BQSRP PR1028 10_1%_6
PR1027 *Short_0201 SDA SRP CSOP
12 BQSRN PR1029 5.6_1%_6 PC1031 CSON
MBCLK BQCLK 9 SRN

0.1u/25V_4
ACDET
PR1030 *Short_0201 SCL 11 BQBATDRV

IOUT
BATDRV

ILIM
PC1032

10

7
0.1u/25V_4 +BATCHG

BQIOUT
ACDET0 PR1031 430K_1%_4 ACDET ILIM

ACDET=13V PC1033 PR1034 PR1001 PR1035

SYS_I [38]
PR1036
PR1032 PR1033 43.2K_1%_4 300_5%_4 470_5%_8

100K_1%_4
69.8K_1%_4
88.7K_1%_4

PC58 PC1035
ACDET3

*0.1u/25V_4

3 SHIPNET
100p/50V_4

2200p/50V_4
+3VPCU
MIN. BATV=7.2V
3

PR1037 1M_5%_4 ACDET1 2 2

+PRWSRC [38] BATSHIP
Place this cap [10,12,14,36] +BAT_RTC
PQ1010 PQ1009
PR1039 2N7002K
close to EC 2N7002K
[26,29,39,40,42,43,44,45,46,47,48,49,52,54] +VIN
1

1
[29,40] +PRWSRC
1M_5%_4
[5,21,30,34,36,38,42,46] +3VPCU
Set MAX charge I to 5A
A A

+VA
3

PQ1011
PR1040 2
ACDET2 METR3904-G

PROJECT : G74(P15-BPA)
75K_1%_4
1

PR1042
3.92K_1%_4
Quanta Computer Inc.
Size Document Number Rev
Custom CHARGER 1A
NB5 Date: Monday, April 09, 2018 Sheet 41 of 56
5 4 3 2 1
 5 4 3 2 1

+3.3 Volt +/- 5%

42
Do Not add test pad on VCC & LDO pin Continue:4A
+VIN_3VS5 PL2002 +VIN
+3VPCU
+3VS5
PU2001
2
*Short_0805
Peak:8A
17 IN#1 3
LDO IN#2 4 PC2006 PC2007 PC2002 PC2003
OCP minimum:9A
D IN#3 5 PC2004 D

10u/25V_6

10u/25V_6

2200p/50V_4
0.1u/25V_4
PR2002 PC2005 IN#4 +3VS5
10K_1%_4 2.2u/10V_4 7 0.1u/25V_4
GND#1
PR2003
HWPG SY8208BPG 9
[2,10,38,43,44,45] HWPG PG PC2008 PJP2001
PR2004 0.1u/25V_4 PL2001 +3.3VS5_S *short3720
*Short_0402 1 SY8208BBST SY8208BBST_S 1.5uH_7x7x3
11 BS
+VIN SY8208BLDOEN
EN2
Idc=9A Isat=18A
1_5%_6
PR2001 6 SY8208BSW 1 2
499K_1%_4 PR2010 LX#1 19
150K_1%_4 LX#2 20
LX#3 PR2005
*2.2_5%_6 PR2007 + PC2009
*Short_0201 PC2010 PC2011 PC2012 PC2013 PC2014 PC10002

*150u/6.3V_D5H3.9
PR2006 10

820p/50V_4
0.1u/16V_4

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6

*22u/6.3V_6
S5_ON SY8208BEN 12 NC#1 16
EN1 NC#3
PC2016
*Short_0402 *2200p/50V_4
PR2008 PC2015
1M_5%_4 *0.1u/16V_4
14 SY8208BVOUT
OUT
15
NC#2 PC2017
13 SY8208BFB

GND#2
GND#3
GND#4
FF
C PR2009 C
1K_1%_4 330p/50V_4
SY8286BRAC

8
18
21

Do Not add test pad on VCC & LDO pin PU2002 +VIN_5VS5
+5 Volt +/- 5%
+5VPCU
SY8288CRAC PL2003
*Short_0805
+VIN
Continue:7.5A
2
15 IN#1 3 PC2019 PC2020 PC2021 PC2022 Peak:11.2A
LDO IN#2 4 PC2023
OCP minimum:12.2A
10u/25V_6

10u/25V_6

2200p/50V_4
0.1u/25V_4

IN#3 5
PC2018 IN#4 0.1u/25V_4
2.2u/10V_4 7
GND#1

HWPG SY8208CPG 9
PR2012 *Short_0402 PG PC2024
B PR2011 0.1u/25V_4 PL2004 +5VS5 B
1 SY8208CBST SY8208CBST_S 2.2uH_7x7x3
SY8208CLDOEN 11 BS
+VIN EN2 1_5%_6
PR9226 6 SY8208CSW 1 2
499K_1%_4 PR9225 LX#1 19
150K_1%_4 LX#2 20
PR2015 LX#3
Rb 1K_1%_4 PR2013 PR2014 + PC2028 PC2029 PC2030 PC2025 PC2026 PC2027
*2.2_5%_6 *Short_0201 PC10003

820p/50V_4
0.1u/16V_4

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6
*150u/6.3V_3528H1.4
[38] 5VS5_ON 10

*22u/6.3V_6
SY8208CEN 12 NC#1 16
[38] S5_ON EN1 NC#2
PR2016
Ra *1K_1%_4 PC2001
*2200p/50V_4
PC2031
PR2017 *0.1u/16V_4
1M_5%_4 14 SY8208CVOUT
OUT
17
VCC PC2033
13 SY8208CFB
GND#2
GND#3
GND#4

PC2032 FF
PR2018
2.2u/10V_4 1K_1%_4 330p/50V_4
8 1821

A A
Do Not add test pad
on VCC & LDO pin
USB Charge Support Ra Rb

VINE (No support) Stuff NA +VIN [26,29,39,40,41,43,44,45,46,47,48,49,52,54]

+3VS5 [10,12,14,28,30,31,32,34,38,43,44,45,46,50,55]
+5VS5 [10,29,30,31,32,33,37,43,44,45,50,51,52,54,56]
PROJECT : X1F
ENVY (Support) NA Stuff +3VPCU [5,21,30,34,36,38,41,46]
+5VPCU [44,50,55]
Quanta Computer Inc.
Size Document Number Rev
Custom
NB5 3/5VS5 (SY8208B/SY8208C) 1A

Date:
Monday, April 09, 2018 Sheet 42 of 56
5 4 3 2 1
 1 2 3 4 5

43
[26,29,39,40,41,42,44,45,46,47,48,49,52,54] +VIN
[17,18] DDR_VTT
[10,29,30,31,32,33,37,42,44,45,50,51,52,54,56] +5VS5
[10,12,14,28,30,31,32,34,38,42,44,45,46,50,55] +3VS5
[2,6,10,17,18,45] +1.2VSUS
[17,18] +2.5V_SUS

[2,10,38,42,43,44,45] HWPG PR3002 *Short_0201

A
RILIM = ILIMIT x RDS(ON) / 5μ A× 1
0 A
PR3003 *Short_0201
[38,50] SUSON

PC3002
*0.1u/6.3V_2
PR3004 *0_5%_2
[18] DDR_VTT_PG_CTRL_R
PR3005 Ton=620K; (Fsw=:500K)

1P35V_PGOOD
PR3006 *Short_0201 243K_1%_4
[30,34,38,44,45,50,56] MAINON
+1.2V +/- 5%

1P35V_CS
1P35V_S3

1P35V_S5
+VIN_DDR +VIN
PC3003
*0.1u/6.3V_2 1P35V_TON PR228 *Short_0805
Countinue current:6A
PR3007 499K_1%_4
Peak current:8A
PC3004 PC3001 PC3005 PC3006 PC3007
OCP minimum:10.5A

10

13
7

10u/25V_6

10u/25V_6

2200p/50V_4
0.1u/25V_4

0.1u/25V_4
S3

S5

CS
PGOOD

TON

5
DDR_VTT +1.2VSUS
D
20 G
VTT 17 1P35V_UGATE 4
UGATE S

2
2
PC3008 VTTSNS PR3008 PC3009 PQ3001 PJP3001

1
2
3
10u/6.3V_4 18 1P35V_BOOT DDR_BOOT QM3002M3
BOOT *short-solderjumper-3
1 +1.2VSUS_S
VTTGND PL3001

1
PU3001 2.2_5%_6 0.1u/25V_4
16 1P35V_PHASE 1 2
( 3mA ) RT8231BGQW
PHASE
PR3009 100_1%_4 VTTREF 4 15 1P35V_LGATE
DDR_VTTREF VTTREF LGATE 1uH_7x7x3

5
B PC3013 PC3014 PC3015 PC3016 B
19 12 D PR3010 PC3012

22u/6.3V_6

22u/6.3V_6

*22u/6.3V_6

*22u/6.3V_6
VLDOIN VDD +5VS5
PC3010 PC3011 G *2.2_5%_6 PR3011

0.1u/6.3V_2
0.033u/16V_4 PC3017 4 *Short_0201
0.1u/6.3V_2

PC3018 S

SNDDR
1u/6.3V_4 PQ3002
*10u/6.3V_4

1
2
3
VDDQ
PGND
QM3106M3

GND

PAD
VID

FB
+1.2VSUS
PC3019

GD00 3

11

14

21
*2200p/50V_4
PR3012

1P35V_VID

1P35V_FB
*Short_0201
Rds(on) 14m ohm
PR3013
1P35V_VDDQ
+5VS5
*Short_0201
PR3014

7.87K_1%_4

PR3015
10K_1%_4 VO=(0.675(R1+R2)/R2)

C C

+2.5V +/- 5%
TDC:1A
+3VS5

+2.5V_SUS

PC3020 PC3026 3 5
VIN NC PR3001
10u/6.3V_4

0.1u/6.3V_2

*Short_0603
PU3002 +2.5V_SUS_SRC
G9661MF11U
6
VO
SUSON VEN 2
VEN
Vih=1.6V PR3016 *Short_0201
4 8 PC3021 PC3024 PC3022
+5VS5 VPP GND#1
PC3023
10u/6.3V_4

0.1u/6.3V_2
*10u/6.3V_4
ADJ

PC3025 1 9
0.1u/6.3V_2

POK GND#2
1u/6.3V_4

VDDQ_POK

PR3018
2.5V_FB
R1
215K_1%_4
D D
R2 PR3019
100K_1%_4
HWPG
[2,10,38,42,43,44,45] HWPG
PR3017 *Short_0201 VO=(0.8(R1+R2)/R2)
R2<120Kohm
PROJECT : G74(P15-BPA)
Quanta Computer Inc.
Size Document Number Rev
Custom DDR/2.5VSUS(RT8231B) 1A
NB5 Date: Monday, April 09, 2018 Sheet 43 of 56
1 2 3 4 5
 5 4 3 2 1

PR505
95.3K_1%_4
+VIN [26,29,39,40,41,42,43,45,46,47,48,49,52,54]
+3VS5[10,12,14,28,30,31,32,34,38,42,43,45,46,50,55]
+5VS5[10,29,30,31,32,33,37,42,43,45,50,51,52,54,56]
+1.05V_DEEP_SUS [10,14,45]
+1.8V_DEEP_SUS [13,14,16,31,34,55]
+1.8V [22]
44
+1.05V [2,6,10,38,55]

6TON1V
(V1.00A+V1.00_MODPHY+VccPRIM_CORE)
Vo Rton
PU501 +VIN_0.95V +VIN
+5VS5
+1.0VS5 Volt +/- 5% 0.95V 82k

TON
7 PR513 *Short_0805
D IN#1 22 D
21 IN#2 Continue:8A
PR512 5.1_1%_6 2260VCC105
VCC 1V 84.5k
PC502 PC503 PC504 PC505 PC506
0.1u/25V_4 Peak:10.32A

10u/25V_6

10u/25V_6

2200p/50V_4
0.1u/25V_4
PC521
4.7u/6.3V_4 OCP minimum:12A 1.05V 95.3k

PC522 1.35V 113k

20 1237BSTPCH BST01V
BST +1.05V_DEEP_SUS
PR506 0_5%_6
0.1u/25V_4
PL501
1uH_7x7x3 1.5V 127k
10 1237LX 1 2
HWPG 1237PGPCH 1 LX#1
[2,10,38,42,43,45] HWPG PGOOD 16
PR507 *Short_0402
LX#2 7x7x3mm
17 +
LX#3 18 PR501 PC512 PC513 PC514 PC515 PC516
1237PFMPCH 3 LX#4 *2.2_5%_6 PR502

22u/6.3V_6

22u/6.3V_6

*150u/6.3V_3528H1.9
*22u/6.3V_6

*22u/6.3V_6
PR508 *Short_0201 PFM *Short_0201 PC511
12

0.1u/6.3V_2
SN1V
1237ENPCH 2 PGND#1 13
[14,31,38,44] SLP_SUS_ON EN PGND#2 14
PR509 *Short_0402
PGND#3 15
PC523 PGND#4 19 PC501
*0.1u/6.3V_2 PGND#5 4 *2200p/50V_4
AGND

1237SSPCH 23 5 1237FBPCH
R1 1237FBPCH_S
C SS FB PR510 3.16K_1%_4 C

PC524 PR511 Vout1=(1+R1/R2)*0.8

0.1u/25V_4 AOZ2261QI-18 10K_1%_4

1.91K CS21912FB13 0.95V

Volume Segment
+VCCSTPLL: 0.06A SKL/KBL CS22612FB15 1V
Vcc_STG: 0.02A
CNL/CFL 3.16K CS23162FB04 1.05V
Vcc_PLL: 0.15A

<= 10ms, full load ready +1.05V_DEEP_SUS +1.8V_DEEP_SUS

(Vcc_ST+Vcc_PLL)
1.8VS5 +/- 3%
TDC:3A
0.5A PC570
0.1u/6.3V_2
PC591
0.1u/6.3V_2 0.5A EDP:4A
1

+1.05V +1.8V_S2 +1.8V PC551 +1.8V_DEEP_SUS

VIN1#1

VIN1#2

VIN2#1
VIN2#2

B PR551 B
PR560
13 8 SN_P18
14 VOUT1#1 VOUT2#1 9 *Short_0603
VOUT1#2 VOUT2#2 *2200p/50V_4 *2.2_5%_6 +1.8V_DEEP_SUS_S2 PR570
PC592 PC593 PC594 PC575 *Short_0603
11 HWPG 554PG_1.8V
4 PL551
*10u/6.3V_4 0.1u/6.3V_2 0.1u/6.3V_2 *10u/6.3V_4
GND#1 PR565 *Short_0402 PGOOD 1 554LX_1.8V 1 2
15 LX#1 1uH_2.5x2.0x1.2 554FB_1.8V_S PR569
4 PU552 GND#2 PR571 *Short_0603 554PVIN_1.8V 9 2 *Short_0201
+5VPCU BIAS +3VS5 PVIN#1 LX#2
PC576 AOZ1331DI PC574 PC562
10 3 *22p/50V_4 PR568 PC561 PC563

22u/6.3V_6
0.1u/6.3V_2 PVIN#2 PU551 LX#3 20K_1%_4
R1

0.1u/6.3V_2

*10u/6.3V_4
RT8068AZQW 7 554NC_1.8V PC573
105VEN_1 3 5 1.8V_EN_2 NC *68p/50V_4
0,34,38,43,44,45,50,56] MAINON EN1 EN2 MAINON [30,34,38,43,44,45,50,56] 554SVIN_1.8V 8 554FB_1.8V
SS1

SS2

PR561 *Short_0402 PR562 *Short_0402 PR572 6

10_5%_6 SVIN FB PR566
PC577 PC578 11 5 554EN_1.8V
GND EN
12

10

*0.1u/6.3V_2 *0.1u/6.3V_2
PC572 PC571 PC590 *Short_0201
R2
PR567
V0=0.6*(R1+R2)/R2
105V_SS

1.8V_SS

PC581
0.01u/50V_4

10u/6.3V_4

1u/6.3V_4
10K_1%_4

*0.1u/6.3V_2
PC579 PC580
1000p/25V_2

1000p/25V_2

SLP_SUS_ON [14,31,38,44]

A A

PROJECT : G3AA -CFL

Quanta Computer Inc.
Size Document Number Rev
Custom
NB5 +1V_DEEP_SUS/1.8V(AOZ2261) 1A

Date: Monday, April 09, 2018 Sheet 44 of 56

5 4 3 2 1
 5 4 3 2 1

45
Default setting
Volume Segment Volume Segment Volume Segment Volume Segment
C10: turn off VCCPLL_OC , VCCIO , VCCSTG
SKY/KBY-U22/U42/U23e SKY/KBY-H 22/42/44e CNL U22 CFL H6/H4
Vcc_IO: 3.4A/1V Vcc_IO: 5.5A/0.95V Vcc_IO: 5.1A/0.95V Vcc_IO: 6.4A/0.95V
Stuff PU601 Stuff PU601 & merge 1V_deep_sus Vcc_IO: Can merge +1.05V_deep_sus Stuff PU603
+3VS5
Unstuff PU603 Unstuff PU601
+1.2VSUS
D
Unstuff PU601 D

PC622
0.1u/6.3V_2
PC602
Unstuff PU601=G5027 For C10 Add 0.1u/6.3V_2

3
PR613
17SZ_EN1 1 47K_1%_4
[13,45] PWR_GATE# 4 VCCPLL_OC_EN_2 VCCPLL_OC_EN_1 2
PR611 *Short_0402
17SZ_EN2 <= 240us, full load ready
2
[30,34,38,43,44,45,50,56] MAINON
PR612 *Short_0402
PU602 PC623
PQ601
DMG3414U-7
TDC:0.26A

1
NL17SZ08DFT2G *1000p/25V_2
+1.2V_VCCPLL_OC_S2
PL603 +1.2V_VCCPLL_OC
*Short_0603

PR640 *0_5%_4

PC615 PC616
0.1u/6.3V_2 *10u/6.3V_4

For C10 Add +VIN_VCCIO

PR620 +VIN
+1.2V_VCCPLL_OC
+3VS5
*Short_0402
681_3V3 10
PU601
3V3 VIN
1 PR626 *Short_0805 CFL=0.95V/LPM=0V
PC627 PC604 PC605 PC606 +VCC_IO +/-5%
+5VS5
PR627 1u/6.3V_4 PC607 PC608
Cont i nuous c urr ent: A PR614

10u/25V_6

10u/25V_6
0.1u/25V_4
*Short_0402

2200p/50V_4

0.1u/25V_4
*22_5%_8
C OPC_AGND 11 2 C
PR622 AGND PGND Peak current: 6.4A
*Short_0402 PR615 VCCPLL_OC_DIS2
*1M_5%_4
[30,34,38,43,44,45,50,56] MAINON

3
PR621 PC626 PQ603A
+3V_DEEP_SUS 1_5%_6 0.22u/25V_6 VCCPLL_OC_DIS15
*2N7002KDW
9 OPC_BST BST_VCIO PL601 +VCCIO
BST

6
PR638 1uH_7x7x3
*100K_1%_4 PC624 PR616

4
OPC_EN 5 8 OPC_SW 1 2 2 *2M_1%_4
EN SW
PR641 *0.1u/6.3V_2 PQ603B
*Short_0402 PR601 *2N7002KDW

1
681_LP# 6 *2.2_5%_6
[13,45] PWR_GATE# LP# PC617
PR634 *100K_1%_4 VID1_VCCIO 3 SN_VCCIO PR623 PC618 PC619 PC613 PC614

0.1u/6.3V_2
C1 *Short_0201 +1.05V_DEEP_SUS

22u/6.3V_6

22u/6.3V_6

*22u/6.3V_6

*22u/6.3V_6
PR631 100K_1%_4 VID0_VCCIO 4
C0 PC601
PR624 *2200p/50V_4
0_5%_4
681_MODE For C10 Add
7
MODE
VCCIO mode PC628

3
PR630 PQ606 0.1u/6.3V_2
47K_1%_4 DMG3414U-7
VCCSTG_EN22
OPC_PG 13 12 OPC_VOUT PR617 100_1%_4 VCCIO_FB
[2,10,38,42,43,44] HWPG PG VOUT
PR618 *Short_0402

1
B NB681AGD-Z +VCCSTG B
OPC_VOUT
VCCIO_VCCSENSE [6]
PR633 *Short_0201
OPC_AGND
VID0_VCCIO VID1_VCCIO LP# VCCIO PR637 *Short_0201
VCCIO_VSSSENSE [6]
PC630 PC629
X X 0 0V PR632
0.1u/6.3V_2 *10u/6.3V_4

0 0 1 0.85V 100_1%_4
+5VS5 +VCCSTG
1 0 1 0.875V
0 1( IC internal PU High) 1 0.95V Default setting PR636 PR628
*1M_5%_4 *22_5%_8

DIS_VCCSTG2

3
PQ605A
DIS_VCCSTG1 5
*2N7002KDW

6
PR639

4
2 *2M_1%_4

PQ605B
*2N7002KDW

1
A A

+3V_DEEP_SUS [9,10,12,13,14,16,18]
+VCCSTG [6]
+3VS5[10,12,14,28,30,31,32,34,38,42,43,44,46,50,55]
+5VS5[10,29,30,31,32,33,37,42,43,44,50,51,52,54,56]
+VCCIO [3,6]
PROJECT : Drax (N17-EX)
+1.05V_DEEP_SUS [10,14,44]
+1.2V_VCCPLL_OC [6] Quanta Computer Inc.
+1.2VSUS [2,6,10,17,18,43]
+VIN [26,29,39,40,41,42,43,44,46,47,48,49,52,54]
Size Document Number Rev
Custom
NB5 +1.0V/+VCCSTPLL/+VCCIO 1A

Date: Monday, April 09, 2018 Sheet 45 of 56

5 4 3 2 1
 5 4 3 2 1

46
+3V +3VS5

+VCCSTPLL
PR403 PR365
*4.7_5%_4 4.7_5%_4
MP2949A_PW1 PR408 *Short_0201
+3VS5 VCORE_PWM1 [47]
MP2949A_PW2 PR409 *Short_0201
PR357 PR358 PR359 PR360 PC460 MP2949_+1.8V VCORE_PWM2 [47]
100_1%_4 *75_1%_4 45.3_1%_4 *75_1%_4 0.1u/6.3V_2 MP2949A_PW3 PR410 *Short_0201
VCORE_PWM3 [48]
D PR361 PR362 PR363 PC459 MP2949A_PW4 PR411 *Short_0201 D
10K_1%_4 *4.7K_1%_4 *4.7K_1%_4 0.1u/6.3V_2 PR364 VCORE_PWM4 [48]
MP2949A_PW5 PR412 *Short_0201
*0_5%_4
VR_SVID_DATA GT_PWM5[49]
VR_SVID_ALERT# MP2949A_SLP_SO# PR366 MP2949A_PW6 PR413 *Short_0201
VR_SVID_CLK MBCLK1 2M_1%_4 VCCSA_PWM6 [49]
H_PROCHOT# MBDATA1 MP2949A_VIN_SEN
+VIN_VCORE MP2949A_CS1 PR414 *Short_0201
VCORE_CS1 [47]

PC461

4.7u/6.3V_4
MP2949A_CS2 PR415 *Short_0201

PC462
MP2949A_VDD18

MP2949A_VDD33
VCORE_CS2 [47]
PR367

0.01u/50V_4
133K_1%_4
MP2949A_CS3 PR416 *Short_0201
VCORE_CS3 [48]

1u/6.3V_4
CFL change

PC463
MP2949A_CS4
PMBUS(Connect to EC) Connect to PCH, for PR417 *Short_0201
VCORE_CS4 [48]

saving mode, MP2949A_CS5 PR418 *Short_0201

VCCGT_CS1 [49]
Pull high-->no used

49

47

26

44

43

42

41

40

39

38
PR368 MP2949A_CS6 PR419 *Short_0201

VDD18

VDD33

PWM1

PWM2

PWM3

PWM4

PWM5

PWM6
AGND

VIN_SEN
VCCSA_CS1 [49]
*Short_0402
MP2949A_EN 37
[38] VRON EN MP2949A_STB
PR404 *0_5%_2 34 PR420 *Short_0201
MP2949A_SLP_SO# 35 STB VR_STB [47,48,49]
[10] PCH_SLP_S0ix# SLP_S0# 5 MP2949A_CS1
PC498 PR372 1.5K_1%_4
*0.1u/6.3V_2 +3V PR405 *Short_0201 MP2949A_SCL_P 33 CS1
[38] MBCLK1 SCL_P 4 MP2949A_CS2 VCORE_CSUMA
PR373 1.5K_1%_4
C PR406 *Short_0201 MP2949A_SDA_P 32 CS2 C
[38] MBDATA1 SDA_P 3 MP2949A_CS3
PR369 PR374 1.5K_1%_4
PR370 75_1%_4 MP2949A_VRHOT# 31 CS3
*10K_1%_4 [2,38,55] H_PROCHOT# VRHOT# 2 MP2949A_CS4 PR371 1.5K_1%_4
PR431 *Short_0201 MP2949A_VRRDY 30 CS4
IMVP_PWRGD VRRDY MP2949A_CS5 VCCGT_CSUMB
1 PR375 1.5K_1%_4
PR376 *Short_0402 MP2949A_ALT# 29 PU301 CS5
[2] VR_SVID_ALERT# ALT# MP2949A_CS6 VCCSA_CSUMC
48 PR377 1.5K_1%_4
PR378 10_1%_4 MP2949A_SDIO 28 MP2949AGQKT-0098-Z CS6
[2] VR_SVID_DATA SDIO 6 MP2949A_VDIFFA
PR379 49.9_1%_4 MP2949A_SCLK 27 VDIFFA
[2] VR_SVID_CLK SCLK
PM BUS Address=20h MP2949A_ADDR_P
PR380 PR381
PC465
25 1.43K_1%_4 *0_5%_4 PR383 *100_1%_4
MP2949_+1.8V ADDR_P MP2949A__VFBA 2949_VFBA
7
MP2949A_PSYS VFBA +VCC_CORE
PR382 46
*0_5%_4 PSYS *0.1u/6.3V_2
PR384 36 8 MP2949A_VOSENA PR421 0_5%_2
PE VOSENA VCC_SENSE [7]
0_5%_4 PR385 PC466
9 MP2949A_VORTNA PR422 0_5%_2
MP2949A_IREF VORTNA VSS_SENSE [7]
*330p/25V_2 PR386 61.9K_1%_4 24
20K_1%_4 IREF 10 MP2949A_VDIFFB
VCORE_CSUMA PR427 *Short_0201 MP2949A_CSUMA 18 VDIFFB PR388 *100_1%_4
CSSUMA PR387 PR389
VCCGT_CSUMB MP2949A_CSUMB 19 PC467
PR428 *Short_0201 2.1K_1%_4 *0_5%_4
CSSUMB 11 MP2949A_VFBB 2949_VFBB
VCCSA_CSUMC PR429 *Short_0201 MP2949A_CSUMC 20 VFBB PR390 100_1%_4 +VCCGT
CSSUMC
MP2949A_IMONA 21 *0.1u/6.3V_2
IMONA 12 MP2949A_VOSENB PR423 *Short_0201
MP2949A_IMONB 22 VOSENB VCCGT_SENSE [5]
B PR392 IMONB 13 MP2949A_VORTNB PR424 *Short_0201 B
MP2949A_IMONC VORTNB VSSGT_SENSE [5]

VORTNC

VOSENC
28K_1%_4 PC468 23

VDIFFC
IMONC

TEMP
220p/25V_2

VFBC
PR394 100_1%_4
+3VPCU 20180207 PR393 PC469
68p/50V_4
332K_1%_4

45

14

15

17

16
PR407
*10K_1%_4 PR395 PC470 PR396 100_1%_4 +VCCSA
MP2949A_TEMP
100K_1%_4 *0.1u/6.3V_2
MP2949A_VOSEN PR425 0_5%_2 VCCSA_SENSE [6]
PR397 PC471 MP2949A_VORTN PR426 0_5%_2 VSSSA_SENSE [6]
[38] MPC_PE 115K_1%_4 68p/50V_4
PC472
PR400 100_1%_4
[47,48,49] VR_TEMP MP2949A_VFB 2949_VFBC
To EC pin77 PR398 *Short_0402

PC473 PR399
PR401 *0_5%_4 *0.1u/6.3V_2
49.9K_1%_4 1u/6.3V_4 MP2949A_VDIFFC

PR402
8.2K_1%_4

CPU Design P/N Vender P/N

+VIN_VCORE [26,29,39,40,41,42,43,44,45,47,48,49,52,54]
+3VPCU [5,21,30,34,36,38,41,42] 4+1+1 ( CORE,GT,SA)=4+1+1 AL002949018 MP2949AGQKT-0098-Z
A +3VS5 [10,12,14,28,30,31,32,34,38,42,43,44,45,50,55] A
+5VS5 [10,29,30,31,32,33,37,42,43,44,45,50,51,52,54,56] 3+2+1 ( CORE,GT,SA)=3+2+1 AL002949019 MP2949AGQKT-0099-Z
+VCCSTPLL [2,6]
+VCC_CORE [7,47,48]
+VCCGT [5,49]
+VCCSA [6,49]

PROJECT : X1F
Quanta Computer Inc.
Size Document Number Rev
1A
NB5 DDR3 (RT8231B)
Date:
Monday, April 09, 2018 Sheet 46 of 56
5 4 3 2 1
 5 4 3 2 1

+VIN
+VIN_VCORE

47
+VIN_VCORE [26,29,39,40,41,42,43,44,45,46,48,49,52,54] 20180206
+5VS5[10,29,30,31,32,33,37,42,43,44,45,50,51,52,54,56]
+VCC_CORE [7,46,48]
+VIN [26,29,39,40,41,42,43,44,45,46,48,49,52,54] + PC357 + PC4087 + PC9049 + PC9212
PC311 PC312 PC313 PC314 PC315

10u/25V_6

10u/25V_6

10u/25V_6

2200p/50V_4

0.1u/25V_4

*15u/25V_3528H1.9

100u/25V_D6.3H5.8

100u/25V_D6.3H5.8

*100u/25V_D6.3H5.8
+5V

3
4
9
D1
D PU302 D
MP8693GDT-Z PR447
PC441 1_5%_6
1u/6.3V_4 8 12 8693_VCORE_HG1 8693_VCORE_HG1_R 1 G1 +VCC_CORE
VCC HGATE
D2/S1 5
PL301
0.24uH_7x7x4
Default setting
PC442 2 S1/D2 6 8693_VCORE_SW1 1 2
[46] VCORE_PWM1 PR320 *Short_0201 8693_VCORE_PWM1 3 0.1u/25V_4 7
PW M 1 8693_VCORE_BST1
BST PR301 PR436 PR435
CFL H6+2 (45W)
*Short_0201 8693_VCORE_CS1 5 11 8693_VCORE_SW1

SN_CORE1
[46] VCORE_CS1 PR325
CS SW
*2.2_5%_6 *Short_0201 *Short_0201
+ PC361 CPU CORE Volt
8 G2 VCORE_ISENP1_SRC
Countinue current:80A

220u/2V_7343H1.0
[46,47,48,49] VR_TEMP PR321 *Short_0201 8693_VCORE_VTEMP1 2 PQ301
TEMP S2
*Short_0201 8693_VCORE_SYNC1 8693_VCORE_LG1
AOE6930
Peak current:128A

ISENN

ISENP
PR322 4 9 PR446

EPAD
[46,47,48,49] VR_STB

GND
SYNC LGATE

10
PC301
*2200p/50V_4
1.69K_1%_4
PC474
OCP minimum:166A
0.22u/6.3V_2
LL= 1.8mV/A

10
13

7
PR434 PR441 VBOOT=0V

VCORE1_NTC2
PR440 PR437
10K_NTC_4_1%
1 2
1.74K_1%_4
Address=20h
309_1%_4 412_1%_4
4-phase design , Rds=1.05mR
VCORE1_NTC1
8693_VCORE_ISENP1 VCORE_ISENP1_SRC1 PR445
10K_1%_4
20180207
PR442
309_1%_4
8693_VCORE_ISENN1 VCORE_ISENN1_SRC1
C C

PC476
*0.1u/6.3V_2

+VIN_VCORE CFL H4+2 (45W)

CPU CORE Volt
Countinue current: 60A
PC317 PC318 PC319 PC320 PC326
Peak current:86A

10u/25V_6

10u/25V_6

10u/25V_6

2200p/50V_4

0.1u/25V_4
OCP minimum:111.8A
+5V LL= 1.8mV/A

3
4
9
D1 VBOOT=0V
PU303
MP8693GDT-Z PR499
Address=20h
PC443
1u/6.3V_4 8 12 8693_VCORE_HG2
1_5%_6
8693_VCORE_HG2_R 1 G1 4-phase design , Rds=3mR
VCC HGATE PL302 +VCC_CORE
D2/S1 5 0.24uH_7x7x4
PC444 2 S1/D2 6 8693_VCORE_SW2 1 2
[46] VCORE_PWM2 PR327 *Short_0201 8693_VCORE_PWM2 3 0.1u/25V_4 7
PW M 1 8693_VCORE_BST2
BST

SN_CORE2
PR302 PR470 PR471
[46] VCORE_CS2 PR326 *Short_0201 8693_VCORE_CS2 5 11 8693_VCORE_SW2 *2.2_5%_6 *Short_0201 *Short_0201 + PC362
CS SW

220u/2V_7343H1.9
B 8 G2 B

[46,47,48,49] VR_TEMP PR323 *Short_0201 8693_VCORE_VTEMP2 2 PQ305 VCORE_ISENP2_SRC

TEMP S2 AOE6930
*Short_0201 8693_VCORE_SYNC2 8693_VCORE_LG2
ISENN

ISENP

PR324 4 9 PC302 PR443

EPAD

[46,47,48,49] VR_STB
GND

SYNC LGATE

10
*2200p/50V_4 1.69K_1%_4
PC475
0.22u/6.3V_2
10
13

VCORE2_NTC2
PR438 PR433
10K_NTC_4_1% 1.74K_1%_4
PR448 PR449 1 2
309_1%_4 412_1%_4 VCORE2_NTC1
8693_VCORE_ISENP2 VCORE_ISENP2_SRC2 PR432
10K_1%_4
20180207
PR439
309_1%_4
8693_VCORE_ISENN2 VCORE_ISENN2_SRC2

PC499
*0.1u/6.3V_2

A ALL POWER CLIP Cout A

CFL H6+2 4 phase BAM69300003 ; AOE6930 ;1.05mR ???????? Default setting

CFL H4+2 4 phase BAM69360000 ; AOE6936 ;3mR ????????

PROJECT : G3AA -CFL
Quanta Computer Inc.
Size Document Number Rev
Custom
85 -- +VCC_CORE (MP86903-C) 1A
NB5 Date: Monday, April 09, 2018 Sheet 47 of 56
5 4 3 2 1
 5 4 3 2 1

+VIN_VCORE [26,29,39,40,41,42,43,44,45,46,47,49,52,54]
+5VS5 [10,29,30,31,32,33,37,42,43,44,45,50,51,52,54,56]
+VCC_CORE [7,46,47]
+VIN [26,29,39,40,41,42,43,44,45,46,47,49,52,54] +VIN_VCORE
48
PC321 PC322 PC323 PC324 PC325

10u/25V_6

10u/25V_6

10u/25V_6

2200p/50V_4

0.1u/25V_4
D D

+5V

3
4
9
D1
PU304
MP8693GDT-Z PR455
PC445 1_5%_6
1u/6.3V_4 8 12 8693_VCORE_HG3 8693_VCORE_HG3_R 1 G1 +VCC_CORE
VCC HGATE PL303
D2/S1 5 0.24uH_7x7x4
PC446 2 S1/D2 6 8693_VCORE_SW3 1 2
[46] VCORE_PWM3 PR328 *Short_0201 8693_VCORE_PWM3 3 0.1u/25V_4 7
PW M 1 8693_VCORE_BST3
BST

SN_CORE3
PR303 PR461 PR466
[46] VCORE_CS3 PR334 *Short_0201 8693_VCORE_CS3 5 11 8693_VCORE_SW3 *2.2_5%_6 *Short_0201 *Short_0201
CS SW + PC363 + PC364
8 G2 VCORE_ISENP3_SRC

*220u/2V_7343H1.0

*220u/2V_7343H1.0
[46,47,48,49] VR_TEMP PR329 *Short_0201 8693_VCORE_VTEMP3 2 PQ309
TEMP S2 AOE6930
*Short_0201 8693_VCORE_SYNC3 8693_VCORE_LG3

ISENN

ISENP
PR330 4 9 PC303 PR458

EPAD
[46,47,48,49] VR_STB

GND
SYNC LGATE

10
*2200p/50V_4 1.69K_1%_4
PC480
0.22u/6.3V_2

10
13

7
PR453 PR452

VCORE3_NTC4
10K_NTC_4_1% 1.74K_1%_4
PR451 PR463 1 2
C 309_1%_4 412_1%_4 VCORE3_NTC3 C
8693_VCORE_ISENP3 VCORE_ISENP3_SRC3 PR462
10K_1%_4
20180207
PR459
309_1%_4
8693_VCORE_ISENN3 VCORE_ISENN3_SRC3

PC477
*0.1u/6.3V_2

+VIN_VCORE

PC327 PC328 PC329 PC330 PC331

10u/25V_6

10u/25V_6

10u/25V_6

2200p/50V_4

0.1u/25V_4
+5V

3
4
9
D1
PU305
MP8693GDT-Z PR460
PC447 1_5%_6
1u/6.3V_4 8 12 8693_VCORE_HG4 8693_VCORE_HG4_R 1 G1
VCC HGATE PL304
D2/S1 5 0.24uH_7x7x4
B PC448 2 S1/D2 6 8693_VCORE_SW4 1 2 B

[46] VCORE_PWM4 PR331 *Short_0201 8693_VCORE_PWM4 3 0.1u/25V_4 7

PW M 1 8693_VCORE_BST4
BST

SN_CORE4
PR304 PR468 PR469
[46] VCORE_CS4 PR335 *Short_0201 8693_VCORE_CS4 5 11 8693_VCORE_SW4 *2.2_5%_6 *Short_0201 *Short_0201
CS SW
8 G2 VCORE_ISENP4_SRC
[46,47,48,49] VR_TEMP PR332 *Short_0201 8693_VCORE_VTEMP4 2 PQ313
TEMP S2 AOE6930
*Short_0201 8693_VCORE_SYNC4 8693_VCORE_LG4
ISENN

ISENP

PR333 4 9 PR450
EPAD

[46,47,48,49] VR_STB
GND

SYNC LGATE

10
PC304 1.69K_1%_4
*2200p/50V_4 PC478
0.22u/6.3V_2
10
13

PR457 PR454

VCORE4_NTC2
10K_NTC_4_1% 1.74K_1%_4
PR464 PR467 1 2
309_1%_4 412_1%_4 VCORE4_NTC6
8693_VCORE_ISENP4 VCORE_ISENP4_SRC4 PR465
10K_1%_4
20180207
PR456
309_1%_4
8693_VCORE_ISENN4 VCORE_ISENN4_SRC4

PC479
*0.1u/6.3V_2

A A

PROJECT : G3AA -CFL

Quanta Computer Inc.
Size Document Number Rev
Custom
85 -- +VCC_CORE (MP86903-C) 1A
NB5 Date: Monday, April 09, 2018 Sheet 48 of 56
5 4 3 2 1
 5 4 3 2 1

49
+VIN_GT +VIN
+VCCSA [6,46]
PR313 *Short_0805
+5VS5[10,29,30,31,32,33,37,42,43,44,45,50,51,52,54,56]
+3VS5[10,12,14,28,30,31,32,34,38,42,43,44,45,46,50,55]
+VCCGT [5,46]
PC381 PC382 PC383 PC384 PC385
+VIN [26,29,39,40,41,42,43,44,45,46,47,48,52,54]

10u/25V_6

10u/25V_6

10u/25V_6

2200p/50V_4

0.1u/25V_4
+VIN_VCORE [26,29,39,40,41,42,43,44,45,46,47,48,52,54]

+5V

3
4
9
D D1 D
PU308
MP8693GDT-Z PR348
PC453 1_5%_6
1u/6.3V_4 8 12 8693_GT_HG1 8693_GT_HG1_R 1 G1
VCC HGATE PL307 +VCCGT
D2/S1 5 0.24uH_7x7x4
PC454 2 S1/D2 6 8693_GT_SW1 1 2
[46] GT_PWM5 PR345 *Short_0201 8693_GT_PWM1 3 0.1u/25V_4 7
PW M 1 8693_GT_BST1
BST PR307 PR490 PR489 + PC401 + PC402
PR354 *Short_0201 8693_GT_CS1 5 11 8693_GT_SW1 *2.2_5%_6 *Short_0201 *Short_0201

220u/2V_7343H1.9

*220u/2V_7343H1.0
[46] VCCGT_CS1 CS SW
GT_ISENP1_SRC

SN_GT
8 G2
[46,47,48,49] VR_TEMP PR346 *Short_0201 8693_GT_VTEMP1 2 PQ317
TEMP S2 AOE6930
*Short_0201 8693_GT_SYNC1 8693_GT_LG1

ISENN

ISENP
PR347 4 9 PR355

EPAD
[46,47,48,49] VR_STB

GND
SYNC LGATE

10
PC307 1.69K_1%_4
*2200p/50V_4 PC456
0.22u/6.3V_2

10
13

7
Rdson=1.05mohm max
PR486 PR485
10K_NTC_4_1% 1.74K_1%_4
1 2
PR349 PR487
CFL H6+2/H4+2 (45W)

GT_NTC2
309_1%_4 412_1%_4 GT_NTC1
8693_GT_ISENP1 GT_ISENP1_SRC1 PR484
10K_1%_4
20180207 GT Volt
PR350
309_1%_4
Countinue current: 25A
C 8693_GT_ISENN1 GT_ISENN1_SRC1 C
Peak current:32A
PC455 OCP minimum:41.6A
*0.1u/6.3V_2
LL= 2.7mV/A
VBOOT=0V
Address=01h

Put the same side with MOS

+VIN_SA +VIN_VCORE

PR314 *Short_0805

+3V
PC421 PC422 PC423 PC424 PC425

1u/25V_4

2200p/50V_4

0.1u/25V_4
10u/25V_8 10u/25V_8
12 1
20180205
VCC VIN#1 6
PC457
1u/6.3V_4 VIN#2 Close to IC pin#1
11 13 SA_BST
AGND BST PC458 1u/25V_4
CFL H6+2/H4+2 (45W)
PR351 *Short_0201 86903C_VCCSA_PWM 7 PL401 +VCCSA VCCSA Volt
[46] VCCSA_PWM6 PW M 86903C_VCCSA_SW
B 2 B
PR356 *Short_0201 86903C_VCCSA_VTEMP 9 SW #1 3 1
0.68uH_7x7x3
2 Countinue current: 10A
[46,47,48,49] VR_TEMP VTEMP/FLT SW #2
PR352 *Short_0201 86903C_VCCSA_SYNC 8 Peak current:11.1A
[46,47,48,49] VR_STB SYNC 4 PR309 PC430 PC431 PC432 PC433
OCP minimum:16A
SN_SA1

PGND#1 5 *2.2_5%_6

22u/6.3V_6

22u/6.3V_6

*22u/6.3V_6

*22u/6.3V_6
*Short_0201 86903C_VCCSA_CS 10 PGND#2
[46] VCCSA_CS1 PR353
CS LL= 11.4mV/A
PU401 PC309
VBOOT=1.05V
MP86901-AGQT-Z *2200p/50V_4
Address=02h
12A(con) 25A(OCP)

A A

PROJECT : G3AA -CFL

Quanta Computer Inc.
Size Document Number Rev
Custom
86 -- +VCC_GT/+VCC_SA 1A
NB5 Date: Monday, April 09, 2018 Sheet 49 of 56
5 4 3 2 1
 5 4 3 2 1

+3V[9,10,11,13,14,16,17,18,21,22,26,28,29,34,35,36,37,38,39,46,49,54,55]
+5VS5[10,29,30,31,32,33,37,42,43,44,45,51,52,54,56]
+3VS5[10,12,14,28,30,31,32,34,38,42,43,44,45,46,55]
50
+3VSUS [39]
+5V[26,27,28,29,34,39,47,48,49,52]
+3VLANVCC [36]
+5VPCU [42,44,55]

D D

+3VS5 +3VS5 +5VS5 +3VS5

PC5002 PC5004
0.04A PC5003 PC5005
1A
5.2A 0.1u/6.3V_2 0.1u/6.3V_2
5.1A 0.1u/6.3V_2 0.1u/6.3V_2

7
+3V +3V_S2 +3VLANVCC_S2 +3VLANVCC +5V +5V_S2 +3VSUS_S2 +3VSUS

VIN1#1

VIN1#2

VIN1#1

VIN1#2
VIN2#1

VIN2#1
VIN2#2

VIN2#2
PR5002 PR5005 PR5003 PR5004
13 8 13 8
*Short_0603 14 VOUT1#1 VOUT2#1 9 *Short_0603 *Short_0603 14 VOUT1#1 VOUT2#1 9 *Short_0603
VOUT1#2 VOUT2#2 VOUT1#2 VOUT2#2
PC5010 PC5011 PC5012 PC5013 PC5006 PC5007 PC5008 PC5009
*10u/6.3V_4 0.1u/6.3V_2 11 0.1u/6.3V_2 *10u/6.3V_4 *10u/6.3V_4 0.1u/6.3V_2 11 0.1u/6.3V_2 *10u/6.3V_4
GND#1 GND#1
15 15
4 PU5002 GND#2 4 PU5001 GND#2
C
+5VPCU BIAS +5VPCU BIAS C
PC5014 AOZ1331DI PC5015 AOZ1331DI

0.1u/6.3V_2 0.1u/6.3V_2
3VEN_1 3 5 3VLAN_EN_2 MAINON 5VEN_1 3 5 3VSUS_EN_2
[30,34,38,43,44,45,56] MAINON EN1 EN2 LAN_POWER [38] EN1 EN2

SS1

SS2

SS1

SS2
PR5006 *Short_0402 PR5007 *Short_0402 PR5001 *Short_0402 PR5008 *Short_0402 SUSON [38,43]

PC5018 PC5019 PC5016 PC5017

12

10

12

10
*0.1u/6.3V_2 *0.1u/6.3V_2 *0.1u/6.3V_2 *0.1u/6.3V_2
3V_SS

3VLAN_SS

5V_SS

3VSUS_SS
PC5020 PC5021 PC5022 PC5023
1000p/25V_2

1000p/25V_2

1000p/25V_2

1000p/25V_2
B B

A A

PROJECT : Y0HB
Quanta Computer Inc.
Size Document Number Rev
Load switch IC(APL3523A)
NB5 Date: Monday, April 09, 2018 Sheet 50 of 56
1A

5 4 3 2 1
 5 4 3 2 1

+VIN_VGACORE [40,52]
+5VS5 [10,29,30,31,32,33,37,42,43,44,45,50,52,54,56]

51
PU9001
1V8_AON [19,21,22,23,55]
RT8813DGQW

VGA Core PR9002

NVVDD [22,23,52]

1_5%_6
+5VS5 8813PVCC21 2 8813UGATE1 8813UGATE1 [52]
PVCC UGATE1
PC9002

D
F=300K 2.2u/10V_4
D
PR9001 PR9004 PC9009
1_5%_6 499K_1%_4 0.22u/25V_6
8813TON_11 8813TON9 1 8813BOOT1
+VIN_VGACORE 1V8_AON TON BOOT1

PC9013 24 8813PHASE1
PHASE1 8813PHASE1 [52]
[22] NVVDD_CORE1_EN 1u/25V_4
PR9185 *Short_0201 PR9006
10K_1%_4
PD9005
RB500V-40
16 23 8813LGAT1
[22] NVVDDPG PGOOD LGATE1 8813LGAT1 [52]
1 2
[21,22,55] 1V8_MAIN_EN

1V8_AON 8813EN 3 15 8813ISEN1

EN VCC/ISEN1 8813ISEN1 [52]
PR9222
1K_1%_4 PC9211
PR9213 820p/50V_4
*12K_1%_4
for VGA sequence
17 8813UGATE2
UGATE2 8813UGATE2 [52]
8813PSI 4
[21] PSI PSI
PR9013
C *Short_0402 8813VID 5 C
[21] NVVDD_PWM_GPU VID
PR9212 PR9014 *Short_0201 PC9020
*10K_1%_4 0.22u/25V_6
18 8813BOOT2
BOOT2
8813VREF
19 8813PHASE2
PHASE2 8813PHASE2 [52]
8813VREF 8
VREF

PR9015 PC9024
20.5K_1%_4 0.1u/6.3V_2
PR9017 20 8813LGAT2
LGATE2 8813LGAT2 [52]
6.19K_1%_4
REFADJ1 8813REFADJ 6
REFADJ

PC9031 PR9018
*1500p/50V_4 4.32K_1%_4 14 8813ISEN2
TALERT/ISEN2 8813ISEN2 [52]
PC9033
*56p/50V_4
8813REFIN7 PR9023
REFIN 100_1%_4
PC9032 11 VGPU_CORE_SENSE_SRC
VSNS NVVDD
1500p/50V_4
PR9024
16.5K_1%_4 PC9035 *56p/50V_4 PR9025 0_5%_2 VGPU_CORE_SENSE [23]
PC9034
*100p/50V_4 PR9026 0_5%_2 VSS_GPU_SENSE [23]
REFADJ2 10 VSS_GPU_SENSE_SRC
B RGND B
PR9027 Rocp PR9028
309_1%_4 100_1%_4

PR9220
14K_1%_4
12 8813DLIM
SS

22 8813PWM3
PW M3 8813PWM3[52]

8813ISEN3 13 25
TSNS/ISEN3 GND

PC9042
*100p/50V_4

8813ISEN3 [52]

A A

PROJECT : WBC
Quanta Computer Inc.
Size Document Number Rev
Custom
NB5 NVVDD (RT8813D) 1A

Date: Monday, April 09, 2018 Sheet 51 of 56

5 4 3 2 1
 5 4 3 2 1

52
+5V [26,27,28,29,34,39,47,48,49,50]
+5VS5 [10,29,30,31,32,33,37,42,43,44,45,50,51,54,56]
NVVDD [22,23,51] +VIN_VGACORE PR710 *Short_0805 +VIN
+VIN_VGACORE [40,51]
+VIN [26,29,39,40,41,42,43,44,45,46,47,48,49,54]
PR711 *Short_0805

PC9010 PC9003 PC9004 PC9006 PC9011 + PC9214 + PC9007

+ PC9213

10u/25V_6

10u/25V_6

10u/25V_6

2200p/50V_4
0.1u/25V_4

*10u/25V_3528H1.4

100u/25V_D6.3H5.8

*100u/25V_D6.3H5.8
3
4
9
D PQ9001 D
AOE6936 D1

PL9001
ALL POWER CLIP Rocp Cout
8813UGATE1_1 1 G1 0.22uH_10x10x4
[51] 8813UGATE1
PR9003 1_5%_6
D2/S1 5
N17P G0 BAM69360000 ; AOE6936 ;3mR 14K/110A ????????
2 S1/D2 6 8813PHASE1 1 2
7
N17P G1 BAM69320002 ; AOE6932 ;1.8mR 10.5K/121A ???????? Default setting
PR9005
*2.2_5%_6

8 G2
[51] 8813LGAT1 SN_VGA1
S2
PC9014

10
*2200p/50V_4 Merge NVDD & NVDDS
Rdson=3m ohm
N17P-G1 (50W) /N17P-G0(40W)
EDP-C: 58A/48A
[51] 8813ISEN1
PR9011 10K_1%_4 EDP-P: 101A/92A
[51] 8813PHASE1 +VIN_VGACORE OCP minimum: 121A/110A
LL=0m V/A
C C

PC9017 PC9018 PC9019 PC9022 PC9023

3
4
9

PQ9004 10u/25V_6

10u/25V_6

10u/25V_6

2200p/50V_4
0.1u/25V_4
AOE6936 D1

PL9004
8813UGATE2_1 1 G1 0.22uH_10x10x4
[51] 8813UGATE2 NVVDD
PR9012
D2/S1 5
1_5%_6 2 S1/D2 6 8813PHASE2 1 2
7

1
PC9026 PC9027 PC9028
PR9016 + + + + PC9029
*2.2_5%_6

220u/2V_7343H1.0

220u/2V_7343H1.0
*220u/2V_7343H1.0

*220u/2V_7343H1.0
2

2
8 G2
[51] 8813LGAT2 SN_VGA2
S2
PC9030
10

*2200p/50V_4

PR9021 10K_1%_4
[51] 8813ISEN2 NVVDD
VGA Core: Vcore: 3*330uF/9m+30 *22uF/0603
B [51] 8813PHASE2 B

PC791 PC792 PC793 PC794 PC795 PC796 PC797 PC798 PC799 PC800

*22u/6.3V_6

*22u/6.3V_6

*22u/6.3V_6

*22u/6.3V_6

*22u/6.3V_6

*22u/6.3V_6

*22u/6.3V_6

*22u/6.3V_6

*22u/6.3V_6

*22u/6.3V_6
+VIN_VGACORE

PC9037 PC9038 PC9001 PC9040 PC724

10u/25V_6

10u/25V_6

10u/25V_6

2200p/50V_4
0.1u/25V_4
3
4
9

PC9041 0.22u/25V_6 9610PHASE3 PQ9005

AOE6936 D1

PU9002 PR9030
1_5%_6 PL9005
VGA_BOOT1 4 3 UGATE1_VGA UGATE1_VGA_R 1 G1 0.22uH_10x10x4
BOOT UGATE NVVDD
PR9029 *Short_0201 9610PWM3 5 2 9610PHASE3 D2/S1 5
[51] 8813PWM3 PW M PHASE 2 S1/D2 6 9610PHASE3 1 2
9610EN 1 7 LGATE1_VGA 7
+5V EN LGATE
PR9032 *Short_0402
9610VCC 8 6 PR9038 + PC778
+5VS5 VCC GND
PR9035 2.2_5%_6 9 *2.2_5%_6

220u/2V_7343H1.9
A EPAD A
PC9044 RT9610CGQW 8 G2
1u/6.3V_4 SN_VGA3
S2
PC9045
10

*2200p/50V_4
PROJECT : WBC
Quanta Computer Inc.
PR9037 10K_1%_4 Size Document Number Rev
[51] 8813ISEN3 Custom
NB5 NVVDD (RT8813D) 1A

Date: Monday, April 09, 2018 Sheet 52 of 56

5 4 3 2 1
 5 4 3 2 1

53
D D

C C

B B

A A

PROJECT : WBC
Quanta Computer Inc.
Size Document Number Rev
Custom
NB5 NVVDDS (RT8816A) 1A

Date: Monday, April 09, 2018 Sheet 53 of 56

5 4 3 2 1
 5 4 3 2 1

54
+5VS5[10,29,30,31,32,33,37,42,43,44,45,50,51,52,54,56]
+3V[9,10,11,13,14,16,17,18,21,22,26,28,29,34,35,36,37,38,39,46,49,50,55]
FBVDDQ_MEM [20,22,23,24,25,54]
+VIN [26,29,39,40,41,42,43,44,45,46,47,48,49,52,54]

+VIN_FBVDDQ_MEM +VIN
PU1501
3 2 PR1539 *Short_0805
VTT VLDOIN
1
VTTSNS PC1510 PC1511 PC1512 PC1513 PC1514 PC1515
N17P-G0 MAX Q/N17P-G1 MAX Q (25W/30W/35W)
D D
N17P-G0/N17P-G1 (40W/50W)

10u/25V_6

10u/25V_6

10u/25V_6

2200p/50V_4
0.1u/25V_4

0.1u/25V_4
4
VTTGND 14 8819UGATE1 8819UGATE1_1
UGATE PR1510 1_5%_6
FBVDDQ_MEM=1.5V

2
7
GND#1 15 8819VBST 8819VBST_S
PC1549
PQ1501
EDP-C: 11A

D1
D1
D1
21 BOOT
EPAD
PR1537 1_5%_6
0.1u/25V_4 FDMS3669S
EDP-P: 20A
8819VTTREF 5 13 8819SW
VTTREF PHASE 1 G1
PL1501
0.68uH_7x7x3 FBVDDQ_MEM OCP minimum: 24A
PC1548
0.1u/6.3V_2 11 8819DRVL S1/D2 9 8819SW 1 2 LL=0m V/A
LGATE

10 8 G2 PR1501
PC1532 *0.047u/16V_4 8819S3 17 PGND *2.2_5%_6 + PC9110 + PC1542 PC1543 PC1545 PC1546 PC1547
PR1531 *Short_0201 S3 PR1511

*22u/6.3V_6

*22u/6.3V_6

*22u/6.3V_6

*22u/6.3V_6
*220u/2V_7343H1.0
220u/2V_7343H1.0
9 8819VDDQSNS *Short_0402
VDDQSNS

S2
S2
S2
[22] FBVDD_EN 8819S5 16 SNVRAM1
PR1514 *Short_0201 S5 +1.8VREF

7
6
5
8819PG 20 PC1501 20180202
[22] PS_FBVDD_PGOOD POK
PR1513 *Short_0201 6 *2200p/50V_4
PR1538 VREF

+3V 10K_1%_4 8819TRIP 18

PR1515 120K_1%_4 OC PC1533 PR1519 PR1541 100_1%_4
0.1u/6.3V_2 10K_1%_4
8819MODE 19
PR1516 47K_1%_4 MODE PR1540 *Short_0201
8 FBVDDQ_SENSE [23]
8819REFIN
REFIN

MEM_VDD_CTRL_3C
12
+5VS5 VCC FBVDDQ_MEM R1 R2
C
R1 R2 C
APW8819AQAI-TRG PC1536 PR1522 PR1542 100_1%_4 FBVDDQ_MEM
PC1530 62K_1%_4 PR1521 1.55V-1.35V 49.9K 75K

0.01u/50V_4
59K_1%_4
1u/6.3V_4

PR1523 100K_1%_4
1.5V_1.35V 62K 59K Default setting
+5VS5

Fix 1.35V 30K Open

3
2 MEM_VDD_CTRL_3B
PR1526

3
PQ1510 PR1527 2MEM_VDD_CTRL_3A
30K_1%_4 Fix 1.5V 50K Open

1
2N7002K 1M_5%_4 MEM_VDD_CTRL [21]
MEM_VDD_CTRL FBVDDQ_MEM

1
PR1529
PQ1511 *100K_1%_4
METR3904-G 1 1.5V_1.55V

0 1.35V

B B
FBVDDQ_MEM

+5VS5

PR1517
22_5%_8
PR1518
100K_1%_4
8819EN_3B

PQ1512 3 2 8819EN_3A
2N7002K

PR1520
1

1M_5%_4

3
2 8819S5_1 8819S5
PR1536 *Short_0402

PQ1513 PR1535

1
DMG1012T-7 *100K_1%_4

A A

PROJECT : WBC
Quanta Computer Inc.
+VIN [26,29,39,40,41,42,43,44,45,46,47,48,49,52,54]
+5VS5[10,29,30,31,32,33,37,42,43,44,45,50,51,52,54,56]
Size Document Number Rev
FBVDDQ_MEM [20,22,23,24,25,54] Custom
NB5 FBVDDQ_MEM(RT8816A) 1A

Date: Monday, April 09, 2018 Sheet 54 of 56

5 4 3 2 1
 1 2 3 4 5 6 7 8

+3VS5 [10,12,14,28,30,31,32,34,38,42,43,44,45,46,50]
+5VS5 [10,29,30,31,32,33,37,42,43,44,45,50,51,52,54,56]
1V8_MAIN [19,20,22,23,27]
1V8_AON [19,21,22,23,51]
PEX_VDD [19,21]
55
+1.8V_DEEP_SUS +1.8V_DEEP_SUS

A A

1.2A PC1201
0.1u/6.3V_2
PC1202
0.1u/6.3V_2 1.2A

7
1V8_MAIN PR1201 PR1202 1V8_AON

VIN1#1

VIN1#2

VIN2#1
VIN2#2
*Short_0603 *Short_0603
1V8_MAIN_S2 13 8 1V8_AON_S2
14 VOUT1#1 VOUT2#1 9
VOUT1#2 VOUT2#2
PC1203 PC1204 PC1205 PC1206
*10u/6.3V_4 0.1u/6.3V_2 11 0.1u/6.3V_2 *10u/6.3V_4
GND#1
15
4 GND#2
+5VPCU BIAS
PC1207 PU1201
AOZ1331DI

0.1u/6.3V_2
1V8MAIN_EN 3 5 1V8AON_EN
[21,22,51] 1V8_MAIN_EN EN1 EN2 1V8_AON_EN [22]

SS1

SS2
PR1203 *Short_0402 PR1204 *Short_0402

PC1208 PC1209

12

10
*0.1u/6.3V_2 *0.1u/6.3V_2

1V8MAIN_SS

1V8AON_SS
N17P G0/G1
PC1210 PC1211
+3VS5 *1000p/25V_2 *1000p/25V_2
B B

1V8_AON
1V8_AON
PEX_VDD
PC1102
1V8_MAIN 4.7u/6.3V_4

PR1112
+1.0V_GFX_S2
PR1111 +1.0V_GFX Volt +/- 5%
NVVDD 10K_1%_4 PL1101 *Short_0603

4
PU1101 2.2uH_2.5x2.0x1.2 EDP=3.31A

VIN
PEX_PG_3 5 3 PEX_LX 1 2
[22] PEX_VDD_PG PG LX EDP_peak = TBD
NVVDDS PR1117 *Short_0402

PR1114 +1.0V_GFX +/- 5%

PEX_EN_1 1 2
[22] PEXVDD_EN
PR1113 *Short_0402 EN GND
*Short_0201
+ TDC:0.4A
PEX_VDD PEXVDD_EN=1.8V PC1111 PC1112 PC1113 PC1114
EDP:1A

PEX_FB_1
FB
PC1121

22u/6.3V_6

*10u/6.3V_4

*0.1u/6.3V_2

*220u/2V_7343H1.0
*0.1u/6.3V_2 RT8097ALGE OCP:3.2A

6
FBVDDQ PEX_FB R1
PR1115 6.65K_1%_4

PR1116
R2 10K_1%_4

C
VO=(0.6(R1+R2)/R2) C

R2

+3VS5
For HW Throttling: Stuff condition: CPU45W & GPU>60W R1

PR1120
N17P N17S 6.65K CS26652FB06 1V
*10K_1%_4
+3V N16S GTR 7.5K CS27502FB11 1.05V
DC_PROCHOT_OFF DGPU_PROCHOT_EC# [21,38]
[38] DC_PROCHOT_OFF
PR1122 PR1124 *10K_1%_4 +1.05V
*10K_4
ACIN
[38,41] ACIN
H_PROCHOT# [2,38,46]
5

PQ1102A PQ1102B
*2N7002KDW *2N7002KDW
4 3 1 6 5 2

PQ1101A PQ1101B
4

*2N7002KDW
ACIN *2N7002KDW

D D

DC_PROCHOT_OFF HWPRHOT1

PROJECT : X1Q
Quanta Computer Inc.
Size Document Number Rev
Custom 1.05V_VGA/3V_VGA
NB5 Date:
Monday, April 09, 2018 Sheet 55 of 56
1A

1 2 3 4 5 6 7 8
 5 4 3 2 1

56
+12V_FAN [39]
Add inrush limit switch +5VS5 [10,29,30,31,32,33,37,42,43,44,45,50,51,52,54]
PQ1301 PQ1302
+5VS5 *QM3002M3 *QM3002M3
PR1325
3
PL1301
3 +12V +/- 5%

D
*1.5uH_7x7x3

S
Boost_VIN_1 5 2 Boost_VIN_2 1 2 3428_LX 2 5
1 1 Countinue current:1.8A
Peak current:2.5A

PR1324
*Short_0201

*Short_0201

G
G
PR1326
PC1306 PC1307 *0.005_1%_12

4
D PR1323 +12V_FAN D
*22u/6.3V_6

*22u/6.3V_6
*0_5%_4

9428_CLDR
3428_CLDR

PC1323 PL1305
*0.1u/25V_4 *Short_0805
9428_BST_1
+12V_S

3428_SENSE_1 3428_SENSE PR1327

PR1334 *0_5%_2 *0_5%_6

1 3428_BST
PR1322 *Short_0201
3428_VIN
+ PC1314

3428_SDR
PC1311 PC1312 PC1321

3428_FB_S
11

19
20
21

*33u/16V_3528H1.1
6

7
8
PC1329

*22u/25V_8

*22u/25V_8

*22u/25V_8
*0.1u/25V_4

SW#1
SW#2
SW#3
SW#4
SW#5
SENSE

BST
IN
2
SDR

3
PU1301 OUT 3428_VDD
*MP9428AGL-C675-Z
PR1332 *0_5%_4 3428_EN 4 12 PC1325
[30,34,38,43,44,45,50] MAINON EN VDD *27p/50V_4

PGND#1

PGND#2

PGND#3

PGND#4

PGND#5
PC1327
9428_FB_1

COMP

AGND
PC1328 PR1328

CLDR
*0.1u/6.3V_2 *300K_1%_4

*2.2u/10V_4
SS

FB
C PR1330 C
*0_5%_4

13

16

10

17

18

22

15

14
Boost_COMP

3428_SS
3428_FB
3428_CLDR
VO=(1.225(R1+R2)/R2)
PR1329
PC1326 PC1324 *34K_1%_4
*6800p/50V_4 *0.01u/50V_4
PR1333 OCP latch appliction +12V_S
*0_5%_4 Boost_COMP_1 +12V_S
MAINON

1
PR1331
*27K_5%_4 PD1304 PR1336
*PDZ10B *100K_1%_4

2
12V_FAN_4 PR1335
*10K_1%_4 12V_VOUT_MONITOR
PR1338 EC set interrup

3
12V_FAN_2 2
*100K_1%_4 Low --> 12V shutdown

3
PQ1306 PR1339
12V_FAN_3 2 PQ1305 PC1330 *2N7002K *36K_1%_4

1
*0.1u/6.3V_2

*MMBT3904T-7-F-01
1
PR1337
*1M_1%_4
B B

A A

PROJECT : X1Q
Quanta Computer Inc.
Size Document Number Rev
Custom STORAGE MODE
NB5 Date:
Monday, April 09, 2018 Sheet 56 of 56
1A

5 4 3 2 1