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Wayspire

Wayspire AIM|COMMIT|REACH

AIM|COMMIT|REACH

VLSI
An
Introduction
Welcome to the world of Very Large Scale
Integration (VLSI), where cutting-edge
technology converges with creative intellect.
At Wayspire, we present an unparalleled
opportunity to dive into the realm of VLSI
through our immersive Internship Training
Program. Our program is designed to equip
aspiring engineers with hands-on experience
in designing and fabricating complex
integrated circuits. From mastering the
fundamentals of semiconductor physics to
exploring advanced design methodologies,
you'll be guided by industry experts who are
pioneers in the VLSI domain.
WHY WAYSPIRE?
Essential Skills :
Must-know skills to
make your professional
routine easier.

Certications :
From the most reputed
Institutions in India.

What Next ?
There is a high demand
for mastering your
everyday skills in IT,
analytics, designing and
more.

Thinking Of Masters ?
Thousands of expert
approved courses just
for you.
COMPREHENSIVE
FEATURES
24 HOURS 30-35 HOURS 2

On Demand Interactive Projects


Videos Sessions

2 24 X 7 5

Support
Assignments Ceritications
Forum
PHASES OF
MASTERY:
MODULE-1

Introduction to VLSI, VLSI Flow


PD Flow (STA & PNR)
Final STA Netlist Binding (.v File, Gate Level Netlist,
Constraints)
DRC Clean
Introduction to Clock Net Shielding
Physical Design Inputs (.v File, Gate Level Netlist,
.lib File)
MODULE-2

Introduction to Floor Plan


Utilization Factor and Aspect Ratio, Preplaced Cells
Macro Placement & Pin Placement and Analysis on
Logical Cell Placement Blockage
Keep Out Margin & Boundary Cells and Uses
Congestion Macros and Cells
Sanity Checks and Uses
MODULE-3

Introduction to Power Plan


Power Management & Inputs of Power Plan
Power Via Cuts and Working
Detail Explanation on Power Rings, Strips, Rails &
Trunks
Introduction of Placements and What are Standard
Cells
Pre-placement Optimization, Placement (Timing &
Congestion)
MODULE-4

Post Placement Sanity Checks


Introduction to CTS (Clock Tree Synthesis)
Buffered and Unbuffered Clock Tree, HFNS,
Difference between Clock Buffer and Normal Buffer
H Tree Algorithm and Skew Check
Optimization Checklist, Leakage Current Reduction
Technique, Optimized Clock Tree Power and
Latency
Crosstalk Delta Delay - Aggressor Victim Switching
in Opposite Direction, Setup Timing Analysis Using
Real Clocks, Crosstalk Delta Delay - Aggressor
Victim Switching In Same Direction
Delta Delay - Aggressor Victim Switching In Same
Direction
OUR KEY FEATURES
Portfolio-worthy courses involving mastered
concepts

100% Online - Learn in groups of likeminds.

Doubt- clearing and mentor sessions.

Complimentary smart learning material provided

Regular Counselling Sessions.

Training Internship completion Certificate


provided

seperate certificate provided for project


completion
Our Alumni
Work At
OUR MISSION &
VISION
WAYSPIRE is committed to educate and
nurture all learners so that they can grow
towards a secure future to achieve their dreams
in a global economy.

Mission:
WAYSPIRE’s mission is to promote student
achievement and preparation for global
competitiveness by inculcating educational
excellence and ensuring equal access to
resources.

Vision:
To be the most-preferred education technology
solutions provider in the business.
CONTACT US :
225, phase - IV, Sector-18, Udyog Vihar
Gurugram, HR, IND - 122001

contact@wayspire.in

www.wayspire.in

+91 8130927999

FOLLOW US :
@wayspire.in Wayspire

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