RESUME

Name: Amith Kumar Dani.

Email ID: amith.k.dani80@gmail.com
Ph. No.: 9845738292.
Addr: 5-5-4321/1, Hydarali Circle, Dani Building, Koppal 583231.

Carrier Objective

To work with a progressive organization as PCB Layout Engineer in

IT/Semiconductor industry which provides me with ample opportunities to implement
and enhance my abilities.

Experience Summery
 I have total 5.5+ years of experience in PCB Designing and product life
Development of PCB design engineering which would builds with cross functional
teams
 I served in L and T Technology Services with multiple customers for various
portfolios from industrial design aerospace design and consumer electronics, for 4
years as PCB Layout Engineer in the Embedded hardware platform.
 Currently working in Micron Technology from 1.5+ years as Senior PCB Layout
Technician in the packaging design platform.
 Involved in complete PCB Design cycle from Library Creation(vault management),
Schematic Entry, PCB layout design and Gerber generation, Panel Design and
verification, DFx issue solving.
 PCB layout designed for Analog, Digital, Mixed signals, RF Designing(module as
well as RF antenna) and High-speed design with controlled impedance.
 Have the competence of precision level of design from the 4mils width and
clearance and stacked and staggered micro vias, blind and burried vias, 0.5mm
pitch, pad in via technology.
 Worked on the QA Test boards Strip designs. Undergoing the substrate layout
training and Daisy Chain routing.
 Advanced knowledge of constraints and use of the constraint manager. Critical
component placement with respect to mechanical DXF and verification of board-
to-board connectors.
  Checking the specifications of drawings and Gerber data provided by customer in
order to produce PCB as per the production capabilities, also have worked with
multiple fabricators and assembly house all over the globe and establishing
fabrication notes.
 Experienced in Customer Interaction and quality control, Project planning and co-
ordination.
 Understanding of the DFX requirement and document preparation – standards
WRT customer, implementation.
 Complete knowledge of constraints and use of the constraint manager.
 Better understanding of the clearance and creepage rules application.
 Always been a good team player to help with other projects when necessary.
 Understanding of the design from the EE perspective, and deep-down analysis for
PCB implementation.

Design Tool Proficiency

Tools I’m Experienced in Altium Designer(Altium 360, Nexus). Allegro package design,
Cam350.
In Detailed about versions
Schematic Tool: OrCAD Capture, Altium, Altium 365 Nexus.
PCB Tool : Cadence – Allegro17.2 and 16.6v and Altium 17.0v.
Allegro package designer 17.2, APD+ 17.4v, Altium 365 Nexus.
Gerber analysis tool: Cam350 v14.5, Valor.
All of the above tools have been used on the windows OS platform, I have good
experience in Microsoft Office tools.

Educational Qualification

Course Institution Board/University Year of Percentage

completion %
SSLC New Oxford Karnataka 2014 63.5
English Secondary
Medium School Examination
Board
Diploma Sandur Board of 2017 82.86
E&C Polytechnic, Technical
Education
Work Experience

Designation Organization Responsibility

Associate Engineer
PCB Layout Technician
L&T Technology Services I served in L and T
Aug 2017 to Oct 2021 Technology Services, for 4+
years as PCB Layout Engr in
the Embedded hardware
platform
Micron Technology Working as QA Test board
Oct 2021 to till date Strip layout designer in
packaging design platform.

Projects Handled
Product: PCB, LTCC, 3DRDL.
Tool: Orcad Allegro 16.6v and 17.2v.
Layers:28, 54, 62.
Responsibility: Routing planning by using micro vias, merging resource output files,
understanding the design concept and providing excepted output to customer, checking
and clearing the DRCs with customer given checklist.

Product: Pre-Alpha ACB

Tool: Altium v21.
Layers: 6.
Responsibility: placement, Routing, and Pre-Gerber Generation, Antenna Connector and
Micro SD connector Routing.

Product: PCB, DSN V3, Mixed design.

Tool: Altium Designer 20.0.9, 8 - Layers.
Responsibility: Understanding the design concept, understanding the mechanical
requirements, Thermal requirements, power requirements creation of the library to
providing excepted output to customer as per the DFx requirements of customer, have
used BGA with 0.5mm pitch.
(Worked around 15 Designs in the same template as above project with 2-to-8-layer
boards.)
Tool: Altium Nexus v3.5 , 4 - Layers.
Responsibility: tool enables team members to work together, creating the central
footprint and schematic library as per the specific customer to have access to the all
projects. Streamlining board design with draftsman.

Product: QA Test Boards (TC, DT, Monotonic Bend boards).

Tool: APD+ 17.2
Responsibility: Understanding the input requirement based on the package size and
creating component for test boards. Routing is done by using blind and burried vias
based on the type of board used for testing component as per standards.

Product: Strip Design (BOC, COB, FCIP)

Tool: APD+ 17.2
Responsibility: based on the package outline drawing creating the strip layout for
packaging. Worked on different type of strips BOC, COB and FCIP on drafting the layout as
per the tooling capability.

Tool: APD+ 17.4 SKILL PROGRAMMING.

Responsibility: Understanding the project design cycle requirements and automating the
process using skill programming. Creating the BGA footprint by using only minimal
requirements using skill as per the customer/organization standards in which design cycle
has been reduced by 2+Hrs. Component placement is done based on the number of units
used in the strip design and annotation which has been reduced design cycle by 2+Hrs.
Depopulation of BGA pins w.r.t. data sheet using DXF is automated using skill in which
manual/man made errors were suppressed.

Tool: Altium Nexus v4

Layers:6 to 8
Responsibility: Understanding the product requirements and meeting the customer
satisfaction. Library creations, Placement, Routing, till Gerber generation. Also have
knowledge on the designing the panel as per MFR standard template or proposing the
new panel design. Tremendously continuous support since from past 2 years from my
work experience till now and had good CSF.
Other Significant Mentions (Work - placement, Routing, and Gerber Generation):
 Assisted in the DX designer tool for project 4-layer board from library stage itself.
 Converted project – SFL Ver1.0 from Cadence to Altium (1:1 match).
 Valor requirements implementation – for project cadence for a board in market.
 Assisting of a 64-layer 3D- RDL design in cadence for chip verification.
 Ability to write a skill program in Cadence Allegro Layout, for creating footprint
based on the customer standards and checking layout aspects w.r.t. design
standards and have an option like File, Edit; similarly on environmental window.

PERSONAL INFORMATION
Name : Amith Kumar Dani.
Gender : Male .
Language known: English, Kannada, Hindi, Telugu, Tamil.
I, AmithKuamr Dani hereby confirm that the above given data is true as per my
knowledge.

Date:
Place: Hyderabad.
(Amith Kumar Dani)