Signa HD, HDX & HDXT 1.5T Block Diagrams OP23

GE Healthcare
Signa HD, HDx & HDxt 1.5T Block Diagrams &

Supplemental Schematics
(Release 12.x, 14.x, 15.x, 16.x & HD23.x)
Technical Publication
5133310
Rev 15
DAMAGE IN TRANSPORTATION
All packages should be closely examined at time of delivery. If damage is apparent,
have notation “damage in shipment” written on all copies of the freight or express
bill before delivery is accepted or “signed for” by a General Electric representative
or a hospital receiving agent. Whether noted or concealed, damage MUST be
reported to the carrier immediately upon discovery, or in any event, within 14 days
after receipt, and the contents and containers held for inspection by the carrier. A
transportation company will not pay a claim for damage if an inspection is not
requested within this 14 day period.
File a report with
D Call 1–800–548–3366. Select “Install Support Services for FOA and MIS”.
D Contact your local service coordinator for more information on this process.
© 2004 – 2011, General Electric Company

GE Medical Systems, a General Electric Company, going to market as GE Healthcare
3200 N. Grandview Boulevard
Waukesha, Wisconsin 53188
USA
www.gehealthcare.com
Signa HD, HDx & HDxt 1.5T (12.x, 14.x, 15., 16.x & HD23.x)
GE Healthcare Block Diagrams & Supplemental Schematics
REV 15 DIRECTION 5133310
LANGUAGE POLICY
a
b
c
d
e
f
g

h
Signa HD, HDx & HDxt 1.5T (12.x, 14.x, 15.x, 16.x & HD23.x)
REVISION HISTORY
REV DATE PRIMARY REASON FOR CHANGE
1. . . Sep 29, 2004 Initial Release
2 . . . Apr 14, 2005 Overvew Tab – Sec 3: Added new acronyms and descriptions. System Tab – Added XW8200 host computer, removed CAN
Link for ACGD, added HFD–S CAN Link, and other minor corrections. Operator Workspace Tab – Added XW8200 host
computer and other minor corrections. Patient Handling Tab – Made minor corrections. Gradient Tab – Removed ACGD
cabinet pages and inserted HFD–S Cabinet page. MGD/RRF/RF Tab – Corrected minor errors and added informational
callouts. Added MRC II Tool & Cable and MRC II Tool – 8 Channel Connector pages.
3 . . . Oct 15, 2005 System Tab – Added J116 and J119 to TAC Cabinet and relocated Terminator. Patient Handling Tab – Added test points and
LED’s to Magnet Enclosure and PHPS. Added MNS connection information to SSM. MGD/RRF/RF Tab – Added LED info to
Exciter and Receiver boards. Corrected RRF Receive Chain connection labels. Added MNS connection info to Driver Module
and SSM. Added MC Preamp Bias Filter pinouts. Added LED and Pinout info for 16 Ca‘hannel Switch. Corrected MNS
connection info on ASC Chassis. Revised and added interconnects for forward production and upgrade MNS options.
4 . . . Mar 31, 2006 Major update to manual with the addition of HDx (Release 14.x) product. Changed title page and banners on all pages.
Overvew Tab – Sec 3: Added new acronyms and descriptions. System Tab – Added HP9300 computer info, 32 Channel
option info, and the new RFS cabinet power distribution using two power strips. Revised alll sheet references. OW Tab –
Added HP9300 computer info. MGD/RRF/RF Tab – Added HDx (14.x) info as needed which includes VRE modules: ICN’s,
16/24 Port Ethernet Switch, Infiniband board and module. Added HDx A, B, and C port connection information for the HDx
LPCA. Added MCR III Tool
5 . . . Jun 30, 2006 Overview Tab – Added definitions to Section 3. Added TOC’s to System, Operator Workspace and Patient Handling Sections.
System Tab – Added ASC Module to System/RFS cabinet depictions. Patient Handling Tab – Updated J20 Pin Signal table.
Added SSM block diagram. MGD/RRF/RF Tab – Added 32 Channel information and other minor corrections and updates.
6 . . . Oct 20, 2006 Added Environmental Sensor to System/RFS cabinet in System. Operator Workspace, and MGD/RRF/RF Sections
(MRIhc19337). MGD/RRF/RF Tab –Added Port 2 to Port 2 connection for 4 ICN configuration. Added 4 ICN configuration
without Infiniband switch. Updated Multi–Coil Adapter by adding MC Bias 17–24 for 14.x systems (MRIhc18216). Updated
several pages with additional MC signal information (MRIhc18217).
7 . . . Dec 20, 2006 SYSTEM TAB – Added 32 Channel configuration without Infiniband Switch. GRADIENT Tab – Added Pang block
configuration info (MRIhc20731). OW TAB – Added Audio IN/OUT signals for PC Host for 14.x system. MGD/RRF/RF Tab –
Revised ASC Chassis to reflect functionality using new Detector Board, 5251054.
8 . . . . Jun 6, 2007 SYSTEM Tab – Added note for designating components required for 16 channel systems. MGD/RRF/RF Tab –Added notes to
designate parts not included with newer 8 Channel systems and for parts that are required for 16 Channel systems.
9 . . . Oct 26, 2007 SYSTEM Tab – Added CAM Chassis designation to MGD Chassis where applicable. Added CAN LINK block diagram for RFS
cabinet with CAM Chassis. MGD/RF/RRF Tab – Added board slot locations for CAM Chassis.
10 Sep 11, 2008 Changed title of manual and all page headers to Signa HD, HDx & HDxt 1.5T (12.x, 14.x & 15.x) Block Diagrams &
Supplemental Schematics. HDi and Signa Vibrant are information is also included with this name change. Updates for HDxT
(15.x) in all sections. Added information on Sun ICN’s. Added depopulated 16–channel switch for 8–channel installations.
11 Dec 17, 2008 SYSTEM Tab – Added new environmental sensor diagram (ECO 2055310). PATIENT HANDLING Tab – Revised E–Stop
circuit voltage from 24V to 12V in Teal PDU (PQR 13207104).
12 Jun 30, 2010 SYSTEM Tab – Added new Z400 computer page (ECO2056587) and added 5337894–3 and –4 ICN’s (ECO 2101939).
MGD/RRF/RF Tab – Added new ICN’s (ECO 2101939).
13 Jan 20, 2011 Update entire manual headers and title page to include 16.x software version (DOC0853690). Added XW8400 Host computer
to SYSTEM & OW tabs. Removed terminator from all SCSI towers. Removed J11, SCSI tower power cord, from power strip
for Z400 host computers (MRIhc54665).
14 Aug 4, 2011 Changes made to reflect HD16.0v02 update, ICN end–of–life, and IRF2b & RRF–DIF3 hardware upgrade configurations.
15 Nov 28, 2011 MGD/RRF/RF Tab: Added sheets 2C, 6B, & 7C. Existing sheet 7C became 7D. Updated sheets 3D, 7A, 13, 1‘4A & 14C.
Changes made to reflect HD23 upgrade configurations (SPR HCSDM00101291).
LIST OF EFFECTIVE PAGES

PAGE REV PAGE REV PAGE REV PAGE REV PAGE REV
Title Page . . . . . . . . . 15 2–1 . . . . . . . . . . . . . . . 15 i . . . . . . . . . . . . . . . . . . 15 PDU 2–1 to 2–12 . . . . . . . . 15
GE Logo Page . . . . . . – 3–1 to 3–6 . . . . . . . . . 15 1–1 to 1–10 . . . . . . . . 15 Tab MR406 . . . . . . . . . – COOLING SYSTEM
Language Policy . . . . 15 SYSTEM PATIENT HANDLING i . . . . . . . . . . . . . . . . . . 15 Tab 2308173 . . . . . . . . –
A . . . . . . . . . . . . . . . . . 15 Tab MR364 . . . . . . . . . – Tab MR405 . . . . . . . . . – MGD/RRF/RF i . . . . . . . . . . . . . . . . . . 15
i . . . . . . . . . . . . . . . . . . 15 i . . . . . . . . . . . . . . . . . . 15 i . . . . . . . . . . . . . . . . . . 15 Tab MR451 . . . . . . . . . – 1–1 to 1–2 . . . . . . . . . 15
OVERVIEW 1–1 to 1–20 . . . . . . . . 15 1–1 to 1–8 . . . . . . . . . 15 i to ii . . . . . . . . . . . . . . 15
Tab MR367 . . . . . . . . . – OPERATOR GRADIENT 1–1 to 1–50 . . . . . . . . 15
i . . . . . . . . . . . . . . . . . . 15 WORKSPACE Tab MR418 . . . . . . . . . –
1–1 . . . . . . . . . . . . . . . 15 Tab 2158195 . . . . . . . . – 1–1 to 1–3 . . . . . . . . . 15
This revision number/letter corresponds to the indicated document’s revision control system.
A
CONTENTS
OVERVIEW
Purpose
Standard Conventions
Abbreviations
SYSTEM
System Block Diagrams
OPERATOR WORKSPACE
Operator Workspace Block Diagrams
PATIENT HANDLING
Patient Handling Block Diagrams
GRADIENT
Gradient Block Diagrams (HFD & ACGD)
PDU
PDU Block Diagrams
Note:
Phoenix PDU found in Vendor Manuals only. (SEE Service Methods CDROM)
MGD/RRF/RF (1.5T)
MGD/RRF/RF Block Diagrams (1.5T)
RF Supplemental Schematics (1.5T)
COOLING SYSTEM
Water Chillers Block Diagrams
Note:
For all Chillers and Cooling System variations (SEE Vendor Manuals on MR Service Methods CDROM)
i
Signa HD, HDx & HDxt 1.5T (12.x, 14.x, 15.x, 16.x, & HD23.x)
OVERVIEW
TABLE OF CONTENTS
SECTION PAGE
1 – PURPOSE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–1
2 – STANDARD CONVENTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–1
3 – ABBREVIATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–1
i OVERVIEW
SECTION 1 – PURPOSE
The purpose of this document is to provide an overview of the hardware which makes up the MR Signa System, and a
quick means to troubleshoot major signals within the system.
It is recommended that you page through this manual to become familiar with its content and organization, beginning
with System Tab, OVERALL SYSTEM. This section shows how the major subsystems are grouped by cabinet, and
the main communication lines between them.
The remaining block diagrams are organized into sections which correspond to major subsystems. Some diagrams
show hardware from another subsystem in order to complete an entire signal flow route. For such exceptions, the
board/module title of the circuitry shown will generally help identify the applicable subsystem. See Illustration 1–1 for
tab organization of this manual.
COOLING SYSTEM
PDU MGD/RRF/RF
PATIENT HANDLING GRADIENT
SYSTEM OPERATOR WORKSPACE
OVERVIEW
TAB ORGANIZATION FOR THIS DIRECTION

ILLUSTRATION 1
These block diagrams, along with provided diagnostics, are intended to be the primary tools for troubleshooting the
MR System from a system or subsystem level on down to the specific module or board level. Since some of the RF
subsystem block diagrams are presently insufficient for troubleshooting to the FRU (Field Replaceable Unit) level,
schematics have been provided to supplement those block diagrams. When using the diagnostics, the block
diagrams can provide a better understanding of what circuitry the diagnostics are testing, and how to further isolate a
problem if required.
1–1 OVERVIEW
SECTION 2 – STANDARD CONVENTIONS
The following standard conventions are used within the block diagrams:
D The type of line used to enclose a major box on a block diagram indicates the following:
CABINET
BOLD, DASHED MODULE or INTERFACE

Line
CIRCUIT BOARD
DOUBLE Line
PIGGYBACK BOARD
(Circuit Board mounted on
another Circuit Board)
BOLD, SOLID
Line
DASHED Line
D The component designator for cabinets, modules, circuit boards, etc. is enclosed in “( )” after or below their
name on the block diagram.
D Logic levels: A “0” indicates a logic “low” level (typ. <0.8VDC), a “1” indicates a logic “high” level (typ. >
2.0VDC).
D An “*” is used to identify an “active low” signal (e.g. “INT*” signal when at a logic “0” indicates that an
interrupt is present; a logic “1” level indicates that no interrupt is present).
9
D A “#/” indicates the number of wires in a cable (e.g. indactes 9 wires).
D Signal flow is generally from left to right on a block diagram. Arrows are used to identify exceptions to this
rule and to aid in identifying input/output signal lines on the diagram.
D The “x” symbol (e.g. –––x) shown on boxes in a block diagram are used to indicate that the function within
the box is enabled by the “active” signal on this input line.
+24V SETIND
K42
TEMPEXTREME
For this example, when signal TEMPEXTREME goes active (“1”), relay K42 will close (become enabled)
and the signal SETIND now becomes active to set a temperature indicator.
2–1 OVERVIEW
SECTION 3 – ABBREVIATIONS
Note
This list has been compiled from a wide variety of sources. Not all of these abbreviations will apply to
your system. For an electronic copy of over 1000 acronyms, see Direction 2124201–2.
A BD = Board
AC = Alternating Current BDS = Buffered Data Strobe
ACGD = Advanced Concept Gradient Driver BLK = Black
ACK = Acknowledge BNC = BNC Connector
ACQ = Acquisition BRM = Body Resonance Module
A/D = Analog–to–Digital BRT = Brightness
ADC = Analog to Digital Converter BUF = Buffer
ADD or ADDR = Address B/W = BandWidth
ADJ = Adjust
ADV = Advance
AGC = Automatic Gain Control C
AGP = Applications Gateway Processor (Board) C = centigrade, Celsius
AI = Applications Interface, Artificial Intelligence CAB = Cabinet
ALGN = Align CAL = Calibration
ALU = Arithmetic Logic Unit CALC = Calculate
AM = Amplitude Modulation CAN = Controller Area Network
AMP = ampere, amplifier CATTEN = Course Attenuation
A/N = Alpha–numeric CB = Circuit Breaker
ANSI = American National Standards Institute CCC = CAN Core Controller card
ANT = Antenna CCW = Counter Clockwise
AP = Array Processor CD–ROM = Compact Disk Read–Only Memory
APM = Analog Power Monitor CE = Chip Enable
APS = Auto Pre–Scan or Acquisition Processing CF = Center Frequency
System (Board) CFA = Center Frequency Adjust
APSGT = Auto Pre–Scan Gain Control CHAN or CHNL = Channel
ARCH = Archive/Remove Process CHK = Check
ASC = Automated Support Center or CKT = Circuit
Amplifier Support Controller CLR = Clear
ASCII = American Standard Code for Information
CMD = Command
Interchange
CMMR = Common Mode Rejection Ratio
ASM or ASSY = Assembly
CMOS = Complimentary Symmetry Metal Oxide
ASM = Analog Service Module
Semiconductor
ATTEN = Attenuator
CMP = Compare or Compressor
AUTO = Automatic
CNT = Contrast
AUX = Auxiliary
COAX = Coaxial
B COF = Cut Off Frequency
B = magnetic field CONFIG = Configuration
BATT = Battery CONT = Continuous
BB = Buffered Data or Broadband CONV = Converter
BC = Body Coil CPD = Communication Pin Driver
3–1 OVERVIEW
CPU = Central Processing Unit EFB = Envelop Feedback

CRT = Cathode–Ray Tube EPI = Echo Planer Imaging
CTL = Clock Time Control e.g. = for example
CTRL = Control EM or EMERG = Emergency
CV = Configuration Variable EMI = Electro–Magnetic Interference
CW = Clockwise or Controller Wave EN or ENA = Enable
CYL = Cylinder ENV = Envelope
D EOS = End Of Sequence
EOT = End Of Travel
D/A = Digital–to–Analog
EOW = End Of Waveform
DAC = Digital to Analog Converter
EPO = Emergency Power Off
dB = Decibel
EPROM = Erasable Programmable Read Only
dBm = Decibels above or below one Milliwatt
Memory
DC = Direct Current
ERU = Emergency Rundown Unit
DCB = Driver Control Board
EXER = Exerciser
DCKSTP = Dock Stop
EXCITE = Expanding Applications with Multi–channel
DD = Dynamic Disable
Imaging Technology
DDS = Direct Digital Synthesizer
DDSB = Dynamic Disable Switch Box F
DEC = Decimal f = farad
DEG = Degree(s) F = Fahrenheit, Fuse (designator)
DEMUX = Demultiplexer FBD = Functional Block Diagram
DEV = device FBK = Feedback
DIA = Diagnostic Imaging Accessories FC = footcandle
DIAG = Diagnostic Fc = Center Frequency
DIFF = Differential FDBK = Feedback
DIG = Digit FDO = Future Delivery Order
Dig B0 = Digital B0 Adjustment FE = Field Engineer
DIP = Dual In–line Package FET = Field–Effect Transistor
DIR = Direction FF or FIFO = First In – First Out
DIS = Disable FFD = Full Field Distortion
DM = Driver Module FFT = Fast Fourier Transform
DMA = Direct Memory Access FID = Free Induction Decay
DMAC = Direct Memory Access Controller FIDAT = FIFO In Data
DMM = Digital Multi–Meter FIFO or FF = First In – First Out
DPR or DPRAM = Dual Port Random Access Memory FILT = Filter
DQA = Daily Quality Assurance FM = Frequency Modulated
DRAM = Dynamic Random Access Memory FMI = Field Modification Instruction
DRC = Dynamic Ram Controller FOV = Field Of View
DRF = Digital Receive Filter (Board) FREQ = Frequency
DRVR = Driver FRNT = Front
DSP = Digital Signal Processor FRU = Field Replaceable Unit
DVM = Digital Volt Meter ft = foot
DWG = Drawing FT = Feet
E FTP = File Transfer Protocol
ECC = Extended Cursor Control or Error Checking and
Correction
ECG = Electro–Cardiogram
EEPROM = Electrically Erasable Programmable Read
Only Memory
3–2 OVERVIEW
G INS, INST, or INSTR = Instruction

G = gauss INT or INTR = Interrupt
G/A = Gradient Amplifier I/O = Input/Output
GEN = Generator IP = Image Processor or Plate Current (RF amp) or
GND = Ground Instruction Processor or Internet Protocol
GOC AA = Global Operator Console Audio Assembly IPA = Intermediate Power Amplifier
GRAD = Gradient IPC = Interprocess Communication
GRN = Green IQ = Image Quality
GRY = Grey IR = Image Reject
GP = Gradient Processor IRF = Interface and Remote Functions (Board)
GSW = Gradient Switch IRF I/O = Interface and Remote Functions
Input/Output (Board)
H IRQ = Interrupt Request
H = henry ISA = Interrupt Start Address
H = Hexadecimal ISI = Inter–Sequence Interrupt
HART = Hardeware Tracker ISO = Isolator or Isolation
HC = Head Coil IT–MGD = Image Transfer–MDG (Board)
HD = Head or High Definition IT–Host = Image Transfer–Host (Board)
He = Helium IVI = Interactive Vascular Imaging
He–ALARM = Helium Alarm
HEX = Hexadecimal J
He–WARNING = Helium Warning J = Jack Connector (designator)
HFA = High Fidelity Amplifier JP = Jumper
HFD = High Fidelity Driver
HFD–S = High Fidelity Driver – Special K
HORIZ or HORZ = Horizontal K = Kelvin (unit of temperature) or Kilo (Thousand)
HPC = Hardware and Protocol Control KB = one thousand bytes of memory
HPFS = Host Platform Software KCal = kiloCalorie
hr = hour kg = kilogram
HSN = High Speed Network kHz = kilohertz
HSS (D) = High Speed Serial Data Link KVA = kilo Volt Amperes
HTR = Heater kW = Kilowatt
HV = High Voltage
HV PSU = High Voltage Power Supply Unit L
HVAC = Heating, Ventilation, & Air Conditioning L or LFT = Left
Hz = hertz LAN = Local Area Network
lb = pound
I LBK = Loopback
I = Current or Phase or Real LCA = Logic Cell Arrays
IAMP = Amplifier Current (Gradient) LED = Light Emitting Diode
ICD = Installation Certification Document LFC = Load From Cold
ICL = Coil Overcurrent (Gradient) LHe =Liquid Helium
ICN = Image Compute Node LIN = Linear
ID = inner diameter LM or LMK = Landmark
ID = Identity, Identifier LMP = Lamp
i.e. = that is to say LNK = Link
IEC = International Electrical Code LPCA = Low Profile Carriage Assembly
IEEE = Institute of Electrical & Electronics Engineers LO = Local Oscillator
I/F = Interface LOEP = List of Effective Pages
in. = inch LONG = Longitudinal
INFO = Information LVLE = Low Voltage, Low Energy
3–3 OVERVIEW
M OT = Overtemp
m = meter OV = Over voltage
M = mega – one million OVR = Over
mA = millamps OVRLD or OL = Overload
MAG = Magnet oz = ounce
MB = megabyte OW = Operator Workspace
MC = Multi–Coil
MCD = Multi–Coil switch Driver
MCR = Multicoil Receive (Tool or Diagnostic)
P
MDS = Multidrop Serial interface P = Positive
MEM = Memory PA = Patient or Power Amplifier
Mfg. = Manufacturing PAC = Physiological Acquisition Controller
MFU = Multi–Format Unit PAL = Programmable Array Logic or Patient Alignment
MGD = Multi–Generational Data acquisition (Chassis) Lights
MGMNT = Management PAN = Primary Archive Node
MHz = megahertz PAT = Patient
mm = millimeter PCI = Programmable Communications Interface or
MOD = Modifier Peripheral Component Interconnect
MON = Monitor PCT = Pulse Controller Task
MOSFET = Metal Oxide Semiconductor Field Effect PDI = Product Delivery Instruction
Transistor PDU = Power Distribution Unit
MOV = Metal Oxide Varistor PEN = Penetration
MPS = Manual Pre–Scan PHPS = Patient Handling Power Supply
MR = Magnetic Resonance PIN = Positive–Intrinsic–Negative
MSG = Message PIO = Programmed Input/Output
MTR = Motor PLL = Phase Lock Loop
MUX = Multiplexer PIXEL = Picture Element
mV = millivolts PM = Phase Modulation, or Planned Maintenance
MW = megawatt PMC = PCI Mezzanine Connector
mW = milliwatt P/N = Positive/Negative
PNL = Panel
N
POS = Position
N = Negative
POT = Potentiometer
N2 = Nitrogen
PP = Penetration Panel
n.c. = normally closed
PPC = Power PC
NEC = National Electrical Code
P–P = Peak to Peak
Ni–Cad = Nickel Cadmium
ppm = parts per million
n.o. = normally open
PREAMP = Preamplifier
NO. = Number
PROC = Process, Processor
NOPROC = No Processing
NOREC = No Reconstruction PROG = Program, –ed, –able
nS = Nanosecond PROM = Programmable Read Only Memory or
Program
O PS = Power Supply
O2 = oxygen PSD = Pulse Sequence Database
OC = Operator’s Console PSG = Pulse Sequence Generator
OD = outside diameter PSU = Power Supply Unit
OM = Oxygen Monitor PSS = Power Supply System Board
OPI = Oblique Plane Imaging PT = Patient Transport or Patient Table
OPTO = Optical PUR = Purple
ORG = Orange PVC = Polyvinylchloride
3–4 OVERVIEW
PW = Pulse Width SEG = Segment

PWA = Printed Wiring Assembly SEL = Select
PWB = printed wiring board SEPI = Spin Echo Planer Imaging
PWR = Power SGA = Switchable Gradient Amplifier
Q SGI = Silicon Graphics Inc.
SIG = Signal
Q = Quadrature, Quality Factor or Imaginary
SII = “S–2” (type of magnet)
Qty = Quantity
SIII = “S–3” (type of magnet)
QUAD = Quadrature or Quadrant
SIMMS = Single In–line Memory Module
R SIP = Single In–line Package
R or RT = Right SL = Slice
RAM = Random Access Memory SMC = Status Monitoring and Control
RCV = Receive SMPTE = Society of Motion Picture and Television
RD = Read Engineers
RDY = Ready SN = Service Note
RECON = Reconstruction SNR = Signal–to–Noise Ratio
REF = Reference or Reflected SPI = Serial Peripheral Interface
REG = Register or Regulator SPT = System Performance Test
RET or RTN = Return SPU = Signal Processing Unit
REV = Revision or Reverse SRAM = Static Random Access Memory
RF = Radio Frequency SRF = Solid State RF Amplifier SGA or Scalable RF
RFAMP = Radio Frequency Amplifier (Cabinet)
RFA = RF Amplifier SRF/TRF = Sequencer Related Function / Trigger and
RFI = Radio Frequency Interference or RF Interface Rotation Function (Board)
(Module) SRI = Scan Room Interface
RFS = RF System Cabinet SRV = Service
RGB = Red Green Blue SSM = System Support Module
RLA or RLY = Relay SSP = Sequence Synchronous Protocol
rms = root mean square SST = Small Sample Test
ROI = Region of Interest STAB = Stability
ROM = Read Only Memory STAT = Status
RPC = Remote Control Panel STD = Standard
RRF = Remote RF (Chassis) STD DEV = Standard Deviation
RRF–DIF = Remote RF–Digital Interface board STIF Bd = SRF/TRF InterFace Board
RSR = Register SUB–D = Subminiature D (connector)
RST = Reset SW = Switch or Software
R/W = Read/Write S/W = Software
RX = Receive SYNC = Synchronous
RXD = Receive Data SYS = System
SYSID = System Identification
S
S = Switch (designator)
SACK = Slave Acknowledge
SAG = Sagittal
SAR = Specific Absorption Rate
S/C = Superconducting
SCA = Scan Control Assembly
SCP = Scan Control Processor (Board)
SCR = Silicon Controlled Rectifier
SCSI = Small Computer System Interface
SEC = second
3–5 OVERVIEW
T W
T = tesla WARP = Waveform And Rotation Processor
TAC = Twin Accessory Cabinet WC = Water Chiller
TBD = To Be Determined WR = Write
TBL = Table WHT = White
TEMP = Temperature WIM = Workspace Interface Module
TFU = Thyristor Firing Unit WND = Window
TG = Transmit Gain WORM = Write Once Read Many
TGWC = TwinSpeed Gradient Water Cooler WRT = Write
TNS = Transient Noise Suppressor
TP = Test Point (designator) X
TR or T/R = Transmit–Receive XCVR = Transceiver
TRMAP = Transmit/Receive Map XFMR = Transformer
TRM = Twin Coil Resonator Module XMT or XMIT = Transmit
TS = Terminal Strip
Y
TSCC = TwinSpeed Cooling Cabinet
YEL = Yellow
TST = Test
TTL = Transistor to Transistor Logic
TX = Transmit
TXD = Transmit Data
U
UART = Universal Asynchronous Receiver–Transmitter
uf = microfarad
UFI = Ultra Fast Imaging
UNBLK = Unblank
uP = Microprocessor
UPLMT = Up Limit
UPM = Universal Power Monitor
USART = Universal Synchronous/Asynchronous
Receiver–Transmitter
uS or usec = microsecond
UTNS = Universal Transient Noise Suppressor (Board)
UV = Under voltage
V
VAC = Volts Alternating Current
VAR = Variable
VBUS = Bus Voltage
VCR = Video Cassette Recorder
VCNTRL = Control Voltage for 8645 Techrons
VDC = Volts Direct Current
VERT = Vertical
Vp–p = Volts Peak–to–Peak
VRE = Volume Recon Engine
VRMS = Volts, Root Mean Square
VTR = Video Tape Recorder
3–6 OVERVIEW
SYSTEM
TABLE OF CONTENTS
SECTION PAGE
HD OVERALL SYSTEM – OPERATOR WORKSPACE CABINET w/8000 & TABLE
(Forward Production or Pre–EXCITE to HD Upgrades) . . . . . . . . . . . . . . . . . . . . . . . . . 1–1
HD OVERALL SYSTEM – OPERATOR WORKSPACE CABINET w/8000 & TABLE
(EXCITE to HD Upgrades) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–2
HD OVERALL SYSTEM – OPERATOR WORKSPACE CABINET w/8200 &TABLE
(Forward Production or Pre–EXCITE to HDx Upgrades) . . . . . . . . . . . . . . . . . . . . . . . . 1–3
HDx & HDxt OVERALL SYSTEM – OPERATOR WORKSPACE CABINETw/9300 & TABLE
(Forward Production, EXCITE, or Pre–EXCITE Upgrades) . . . . . . . . . . . . . . . . . . . . . . 1–4
HDx & HDxt OVERALL SYSTEM – OPERATOR WORKSPACE CABINETw/9300 & TABLE
(EXCITE HD to HDx Upgrades) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–5
HDx & HDxt OVERALL SYSTEM – OPERATOR WORKSPACE CABINETw/Z400 & TABLE
HD OVERALL SYSTEM – 4 or 8 Channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–8
HD OVERALL SYSTEM – 16 Channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–9
HDx & HDxt OVERALL SYSTEM – 8 Channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–10
HDx & HDxt OVERALL SYSTEM – 8 Channel, IRF2b/RRF–DIF3 H/W Configuration . . . . . . 1–11
HDx & HDxt OVERALL SYSTEM – 16 Channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–12
HDx & HDxt OVERALL SYSTEM – 16 Channel, IRF2b/RRF–DIF3 H/W Configuration . . . . 1–13
HDx & HDxt OVERALL SYSTEM – 32 Channel with Infiniband Switch . . . . . . . . . . . . . . . . . . 1–14
HDx & HDxt OVERALL SYSTEM – 32 Channel without Infiniband Switch . . . . . . . . . . . . . . . 1–15
HD, HDx & HDxt OVERALL SYSTEM
(Forward Production & Upgrades) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–17
HD, HDx & HDxt OVERALL SYSTEM
HD, HDx & HDxt OVERALL SYSTEM – 4, 8, or 16 Channel
(HD Forward Production or HDx Upgrades) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–19
HDx & HDxt OVERALL SYSTEM – 8 or 16 Channel
(HDx Forward Production) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–20
HD & HDx & HDxt OVERALL SYSTEM – CAN Link Block Diagrams . . . . . . . . . . . . . . . . . . . . 1–22
SYSTEM
i
(GOC COMPUTER CABINET) OPERATOR WORKSPACE TABLE

(OW1 A2) (OW1 A1)
PC HOST COMPUTER – XW8000
(OW1 A15)
USB TO GRAPHIC HOST MONITOR
SERIAL (OW1 A6)
HIGH ORDER SHIM (HOS) USB
(OPTIONAL) CONVERTER
IDE BUS SLOTS
LCD DISPLAY
IDE HDD GRAPHIC (OW1 A3)
FROM RF/SYSTEM CABINET,
CDROM BIT 3 IT–MGD SHT 2A OR 2B

ETHERNET TO/FROM RF/SYSTEM CABINET
FDD ETHERNET SWITCH SHT 2A OR 2B
SCSI DASM VIDEO
(OPTIONAL) CAMERA
T (OW1 A5) SERIAL PORT (OPTION) SCSI TOWER
PHONE LINE MODEM (OW1 A16)
(INSITE) SERIAL 1
SCSI
SERIAL 2 MOD
KEYBOARD/MOUSE KEYBOARD/MOUSE DVD–RW
SECURITY KEY LPT AUX AUDIO AUX OUT
SERIAL PORT

SCIM
1 TO SUITE NETWORK SWITCH SCIM
(OW1 A20)
GOC AUDIO ASM
(OW1 A21) E–STOP
2 SERVICE PORT AUX INPUT STEREO RACK
(OPTION) MOUSE
(OW1 A8)
MUSIC
J5 MODEM MIB OUT IN–THE–BORE KEYBOARD
AC INPUT J1 DC PS J3 DC +5/+12/–12 (OPTION) (OW1 A7)
(FROM PDU)
J2 POWER STRIP J11 TO SCSI TOWER
AC POWER (OW1 A11) STEREO SPEAKERS
DISTRIBUTION J4 J2 TO HOST MONITOR OC SPEAKER L/R (OW1 A10)
(OW1 A19) J8 TO LCD DISPLAY
TO OPTION MONITOR 1

TO OPTION MONITOR 2
J12 TO PATIENT ALARM
TO AUDIO SPEAKER
J10 TO DASM
J7 TO SWITCH NOTES:
Additional Signal/Cabling detail can be found under Interconnects
J1 TO HOST PC on the Service Methods CDROM.
1 Network connection available for external

suite connection
2 Network connection available at front of goc
assembly for the service laptop
Refer to the following functional block diagram for additional information:
NOTE:
1) PATIENT HANDLING
2) MGD/RRF/RF
EXCITE HD (12.x) OVERALL SYSTEM
Forward Production or Pre–EXCITE to HD Upgrades
(OPERATOR WORKSPACE CABINET w/8000 & TABLE)
SHEET 1A OF 5


(OW1 A2) (OW1 A1)
(OW1 A15)
SERIAL (OW1 A6)
IDE BUS SLOTS
LCD DISPLAY
FROM
CDROM BIT 3 SYSTEM CAB , IT–MGD SHT 2A OR 2B
TO/FROM
ETHERNET
FDD SYSTEM CAB ETHERNET SWITCH SHT 2A OR 2B
SCSI
(OPTIONAL) DASM VIDEO
T (OW1 A5) CAMERA SCSI TOWER
MODEM SERIAL PORT (OPTION)
PHONE LINE SERIAL 1 (OW1 A16)
(INSITE)
SCSI
SERIAL 2 MOD
KEYBOARD/MOUSE DVD–RW
KEYBOARD/MOUSE
SECURITY KEY LPT AUX AUDIO
AUX OUT MOUSE
SCIM (OW1 A8)
SCIM
(OW1 A20)
SWITCH KEYBOARD
1 TO SUITE NETWORK WIM (OW1 A7)
(OW1 A21) E–STOP

2 SERVICE PORT STEREO SPEAKERS

OC SPEAKER L/R (OW1 A10)
AUX INPUT STEREO RACK

J5 MODEM (OPTION)
AC INPUT J1 DC PS J3 DC +5/+12/–12
(FROM PDU) MUSIC
MIB OUT IN–THE–BORE
J2 J11 TO SCSI TOWER
AC POWER (OPTION)
DISTRIBUTION J4 J2 TO HOST MONITOR
TO OPTION MONITOR 1
TO OPTION MONITOR 2 NOTES:
TO AUDIO SPEAKER Additional Signal/Cabling detail can be found under Interconnects
J10 TO DASM on the Service Methods CDROM.
J7 TO SWITCH
J1 TO HOST PC suite connection
2 Networkconnection available at front of goc
NOTE:
1) PATIENT HANDLING
2) MGD/RRF/RF

EXCITE to HD Upgrades
SHEET 1B OF 5


(OW1 A2) (OW1 A1)
(OW1 A15)
USB TO HOST MONITOR
SERIAL (OW1 A6)
(OPTIONAL) CONVERTER IDE BUS SLOTS
GRAPHIC LCD DISPLAY

IDE HDD (OW1 A3)
DVDROM BIT 3 IT–MGD SHT 2A OR 2B

FDD ETHERNET SWITCH SHT 2A OR 2B
(OPTIONAL) SCSI DASM VIDEO
T (OW1 A5) SERIAL PORT CAMERA SCSI TOWER
PHONE LINE MODEM (OPTION) (OW1 A16)
(INSITE) SERIAL 1
SCSI
SERIAL 2 MOD
TERMINATOR
SERIAL PORT

SCIM
(OW1 A20)
GOC AUDIO ASM
(OW1 A21) E–STOP
(OPTION) MOUSE
(OW1 A8)
MUSIC
(FROM PDU)
TO OPTION MONITOR 1

TO OPTION MONITOR 2
TO AUDIO SPEAKER
J10 TO DASM
J7 TO SWITCH
NOTES:
J1 TO HOST PC
on the Service Methods CDROM.

suite connection
NOTE:
1) PATIENT HANDLING
EXCITE HD (12.x) OVERALL SYSTEM 2) MGD/RRF/RF
SHEET 1C OF 5

(GOC COMPUTER CABINET)

(OW1 A2)
3
PC HOST COMPUTER – XW8400 USB TO C2 C3 FROM SHT 2C, 2D, 2E OR 2F OPERATOR WORKSPACE TABLE
(OW1 A15) USB DB9 1–WIRE (OW1 A1)
CONVERTER IN CONVERTER OUT ENVIRONMENTAL SENSOR MOUSE
USB (OW1 A8)
SERVICE KEY
KEYBOARD
(OW1 A7)
GRAPHIC HOST MONITOR

IDE HDD (OW1 A6)
IDE BUS SLOTS
DVDROM
TO/FROM RF/SYSTEM CABINET
ETHERNET ETHERNET SWITCH
FDD
4
(INSITE) SERIAL 1
SCSI
SERIAL 2 MOD
KEYBOARD BAR CODE READER (OPTION)
DVD–RW
SECURITY KEY LPT AUX IN
AUX AUDIO AUX OUT
SERIAL PORT

SCIM
(OW1 A20)
E–STOP
(OPTION)
GOC AUDIO ASM
(OW1 A21)
MUSIC
J5 MODEM MIB OUT IN–THE–BORE
AC INPUT J1 DC PS J3 DC +5/+12/–12 (OPTION)
(FROM PDU)
(OW1 A19) J6 TO 1–WIRE CONVERTER
TO OPTION MONITOR 1

TO OPTION MONITOR 2
TO AUDIO SPEAKER NOTES:
J10 TO DASM Additional Signal/Cabling detail can be found under Interconnects
J7 TO SWITCH on the Service Methods CDROM.
J3 FAN
J1 TO HOST PC 1 Network connection available for external suite connection
2 Network connection available at front of GOC assembly for the
service laptop
3 Beginning August 2008, design changed to 1–wire to USB converter.
Environmental Sensors Block Diagram utilizing 1–wire 5147136–2
GOC USB to 1–wire Converter Sys Cab Sensor
Refer to the following functional block diagram for additional information: Run
Host PC Run 1321 1322 SYSTEM
NOTE: USB Port CABINET
1) PATIENT HANDLING GOC Sensor
2) MGD/RRF/RF
4 8400 Host Computer is also available without SCSI Tower.
HDxt (15.x, 16.x) OVERALL SYSTEM
Forward Production, EXCITE, or Pre–EXCITE to HDx Upgrades
SHEET 1D OF 5


(OW1 A2)
3
USB (OW1 A8)
SERVICE KEY
KEYBOARD
(OW1 A7)

IDE HDD (OW1 A6)
IDE BUS SLOTS
DVDROM
FDD
(INSITE) SERIAL 1
SCSI
SERIAL 2 MOD
DVD–RW
AUX AUDIO AUX OUT
SERIAL PORT

SCIM
(OW1 A20)
E–STOP
(OPTION)
GOC AUDIO ASM
(OW1 A21)
MUSIC
(FROM PDU)
TO OPTION MONITOR 1

TO OPTION MONITOR 2
J10 TO DASM
J7 TO SWITCH Additional Signal/Cabling detail can be found under Interconnects
J3 FAN on the Service Methods CDROM.
J1 TO HOST PC
1 Network connection available for external suite connection
service laptop
Run
USB Port CABINET
GOC Sensor
HDx (14.x) & HDxt (15.x) OVERALL SYSTEM Refer to the following functional block diagram for additional information:
NOTE:
(OPERATOR WORKSPACE CABINET w/9300 & TABLE) 1) PATIENT HANDLING
SHEET 1E OF 5 2) MGD/RRF/RF
!

(OW1 A2)
3
PC HOST COMPUTER – XW9300 USB TO C2 C3 FROM SHT 2C, 2D, 2E, OR 2F OPERATOR WORKSPACE TABLE
USB (OW1 A8)
SERVICE KEY
KEYBOARD
(OW1 A7)

IDE HDD (OW1 A6)
IDE BUS SLOTS
DVDROM
FDD
(INSITE) SERIAL 1
SCSI
SERIAL 2 MOD
DVD–RW
AUX AUDIO AUX OUT
SERIAL PORT

SCIM
(OW1 A20)
E–STOP
(OPTION)
GOC AUDIO ASM "#
(OW1 A21)
MUSIC
J5 MODEM MIB OUT IN–THE–BORE BAR CODE READER
AC INPUT J1 DC PS J3 DC +5/+12/–12 (OPTION) (OPTION)
(FROM PDU)
TO OPTION MONITOR 1

TO OPTION MONITOR 2
TO AUDIO SPEAKER
J10 TO DASM
NOTES:
J1 TO HOST PC
service laptop
Run
USB Port CABINET
GOC Sensor
EXCITE HD to HDx Upgrades
(OPERATOR WORKSPACE CABINET w/9300 & TABLE) NOTE:
1) PATIENT HANDLING
SHEET 1F OF 5 2) MGD/RRF/RF


(OW1 A2)
3
PC HOST COMPUTER – Z400 USB TO C2 C3 FROM SHT 2C, 2D, 2E, OR 2F OPERATOR WORKSPACE TABLE
USB (OW1 A8)
SERVICE KEY
KEYBOARD
(OW1 A7)

IDE HDD (OW1 A6)
IDE BUS SLOTS
DVDROM
FDD
SERIAL 1
SERIAL 2

AUX AUDIO AUX OUT
SERIAL PORT

SCIM
(OW1 A20)
E–STOP
(OPTION)
GOC AUDIO ASM "#
(OW1 A21)
MUSIC
(FROM PDU)
J2 POWER STRIP
TO OPTION MONITOR 1

TO OPTION MONITOR 2
TO AUDIO SPEAKER
J10 TO DASM
NOTES:
J1 TO HOST PC
service laptop
Run
USB Port CABINET
GOC Sensor
HDxt (15.x, 16.x) OVERALL SYSTEM Refer to the following functional block diagram for additional information:
EXCITE HD to HDx Upgrades
(OPERATOR WORKSPACE CABINET w/Z400 & TABLE) NOTE:
1) PATIENT HANDLING
SHEET 1G OF 5 2) MGD/RRF/RF
$

1 NOTES:
TERM SERVER LHE meter may be present on upgraded systems not equipped with
1
a Magnet Monitor.
ETHERNET SWITCH MAGNET

MONITOR 2 J1 not present if this is an RFS Cabinet.
$ 3 Teal PDU. See vendor manual.

! ( 4 Optional Resistive Shim Supply (HOS).
#
5 Present only for systems with TRM Body Coil.
6 Not installed if RFS Cabinet present.
#
7 CAN Line connected if PHPS or CAN–compatible HOS is present.

( 8 Terminator not installed if PHPS or CAN–compatible HOS is present.
!
6 AE 9 J18 not present and unblank is not used if this is an RFS Cabinet.
#
6
10 Can Link cable and terminator not present if a cable is already
connected to the serial port.
!
#(
11
Present if system has RFS cabinet. CAN lines tied together for
TO System cabinet.
EITHER
CAN !. # SRFD OR SRFD II Terminator not installed if CAN–compatible HOS present.
T 12
SHT 3A

#

6 6 AB
$ #

& 6 6 AD
+, # AC
9

(" PEN PANEL
" F/O
(" #"
ASC PHPS
RFS CAB OR
CAN AA SRFD OR SRFD II
11
CAN RF SHT 3A OR 3B 12
I/F CAN LINK 7 ! !! CAN LINK
T
11
GRADIENT CAB
" (MR3)
!
+
$ 8
FAN
5 TWIN ACCESSORY CABINET

4
CAN (TAC)
T 10
!&
OHM TO/FROM HIGH ORDER SHIM
) $ GP3 USB TO SERIAL POWER SUPPLY
T
BOARD CONVERTER TO FILTER BOX
4 SHT 1A OR 1B ON PEN PANEL
#
RF SHT 4A
SPLITTER CAN
" $
2 3
!)# HFA–X R
/% 2
POWER SUPPLY, & GRADIENT
FAN MODULE "+ " 2 SWITCH 3 TO
% HFA–Y R PEN
&& # % 8 PANEL
!
2 3 SHT 4A
!)*!) - R
(" %/% & #" 2 HFA–Z
#
SGA PS
! # VACUUM VACUUM
3 SENSOR GAUGE
VACUUM VACUUM LINE
POWER DISTRIBUTION UNIT REGULATOR TO
PREAMP PWR, (PD1) VACUUM
REAR
16 CHANNEL CNTL END BELL
# ) ) PUMP SHT 4A
! PD – POWER DISTRIBUTION POWER FOR
" # ) CONTACTORS
) ALL CABINETS
DRIVER
.
" #
% % HF DRIVER (HFD) (1.5T)
DRIVER "
" 9
EXCITE HD (12.x) – 4 Channel or 8 Channel

" (
& !
%

NOTES:
TERM SERVER
MAGNET 1
MONITOR 2 J1 not present if this is an RFS Cabinet.
ETHERNET SWITCH
$
3 Teal PDU. See vendor manual.

! (
4 Optional Resistive Shim Supply (HOS).
# 5 Present only for systems with TRM Body Coil.

# 7 CAN Line connected if PHPS or CAN–compatible HOS is present.

8 Terminator not installed if PHPS or CAN–compatible HOS is present.

! ( 9 J18 not present and unblank is not used if this is an RFS Cabinet.
6 6 AE
# 10 Can Link cable and terminator not present if a cable is already
!
#( 11 Present if system has RFS cabinet. CAN lines tied together for

TO
System cabinet.
EITHER
!.

# SRFD OR SRFD II 12 Terminator not installed if CAN–compatible HOS present.
CAN
T SHT 3A

# 6

6 AB

$ #
& 6 6 AD
+, # AC
9
("
F/O (" "#" PEN PANEL
ASC
CAN PHPS
CAN RF RFS CAB OR
I/F AA SRFD OR SRFD II
SHT 3A OR 3B 11 12

11 CAN LINK ! !! CAN LINK
# 0 ) 0. $ 7 T
" 0.
F/O
"+ 0. & . 8 GRADIENT CAB

! (MR3)
$ SWITCH
%. SHT 4A 8
FAN
5 TWIN ACCESSORY CABINET

4
+ " ! CAN (TAC)
T 10
$
TO/FROM HIGH ORDER SHIM
GP3 USB TO SERIAL POWER SUPPLY
T
BOARD CONVERTER TO FILTER BOX
4 SHT 1A OR 1B ON PEN PANEL
# ) 0% $ SHT 4A
CAN
" 0% RF
2 3
SPLITTER HFA–X R
!)# $
POWER SUPPLY, GRADIENT
FAN MODULE 2 3 TO
/% SWITCH R
"+ 0% & HFA–Y PEN
2 " PANEL
%
2 3 SHT 4A
&& R
!)*!) # % 8 HFA–Z
- !
(" %/% & #"
# SGA PS
2 VACUUM VACUUM
!
# SENSOR GAUGE
3 VACUUM VACUUM LINE
PREAMP PWR, (PD1) VACUUM
REAR
16 CHANNEL CNTL END BELL
# ) ) PUMP SHT 4A
! PD – POWER DISTRIBUTION POWER FOR
" # ) CONTACTORS
) ALL CABINETS
DRIVER
.
" #
% % HF DRIVER (HFD) (1.5T)
DRIVER 9 "
"
EXCITE HD (12.x) – 16 Channels

" (
& !
.

# NOTES:
16 PORT SINGLE 1
ETHERNET PORT 2 J1 not present if this is an RFS Cabinet.
ICN1 SWITCH TERM
13 SERVER 3 Teal PDU. See vendor manual.
ICN2 MAGNET
(OPTION) MONITOR 4 Optional Resistive Shim Supply (HOS).
$
! ( Not installed if RFS Cabinet present.
6

ENVIRONMENTAL SENSOR 7 CAN Line connected if PHPS or CAN–compatible HOS is present.
# (EQUIPMENT ROOM) #
# 9 J18 not present and unblank is not used if this is an RFS Cabinet.
TERM

SERVER
#12 connected to the serial port.
!
6 6 AE 11 See sheet 5 for CAN LINK details.
#
12 Terminator not installed if CAN–compatible HOS present.
! 13 Cabinet will contain either (2) 5127452 or (1) 5127452–3 or (1)
#( TO
EITHER 5337894–3 ICNs or (1) 5911000–4 ICNs.
SRFD OR SRFD II

SHT 3A
CAN !. #
T # 6
6 AB
$ #
& 6 6 AD PEN PANEL
+, #
9 AC
("
PHPS
(" "#" RFS CAB OR
AA SRFD OR SRFD II
SHT 3A OR 3B 11 12
F/O ASC CAN LINK ! !! CAN LINK
CAN 7 T
CAN RF
I/F
11 GRADIENT CAB
(MR3)
8
FAN
5 TWIN ACCESSORY CABINET 4
" CAN (TAC)
! T 10

+
$ HIGH ORDER SHIM
GP3 POWER SUPPLY
T
BOARD TO FILTER BOX
!& 4 ON PEN PANEL
OHM SHT 4B OR 4C
) $ CAN
# RF 2 3
HFA–X R
SPLITTER
" $ TO
GRADIENT
!)# 2 SWITCH 3 PEN
/% HFA–Y R PANEL
POWER SUPPLY,
FAN MODULE & 2 SHT 4B
"+ 2 3 OR 4C
"
% HFA–Z R
&& # % 8
!)*!) - !
(" %/% & #" 2 SGA PS
# VACUUM VACUUM
3 SENSOR GAUGE
! VACUUM VACUUM LINE
# POWER DISTRIBUTION UNIT TO
REGULATOR REAR
(PD1) VACUUM END BELL
PUMP SHT 4B OR 4C
PREAMP PWR, PD – POWER DISTRIBUTION
16 CHANNEL CNTL POWER FOR
# ) ) CONTACTORS ALL CABINETS
! # )
)
"
& # )
DRIVER
%
) HF DRIVER (HFD) (1.5T)
% "
9
"
" . DRIVER
#
NOTE: Number of ICNs will vary between 1 and 2.

HDx (14.x) & HDxt (15.x) – 8 Channel
" (
& !
&

# NOTES:
16 PORT SINGLE 1
ETHERNET PORT 2 J1 not present if this is an RFS Cabinet.
ICN1 SWITCH TERM
SERVER 3 Teal PDU. See vendor manual.
MAGNET
(OPTION) MONITOR 4 Optional Resistive Shim Supply (HOS).
$
! ( Not installed if RFS Cabinet present.
6

ENVIRONMENTAL SENSOR 7 CAN Line connected if PHPS or CAN–compatible HOS is present.
# (EQUIPMENT ROOM) #
TERM

SERVER
#12 connected to the serial port.
!
6 6 AE 11 See sheet 5 for CAN LINK details.
#
12 Terminator not installed if CAN–compatible HOS present.
!
#( TO
3 EITHER
SRFD OR SRFD II

SHT 3A
CAN !. #
T # 6
6 AB
$ #
& 6 6 AD PEN PANEL
+, #
9 AC
("
F/O
PHPS
(" "#" RFS CAB OR
AA SRFD OR SRFD II
SHT 3A OR 3B 11 12
F/O ASC CAN LINK ! !! CAN LINK
CAN 7 T
CAN RF
I/F
11 GRADIENT CAB
(MR3)
8
FAN
" CAN (TAC)
! T 10

+
$ HIGH ORDER SHIM
GP3 POWER SUPPLY
T
BOARD TO FILTER BOX
!& 4 ON PEN PANEL
OHM SHT 4B OR 4C
) $ CAN
# RF 2 3
HFA–X R
SPLITTER
" $ TO
GRADIENT
!)# 2 SWITCH 3 PEN
/% HFA–Y R PANEL
POWER SUPPLY,
FAN MODULE & 2 SHT 4B
"+ 2 3 OR 4C
"
% HFA–Z R
&& # % 8
!)*!) - !
(" %/% & #" 2 SGA PS
# VACUUM VACUUM
3 SENSOR GAUGE
! VACUUM VACUUM LINE
# POWER DISTRIBUTION UNIT TO
REGULATOR REAR
PUMP SHT 4B OR 4C
PREAMP PWR, PD – POWER DISTRIBUTION
16 CHANNEL CNTL POWER FOR
# ) ) CONTACTORS ALL CABINETS
! # )
)
"
& # )
DRIVER
%
) HF DRIVER (HFD) (1.5T)
% "
9
"
" . DRIVER
#
HDx & HDxt – 8 Channel, IRF2b/RRF–DIF3 Hardware Configuration

" (
# & !


# NOTES:
16 PORT SINGLE 1
ETHERNET PORT
ICN1 SWITCH TERM 2 J1 not present if this is an RFS Cabinet.
13 SERVER MAGNET Teal PDU. See vendor manual.
ICN2 3
MONITOR
(OPTION) $ 4 Optional Resistive Shim Supply (HOS).
! ( 5 Present only for systems with TRM Body Coil.
# ENVIRONMENTAL SENSOR
(EQUIPMENT ROOM) # 7 CAN Line connected if PHPS or CAN–compatible HOS is present.
# 8 Terminator not installed if PHPS or CAN–compatible HOS is present.
TERM

9 J18 not present and unblank is not used if this is an RFS Cabinet.
SERVER #12
! 10 Can Link cable and terminator not present if a cable is already connected
6 6 AE to the serial port.
#
11 See sheet 5 for CAN LINK details.
! 12 Terminator not installed if CAN–compatible HOS present.5
#(
TO
EITHER 13 Cabinet will contain either (2) 5127452 or (1) 5127452–3 or (1)

SRFD OR SRFD II 5337894–3 ICNs or (1) 5911000–4 ICNs.

!. # SHT 3A
CAN
T 6 # 6
AB
$ #
& 6 6 AD
+, # AC
9 PEN PANEL
F/O ("
(" "#" RFS CAB OR
ASC AA SRFD OR SRFD II PHPS
SHT 3A OR 3B
CAN 11
CAN RF 12
T
11
# 0 ) 0. $
" 0.
GRADIENT CAB
(MR3)
"+ 0. & . 8
! 8
FAN
$ SWITCH CAN (TAC)
T 10

%. SHT 4B OR 4C
F/O HIGH ORDER SHIM
+ " !
GP3 POWER SUPPLY
T
$ TO FILTER BOX
4 BOARD ON PEN PANEL
SHT 4B OR 4C
CAN
# ) 0% $
2 3
" 0% RF HFA–X R
SPLITTER
!)# $ GRADIENT
2 SWITCH 3 TO
POWER SUPPLY, HFA–Y R PEN
FAN MODULE PANEL
/%
"+ 0% & SHT 4B
2 " 2 3
% HFA–Z R OR 4C
&&
!)*!) # % 8
- ! SGA PS
(" %/% & #" VACUUM VACUUM
CHASSIS #
2
SENSOR GAUGE
! POWER DISTRIBUTION UNIT REGULATOR TO
# REAR
PUMP SHT 4B OR 4C
PREAMP PWR, PD – POWER DISTRIBUTION POWER FOR
16 CHANNEL CNTL CONTACTORS ALL CABINETS
# ) )
! # )
)
"
DRIVER & # )
)
HF DRIVER (HFD) (1.5T)
% % "
9
"
" . DRIVER
#
NOTE: Number of ICNs will vary between 1 and 2.

" (
& !


# NOTES:
16 PORT SINGLE 1
ETHERNET PORT
ICN1 SWITCH TERM 2 J1 not present if this is an RFS Cabinet.
SERVER MAGNET Teal PDU. See vendor manual.
3
MONITOR
(OPTION) $ 4 Optional Resistive Shim Supply (HOS).
! ( 5 Present only for systems with TRM Body Coil.
# ENVIRONMENTAL SENSOR
(EQUIPMENT ROOM) # 7 CAN Line connected if PHPS or CAN–compatible HOS is present.
# 8 Terminator not installed if PHPS or CAN–compatible HOS is present.
TERM

SERVER #12
! 10 Can Link cable and terminator not present if a cable is already connected
6 6 AE to the serial port.
#
11 See sheet 5 for CAN LINK details.
! 12 Terminator not installed if CAN–compatible HOS present.5

3 #(
TO
EITHER

SRFD OR SRFD II

!. # SHT 3A
CAN #
T
6 6 AB
$ #
& 6 6 AD
+, #
9 AC
PEN PANEL
F/O ("
F/O
(" "#" RFS CAB OR
ASC AA SRFD OR SRFD II PHPS
SHT 3A OR 3B
CAN 11
CAN RF 12
T
11
# 0 ) 0. $
" 0.
GRADIENT CAB
(MR3)
"+ 0. & . 8
! 8
FAN
$ SWITCH CAN (TAC)
T 10

%. SHT 4B OR 4C
F/O HIGH ORDER SHIM
+ " !
GP3 POWER SUPPLY
T
$ TO FILTER BOX
4 BOARD ON PEN PANEL
SHT 4B OR 4C
CAN
# ) 0% $
2 3
" 0% RF HFA–X R
SPLITTER
!)# $ GRADIENT
2 SWITCH 3 TO
POWER SUPPLY, HFA–Y R PEN
FAN MODULE PANEL
/%
"+ 0% & SHT 4B
2 " 2 3
% HFA–Z R OR 4C
&&
!)*!) # % 8
- ! SGA PS
(" %/% & #" VACUUM VACUUM
CHASSIS #
2
SENSOR GAUGE
! POWER DISTRIBUTION UNIT REGULATOR TO
# REAR
PUMP SHT 4B OR 4C
PREAMP PWR, PD – POWER DISTRIBUTION POWER FOR
16 CHANNEL CNTL CONTACTORS ALL CABINETS
# ) )
! # )
)
"
DRIVER & # )
)
% % "
9
"
" . DRIVER
#
HDxt – 16 Channel, IRF2B/RRF–DIF3 Hardware Configuration

" (
& !

NOTES:

SINGLE PORT TERM SERVER P1

MAGNET
# MONITOR 1
24 PORT & &! &
$ 2
ETHERNET J1 not present if this is an RFS Cabinet.
ICN1 SWITCH & & ! 3 Teal PDU. See vendor manual.
(
ICN2 4 Optional Resistive Shim Supply (HOS).
ENVIRONMENTAL SENSOR 8 Terminator not installed if PHPS or CAN–compatible HOS is present.
(EQUIPMENT ROOM) C3 #
#
# 10
Can Link cable and terminator not present if a cable is already
TERM #

SERVER #12 11 See sheet 5 for CAN LINK details.
!
6 6 AE 12 Terminator not installed if CAN–compatible HOS present.
#
P4 #"( Cabinet will contain either (4) 5127452 or (2) 5127452–3 or (1)
13

!
5337894–4 ICNs or (1) 5911000–5 ICNs.
#( TO
EITHER
SRFD OR

SRFD2
!. # SHT 3A &
# &!
CAN 6 6 AB &
T $ #
& 6 6 AD ICN3
+, AC
P2 #
&
("

& 13 INFINIBAND
F/O SWITCH
(" "#" 9
&.
ICN4
F/O
CAN
CAN RF &
I/F
# 0 ) 0. $ 11

" 0. &. # ) 0 ! $
ASC
" 0!

"+ 0. & . 8

! &$
"+ 0! ! 8
$ SWITCH ! A5

%. & SHT 4A OR 4B

$ !$

+
%.
" ! +
$ &% " !
RF $
# SPLITTER
) 0% $
#
" 0% $ ) 0$ $

!)#
POWER SUPPLY, && " 0$
FAN MODULE !)#
/% POWER SUPPLY,
"+ 0% & && 8 FAN MODULE
# %
! "+ 0$
&
!)*!) 2 " RFS CAB OR SRFD OR
% AA SRFD2, SHT 3A OR 3B %
(" -
%/% & #" &
CHASSIS # !)*!) $ 8
2 (" - ! A4
! # #
P3 # !
PREAMP PWR,
16 CHANNEL CNTL
# ) )
! # ) &% RF RF
)
" && SPLITTER SPLITTER
DRIVER & # )
)
% % "
#1 #2
9
"
" . DRIVER
#
HDx (14.x) & HDxt (15.x) – 32 Channel with Infinband Switch NOTE: Number of ICNs will vary between 1, 2 or 4.
" (
& !

NOTES:

SINGLE PORT TERM SERVER P1

MAGNET 1
# MONITOR
24 PORT & &! &
$ 2 J1 not present if this is an RFS Cabinet.
ETHERNET
ICN1 SWITCH & & ! 3 Teal PDU. See vendor manual.
(
ICN2 4 Optional Resistive Shim Supply (HOS).

ENVIRONMENTAL SENSOR 8 Terminator not installed if PHPS or CAN–compatible HOS is present.
(EQUIPMENT ROOM) C3 #
10
Can Link cable and terminator not present if a cable is already
#
TERM #

11
SERVER
#12 See sheet 5 for CAN LINK details.
!
6 6 AE 12 Terminator not installed if CAN–compatible HOS present.
#
13 Cabinet will contain either (4) 5127452 or (2) 5127452–3 or (1)
P4 #"(

5337894–4 ICNs or (1) 5911000–5 ICNs.
!
#( TO
EITHER
SRFD OR

SRFD2
!. # SHT 3A &
# &!
CAN 6 6 AB &
T $ #
& 6 6 AD ICN3
+, AC
P2 #
&
(" & 13
F/O
(" "#" 9
&.
ICN4
F/O
CAN
CAN RF &
I/F
# 0 ) 0. $ 11

" 0. &. # ) 0 ! $
ASC
" 0!

"+ 0. & . 8

! &$
"+ 0! ! 8
$ SWITCH ! A5

%. & SHT 4A OR 4B

$ !$

+
%.
" ! +
$ &% " !
RF $
# SPLITTER
) 0% $
#
" 0% $ ) 0$ $

!)#
POWER SUPPLY, && " 0$
FAN MODULE !)#
/% POWER SUPPLY,
"+ 0% & && 8 FAN MODULE
# %
! "+ 0$
&
!)*!) 2 " RFS CAB OR SRFD OR
% AA SRFD2, SHT 3A OR 3B %
(" -
%/% & #" &
CHASSIS # !)*!) $ 8
2 (" - ! A4
! # #
P3 # !
PREAMP PWR,
16 CHANNEL CNTL
# ) )
! # ) &% RF RF
)
" && SPLITTER SPLITTER
DRIVER & # )
)
% % "
#1 #2
9
"
" . DRIVER
#
HDx (14.x) & HDxt (15.x) – 32 Channel without Infinband Switch NOTE: Number of ICNs will vary between 1, 2 or 4.
" (
& !
!
PEN PANEL
FROMTO/FROM
SINGLE PORT TERM SERVER P1 PHPS NOTES:
SHT 2E OR 2F
11 12 4 Teal PDU. See vendor manual.
CAN LINK 7 ! !! CAN LINK 5 Optional Resistive Shim Supply (HOS).
T
11 PHPS present if system has RFS cabinet.
GRADIENT CAB
(MR3) 12 Terminator not installed if CAN–compatible HOS present.
8
FAN
CAN (TAC)
T 10
FROMTO/FROM +, 4 HIGH ORDER SHIM
RFS CABINET J17 P2
GP3 POWER SUPPLY
T
SHT 2E OR 2F TO FILTER BOX
BOARD ON PEN PANEL
FROMTO/FROM SHT 4B OR 4C
CAN LINK
RFS CABINET J56 P3
SHT 2E OR 2F 2 3
HFA–X R
GRADIENT TO
2 SWITCH 3 PEN
HFA–Y R PANEL
SHT 4B
2 3 OR 4C
HFA–Z R
SGA PS
VACUUM VACUUM
3 SENSOR GAUGE
VACUUM VACUUM LINE
(PD1) REAR
VACUUM END BELL
PUMP SHT 4B OR 4C
FROMTO/FROM PD – POWER DISTRIBUTION POWER FOR
RFS CABINET J23 P4 CONTACTORS
SHT 2E OR 2F ALL CABINETS

" (
& !


SRFD CABINET (MR1) RF IN
AA RFI
BODY RF AND T/R BIAS
SYSTEM SUPPORT B1 SHT 4A TO 4C
MODULE (SSM) HEAD RF AND T/R BIAS
B2 SHT 4A TO 4C
ANALOG POWER RF SENSE RF OUT RF IN

MONITOR (APM) BD RF IN RF OUT RF AMP MODULE #1
UNBLK
# RF OUT RF IN
AB T/R BIAS
AC " RF IN RF OUT RF AMP MODULE #2
SHT 2A TO 2F COMMUNICATIONS
AD # PIN DRIVER (CPD) BD
IPS MODULE
HIGH VOLTAGE BD
BUCK/H–BRIDGE POWER
BOARD FROM PDU
MTR CMD
N1
38.5V DOCK
N2
DOCK/LIGHT LONG MTR
BOARD E SHT 4A TO 4C
ALIGN LIGHT
SHT 2A TO 2F AE M
BORE LIGHT
L
SCALEABLE RF DRIVER (SRFD) (1.5T)

EXCITE 12.x UPGRADE
OR
SRFD II CABINET (MR1)
AA
RF IN SRFD II
MODULE
SYSTEM SUPPORT
MODULE (SSM)
ANALOG POWER RF SENSE BODY RF AND T/R BIAS

B1 SHT 4A TO 4C
MONITOR (APM) BD
HEAD RF AND T/R BIAS
UNBLK B2 SHT 4A TO 4C
AB #
T/R BIAS
AC "
SHT 2A TO 2F COMMUNICATIONS
AD # PIN DRIVER (CPD) BD
IPS MODULE
HIGH VOLTAGE BD
BUCK/H–BRIDGE POWER
BOARD FROM PDU PEN PANEL (PP1)
MTR CMD BORE LIGHT
N1 L
OR
38.5V DOCK LONG DRIVE MOTOR
N2 E
DOCK/LIGHT LONG MTR POWER FROM PDU PHPS MOTOR COMMAND
BOARD E SHT 4A TO 4C (SSM CIRCUIT BREAKER) N1 SHT 4A TO 4C
ALIGN LIGHT ALIGNMENT LIGHTS
SHT 2A TO 2F AE M M
BORE LIGHT 38.5V DOCK
L N2
SCALEABLE RF DRIVER II (SRFD II) (1.5T) PATIENT HANDLING POWER SUPPLY (1.5T)
EXCITE 12.x UPGRADE EXCITE HD (12.x), HDx (14.x) & HDx (15.x, 16.x)t
EXCITE HD (12.x), HDx (14.x) & HDxt (15.x, 16.x) – New Installation & Up-
grade
" (
& !
$
RFS CABINET (MR2) NOTES:

120VAC POWER DISTRIBUTION
$ . 1 See sheet 5 for CAN Link details.
TO J12 120VAC ASC CHASSIS
2
2 120VAC POWER DISTRIBUTION
2
1
2
J1 ICN #1
3 J2 OPEN
3 J3 OPEN
AC DISTRIBUTION 15A % &
SRFD II MODULE POWER FROM PDU J4 OPEN
!
CB1 RF SENSE ”B” J5 RRF CHASSIS
RF SENSE ”A” B1 J6 MGD CHASSIS
CB1 HEAD RF AND T/R BIAS SHT 4A TO 4C
30 AMPS B2 J7 ICN #2 or ICN #1
RF IN AA
SHT 2A TO 2E T/R BIAS HEAD (dependant on ICN type)
φA
BLK 120VAC POWER DISTRIBUTION T/R BIAS BODY J8 OPEN

BWN ! J9 OPEN
φB
CB2 DRIVER MODULE J10 TERM SERVER
RED J11 ETHERNET SWITCH
FROM PDU φC AC POWER 1
GRN 15A
2 J12 ASC CHASSIS
G
BLU TO J6 120VAC MGD OR CAM CHASSIS 3 If system has CAM chassis, RF Sense lines
N will be routed to modules in CAM chssis.
15A
LINE CLOCK 1
CB1 J5 STIF
CB3 PEN PANEL (PP1)
J3
1A BORE LIGHT
120VAC 6.3VAC TO RFS CABINET J24 L
LONG DRIVE MOTOR
E SHT 4A TO 4C
POWER FROM PDU PHPS MOTOR COMMAND
N1
(SSM CIRCUIT BREAKER) ALIGNMENT LIGHTS
M
38.5V DOCK
RF/SYSTEM CABINET (1.5T) N2
HDx (14.x), HDxt (15.x, 16.x) NEW INSTALLATION
NOTES:
RFS CABINET (MR2)
120VAC POWER DISTRIBUTION
1 See sheet 5 for CAN Link details.
3 3 120VAC POWER DISTRIBUTION
TO J2 120VAC ASC CHASSIS
$ J2 ASC CHASSIS
TO J3 2
1
J3 MGD CHASSIS
2 J4 ETHERNET SWITCH
J5 TERM SERVER
J6 ICN #1 & #2
! SRFD II MODULE POWER FROM PDU (Dependant on ICN type, HDx)
% . RF SENSE ”B” J7 RRF CHASSIS
AC DISTRIBUTION RF SENSE ”A”
B1 J8 SERVICE
CB1 HEAD RF AND T/R BIAS SHT 4A TO 4C J9 OPEN
30 AMPS RF IN AA B2
CB2 SHT 2A TO 2E T/R BIAS HEAD
BLK
φA T/R BIAS BODY
CB1 15A
BWN
φB
RED
CB2 15A DRIVER MODULE
FROM PDU φC AC POWER 1
GRN 15A
G PEN PANEL (PP1)
BLU 120VAC MGD CHASSIS
N CB3 BORE LIGHT
L
J10 1
LONG DRIVE MOTOR
E
1A LINE CLOCK J5 STIF
120VAC 6.3VAC POWER FROM PDU PHPS MOTOR COMMAND
(SSM CIRCUIT BREAKER) N1 SHT 4A TO 4C
ALIGNMENT LIGHTS
M
38.5V DOCK
N2
TO RFS CABINET J24
RF/SYSTEM CABINET (1.5T)

EXCITE HD (12.x) NEW INSTALLATION
EXCITE HD (12.x) and HDx (14.x) & HDxt (15.x, 16.x) – New Installation & Upgrade
" (
& !
%
PENETRATION PANEL MAGNET ENCLOSURE AND REAR PEDESTAL (MG2 & MG3)
(PP1) 1 (SEE NOTE 1)
PNEUMATIC
PATIENT ALERT SQUEEZE
SYSTEM
BULB SCAN ROOM I/F (SRI) MODULE MAGNET I/F #1 MODULE
ALERT
AIR SHT 3A N1 MTR CMD LONG HOME LIMIT SW BD
LINE REMOTE OXYGEN OR 3B FIBER (3) LONG
OXYGEN MONITOR SENSOR MODULE SRI–3 BD OPTO
(OM1) (OM3) LONGITUDINAL
ENCODER
METER
(SEE NOTE 6) (SEE NOTE 6) ENCODER RIGHT/LEFT
CONTROL/DISPLAY E–STOPS
3
SENSOR
CONTROL BD SHT 3A E LONGITUDINAL
ALARM OR 3B MOTOR DRIVE DOCK LIMIT MOD
DOCK ASSEMBLY PATIENT
LIGHT DOCK LIMIT
SW BD UP LIMIT SW TRANSPORT
PEDALS (PT1)
ALARM LIGHT SHT 3A N2 MOTOR (SEE NOTE 1)
OR 3B
TO TAC VACUUM LINE VACUUM LINE REAR END BELL

VACUUM REGULATOR
SHT 2A OR 2B AIR LINES BLOWER BOX
BORE VENT (MG6)
SHT 3A M PATIENT ALIGNMENT LIGHTS
OR 3B (HALOGEN OR LASER DIODE) PATIENT COMM. BOX
SPEAKER REMOTE
INTERCOM Q SHT 1A, 1B, OR 1C
SHT 3A L BORE LIGHT FIBER OPTIC BUNDLES BOARD
OR 3B
NOTES:
REPEATER All power and signal lines entering and leaving the
1
PANEL RF enclosure pass through the penetration panel.
(SEE NOTE 2)
For ease of use, on this diagram, they are not
SHT 2A OR 2B D FIBER (3) PHYS ACQ CNTLR (PAC) MOD
FIBER OPTIC shown going to the penetration panel.
REPEATER BELLOWS
TO/FROM STIF SHT 2A OR 2B C BD FIBER (2)
IN SYSTEM CAB PAC BD CARDIAC LEADS 2 S/C Shim Power Supply and S/C Shim Coils.
SHT 2A OR 2B J PHOTOPLETHYSMOGRAPH
PROBE (OPTIONAL) 3 For Mobile systems, sensor is located in ceiling
box.
BODY QUADRATURE HYBRID ASM 4 Only present with TRM coils.
SHT 3A B1
RF/GRADIENT COIL
OR 3B BODY T/R SWITCH DIRECT Signa MR/i and CV/i systems manufactured after
GRADIENT BODY AND HYBRID DRIVE DISABLE RF BODY COIL 5
7 FILTER NOTCH SWITCHES June 15, 2000 have microphone in the head car-
SHT 2A R TO MUX A1 COIL
OR 2B BOX SHT 2A OR 2B FILTER PREAMP riage instead of the rear end bell.
WATER CHILLER TWO WATER LINES (SEE NOTE 3) X, Y, Z GRADIENT COILS 6
(WC1) TO RF/GRAD COILS (SEE NOTE 3)
8 TSCC OR TGWC 7 MR/i and CV/i fixed site systems have Neslab wa-
ter chiller. Mobiles have E & W heat exchangers.
LOW PROFILE CARRIAGE ASM 8 QUAD HEAD COIL ASM
SHT 3A B2 RF TRANSMIT
OR 3B SWITCH MICROPHONE
8 For TSC and TGWC, see water chiller.
SWITCH CNTL SURFACE COILS
HEAD T/R &
8 PREAMP ASM 9 Present in 16 Channel systems only.
HEAD/MC1–MC8 EXTREMITY COIL
SHT 2A TO MUX J200 A2 8
OR 2B TO MUX J201 A3 MC9–MC16
16 SPECTROSCOPY COILS Refer to the following functional block diagram for
MULTI–COIL (SEE NOTE 5)
CHANNEL
SWITCH MC1–MC8 ASSEMBLY additional information:
SHT 2A OR 2B V1
MC PREAMP PREAMP POWER & 16 CHAN CNTL (HEAD & MC) (8 PREAMP BDS)
FROM BIAS ASM
DRIVER MODULE MULTI COIL NOTE:
MC DRIVE & LOOPBACK MC1–MC8 ”A” CONNECTOR 1) PATIENT HANDLING
SHT 2A OR 2B V2 MULTI–COIL
FILTER MODULE MC9–MC16 50 OHM
2) MGD/RRF/RF
9 ”B” CONNECTOR 9 RF LOAD 3) GRADIENT
MAGNET POWER SUPPLY 4) MAGNET AND CRYOGENS
(SEE NOTE 4)
5) REFER TO SPECTROSCOPY MANUALS
2 S/C SHIM POWER SUPPLY 6) OXYGEN MONITOR SUBSYSTEM (DIR. 15336).
(SEE NOTE 4)
2 S/C SHIM COIL
MAGNET POWER SUPPLY
4
MAIN COIL EMERGENCY RUNDOWN UNIT
SHIM FILTER G
SPLITTER (MS4 FOR GE MAGNET)
SHT 2A AND
FROM RESISTIVE SHIM POWER SUPPLY (SEE NOTE 4) BOX (SEE NOTE 4)
IN TAC CRYOSTAT
SHT 2A OR 2B
RESISTIVE 4
EXCITE HD (12.x) or HDx (14.x Upgrade) & HDxt (15.x, 16.x) OVERALL SYSTEM – SHIM COIL
4, 8, or 16 Channel (ONLY MAIN COMMUNICATION LINES SHOWN)
SHEET 4A OF 5
.
PNEUMATIC
SYSTEM
BULB SCAN ROOM I/F (SRI) MODULE MAGNET I/F #1 MODULE
ALERT
AIR MTR CMD LONG HOME LIMIT SW BD
LINE SHT 3B N1
REMOTE OXYGEN FIBER (3) LONG
OXYGEN MONITOR SENSOR MODULE SRI–3 BD OPTO
(OM1) (OM3) LONGITUDINAL
ENCODER
METER
(SEE NOTE 6) (SEE NOTE 6) ENCODER RIGHT/LEFT
CONTROL/DISPLAY E–STOPS
3
SENSOR
CONTROL BD SHT 3B E
LONGITUDINAL
ALARM MOTOR DRIVE DOCK LIMIT MOD
DOCK ASSEMBLY PATIENT
LIGHT DOCK LIMIT
SW BD UP LIMIT SW TRANSPORT
PEDALS (PT1)
ALARM LIGHT MOTOR (SEE NOTE 1)
SHT 3B N2

VACUUM REGULATOR
AIR LINES BLOWER BOX
SHT 2C OR 2D
BORE VENT (MG6)
SHT 3B M PATIENT ALIGNMENT LIGHTS
(HALOGEN OR LASER DIODE) PATIENT COMM. BOX
SPEAKER REMOTE
INTERCOM Q SHT 1D OR 1E
SHT 3B L BORE LIGHT FIBER OPTIC BUNDLES BOARD
NOTES:
REPEATER All power and signal lines entering and leaving the
1
PANEL RF enclosure pass through the penetration panel.
(SEE NOTE 2)
For ease of use, on this diagram, they are not
SHT 2C OR 2D D FIBER (3) PHYS ACQ CNTLR (PAC) MOD
FIBER OPTIC shown going to the penetration panel.
REPEATER BELLOWS
TO/FROM STIF SHT 2C OR 2D C BD FIBER (2)
IN SYSTEM CAB PAC BD CARDIAC LEADS 2 S/C Shim Power Supply and S/C Shim Coils.
SHT 2C OR 2D J PHOTOPLETHYSMOGRAPH
PROBE (OPTIONAL) 3 For Mobile systems, sensor is located in ceiling
box.
BODY QUADRATURE HYBRID ASM 4 Only present with TRM coils.
RF/GRADIENT COIL
SHT 3B B1 DIRECT
7 BODY T/R SWITCH Signa MR/i and CV/i systems manufactured after
GRADIENT BODY AND HYBRID DRIVE DISABLE RF BODY COIL 5
FILTER NOTCH SWITCHES June 15, 2000 have microphone in the head car-
SHT 2C R TO MUX A1 COIL
WATER CHILLER OR 2D BOX SHT 2C, 2D, 2E, OR 2F
FILTER PREAMP riage instead of the rear end bell.
(WC1) (SEE NOTE 3) 6
TWO WATER LINES X, Y, Z GRADIENT COILS
TO RF/GRAD COILS (SEE NOTE 3)
8 TSCC OR TGWC
7 MR/i and CV/i fixed site systems have Neslab wa-
SHT 3 B2
J4 ter chiller. Mobiles have E & W heat exchangers.
J200 HEAD/MC1–MC8 8 LOW PROFILE CARRIAGE ASM 8 QUAD HEAD COIL ASM
SHT 2C OR 2D A2 8 For TSC and TGWC, see water chiller.
TO MUX J201 MC9–MC16 8 INTERFACE MICROPHONE
SHT 2D A3 9 9
ENCLOSURE
SURFACE COILS
9 Required for 16 Channel systems only.
SHT 2C OR 2D V1
J77 MC PREAMP PREAMP POWER & 16 CHAN CNTL (HEAD & MC)
EXTREMITY COIL
BIAS ASM INTERFACE
16 BOARD SPECTROSCOPY COILS Refer to the following functional block diagram for
J78 MC DRIVE & LOOPBACK 9 CHANNEL (SEE NOTE 5)
FROM SHT 2C OR 2D V4 MULTI–COIL SWITCH additional information:
DRIVER MODULE MC1–MC8
FILTER MODULE
MC1–MC8
MULTI COIL NOTE:
J203 MC DRIVE & LOOPBACK ”A” CONNECTOR 1) PATIENT HANDLING
SHT 2C OR 2D V2
MULTI–COIL
S/W FILTER MC9–MC16
IMAGE
50 OHM
2) MGD/RRF/RF
REJECT 9 ”B” CONNECTOR 9 3) GRADIENT
FILTER RF LOAD
MAGNET POWER SUPPLY 9 4) MAGNET AND CRYOGENS
(SEE NOTE 4)
(SEE NOTE 4)
2 S/C SHIM COIL
MAGNET POWER SUPPLY
4
SHIM FILTER G
SHT 2C OR 2D AND
IN TAC CRYOSTAT
SHT 2C OR 2D
RESISTIVE 4
HDx (14.x Forward Production) & HDxt (15.x, 16.x Forward Production) OVERALL SHIM COIL
SYSTEM – 8 Channel or 16 Channel (ONLY MAIN COMMUNICATION LINES SHOWN)
SHEET 4B OF 5
&
PNEUMATIC SCAN ROOM I/F (SRI) MODULE
SYSTEM
BULB MAGNET I/F #1 MODULE
ALERT
AIR SHT 3A N1 MTR CMD LONG HOME LIMIT SW BD
LINE REMOTE OXYGEN OR 3B LONG
SENSOR MODULE FIBER (3) OPTO
OXYGEN MONITOR (OM3)
SRI–3 BD ENCODER
(OM1) METER
(SEE NOTE 6)
LONGITUDINAL
(SEE NOTE 6) ENCODER
RIGHT/LEFT CONTROL DISP;AY E–STOPS
3
ALARM SENSOR SHT 3A E LONGITUDINAL DOCK LIMIT MOD DOCK ASSEMBLY
CONTROL BD OR 3B PATIENT
MOTOR DRIVE UP LIMIT SW TRANSPORT
ALARM DOCK LIMIT SW BD
LIGHT PEDALS (PT1)
LIGHT MOTOR (SEE NOTE 1)
SHT 3A N2
OR 3B
VACUUM REGULATOR AIR LINES
SHT 2G BORE VENT BLOWER BOX
SHT 3A M PATIENT ALIGNMENT LIGHTS (MG6)
OR 3B (HALOGEN OR LASER DIODE)
SPEAKER
REMOTE INTERCOM BD
SHT 3A L BORE LIGHT FIBER OPTIC BUNDLES Q SHT 1D OR 1E
OR 3B
PATIENT COMM. BOX
REPEATER
PANEL
D (SEE NOTE 2)
SHT 2E OR 2F FIBER OPTIC FIBER (3) PHYS ACQ CNTLR (PAC) MOD
REPEATER BELLOWS
TO/FROM STIF SHT 2E OR 2F C BD FIBER (2)
IN SYSTEM CAB PAC BD CARDIAC LEADS
NOTES:
SHT 2E OR 2F J PHOTOPLETHYSMOGRAPH
PROBE (OPTIONAL) All power and signal lines entering and leaving the
1
7
RF enclosure pass through the penetration panel.
RF/GRADIENT COIL For ease of use, on this diagram, they are not
GRADIENT TO MUX BODY QUADRATURE HYBRID ASM
WATER CHILLER FILTER SHT 2E OR 2F A1 NOTCH BODY COIL shown going to the penetration panel.
R FILTER PREAMP DIRECT RF BODY COIL
(WC1) SHT 2F BOX BODY T/R SWITCH DRIVE DISABLE
TWO WATER LINES
(SEE NOTE 3) SHT 3A OR 3B B1 AND HYBRID SWITCHES 2 S/C Shim Power Supply and S/C Shim Coils.
TO RF/GRAD COILS
8 TSCC OR TGWC X, Y, Z GRADIENT COILS For Mobile systems, sensor is located in ceiling
(SEE NOTE 3) 3
box.
J4
SHT 3A OR 3B B2 LOW PROFILE CARRIAGE ASM
J200 HEAD/MC1–MC8 8 8
QUAD HEAD COIL ASM
4 Only present with TRM coils.
SHT 2E OR 2F TO MUX A2
J201 MC9–MC16 8 INTERFACE BOX MICROPHONE
TO MUX A3 SURFACE COILS
Signa MR/i and CV/i systems manufactured after
5
J77 MC PREAMP PREAMP POWER & 16 CHAN CNTL (HEAD & MC) June 15, 2000 have microphone in the head car-
SHT 2E OR 2F V1 EXTREMITY COIL riage instead of the rear end bell.
BIAS ASM 16 INTERFACE
CHANNEL BOARD SPECTROSCOPY COILS 6
SWITCH MC1–MC8
FROM (SEE NOTE 5)
DRIVER MODULE SHT 2E OR 2F V2
J78 MULTI–COIL MC DRIVE & LOOPBACK
FILTER MODULE ”A” CONNECTOR
7 MR/i and CV/i fixed site systems have Neslab wa-
MULTI COIL ter chiller. Mobiles have E & W heat exchangers.
J203 MC DRIVE & LOOPBACK MC9–MC16 IMAGE
SHT 2E OR 2F V4
MULTI–COIL MC17–MC24
REJECT ”B” CONNECTOR 8 For TSC and TGWC, see water chiller.
S/W FILTER FILTER
50 OHM
RF LOAD 9 Present in 32 Channel systems only.
MC1–MC8 IMAGE
REJECT ”C” CONNECTOR 9
MC25–MC32 FILTER
Refer to the following functional block diagram for
additional information:
16
J56 MC17–MC24 8 CHANNEL MNS RECEIVE
SHT 2E OR 2F TO MUX A4
J57 MC25–MC32 8 SWITCH NOTE:
TO MUX A5
1) PATIENT HANDLING
2) MGD/RRF/RF
3) GRADIENT
MAGNET POWER SUPPLY 4) MAGNET AND CRYOGENS
(SEE NOTE 4)
(SEE NOTE 4)
2 S/C SHIM COIL
MAGNET POWER SUPPLY
4
SHIM FILTER G
SHT 2E OR 2F AND
IN TAC CRYOSTAT
SHT 2E OR 2F
RESISTIVE 4
HDx (14.x) & HDxt (15.x) OVERALL SYSTEM – 32 Channel SHIM COIL
(ONLY MAIN COMMUNICATION LINES SHOWN)
SHEET 4C OF 5

CAN LINK BLOCK DIAGRAM for sites with RFS CABINET & HFD CABINET
RF/SYSTEM CABINET (MR2) HFD CABINET PEN PANEL TAC CABINET
INLINE TERMINATOR
MGD CHASSIS RRF CHASSIS ASC CHASSIS (OPTIONAL) DRIVER GP MODULE PHPS HIGH ORDER
MODULE MASTER SHIM
SCP BOARD RRF–DIF RRF–DIF ASC RF ASC RF ASC NB ASC BB (HOS)
MASTER SLAVE PROCESSORS 1 & 2 DETECTORS 1 & 2 IF BOARD IF BOARD TERMINATOR
CAN PMC J22 J23 J22 3 J23 J3 J2 J2 J1 J56 J7 J7 J8 J8 J154 J155 J116 J5 1 J4 J119
BOARD T T
OR
CAN LINK BLOCK DIAGRAM for sites with RFS CABINET with CAM Chassis & HFD CABINET
RF/SYSTEM CABINET (MR2) HFD CABINET PEN PANEL TAC CABINET
CAM CHASSIS (OPTIONAL)
SCP BOARD ASC RF ASC RF ASC NB ASC BB RRF CHASSIS DRIVER GP MODULE PHPS HIGH ORDER
PROCESSORS 1 & 2 DETECTORS 1 & 2 IF BOARD IF BOARD MODULE MASTER SHIM
CAN PMC J3 J2 RRF–DIF RRF–DIF (HOS)
BOARD T MASTER SLAVE TERMINATOR
J22 J23 J22 J23 J2 J1 J56 J7 J7 J8 J8 J154 J155 J116 J5 1 J4 J119
3 T
INLINE TERMINATOR
OR
CAN LINK BLOCK DIAGRAM for sites with SYSTEM CABINET & HFD–S CABINET
SYSTEM CABINET (MR2) HFD–S CABINET TAC CABINET
INLINE TERMINATOR
MGD CHASSIS RRF CHASSIS DRIVER GP MODULE HIGH ORDER

MODULE MASTER SHIM
SCP BOARD RRF–DIF RRF–DIF (HOS)
MASTER SLAVE TERMINATOR
CAN PMC J22 J23 J22 J23 J2 J1 J56 J7 J7 J8 J8 J116 J5 2 J4 J119
BOARD T 3 T
NOTES:
1 HOS is optional. Terminator must be connected to
J155 on PHPS if HOS not present.
HOS is optional. Terminator must be connected to J8
2
on HFD Cabinet I/F if HOS not present.
EXCITE HD (12.x) ! "#! & HDxt (15.x, 16.x) 3 Only present in systems equipped with 16 Channels.
If system is 8 Channels or less, then RF–DIF Master
CAN Link Block Diagrams J23 connects to next unit in link as shown.
" (
! & !

OPERATOR WORKSPACE
TABLE OF CONTENTS
SECTION PAGE
1 – OPERATOR WORKSPACE
HD OVERALL SYSTEM – OPERATOR WORKSPACE CABINET w/8000 & GOC AA
HD OVERALL SYSTEM – OPERATOR WORKSPACE CABINET w/8000 & WIM
(EXCITE to HD Upgrades) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–2
HD OVERALL SYSTEM – OPERATOR WORKSPACE CABINET w/8200 & GOC AA
HDx & HDxt OVERALL SYSTEM – OPERATOR WORKSPACE CABINETw/9300 & GOC AA
(Forward Production, EXCITE, or Pre–EXCITE to HDx Upgrades) . . . . . . . . . . . . . . . 1–4
HDx & HDxt OVERALL SYSTEM – OPERATOR WORKSPACE CABINETw/9300 & GOC AA
HD OVERALL SYSTEM – OPERATOR WORKSPACE CABINET/TABLE w/WIM
HD OVERALL SYSTEM – OPERATOR WORKSPACE CABINET/TABLE w/GOC AA
HDx & HDxt OVERALL SYSTEM – OPERATOR WORKSPACE CABINET/TABLE w/GOC AA
OPERATOR WORKSPACE
i

(OW1 A2) (OW1 A1)
(OW1 A15)
SERIAL (OW1 A6)
IDE BUS SLOTS
LCD DISPLAY
BIT 3 IT–MGD
CDROM
FDD ETHERNET SWITCH
SCSI DASM VIDEO
(OPTIONAL) CAMERA
T (OW1 A5) SERIAL PORT (OPTION) SCSI TOWER
PHONE LINE MODEM (OW1 A16)
(INSITE) SERIAL 1
SCSI
SERIAL 2 MOD
SERIAL PORT

SCIM
(OW1 A20)
GOC AUDIO ASM
(OW1 A21) E–STOP
(OPTION) MOUSE
(OW1 A8)
MUSIC
(FROM PDU)
TO OPTION MONITOR 1

TO OPTION MONITOR 2
TO AUDIO SPEAKER
J10 TO DASM
J7 TO SWITCH NOTES:
J1 TO HOST PC on the Service Methods CDROM.

suite connection
2 Network connection available at front of goc
NOTE:
1) PATIENT HANDLING
2) MGD/RRF/RF
SHEET 1A OF 5
OPERATOR WORKSPACE 1–1


(OW1 A2) (OW1 A1)
(OW1 A15)
SERIAL (OW1 A6)
IDE BUS SLOTS
LCD DISPLAY
FROM
BIT 3 SYSTEM CAB , IT–MGD
CDROM
TO/FROM
ETHERNET SYSTEM CAB ETHERNET SWITCH
FDD
SCSI
(OPTIONAL) DASM VIDEO
T (OW1 A5) CAMERA SCSI TOWER
MODEM SERIAL PORT (OPTION)
PHONE LINE SERIAL 1 (OW1 A16)
(INSITE)
SCSI
SERIAL 2 MOD

SECURITY KEY LPT AUX AUDIO AUX OUT MOUSE
SCIM (OW1 A8)
SCIM
(OW1 A20)
SWITCH KEYBOARD
1 TO SUITE NETWORK WIM (OW1 A7)
(OW1 A21) E–STOP

2 SERVICE PORT STEREO SPEAKERS

OC SPEAKER L/R (OW1 A10)
AUX INPUT STEREO RACK

J5 MODEM (OPTION)
AC INPUT J1 DC PS J3 DC +5/+12/–12
(FROM PDU) MUSIC
MIB OUT IN–THE–BORE
J2 J11 TO SCSI TOWER
AC POWER (OPTION)
DISTRIBUTION J4 J2 TO HOST MONITOR
TO OPTION MONITOR 1
TO OPTION MONITOR 2 NOTES:
TO AUDIO SPEAKER Additional Signal/Cabling detail can be found under Interconnects
J10 TO DASM on the Service Methods CDROM.
J7 TO SWITCH
J1 TO HOST PC suite connection
NOTE:
1) PATIENT HANDLING
2) MGD/RRF/RF

EXCITE to HD Upgrades
SHEET 1B OF 5


(OW1 A2) (OW1 A1)
(OW1 A15)
USB TO HOST MONITOR
SERIAL (OW1 A6)
(OPTIONAL) CONVERTER IDE BUS SLOTS
GRAPHIC LCD DISPLAY

IDE HDD (OW1 A3)
BIT 3 IT–MGD
DVDROM

FDD ETHERNET SWITCH
(INSITE) SERIAL 1
SCSI
SERIAL 2 MOD
SERIAL PORT

SCIM
(OW1 A20)
GOC AUDIO ASM
(OW1 A21) E–STOP
(OPTION) MOUSE
(OW1 A8)
MUSIC
(FROM PDU)
TO OPTION MONITOR 1

TO OPTION MONITOR 2
TO AUDIO SPEAKER
J10 TO DASM
J7 TO SWITCH
NOTES:
J1 TO HOST PC
on the Service Methods CDROM.

suite connection
NOTE:
1) PATIENT HANDLING
EXCITE HD (12.x) OVERALL SYSTEM 2) MGD/RRF/RF
SHEET 1C OF 5


(OW1 A2)
3
USB (OW1 A8)
SERVICE KEY
KEYBOARD
(OW1 A7)

IDE HDD (OW1 A6)
IDE BUS SLOTS
DVDROM
FDD
4
(INSITE) SERIAL 1
SCSI
SERIAL 2 MOD
DVD–RW
AUX AUDIO AUX OUT
SERIAL PORT

SCIM
(OW1 A20)
E–STOP
(OPTION)
GOC AUDIO ASM
(OW1 A21)
MUSIC
(FROM PDU)
TO OPTION MONITOR 1

TO OPTION MONITOR 2
J10 TO DASM Additional Signal/Cabling detail can be found under Interconnects
J7 TO SWITCH on the Service Methods CDROM.
J3 FAN
J1 TO HOST PC 1 Network connection available for external suite connection
service laptop
Refer to the following functional block diagram for additional information: Run
NOTE: USB Port CABINET
1) PATIENT HANDLING GOC Sensor
2) MGD/RRF/RF
4 8400 Host Computer is also available without SCSI Tower.
HDx (14.x) & HDxt (15.x, 16.x) OVERALL SYSTEM
Forward Production, EXCITE, or Pre–EXCITE to HDxt Upgrades
SHEET 1D OF 5


(OW1 A2) ENVIRONMENTAL SENSOR
3 (EQUIPMENT ROOM)
PC HOST COMPUTER – XW9300 USB TO C2 OPERATOR WORKSPACE TABLE
USB (OW1 A8)
SERVICE KEY
KEYBOARD
(OW1 A7)

IDE HDD (OW1 A6)
IDE BUS SLOTS
DVDROM
FDD
(INSITE) SERIAL 1
SCSI
SERIAL 2 MOD
DVD–RW
AUX AUDIO AUX OUT
SERIAL PORT

SCIM
(OW1 A20)
E–STOP
(OPTION)
GOC AUDIO ASM
(OW1 A21)
MUSIC
(FROM PDU)
TO OPTION MONITOR 1

TO OPTION MONITOR 2
J10 TO DASM
J1 TO HOST PC
service laptop
Run
USB Port CABINET
GOC Sensor
NOTE:
SHEET 1E OF 5 2) MGD/RRF/RF


(OW1 A2) ENVIRONMENTAL SENSOR
3 (EQUIPMENT ROOM)
PC HOST COMPUTER – XW9300 USB TO C2 OPERATOR WORKSPACE TABLE
USB (OW1 A8)
SERVICE KEY
KEYBOARD
(OW1 A7)

IDE HDD (OW1 A6)
IDE BUS SLOTS
DVDROM
FDD
(INSITE) SERIAL 1
SCSI
SERIAL 2 MOD
DVD–RW
AUX AUDIO AUX OUT
SERIAL PORT

SCIM
(OW1 A20)
E–STOP
(OPTION)
GOC AUDIO ASM
(OW1 A21)
MUSIC
(FROM PDU)
TO OPTION MONITOR 1

TO OPTION MONITOR 2
TO AUDIO SPEAKER
NOTES:
J10 TO DASM
J1 TO HOST PC
service laptop
Run
USB Port CABINET
GOC Sensor
EXCITE HD to HDx Upgrades NOTE:
SHEET 1F OF 5 2) MGD/RRF/RF


(OW1 A2)
3
PC HOST COMPUTER – Z400 USB TO C2 C3 FROM SHT 2C, 2D, 2E, OR 2F OPERATOR WORKSPACE TABLE
USB (OW1 A8)
SERVICE KEY
KEYBOARD
(OW1 A7)

IDE HDD (OW1 A6)
IDE BUS SLOTS
DVDROM
FDD
SERIAL 1
SERIAL 2

AUX AUDIO AUX OUT
SERIAL PORT

SCIM
(OW1 A20)
E–STOP
(OPTION)
GOC AUDIO ASM
(OW1 A21)
MUSIC
(FROM PDU)
J2 POWER STRIP
TO OPTION MONITOR 1

TO OPTION MONITOR 2
TO AUDIO SPEAKER
J10 TO DASM
NOTES:
J1 TO HOST PC
service laptop
Run
USB Port CABINET
GOC Sensor
HDx (14.x) & HDxt (15.x, 16.x) OVERALL SYSTEM Refer to the following functional block diagram for additional information:
EXCITE HD to HDxt Upgrades
(OPERATOR WORKSPACE CABINET w/Z400 & TABLE) NOTE:
1) PATIENT HANDLING
SHEET 1G OF 5 2) MGD/RRF/RF

OPERATOR WORKSPACE TABLE (OW1 A1)

SCAN CONTROL INTERFACE MODULE
(SCIM) (OW1 A7)

WORKSPACE INTERFACE BOARD (OW1 A1 A4 A1)
$ *&
" " * &
(

$
#
$ $% #
#%
#
$%
$"

*&

ÎÎÎÎÎ
) ' '
* &

$"
ÎÎÎÎÎ
ÎÎÎ

$%
& $ & $ $ ./012 +
+
ÎÎÎ
"
"! "$ $
#!

ÉÉÉÉ ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ ÎÎ
Î Î
ÎÎ
#'
!' " $ +
! ' (

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ ÎÎ
Î Î
ÎÎ
!" $
$
311.
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î
ÎÎÎ
ÎÎ
*& * & $
& & (!"$
$(
Î ÎÎÎÎ
ÎÎÎÎ
" 12
& $ & $ 4$
"

Î
" $ $

(
Î

$
** $% LEFT
Î

SPEAKER
**

Î

* $'
$'
$"
Î
** $( $(

$%
Î
** RIGHT

SPEAKER
Î

$!
&* *
$
Î
STEREO * *& *
(AUX INPUT) &* *
MUSIC IN–
THE–BORE
Î *
Î
*

Î
$ + $
#' +
$ $ "
&* % +
Î
$ $) $% $%
&* $$

Î
+
) ( (
' *
+ #
Î
"$ ) )
" % & + +
"" $! $!
Î
+
Î
$ +
( " $$ $$ "
" + #
Î
$% "% $ $
% " + +
$! "' $" $"
Î
& +
+ % "

Î
$ " "

Î
INTERCOM BOARD
(OW1 A1 A4 A2)
Î " (

#
-
-
EXCITE HD (12.x) OVERALL SYSTEM $
(OPERATOR WORKSPACE CABINET/TABLE with WIM)
" +
SHEET 2A OF 2


*&
* &
*&

* &

(SCIM) (OW1 A7)
ÎÎÎÎÎ
$
(
# #%
$ $ $%
ÎÎÎÎÎ
ÎÎÎ
#
$ ./012 +
+
ÎÎÎ #!
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ ÎÎ
Î
ÎÎÎ
#'
+
(
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎ

$
$
311.
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎ
Î Î
$( *& * & $
(!"$

ÎÎÎÎ
ÎÎ
Î Î
12
4$
"

" $ $

(

$ & $ #'
&
$% LEFT
+** +*
SPEAKER
+**

$'
$'
* * +
$(
$(

$% RIGHT
' #
* SPEAKER

# +

+

" & " % $
+
+
'
+
&
( (
* + #
) )
$ + +
$! $!
* $ +
& % $$ $$ "
* + #
$ $
+ +
$" $"
+*
& "
* "
*

$ +
+
$%

$%
+
& #
$! &
STEREO ** $ MUSIC IN BORE
*
AUX INPUT ** TRANSDUCER

#

-
-
EXCITE HD (12.x) OVERALL SYSTEM $

(OPERATOR WORKSPACE CABINET/TABLE with GOC AUDIO ASM " +
SHEET 2B OF 2


PC HOST COMPUTER
(OW1 A15)
*&
* &
USB
*&
* &

(SCIM) (OW1 A7)
ÎÎÎÎÎ

ÎÎÎÎÎ
ÎÎÎ

$ ./012 +
+
ÎÎÎ #!
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ ÎÎ
Î
ÎÎÎ
#'
+
(
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
Î
ÎÎÎ

$
$
$ 311.
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎ
Î Î
$( *& * & $
(!"$

ÎÎÎÎ
ÎÎ
Î Î
12
4$
"

" $ $

(

$ & $ #'
&
$% LEFT
+** +*
SPEAKER
+**

$'
$'
* * +
$(
$(

$% RIGHT
' #
* SPEAKER

# +

+

" & " % $
+
+
'
+
&
( (
* + #
) )
$ + +
$! $!
* $ +
& % $$ $$ "
* + #
$ $
+ +
$" $"
+*
& "
* "
*

$ +
+
$%

$%

+
& #
$! &
STEREO ** $ MUSIC IN BORE
*
AUX INPUT ** TRANSDUCER

#

-
HDx (14.x) & HDxt (15.x, 16.x) OVERALL SYSTEM -

$
(OPERATOR WORKSPACE CABINET/TABLE with GOC AUDIO ASM
" +
SHEET 2C OF 2

PATIENT HANDLING
TABLE OF CONTENTS
SECTION PAGE
1 – PATIENT HANDLING
HD, HDx & HDxt PATIENT HANDLING
(Forward Production or Pre–EXCITE Upgrades) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–1
(EXCITE Upgrades) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–2
(Forward Production or Pre–EXCITE Upgrades) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–3
(EXCITE Upgrades) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–4
HD, HDx & HDxt PATIENT HANDLING POWER SUPPLY (PHPS) . . . . . . . . . . . . . . . . . . . . . . 1–5
HD PATIENT HANDLING – SSM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–6
HD, HDx & HDxt PATIENT HANDLING – SSM
(EXCITE Upgrades) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–7
HD, HDx & HDxt PATIENT HANDLING – SSM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–8
PATIENT HANDLING
i
MAGNET ENCLOSURE (MG2) NOTE:

Additional Signal/Cabling detail can be found under Interconnects on the
Service Methods CDROM.
ÏÏÏ
Ï
SRI–3 (SCAN ROOM INTERFACE) MODULE (MG2A33)
PENETRATION PANEL
Refer to the following functional block diagrams for additional information.
ÏÏÏÏ
Ï Ï
ÏÏÏ
(PP1) AT LEAST AT LEAST
32Kx8 RAM 64Kx8 EPROM
1) MGD/RRF/RF
Ï ÏÏÏÏÏ
Ï
2
PHPS J14 J1
EPLD REAR PEDESTAL (MG3)
Ï Ï
OUTEN–P 5
OUTEN–N WDM TP1 TP2 MAGNET I/F #1 (MG3A1)
Ï Ï
24 J2 J4
+5VENC +5VENC J3
MOTORCMD 4 4 1
ANALOG R11
Ï
3 +5VENCRET +5VENCRET
MOTORRTN SIGNAL 23 23 9
SYS CAB I/F 22 CONDITIONING 3 ENCSENSE–P ENCSENSE–P
Ï
(MR2A11) 5 5 5
ENCSENSE–N ENCSENSE–N LONG
J13 J91 J13 RST LOGIC 24 24 13 OPTO
RSTSRI RESET
Ï
1045–2 J11 FIBER J5 711–2 FIBER OPTIC MICRO– LONG–ENC–A–P LONG–ENC–A–P
ENCODER
RESET CONTROLLER 1 1 2 (MG3A6)
OPTIC SERIAL I/F (12MHZ) LONG–ENC–A–N LONG–ENC–A–N
Ï
XMIT DATA
TO/FROM TXDSRI REPEATER (TO SRI)
J11 TXD 20
LONG–ENC–B–P
20
LONG–ENC–B–P
10
STIF BD 1045–1 J9 BOARD J3 711–1 2 2 3
Ï
IN MGD FIBER LONG–ENC–B–N LONG–ENC–B–N
NOTE 1 (PP1A17A1) RECV DATA OPTIC RXD 21 21 11
RXDSRI J12 SERIAL
Ï
J10 NOTE 1 (FROM SRI) 1/F HOME–P J1
1045–1 J4 711–1 6 6 9 J2
HOME–N BUF
25 25 3
Ï
1 DR
9 LONG–EOT–P 9 4
3
Ï
LONG–EOT–N 2
J15 FPGA 28 28 11
RIGHT/LEFT OPERATOR B0 POLARITY
34 J3 +8VDC 7 6 +5V 1
Ï
OPERATOR DISPLAY COIL–PRES 1 1 DCKSTP–P +8VDC
NOT USED 36 10 7
CONTROL (MG2A4) COIL–PRES 2 9 DCKSTP–N +8VDC–RTN
5V SHINY
Ï
26 14 REG
(MG2A5) RIGHT/LEFT
37
2 UPLMT–P REFLECTIVE
+8VDC–RTN 29 15 SURFACE
J1/J2 J1/J2 J3 J4
ÏÏÏ
Ï
LIGHTS LIGHTS LITE– ON 10 UPLMT–N RUN 421
13 12 8
FAN FAN FAN–ON 6 8VDC TO DOCK LIMIT SWITCH BD (A1)
14 13 7 SHT 2A
ABORT ABORT STOP–SCAN 7 8VDC
4 3 11
BACK TO ALIGN BACK TO ALIGN END EXAM 8 8VDC–RTN
15 14 13
PAUSE PAUSE PAUSE–SCAN 14 8VDC–RTN 1 J20
3 2 12
START START START–SCAN 15 8VDC–RTN PIN(S) SIGNALS
10 9 14 RUN 749 1/6 . . LEGACY HEAD COIL ID TX/RX
STOP MOVE STOP MOVE STOP–TABLE J10
9 8 9 BLK#1 2/7 . . LEGACY MC COIL ID TX/RX
MOVE TO SCAN MOVE TO SCAN ADV–SCAN 1
12 11 10 RED#1 DUAL TEMP SENSOR 3/8 . . CON A COIL ID TX/RX
OUT < OUT < OUT–SLOW ANALOG 2 IN FRONT END BELL
8 7 16 RED#2 (MG2 A36) 4/9 . . CON B COIL ID TX/RX
IN > IN > IN–SLOW TEMP 5
7 6 15 CONDITIONING 5/10 . HART COIL ID TX/RX
PIVOT RED#3
OUT << OUT <<
5
OUT–FAST ENABLES (3) 7
DUAL TEMP SENSOR 11 . . . COIL PRESENT 1
6 17 PIVOT BLK#2
IN >> IN >> IN–FAST
LOGIC
8 IN FRONT END BELL 12 . . . COIL PRESENT 2
5 4 3 BLK#3 (MG2 A36)
HOME TABLE–DOWN TABLE–DOWN 9 13 . . . COIL PRESENT 4
15 18
LANDMARK
16
LANDMARK_A LANDMARK_A (RIGHT PANEL) 6 UNUSED PENETRATION 14 . . . BODY TX EN 2
11 10 6 J2 PANEL 15 . . . GRN_1
LANDMARK_B LANDMARK_B (LEFT PANEL) +8VDC (PP1)
19 33 7 16 . . . GRN_2
ALIGNMENT ALIGNMENT_A ALIGN–ON–A (RIGHT PANEL)
2 1 10 +8VDC 17 . . . GRN_3
2
ALIGNMENT_B ALIGN–ON–B (LEFT PANEL) +8VDC–RTN
22 36 26 PHPS 18 . . . +24VDC
+24V +24V 18 CONT–SW–PWR (+24V) 19 29 +8VDC–RTN 19 . . . +24VDC
1 J14 20/25 LEGACY HEAD COIL ID RTN (TX/RX)
23 37 J1 24VDC
XMIT J19 7 21/26 LEGACY MC COIL ID RTN (TX/RX)
FIBER 24VDC
NOT USED J18 OPTIC 8 22/27 CON A COIL ID RTN (TX/RX)
RCVE 24VDC–RTN
TX/RX POWER 9 23/28 CON B COIL ID RTN (TX/RX)
CONDITIONING 24VDC–RTN
10 24/29 HART COIL ID RTN (TX/RX)
11
12VDC 30 . . . GND
J4 78 J5 12VDC 31 . . . COIL PRESENT 3
DRIVERS 12
SEE SHEET 2 8V–12V–RTN 32 . . . BODY TX EN 1
EM–STOP 13
FOR MORE 43
8V–12V–RTN 33 . . . GND
LV–RTN
INFORMATION 44 14 34 . . . RED_1
8VDC
J15 15 35 . . . RED_2
RED–LED 24VDC
16 26 36 . . . RED_3
YEL–LED 24VDC SHT 3 37 . . . GND
17 27
GRN–LED 24VDC–RTN
18 28
NOT USED 24VDC_1 24VDC–RTN
J4 12 29 2 LED’S
MOVE_LED MOVE_LED 24VDC_2 12VDC
18 39 13 30
ALMT_LED
19
ALMT_LED
38 24VDC 31
12VDC DS1 . . . . . . . . . POWER
14 DS2 . . . . . . . . . MTR DISABLE
START_LED START_LED 8V–12V–RTN
20 41 32
LONG_0_CA LONG_0_CA RUN 1215 8V–12V–RTN DS3 . . . . . . . . . HEARTBEAT
17 37 J20
8 TO/FROM 33 DS4 . . . . . . . . . ENC–A
+12V +12V 16 CHANNEL J20 8VDC
NOTE 1 34 DS5 . . . . . . . . . ENC–B
1
1 EM–STOP DS6 . . . . . . . . . END OF TRAVEL
20 LV–RTN DS7 . . . . . . . . . HOME
DS8 . . . . . . . . . DOCK–STOP
DS9 . . . . . . . . . UP LIMIT
DS10 . . . . . . . . FIBER OPTIC TX
EXCITE HD (12.x), HDx (14.x) & HDxt (15x, 16.x, HD23.x) PATIENT HANDLING DS11 . . . . . . . . FIBER OTIC RX
DS12 . . . . . . . . FIBER OPTIC RESET
Forward Production & Pre–EXCITE Upgrade 3 DO NOT ADJUST R11
DS13 TO DS24 – NOT USED
SHEET 1A OF 5
PATIENT HANDLING 1–1

MAGNET ENCLOSURE (MG2) NOTE:

Additional Signal/Cabling detail can be found under Interconnects on the
SRI–3 (SCAN ROOM INTERFACE) MODULE (MG2A33) Service Methods CDROM.
PENETRATION PANEL
(PP1)
ÏÏÏ
Ï
AT LEAST
ÏÏÏÏ
AT LEAST Refer to the following functional block diagrams for additional information.
Ï Ï
ÏÏÏ
32Kx8 RAM 64Kx8 EPROM
1) MGD/RRF/RF
Ï ÏÏÏÏÏ
Ï
2
J14 J1
EPLD REAR PEDESTAL (MG3)
Ï Ï
OUTEN–P 5
SRF: TO/FROM OUTEN–N WDM TP1 TP2 MAGNET I/F #1 (MG3A1)
24
Ï
SSM REAR I/F J40 J2 J4
SHT 4 +5VENC +5VENC J3
MOTORCMD 4 4 1
3 ANALOG R11
Ï
+5VENCRET +5VENCRET
MOTORRTN SIGNAL 23 23 9
SYS CAB I/F 22 CONDITIONING 3 ENCSENSE–P ENCSENSE–P
(MR2A11) 5 5 5
Ï
ENCSENSE–N ENCSENSE–N LONG
J13 J91 J13 RST LOGIC 24 24 13 OPTO
RSTSRI RESET
FIBER J5 FIBER OPTIC ENCODER
Ï
1045–2 J11 711–2 MICRO– LONG–ENC–A–P
RESET CONTROLLER LONG–ENC–A–P
1 1 2 (MG3A6)
OPTIC SERIAL I/F (12MHZ) LONG–ENC–A–N LONG–ENC–A–N
XMIT DATA
Ï
TO/FROM TXDSRI REPEATER (TO SRI)
J11 TXD 20
LONG–ENC–B–P
20
LONG–ENC–B–P
10
STIF BD 1045–1 J9 BOARD J3 711–1 2 2 3
FIBER
Ï
IN MGD LONG–ENC–B–N LONG–ENC–B–N
NOTE 1 (PP1A17A1) RECV DATA OPTIC RXD 21 21 11
RXDSRI J12 SERIAL
(FROM SRI) HOME–P
Ï
1045–1 J10 NOTE 1 711–1 1/F 6 6 J1
J4 9 J2
HOME–N BUF
25 25 1 3
Ï
LONG–EOT–P DR
9 9 3 4
LONG–EOT–N
Ï
28 28 11 2
J15 FPGA
RIGHT/LEFT OPERATOR B0 POLARITY
34 J3 +8VDC 7 6 +5V 1
OPERATOR DISPLAY
Ï
COIL–PRES 1 1 DCKSTP–P +8VDC
NOT USED 36 10 7
CONTROL (MG2A4) COIL–PRES 2 9 DCKSTP–N +8VDC–RTN
5V SHINY
26 14 REG
Ï
(MG2A5) RIGHT/LEFT
37
2 UPLMT–P REFLECTIVE
+8VDC–RTN 29 15 SURFACE
J1/J2 J1/J2 J3 J4
LIGHTS LIGHTS LITE– ON 10 UPLMT–N RUN 421
ÏÏÏ
Ï
13 12 8
FAN FAN FAN–ON 6 8VDC TO DOCK LIMIT SWITCH BD (A1)
14 13 7 SHT 2A
ABORT ABORT STOP–SCAN 7 8VDC
4 3 11
BACK TO ALIGN BACK TO ALIGN END EXAM 8 8VDC–RTN
15 14 13
PAUSE PAUSE PAUSE–SCAN 14 8VDC–RTN 1 J20
3 2 12
START START START–SCAN 15 8VDC–RTN PIN(S) SIGNALS
10 9 14 RUN 749 1/6 . . LEGACY HEAD COIL ID TX/RX
STOP MOVE STOP MOVE STOP–TABLE J10
9 8 9 BLK#1 2/7 . . LEGACY MC COIL ID TX/RX
MOVE TO SCAN MOVE TO SCAN ADV–SCAN 1
12 11 10 RED#1 DUAL TEMP SENSOR 3/8 . . CON A COIL ID TX/RX
OUT < OUT < OUT–SLOW ANALOG 2 IN FRONT END BELL
8 7 16 RED#2 (MG2 A36) 4/9 . . CON B COIL ID TX/RX
IN > IN > IN–SLOW TEMP 5
7 6 15 CONDITIONING 5/10 . HART COIL ID TX/RX
PIVOT RED#3
OUT << OUT <<
5
OUT–FAST ENABLES (3) 7
DUAL TEMP SENSOR 11 . . . COIL PRESENT 1
6 17 PIVOT BLK#2
IN >> IN >> IN–FAST
LOGIC
8 IN FRONT END BELL 12 . . . COIL PRESENT 2
5 4 3 BLK#3 (MG2 A36)
HOME TABLE–DOWN TABLE–DOWN 9 13 . . . COIL PRESENT 4
15 18
LANDMARK
16
LANDMARK_A LANDMARK_A (RIGHT PANEL) 6 UNUSED PENETRATION 14 . . . BODY TX EN 2
11 10 6 J2 PANEL 15 . . . GRN_1
LANDMARK_B LANDMARK_B (LEFT PANEL) +8VDC (PP1)
19 33 7 16 . . . GRN_2
ALIGNMENT ALIGNMENT_A ALIGN–ON–A (RIGHT PANEL)
2 1 10 +8VDC 17 . . . GRN_3
2
ALIGNMENT_B ALIGN–ON–B (LEFT PANEL) +8VDC–RTN
22 36 26 18 . . . +24VDC
+24V +24V 18 CONT–SW–PWR (+24V) 19 29 +8VDC–RTN 19 . . . +24VDC
1 J14 20/25 LEGACY HEAD COIL ID RTN (TX/RX)
23 37 J1 24VDC
XMIT J19 7 21/26 LEGACY MC COIL ID RTN (TX/RX)
FIBER 24VDC
NOT USED J18 OPTIC 8 22/27 CON A COIL ID RTN (TX/RX)
RCVE 24VDC–RTN
TX/RX POWER 9 23/28 CON B COIL ID RTN (TX/RX)
CONDITIONING 24VDC–RTN
10 24/29 HART COIL ID RTN (TX/RX)
11
12VDC 30 . . . GND
J4 78 J5 12VDC 31 . . . COIL PRESENT 3
DRIVERS 12
SEE SHEET 2 8V–12V–RTN 32 . . . BODY TX EN 1
EM–STOP 13
FOR MORE 43
8V–12V–RTN 33 . . . GND
LV–RTN
INFORMATION 44 14 34 . . . RED_1
8VDC
J15 15 35 . . . RED_2
RED–LED 24VDC
16 26 36 . . . RED_3
YEL–LED 24VDC 37 . . . GND
17 27
GRN–LED 24VDC–RTN
18 28
NOT USED 24VDC_1 24VDC–RTN
J4 12 29 SRF: TO/FROM 2 LED’S
MOVE_LED MOVE_LED 24VDC_2 12VDC SSM REAR I/F J40
18 39 13 30
ALMT_LED ALMT_LED 12VDC SHT 2 (EM–STOP) DS1 . . . . . . . . . POWER
19 38 24VDC 31 SHT 4 (ALL OTHERS)
14 DS2 . . . . . . . . . MTR DISABLE
START_LED START_LED 8V–12V–RTN
20 41 32
LONG_0_CA LONG_0_CA RUN 1215 8V–12V–RTN DS3 . . . . . . . . . HEARTBEAT
17 37 J20
8 TO/FROM 33 DS4 . . . . . . . . . ENC–A
+12V +12V 16 CHANNEL J20 8VDC
NOTE 1 34 DS5 . . . . . . . . . ENC–B
1
1 EM–STOP DS6 . . . . . . . . . END OF TRAVEL
20 LV–RTN DS7 . . . . . . . . . HOME
DS8 . . . . . . . . . DOCK–STOP
DS9 . . . . . . . . . UP LIMIT
DS10 . . . . . . . . FIBER OPTIC TX
EXCITE HD (12.x), HDx (14.x) & HDxt (15.x, 16.x, HD23.x) PATIENT HANDLING DS11 . . . . . . . . FIBER OTIC RX
DS12 . . . . . . . . FIBER OPTIC RESET
EXCITE Upgrade 3 DO NOT ADJUST R11
DS13 TO DS24 – NOT USED
SHEET 1B OF 5

SRI–3 (MG2A33) J4 – OPERATOR DISPLAY (MG2A4)

1 LONG_0_A 1
LONG_0_B
2
LONG_0_C
2 LONG POSITION DISPLAY
GOC AUDIO ASM 3 3
4 LONG_0_D 4
RFS CAB I/F J6 J18 LONG_0_E 1
5 5
(MR2A15) 2 8
LONG_0_F
6 6
1 3
7 LONG_0_G 7 PERIPHERAL
HFD CABINET LONG_0_CA LONG_0_CA PULSE
8 8
LONG_1_CA
9
LONG_1_A
9 3 2 1 0 LIGHT BAR
10 10 J5
SCIM 1 P_VLED
LONG_1_B 1
PDU J2 J23 J26 EM–STOP J1 11
LONG_1_C
11
7 7 3 1 EMER 12 12 SCAN TIME REMAINING DISPLAY 2 P_LED9
STOP 13 LONG_1_D 13 14
8 2 LONG_1_E
14 14 4 P_MODE
MAGNET ENCLOSURE 15 LONG_1_F 15 1 2
CONTROL/DISPLAYS LONG_1_G
PEN PANEL (PP1) 16 16 5 P_REFA
+12V SRI–3 LONG_2_A 15
(RIGHT) (LEFT) 17 17
LONG_2_B P_REFO
J32
PHPS J14
18
LONG_2_C
18 6
3
J25 J1 J5 J4 J5 J4 19 19
11 LONG_2_D 3 2 1 0
11 1 1 43 20 20 7 P_RHI
IN OUT 16
8 8 24 24 20 20 44 21 LONG_2_E 21
22 LONG_2_F 22 8 P_OUT
LVLE– LONG_2_G 4
RETURN 23 23
24 LONG_2_CA 24 9 P_RLO
LONG_3_CA LONG_3_CA 17
25 25
E–STOP 26 LONG_3_A 26
10
5
P_VP
27 LONG_3_B 27
LONG_3_C “S” DISPLAY “I” DISPLAY 11 P_GND
28 28 18
29 LONG_3_D 29
LONG_3_E 2,3,6,7 2,3,6,7
S I
30 30
31 LONG_3_F 31
MAGNET ENCLOSURE LONG_3_G
32 32
(MG2) 33 LONG_S_0 33
LONG_S_0 9,12 9,12 RESPIRATION
DOCK LIMIT MODULE 34 LONG_S_1 34 LONG_S_1 13,16 13,16 LIGHT BAR
(MG2A31) 35 LONG_S_2 35 LONG_S_2
1 R_VLED
LONG_S_3 LONG_S_3 19
36 36
J1 J1 DOCK LIMIT LONG_S_CAL (+12V) LONG_S_CAL (+12V) R_LED9
DCKSTP–P J2 J2 37 37 2
1 1 SWITCH BD MTR–OFF ALMT_LED 7
DCKSTP–N 3 17 38 38
20 9 (MG2A31A1) J5 – 39 MOVE_LED
1 37
OFF–RTN SEE SHEET 1 N.C.
39 4
20
R_MODE
UPLMT–P 40 40
RUN 421 2 2 FOR MORE R_REFA
TO PAC II
UPLMT–N J3 START_LED EM_STOP 5 (MG2 A11 J4)
21 10 25 GND INFORMATION 41
NC_RET
41
EMERGENCY 8
NOTE 1
TO SRI–3 J3 GND 2 42 42
SHEET 1A OR 1B 6 6 26 43 EM_STOP 43 EM_STOP STOP 6
21
R_REFO
GND LVLE_RET LVLE_RET LVLE_RET
7 7 20 TBL–UP* 44
STR_0_A
44 SWITCH
+8V 3 45 45 7 R_RHI
25 14 21 9
+8V 46 STR_0_B 46
26 15 STR_0_C 8 R_OUT
47 47 EMER_STOP 22
48 STR_0_D 48
STR_0_E READBACK 9 R_RLO
49 49 10
50 STR_0_F 50
10 R_VP
51 STR_0_G 51 23
DOCK ASSEMBLY PATIENT TRANSPORT 52 STR_0_CA (+12V) 52
STR_0_CA (+12V)
11 R_GND
(PT1) 53 STR_1_CA (+12V) 53 STR_1_CA (+12V) 11
(MG2A29) 54 STR_1_A 54
PEN PANEL TABLE UP
55 STR_1_B 55
(PP1) LIMIT LINKAGE TABLE FULL UP CONDITION
TABLE UP HYDRAULIC STR_1_C
LIMIT SWITCH 56 56
CYLINDER STR_1_D
TABLE (MECHANICAL 57
STR_1_E
57 COLON ECG DISPLAY
(MECHANICAL LINKAGE) LINKAGE) 58 58
PHPS
DOWN
59 STR_1_F 59
DISPLAY
PEDAL STR_1_G
DOCK MOTOR PUMP PULL RODS 60 60
ON SWITCH TABLE STR_COLON STR_COLON ECG_RET
P1 (MECH LINKAGE) 61 61 25
FROM J47 UP DOWN STR_2_A
RF SYSTEM I/F 1184 387 PEDAL VALVE 62 62 ECG_DRV
63 STR_2_B 63 12
J125 HYDRAULIC
PUMP RETURN 64 STR_2_C 64
DOCK MOTOR STR_2_D ECG_DRV
(MECHANICAL 65 65 13
COUPLER) STR_2_E
66 66
SUPPLY 67 STR_2_F 67
HYDRAULIC STR_2_G
RESERVOIR 68 68
69 STR_2_CA (+12V) 69 N.C.
STR_3_CA (+12V) STR_3_CA (+12V) 6
70 70
STR_3–A N.C.
71 71 24
72 STR_3_B 72
NOTES: 73 STR_3_C 73 26
N.C.
74 STR_3_D 74
A
75 STR_3_E 75
1
76 STR_3_F 76
F B
G 77 STR_3_G 77
EMER_STOP rdbk EMER_STOP_READBACK (+12V)
78 78
79 LVLE RTN 79
E C N.C.
D 80 80
EXCITE HD (12.x), HDx (14.x) & HDxt (15.x, 16.x, HD23.x) PATIENT HANDLING Refer to the following functional block
diagrams for additional information. :
Forward Production & Pre–EXCITE Upgrade
SHEET 2A OF 5 1) MGD/RRF/RF

SRI–3 (MG2A33) J4 – OPERATOR DISPLAY (MG2A4)

1 LONG_0_A 1
LONG_0_B
2
LONG_0_C
2 LONG POSITION DISPLAY
WIM 3 3
4 LONG_0_D 4
SYS CAB I/F J6 J18 LONG_0_E 1
5 5
(MR2A15) 1 3
NOT USED LONG_0_F
2 6 6
8
7 LONG_0_G 7 PERIPHERAL
‘ACGD/PDU CABINET LONG_0_CA LONG_0_CA PULSE
8 8
LONG_1_CA
9
LONG_1_A
9 3 2 1 0 LIGHT BAR
10 10 J5
SCIM 1 P_VLED
LONG_1_B 1
PDU J2 J23 J26 EM–STOP J1 11
LONG_1_C
11
7 7 3 1 EMER 12 12 SCAN TIME REMAINING DISPLAY 2 P_LED9
STOP 13 LONG_1_D 13 14
8 2 LONG_1_E
14 14 4 P_MODE
MAGNET ENCLOSURE 15 LONG_1_F 15 1 2
CONTROL/DISPLAYS LONG_1_G
SRF CABINET 16 16 5 P_REFA
+12V PEN SRI–2 LONG_2_A 15
(RIGHT) (LEFT) 17 17
PNL 18 LONG_2_B 18 6 P_REFO
J32 J40 J14 J1 J4 J5 J4 LONG_2_C 3
J25 J5 19 19 3 2 1 0
11 11 1 1 43 20 LONG_2_D 20 P_RHI
7
IN OUT 16
8 8 24 24 20 20 44 21 LONG_2_E 21
22 LONG_2_F 22 8 P_OUT
LVLE– LONG_2_G 4
RETURN 23 23
24 LONG_2_CA 24 9 P_RLO
LONG_3_CA LONG_3_CA 17
25 25
E–STOP 26 LONG_3_A 26
10
5
P_VP
27 LONG_3_B 27
LONG_3_C “S” DISPLAY “I” DISPLAY 11 P_GND
28 28 18
29 LONG_3_D 29
LONG_3_E 2,3,6,7 2,3,6,7
S I
30 30
31 LONG_3_F 31
MAGNET ENCLOSURE LONG_3_G
32 32
(MG2) 33 LONG_S_0 33
LONG_S_0 9,12 9,12 RESPIRATION
DOCK LIMIT MODULE 34 LONG_S_1 34 LONG_S_1 13,16 13,16 LIGHT BAR
(MG2A31) 35 LONG_S_2 35 LONG_S_2
1 R_VLED
LONG_S_3 LONG_S_3 19
36 36
J1 J1 DOCK LIMIT LONG_S_CAL (+12V) LONG_S_CAL (+12V) R_LED9
DCKSTP–P J2 J2 37 37 2
1 1 SWITCH BD MTR–OFF ALMT_LED 7
DCKSTP–N 3 17 38 38
20 9 (MG2A31A1) J5 – 39 MOVE_LED
1 37
OFF–RTN SEE SHEET 1 N.C.
39 4
20
R_MODE
UPLMT–P 40 40
RUN 421 2 2 FOR MORE R_REFA
TO PAC II
UPLMT–N J3 START_LED EM_STOP 5 (MG2 A11 J4)
21 10 25 GND INFORMATION 41
NC_RET
41
EMERGENCY 8
NOTE 1
TO SRI–3 J3 GND 2 42 42
SHEET 1A OR 1B 6 6 26 43 EM_STOP 43 EM_STOP STOP 6
21
R_REFO
GND LVLE_RET LVLE_RET LVLE_RET
7 7 20 TBL–UP* 44
STR_0_A
44 SWITCH
+8V 3 45 45 7 R_RHI
25 14 21 9
+8V 46 STR_0_B 46
26 15 STR_0_C 8 R_OUT
47 47 EMER_STOP 22
48 STR_0_D 48
STR_0_E READBACK 9 R_RLO
49 49 10
50 STR_0_F 50
10 R_VP
51 STR_0_G 51 23
DOCK ASSEMBLY PATIENT TRANSPORT 52 STR_0_CA (+12V) 52
STR_0_CA (+12V)
11 R_GND
(PT1) 53 STR_1_CA (+12V) 53 STR_1_CA (+12V) 11
(MG2A29) 54 STR_1_A 54
PEN PANEL TABLE UP
55 STR_1_B 55
(PP1) LIMIT LINKAGE TABLE FULL UP CONDITION
TABLE UP HYDRAULIC STR_1_C
LIMIT SWITCH 56 56
CYLINDER STR_1_D
TABLE (MECHANICAL 57
STR_1_E
57 COLON ECG DISPLAY
(MECHANICAL LINKAGE) LINKAGE) 58 58
DOWN
59 STR_1_F 59
DISPLAY
PEDAL STR_1_G
DOCK MOTOR PUMP PULL RODS 60 60
ON SWITCH TABLE STR_COLON STR_COLON ECG_RET
P1 (MECH LINKAGE) 61 61 25
FROM J47 UP DOWN STR_2_A
SSM J36 PEDAL VALVE 62 62 ECG_DRV
63 STR_2_B 63 12
SHT 4 HYDRAULIC
PUMP RETURN 64 STR_2_C 64
DOCK MOTOR STR_2_D ECG_DRV
(MECHANICAL 65 65 13
COUPLER) STR_2_E
66 66
SUPPLY 67 STR_2_F 67
HYDRAULIC STR_2_G
RESERVOIR 68 68
69 STR_2_CA (+12V) 69 N.C.
STR_3_CA (+12V) STR_3_CA (+12V) 6
70 70
STR_3–A N.C.
71 71 24
72 STR_3_B 72
NOTES: 73 STR_3_C 73 N.C.
STR_3_D 26
A 74 74
75 STR_3_E 75
1
76 STR_3_F 76
F B STR_3_G
G 77 77
EMER_STOP rdbk EMER_STOP_READBACK (+12V)
78 78
79 LVLE RTN 79
E C 80 N.C. 80
D
EXCITE HD (12.x), HDx (14.x) & HDxt (15.x, 16.x, HD23.x) PATIENT HANDLING Refer to the following functional block
diagrams for additional information. :
EXCITE Upgrade
SHEET 2B OF 5
1) MGD/RRF/RF

NOTES:
1 OPTIONAL: Used only if High Order Shim (HOS) installed.

PP1 PHPS J155 Terminator removed when HOS is installed.
PATIENT HANDLING POWER SUPPLY (PHPS)
2 Systems equipped with Laser Patient Alignment lights use
one type of power supply while those equipped with Halogen
TP17 TP15 TP16 TP14 TP13
patient Alignment lights must use another. See the Renewal
J89 Parts manual.
BORE LIGHT, 1 2 +15VDC
PATIENT ALIGNMENT LIGHT, 3 11 +/–15V RTN
PAC, –15VDC 3 TEST
9 10 POINT FUNCTION
AND +10VDC TO
SRI POWER SUPPLY 12 13 14 PAC J2
4 5 –8VDC TP1 . . . . TABLE VOLTS (42VDC)
2 TP2 . . . . TAABLE COM
TP15 6 8 +10/–8 RTN TP3 . . . . CONTROL BD +8V
7 15 TP4 . . . . +8V COM
J14 TP5 . . . . BORE +12V
1 EMSTOP TP6 . . . . BORE COM
J35
+9VDC F/O PWR LVLE RTN TP7 . . . . PAL +15V
TO 12 13 14 20
F/O REPEATER J1 9VDC RTN EMSTOP TP8 . . . . PAL COM
5 6 7 8 3 TP9 . . . . SRI +24V
22 LVLE RTN
TP10 . . . SRI COM
5 OUTPUT EN–P TP11 . . . . SRI +12V
24 OUTPUT EN–N TP12 . . . SRI +8V
TP9 7 26 TP13 . . . PAC –8V
+24V TO
SRI3 J1
TP14 . . . PAC +10V
8 27
SHT 1A TP15 . . . PAC COM
TP10 9 28 +24V RTN TP16 . . . PAC –15V
10 29 TP17 . . . PAC +15V
TP11 11 30 +12V
12 31
EM STOP J32 TP12
11 15 34 +8V
LVLE RTN
24 TP10 13 32
ALIGN LIGHT–N +12V,+8V RTN
8 14 33
ALIGN LIGHT–P
FROM 21 TP5 J15
RF/SYSTEM CAB BORE VENT–N 1 3 5 7 9 +12V
9
J125 BORE VENT–P 14 16 18 20 22
22 TO
BORE LIGHT–N BORE
10 TP6 2 4 6 8 10 LIGHT
CONTROL +12V RTN
BORE LIGHT–P
23 BOARD 1 9 15 17 21 22
FROM J154 PAC TP7 J20

CAN IN CNTL/MON 10 11 12 13 14 15 16 17 18 +15V
HFD CABINET J8 TO
CAN PWR/COMM 29 30 31 32 33 34 35 36 37 PATIENT
J155 CORE ALIGNMENT
TO CAN OUT BORE LIGHT
TAC CABINET J5
1
T BOARD
FAN CONTROL CNTL/MON
TP8 1 2 3 4 5 6 7 8 9 +15V RTN
LIGHTS
JP1
SS CONTROL 20 21 22 23 24 25 26 27 28
TP3
SERVO AMP
+8VDC PWR TP1 J47 11 12 13
ENABLE 42V
2 DOCK MOTOR
23 24 25
120VAC, N AND
LONG DRIVE TP2 1 2 3 AUX RTN
POWER SUPPLY 14 15 16 TO
MOTOR 2 SERVO AMP 42V SENSE+ DOCK MOTOR
SERVO AMP 7
BOARD POWER 42V SENSE–
MOTOR 1 20
J11
SS RELAY 1 2 3 4 MOTOR 1
GND
5 CHS GND TO
LONG DRIVE MOTOR
SS RELAY 6 7 8 9 MOTOR 2
FROM NEUTRAL
PDU
(SSM)
CB1 CB2
120VAC, 1φ PATIENT COMFORT FAN F5
120VAC, N 120V SS RELAY PATIENT FAN 120VAC
10A 3A 2 (HOT) TO
TP4 PATIENT COMFORT FAN
F6
N PATIENT FAN (NEUTRAL)
EXCITE HD (12.x), HDx (14.x) & HDxt (15.x, 16.x) PATIENT HANDLING
PATIENT HANDLING POWER SUPPLY (PHPS)
SHEET 3 OF 5

TO
SYSTEM SUPPORT
MODULE SHT 5
1 2 3 SYSTEM SUPPORT MODULE P1

PENETRATION FAN CABINET
(MR1A7) CB4 208VAC INPUT PANEL (MG6)
DOCK ON, LIGHT ON, ALIGN ON, VENT ON
(PP1)
BUCK/H–BRIDGE PLUG
INPUT CIRCUIT BUCK CIRCUIT H–BRIDGE CIRCUIT BORE VENT FAN
F5 J1
BOARD J37 (TO PATIENT HANDLING) BLOWER
(PATIENT)
(MR1A7A3) F8–10
VENT ON U9 J5 F6
AIR
(FROMCK/LIGHT BD CB1
~ HOSES
VIA HV BD) F7 GRADIENT FAN
– + J2
+15V,–15V,+5V
(TO PATIENT HANDLING) F7

~ CB2 J47 BLOWER
+ (GRADIENT)
AC 208V F8
PHASE 1
235V 1
T2
+ REAR
PWM
– SUPPLY –RAW – END BELL
(MG2 A14)
REAR I/F BD 1
F1 FIBEROPTIC BUNDLE/
J1 T7
~ +15VMC FLAT PANEL
100V FROM
– + J6 J34
H–BRIDGE ~ 3 1,3,5 J15 BORE
HIGH VOLTAGE BOARD +12V BORELIGHT
J4 J3 LIGHT
(MR1A7A5) MCRTN 2,4,6 (MG2A15)
+15V DRIVE, –15V DRIVE, DRIVE COMM. J3 +15V DRIVE T4
F
100V FROM LIGHT RTN 4 I J31 J20 PATIENT
RECTIFIER H–BRIDGE L10 –15VMC L ALIGNMENT
–15V DRIVE 5 T 1–9, 20–29
LIGHTS (MG2A30)
E
10VI, –10VI, HV SENSE, HV, COMM. J1 HV R 29–37 LASER DIODES
T2 +15V PA2 1 S +5V REG
HV SENSE 100V FROM
10–18
HV F1 2
H–BRIDGE T7 J41
HV COMM. CIRCUIT ~ J11
100V FROM
+15VPAC LONG MTR1 6 1–4
– +
H–BRIDGE ~ LONG MTR2 7 6–9
10VI T2
10VI COMM. 100V FROM PACRTN
DOCK+38.5 8 J36
RECTIFIER LONGITUDINAL
–10VI H–BRIDGE 9 11–13, 23–25 MOTOR DRIVE
10–12 1–3, 14–16 J47 (MG3A7)
+15V,–15V,+5V, GND DOCK–RTN
J2 +15V L3 –15VPAC TO
T3 J7 7 DOCK
GND +38VREMOTESENSE 6 ASSEMBLY
RECTIFIER 100V FROM 20 (MG2 A29 P1)
J4 J6 J5 DOCK/LIGHT BOARD –15V H–BRIDGE +39VREMOTESENSE 7
SHT 2B
243V (MR1A7A4) MOTORCMDRTN 1 J40
GND F1 22 LONGITUDINAL
F1 Q11 T3 T7 MOTOR 2
~ ~ –8VPAC 3 TO PP1 J14 ENCODER
RECTIFIER 100V FROM 100V FROM – + OUTEN–P 3 (MG3A6)
T7 – + + H–BRIDGE H–BRIDGE ~ 5 SHT 1B
~ +5V
OUTEN–N 4
R47 PACRTN 24
ALIGN ON 15VPAL J1
+24V SRI 26 26, 27
– +8VSR1 28 34
+12V SRI 29 30, 31 TO PP1 J14
F1
F1
T7 SHT 1B
~ 11 28,29
~ 100V FROM
9VPAC +24VSRIRTN
– +
T7 – + + H–BRIDGE ~ 13 32,33
~
R104 PACRTN 7
12V
LIGHT ON BORE GND 8
LIGHT
+24V+8V SPIRTN 9
– J3
~ 12 VSRI VENT ON 1 22 FROM CPD BD J1 SHT 4
LONGMTR1
LONGMTR2 100V FROM – + J18
H–BRIDGE ~ MCRTN 16 10, 11, 13, 14 (NOT USED)
H–BRID LONGMTR2
SRIRTN PAC RTN 3
GE OUTEN–N J35
CIRCUIT 4 6, 7, 8, 11, 15
OUTEN–P F
+15V PAC 18 1, 2
I J89
MOTOR COMMAND RTN F5 –15V PAC 19 L 9, 10
T8 TO PAC
MOTOR COMMAND ~ T
100V FROM 8 VSRI –8VPAC 20 4, 5 NOTE 1
F2 – + E
H–BRIDGE ~
PAC 8/9 21 R
S
~ 9VPAC 22 12,13,14
T6 – + C61 WATER
+5V 24
~ LINES
WC OR GRADIENT
+ He WATER COIL
DOCK ON F5 CHILLER (MG2A12A1)
38.5V T8
DOCK ~ 24 VSRI
100V FROM
–
– + REMOTE PAC IF ASSEMBLY
R80 H–BRIDGE ~
ALERT
24 VSRITN J7 AIR PAC–II
J1
1 PNEUMATIC LINE I/F PANEL
38.5V DOCK REMOTE SENSE PATIENT SQUEEZE
J1 J3 J2 ALERT BULB
SYSTEM
AIR LINE AIR LINE
J7 J6
NOTE:
1 REFER TO THE FOLLOWING FUNC-
1 F7/F8 AND GRADIENT BLOWER PRESENT TIONAL BLOCK DIAGRAM FOR ADDI-
EXCITE HD (12.x) PATIENT HANDLING – PATIENT HANDLING – SSM ON SYSTEMS WITH BRM BODY COIL. TIONAL INFORMATION:
SHEET 4A OF 5 NOTE:
1) MGD/RRF/RF
TO
SYSTEM SYSTEM SUPPORT MODULE J6
SUPPORT (MR1A7) J7 1
MODULE
SHT 5 P1
CB4 208VAC INPUT
1 2 3 PLUG BUCK/H–BRIDGE BOARD

INPUT CIRCUIT BUCK CIRCUIT H–BRIDGE CIRCUIT (MR1A7A3)
J37 BORE VENT FAN
(TO PATIENT HANDLING
F8–10 VENT ON U9 J5 (RUN 764)
~ (FROMCK/LIGHT BD CB1
+15V,–15V,+5V REAR I/F BD
– + VIA HV BD) F1
~
+ CB2 J47 GRADIENT FAN 1
AC 208V
PHASE (TO PATIENT HANDLING
(RUN 785)
DOCK ON 235V J6 J31 29–37 NOTE 1;
LIGHT ON T2 +15V PA2 1 10–18 RUN 769
ALIGN ON + PWM
VENT ON – SUPPLY –
2 J34
–RAW F1
T7 +12V BORELIGHT 3 1,3,5
~ +15VMC
NOTE 1;
100V FROM F RUN 769
– + 4 I 2,4,6
H–BRIDGE ~ LIGHT RTN
J1 L J31 NOTE 1;
5 T 1–9, 20–29
MCRTN J41 RUN 768
LONG MTR1 6 E 1–4 NOTE 1;
R RUN 770
LONG MTR2 7 S 6–9
J4 J6 DOCK/LIGHT BOARD J2 J1 J3 HIGH VOLTAGE BOARD J36
L10 –15VMC 8 11–13, 23–25
243V
(MR1A7A4) (MR1A7A5) DOCK+38.5
9 NOTE 1;
F1 RUN 771
T2 200V T1
F1 ~ DOCK–RTN 10–12 1–3, 14–16
T7 Q11 + 100V FROM
~ – + VOLTAGE SENSE
– H–BRIDGE ~
– + J7 J40
D5–8 F1
~ 15VPAL T7 MOTORCMDRTN 1 22
~ +15VPAC
R47 100V FROM
H–BRIDGE
– + MOTOR 2 3
ALIGN ON ~
OUTEN–P 3 5 NOTE 1;
PACRTN
OUTEN–N 4 24 RUN 722
F1
T2 EM–STOP
+ ~ 1
F1 100V FROM – +
T7
~
12V BORE LIGHT
H–BRIDGE –15VPAC
LVLE 20
~ L3
RETURN
– + –
~ J32
R104 24
FROM SYSCAB J25
LIGHT ON 11
LONGMTR2
F1
J1 T7
LONGMTR1 ~ –8VPAC J1 J36
100V FROM – + +38VREMOTESENSE 6 7 NOTE 1;
H–BRIDGE ~ RUN 771
D14 +39VREMOTESENSE 7 20
PACRTN
OUTEN–P
J3
OUTEN–N F2 J7 FROM CPD BD J1
T3 J1 VENT ON 1 22
~ 1 J35
100V FROM – +
+15V 3 6, 7, 8, 11, 15 NOTE 1;
H–BRIDGE ~ F1
PAC RTN RUN 773
MOTOR COMMAND RTN T7 4
MOTOR COMMAND ~ 9VPAC
GND 100V FROM – + 7
H–BRIDGE ~
F2 GND 8
T6 PACRTN
~ + –15V 9 J40
– + –
~ 38.5V DOCK +24VSRIRTN 11 28,29 NOTE 1;
RUN 772
+24V+8VSRIRTN 13 32,33
DOCK ON ~ 12 VSRI F J18 NOTE 1;
100V FROM – + MCRTN 16 10, 11, 13, 14 RUN 776
H–BRIDGE I J35
~ L
+15V PAC 18 1, 2
R80 SRIRTN T
F2 –15V PAC 19 9, 10
T3 E
~ R
100V FROM +5V –8VPAC 20 4, 5 NOTE 1;
– + S RUN 773
38.5V DOCK REMOTE SENSE H–BRIDGE ~
PAC 8/9 21
J5 F5
T8
~
8 VSRI 9VPAC 22 12,13,14
100V FROM
J2 – +
H–BRIDGE ~ +5V 24
J40
+24V SRI 26 26, 27
F3 NOTE 1;
T4 +8VSR1 28 34 RUN 772
~ C61
100V FROM +15V DRIVE
H–BRIDGE
– + +12V SRI 29 30, 31
~ J18
+15V MC 31 1, 3, 5 NOTE 1;
+/–15V DRIVE RUN 776
–15V MC 32 8
F5
T8
~ 24 VSRI
–15V DRIVE 100V FROM – +
J3 H–BRIDGE ~
24 VSRITN
J4 J3 REFER TO THE FOLLOWING FUNCTIONAL BLOCK DIA-

GRAM FOR ADDITIONAL INFORMATION:
NOTE:
1) PATIENT HANDLING
EXCITE HD (12.x), HDx (14.x) & HDxt (15.x, 16.x) PATIENT HANDLING – SSM
EXCITE Upgrade
SHEET 4B OF 5

SYSTEM SUPPORT MODULE

(MR1A7) REAR
L1 PANEL
J11 J14 208 V L2 208 VAC ASM
INPUT 3 PHASE
CPD BOARD FRONT PANEL DISPLAY BOARD L3 1
FLAT BUS
(MR1A7A2) MONITOR MONITOR FRONT
AND ENABLE
LED’S
DOOR
DETECT
GND
U10 SWITCHES J3 J5
J1 EFBEN–N 1 7
HEAD
T/R BIAS GND 2
TO MDS OPTICAL CONVERTERS

SWITCH LED LED +5V 3
BANK BANK 1 BANK 2
MCR–EN–P 4
BODY GND 6 FROM
T/R BIAS SYSCAB J18
UNBLANK–N 11 6 NOTE 2
TO NB AMP
ALTERA 7064 EPLD UNBLANK–P 12 1
TO AUX
HC711P2 MICROPROCESSOR
AUTO SPECTRO EFBEN–P 43 2
ECHO
ROM
(SPC
CPUw/
WATCH
RS–232
LOGIC
INPUT SPECTRO
CODE) DOG PORT1 PORTS
T/R BIAS S–UNBLK–N 75 8
RAM RS–232 RS–232
TPS
RESET
SPECTRO
OUTPUT
APM BOARD J1 S–UNBLK–P 76 3
EEPROM
REGISTERS PORT2 LEVEL
CONVERTERS
14 BIT
COUNTER
TIMER
LOGIC PORTS
UNBLK U18
(MR1A7A1) J1–15
VENT ON 22 TO REAR I/F BD
TIMERS RS–232 BUS UBNLNK U11
(CONFIG) PORT3 CONTRL GATING LOGIC R19
14 J32 21
DECIDED I/O A/D LOGIC DD,TR,MC RFIN ADJ. TP5 TP22
ALIGNON–P
SPI BUS VREFB VREFA OPEN RF IN TP BUFF VCA RF
TR DRIVE
PORTS CONVERTR DECIDED SIGNALS
U14 CIRCUIT TP4 U18 ERROR 4 QUAD
LOOPG CONTROL MULTIPIER OUTPUT LIGHTON–N 15 10
OUTPUT DRIVE POWER AMP
+5V U16 AMP U26
U28 U25 INTEGRATOR U17
PORTS U26 POWER
RFAMPS
SPLITTER
LOG U10 U7
CABLE
DETECT
LIGHTON–P 20 22
SHORT
EFB RF OUT
U14 CIRCUIT SPLITTER U24 TP8
U15 AMPS
MC1–DRIVE R61 TEST
PRE EN VENTON–P 46 22 FROM
JP3 ANITLOG AMP BODY ENV. SYSCAB J25
HV RELAY (NB AMP)
MC1 DET. B
UNBLANK DRIVE OPEN NORM U19 LOOP BODY ENV. B ALIGNON–N 47 8 NOTE 2
SPECTRO
BYPASS B
RS–422 U14 CIRCUIT GAIN
INHIBIT B
READY B
EFB ENABLE ADJ. R14 R15
FAULT B
LIGHT ON
INPUT
U25
U24 R22
ADJ.
ZERO MON.LEVEL VENTON–N 78 9
CONV BODY IN B R287
SHORT
POWER
10 J46 4
ALIGNMENT ON U15 R58 U14 CIRCUIT SPLITTER AUX–RTS
VENT ON MC2–DRIVE
R311
MC2 POWER BODY BODY BPF B AUX–RXD 44 3
ADJ. CABLE
DRIVE COMBNR
OPEN
U13 CIRCUIT
HEAD BPF B DETECT TP7 MICRO AUX–TXD 65 2 LAPTOP J/F
POWER SUPPLY
U21 HEAD ENV. U1
HV VOLTAGE CONTROLSIGNAL U22 POWER AUX–CTS 66 5
INTERFACE SHORT R310 SPLITTER HEAD IN B DET. B
DOCK EN
DIVIDERS HEAD ENV. B

U15 U13 CIRCUIT HEAD
DRIVE R51 AUX–DTR 67 20
VENT ON
MC3–DRIVE
LIGHT ON
ADJ. R12
ALIGN ON
R13
PAC
J507
+15
–15
MC3 ZERO MON.LEVEL

OVERHEAT FAULT 7 19
+5
DRIVE OPEN
U13 CIRCUIT J507 J408 J409 J3 NOT USED J104 NOT USED J106 J107 J103
U13 NOT GND 8
U30
CABLE
SHORT
U13 CIRCUIT
HEAD BODY USED DETECT FJST–I–RTN 9 13
U15
MC4–DRIVE R66 IN B IN B SPECTRO TP19
MC4 ENV. PWRSHO WN 16 11
NOT USED BPF DET. B
DRIVE
SRFD OR SRFD II CABINET GND 17
R96 R97
J102 ZERO MON.LEVEL GND 19
TO MNS
J12 FJST–2RTN 39 14
HIGH VOLTAGE
1 BOPRESENT 40 22
+15V 42 1,2
RF MON J503
U46 DUTYFAULT 45 17
CABLE
BIASON 48 20 TO MNS J7
DETECT TP21
10VI, –10VI, HV SENSE, HV, COMM.
BODY IN A J110 PAC8/9 49

J42 BODY ENV.
DET. A BODY ENV. A
DD DRIVE BODY1 POWERFLT 51 18
R100 R101
MON.LEVEL
ZERO 0FLT 70 16
SEE MGD/RRF/RFSUB-
+15V,–15V,+5V, GND
FJST–3–RTN 73 15
SYSTEM SECTION: CABLE
SRFD POWER CABINET DETECT TP20 MICRO +15V 74 1,2
(SHT 7A) OR HEAD IN A J108 HEAD
ENV
U8 ACON 77 9
+5V J44 SRFD II POWER CABINET DET. A HEAD ENV. A
FAULTRST 79 10
+15V (SHT 7C) R98
FAULT A
INHIBIT A
BYPASS A
READY A
DD NOT USED R99
MON.LEVEL
–15V ZERO UNBLANK288 80 12
DOCK ON
LIGHT ON ACOURDBK 82 21
ALIGN ON CABLE
GND 81
VENT ON J101 DETECT
J504
SPECTRO TP18
TO MNS UNBLK2N8/2 33 1
ENV.
J1 BPF DET. A
34–38 TO SRFD RFI J18 OR
GND
MOSI J43 SRFD II J18
R95 41 6
R94
MON.LEVEL
UNBLK2NB/P
SCLK BODY2 ZERO
J501
NB–RTS 53 4
J9 J1 N0–TXD 68 3 TO SRFD RFI J18 OR

J5 J4 SRFD II J18
NB–RXD 64 2
REAR PANEL ASM J503 RF MON
1 2 3 MDS–RXD 71 RX FROM GRAD CAB
NB SERIAL NOTE 1
J501
FROM
J3 1 J504 PCM MDS–TXD 72 TX TO SYS CAB J16
NOTE 2
SYSTEM SUPPORT
MODULE
SHT 4A OR 4B RF IN FROM
SYSTEM CAB REFER TO THE FOLLOWING FUNC-
J1 TIONAL BLOCK DIAGRAM FOR ADDI-
NOTE 2 TIONAL INFORMATION:
NOTE:
1) GRADIENT
EXCITE HD (12.x), HDx (14.x) & HDxt (15.x, 16.x) PATIENT HANDLING – SSM 2) MGD/RRF/RF
SHEET 5 OF 5

NOTE: HFD CABINET

Additional Signal/Cabling detail can MR3 HFA–X
MR3 GP3 J20
HIGH FIDELITY
be found under Interconnects on the
Service Methods CDROM J19
AMPLIFIER–X
I COIL NOT
USED J6
Refer to the following Functional SUPERVISORY MONITORING J18 EMI
FILTER TRANSFORMER
Block Diagrams for additional RESET
CIRCUIT
information:
J11
HEAT HFA
1) MGD/RRF/RF MDS RESET TRI 90
SYNC CONTROL
SENSOR BOARD
2) PATIENT HANDLING
TRI 0
RESET ECC
OPTIONAL: Used only if Patient ICOIL J5
1 BACKPLANE BOARD
Handling Power Supply (PHPS) CAN RESET
is not installed. J8 terminator RESET
RESET
IREF IERROR VDRIVE
removed when PHPS is installed. RESET DELAY
GATE POWER
2 Present only on Forward LDIDT DRIVER BUS BAR
Production or Pre–EXCITE BOARD (HIGHER
upgrade systems. INVERTER)
VOLTAGE POWER
DSP2 SCALER BUS BAR
J16 PRBLEM BOARD (LOWER CAB
INT J10 INVERTER) TB1 I/F
TEST
NOT J17 POINTS
USED TRI 90 J3
MONITORING J3 X+ 1+
TRI 0 FILTER
BOARD J2 X– 2–
SDRAM ECC
ICOIL J1 J4
J22
NOT RS232
USED XCVR VDRIVE
IREF IERROR
DSP1
RESET X
PEN PANEL CAN
Y+ 3+
J4
(SEE NOTE 2) mP J5 J3 TO PEN PANEL
CAB DSP2
Y
LDIDT
Y– 4– (BRM BODY COIL) OR
I/F BUS J2 TWIN ACCESSORY CAB
PHPS 1 J6 (TRM BODY COIL)
MR3 HFA–Y SHT 2
J8 J8 Z J4
2 J154 T CAN
FPGA J11
HIGH FIDELITY
XCVR JTAG J1
CONFIG TRIANGLE AMPLIFIER – Y
DEVISE GEN
TRI 90
SGA TRI 0
CONTROL/ 5+ J5
STATUS ECC Z+
FPGA J5 J3
CONFIG ICOIL Z– 6–
CONFIG GSCP J2
DEVISE
SYSTEM CABINET (NOT USED)
IREF IERROR VDRIVE J6
OR MR3 HFA–Z J4
RF/SYSTEM CABINET DSP1 HIGH FIDELITY
BUS AMPLIFIER – Z J1
(SEE NOTE 1) LDIDT
CAB
DRIVER I/F FPGA
MODULE CAN J56 J7 J7 FLASH SDRAM J13
J1 PS
CONTROL/
STATUS
J15
PDU
STIF CLK
J17 J2
J1 RS422 NOT
BD J11 DAB RX USED 208 VAC
XDATA J2 J14
J14 HSSD
YDATA J3 INPUT RS422 NOT
J13 M/S SGA
ZDATA J4 XCVR USED
J12 POWER
ASM SUPPLY
DUART INT DUARTE
CE MUX SELECT/ENABLE
J5 J9 SELECT
TO TAC CABINET J12 RS232 L1
SHT 2 XCVR 420 VAC 420 VAC
USED ON TWINSPEED ONLY A/D INPUT L2 SSM
J5 CHANNEL
DUART L3 RFI
NOT PC
USED J6 FAN 208VAC 3φ
ONBOARD HOST
POWER L1 K1 SYSTEM CAB
NOT
J21
Synchronous Read Loop 16 CH 16 CH 16 CH 16 CH SUPPLY INCOMING L2 RELAY SHIM P.S.
SSI MUX MUX MUX MUX POWER
USED MOITORING 4–Level FIFO in FPGA L3 MAG P.S.
MNS (SPARE)
GRADIENT – HFD
SHEET 1A OF 2
GRADIENT 1–1
REV15 DIRECTION 5133310
NOTE: HFD–S CABINET

Additional Signal/Cabling detail can MR3 SGA–X
MR3 GP3 J20
HIGH FIDELITY
be found under Interconnects on the
Service Methods CDROM J19
AMPLIFIER–X
I COIL NOT
USED J6
Refer to the following Functional SUPERVISORY MONITORING J18 EMI
FILTER TRANSFORMER
Block Diagrams for additional RESET
CIRCUIT
information:
J11
HEAT HFA
1) MGD/RRF/RF MDS RESET TRI 90
SYNC CONTROL
SENSOR BOARD
2) PATIENT HANDLING
TRI 0
RESET ECC
Terminator present at J8 if ICOIL J5
1 BACKPLANE BOARD
system is not a TwinSpeed. CAN RESET
RESET IREF IERROR VDRIVE
RESET
2 TAC Cabinet present only on RESET DELAY
TwinSpeed systems. GATE POWER
LDIDT DRIVER BUS BAR
BOARD (HIGHER
INVERTER)
VOLTAGE POWER
DSP2 SCALER BUS BAR
J16 PRBLEM BOARD (LOWER CAB
INT J10 INVERTER) TB1 I/F
TEST
NOT J17 POINTS
USED TRI 90 J3
MONITORING J3 X+ 1+
TRI 0 FILTER
BOARD J2 X– 2–
SDRAM ECC
ICOIL J1 J4
J22
NOT RS232
USED XCVR VDRIVE
IREF IERROR
DSP1
RESET X
TAC CABINET CAN
Y+ 3+
J4
mP J5 J3 TO PEN PANEL
2 CAB DSP2
Y
LDIDT
Y– 4– (BRM BODY COIL) OR
I/F BUS J2 TWIN ACCESSORY CAB
HOS 1 J6 (TRM BODY COIL)
MR3 SGA–Y SHT 2
J8 J8 Z J4
T J4 J5 T CAN
FPGA J11
HIGH FIDELITY
XCVR JTAG J1
CONFIG TRIANGLE AMPLIFIER – Y
DEVISE GEN
TRI 90
SGA TRI 0
CONTROL/ 5+ J5
STATUS ECC Z+
FPGA J5 J3
CONFIG ICOIL Z– 6–
CONFIG GSCP J2
DEVISE
SYSTEM CABINET (NOT USED)
IREF IERROR VDRIVE J6
OR MR3 SGA–Z J4
RF/SYSTEM CABINET DSP1 HIGH FIDELITY
BUS AMPLIFIER – Z J1
(SEE NOTE 1) LDIDT
CAB
DRIVER I/F FPGA
MODULE CAN J56 J7 J7 FLASH SDRAM J13
J1 PS
CONTROL/
STATUS
J15
PDU
STIF CLK
J17 J2
J1 RS422 NOT
BD J11 DAB RX USED 208 VAC
XDATA J2 J14
J14 HSSD
YDATA J3 INPUT RS422 NOT
J13 M/S SGA
ZDATA J4 XCVR USED
J12 POWER
ASM SUPPLY
DUART INT DUARTE
CE MUX SELECT/ENABLE
J5 J9 SELECT
TO TAC CABINET J12 RS232 L1
SHT 2 XCVR 420 VAC 420 VAC
USED ON TWINSPEED ONLY A/D INPUT L2 SSM
J5 CHANNEL
DUART L3 RFI
NOT PC
USED J6 FAN 208VAC 3φ
ONBOARD HOST
POWER L1 K1 SYSTEM CAB
NOT
J21
Synchronous Read Loop 16 CH 16 CH 16 CH 16 CH SUPPLY INCOMING L2 RELAY SHIM P.S.
SSI MUX MUX MUX MUX POWER
USED MOITORING 4–Level FIFO in FPGA L3 MAG P.S.
MNS (SPARE)
GRADIENT – HFD–S (UPGRADED ACGD)

SHEET 1B OF 2
GRADIENT 1-2
SYSTEMS WITH
NOTE: BRM BODY COIL
Refer to the following Functional
Block Diagrams for additional GRADIENT COIL (EPOXY FILLED)
information: PENETRATION PANEL (MG2 A12 A1)
(PP1)
1)OVERALL SYSTEM
INNER OUTER
GRADIENT FILTER BOX MG3 GRADIENT GRADIENT
1 Twin Accessory Cabinet is (PP1 A7) TS1 COIL COIL
present only on TwinSpeed J1
systems (with TRM body coil). X+ 1 X1
X
J2
X– 2 X2
FROM J3
HFD CABINET I/F Y+ 3 Y3
SHT 1A Y
OR
HFD–S CABINET J4
Y– 4 Y4
SHT 1B
J5
5 Z5
Z+
Z
J6
Z– 6 Z6
SYSTEMS WITH
TRM BODY COIL
1 TWIN ACCESSORY CABINET (TAC)
J8
INCOMING POWER INCOMING POWER 208V 2 PHASE
208V 2 PHASE 1.5T TRM PANG BLOCK CONFIGURATION
J10
CHILLER VACUUM VACUUM
GAUGE SENSOR
VACUUM
PUMP
J11 VACUUM LINE TO
REAR TWIN RESONANT MODULE HIGH ORDER 2 1
END BELL (TRM) EPOXY FILLED SHIM LEAD
VACUUM (MG2A12A1)
REGULATOR PEN PANEL GRADIENT COIL ZZM+ ZZM–
(PP1)
SHIM COIL XZM+
J27 J22
TO USB/SERIAL CONVERTER OPTIONAL FILTER
FROM HOST SHIM P.S. ZOOM XZM– 12 10 8 6 3
J12 INNER OUTER
TO HFD OR HFD–S CABINET J5 ZOOM TO WHOLE BODY GRADIENT GRADIENT FILTER GRADIENT GRADIENT
CONTROL LINE SWITCH (PP1 A7) COIL COIL
SHT 1A OR 1B XZM+ XZM+ YZM+ XZM+ XZM– YZM+ YZM+ XWB–
X+
XZM– XZM– YZM–
X–
FROM 11 9 7 5 4
HFD CABINET I/F YZM+ YZM+ ZZM+
SHT 1A Y+
OR
HFD–S CABINET 1/F
YZM– YZM– ZZM– ZWB– ZWB+ YWB– YWB+ XWB+
SHT 1B Y–
ZZM+ ZZM+
Z+ XWB+
ZZM– ZZM– CABLE # MARKING/DESCRIPTION
Z– XWB–
1 ZM Z6 In (–)
XZM– WHOLE BODY
X–
XWB+ XWB+ YWB+ 2 ZM Z5 Out (+)
XWB– XWB– XWB– YWB– 3 WB X8 180 (–)
4 WB X7 0 (+)
YZM–
YWB+ YWB+ ZWB+ 5 WB Y9 270 (+)
Y–
YWB– YWB– ZWB– 6 ZM Y4 90 (–)
YWB–
7 WB Y10 90 (–)
ZZM–
ZWB+ ZWB+
8 ZM Y3 270 (+)
Z–
9 WB Z11 Out (+)
ZWB– ZWB– ZWB–
10 ZM X2 180 (–)
INNER
GRADIENT COIL
OUTER
GRADIENT COIL 11 WB Z12 In (–)
GRADIENT CHAIN HARDWARE 12 ZM X1 0 (+)
SHEET 2 OF 2
GRADIENT 1–3
PDU
TABLE OF CONTENTS
Note:
PDU found in Vendor Manuals only. (SEE SERVICE METHODS CDROM)
PDU i
MGD/RRF/RF (1.5T)
TABLE OF CONTENTS
SECTION PAGE
1 – MGD/RRF/RF SUBSYSTEM (1.5T)

HD MGD CHASSIS – HOST, RECEIVE, AND RECON FUNCTIONS
HDx, HDxt MGD CHASSIS – HOST, RECEIVE, AND RECON FUNCTIONS
HDx HDxt MGD CHASSIS – VOLUME RECON ENGINE
HD, HDx & HDxt MGD CHASSIS – SEQUENCE SEGMENT . . . . . . . . . . . . . . . . . . . . . . . . . . 1–4
HD, HDx & HDxt RRF CHASSIS INTERCONNECT BLOCK DIAGRAM
(4 and 8 Channel Systems) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–7
(16 Channel – Forward Production & Upgrades) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–9
HDx & HDxt RRF CHASSIS INTERCONNECT BLOCK DIAGRAM
(32 Channel – Forward Production & Upgrades) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–11
(4 and 8 Channel Systems) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–12
(Channels 1–8 of 16 Channel – Forward Production & Upgrades) . . . . . . . . . . . . . . . . 1–13
(Channels 1–8 of 32 Channel – Forward Production & Upgrades) . . . . . . . . . . . . . . . . 1–14
(Channels 9–16 of 16 or 32 Channel – Forward Production & Upgrades) . . . . . . . . . . 1–15
(Channels 17–24 of 32 Channel – Forward Production & Upgrades) . . . . . . . . . . . . . 1–16
(Channels 25–32 of 32 Channel – Forward Production & Upgrades) . . . . . . . . . . . . . 1–17
HD, HDx & HDxt RRF RECEIVE CHAIN CONNECTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–18
HD DRIVER MODULE
(Upgrade with SSM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–19
HD DRIVER MODULE
(Forward Production, RFS Cabinet, no SSM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–20
HDx & HDxt DRIVER MODULE
(Upgrade with SSM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–21
HDx & HDxt DRIVER MODULE
(Forward Production, RFS Cabinet, no SSM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–22
HD, HDx & HDxt SRFD POWER CABINET – SYSTEM SUPPORT MODULE
(Upgrades Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–23
HD, HDx & HDxt SRFD CABINET – RFI AND SOLID STATE AMPS
(Upgrades Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–25
HD & HDx SRFD II POWER CABINET – SYSTEM SUPPORT MODULE
(Upgrades Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–26
HD, HDx & HDxt SRFD II RF AMPLIFIER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–28
HD, HDx & HDxt MAGNET ROOM & RELATED COMPONENTS
(12.x – Forward Production & Upgrades)
(14.x , 15.x– Upgrades) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–29
MGD/RRF/RF (1.5T)
i
TABLE OF CONTENTS (Continued)
SECTION PAGE
1 – MGD/RRF/RF SUBSYSTEM (1.5T) (Continued)

HDx & HDxt MAGNET ROOM & RELATED COMPONENTS
(14.x, 15.x – Forward Production) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–30
HD & HDx MULTI–COIL MODULES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–31
HDx & HDxt 8 CHANNEL & 16 CHANNEL MULTI–COIL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–32
HDx & HDxt 32 CHANNEL MULTI–COIL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–33
HDx & HDxt LPCA MULTI–COIL INTERFACE ASM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–34
HD & HDx MULTI–COIL ADAPTER (J10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–35
HD, HDx & HDxt PHYSIOLOGICAL ACQUISITION CONTROLLER II . . . . . . . . . . . . . . . . . . 1–36
HD, HDx & HDxt 16 CHANNEL SWITCH (1.5T) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–37
HDx & HDxt 8 DEPOPULATED 8 CHANNEL SWITCH (1.5T) . . . . . . . . . . . . . . . . . . . . . . . . . . 1–38
HD 8 CHANNEL MULITCOIL “A” AND “B” CONNECTOR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–39
HDx & HDxt MULITCOIL “A+” CONNECTOR
(Forward Production) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–40
HDx & HDxt MULITCOIL “B8” CONNECTOR
HDx & HDxt MULITCOIL “B16” AND “C16” CONNECTOR
HD, HDx & HDxt ASC CHASSIS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–43
HD, HDx & HDxt MNS RF Amplifie4
(Optional Forward Producion MNS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–44
HD, HDx & HDxt MNS Interconnects
(Optional Forward Production MNS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–45
HD, HDx & HDxt MNS Interconnects)
(Optional MNS Upgrade Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–46
HD MCR II TOOL AND CABLE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–47
HDx & HDxt MCR III TOOL AND CABLE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–48
HD MCR II TOOL – 8 CHANNEL CONNECTOR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–49
HDx & HDxt MCR III TOOL – 8 CHANNEL CONNECTOR . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–50
NOTE:
Additional Signal/Cabling detail can be found under Interconnects on the Service Methods CDROM.
2 – MGD/RRF/RF SUBSYSTEM SUPPLEMENTAL SCHEMATICS (1.5T)

HEAD & BODY PREAMP SCHEMATIC (46–264442S) . . . . . . . . . . . . . . . . . . . . . . . . . 2–1
HV DYNAMIC DISABLE FILTER MODULE SCHEMATIC . . . . . . . . . . . . . . . . . . . . . . . 2–2
HEAD T/R PREAMP FILTER BOARD (2295844, 3 SHEETS) . . . . . . . . . . . . . . . . . . . 2–3
T/R BOARD SCHEMATIC (2133404S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–6
MULTICOIL MODULE (2295846) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–7
MOTHER BOARD (2295860, 5 SHEETS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–8
NOTE:
Additional Signal/Cabling detail can be found under Interconnects on the Service Methods CDROM.
MGD/RRF/RF (1.5T)
ii
SECTION 1 – MGD/RRF/RF SUBSYSTEM (1.5T)
GOC COMPUTER CABINET SYSTEM CABINET OR RFS CABINET

(OW1 A2)
MGD CHASSIS
LINUX PC CAB
I/F TO SCP BOARD
PCI EXPANSION J63 8 – PORT 10/100/1000 BASE T (SHT 2)
E–NET2 ETHERNET SWITCH TO AGP BOARD
(SHT 2)
IMAGE TRANSFER J22
IT – HOST
(IT) LINK
TERM
SERVER
1 DRF2 BOARD (FRONT SLOT 7)
(SHT 2) 2
APS FILTER ENGINE
GOC AUDIO ASM TO/FROM IRF I/O
(SHT 2) 3 SERIAL (CHANNEL 0)
5 WAVEFORM SERIAL DEBUG DSP FILTER ENGINES
NOTE 1 (SHT 2) 1 100MHz CHANNELS 1–15
TO/FROM STIF 4 320C6201–200
(FOR TPS RESET) SSRAM
(SHT 2) EMIF (128k x 32)
WIM TO/FROM IRF I/O Serial DPR

6 WAVEFORM SERIAL COM1 RJ45 1 2 HPI 20MHz (4k x 32)
NOTE 1 (SHT 2) APS BOARD (FRONT SLOT 1)
(MOTOROLA MCP750)
IT – MGD
L2 CACHE PPC BOARD
1MB
750
MEMORY TRANSCEIVERS & BUFFERS
32–128MB
RAVEN
E’NET
DEC 21140
4MB
FLASH 10/100Mb/s
DUAL
SERIAL PCI–GP BUS I/F CLK RECEIVER
SSP I/F
(PLX 9054, DIST I/F
CPLD & LOGIC
NVRAM
RTC PCI
NOTES:
Additional Signal/Cabling detail can be found under
Î ÎÎ Î Î Î
PCI to
2 – SYNC/ASYNC
Interconnects on the Service Methods CDROM.
OPTIONAL E’NET
ISA/IDE
BRIDGE J1 J2 J3 J4 J5
Î ÎÎ
Î
ÎÎ Î Î Î
Refer to following Block Diagrams for additional
DUAL USB
PCI to PCI
information:
Î
ÎÎÎ Î Î ÎÎÎÎÎÎÎ
Î Î
BRIDGE
21154
1)OPERATOR WORKSPACE
RECEIVE DATA BUS
Î Î ÎÎÎÎÎÎÎÎÎÎÎ
Î ÎÎ
(SHT 2)
SEQUENCE DATA BUS
Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î
1 There are 16 Receive Channels on each J5 J4 J3 J2 J1 (SHT 2)
DRF2 Board. Each system has one DRF2 20MHZ CLOCK BUS
ÎÎÎ
Î Î Î
(SHT 2)
Board.
Reflex 200 AP has single AP Board
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎ Î Î Î
2 PCI 1 64 BIT, 33 MHZ
(two CE nodes, 1GB MEM total).).
Reflex 200B AP has second AP Board
Î
ÎÎÎÎ ÎÎ
ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î Î
Î Î ÎÎ Î ÎÎÎ
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î
TO/FROM
(two CE nodes, 1GB MEM total). AGP INTERNAL PCI
Î Î ÎÎÎ
ÎÎÎ
Î Î
ÎÎÎ
64 BIT, 33MHZ
Reflex 400 AP has second AP Board (SHT 2)
Î Î Î
3
(four CE nodes, 2GB MEM total). J5 J4 J3 J2 J1 J2 J1
Reflex 400B AP has second AP Board
(four CE nodes, 2GB MEM total). J5 J4 J3 J2 J1
Reflex 800 AP has second AP Board CE NODE #1

AND
CE NODE #2
AND
(four CE nodes, 4GB MEM total). MEMORY MEMORY
Reflex 200B, 400B, and 800 require PIM

4 4 (REAR SLOTS 2 & 3) P
installation of PIM across upper slots 2 and 2 AP BOARD (FRONT SLOT 2) S
3 on rear of MGD module. BRIDGE BOARD 21554
3 AP BOARD (FRONT SLOT 3) (REAR SLOT 8) DRAWBRIDGE
5 GOC AA Module in Forward Production
and Pre–EXCITE Upgrades.
6
WIM Module in GOC’s upgraded from
EXCITE.
EXCITE HD (12.x) MGD/RRF/RF SUBSYSTEM
(Forward Production & Upgrades)
MGD CHASSIS – HOST, RECEIVE, AND RECON FUNCTIONS
SHEET 1A OF 16
MGD/RRF/RF (1.5T) 1–1

GOC COMPUTER CABINET SYSTEM CABINET OR RFS CABINET

(OW1 A2)
MGD OR CAM CHASSIS
LINUX PC CAB
I/F TO SCP BOARD
PCI EXPANSION J63 16/24 PORT 10/100/1000 BASE T (SHT 2)
E–NET2 ETHERNET SWITCH TO AGP BOARD
(SHT 2)
DRF2 BOARD (MGD–FRONT SLOT 8, CAM–FRONT SLOT 4)

TERM 32 CHANNEL SYSTEM ONLY
SERVER
1 DRF2 BOARD (MGD–FRONT SLOT 7,CAM –FRONT SLOT 3)
(SHT 2) 2
APS FILTER ENGINE
GOC AUDIO ASM TO/FROM IRF I/O
(SHT 2) 3 SERIAL (CHANNEL 0)
5 WAVEFORM SERIAL DEBUG DSP FILTER ENGINES
NOTE 1 (SHT 2) 1 100MHz CHANNELS 1–15
TO/FROM STIF 4 320C6201–200
(FOR TPS RESET) SSRAM
(SHT 2) EMIF (128k x 32)
Serial DPR
COM1 RJ45 1 2 HPI 20MHz (4k x 32)
APS BOARD (FRONT SLOT 1)
L2 CACHE PPC
1MB
820
MEMORY TRANSCEIVERS & BUFFERS
32–128MB
TO GOC ENVIRONMENTAL SENSOR
USB TO 1–WIRE (EQUIPMENT ROOM)
CONVERTER RAVEN
E’NET
DEC 21140
4MB
FLASH 10/100Mb/s
DUAL
SERIAL PCI–GP BUS I/F CLK RECEIVER
SSP I/F
(PLX 9054, DIST I/F
CPLD & LOGIC
NVRAM
RTC PCI
NOTES:
Additional Signal/Cabling detail can be found under
Î Î ÎÎ ÎÎ Î
PCI to
2 – SYNC/ASYNC
Interconnects on the Service Methods CDROM.
OPTIONAL E’NET
ISA/IDE
BRIDGE J1 J2 J3 J4 J5
Î
ÎÎÎ
Î ÎÎ ÎÎ Î
DUAL USB
PCI to PCI
information: BRIDGE
Î
ÎÎÎ ÎÎ ÎÎ ÎÎÎÎÎÎÎÎ
Î Î
21154
RECEIVE DATA BUS
Î ÎÎ ÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ
(SHT 2)
SEQUENCE DATA BUS
ÎÎÎ
ÎÎÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎ
1
There are 16 Receive Channels on each J5 J4 J3 J2 J1 (SHT 2)
DRF2 Board. 32 Channel systems have 20MHZ CLOCK BUS
ÎÎÎÎ Î
(SHT 2)
two DRF2 boards.
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎ Î Î Î
2 Infiniband connection in 2 ICN System has PCI 1 64 BIT, 33 MHZ
two Infiniband cables connecting to 2 ICN
Modules.
Î
ÎÎÎÎ ÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î Î
ÎÎÎ ÎÎ Î
ÎÎÎ
Î Î
TO/FROM
3 Infiniband connection in 32 Channel AGP INTERNAL PCI
ÎÎ
ÎÎ Î Î Î
system has 1 Infiniband cable connecting 64 BIT, 33MHZ
(SHT 2)
to Infiniband Switch. TO ICN#1
Î
J2 J1
4 PORT 1
OR 3 P1
GOC AA Module in Forward Production INFINIBAND J5 J4 J3 J2 J1
5 SWITCH P1
and Pre–EXCITE Upgrades. SHT 1C
TO ICN#2 PS
PORT 1 2 P2 21554
DRAWBRIDGE
SHT 1C INFINIBAND BOARD (SLOT 2) BRIDGE BOARD
(MGD–REAR SLOT 8)
(CAM–FRONT SLOT 5)
HDx (14.x) & HDxt (1.5.x, 16.x or Later) MGD/RRF/RF SUBSYSTEM

(Forward Production & Upgrades)
MGD CHASSIS – HOST, RECEIVE, AND RECON FUNCTIONS
SHEET 1B OF 16

SYSTEM CABINET OR RFS CABINET SYSTEM OR RFS CABINET

FROM INFINIBAND
PORT 1 AC
SHT 1B Distribution
16 PORT
ETHERNET 24 PORT
SWITCH Port 1
ETHERNET
Port 2 Port 2
SWITCH
ICN
MODULE 1
ICN ICN
MODULE 2 MODULE 1 32 CHANNEL CABINET
Port 2 Port 2
Port 1 Port 1
Port 1
1
Port 2
ICN
MODULE 3
ICN J6
MODULE 2
AC
Distribution
Port 1 Module ICN
MODULE 4
FROM INFINIBAND
PORT 2
SHT 1B INFINIBAND Port 2 AC
VRE WITH 2 ICN CONFIGURATION SWITCH Distribution
Port 1
P2
P3
NOTES:
Additional Signal/Cabling detail can be found under 1 P5
Other connections to 16/24 port Ethernet P4
Interconnects on the Service Methods CDROM. FROM INFINIBAND
Switch on sheet 1B. PORT 1 P1
information: SHT 1B
VRE WITH 4 ICN CONFIGURATION WITH INFINIBAND SWITCH
RFS CABINET SYSTEM CABINET OR RFS CABINET SYSTEM OR RFS CABINET

FROM AC
FROM 16 PORT Distribution
16 PORT INFINIBAND
INFINIBAND ETHERNET
ETHERNET PORT 1
PORT 1 SWITCH Port 1 SWITCH Port 1 24 PORT
SHT 1B ETHERNET
SHT 1B
ICN SWITCH
ICN Port 2 Port 2
MODULE 1 MODULE 1
J7
J1
ICN ICN 32 CHANNEL CABINET
Port 2 MODULE 2 MODULE 1
1 J2 J8 Port 2
1 Port 2 Port 1 Port 1
Power Port 1
Distribution
Module
J1 J7 ICN
MODULE 2 ICN
J11 J11 MODULE 3
Power
Distribution
Module Port 1
ICN
FROM MODULE 4
INFINIBAND
VRE WITH 1 ICN CONFIGURATION VRE WITH 2 ICN CONFIGURATION
PORT 2 Port 2 AC
CONTAINING 5127452–3, SHT 1B
CONTAINING 2 5127452–3 ICNS Distribution
5337894–3, or 5337894–4, Port 1
5911000–4 or 5911000–5 ICN
FROM INFINIBAND FROM INFINIBAND
HDx (14.x) & HDxt (15.x, 16.x or Later) MGD/RRF/RF SUBSYSTEM PORT 2 PORT 1
(Forward Production & Upgrades) SHT 1B SHT 1B
VOLUME RECON ENGINE
SHEET 1C OF 16 VRE WITH 4 ICN CONFIGURATION WITHOUT INFINIBAND SWITCH

MGD OR CAM CHASSIS

GIGALINK CHNS 25–32
TEST POINTS
TO 5
32 CHANNEL CABINET
GIGALINK CHNS 17–24 +3.3VDC +5VDC +12VDC –12VDC GND
J309 5
SHT 3C
FROM/TO DEBUG TO HOST
SYSTEM CABINET SHT 1A OR 1B
ETHERNET SWITCH
SHT 1A OR 1B GIGALINK SRF/TRF BOARD (MGD–FRONT SLOTS 13–14, CAM–FRONT SLOTS 10–11)
”GIGALINK” FIBERLINK RF EXCITE COMMANDS, RCV DATA CHNS 9–16
TO/FROM RF DIF2 SRF RF SEQUENCE SSP/GRAD
RJ45 RJ45
CLOCK SYSTEM TX0 RX1
SHT 3B 3 SOURCE RESET GENERATION RX0 TX1 SEQUENCE SCP3 BD
DEBUG TO HOST DSP TX1 RX0 DSPGENERATION THRU–LINE
SHT 1A OR 1B
J6 WARP/WAM HPI 320C6201–200 (MGD– TERMINATOR
RX1 TX0 320C6201–200
COM1 RJ45 J7 J8 J9 4–DABOUTs LED SW PWR TP EMIF FRONT SLOT 12)
AGP BOARD HPI EMIF HPI EMIF
TMR0 (CAM–
(MGD–FRONT SLOT 10) IRF2 BD TMR1 GRAD SEQUENCER DATA FRONT SLOT 9)
(CAM–FRONT SLOT 6) (MGD–FRONT SLOT 11) RX0
CORRECTED GRAD/B0 DATA
(CAM–FRONT SLOT 7) DSP
TX0
TX1 SDRAM SDRAM PMC1 CAN
320C6701–166RX1 TO/FROM
L2 CACHE PPC 4M x 32 4M x 32 SLOT CARD
(SLOT 2) RF–DIF BOARD
1MB 750 MEZZANINE HPI J22
HPI
SMC 0
SPU SHT 3A,3B OR 3C
EMIF
4MB MEMORY TMR0/1 SPU TRIGGERS
FLASH 32–128MB DPR DPR
PCI–GP 4K x 32 4K x 32
BUS I/F TX0 SAMPLED GRAD DATA
SEQ BUS RX0 INTERNAL PCI
(PLX 9045, PAC SYNC DATA
I/F CPLD & LOGIC) DSP TX1/RX1
RAVEN E’NET MPC860T
& DECODE 320C6701–166 DPR
DPR
DEC 21140 4K x 32 1 4–SCCs
10/100Mb/s MONITOR MEM 2–SMCs
NVRAM REMOTE STATUS I/F 1–10/100bT
RTC DUAL RF DPR
SERIAL RCVR DUART 4K x 32
PCI I/F SYNCHRONIZER BUFFERS
PCI TO BUS
SDRAM
2 – SYNC/ASYNC
ISA/IDE OUTPUT
2–DIRECT SEQ. TRIGGERS

OPTIONAL E’NET
TEMP
SPU EXTERNAL TRIGGER

4M x 32 PCI to PCI
4 – DABOUTs
BRIDGE MON SPU WAVEFORM I/F
SSP I/F OUT

BRIDGE
PCI to PCI 21554
DUAL USB
PAC SYNC DATA

AUX SERIAL I/F
LINE TRIGGER
BRIDGE
CLK GEN
21154 HPI_ctrl mem_if
Î ÎÎ
& DIST.
PCI–GP Bus I/F
(PLX 9054,
Î
ÎÎ ÎÎ
Î ÎÎ ÎÎÎ Î Î
ÎÎÎÎ ÎÎ
Î ÎÎ
CPLD AND LOGIC J5 J4 J3 J2 J1
CLK
DIST
Î ÎÎ
Î ÎÎ ÎÎÎ Î ÎÎ
Î ÎÎ ÎÎÎÎ
J5 J4 J3 J2 J1 J5 J4 J3 J2 J1
RECEIVE DATA BUS

ÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î ÎÎ ÎÎÎ Î ÎÎ Î ÎÎ ÎÎÎ
ÎÎ
RECEIVE DATA BUS
ÎÎ J5 J4 J3 J2 J1
ÎÎ Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎ ÎÎÎ Î ÎÎ Î ÎÎ ÎÎÎ
ÎÎÎ ÎÎ
SHT 1A OR 1B
SEQUENCE DATA BUS SEQUENCE DATA BUS
SEQUENCE DATA BUS
ÎÎ Î ÎÎ ÎÎ ÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î ÎÎ ÎÎ
Î ÎÎ
SHT 1A OR 1B
20MHZ CLOCK BUS 20MHZ CLOCK BUS
20MHZ CLOCK BUS SPU
ÎÎ
ÎÎÎÎÎÎ
Î ÎÎ Î
SHT 1A OR 1B WAVEFORM I/F
TO/FROM
ÎÎ ÎÎ Î
AGP INTERNAL cPCI_2 64 BIT, 33 MHZ cPCI_2 64 BIT,
PCI 64 BIT, WAVEFORM 33 MHZ
ÎÎ Î
33 MHZ PC SERIAL
SHT 1A OR 1B
J5 J4 J3 J5 J4 J3
NOTES: IRF I/O BOARD STIF BOARD
(MGD–REAR SLOT 11) (MGD–REAR SLOT 13–14)
SPU EXT. TRIG

SYS RESET
HOST SERIAL
EXT SEQ TRIG1
EXT SEQ TRIG2

Refer to following Block Diagrams for
4 – DAB OUTs
AUX SERIAL
HIGHSPEED
AC LINE TRIG
MEASURE I/O
RECEIVER
SERIAL I/F
SCB BUS
MDS FIBER
MDS FIBER
SSP OUT
(CAM–REAR SLOT 7)
TO SYNC
BUS TAP
additional information: (CAM–REAR SLOT 10–11)
SRI RESET
ASYNC
RM–RF
ASYNC
SRI FIBER
SRI FIBER
TEMP
WARP
TO SYNC
1)GRADIENT PAC
SEQ BUS DECODE
FIBER
2)PATIENT HANDLING
1 This connection not used for J21 J22 J20 J23 J9 J10 J3 J12 J13 J14 J11 J4 J1 J2 J8 J5 J6 J7 J20 J21 J18 J19 J16 J15 J17
Forward Production Systems. RS–422
GRAD
CLOCK
10 MHZ
GDAT CLK
CHNS 1–8
GIGALINK
RXD MDS
TXD MDS
RXD PAC
TXD PAC
J10
RXD SRI
TXD SRI
RST SRI
Does not pass through I/F panel,
GDAT Y
GDAT X
GDAT Z
2 TEMP AC DIST
WAVE
HOST
TO DRIVER MODULE J4 SENSOR PANEL
SMC
connects directly to Term Server SHT 5A, 5B, 5C, OR 5D

Port 4.
”GIGA LINK” FIBERLINK
3 This Fiber Optic cable only TO/FROM RF DIF1
RF EXCITE COMMANDS, RCV DATA
FIBER OPTIC REPEATER
present on systems with 16 SHT 3A AND 3B
(PP1A17A1)
Channels. SYSTEM CABINET I/F J26 J25 J125 J23 J15 J17 J17 J17 J17 LINE TRIGGER J17 J16 J13 J13 J13 J13 J13
JUMPER TEST
2
(MR2 A15) LOOPBACK
4 Only present on Forward J24
VCC TO PAC BD
Production systems. TO/FROM J7 RCVR XMIT J1 MG2 A11 A1 J1/J9
WIM OR GOC AA SHT 10
These fibers only present on WAVEFORM SERIAL TO/FROM FROM TO J11 RCVR XMIT J5
TO SRI BD NOTE 2
MUX
5 NOTE 1
systems with 32 channels. (SHT 1A OR 1B) PDU RF DOOR
SWITCH
MAGNET MONITOR J9 RCVR XMIT J3
TO SRI BD NOTE 2
TO/FROM TO GRADIENT CABINET J10 J4
RF CABINET XMIT RCVR FROM SRI BD NOTE 2
EXCITE HD (12.x), HDx (14.x) & HDxt (15.x) MGD/RRF/RF SUBSYSTEM 1
SHT 6 OR 7B
NOTE 1
J8 XMIT RCVR J2
FROM PAC BD
TERM SERVER PORT 4 1 FROM RF CABINET
MGD CHASSIS – SEQUENCE SEGMENT 4 TO PHPS J32 SHT 1A OR 1B SHT 6 OR 7B MG2 A11 A1 J1/J10
SHEET 2A OF 16 SHT 10

GIGALINK FIBERLINK MGD OR CAM CHASSIS RF EXCITE COMMANDS, RCV DATA GIGALINK CHNS 9–16
TO/FROM RRF–DIF3 SLOT 1F J21
SHT 3B TEST POINTS
GIGALINK FIBERLINK RF EXCITE COMMANDS, RCV DATA GIGALINK CHNS 1–8 +3.3VDC +5VDC +12VDC –12VDC GND
SHT 3A AND 3B
ETHERNET SWITCH
SHT 1A OR 1B SRF/TRF BOARD (MGD–FRONT SLOTS 13–14, CAM–FRONT SLOTS 10–11)
”GIGALINK” FIBERLINK
F/O 20 MHZ CLOCK CABLE

SRF RF SEQUENCE SSP/GRAD
RJ45 RJ45
4–DABOUTs
TO/FROM RF DIF3 CLOCK SYSTEM TX0 RX1
SLOT 10F CLK SOURCE RESET GENERATION RX0 TX1 SEQUENCE SCP3 BD
SHT 3A OR 3B DSP TX1 RX0 DSPGENERATION THRU–LINE
RX1 TX0 320C6201–200
DEBUG TO HOST J6 J8 J10 J11 LED SW PWR TP EMIF FRONT SLOT 12)
SHT 1A OR 1B HPI EMIF HPI EMIF
COM1 RJ45 TMR0 (CAM–
AGP BOARD IRF2 BD TMR1 GRAD SEQUENCER DATA FRONT SLOT 9)
(MGD–FRONT SLOT 10) (MGD–FRONT SLOT 11) RX0
(CAM–FRONT SLOT 6) (CAM–FRONT SLOT 7) DSP
TX0
320C6701–166RX1 TO/FROM
(SLOT 2) RF–DIF3 BD
HPI
SMC 0
SPU SHT 3B
EMIF
DPR
DEC 21140 4K x 32 1 4–SCCs
RTC DUAL RF DPR
PCI TO BUS
SDRAM
2 – SYNC/ASYNC
ISA/IDE OUTPUT

OPTIONAL E’NET
TEMP

4M x 32 PCI to PCI
4 – DABOUTs
SSP I/F OUT

BRIDGE
PCI to PCI 21554
DUAL USB
PAC SYNC DATA

AUX SERIAL I/F
LINE TRIGGER
BRIDGE
CLK GEN
& DIST.
Î ÎÎ
PCI–GP Bus I/F
(PLX 9054,
Î
ÎÎ ÎÎ
ÎÎÎÎ ÎÎ
Î ÎÎ
CLK
J5 J4 J3 J2 J1 J5 J4 J3 J2 J1 DIST
ÎÎ Î ÎÎ
Î ÎÎ ÎÎ
ÎÎ
ÎÎ ÎÎ
RECEIVE DATA BUS
RECEIVE DATA BUS J5 J4 J3 J2 J1
ÎÎ Î
ÎÎ ÎÎ ÎÎ Î ÎÎ ÎÎÎ
ÎÎÎ ÎÎ
SHT 1A OR 1B
SEQUENCE DATA BUS
Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î ÎÎ ÎÎ
Î ÎÎ
SHT 1A OR 1B
20MHZ CLOCK BUS SPU
TO/FROM
ÎÎ
ÎÎÎÎÎÎ ÎÎ Î
ÎÎ Î
33 MHZ
ÎÎ Î
PC SERIAL
SHT 1A OR 1B
J5 J4 J3 J5 J4 J3
NOTES: IRF I/O2 BOARD STIF BOARD
SPU EXT. TRIG

SYS RESET
HOST SERIAL
EXT SEQ TRIG1
EXT SEQ TRIG2

4 – DAB OUTs
AUX SERIAL
AC LINE TRIG
MEASURE I/O
RECEIVER
SCB BUS
MDS FIBER
MDS FIBER
SSP OUT
(CAM–REAR SLOT 7)
TO SYNC
BUS TAP
SRI RESET
ASYNC
ASYNC
SRI FIBER
SRI FIBER
TEMP
WARP
TO SYNC
1)GRADIENT PAC
SEQ BUS DECODE
FIBER
2)PATIENT HANDLING
1 This connection not used for J21 J22 J23 J9 J10 J3 J12 J13 J14 J11 J4 J1 J2 J8 J5 J6 J7 J20 J21 J18 J19 J16 J15 J17
Forward Production Systems.
RS–422
GRAD
CLOCK
10 MHZ
GDAT CLK
RXD MDS
TXD MDS
RXD PAC
TXD PAC
J10
RXD SRI
TXD SRI
RST SRI
GDAT Y
GDAT X
GDAT Z
2 TEMP AC DIST
WAVE
HOST
SMC

Port 4.
3 This Fiber Optic cable only FIBER OPTIC REPEATER
present on systems with 16 (PP1A17A1)
Channels. SYSTEM CABINET I/F J26 J25 J125 J23 J15 J17 J17 J17 J17 LINE TRIGGER J17 J16 J13 J13 J13 J13 J13
JUMPER TEST
2
(MR2 A15) LOOPBACK
VCC TO PAC BD
WAVEFORM SERIAL TO/FROM FROM TO J11 RCVR XMIT J5
TO SRI BD NOTE 2
MUX
(SHT 1A OR 1B) PDU RF DOOR NOTE 1 MAGNET MONITOR J9 RCVR XMIT J3
TO SRI BD NOTE 2
HDxt (16.x) MGD/RRF/RF SUBSYSTEM TO/FROM
RF CABINET
SWITCH
TO GRADIENT CABINET J10 XMIT RCVR J4
FROM SRI BD NOTE 2
1 NOTE 1
IRF2b & RRF–DIF3 Hardware Configuration SHT 6 OR 7B
TERM SERVER PORT 4
J8 XMIT RCVR J2
FROM PAC BD
1 FROM RF CABINET
MGD CHASSIS – SEQUENCE SEGMENT 4 TO PHPS J32 SHT 1A OR 1B SHT 6 OR 7B MG2 A11 A1 J1/J10
SHEET 2B OF 16 SHT 10

GIGALINK FIBERLINK MGD OR CAM CHASSIS RF EXCITE COMMANDS, RCV DATA GIGALINK CHNS 9–16
SHT 3B TEST POINTS
GIGALINK FIBERLINK RF EXCITE COMMANDS, RCV DATA GIGALINK CHNS 1–8 +3.3VDC +5VDC +12VDC –12VDC GND
SHT 3A AND 3B
ETHERNET SWITCH
SHT 1A OR 1B SRF/TRF BOARD (MGD–FRONT SLOTS 13–14, CAM–FRONT SLOTS 10–11)
”GIGALINK” FIBERLINK
F/O 20 MHZ CLOCK CABLE

SRF RF SEQUENCE SSP/GRAD
RJ45 RJ45
4–DABOUTs
TO/FROM RF DIF3 CLOCK SYSTEM TX0 RX1
SLOT 10F CLK SOURCE RESET GENERATION RX0 TX1 SEQUENCE SCP3 BD
SHT 3A OR 3B DSP TX1 RX0 DSPGENERATION THRU–LINE
RX1 TX0 320C6201–200
DEBUG TO HOST J6 J8 J10 J11 LED SW PWR TP EMIF FRONT SLOT 12)
SHT 1A OR 1B HPI EMIF HPI EMIF
COM1 RJ45 TMR0 (CAM–
AGP BOARD IRF2 BD TMR1 GRAD SEQUENCER DATA FRONT SLOT 9)
(MGD–FRONT SLOT 10) (MGD–FRONT SLOT 11) RX0
(CAM–FRONT SLOT 6) (CAM–FRONT SLOT 7) DSP
TX0
320C6701–166RX1 TO/FROM
(SLOT 2) RF–DIF3 BD
HPI
SMC 0
SPU SHT 3B
EMIF
DPR
DEC 21140 4K x 32 1 4–SCCs
RTC DUAL RF DPR
PCI TO BUS
SDRAM
2 – SYNC/ASYNC
ISA/IDE OUTPUT

OPTIONAL E’NET
TEMP

4M x 32 PCI to PCI
4 – DABOUTs
SSP I/F OUT

BRIDGE
PCI to PCI 21554
DUAL USB
PAC SYNC DATA

AUX SERIAL I/F
LINE TRIGGER
BRIDGE
CLK GEN
Î ÎÎ
& DIST.
PCI–GP Bus I/F
(PLX 9054,
Î
ÎÎ ÎÎ
ÎÎÎÎ ÎÎ
Î ÎÎ
CLK
DIST
Î ÎÎ
Î ÎÎ ÎÎÎÎ
J5 J4 J3 J2 J1 J5 J4 J3 J2 J1
RECEIVE DATA BUS

ÎÎ
ÎÎ
RECEIVE DATA BUS
ÎÎ J5 J4 J3 J2 J1
ÎÎ Î
ÎÎ ÎÎÎ Î ÎÎ Î ÎÎ ÎÎÎ
ÎÎÎ ÎÎ
SHT 1A OR 1B
SEQUENCE DATA BUS
Î ÎÎ ÎÎ
Î ÎÎ
SHT 1A OR 1B
20MHZ CLOCK BUS SPU
ÎÎ
ÎÎÎÎÎÎ
Î ÎÎ Î
TO/FROM
ÎÎ ÎÎ Î
ÎÎ Î
33 MHZ PC SERIAL
SHT 1A OR 1B
J5 J4 J3 J5 J4 J3
NOTES: IRF I/O2 BOARD STIF BOARD
SPU EXT. TRIG

SYS RESET
HOST SERIAL
EXT SEQ TRIG1
EXT SEQ TRIG2

4 – DAB OUTs
AUX SERIAL
AC LINE TRIG
MEASURE I/O
RECEIVER
SCB BUS
MDS FIBER
MDS FIBER
SSP OUT
(CAM–REAR SLOT 7)
TO SYNC
BUS TAP
SRI RESET
ASYNC
ASYNC
SRI FIBER
SRI FIBER
TEMP
WARP
TO SYNC
1)GRADIENT PAC
SEQ BUS DECODE
FIBER
2)PATIENT HANDLING
1 This connection not used for J21 J22 J23 J9 J10 J3 J12 J13 J14 J11 J4 J1 J2 J8 J5 J6 J7 J20 J21 J18 J19 J16 J15 J17
Forward Production Systems. RS–422
GRAD
CLOCK
10 MHZ
GDAT CLK
RXD PAC
TXD PAC
J10
RXD SRI
TXD SRI
RST SRI
GDAT Y
GDAT X
GDAT Z
2 TEMP AC DIST
WAVE
HOST
SMC

Port 4.
3 This Fiber Optic cable only FIBER OPTIC REPEATER
present on systems with 16 (PP1A17A1)
Channels. SYSTEM CABINET I/F J26 J25 J125 J23 J50 J15 J17 J17 J17 J17 LINE TRIGGER J13 J13 J13 J13 J13
JUMPER TEST
2
(MR2 A15) LOOPBACK
VCC TO PAC BD
WAVEFORM SERIAL TO/FROM FROM TO J11 RCVR XMIT J5
TO SRI BD NOTE 2
MUX
(SHT 1A OR 1B) PDU 1 RF DOOR NOTE 1 MAGNET MONITOR J9 RCVR XMIT J3
TO SRI BD NOTE 2
HDxt (23.x) MGD/RRF/RF SUBSYSTEM TO/FROM
RF CABINET TO MNS J3
SWITCH
J10 XMIT RCVR J4
FROM SRI BD NOTE 2
1
IRF2b & RRF–DIF3 Hardware Configuration SHT 6 OR 7B SHT 14A OR 14C
TERM SERVER PORT 4
J8 XMIT RCVR J2
FROM PAC BD
MGD CHASSIS – SEQUENCE SEGMENT 4 TO PHPS J32 SHT 1A OR 1B MG2 A11 A1 J1/J10
SHEET 2C OF 16 SHT 10

TO/FROM RRF CHASSIS

MGD CHASSIS
IRF I/O BOARD J20 ”GIGA LINK” FIBER LINK
SHT 2
TO/FROM CAN I/F – 1
CAN ON SCP
SHT 2
DRIVER MODULE
SHT 5A, 5B, 5C & 5D
OR J23 J22 J21
ASC CHASSIS RF–DIF BOARD RX_Clock
UTNS Address/Data/Control
SHT 13 High–Speed
(FRONT SLOT RX_Data I/F Flag UTNS I/F
10 & 11) RX_Fiber Fiber– Rcvr Data Data
Optic TX_Data DTNS I/F
LEDs I/F Clock
Data
D RX DETECT TX_Fiber RCV 1–4
D TX READY Rcvr A Address/Control RCVR A I/F
Reset_n
D TX LCKD
RVCR B I/F RCV 5–8
D 20MHZ OK Control Rcvr B Address/Control
CAN
D 2.5V OK
D 3.3V OK CAN JTAG I/F CAN LED
Clock Exciter Clock
D CAN STAT D –1
D CAN ERR Exciter Address/Data/Control BUFFERS/
RCV 1–4 UNBLNK J17 Status/Rx Bus RCVRS
DDS and Sine Rho/Synth Data
RCV 5–8UNBLNK J18
TO Look up for
SYSTEM CABINET INVIEW J19 High Speed LED Master Exciter
I/F J24 EXC UNBLNK Service
OR J20 DAC
Rho/Theta or Omega Data
RFS CABINET LED I/F
I/F J24 DDS and Sine
(FOR MAGNET Rho/Synth Data BUFFERS/
Rho/Theta or Omega Data Look up for
MONITOR) Slave Exciter RCVRS
FROM J1
FRONT PANEL
I/O BOARD J1 J2 J3 J4 J5
SHT 4A
MIDPLANE RHO DATA, EXC CLK

UTNS DATA/ADDR/CNTRL SIGNALS FROM
EXC ADDR, SYNTH DATA, RHO DATA UTNS BOARD J5
EXC DATA, CNTRL SHT 4A
RCV 5–8 RCV 1–4
MUX CTL0–15 MUX CTL0–15 TO
MUX BOARD J2
SHT 4A
J1 J4 J3 J2 J4 J3 J2 J1 J2 J5 J4 J1
EXCITER2 BD
EXCITER BOARD – SLAVE (REAR SLOT 6 & 7) RECEIVER2 BD
(FUTURE OPTION 14 BIT @ 2.25MHZ BPF 5 MHZ 135 MHZ (REAR SLOT 10 & 11)
FOR SPECTRO) 20 MHZ DDS SAW FILTER SAW FILTER 135 MHZ 1MHZ (+/–250KHZ) LPF LPF RCVR 1–4 (IN)
(REAR SLOT 9) DAC 5MHZ LPF @ 141.7 MHZ @ 141.7 MHZ LPF AMP SAMPLE MIXER FROM
AMP LO OUT UTNS
14 CH1 DIGITAL BLANKING RCVR1 BOARD J7
1 #1
(SEE SHT 4G)

J7 ATTEN SWITCH SHT 4A
SERIES CH2
AMP 0–30dB, 3dB STEPS
144 MHZ AMP 150–270 MHZ #2 ADC LO1
VCXO COARSE TUNE J8 RCVR CH3
AMP OSCILLATOR 1–4
~ #3 CH4 RECEIVE CIRCUIT – CHANNEL 4 (SAME AS ABOVE)
RCVR4
EXT 1
141.7 MHZ ~ J9 LO4 J6
LO DR #4 1MHZ RCVR5
LO IN FROM SLAVE EXCITER J10 SAMPLE CH5
(SEE SHT 4G)

J11 J11 RECEIVE CIRCUIT – CHANNEL 5 (SAME AS ABOVE) LO5
SAW FILTER SAW FILTER CH6
DAC 5MHZ LPF @144MHZ @144MHZ 135MHZ LPF SWITCH RCVR 5–8 (IN)
AMP PWR ADC
14 DETECT PLD RCVR CH7 FROM
5–8 UTNS
14 BIT @ RCVR8 BOARD J7
CH8 RECEIVE CIRCUIT – CHANNEL 8 (SAME AS ABOVE) SHT 4A
20 MHZ DDS SERIES TX Out LO8 J7
TX Out LO 5–8 LO 13–16 AMP
J6 J7 J8 J9 J10
LED’s D LO DETECT D +5 VDC LED’s D LO PRESENT (1–4)
LO 1–4 LO 9–12 D MASTER D – 5VDC D RCVE UNBLANK (1–4)
TO MUX BOARD J11
SHT 4A OR 4B D 3.3 VDC D +15 VDC D LO PRESENT (5–8)
D –15 VDC D RCVE UNBLANK (5–8)
J6
LO1–4 (66.11 MHZ FOR 1.5T)
LO5–8 (66.11 MHZ FOR 1.5T) TO
MUX
BOARD J10
SHT 4A
EXCITE HD (12.x), HDx (14.x) & HDxt (15.x) MGD/RRF/RF SUBSYSTEM NOTE:
(4 and 8 Channel Systems)
RRF CHASSIS INTERCONNECT BLOCK DIAGRAM 1 OF 4
1 Slave Exciter is a future option for
SHEET 3A OF 16 Spectro.

RRF CHASSIS
TO/FROM 20 MHZ CLOCK CABLE
MGD CHASSIS
IRF2b BD J8
SHT 2B ”GIGA LINK” FIBER LINK

MGD CHASSIS
IRF2b BD J10
SHT 2B CAN I/F – 2
TO/FROM
CAN ON SCP J23 J22 J21 CLK
SHT 2 RF–DIF BOARD RX_Clock
UTNS Address/Data/Control
High–Speed
TO/FROM (FRONT SLOT RX_Data I/F Flag UTNS I/F
DRIVER MODULE 10 & 11) RX_Fiber Fiber–
SHT 5A, 5B, 5C & 5D
Rcvr Data Data
OR LEDs I/F Data
ASC CHASSIS Clock
SHT 13 Rcvr A Address/Control RCVR A I/F
D TX READY
Reset_n
D TX LCKD
RVCR B I/F RCV 5–8
CAN
D 2.5V OK
Clock Exciter Clock
D CAN STAT D –1
D CAN ERR Exciter Address/Data/Control BUFFERS/
RCV 1–4 UNBLNK J17 Status/Rx Bus RCVRS
RCV 5–8UNBLNK J18
TO Look up for
SYSTEM CABINET INVIEW J19 High Speed LED Master Exciter
I/F J24 EXC UNBLNK Service
OR J20 DAC
Rho/Theta or Omega Data
RFS CABINET LED I/F
I/F J24 DDS and Sine
(FOR MAGNET Rho/Synth Data BUFFERS/
Rho/Theta or Omega Data Look up for
MONITOR) Slave Exciter RCVRS
FROM J1
FRONT PANEL
I/O BOARD J1 J2 J3 J4 J5
SHT 4A

UTNS DATA/ADDR/CNTRL SIGNALS FROM
EXC ADDR, SYNTH DATA, RHO DATA UTNS BOARD J5
EXC DATA, CNTRL SHT 4A
RCV 5–8 RCV 1–4
MUX CTL0–15 MUX CTL0–15 TO
MUX BOARD J2
SHT 4A
J1 J4 J3 J2 J4 J3 J2 J1 J2 J5 J4 J1
EXCITER2 BD
EXCITER BOARD – SLAVE (REAR SLOT 6 & 7) RECEIVER2 BD
(FUTURE OPTION 14 BIT @ 2.25MHZ BPF 5 MHZ 135 MHZ (REAR SLOT 10 & 11)
FOR SPECTRO) 20 MHZ DDS SAW FILTER SAW FILTER 135 MHZ 1MHZ (+/–250KHZ) LPF LPF RCVR 1–4 (IN)
(REAR SLOT 9) DAC 5MHZ LPF @ 141.7 MHZ @ 141.7 MHZ LPF AMP SAMPLE MIXER FROM
AMP LO OUT UTNS
14 CH1 DIGITAL BLANKING RCVR1 BOARD J7
1 #1
(SEE SHT 4G)

J7 ATTEN SWITCH SHT 4A
SERIES CH2
AMP 0–30dB, 3dB STEPS
144 MHZ AMP 150–270 MHZ #2 ADC LO1
VCXO COARSE TUNE J8 RCVR CH3
AMP OSCILLATOR 1–4
~ #3 CH4 RECEIVE CIRCUIT – CHANNEL 4 (SAME AS ABOVE)
RCVR4
EXT 1
141.7 MHZ ~ J9 LO4 J6
LO DR #4 1MHZ RCVR5
LO IN FROM SLAVE EXCITER J10 SAMPLE CH5
(SEE SHT 4G)

J11 J11 RECEIVE CIRCUIT – CHANNEL 5 (SAME AS ABOVE) LO5
SAW FILTER SAW FILTER CH6
DAC 5MHZ LPF @144MHZ @144MHZ 135MHZ LPF SWITCH RCVR 5–8 (IN)
AMP PWR ADC
14 DETECT PLD RCVR CH7 FROM
5–8 UTNS
14 BIT @ RCVR8 BOARD J7
CH8 RECEIVE CIRCUIT – CHANNEL 8 (SAME AS ABOVE) SHT 4A
20 MHZ DDS SERIES TX Out LO8 J7
TX Out LO 5–8 LO 13–16 AMP
J6 J7 J8 J9 J10
LED’s D LO DETECT D +5 VDC LED’s D LO PRESENT (1–4)
LO 1–4 LO 9–12 D MASTER D – 5VDC D RCVE UNBLANK (1–4)
TO MUX BOARD J11
SHT 4A OR 4B D 3.3 VDC D +15 VDC D LO PRESENT (5–8)
D –15 VDC D RCVE UNBLANK (5–8)
J6
LO1–4 (66.11 MHZ FOR 1.5T)
LO5–8 (66.11 MHZ FOR 1.5T) TO
MUX
BOARD J10
SHT 4A
\HDxt (16.x or Later) MGD/RRF/RF SUBSYSTEM NOTE:

IRF2b and RRF–DIF3 Hardware Configuration (8 Channel Systems)
RRF CHASSIS INTERCONNECT BLOCK DIAGRAM 2 OF 4
1 Slave Exciter is a future option for
SHEET 3B OF 16 Spectro.

RRF CHASSIS
”GIGA LINK” FIBER LINK
CAN I/F – 1
CAN I/F – 2 CAN I/F
TO/FROM
MGD CHASSIS
IRF I/O BD J20 J23 J22 J21
SHT 2 UTNS Address/Data/Control
RX_Clock
High–Speed UTNS I/F
TO/FROM 2ND ”GIGALINK” RX_Data I/F Flag
CAN ON SCP FIBERLINK J23 J22 J21 RX_Fiber Fiber– Rcvr Data Data
SHT 2 Optic TX_Data DTNS I/F
I/F Clock
Data
TO/FROM TX_Fiber
DRIVER MODULE Rcvr A Address/Control RCVR A I/F RCV 1–4
SHT 5A Reset_n
OR LEDs
RCV 1–4 UNBLNK J17 RVCR B I/F RCV 5–8
ASC CHASSIS Control Rcvr B Address/Control D RX DETECT
RCV 5–8UNBLNK J18 CAN
SHT 13 D TX READY
CAN JTAG I/F CAN LED D TX LCKD
INVIEW J19 Clock Exciter Clock
TO/FROM D –1 D 20MHZ OK
EXC UNBLNK Exciter Address/Data/Control
MGD CHASSIS J20 BUFFERS/ D 2.5V OK
IRF2 J7 Status/Rx Bus RCVRS D 3.3V OK
SHT 2 DDS and Sine Rho/Synth Data
D CAN STAT
RCV 1–4 UNBLNK J17 Look up for D CAN ERR
High Speed LED Master Exciter
RCV 5–8UNBLNK J18 Service
DAC
INVIEW J19 Rho/Theta or Omega Data
LED I/F
TO EXC UNBLNK DDS and Sine
J20 Rho/Synth Data
SYSTEM CABINET Look up for BUFFERS/
Rho/Theta or Omega Data RCVRS
I/F J24 Slave Exciter RRF–DIF BOARD
OR FROM
RFS CABINET FRONT PANEL J1 (FRONT SLOT 10 & 11)
I/F J24 I/O BOARD J1 J2 J3 J4 J5
(FOR MAGNET SHT 4B OR 4C J1 RRF–DIF BOARD
MONITOR) (FRONT SLOT 1 & 2)
J2 J3 J4 J5

FROM UTNS BOARD J5
SHT 4C, 4D
EXC ADDR, SYNTH DATA, RHO DATA UTNS DATA/ADDR/CNTRL SIGNALS FROM UTNS BOARD J5
EXC DATA, CNTRL RCV 1–4 SHT 4B
MUX CTL0–15 MUX CTL0–15 TO MUX BOARD J2
SHT 4B, 4C, 4D
RCV 5–8
RCV 13–16 RCV 9–12
J1 J4 J3 J2 J4 J3 J2 J1 J2 J5 J4 J1
EXCITER2 BD RECEIVER2 BD
EXCITER BOARD – SLAVE (REAR SLOT 6 & 7) (REAR SLOT 1 & 2)
(FUTURE OPTION 14 BIT @ J2 J5 J4 J1
RCVR 9–12
(SEE SHT 4G)

FOR SPECTRO) 20 MHZ DDS RECEIVER2 BD (IN)
SAW FILTER SAW FILTER LPF
(REAR SLOT 9) DAC
AMP
AMP 2.25MHZ BPF 5 MHZ 135 MHZ (REAR SLOT 10 & 11) FROM
14 LO OUT 1MHZ (+/–250KHZ) LPF LPF UTNS
1 #1 SAMPLE BOARD J7
(SEE SHT 4G)

MIXER
J7 SHT 4D
SERIES CH1 DIGITAL BLANKING
RCVR1
144 MHZ AMP 150–270 MHZ #2 ATTEN SWITCH RCVR 1–4
VCXO COARSE TUNE J8 CH2 (IN)
AMP OSCILLATOR AMP 0–30dB, 3dB STEPS J6 FROM
ADC
~ #3 RCVR CH3
LO1 UTNS
EXT 1
141.7 MHZ ~ J9 1–4
CH4
RCVR4 J6
BOARD J7
SHT 4B
LO DR #4 RECEIVE CIRCUIT – CHANNEL 4 (SAME AS ABOVE) LO4
(SEE SHT 4G)

LO IN FROM SLAVE EXCITER J10
J11 J11 RCVR 13–16
1MHZ RCVR5 (IN)
(SEE SHT 4G)

SAW FILTER SAW FILTER SAMPLE CH5 RECEIVE CIRCUIT – CHANNEL 5 (SAME AS ABOVE) FROM
DAC LPF SWITCH LO5 UTNS
AMP PWR PLD BOARD J7
14 DETECT CH6
SHT 4D
ADC
14 BIT @ RCVR CH7 J7
20 MHZ DDS SERIES 5–8
TX Out LO 5–8 LO 13–16 AMP RCVR8
CH8 RCVR 5–8
J6 J7 J8 J9 J10 RECEIVE CIRCUIT – CHANNEL 8 (SAME AS ABOVE) J7 (IN)
LED’s D LO DETECT D +5 VDC 2 LO8
D MASTER D – 5VDC FROM
LO 1–4 LO 9–12 UTNS
TO MUX BOARD J11 D 3.3 VDC D +15 VDC
BOARD J7
SHT 4B D –15 VDC LO1–4 (66.11 MHZ FOR 1.5T) SHT 4B
TX Out
LO5–8 (66.11 MHZ FOR 1.5T)
J6
LO9–12 (66.11 MHZ FOR 1.5T)
LO13–16 (66.11 MHZ FOR 1.5T) TO
MUX
BOARD J10
SHT 4B
NOTE:
EXCITE HDx (12.x), HDx (14.x) & HDxt (15.x) MGD/RRF/RF SUBSYSTEM LED’s D LO PRESENT (1–4)
(16 Channel – Forward Production & Upgrades)

1 Slave Exciter is a future option for Spectro. 2 D
D
RCVE UNBLANK (1–4)
LO PRESENT (5–8)
D RCVE UNBLANK (5–8)
2nd RRF CHASSIS INTERCONNECT BLOCK DIAGRAM 3 OF 4
SHEET 3C OF 16

TO/FROM RRF CHASSIS 20 MHZ CLOCK CABLE

MGD CHASSIS
IRF2b BD J8 ”GIGA LINK” FIBER LINK
SHT 2B CAN I/F – 1
CAN I/F – 2 CAN I/F
TO/FROM
MGD CHASSIS
IRF2B BD J10 J23 J22 J21 CLK
SHT 2 UTNS Address/Data/Control
RX_Clock
TO/FROM 2ND ”GIGALINK” RX_Data I/F Flag
CAN ON SCP FIBERLINK J23 J22 J21 RX_Fiber Fiber– Rcvr Data Data
SHT 2 Optic TX_Data DTNS I/F
I/F Clock
Data
TO/FROM TX_Fiber
DRIVER MODULE Rcvr A Address/Control RCVR A I/F RCV 1–4
SHT 5A Reset_n
OR LEDs
ASC CHASSIS Control Rcvr B Address/Control D RX DETECT
SHT 13 D TX READY
CAN JTAG I/F CAN LED D TX LCKD
TO/FROM D –1 D 20MHZ OK
MGD CHASSIS J20 BUFFERS/ D 2.5V OK
IRF2B BD J11 Status/Rx Bus RCVRS D 3.3V OK
SHT 2 DDS and Sine Rho/Synth Data
D CAN STAT
RCV 1–4 UNBLNK J17 Look up for D CAN ERR
DAC
LED I/F
TO EXC UNBLNK DDS and Sine
J20 Rho/Synth Data
SYSTEM CABINET Look up for BUFFERS/
I/F J24 Slave Exciter RRF–DIF3 BOARD
OR FROM
RFS CABINET FRONT PANEL J1 (FRONT SLOT 10)
I/F J24 I/O BOARD J1 J2 J3 J4 J5
(FOR MAGNET SHT 4B OR 4C J1 RRF–DIF3 BOARD
MONITOR) (FRONT SLOT 1)
J2 J3 J4 J5

FROM UTNS BOARD J5
SHT 4C, 4D
EXC DATA, CNTRL RCV 1–4 SHT 4B
SHT 4B, 4C, 4D
RCV 5–8
RCV 13–16 RCV 9–12
J1 J4 J3 J2 J4 J3 J2 J1 J2 J5 J4 J1
EXCITER2 BD RECEIVER2 BD
EXCITER BOARD – SLAVE (REAR SLOT 6 & 7) (REAR SLOT 1 & 2)
(FUTURE OPTION 14 BIT @ J2 J5 J4 J1
RCVR 9–12
(SEE SHT 4G)

FOR SPECTRO) 20 MHZ DDS RECEIVER2 BD (IN)
(REAR SLOT 9) DAC
AMP
1 #1 SAMPLE BOARD J7
(SEE SHT 4G)

MIXER
J7 SHT 4D
RCVR1
ADC
~ #3 RCVR CH3
LO1 UTNS
EXT 1
141.7 MHZ ~ J9 1–4
CH4
RCVR4 J6
BOARD J7
SHT 4B
LO DR #4 RECEIVE CIRCUIT – CHANNEL 4 (SAME AS ABOVE) LO4
(SEE SHT 4G)

J11 J11 RCVR 13–16
1MHZ RCVR5 (IN)
(SEE SHT 4G)

14 DETECT CH6
SHT 4D
ADC
TX Out LO 5–8 LO 13–16 AMP RCVR8
CH8 RCVR 5–8
J6 J7 J8 J9 J10 RECEIVE CIRCUIT – CHANNEL 8 (SAME AS ABOVE) J7 (IN)
LED’s D LO DETECT D +5 VDC 2 LO8
LO 1–4 LO 9–12 UTNS
TO MUX BOARD J11 D 3.3 VDC D +15 VDC
BOARD J7
SHT 4B D –15 VDC LO1–4 (66.11 MHZ FOR 1.5T) SHT 4B
TX Out
LO5–8 (66.11 MHZ FOR 1.5T)
J6
LO9–12 (66.11 MHZ FOR 1.5T)
LO13–16 (66.11 MHZ FOR 1.5T) TO
MUX
BOARD J10
SHT 4B
NOTE:
HDxt (16.x or Later) MGD/RRF/RF SUBSYSTEM LED’s D LO PRESENT (1–4)
IRF2b & RRF–DIF3 Hardware Configuration (16 Channel – Forward Production & Upgrades)
1 Slave Exciter is a future option for Spectro. 2 D
D
LO PRESENT (5–8)
D RCVE UNBLANK (5–8)
RRF CHASSIS INTERCONNECT BLOCK DIAGRAM 1 OF 2B
SHEET 3D OF 16

2nd RRF CHASSIS

TO/FROM ”GIGA LINK” FIBER LINK
MGD CHASSIS
IRF2 BOARD J8
SHT 2
2ND ”GIGALINK”
TO/FROM FIBERLINK J23 J22 J21
MGD CHASSIS UTNS Address/Data/Control
IRF2 BOARD J9 RX_Clock
SHT 2 RX_Data I/F Flag
J23 J22 J21 RX_Fiber Fiber– Rcvr Data Data
LEDs I/F Clock
Data
D TX READY Rcvr A Address/Control RCVR A I/F
Reset_n
D TX LCKD
D 2.5V OK
D CAN STAT D –1
J20 D CAN ERR BUFFERS/
Status/Rx Bus RCVRS
RCV 1–4 UNBLNK J17 Look up for
DAC
LED I/F
EXC UNBLNK DDS and Sine
J20 Rho/Synth Data
Look up for BUFFERS/
Slave Exciter RF–DIF BOARD
J1 (FRONT SLOT 10 & 11)
J2 J3 J4 J5
J1 RF–DIF BOARD
(FRONT SLOTS 1 & 2)
J2 J3 J4 J5

FROM UTNS BOARD J5
SHT 4E ADN 4F
EXC DATA, CNTRL RCV 17–25 SHT 4E AND 4F
SHT 4E AND 4F
RCV 21–24
RCV 27–32 RCV 25–28
J4 J3 J2 J1 J2 J5 J4 J1
EXCITER2.1 BD RECEIVER2 BD
(REAR SLOT 6 & 7) (REAR SLOT 1 & 2)
14 BIT @ J2 J5 J4 J1
RCVR 25–28
(SEE SHT 4G)

20 MHZ DDS RECEIVER2 BD (IN)
DAC
AMP
#1 SAMPLE BOARD J7
(SEE SHT 4G)

MIXER
J7 SHT 4F
RCVR1
ADC
~ #3 RCVR CH3
LO1 UTNS
1
141.7 MHZ ~ J9 1–4
CH4
RCVR4 J6
BOARD J7
SHT 4E
#4 RECEIVE CIRCUIT – CHANNEL 4 (SAME AS ABOVE) LO4
(SEE SHT 4G)

J11 RCVR 29–32
1MHZ RCVR5 (IN)
(SEE SHT 4G)

14 DETECT CH6
SHT 4F
ADC
AMP RCVR8 RCVR 21–24
CH8 RECEIVE CIRCUIT – CHANNEL 8 (SAME AS ABOVE) J7
LED’s D LO DETECT D +5 VDC LO8 (IN)
2
D 3.3 VDC D +15 VDC UTNS
BOARD J7
D –15 VDC LO1–4 (66.11 MHZ for 1.5T) SHT 4E
TX Out
LO5–8 (66.11 MHZ for 1.5T)
J6
LO9–12 (66.11 MHZ for 1.5T)
LO13–16 (66.11 MHZ for 1.5T) TO
MUX
BOARD J10
SHT 4E OR 4F
HDx (14.x) & HDxt (1.5.x) MGD/RRF/RF SUBSYSTEM NOTE: LED’s D LO PRESENT (1–4)
(32 Channel – Forward Production & Upgrades) 2 D
D
LO PRESENT (5–8)
2nd RRF CHASSIS INTERCONNECT BLOCK DIAGRAM 1 OF 4C D RCVE UNBLANK (5–8)
SHEET 3E OF 16

RRF CHASSIS
MASTER EXCITER SLAVE EXCITER GENERAL BNC DAB

SERVICE OUTPUTS SERVICE OUTPUTS SERVICE OUTPUTS OUTPUTS
RHO/THETA/ RHO/THETA/ RHO/THETA/ RHO/THETA/ RF UNBLNK TO

OMEGA OMEGA OMEGA OMEGA SCOPE RF DISABLE RS–422 DRIVER MODULE J19
UNBLANK SERVICE DAC SELECT SWITCH UNBLANK SERVICE DAC SELECT SWITCH TRIGGER 10 MHZ REF SWITCH DABOUT 5 DABOUT 6 DABOUT 7 DABOUT 8 DABOUTS 1– 4 SHT 5A TO 5D
J9 J5 S1 J10 J6 S2 J7 J8 S3 J11 J12 J13 J14 J15 J16

FRONT PANEL I/O BOARD
(FRONT SLOT 4)
SERIAL ID PROM
J1 J4
FROM RF–DIF BOARD J1

SHT 3A MIDPLANE
FROM RF–DIF BOARD J5 UTNS DATA/ADDR/CNTRL SIGNALS
SHT 3A
FROM EXCITE BD– MUX CTL0–15

SLAVE J2
SHT 3A
FROM SLAVE EXCITER J6

SHT 3A OR 3B
SYSTEM
CABINET
I/F
J5 J4 J1 J2 J4 J1 TO
UTNS–III MUX BOARD RF SRFD OR
MASTER EXC OUT OUT J1 SRFD II
BOARD NOTCH NOTCH 8
(REAR SLOTS 13 & 14) J8 1 CABINET
(REAR ENABLE 1– PERIOD MASTER EXCITER IN
J10 SHT 6,7A,7B,7C
SLOT 12) SHOT CONTROL
Power SLAVE EXCITER IN
J11
V–THRESH J52
DAC LOG Divider SLAVE EXCITER OUT TO MNS CAB
1– AMP J9
SHOT HIGH 50 OHM For J3 SHT 14A,14C
MUX EXT OUT Loopback (OPTIONAL)
”INCREMENT” PASS J31 SMB J6
COMPARATOR FILTER
AMP FIRST GAIN STAGE TERM MUX EXT IN
J7
14.5 dB
16dB R1≥9 AMP SW1–8
SPECTRO IN
TO AMP 0.5dB (+15V PREAMP BIAS )
RCVR BD J6 CH1 “NOTCHING”
SHT 3A LC DELAY LINE ATTEN. RCVR 1 CH1–8 OUT SW1 J14
RF OUT m–WAVE BODY IN
15.5 dB m–WAVE (+15V PREAMP BIAS ) J202
ATTEN. BLANKING
50W SWITCH RCVR1 J13 FROM
R1≤8 Source PEN PANEL
Select J202 SHT 8A, 8B
RCVR 1–8 SW5
J7 FIRST GAIN STAGE J12 NAV IN
J15
14.5 dB
16dB R1≥9 AMP
(SEE SHT 4G)
(SEE SHT 4G)

CH2 AMP
RF OUT 0.5dB RCVR5 HEAD/MC1
ATTEN. RCVR 2 6 Source
LC DELAY LINE
m–WAVE Select
15.5 dB m–WAVE MC5 J200
ATTEN. BLANKING 6 FROM
TO MC 1–8 IN J5 16 CHANNEL
R1≤8 50W SWITCH
RCVR BD J7 MC 2–4 SWITCH
SW2–4
(SEE SHT 4G)

SHT 3A CH3 RCVR 3 MC 6–8 SHT 9A
”NOTCH CIRCUIT” – CHANNEL 3 (SAME AS CHANNEL 2) J6 SW 6–8
RF OUT
CH4 RCVR 4
”NOTCH CIRCUIT” – CHANNEL 4 (SAME AS CHANNEL 2)
RF OUT
CH5 RCVR 5
”NOTCH CIRCUIT” – CHANNEL 5 (SAME AS CHANNEL 2) J16 J17 J19
RF OUT
CH6 RCVR 6 MASTER RF SAMPLE SLAVE RF SAMPLE NAV RF OUT
RF OUT
CH7 RCVR 7
”NOTCH CIRCUIT” – CHANNEL 7 (SAME AS CHANNEL 2) 50Ω UTNS3 SPLITTER
RF OUT
CH8 RCVR 8
FROM RF OUT
EXCITER BD–
MASTER J6 MASTER EXC IN
SHT 3A & 3B
EXCITE HD (12.x), HDx (14.x) & HDxt (1.5.x, 16.x) MGD/RRF/RF SUBSYSTEM NOTE:
(4 and 8 Channel Systems) 1 J1 not present in RF System Cabinet.
RRF CHASSIS INTERCONNECT BLOCK DIAGRAM
SHEET 4A OF 16

RRF CHASSIS


UNBLANK SERVICE DAC SELECT SWITCH UNBLANK SERVICE DAC SELECT SWITCH TRIGGER 10 MHZ REF SWITCH DABOUT 5 DABOUT 6 DABOUT 7 DABOUT 8 DABOUTS 1– 4 SHT 5A, 5B, 5C, 5D

(FRONT SLOT 4)
SERIAL ID PROM
J1 J4

SHT 3A MIDPLANE
SHT 3B

SLAVE J2
SHT 3B

SHT 3A OR 3B
SYSTEM
CABINET
I/F
J5 J4 J1 J2 J4 J1
UTNS–III MUX BOARD RF TO
MASTER EXC OUT OUT J1 SRFD OR
BOARD NOTCH NOTCH 8
(REAR SLOTS 13 & 14) J8 1 SRFD II
J10 CABINET
SLOT 12) SHOT CONTROL SLAVE EXCITER IN SHT 6,7A,7B,7C
V–THRESH Power J11 J52
1– AMP J9
SHOT HIGH TO J7 MUX For J3 SHT 14A,14C
PASS J31 EXT IN ON J6
”INCREMENT” 2ND MUX
COMPARATOR FILTER
AMP SHT 4C MUX EXT IN
FIRST GAIN STAGE J7
14.5 dB
TO 16dB R1≥9 AMP SW1–8
RCVR BD J6 AMP SPECTRO IN
IN SLOTS CH1 0.5dB
“NOTCHING” (+15V PREAMP BIAS )
10 & 11 LC DELAY LINE ATTEN. RCVR 1 CH1–8 OUT SW1 J14
SHT 3B RF OUT m–WAVE
15.5 dB m–WAVE BODY IN J202
ATTEN. BLANKING (+15V PREAMP BIAS )
Select J202 SHT 8A,8B
RCVR 1–8 SW5
J15
14.5 dB
16dB R1≥9
(SEE SHT 4G)
AMP
(SEE SHT 4G)

CH10 AMP 0.5dB RCVR5
RF OUT 6 HEAD/MC1
LC DELAY LINE ATTEN. RCVR 2 Source
m–WAVE Select
TO ATTEN. BLANKING 6 MC 1–8 IN
RCVR BD J7 SWITCH J5 FROM
R1≤8 50W MC 2–4 16 CHANNEL
IN SLOTS SW2–4
(SEE SHT 4G)

10 & 11 CH3 RCVR 3 MC 6–8 SWITCH
”NOTCH CIRCUIT” – CHANNEL 3 (SAME AS CHANNEL 2) J6 SW 6–8 SHT 9A,9B,9C
SHT 3B RF OUT
CH4 RCVR 4
RF OUT
CH5 RCVR 5
RF OUT
RF OUT
TO J31 ON 2ND UTNS3 SPLITTER
CH7 RCVR 7
”NOTCH CIRCUIT” – CHANNEL 7 (SAME AS CHANNEL 2) UTNS3 BOARD
RF OUT SHT 4D
CH8 RCVR 8
RF OUT
FROM
EXCITER BD–
SHT 3B
EXCITE HD (12.x), HDx (14.x) & HDxt (1.5.x, 16.x) MGD/RRF/RF SUBSYSTEM NOTE:
(Channels 1–8 of 16 Channel – Forward Production & Upgrades) 1 J1 not present in RF System Cabinet.
SHEET 4B OF 16

RRF CHASSIS


UNBLANK SERVICE DAC SELECT SWITCH UNBLANK SERVICE DAC SELECT SWITCH TRIGGER 10 MHZ REF SWITCH DABOUT 5 DABOUT 6 DABOUT 7 DABOUT 8 DABOUTS 1– 4 SHT 5A TO 5D

(FRONT SLOT 4)
SERIAL ID PROM
J1 J4

SHT 3A MIDPLANE
SHT 3B

SLAVE J2
SHT 3B

SHT 3A OR 3B
SYSTEM
CABINET
I/F
J5 J4 J1 J2 J4 J1
UTNS–III MUX BOARD RF TO
MASTER EXC OUT OUT J1 SRFD OR
BOARD NOTCH NOTCH 8
(REAR SLOTS 13 & 14) J8 1 SRFD II
J10 CABINET
SLOT 12) SHOT CONTROL SLAVE EXCITER IN SHT 6,7A,7B,7C
V–THRESH Power J11 J52
1– AMP J9
SHOT HIGH TO J7 MUX For J3 SHT 14A,14C
”INCREMENT” 2ND MUX
COMPARATOR FILTER
AMP SHT 4D MUX EXT IN
FIRST GAIN STAGE J7
14.5 dB
TO 16dB R1≥9 AMP SW1–8
RCVR BD J6 AMP SPECTRO IN
IN SLOTS CH1 0.5dB
10 & 11 LC DELAY LINE ATTEN. RCVR 1 CH1–8 OUT SW1 J14
15.5 dB m–WAVE BODY IN J202
Select J202 SHT 8A OR 8B
RCVR 1–8 SW5
J15
14.5 dB
16dB R1≥9
(SEE SHT 4G)
AMP
(SEE SHT 4G)

CH10 AMP 0.5dB RCVR5
RF OUT 6 HEAD/MC1
LC DELAY LINE ATTEN. RCVR 2 Source
m–WAVE Select
TO ATTEN. BLANKING 6 MC 1–8 IN
RCVR BD J7 SWITCH J5 FROM
R1≤8 50W MC 2–4 16 CHANNEL
IN SLOTS SW2–4
(SEE SHT 4G)

10 & 11 CH3 RCVR 3 MC 6–8 SWITCH
”NOTCH CIRCUIT” – CHANNEL 3 (SAME AS CHANNEL 2) J6 SW 6–8 SHT 9C
SHT 3B RF OUT
CH4 RCVR 4 2
RF OUT J300
CH5 RCVR 5 TO 32 CHANNEL
”NOTCH CIRCUIT” – CHANNEL 5 (SAME AS CHANNEL 2) J16 J17 J19 CABINET J300
RF OUT SHT 4E
2
”NOTCH CIRCUIT” – CHANNEL 6 (SAME AS CHANNEL 2) J308
RF OUT
TO J31 ON 2ND UTNS3 SPLITTER FROM
CH7 RCVR 7 32 CHANNEL
”NOTCH CIRCUIT” – CHANNEL 7 (SAME AS CHANNEL 2) UTNS3 BOARD CABINET J308
RF OUT SHT 4 D SHT4E
CH8 RCVR 8
RF OUT
FROM
EXCITER BD–
SHT 3B
NOTE:
EXCITE HD (12.x), HDx (14.x) & HDxt (1.5.x, 16.x or Later) MGD/RRF/RF SUBSYSTEM
(Channels 1–8 of 32 Channel – Forward Production & Upgrades) 1
J1 not present in RF System Cabinet.
RRF CHASSIS INTERCONNECT BLOCK DIAGRAM 2 32 Channel systems only.
SHEET 4C OF 16

RRF CHASSIS


UNBLANK SERVICE DAC SELECT SWITCH UNBLANK SERVICE DAC SELECT SWITCH TRIGGER 10 MHZ REF SWITCH DABOUT 5 DABOUT 6 DABOUT 7 DABOUT 8 DABOUTS 1– 4 SHT 5A OR 5B

(FRONT SLOT 4)
SERIAL ID PROM
J1 J4

SHT 3A MIDPLANE
FROM 2ND RF–DIF BOARD J5 UTNS DATA/ADDR/CNTRL SIGNALS
SHT 3B

SLAVE J2
SHT 3B
FROM J6 MUX EXT

OUT ON 1ST MUX SYSTEM
SHT 4D CABINET
I/F
J5 J4 J1 J2 J4 J1
2ND UTNS–III MUX BOARD MASTER EXC OUT
BOARD NOTCH NOTCH 8
(REAR SLOTS 4 & 5) J8
J10
J11
V–THRESH
DAC LOG Divider SLAVE EXCITER OUT
1– AMP J9
SHOT HIGH 50 OHM For
MUX EXT OUT Loopback
PASS J31 J6
”INCREMENT”
FILTER
SMB
COMPARATOR AMP MUX EXT IN
FIRST GAIN STAGE J7
14.5 dB
TO 2ND AMP SPECTRO IN
RCVR BD J6 CH9 0.5dB TERM
IN SLOTS 1 & 2 LC DELAY LINE ATTEN. RCVR 9 CH9–16 OUT SW1 J14
15.5 dB m–WAVE BODY IN
50W SWITCH RCVR1 J13
R1≤8 Source
SW5
Select
FIRST GAIN STAGE RCVR 9–16 J12 NAV IN
J7 J15
14.5 dB
16dB R1≥9
(SEE SHT 4G)
CH10 AMP AMP

RF OUT
0.5dB RCVR5 MC9
LC DELAY LINE
m–WAVE Select
ATTEN. BLANKING J6 6 FROM
TO 2ND MC 9–16 IN J5
50W SWITCH 16 CHANNEL
R1≤8
(SEE SHT 4G)
RCVR BD J7 MC 10–12 SWITCH
(SEE SHT 4G)

IN SLOTS 1 & 2 CH11 RCVR 11 SW10–12 MC 14–16
SW14–16 SHT 9A, 9B, 9C
SHT 3B ”NOTCH CIRCUIT” – CHANNEL 11 (SAME AS CHANNEL 2)
RF OUT
CH12 RCVR 12
RF OUT
CH13 RCVR 13
RF OUT
FROM
RF OUT UTNS3 ANTENNA
RF SPLITTER
CH15 RCVR 15 SHT 4B
RF OUT
CH16 RCVR 16
RF OUT
(Channels 9–16 of 16 or 32 Channel – Forward Production & Upgrades)
SHEET 4D OF 16

2ND RRF CHASSIS

RHO/THETA/ RHO/THETA/ RHO/THETA/ RHO/THETA/

OMEGA OMEGA OMEGA OMEGA SCOPE RF DISABLE RS–422
UNBLANK SERVICE DAC SELECT SWITCH UNBLANK SERVICE DAC SELECT SWITCH TRIGGER 10 MHZ REF SWITCH DABOUT 5 DABOUT 6 DABOUT 7 DABOUT 8 DABOUTS 1– 4

(FRONT SLOT 4)
SERIAL ID PROM
J1 J4

SHT 3C MIDPLANE
SHT 3C

SLAVE J2
SHT 3C
32 CHANNEL
CABINET
I/F
J5 J4 J1 J2 J4 J1
BOARD NOTCH NOTCH 8
J10
J11
V–THRESH
1– AMP J9
SHOT HIGH TO J7 MUX For
”INCREMENT” 2nd MUX
COMPARATOR FILTER
AMP SHT 4F MUX EXT IN
FIRST GAIN STAGE J7
14.5 dB
RCVR BD J6 CH17 0.5dB
IN SLOTS 1 & 2 LC DELAY LINE ATTEN. RCVR 17 CH 17–24 OUT SW1 J14
SHT 3C RF OUT m–WAVE
R1≤8 Source
SW5
Select
J7 J15
14.5 dB
16dB R1≥9
(SEE SHT 4G)
CH18 AMP AMP

RF OUT
0.5dB RCVR5 HEAD/MC17
LC DELAY LINE J5
m–WAVE Select
15.5 dB m–WAVE MC21
(SEE SHT 4G)

J306 FROM 2ND
ATTEN. BLANKING J6 6 16 CHANNEL
TO 2ND MC 17–24 IN
R1≤8 50W SWITCH SWITCH
(SEE SHT 4G)
RCVR BD J7 MC 18–20
IN SLOTS 1 & 2 CH19 RCVR 19 SW2–4 SHT 9C
MC 22–24
SHT 3C ”NOTCH CIRCUIT” – CHANNEL 19 (SAME AS CHANNEL 18) SW6–8
RF OUT
CH20 RCVR 20
RF OUT
MASTER RF SAMPLE SLAVE RF SAMPLE NAV RF OUT J308 TO SYSTEM
CH21 RCVR 21 CABINET
RF OUT J308
SHT 4C
CH22 RCVR 22
”NOTCH CIRCUIT” – CHANNEL 22 (SAME AS CHANNEL 18) J300
RF OUT TO J31 ON 2ND UTNS3 SPLITTER UTNS3 SPLITTER TO SYSTEM
CABINET
CH23 RCVR 23 UTNS3 BOARD J300
”NOTCH CIRCUIT” – CHANNEL 23 (SAME AS CHANNEL 18) SHT 4F SHT 4C
RF OUT
CH24 RCVR 24
RF OUT
FROM
EXCITER BD–
SHT 3B
HDx (14.x) & HDxt (1.5.x) MGD/RRF/RF SUBSYSTEM

(Channels 17–24 of 32 Channel – Forward Production & Upgrades)
2nd RRF CHASSIS INTERCONNECT BLOCK DIAGRAM
SHEET 4E OF 16

2ND RRF CHASSIS

RHO/THETA/ RHO/THETA/ RHO/THETA/ RHO/THETA/

OMEGA OMEGA OMEGA OMEGA SCOPE RF DISABLE RS–422
UNBLANK SERVICE DAC SELECT SWITCH UNBLANK SERVICE DAC SELECT SWITCH TRIGGER 10 MHZ REF SWITCH DABOUT 5 DABOUT 6 DABOUT 7 DABOUT 8 DABOUTS 1– 4

(FRONT SLOT 4)
SERIAL ID PROM
J1 J4

SHT 3C MIDPLANE
SHT 3C

SLAVE J2
SHT 3C
FROM J6 MUX EXT

OUT ON 1ST MUX 32 CHANNEL
SHT 4E CABINET
I/F
J5 J4 J1 J2 J4 J1
BOARD NOTCH NOTCH 8
J10
J11
V–THRESH
1– AMP J9
SHOT HIGH 50 OHM For
”INCREMENT” PASS J31 SMB J6
COMPARATOR FILTER
AMP MUX EXT IN
FIRST GAIN STAGE J7
14.5 dB
RCVR BD J6 CH25 0.5dB TERM
IN SLOTS 1 & 2 LC DELAY LINE ATTEN. RCVR 25 CH25–32 OUT SW1 J14
SHT 3C RF OUT m–WAVE
R1≤8 Source
SW5
Select
J7 J15
14.5 dB
16dB R1≥9
(SEE SHT 4G)
CH26 AMP AMP

RF OUT
0.5dB RCVR5 M25
LC DELAY LINE
m–WAVE Select
ATTEN. BLANKING J6 6
TO 2ND MC 25–32 IN J5 FROM 2ND
R1≤8 50W SWITCH
(SEE SHT 4G)
RCVR BD J7 MC 26–28 16 CHANNEL
(SEE SHT 4G)

IN SLOTS 1 & 2 CH27 RCVR 27 SW2–4 MC 30–32 SWITCH
SHT 3C ”NOTCH CIRCUIT” – CHANNEL 27 (SAME AS CHANNEL 26) SW6–8 SHT 9C
RF OUT
CH28 RCVR 28
RF OUT
CH29 RCVR 29
RF OUT
FROM
RF OUT UTNS3 ANTENNA
RF SPLITTER
CH31 RCVR 31 SHT 4E
RF OUT
CH32 RCVR 32
RF OUT
HDx (14.x) & HDxt (1.5.x) MGD/RRF/RF SUBSYSTEM

(Channels 25–32 of 32 Channel – Forward Production & Upgrades)
SHEET 4F OF 16

RFS CABINET OR SYSTEM CABINET (MR2) PENETRATION PANEL (PP1)
J200 J201 J202

RRF CHASSIS RFS CABINET OR SYSTEM CABINET I/F PANEL
CH. 8 CH. 16 BODY IN

MUX BOARD UTNS–3 BOARD RECEIVER/
RECEIVER–2 BOARD J200 J201 J202 CH. 7 CH. 15 OPEN
CH. 6 CH. 14 OPEN

CH. 1 CH. 9 UTNS 3
J12 J6 J6 ANT. IN CH. 5 CH. 13 OPEN
2 2 2 CH. 2 CH. 10 OPEN CH. 4 CH. 12 OPEN
CH. 8/16, 24/32 CH. 8/16, 24/32 CH. 1/9, 17/25 CH. 3 CH. 11 OPEN CH. 3 CH. 11 OPEN
CH. 7/15, 23/31 CH. 7/15, 23/31 CH. 2/10, 18/26 CH. 4 CH. 12 OPEN CH. 2 CH. 10 OPEN
CH. 6/14, 22/30 CH. 6/14, 22/30 CH. 5 CH. 13 OPEN CH. 1 CH. 9 UTNS 3
CH. 5/13, 21/29 CH. 5/13, 21/29 Not Used CH. 6 CH. 14
ANT. IN
OPEN
CH. 4/12, 20/28 CH. 4/12, 20/28 CH. 7 CH. 15 OPEN
CH. 3/11, 19/27 CH. 3/11, 19/27 CH. 3/11, 19/27 CH. 8 CH. 16 BODY IN 2 2
CH. 2/10, 18/26 CH. 2/10, 18/26 CH. 4/12, 20/28 J56 J57
CH. 1/9, 17/25 CH. 1/9, 17/25 LO 1–4 or 9–12, 17–20 or 25–28
CH. 24 CH. 32
CH. 23 CH. 31
CH. 22 CH. 30
CH. 21 CH. 29
32 CHANNEL CABINET CH. 20 CH. 28
2
CH. 19 CH. 27
J5 J7 J7 32 CHANNEL CABINET I/F PANEL;
2 2 2 CH. 18 CH. 26
CH. 1/9, 17/25 CH. 1/9, 17/25 CH. 5/13 21/29 J306 J307 CH. 17 CH. 25
CH. 2/10, 18/26 CH. 2/1,0 18/26 CH. 6/14 22/30
CH. 17 CH. 25
CH. 3/11, 19/27 CH. 3/11, 19/27
CH. 18 CH. 26
CH. 4/12, 20/28 CH. 4/12, 20/28 Not Used
CH. 19 CH. 27
CH. 5/13, 21/29 CH. 5/13, 21/29
REAR PEDESTAL(MG3)
CH. 20 CH. 28
CH. 6/14, 22/30 CH. 6/14, 22/30 CH. 7/15 23/31
CABLE I/F (MG3 A17)
CH. 21 CH. 29
CH. 7/15, 23/31 CH. 7/15, 23/31 CH. 8/16 24/32
CH. 22 CH. 30 J4 1
CH. 8/16, 24/32 CH. 8/16, 24/32 LO 5–8 or 13–16 21–24 or 29–32
CH. 23 CH. 31
UTNS 3
CH. 24 CH. 32 ANT. IN
OPEN
OPEN
NOTE:
Depending on what slots boards are located in, each can OPEN
service either channels 1–8, 9–16, 17–24 or 25–32.. OPEN
OPEN
NOTES OPEN
:1
Located in Rear Pedestal, see Sht 8. BODY IN
EXCITE HD (12.x), HDx (14.x) & HDxt (1.5.x) MGD/RRF/RF SUBSYSTEM

2
32 Channel system only.
RRF RECEIVE CHAIN CONNECTIONS
SHEET 4G OF 16

SYS CAB
I/F
DRIVER MODULE J7 J1 J56 TO
DRIVER CONTROL BOARD Bi–Directional CAN Comm HFD CAB
CAN CORE BOARD
FAN +12 VDC TRDD Drive Pwr J11 (DAUGHTER CARD) DSP1 J7
AC–DC CAN COMM J2 J13 J6 J2
MULTIPLE –15 VDC TRDD Drive Pwr & MODULE Bi–Directional CAN Comm TO/FROM
J20 TS1 OUTPUT STATUS RRF CHASSIS
120 VAC CB1 POWER +/– 12 VDC Mixed Signal Pwr J2 J20 RF–DIF BD J23
SUPPLY J1 TO TR/DD BOARD (FUTURE) SHT 3A OR 3B
+/– 15 VDC Preamps & Aux Pwr
J12 J19
FAN + 24 VDC Isolated Network Driver TO MCD2 BOARD (FUTURE)
Power SYS CAB
+ 24 VDC For HV Supply MC Aux Pwr (+/– 15VDC) I/F
POWER Sense MC Preamp Pwr (+15VDC)
J4 J3 J62 TO
+/– 10VDC MC Drive Power J16 MANAGEMENT 16 Channel Switch & Power (+/–15VDC) 16 Channel Switch Control PEN PANEL
J15 J77
MC2 DRIVE POWER OUT SHT 9A,9B,9C
(FUTURE) High Speed Data I/F (FUTURE) J3 High Speed Data I/F J4
HV POWER + 24 VDC J10 TO IRF I/O BD J21
SUPPLY FPGA HV Disable, Serial ID FRONT PANEL SHT 2
J8 MC Disable Sw
J3 (DRIVER DD Disable Sw I/F BD Disable HV, TR,
SYS CAB
Cable Fault
Driver Control & Serial ID
I/F UDB Power J17 CONTROL) TR Disable Sw Switches DD, MC
Serial ID, Unblanks, Unblank Enable HV Disable Sw
TO SRFD J55 J6 Head T/R Bias Inhibit Unblank CCC Debug Port CCC Error,
CABINET J9 J8 J2 J21 CCC Status,
J53 J7 Body T/R Bias J1 CCC HRT,
SHT 6, 7A,
7B,,7C J10 J9 DCB HRT,
Unblank Enable, Cable Faults, Switches LEDs
J52 J8 MNS T/R Bias Module Error,
TO MNS J9 J10 Unblanks, DCB Inhibit ANALOG Serial ID, Debug Ports, Driver Fault,
SHT 14A LED Drive, +/– 12VDC, Debug Unblank MUXING Unblanks, LED Drive Unblank:
J44 J21 BD1 Serial ID 3.3VDC NB,BB,CW,
J92 TR–DD
DRIVER BD LOW PASS INHIBIT
J45 J22 BD2 DSP2 FILTERING
J93 Unblank TP1, TP2,
TO J46 J23 DD (DRIVER OUTPUT SPI, Unblank, Inhibit Unblank
Test Points TP3, GND
PEN J94 J2 MONITORING) Board Present, Cable Present
PANEL J47 J24 BD3 J21
HV FILTER J95 CCC De–Bug
J48 J25 BD4 J22 Port
J96 J15 J18 J9 J17 J19 DCB De–Bug
Port
UNBLANK DISTRIBUTION Cable Fault
SPARE J15 J15
BOARD
Not Used
MCD_SN
Self–ID
UPM NB1 J11 J11 J10 +12 V DC
Not Used –12 V DC
Vref
J3
J12 J12 CONTROL BOARD&CABLE_PRESENT_IN Reference
UPM NB2 Unblank of A Scaling
Not Used Unblanks, BOARD_PRESENT_OUT
Outputs
Unblank Enable, VREF1/2/3
MNS IF J13 J13 Inhibit Cable Sense,
CABLE_PRESENT_OUT
B
Buffer
Unblank Amps
Not Used LEDs
Inputs +3.3V DC V_IN_RCV
RFI/Amp IF J14 J14 Control 1
Not Used Sense 1
Driver Output 0
0
J3
SPARE J16 J16
Not Used SYS CAB
Serial ID, I/F 1
Status, Sense, Control 2
J17 J17
Driver Output 1 MC00–
SPARE Control, Power Sense 2 1 J2 MC15 J61 MC1–16
Not Used (+/– 12VDC, TO
Unblanks, EFBEN J18 J18 3.3VDC) PEN PANEL
SSM J5 J78
EFBEN SHT 9A,9B,9C
Unblank Control N
J19 J19 Driver Output N
FROM Inputs EFBEN Sense N N
FRONT PANEL
+10V_SENSE Sample, Scaling
I/O BOARD J16 CABLE_PRESENT_SEND
SHT 4A, 4B, & Invert
A
4C, 4D +10V_SENSE Sample &
Load
Loopback
Scaling B
Drive Power J1 +10V DC CABLE_PRESENT_RCV
SYSTEM CABINET I/F (MR2 A15) +/– 10VDC
J18 TO SRFD OR SRFD2 SSM J5 –10V DC 1
SHT 6 OR 7B NOTE: MC DRIVER BOARD 1 MC16–
MC DRIVER NUMBERING INSIDE THE
J66 MC17–32
DRIVER MODULE IS 0–15 AND 16–32.. J1 MC31
1
OUTSIDE NUMBERING IS 1–16 AND 17–32. J2 TO
MC DRIVER BOARD 2 PEN PANEL
EXCITE HD (12.x) MGD/RRF/RF SUBSYSTEM J10 J203
DRIVER MODULE (Upgrade with SSM) SHT 9A,9B,9C
SHEET 5A OF 16

DRIVER MODULE RFS

DRIVER CONTROL BOARD
CAN CORE BOARD CAB I/F
FAN +12 VDC TRDD Drive Pwr J11 (DAUGHTER CARD) DSP1 J7 J1 J56 TO
AC–DC CAN COMM Bi–Directional CAN Comm HFD CAB
MULTIPLE –15 VDC TRDD Drive Pwr & MODULE J7
J20 TS1 OUTPUT STATUS J2 J13 J6 J2
120 VAC CB1 POWER +/– 12 VDC Mixed Signal Pwr J2 Bi–Directional CAN Comm TO/FROM
SUPPLY ASC CHASSIS J2
+/– 15 VDC Preamps & Aux Pwr J1 SHT 13
J20 TO TR/DD BOARD (FUTURE)
FAN + 24 VDC Isolated Network J12
Driver J19 TO MCD2 BOARD (FUTURE)
+ 24 VDC For HV Supply POWER Power MC Aux Pwr (+/– 15VDC)
Sense MC Preamp Pwr (+15VDC)
+/– 10VDC MC Drive Power J16 MANAGEMENT J4 J3 TO
16 Channel Switch & Power (+/–15VDC) 16 Channel Switch Control
J15 PEN PANEL J77
MC2 DRIVE POWER OUT J3 J4 SHT 9A, 9B, 9C
(FUTURE) J10 High Speed Data I/F (FUTURE) High Speed Data I/F
HV POWER + 24 VDC TO IRF I/O BD J21
SUPPLY HV Disable, Serial ID SHT 2
J8 FPGA MC Disable Sw FRONT PANEL
Cable Fault
J17 Driver Control & Serial ID
UDB Power CONTROL) TR Disable Sw Switches DD, MC
J2 Inhibit Unblank CCC Debug Port CCC Error,
J21 J1 CCC Status,
CCC HRT,
J6 Head T/R Bias DCB HRT,
TO SRFD II J9 J8 Unblank Enable, Cable Faults, Switches LEDs
CABINET J7 Body T/R Bias Module Error,
J9 Unblanks, DCB Inhibit Serial ID, Debug Ports, Driver Fault,
SHT 7C J10 LED Drive, +/– 12VDC,
J8 MNS T/R Bias Debug Unblank Unblanks, LED Drive Unblank:
TO MNS J9 J10 Serial ID 3.3VDC NB,BB,CW,
SHT 14A LOW PASS ANALOG INHIBIT
J21 BD1 DSP2 FILTERING MUXING
J92 TR–DD SPI, Unblank, Inhibit Unblank Unblank TP1, TP2,
DRIVER BD (DRIVER OUTPUT Test Points TP3, GND
J22 BD2 MONITORING) Board Present, Cable Present
J93 J21
TO J23 DD CCC De–Bug
PEN J94 J2 J22 Port
PANEL J24 BD3 J15 J18 J9 J17 J19 DCB De–Bug
HV FILTER J95 Port
J25 BD4 Cable Fault
J96
MCD_SN
Self–ID
+12 V DC
Vref
–12 V DC
J3
BOARD&CABLE_PRESENT_IN Reference
A
J15 J15 UNBLANK DISTRIBUTION Scaling
SPARE BOARD_PRESENT_OUT
BOARD
Not Used CABLE_PRESENT_OUT VREF1/2/3 Buffer
B Amps
J11 UPM NB1 J11 J10
TO ASC CHASSIS +3.3V DC V_IN_RCV
SLOT 15, J3
CONTROL Control 1
J12 UPM NB2 J12 of Sense 1
Driver Output 0
TO ASC CHASSIS Unblank J3
0
SLOT 12, J3 Outputs Unblanks,
Unblank Enable,
J13 MNS IF J13 Inhibit Cable Sense, Serial ID,
TO ASC CHASSIS Unblank Status, Sense, Control 2 1
SLOT 6, J3 Inputs LEDs Driver Output 1 MC00–
Control, Power Sense 2 1 J2 MC15
J14 J14 MC1–16
RFI/Amp IF (+/– 12VDC,
TO ASC CHASSIS 3.3VDC) TO
SLOT 8, J3 J5 PEN PANEL
J16 J16 J78
SPARE SHT 9A, 9B, 9C
Not Used Control N
Driver Output N
Sense N N
J17 SPARE J17
Not Used +10V_SENSE Sample, Scaling
& Invert CABLE_PRESENT_SEND
J18 Unblanks, EFBEN J18 Load
A
SSM +10V_SENSE Sample & Loopback
Not Used EFBEN Scaling B
Drive Power J1
Unblank +/– 10VDC +10V DC CABLE_PRESENT_RCV
J19 Inputs J19 EFBEN
1
FROM –10V DC
FRONT PANEL MC DRIVER BOARD 1 MC16– MC17–32
I/O BOARD J16 MC31 TO
SHT 4A, 4B, 4C, 4D J1 J2
J10 J203
SHT 9A, 9B, 9C
EXCITE HD (12.x) MGD/RRF/RF SUBSYSTEM NOTE:
DRIVER MODULE (Forward Production, RFS Cabinet, no SSM) 1 DRIVER MODULE IS 0–15 AND 16–32..
OUTSIDE NUMBERING IS 1–16 AND 17–32.
SHEET 5B OF 16

SYS CAB
I/F
DRIVER MODULE J7 J1 J56 TO
DRIVER CONTROL BOARD Bi–Directional CAN Comm HFD CAB
CAN CORE BOARD
FAN +12 VDC TRDD Drive Pwr J11 (DAUGHTER CARD) DSP1 J7
AC–DC CAN COMM J2 J13 J6 J2
MULTIPLE –15 VDC TRDD Drive Pwr & MODULE Bi–Directional CAN Comm TO/FROM
J20 TS1 OUTPUT STATUS RRF CHASSIS
120 VAC CB1 POWER +/– 12 VDC Mixed Signal Pwr J2 J20 RF–DIF BD J23
SUPPLY J1 TO TR/DD BOARD (FUTURE) SHT 3A OR 3B
+/– 15 VDC Preamps & Aux Pwr
J12 J19
FAN + 24 VDC Isolated Network Driver TO MCD2 BOARD (FUTURE)
Power SYS CAB
+ 24 VDC For HV Supply MC Aux Pwr (+/– 15VDC) I/F TO
POWER Sense MC Preamp Pwr (+15VDC) PEN PANEL
J4 J3 J62
+/– 10VDC MC Drive Power J16 MANAGEMENT 16 Channel Switch & Power (+/–15VDC) 16 Channel Switch Control J77
SHT 9A,9B,9C
MC2 DRIVE POWER OUT J15
(FUTURE) High Speed Data I/F (FUTURE) J3 High Speed Data I/F J4
HV POWER + 24 VDC J10 TO IRF I/O BD J21
SUPPLY FPGA HV Disable, Serial ID FRONT PANEL SHT 2
J8 MC Disable Sw
SYS CAB
Cable Fault
Driver Control & Serial ID
I/F UDB Power J17 CONTROL) TR Disable Sw Switches DD, MC
TO SRFD Serial ID, Unblanks, Unblank Enable HV Disable Sw
J55 J6 Head T/R Bias Inhibit Unblank CCC Debug Port CCC Error,
CABINET J9 J8 J2 J21 CCC Status,
SHT 6,7A, J53 J7 Body T/R Bias J1 CCC HRT,
7B,7C J10 J9 DCB HRT,
Unblank Enable, Cable Faults, Switches LEDs
J52 J8 MNS T/R Bias Module Error,
TO MNS J9 J10 Unblanks, DCB Inhibit ANALOG Serial ID, Debug Ports, Driver Fault,
SHT 14A LED Drive, +/– 12VDC, Debug Unblank MUXING Unblanks, LED Drive Unblank:
J44 J21 BD1 Serial ID 3.3VDC NB,BB,CW,
J92 TR–DD
DRIVER BD LOW PASS INHIBIT
J45 J22 BD2 DSP2 FILTERING
J93 Unblank TP1, TP2,
TO J46 J23 DD (DRIVER OUTPUT SPI, Unblank, Inhibit Unblank
Test Points TP3, GND
PEN J94 J2 MONITORING) Board Present, Cable Present
PANEL J47 J24 BD3 J21
HV FILTER J95 CCC De–Bug
J48 J25 BD4 J22 Port
J96 J15 J18 J9 J17 J19 DCB De–Bug
Port
UNBLANK DISTRIBUTION Cable Fault
SPARE J15 J15
BOARD
Not Used
MCD_SN
Self–ID
UPM NB1 J11 J11 J10 +12 V DC
Not Used –12 V DC
Vref
J3
J12 J12 CONTROL BOARD&CABLE_PRESENT_IN Reference
UPM NB2 Unblank of A Scaling
Not Used Unblanks, BOARD_PRESENT_OUT
Outputs
Unblank Enable, VREF1/2/3
MNS IF J13 J13 Inhibit Cable Sense,
CABLE_PRESENT_OUT
B
Buffer
Unblank Amps
Not Used LEDs
Inputs +3.3V DC V_IN_RCV
RFI/Amp IF J14 J14 Control 1
Not Used Sense 1
Driver Output 0
0
J3
SPARE J16 J16
Not Used Serial ID, 1
Status, Sense, Control 2
J17 J17
Driver Output 1 MC00–
SPARE Control, Power Sense 2 1 J2 MC15 MC1–16
Not Used (+/– 12VDC, TO
Unblanks, EFBEN J18 J18 3.3VDC) PEN PANEL
SSM J5 J203
EFBEN SHT 9A, 9B, 9C
Unblank Control N
J19 J19 Driver Output N
FROM Inputs EFBEN Sense N N
FRONT PANEL
+10V_SENSE Sample, Scaling
I/O BOARD J16 CABLE_PRESENT_SEND
SHT 4A, 4B, 4C, 4D & Invert
A
+10V_SENSE Load
Sample & Loopback
Scaling B
Drive Power J1 +10V DC CABLE_PRESENT_RCV
SYSTEM CABINET I/F (MR2 A15) +/– 10VDC
J18 TO SRFD OR SRFD2 SSM J5 –10V DC 1
SHT 6 OR 7B NOTE: MC DRIVER BOARD 1 MC16–
MC DRIVER NUMBERING INSIDE THE MC17–32
DRIVER MODULE IS 0–15 AND 16–32.. J1 MC31
1
OUTSIDE NUMBERING IS 1–16 AND 17–32. J2 TO
HDx (14.x) & HDxt (1.5.x, 16.x) MGD/RRF/RF SUBSYSTEM J10 J78
DRIVER MODULE (Upgrade with SSM) SHT 9A, 9B, 9C
SHEET 5C OF 16

DRIVER MODULE RFS

DRIVER CONTROL BOARD
CAN CORE BOARD CAB I/F
FAN +12 VDC TRDD Drive Pwr J11 (DAUGHTER CARD) DSP1 J7 J1 J56 TO
AC–DC CAN COMM Bi–Directional CAN Comm HFD CAB
MULTIPLE –15 VDC TRDD Drive Pwr & MODULE J7
J20 TS1 OUTPUT STATUS J2 J13 J6 J2
120 VAC CB1 POWER +/– 12 VDC Mixed Signal Pwr J2 Bi–Directional CAN Comm TO/FROM
SUPPLY ASC CHASSIS J2
+/– 15 VDC Preamps & Aux Pwr J1 SHT 13
J20 TO TR/DD BOARD (FUTURE)
FAN + 24 VDC Isolated Network J12
Driver J19 TO MCD2 BOARD (FUTURE)
+ 24 VDC For HV Supply POWER Power MC Aux Pwr (+/– 15VDC)
Sense MC Preamp Pwr (+15VDC)
+/– 10VDC MC Drive Power J16 MANAGEMENT J4 J3 TO
16 Channel Switch & Power (+/–15VDC) 16 Channel Switch Control
J15 PEN PANEL J77
MC2 DRIVE POWER OUT J3 J4 SHT 9A, 9B, 9C
(FUTURE) J10 High Speed Data I/F (FUTURE) High Speed Data I/F
HV POWER + 24 VDC TO IRF I/O BD J21
SUPPLY HV Disable, Serial ID SHT 2
J8 FPGA MC Disable Sw FRONT PANEL
Cable Fault
J17 Driver Control & Serial ID
UDB Power CONTROL) TR Disable Sw Switches DD, MC
J2 Inhibit Unblank CCC Debug Port CCC Error,
J21 J1 CCC Status,
CCC HRT,
J6 Head T/R Bias DCB HRT,
TO SRFD II J9 J8 Unblank Enable, Cable Faults, Switches LEDs
CABINET J7 Body T/R Bias Module Error,
J9 Unblanks, DCB Inhibit Serial ID, Debug Ports, Driver Fault,
SHT 7C J10 LED Drive, +/– 12VDC,
J8 MNS T/R Bias Debug Unblank Unblanks, LED Drive Unblank:
TO MNS J9 J10 Serial ID 3.3VDC NB,BB,CW,
SHT 14A LOW PASS ANALOG INHIBIT
J21 BD1 DSP2 FILTERING MUXING
J92 TR–DD SPI, Unblank, Inhibit Unblank Unblank TP1, TP2,
DRIVER BD (DRIVER OUTPUT Test Points TP3, GND
J22 BD2 MONITORING) Board Present, Cable Present
J93 J21
TO J23 DD CCC De–Bug
PEN J94 J2 J22 Port
PANEL J24 BD3 J15 J18 J9 J17 J19 DCB De–Bug
HV FILTER J95 Port
J25 BD4 Cable Fault
J96
MCD_SN
Self–ID
+12 V DC
Vref
–12 V DC
J3
BOARD&CABLE_PRESENT_IN Reference
A
J15 J15 UNBLANK DISTRIBUTION Scaling
SPARE BOARD_PRESENT_OUT
BOARD
Not Used CABLE_PRESENT_OUT VREF1/2/3 Buffer
B Amps
J11 UPM NB1 J11 J10
TO ASC CHASSIS +3.3V DC V_IN_RCV
SLOT 15, J3
CONTROL Control 1
J12 UPM NB2 J12 of Sense 1
Driver Output 0
TO ASC CHASSIS Unblank J3
0
SLOT 12, J3 Outputs Unblanks,
Unblank Enable,
J13 MNS IF J13 Inhibit Cable Sense, Serial ID,
TO ASC CHASSIS Unblank Status, Sense, Control 2 1
SLOT 6, J3 Inputs LEDs Driver Output 1 MC00–
Control, Power Sense 2 1 J2 MC15
J14 J14 MC1–16
RFI/Amp IF (+/– 12VDC,
TO ASC CHASSIS 3.3VDC) TO
SLOT 8, J3 J5 PEN PANEL
J16 J16 J203
SPARE SHT 9A, 9B, 9C
Not Used Control N
Driver Output N
Sense N N
J17 SPARE J17
Not Used +10V_SENSE Sample, Scaling
& Invert CABLE_PRESENT_SEND
J18 Unblanks, EFBEN J18 Load
A
SSM +10V_SENSE Sample & Loopback
Not Used EFBEN Scaling B
Drive Power J1
Unblank +/– 10VDC +10V DC CABLE_PRESENT_RCV
J19 Inputs J19 EFBEN
1
FROM –10V DC
FRONT PANEL MC DRIVER BOARD 1 MC16– MC17–32
I/O BOARD J16 MC31 TO
SHT 4A, 4B, J1 J2
4C, 4D J10 J78
SHT 9A, 9B, 9C
HDx (14.x) & HDxt (1.5.x, 16.x) MGD/RRF/RF SUBSYSTEM NOTE:
DRIVER MODULE (Forward Production, RFS Cabinet, no SSM) 1 DRIVER MODULE IS 0–15 AND 16–32..
OUTSIDE NUMBERING IS 1–16 AND 17–32.
SHEET 5D OF 16

SYSTEM SUPPORT MODULE REAR

(MR1A7) PANEL
ASM
L1
J11 J14 208 V L2 208 VAC
FRONT PANEL DISPLAY BOARD INPUT 3 PHASE 1
CPD BOARD L3
FLAT BUS
(MR1A7A2) MONITOR MONITOR FRONT J3 J5
AND ENABLE
LED’S
DOOR
DETECT
GND EFBEN–N 1 7
U10 SWITCHES
J1 GND 2
HEAD +5V 3
T/R BIAS

SWITCH LED LED MCR–EN–P 4
BANK BANK 1 BANK 2
GND 6 FROM SYSCAB J18
SHT 5A OR 5C
BODY UNBLANK–N 11 6
T/R BIAS UNBLANK–P 12 1
TO NB AMP ALTERA 7064 EPLD EFBEN–P 43 2
HC711P2 MICROPROCESSOR TO AUX
AUTO SPECTRO S–UNBLK–N 75 8
ECHO
ROM
(SPC
CPUw/
WATCH
RS–232
LOGIC
INPUT
PORTS
SPECTRO S–UNBLK–P 76 3
PORT1
CODE) DOG T/R BIAS
TPS
RESET
SPECTRO
OUTPUT
APM BOARD J1 VENT ON 22 TO REAR I/F BD NOTE 2
PORT2 TIMER
REGISTERS LEVEL 14 BIT
LOGIC PORTS
(MR1A7A1) J1–15
14 J32 21
EEPROM RS–232 CONVERTERS COUNTER UNBLK U18 U11
ALIGNON–P
TIMERS BUS UBNLNK
(CONFIG) PORT3 R19
CONTRL GATING LOGIC LIGHTON–N 15 10
SPI BUS VREFB VREFA RF IN TP
PORTS CONVERTR DECIDED SIGNALS TR DRIVE OPEN
U14 CIRCUIT TP4 U18 ERROR
BUFF VCA
4 QUAD
RF LIGHTON–P 20 22
POWER LOOPG CONTROL MULTIPIER OUTPUT
OUTPUT DRIVE AMP
PORTS
+5V
U28 U26 POWER U25 SPLITTER INTEGRATOR U17 U16 AMP U26 CABLE VENTON–P 46 22 FROM SYSCAB J25
U10
SHORT RFAMPS LOG U7 DETECT SHT 2
EFB RF OUT
MC1–DRIVE
U15 R61 TEST AMPS
PRE EN ALIGNON–N 47 8
JP3 ANITLOG AMP BODY ENV.
HV RELAY (NB AMP)
MC1 78 9
UNBLANK DRIVE NORM U19 LOOP DET. B BODY ENV. B VENTON–N
OPEN SPECTRO J46
BYPASS B
INHIBIT B
READY B
EFB ENABLE ADJ. R14 R15 AUX–RTS 10 4
FAULT B
INPUT ADJ.
U24 R22 ZERO MON.LEVEL
LIGHT ON CONV U25 BODY IN B R287
POWER
ALIGNMENT ON U15
SHORT
U14 CIRCUIT AUX–RXD 44 3
R58 SPLITTER
VENT ON MC2–DRIVE
R311
BODY BODY BPF B AUX–TXD 65 2 LAPTOP I/F
MC2 POWER CABLE
ADJ.
DRIVE
OPEN COMBNR HEAD BPF B DETECT TP7 AUX–CTS 66 5
U13 CIRCUIT MICRO
POWER SUPPLY
HV VOLTAGE CONTROLSIGNAL U22 U21 POWER HEAD ENV. U1 AUX–DTR 67 20
INTERFACE SHORT R310 SPLITTER HEAD IN B DET. B J507
DOCK EN

15V DRIVE
U15 R51 U13 CIRCUIT HEAD OVERHEAT FAULT 7 19
VENT ON
MC3–DRIVE
LIGHT ON
ADJ. R12
ALIGN ON
R13
PAC
+15
–15
MON.LEVEL 8
MC3 ZERO GND
+5
DRIVE OPEN
U13 CIRCUIT J507 J408 J409 J3 NOT USED J104 NOT USED J106 J107 J103 FJST–I–RTN 9 13
U30 U13 NOT
CABLE
SHORT
U13 CIRCUIT
HEAD BODY USED DETECT
PWRSHO WN 16 11
U15
GND 17
MC4
NOT USED J102 ENV.
TO BPF
19
DRIVE
SRFD CABINET (SHT 7A) MNS
DET. B GND
R96 R97
J12 ZERO MON.LEVEL FJST–2RTN 39 14
RFI MODULE SHT
(MR1 A23) HEAD COUPLE B BOPRESENT 40 22
J5 14A
HIGH VOLTAGE
BODY COUPLE B +15V 42 1,2
J6 1
DUTYFAULT 45 17
PWR MONITOR RF MON J503 TO MNS J7
J18 BIASON 48 20
U46
CONTROL SHT 14A
CABLE
DETECT TP21
PAC8/9 49
BODY COUPLE A BODY IN A J110 POWERFLT 51 18

J42 J8 BODY ENV.
DET. A
DD DRIVE BODY1
BODY ENV. A 0FLT 70 16
TO PEN PANEL J44 R100 R101
J4 SHT 8 ZERO
MON.LEVEL FJST–3–RTN 73 15
+15V,–15V,+5V, GND
TO PEN PANEL J152 +15V 74 1,2

J3
SHT 8 CABLE
ACON 77 9
DETECT TP20 MICRO
COMMUNICATION LINE
FAULTRST 79 10
UNBLANK FROM SSM

+5V HEAD COUPLE A HEAD IN A J108 HEAD U8
+15V J7 ENV
HEAD ENV. A
–15V J44 DET. A UNBLANK288 80 12
R98
FAULT A
INHIBIT A
BYPASS A
READY A
DOCK ON DD NOT R99
MON.LEVEL ACOURDBK 82 21
LIGHT ON USED RF AMP 1 ZERO
ALIGN ON J20 L1,L2,GND GND 81

VENT ON 33 J504 1
TO UNBLK2N8/2
RF MON
CABLE
J11 J3
RF IN MNS J101 DETECT
SPECTRO TP18 34–38 TO RFI
GND
J1 ENV. J18 SHT 7A
J16 J1 BPF UNBLK2NB/P 41 6
COM SHT DET. A
J43 14A J501

MOSI
J4 R94 R95 NB–RTS 53 4
J1 MON.LEVEL TO RFI
SCLK BODY2 RF OUT ZERO
N0–TXD 68 3 J18 SHT 7A
NB–RXD 64 2
J5 J4 J9 J1 MDS–RXD 71 RX FROM GRAD CAB
RF AMP 2 (NOTE 1)
AMP2 DRIVE MDS–TXD 72 TX TO SYS CAB J16
REAR PANEL ASM J503 RF MON J12 SHT 2
PORT SHT 7
NB SERIAL AMP2 IN
J501 J2
1 2 3 J3 1 J504 PCM SHT 7
J17 AMP2 COMM
RF IN FROM J1 SHT 7
FROM SYSTEM CAB J1 J14
SYSTEM SUPPORT MODULE (+8V XMT/ SHT 4A OR 4B
J19 L2, L3, GND
NOTE 2 –12.25V
TO SYSTEM CAB J55
SHT 5A OR 5C RECEIVE) HEAD T/R BIAS
J9 REFER TO THE FOLLOWING FUNCTIONAL BLOCK DIAGRAM
FOR ADDITIONAL INFORMATION:
EXCITE HD (12.x), HDx (14.x) & HDxt (1.5.x, 16.x) MGD/RRF/RF SUBSYSTEM (+4V XMT/
–12.25V
(Upgrades Only) TO SYSTEM CAB J53 RECEIVE) BODY T/R BIAS
J10
NOTE:
SHT 5A OR 5C 1) GRADIENT
SRFD POWER CABINET – SYSTEM SUPPORT MODULE
SHEET 6A OF 16 2) PATIENT HANDLING


(MR1A7) PANEL
ASM
L1
J11 J14 208 V L2 208 VAC
CPD BOARD L3
FLAT BUS
AND ENABLE
LED’S
DOOR
DETECT
GND EFBEN–N 1 7
U10 SWITCHES
J1 GND 2
HEAD +5V 3
T/R BIAS

BANK BANK 1 BANK 2
SHT 5A OR 5C
TO NB AMP EFBEN–P 43 2
ALTERA 7064 EPLD
TO AUX
ECHO
ROM
(SPC
CPUw/
WATCH
RS–232
LOGIC
INPUT
PORTS
PORT1
CODE) DOG T/R BIAS
TPS
RESET
SPECTRO
OUTPUT
PORT2 TIMER
LOGIC PORTS
(MR1A7A1) J1–15
14 J32 21
ALIGNON–P
TIMERS BUS UBNLNK
(CONFIG) PORT3 R19
BUFF VCA
4 QUAD
OUTPUT DRIVE AMP
PORTS
+5V
U10
EFB RF OUT
MC1–DRIVE
U15 R61 TEST AMPS
HV RELAY (NB AMP)
MC1 78 9
OPEN SPECTRO J46
BYPASS B
INHIBIT B
READY B
FAULT B
INPUT ADJ.
POWER
ALIGNMENT ON U15
SHORT
R58 SPLITTER
VENT ON MC2–DRIVE
R311
MC2 POWER CABLE
ADJ.
DRIVE
U13 CIRCUIT MICRO
POWER SUPPLY
DOCK EN

15V DRIVE
VENT ON
MC3–DRIVE
LIGHT ON
ADJ. R12
ALIGN ON
R13
PAC
+15
–15
MON.LEVEL 8
MC3 ZERO GND
+5
DRIVE OPEN
U30 U13 NOT
CABLE
SHORT
U13 CIRCUIT
USED DETECT
PWRSHO WN 16 11
U15
MC4–DRIVE R66 SPECTRO TP19
NOT USED J102 GND 17
MC4 ENV.
TO BPF
19
DRIVE
SRFD CABINET (SHT 7A) MNS
DET. B GND
R96 R97
RFI MODULE SHT
(MR1 A23) J5 TO ASC CHASSIS J47 BOPRESENT 40 22
SHT 13 14A
HIGH VOLTAGE +15V 42 1,2
J6
TO ASC CHASSIS J46 1
SHT 13 DUTYFAULT 45 17
J503 TO MNS J7
BIASON 48 20
U46 TO ASC CHASSIS J30 SHT 14A
J18
SHT 13 CABLE
TP21
PAC8/9 49
DETECT
TO ASC CHASSIS J44 POWERFLT 51 18

J8 J110
J42 SHT 13 BODY ENV.
DET. A
DD DRIVE BODY1
J4 SHT 8 ZERO
MON.LEVEL FJST–3–RTN 73 15
+15V,–15V,+5V, GND
TO PEN PANEL J152 +15V 74 1,2

J3
SHT 8 CABLE
ACON 77 9
DETECT TP20 MICRO
+5V TO ASC CHASSIS J45 FAULTRST 79 10
J7 J108 HEAD U8
+15V SHT 13 ENV
HEAD ENV. A 80 12
–15V J44 DET. A UNBLANK288
R98
FAULT A
INHIBIT A
BYPASS A
READY A
DOCK ON DD NOT R99
LIGHT ON USED RF AMP 1 ZERO
ALIGN ON J20 L1,L2,GND GND 81

VENT ON 33 J504 1
J3 TO CABLE UNBLK2N8/2
J11 MNS J101 DETECT
RF IN SPECTRO TP18 GND 34–38 TO RFI
J1 ENV. J18 SHT 7A
J16 J1 BPF UNBLK2NB/P 41 6
COM SHT DET. A
J43 14A J501

MOSI
J4 R94 R95 NB–RTS 53 4
J1 MON.LEVEL TO RFI
SCLK BODY2 RF OUT ZERO
N0–TXD 68 3 J18 SHT 7A
NB–RXD 64 2
RF AMP 2 (NOTE 1)
AMP2 DRIVE MDS–TXD 72 TX TO SYS CAB J16
REAR PANEL ASM J503 J12 SHT 2
PORT SHT 7
J2 AMP2 IN
J501
1 2 3 J3 1 J504
SHT 7
J17 AMP2 COMM
RF IN FROM J1 SHT 7
J19 L2, L3, GND
NOTE 2 –12.25V
TO SYSTEM CAB J55
SHT 5A OR 5C RECEIVE) HEAD T/R BIAS
J9 REFER TO THE FOLLOWING FUNCTIONAL BLOCK DIAGRAM
HDxt (23.x) MGD/RRF/RF SUBSYSTEM (+4V XMT/
–12.25V
J10
NOTE:
SHT 5A OR 5C 1) GRADIENT
SRFD POWER CABINET – SYSTEM SUPPORT MODULE
SHEET 6B OF 16 2) PATIENT HANDLING

RFI
(MR1A23)
BLK
RED ÁÁ
ÁÁ
J19
220V

ANALOGIC
RF
ÁÁ
EXT CONT J1 AMPLIFIER
GRN/YEL
RED #1
ÁÁ
J20
BLK 220V
RFA POWER GATING GATING
HEATSINK ASSEMBLY DRV_IN 0° FET +45dBm 0° FET
30A BREAKER GRN/YEL Preamp Preamp GATING 21dB 12dB
RF INPUT J3 Gain/Phase FET
Attenuator
ÁÁ
12dB 16dB Compensation 18dB Xformer
RED –14dB –6dB
Network FET FET
SW J21 nominal
21dB 12dB
BLK POWER 180° 180°
FROM +24dBm GATING
0dBm +12dBm –2dBm +14dBm +12dBm
ORN PDU GATING GATING GATING 0° AC INPUT CABLE
HSTEMP_DAC FET
RF OUTPUT FET x 4 12dB
0.4A 0.4A GRN/YEL 9kW GAIN_DAC 12dB
(69.54dBm) DELTA_TJ+_DAC 0°
FET
BLK Typical Amp Stage 12dB
180°
BLK FAN J4 GATING CB1
12dB 180° GATING
64dB
FET x 4 FET x 4 CIRCUIT
GATING 12dB BREAKER
0° 52dB
POWER SUPPLY J2B 3–way 250V, 20A
REFLECTED 3–way Typical Amp Stage
Splitter
RED/BLU
5 –OUT
1 BLU TERM 50Ω Combiner
GATING 180°
52dB
MONITOR 12dB
ORN/BLU 2 GRN 64dB FET x 4 57dBm
1 +/–15V COM FET x 4
12dB GATING 52dB
BLK 3 RED 0°
3 +OUT P1
4 NC Typical Amp Stage
2 J2A
FORWARD
HS_TEMPH_V
50Ω
CMD_LTCH_L
AC INPUT CABLE
DEV2_FLT_H
DEV1_FLT_H
5 BLK TERM 12dB 180°
DELTA_TJ+
NC 4 –OUT
CMD_EN_L
MONITOR 64dB
D_CLK_IN
5V FET x 4
D_WRITE
6 ORN
TAB
TAB
TAB
TAB
D_READ
+OUT GATING
TO TAB 7 VR1 VR2
FWD_V
RFL_V
TAB 9
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
P2
3
4
5
8
NC
NC
DC POWER
10
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
8
7
1
2
9
6
4
3
5
INPUT J22
BD RF TEST PORT
J13 GATING CABLE RF/CONTROL RF/CONTROL
RF CABLE KIT DATA CABLE
POWER CABLE
RF INPUT RF IN FROM
J14 SYS CAB J1
SHT 4A, 4B, OR 4C
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
6 –15V
5 15_RTN
4 +15V
3 48V_RTN
2 NC
1 +48V
LOW VOLTAGE DIGITAL
GND
RF_MISO
RF_DATA_CLK
RF_CMD_LTCH_L
FWD_VOLTS
DATA_TO_RF
RF_CMD_EN_L
DEV2_FLT_H
DEV1_FLT_H
HS_TEMP_V
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
RFL_VOLTS
NC
DELTA_TEMP
CONTROL OUT STATUS BALANCE OUT
J23 J15 J11
J13 VDD RTN
J12 VDD+
J15 DRV VDD+

AMP1 DRIVE
J11 1 POWER_ON+
AMP2 DRIVE 2 FAULT_RESET+ LINE FILTER
J25 J12 3 AMP_READY+ 250V, 20A
4 AMP_FAULT+ J7
5 AMP_OVERLOAD+
TRANSLATOR 6 VT100_RXD
BD FACTORY 7 VT100_TXD LINE
RF INTERFACE
TEST 8 NC J4 CONDITIONER
AMP1 COMM J14 LINE
J1 J16 CONNECTOR 9 POWER_ON– OUTPUT
CONDITIONER
AMP2 COMM 10 FAULT_RESET– CABLE
J3 J17 11 AMP_READY– PCB LINE
12 AMP_FAULT– J1 J2 CONDITIONER
13 AMP_OVERLOAD– INPUT CABLE
J18 14 NC
GENERAL COMM 15 GND
SHT 6A OR 6B
J9 FAN1
GATING J5 FAN +V
INPUT J10
FAN –V
FAN2
FAULT SW1
RESET RFA POWER
TOPCOVER ASSEMBLY FAN POWER CABLE
220V
RF OUTPUT
BD J1
ANALOGIC
ÁÁ
Á
EXT CONT RF
RF INPUT J3
AMPLIFIER
WHT AMP1 IN
ÁÁ
Á
J1 #2
AMP2 IN RF OUTPUT 9kW (69.54dBm)
BLU/WHT
J2 J4 CB1 ANALOGIC
GRN
HEAD J3
HEAD OUTPUT
SHT 8 TERM 50Ω J2B REFLECTED RF
GRA
J4
BODY OUTPUT MONITOR
AMPLIFIER
ÁÁ
Á
P1
BRN HEAD COUPLE B TERM 50Ω J2A FORWARD
#1
BODY J5 MONITOR VR1 VR2
P2
YEL
ÁÁ
Á
J6 BODY COUPLE B
BLU YEL HEAD COUPLE A SHT 6A OR 6B GATING CABLE
J7
J8 BODY COUPLE A ANALOGIC
HEAD T/R RF
J13 VDD RTN
J12 VDD+
J15 DRV VDD+
J9 TO SYS CAB J55 FACTORY

J10 BODY T/R TEST J4
J7 AMPLIFIER
TO SYS CAB J53 CONNECTOR RF INTERFACE
J14
#2
J1 J2
GATING INPUT J9
EXCITE HD (12.x), HDx (14.x) & HDxt (1.5.x, 16.x or Later) FAN +V FAN1
J5
RFA POWER FAN –V J10 FAN2
SW1
MGD/RRF/RF SUBSYSTEM (Upgrades Only) FAULT RESET TOPCOVER ASSEMBLY
SRFD CABINET – RFI AND SOLID STATE AMPS

SHEET 7A OF 16


(MR1A7) PANEL
ASM
L1
J11 J14 208 V L2 208 VAC
CPD BOARD L3
FLAT BUS
AND ENABLE
LED’S
DOOR
DETECT
GND EFBEN–N 1 7
U10 SWITCHES
J1 GND 2
HEAD +5V 3
T/R BIAS

BANK BANK 1 BANK 2
SHT 5A OR 5C
TO NB AMP EFBEN–P 43 2
ALTERA 7064 EPLD
TO AUX
ECHO
ROM
(SPC
CPUw/
WATCH
RS–232
LOGIC
INPUT
PORTS
PORT1
CODE) DOG T/R BIAS
TPS
RESET
SPECTRO
OUTPUT
PORT2 TIMER
LOGIC PORTS
(MR1A7A1) J1–15
14 J32 21
ALIGNON–P
TIMERS BUS UBNLNK
(CONFIG) PORT3 R19
BUFF VCA
4 QUAD
OUTPUT DRIVE AMP
PORTS
+5V
U10
EFB RF OUT
MC1–DRIVE
U15 R61 TEST AMPS
HV RELAY (NB AMP)
MC1 78 9
OPEN SPECTRO J46
BYPASS B
INHIBIT B
READY B
FAULT B
INPUT ADJ.
POWER
ALIGNMENT ON U15
SHORT
R58 SPLITTER
VENT ON MC2–DRIVE
R311
MC2 POWER CABLE
ADJ.
DRIVE
U13 CIRCUIT MICRO
POWER SUPPLY
DOCK EN

15V DRIVE
VENT ON
MC3–DRIVE
LIGHT ON
ADJ. R12
ALIGN ON
R13
PAC
+15
–15
MON.LEVEL 8
MC3 ZERO GND
+5
DRIVE OPEN
U30 U13 NOT
CABLE
SHORT
U13 CIRCUIT
PWRSHO WN 16 11
U15
GND 17
MC4 NOT USED J102 ENV.
TO BPF
19
DRIVE
SRFD II CABINET (SHT 7D) MNS
DET. B GND
R96 R97
SRFD II MOD. SHT
HEAD SAMPLE B BOPRESENT 40 22
J5 14A
HIGH VOLTAGE
BODY SAMPLE B +15V 42 1,2
J6 1
DUTYFAULT 45 17
PWR MONITOR RF MON J503 TO MNS J7
J18 BIASON 48 20
U46
CONTROL SHT 14A
CABLE
DETECT TP21
PAC8/9 49
BODY COUPLE A BODY IN A J110 POWERFLT 51 18

J42 J8 BODY ENV.
DET. A
DD DRIVE BODY1
73 15
J4 MON.LEVEL FJST–3–RTN
SHT 8 ZERO
+15V,–15V,+5V, GND
+15V 74 1,2
J3 TO PEN PANEL J152
CABLE
SHT 8 ACON 77 9
DETECT TP20 MICRO
COMMUNICATION LINE
FAULTRST 79 10
UNBLANK FROM SSM

+5V HEAD SAMPLE A HEAD IN A J108 HEAD U8
+15V J7 ENV
HEAD ENV. A
R98
FAULT A
INHIBIT A
BYPASS A
READY A
DOCK ON DD NOT USED R99
ZERO
LIGHT ON
ALIGN ON GND 81
VENT ON 33 J504 1
TO UNBLK2N8/2
RF MON
CABLE
MNS J101 DETECT
SPECTRO TP18 34–38 TO SRFD II
GND
J1 ENV. J18 SHT 7C
SHT BPF DET. A UNBLK2NB/P 41 6
J43 14A J501
MOSI
R94 R95 NB–RTS 53 4
ZERO MON.LEVEL TO SRFD II
SCLK BODY2 N0–TXD 68 3 J18 SHT 7C
NB–RXD 64 2
(NOTE 1)
MDS–TXD 72 TX TO SYS CAB J16
REAR PANEL ASM J503 RF MON SHT 2
NB SERIAL
J501
1 2 3 J3 1 J504 PCM
RF IN FROM J1
NOTE 2 –12.25V
TO SYSTEM CAB J55
SHT 5A OR 5C RECEIVE) HEAD T/R BIAS REFER TO THE FOLLOWING FUNCTIONAL BLOCK DIAGRAM
J9
EXCITE HD (12.x), HDx (14.x) & HDxt (1.5.x, 16.x) MGD/RRF/RF SUBSYSTEM (+4V XMT/ FOR ADDITIONAL INFORMATION:
–12.25V
J10 NOTE:
SHT 5A OR 5C
SRFD II POWER CABINET – SYSTEM SUPPORT MODULE 1) GRADIENT
SHEET 7B OF 16 2) PATIENT HANDLING


(MR1A7) PANEL
ASM
L1
J11 J14 208 V L2 208 VAC
CPD BOARD L3
FLAT BUS
AND ENABLE
LED’S
DOOR
DETECT
GND EFBEN–N 1 7
U10 SWITCHES
J1 GND 2
HEAD +5V 3
T/R BIAS

BANK BANK 1 BANK 2
SHT 5A OR 5C
TO NB AMP ALTERA 7064 EPLD EFBEN–P 43 2
HC711P2 MICROPROCESSOR TO AUX
ECHO
ROM
(SPC
CPUw/
WATCH
RS–232
LOGIC
INPUT
PORTS
PORT1
CODE) DOG T/R BIAS
TPS
RESET
SPECTRO
OUTPUT
PORT2 TIMER
LOGIC PORTS
(MR1A7A1) J1–15
14 J32 21
ALIGNON–P
TIMERS BUS UBNLNK
(CONFIG) PORT3 R19
BUFF VCA
4 QUAD
OUTPUT DRIVE AMP
PORTS
+5V
U10
EFB RF OUT
MC1–DRIVE
U15 R61 TEST AMPS
HV RELAY (NB AMP)
MC1 78 9
OPEN SPECTRO J46
BYPASS B
INHIBIT B
READY B
FAULT B
INPUT ADJ.
POWER
ALIGNMENT ON U15
SHORT
R58 SPLITTER
VENT ON MC2–DRIVE
R311
MC2 POWER CABLE
ADJ.
DRIVE
U13 CIRCUIT MICRO
POWER SUPPLY
DOCK EN

15V DRIVE
VENT ON
MC3–DRIVE
LIGHT ON
ADJ. R12
ALIGN ON
R13
PAC
+15
–15
MON.LEVEL 8
MC3 ZERO GND
+5
DRIVE OPEN
U30 U13 NOT
CABLE
SHORT
U13 CIRCUIT
PWRSHO WN 16 11
U15
GND 17
MC4 NOT USED J102 ENV.
TO BPF
19
DRIVE
SRFD II CABINET (SHT 7D) MNS
DET. B GND
R96 R97
SRFD II MOD. SHT
TO ASC CHASSIS J47 BOPRESENT 40 22
J5 14A
HIGH VOLTAGE SHT 13 +15V 42 1,2
TO ASC CHASSIS J46 1
J6 DUTYFAULT 45 17
SHT 13 J503
BIASON 48 20 TO MNS J7
U46 TO ASC CHASSIS J30 SHT 14A
J18 CABLE
PAC8/9 49
SHT 13 DETECT TP21
TO ASC CHASSIS J44 J110 POWERFLT 51 18

J42 J8 BODY ENV.
SHT 13 DET. A
DD DRIVE BODY1
FJST–3–RTN 73 15
J4 SHT 8 ZERO
MON.LEVEL
+15V,–15V,+5V, GND
+15V 74 1,2
TO PEN PANEL J152
J3 CABLE
77 9
SHT 8 TP20
ACON
DETECT MICRO
+5V TO ASC CHASSIS J45 J108 U8 FAULTRST 79 10
J7 HEAD
+15V SHT 13 ENV
HEAD ENV. A
R98
FAULT A
INHIBIT A
BYPASS A
READY A
DOCK ON DD NOT USED R99
ZERO
LIGHT ON
ALIGN ON GND 81
VENT ON 33 J504 1
TO CABLE UNBLK2N8/2
MNS J101 DETECT
SPECTRO TP18 34–38 TO SRFD II
GND
J1 ENV. J18 SHT 7C
SHT BPF DET. A UNBLK2NB/P 41 6
J43 14A J501
MOSI
R94 R95 NB–RTS 53 4
ZERO MON.LEVEL TO SRFD II
SCLK BODY2 N0–TXD 68 3 J18 SHT 7C
NB–RXD 64 2
(NOTE 1)
MDS–TXD 72 TX TO SYS CAB J16
REAR PANEL ASM J503 SHT 2
J501
1 2 3 J3 1 J504
RF IN FROM J1
NOTE 2 –12.25V
TO SYSTEM CAB J55
SHT 5A OR 5C RECEIVE) HEAD T/R BIAS REFER TO THE FOLLOWING FUNCTIONAL BLOCK DIAGRAM
J9
HDxt (23.x) MGD/RRF/RF SUBSYSTEM (+4V XMT/ FOR ADDITIONAL INFORMATION:
–12.25V
J10 NOTE:
SHT 5A OR 5C
SRFD II POWER CABINET – SYSTEM SUPPORT MODULE 1) GRADIENT
SHEET 7C OF 16 2) PATIENT HANDLING

SRFD II MODULE
INPUT POWER
AC POWER
208V 3 PHASE
CB1
CIRCUIT
BREAKER POWER
SUPPLY
GND STUD
3 POLE
J21 CONTACTOR
FROM PDU UNBLANK AND CONTROL J18
TO SHT 7B or 7C
I/F TRANSLATION OR
SWITCH CONTROLS SWITCH CONTROLS ASC SLOT 8 J6
SHT 13
OUTPUT
CONDITIONING
HEAD RF POWER OUT J3 TO SHT 7B, 8A, OR 8B
HEAD TR BIAS J9
INPUT CONDITIONING RF AMPLIFIER FROM SHT 7B, 7C OR 5A , 5B, 5C, OR 5D
HEAD J5
HEAD DUAL
ATTEN GAIN
COUPLER HEAD RF SAMPLE A/B J7
ADJUST TO SHT 7B or 7C
AMP OR
J6
BODY BODY DUAL ASC SHT13
COUPLER BODY RF SAMPLE A/B J8
J14
RF IN FROM BODY BODY TR BIAS J10
SYS CAB J1 GAIN FROM SHT 7B, 7C OR 5A, 5B, 5C, OR 5D
ADJUST
OR BODY RF POWER OUT J4
RF IN FROM TO SHT 7B, 7C, 8A, OR 8B
MUX J8
SHT 4A, 4B OR 4C
RF
TEST PORT
SRFD II RF AMPLIFIER
SHEET 7D OF 16

PEN PANEL MAGNET REAR PEDESTAL (MG3) MAGNET ENCLOSURE (MG2)

(PP1) UTNS3 BODY QUADRATURE HYBRID ASSEMBLY (MG3A3)
CABLE I/F 16 CHNNL ANTENNA
8
TO (MG3A17) SWITCH (MG3A8) BODY T/R SWITCH QUAD DIRECT BODY COIL ASSEMBLY (MG2A12)
SYS CAB OR J202 J4 (MG3A3A1) PIN DIODE SPLITTER DRIVE
OR RFS CAB J202 2 2 (MG3A3A2) DISABLE ISOLATION BOX
J35 J36 J1 T/R SWITCH EPOXY FILLED GRADIENT COIL TRM OR BRM
SHT 4A, 4B, OR 4C (MG3A3A3)
J3/J4 J3/J4
J44 J1 J4 1/4l J1
FROM BODY OUTPUT l/4
SRFD II J4
SHT 6 OR BODY COIL PREAMPLIFIER 4 1
7B OR 7C (MG3A3A5) DYNAMIC DISABLE DYNAMIC DISABLE
J200 8 IMAGE l/4 l/4 SWITCH BOARD SWITCH BOARD
TO HEAD REJECT (MG2A12A9, DDSB6) 5 5
(MG2A12A4, DDSB1)
RFS CAB OR (NOTCH) PREAMPLIFIER BD l/4
MC1–MC8 OUT IN J1 J1
SYS CAB J200 FILTER (A1) RF BODY
PUT P2 P1 PUT J2 5 8
SHT 4A, 4B, OR 4C CARTRIDGE
36 dB (MG2A12A1)
DYNAMIC 68.86 MHZ PIN DIODE ISOLATION BOX 1 J2 BODY HEAD HEAD BODY J2
DISABLE T/R SWITCHES
FILTER J3/J4 J3/J4
J3 1/4l J2
MODULE 3
J16 16 CHANNEL J23
SWITCH J20 A11, DDSB8 A6. DDSB3
(PP1A11) J25
J5 J6
FROM SYS CAB A10, DDSB7 A5, DDSB2
J46 SHT 5A OR 5C DD DD
OR J94 J74
DRIVER MODULE A8, DDSB5 A7, DDSB4
FILTER 3
J23 SHT 5B OR 5D
TO SRI–3 J20
FROM SYS CAB MAGNET ENCLOSURE (MG2) J7 J8 J9 J10 REAR DYNAMIC FRONT DYNAMIC J7 J8 J9 J10
J48 SHT 5A OR 5C BD4 DD4 (–15V HEAD/+550V BODY) J6 DISABLE BIAS DISABLE BIAS
DD4 J12 SPLITTER
OR J96 J76 SPLITTER
DRIVER MODULE DD3 (–15V HEAD/+550V BODY) J5 J11 (MG2A12A12) (MG2A12A13)
FILTER 5
J25 SHT 5B OR 5D
DD2 (–15V HEAD/+550V BODY) J4 J12

FROM SYS CAB
J47 SHT 5A OR 5C BD3 DD3 DD1 (–15V HEAD/+550V BODY) J3 J11
OR J95 J75
DRIVER MODULE FILTER 4
J24 SHT 5B OR 5D
FROM SYS CAB

J45 SHT 5A OR 5C BD2 DD2 LOW PROFILE CARRIAGE ASSEMBLY (MG2 A16)
OR J93 J73 QUICK QUAD HEAD QUAD HEAD COIL ASM (MG2A16A1)
DRIVER MODULE FILTER 2 INTEGRATED HEAD T/R ASSEMBLY (MG2 A16 A5) DISCONNECT COIL ADAPTER
J22 SHT 5B OR 5D (MG2A16A4) (MG2A16A6)
HEAD T/R BOARD J3– PINS PINS POWER SPLITTER
FROM SYS CAB CABLE
J44 SHT 5A OR 5C BD1 TRACK 4 2A,B J 2A,B 2A,B J13 J1 (MG2A16A1A2)
DD1 J6
OR J92 J72 l
DRIVER MODULE FILTER 1
J21 SHT 5B OR 5D RECEIVE LOAD 4A,B 4A,B 4A,B
PIN DIODE RF FILTER

T/R SWITCH ISOLATION BD
CABLE
I/F (MG2A16A1A2)
RF TX (MG3A17) 4
HEAD IN
SWITCH PIN TRANSMIT LOAD 7A,B 7A,B 7A,B

DIODE RF FILTER ISOLATION BD
J152 J151 J1 T/R (MG2A16A1A2)
IMAGE PREAMPLIFIER SWITCH
FROM J4 ATTENUATION REJECT
HEAD OUTPUT FILTER 9A,B 9A,B 9A,B J14 BLU
J3 J153 J2 28 dB l
SHT 6 OR 6A 6A 6A
7B OR 7C HD COIL ID 1 J3
COIL
J150 J3 ID
68.86 MHZ 10VDC 6B 6B 6B
6 HD COIL PRESENT 1
NOTES: 8 4 9 1A,B:3A,B
J1 9 PIN CONNECTOR 5A,B
8A,B;10AB
1 THESE CONNECTIONS WILL BE CROSSED IF MAGNET FIELD TO
IS REVERSED 2
”A” CONNECTOR EXTREMITY/QUAD MULTI–COIL REVERSE FIELD
ASSEMBLY J11 2 2 RECEIVE ONLY
2 OPTIONAL COIL ADAPTERS 50 OHM HEAD COIL ADAPTER QUAD HEAD
E1 E6 (MG2A16A6) SHT 9A COIL ADAPTER SURFACE COIL
RF LOAD (MG2A16A6) ADAPTER
3 TEST JACK 2A,B J13 2A,B
2A,B J15 (MG2A16A6)
4 SHOWN IN THE RECEIVE STATE (–15V DC)
NOT SHOWN IS TRANSMIT STATE (+ 8V DC, UNDER LOAD) MNS RCVE 4A,B 4A,B
5 4A,B
SHOWN IN HEAD MODE J2 SAME AS
EXTREMITY QUAD
6 7A,B HEAD 7A,B
OPTIONAL: SEE MNS MANUAL COIL 7A,B
COIL
7 ASSM
MNS XMIT 9A,B J14 9A,B J17
9A,B J16
8 J1 SURFACE
ISOLATION BOXES NOT ON TWINSPEED SYSTEM COIL
6A 6A
COIL 6A COIL
ID COIL ID
EXCITE HD (12.x), HDx (14.x) & HDxt (1.5.x, 16.x or Later) 6B
6B
ID 6B
MGD/RRF/RF SUBSYSTEM
(12.x – Forward Production & Upgrades)
(14.x – Upgrades)
MAGNET ROOM & RELATED COMPONENTS
SHEET 8A OF 16

FROM PEN PANEL MAGNET REAR PEDESTAL (MG3) MAGNET ENCLOSURE (MG2)
SRFD II J4 (PP1) J44 BODY QUADRATURE HYBRID ASSEMBLY (MG3A3) 8
SHT 6 OR BODY OUTPUT DIRECT BODY COIL ASSEMBLY (MG2A12)
7B OR 7C DRIVE ISOLATION BOX
IMAGE BODY T/R SWITCH DISABLE
REJECT (MG3A3A1) (MG3A3A3) J3/J4 J3/J4 EPOXY FILLED GRADIENT COIL TRM OR BRM
(NOTCH) J1 J4 1/4l J1
PREAMP BD l/4
FILTER OUT (A1) IN
PUT P2 P1 PUT 4 1 DYNAMIC DISABLE DYNAMIC DISABLE
36 dB SWITCH BOARD SWITCH BOARD
l/4 l/4
(MG2A12A9, DDSB6) 5 5
(MG2A12A4, DDSB1)
68.86 MHZ
J2 J1 J1
l/4 5 RF BODY
BODY COIL PREAMP 8 CARTRIDGE
CABLE I/F (MG3A3A5) PIN DIODE ISOLATION BOX
(MG2A12A1)
TO (MG3A17) T/R SWITCHES BODY HEAD HEAD BODY
SYS CAB OR J202 J2 J2
OR RFS CAB J202 2 2 J4 QUAD J3/J4 J3/J4
J3 1 J2
SHT 4A, 4B, OR 4C UTNS3 3 SPLITTER
J4 (MG3A3A2)
FROM J2 ANTENNA
1/4l A11, DDSB8 A6. DDSB3
HEAD OUTPUT (MG3A8) J5 J6
J3 J3
SHT 6 OR J1 A10, DDSB7 A5, DDSB2
7B OR 7C
J35 A8, DDSB5 A7, DDSB4
TO J200 8
RFS CAB OR HEAD J36
SYS CAB J200 J1 LOW PROFILE CARRIAGE ASSEMBLY (MG2 A16)
SHT 4A, 4B, OR 4C MC1–MC8
J20 TO SRI–3 J20
16 CHANNEL J7 J8 J9 J10 REAR DYNAMIC
DISABLE BIAS
FRONT DYNAMIC
DISABLE BIAS J7 J8 J9 J10
TO J201 8 SWITCH 1 J23 J18
RFS CAB OR INTERFACE BOARD SPLITTER SPLITTER
SYS CAB J201 9 J2 J9 (MG2A12A12) (MG2A12A13)
SHT 4D MC9–MC16 J21 J12 J11 J12 J11
J21
See J18 J6 J5 J4 J3
Sheet 11 J22 J5 IMAGE J1
for details J17

9
J6 REJECT J2 9
J7 FILTER 1
J24 J3
See Sheet 9D
J19 J8
for details ”A” CONNECTOR
MC17–24 J56 8
TO J306 J1 J19
7 J57
TO J307 J2 J22 J5 IMAGE J1 J1
32 CHANNEL MC25–32 8
CABINET 16 CHANNEL J17 J6 REJECT J2 J20
SWITCH 2 J24 J7 FILTER 2 J3 J17
DYNAMIC
DISABLE 7 J19 J8 7
FILTER MULTICOIL INTERFACE BOX
MODULE
(PP1A11)
DRIVER MODULE DD J94 J74
DD ”B” CONNECTOR
J23 SHT 5B OR 5D
FILTER 3 9
DRIVER MODULE BD4 J96 J76

DD4
J25 SHT 5B OR 5D SPLIT HEAD COIL T/R NETWORK CONNECTOR
FILTER 5 M7 M4
”C” CONNECTOR
PIN DIODE T/R
DD3
7 2 4 SWITCH COIL
J24 SHT 5B OR 5D ID M8 M8
FILTER 4
XMIT C F2 F2
DD2 J3
J22 SHT 5B OR 5D A1 A1
FILTER 2 TO HEAD COIL
RCVE RECEIVE
LOAD RF FILTER COIL
DD1 J2
BLUE PRESENT A2 A2
J21 SHT 5B OR 5D
FILTER 1
C H3 H3 50 OHM
NOTES: RF LOAD
THESE CONNECTIONS WILL BE CROSSED IF MAGNET FIELD TRANSMIT K9 K9
1
IS REVERSED LOAD PREAMP
2 SELECT
OPTIONAL COIL ADAPTER ENABLE K10 K10
3 TEST JACK
C C1
4 SHOWN IN THE RECEIVE STATE (–15V DC)
NOT SHOWN IS TRANSMIT STATE (+ 8V DC, UNDER LOAD)
PIN DIODE T/R SWITCH M9 M9
5 SHOWN IN HEAD MODE 6 J1 MNS XMIT COIL
6 OPTIONAL: SEE MNS MANUAL PRESENT M10 M10
7 32 CHANNEL SYSTEM ONLY
6 J2 MNS RCV
8 ISOLATION BOXES NOT ON TWINSPEED SYSTEM
9 NOT INCLUDED WITH NEWER 8 CHANNEL SYSTEMS.

DD4 (–15V HEAD/+550V BODY)
REQUIRED FOR 16 CHANNEL SYSTEMS ONLY.
DD3 (–15V HEAD/+550V BODY)
HDx (14.x) & HDxt (1.5.x, 16.x or Later) MGD/RRF/RF DD2 (–15V HEAD/+550V BODY)
SUBSYSTEM (Forward Production) DD1 (–15V HEAD/+550V BODY)
MAGNET ROOM & RELATED COMPONENTS

SHEET 8B OF 16

LOW PROFILE CARRIAGE ASSEMBLY (MG2 A16)

SYSTEM CABINET PENETRATION 16 CHANNEL SWITCH ASM MAGNET
(MR2) PANEL (MG3 A36) ENCLOSURE MNS MULTICOIL ASSEMBLY (MG2 A16 A8)
SPECTRO & (MG2)
RRF MULTICOIL PLATE J2 MULTICOIL BOARD ASSEMBLY #8
PREAMP RFIN T/R
MOTHER BOARD 8HR BRAIN COIL SHOWN
CHASSIS (PP1) (RX) 28dB PREAMP 8 PIN
See Sheet 11 CABLE J8
IMAGE
REJECT
RF IN T/R PROTECT
PIN SW
PINS
1
& PHASE ADJ 27–37
MUX CAB for details TRACK FILTER BIAS 8 MC COIL B37 EXTERNAL
BD 1 I/F PREAMP BIAS (10V)
22–PIN BENDIX
TO ”A” CONNECTOR E6 SW CNTL PRESENT 2 PREAMPS
SHT 12A RF IN A37
J5 J200 J200 J1 J23 (EXT. PREAMP) 8
1–8
TO HEAD TR B36
(MC1–8) (1–8) NETWORK J7 MULTICOIL BOARD ASSEMBLY #7 7
75W LOAD
J4 (SAME AS ABOVE) A35
MUX SHT 8A 6
BD 2 J21
8
B34
5
J6 MULTICOIL BOARD ASSEMBLY #6
J5 J201 J201 J2 TO ”A” CONNECTOR COIL ID 2 COIL ID 2
(SAME AS ABOVE) PINS
9–16 J18 SHT 12A 12–26 A34
(A34)
MULTI–COIL ADAPTER (J10) SEE SHT 9E

(MC9–16) B26 (T/R BIAS)
6 (9–16) J5 MULTICOIL BOARD ASSEMBLY #5 8
J24 (SAME AS ABOVE) +/–15V A25,B25 (PREAMP BIAS
MC SW 8
J203 J203 J11 +15V)
FILTER (G1) B24 (T/R BIAS)
PP1 J4 MULTICOIL BOARD ASSEMBLY #4 7
30–PIN BENDIX
(SAME AS ABOVE) B22 (T/R BIAS)
6
J15 MC
12.x: TO J61 OR J5 MC SW COIL ID LEDS ”A” TO A21
14.x: TO J66 OR J10 J78 J78 J10 J3 MULTICOIL BOARD ASSEMBLY #3 COIL PRESENT 2
FILTER (G1) MC BD
PP1 A15 (SAME AS ABOVE) B20 (T/R BIAS)
12.x: TO J66 OR J10 4 4
ASM 5
FROM 14.x: TO J61 OR J5 2–7 COIL ID 2
DRIVER J17 COIL ID LEDS ”B”
MODULE
J2 MULTICOIL BOARD ASSEMBLY #2 A19
MC BIAS B18 (T/R BIAS)
SHT 5A J77 J77 J5 TO ”B” CONNECTOR (SAME AS ABOVE) 4
OR 5B TO J62 OR J3 FILTER (G2) J22 SHT 12A +10V
PP1 A16 8
B16 (T/R BIAS)
3 3 MULTICOIL BOARD ASSEMBLY #1 3
J19 PREAMP
28dB RFIN T/R B14 (T/R BIAS)
IMAGE RF IN T/R PROTECT 2
REJECT PIN SW PREAMP 1
2 & PHASE ADJ B12 (T/R BIAS)
J1 FILTER BIAS 1 1
PREAMP BIAS (10V) RF SW PINS EXTERNAL
SW CNTL CNTRL
J20 RF IN 1–11 PREAMPS
TO SRI–3 J20 (EXT. PREAMP) A4
4
22–PIN BENDIX
SEE NOTE 2 TP3
TP7
REFER TO THE FOLLOWING VREG B3
2 J9 MCD1–8 (PIN SWITCH BIAS 1–8) 10V TP4 3
UNREG
FUNCTIONAL BLOCK DIAGRAM 5.1V A2
FOR ADDITIONAL INFORMATION: 2
5 B1
NOTE: +15V, –15V 1
1) OPERATOR WORKSPACE TP5 VREG
TP1 TP6, TP8 5 10V VREG TP2
A1
2) PATIENT HANDLING (–15V) (+15V) –5V
J11 EXT PREAMP
NOTES: SWITCH CNTRL
1 8 hr brain coil /pin configuration shown. Standard

TO/FROM HEAD T/R
coils use 30 pin bendix; coils with integrated ASSEMBLY J1
preamps use outer 22 pin bendix connectors for rf SHT 8 HEAD COIL PRESENT 1,
2 HEAD COIL ID 1, 10V (HEAD PREAMP BIAS ),GND
inputs and 30 pin connector for coil DC bias. J9 & J19 BENDIX COIL ID LEDS
PIN(S) . . . . . . . SIGNALS
PIN PIN PIN MC PREAMP BIAS FILTER PINOUTS
1 1 1 1,14 . . . . . . . . . –15V 3
B14 B16 B20 J62 OR J3 & J77
1 1 1 2,15 . . . . . . . . . +15V PIN . . . . . SIGNAL NAME
B16 B18 B22 3, 4, 23–25 . . . GND
2 2 2 4
5 . . . . . . . . . . . . MCD8 1 ....... XPT_DATA_POS 5
LOCATED
30–PIN BENDIX
30–PIN BENDIX
30–PIN BENDIX
B18 B20 6 . . . . . . . . . . . . MCD4 J10 & J78

3 3 2 ....... XPT_STROBE_POS PIN(S) . . . . . SIGNAL BEHIND
7 . . . . . . . . . . . . MCD7 3 ....... XPT_OE_N_POS MULTICOIL TEST
B20 B22
4 4 8 . . . . . . . . . . . . MCD3 4 ....... AGND 1–8 . . . . . . . . MCD1–8 (NOTE 1) BD ASSY . . POINT . . . FUNCTION
B22
9 . . . . . . . . . . . . MCD6 5 ....... AGND
5 10 . . . . . . . . . . . MCD2 9 .......... MC CABLE PRESENT_O IN (NOTE 2)
6 ....... +15V (NOTE 1) 10,11 . . . . . . NO CONNECT 7 .......... TP1 . . . . . . . . –15V
B24 11 . . . . . . . . . . . MCD5 7 ....... +15V (NOTE 1) 6 .......... TP2 . . . . . . . . . –5V
6 12 . . . . . . . . . . . MCD1 12–19 . . . . . . MCD9–16 (NOTE 3)
8 ....... +15V (NOTE 1) 20–27 . . . . . . GND 6 .......... TP3 . . RF SW CNTRL SIG
13 . . . . . . . . . . . CTL_PREAMP (NOTE 1) 9 ....... XPT_DATA_NEG 2, 3 . . . . . . . . TP4 . . . . . . . . . 5.1V
6 COIL 4 COIL 2 COIL 16 . . . . . . . . . . . RED_LED 29 . . . . . . . . . MC CABLE PRESENT_1 IN (NOTE 2)
PHASED PHASED PHASED
10 . . . . . . XPT_STROBE_NEG 30–37 . . . . . . GND 1, 2 . . . . . . . . TP5 . . . . . . . +10V_B
ARRAY ARRAY
17 . . . . . . . . . . . YEL_LED 11 . . . . . . XPT_OE_N_NEG 1, 2 . . . . . . . . TP6 . . . . . . . . +15V
ARRAY
18 . . . . . . . . . . . GRN_LED 12 . . . . . . AGND 7, 8 . . . . . . . . TP7 . . . . . . . +10V_A
19 . . . . . . . . . . . COIL PRESENT #1 13 . . . . . . AGND NOTE 1: MULTICOIL BIAS (+3V,+5V,+7V,–5V).
7, 8 . . . . . . . . TP8 . . . . . . . . +15V
20 . . . . . . . . . . . COIL PRESENT #2 NOTE 2: THESE TWO PINS CONNECTED TOGETHER
14 . . . . . . –15V (MC COILS) ON J10 FOR DIAGNOSTIC LOOPBACK.
21 . . . . . . . . . . . COIL ID #1 15 . . . . . . –15V (MC COILS) NOTE 3: NOT USED/CONNECTED AT J10 INSIDE
22 . . . . . . . . . . . COIL ID #2 CROSSPOINT SWITCH ASSEMBLY.
EXCITE HD (12.x) or HDx (14.x Upgrade) 6 Only 16 Channel Systems have a
second MUX board. J201 not used
MGD/RRF/RF SUBSYSTEM NOTE 1: PIN 13 DEFAULT LOW. NOTE 1: ANALOG POWER FOR
in 8 and 4 Channel systems.
PREAMPS (MC & HEAD),
MULTI–COIL MODULES LOW: PREAMP POWER ON.
HIGH: PREAMP POWER OFF. CROSSPOINT & MC COILS.
SHEET 9A OF 16


SYSTEM CABINET PENETRATION 16 CHANNEL SWITCH ASM
(MR2) PANEL (MG3 A36) MULTICOIL INTERFACE BOX
SPECTRO & J19
RRF MULTICOIL PLATE J15
CHASSIS (PP1) See Sheet 11 COIL ID LEDS ”A”
J9 J1
for details INTERFACE BOARD
J10 J2
MUX CAB
J11 J3
BD 1 I/F COIL ID LEDS ”B”
J21 ”A”
J5 J200 J200 J1
MC1–8 8 J12
See Sheet 9D J4 MC1–8 CONNECTOR
J13 J5
1–8
for details
J14 J6
(MC1–8) (1–8)
J15 J7
MUX J18 J16 5 J8
7
BD 2 MC BIAS 1–8
J5 J21 J20 ”B”

9–16 J201 J201 J2 CONNECTOR
7 7
(MC9–16) 8
6 (9–16) J23 J2
8:8
9 (RX) MNS
MC SW
J203 J203 J11
FILTER (G1)
PP1
J3
J20
MC SW 7 TO SRI–3 J20
J78 J78 J10 SEE NOTE 2
TO J66 OR J10 FILTER (G1) IMAGE REJECT FILTER
7 7
PP1 A15
4 4 9
FROM TO J61 OR J5
DRIVER J5 J1
MODULE MC BIAS MC1–8 OR 9–16 8 8 MC1–8 OR 9–16, MC BIAS9–16
SHT 5C J77 J77 J5 J22 7 8
OR 5D TO J62 OR J3 FILTER (G2) 7 8
PP1 A16
3 3
J2
MC BIAS9–16
7 8
MCBIAS 9 MCBIAS 16
J6
MC BIAS 9–16
8 7 J17 J4
J19
J8
8 7 2 MC BIAS 17–24
J9
HART ID
MCBIAS 17 MCBIAS 24
IR1
REFER TO THE FOLLOWING IR2
FUNCTIONAL BLOCK DIAGRAM IR3
FOR ADDITIONAL INFORMATION: MC1–8 8
J7
IR4
J3
8 MC1–8, MC BIAS 17–24
J24 7 8
IR5
NOTE: 7 8
1) OPERATOR WORKSPACE IR6
2) PATIENT HANDLING IR7
IR8
2
NOTES: J8 & J19
PIN(S) . . . . . . . SIGNALS
1
MC PREAMP BIAS FILTER PINOUTS
5
1,14 . . . . . . . . . –15V 3 J62 OR J3 & J77 4
J10 & J66 TESTPOINT . FUNCTION
2,15 . . . . . . . . . +15V PIN . . . . . SIGNAL NAME PIN(S) . . . . . SIGNAL
3, 4, 23–25 . . . GND TP1 . . . . . . . . SYSTEM PREAMP ENABLE (+15V OR 0V)
5 . . . . . . . . . . . . MCD8 1 ....... XPT_DATA_POS 1–8 . . . . . . . . MCD1–8 (NOTE 1) TP2 . . . . . . . . PREAMP SELECT 1
6 . . . . . . . . . . . . MCD4 2 ....... XPT_STROBE_POS 9 .......... MC CABLE PRESENT_O IN (NOTE 2) TP3 . . . . . . . . PREAMP SELECT 2
7 . . . . . . . . . . . . MCD7 3 ....... XPT_OE_N_POS 10,11 . . . . . . NO CONNECT TP4 . . . . . . . . 8.5V_A
8 . . . . . . . . . . . . MCD3 4 ....... AGND 12–19 . . . . . . MCD9–16 (NOTE 3) TP5 . . . . . . . . +10V_B CNTRL
9 . . . . . . . . . . . . MCD6 5 ....... AGND 20–27 . . . . . . GND TP6 . . . . . . . . +15V
10 . . . . . . . . . . . MCD2 6 ....... +15V (NOTE 1) 29 . . . . . . . . . MC CABLE PRESENT_1 IN (NOTE 2) TP7 . . . . . . . . +5.1V
11 . . . . . . . . . . . MCD5 7 ....... +15V (NOTE 1) 30–37 . . . . . . GND TP8 . . . . . . . . +15V
12 . . . . . . . . . . . MCD1 8 ....... +15V (NOTE 1) TP9 . . . . . . . . +15V
13 . . . . . . . . . . . CTL_PREAMP (NOTE 1) 9 ....... XPT_DATA_NEG TP10 . . . . . . . 8.5V_B
16 . . . . . . . . . . . RED_LED NOTE 1: MULTICOIL BIAS (+3V,+5V,+7V,–5V). TP11 . . . . . . . . 8.5V_C
10 . . . . . . XPT_STROBE_NEG NOTE 2: THESE TWO PINS CONNECTED TOGETHER
17 . . . . . . . . . . . YEL_LED 11 . . . . . . XPT_OE_N_NEG ON J10 FOR DIAGNOSTIC LOOPBACK. TP12 . . . . . . . –15V
18 . . . . . . . . . . . GRN_LED 12 . . . . . . AGND NOTE 3: NOT USED/CONNECTED AT J10 INSIDE TP13 . . . . . . . –8.5V
19 . . . . . . . . . . . COIL PRESENT #1 13 . . . . . . AGND CROSSPOINT SWITCH ASSEMBLY.
20 . . . . . . . . . . . COIL PRESENT #2 14 . . . . . . –15V (MC COILS)
6 Only 16 Channel Systems have a second MUX board.
21 . . . . . . . . . . . COIL ID #1 15 . . . . . . –15V (MC COILS)
22 . . . . . . . . . . . COIL ID #2
7 Required on 16 or 32 Channel systems.
HDx (14.x) & HDxt (1.5.x, 16.x) MGD/RRF/RF B Connector and MC Bias lines are not included in newer
8
SUBSYSTEM NOTE 1: PIN 13 DEFAULT LOW. NOTE 1: ANALOG POWER FOR 8 Channel systems.
8 and 16 CHANNEL MULTI–COIL LOW: PREAMP POWER ON. PREAMPS (MC & HEAD),
CROSSPOINT & MC COILS.
9 Optional: See MNS manual
SHEET 9B OF 16 HIGH: PREAMP POWER OFF.


SYSTEM CABINET PENETRATION 16 CHANNEL SWITCH
(MR2) PANEL (MG3 A36) MULTICOIL INTERFACE BOX
SPECTRO & J19
RRF MULTICOIL PLATE J15
CHASSIS (PP1) See COIL ID LEDS ”A”
Sheet 11 J9
INTERFACE BOARD
J1
J10
MUX CAB for details J11
J2
BD 1 I/F J21 COIL ID LEDS ”B” J3
J5 J200 J200 J1
MC 1–8 8 J12
See Sheet 9D J4 MC 1–8 ”A”
J13
1–8
for details J5 CONNECTOR
J14
(MC1–8) (1–8) J6
J15
J7
MUX J16 5
J8
BD 2 J18 MC BIAS 1–8 J21
J20 ”B”
J5 Q CONNECTOR
9–16 J201 J201 J2
J23 J2
MC 8 : 8
6 (MC9–16) (9–16) (RX) MNS
J3
MC SW ”C”
J203 J203 J11 CONNECTOR
TO J61 OR J5 FILTER (G1) COIL ID LEDS ”C”
PP1 J20
TO SRI–3 J20
FROM SEE NOTE 2
DRIVER TO J62 OR J3 IMAGE REJECT FILTER #1
MODULE MC SW
SHT 5A J78 J78 J10 J4
OR 5B TO J66 OR J10 FILTER (G1) MC 1–8 OR 9–16, MC BIAS 9–16 8
PP1 A15 MC 1–8 8 J1
J24 J7
4 4 MC BIAS 9–16
MC BIAS 9–16 J2
32 CHANNEL CAB MC BIAS

J17 J6
See Sheet 9B MC 1–8, MC BIAS 17–24 8
J77
FILTER (G2)
J77 J5
J22
MC 1–8 OR 9–16 8
J5 for details J3
PP1 A16
RRF 3 3 J19
CHASSIS 2
MC BIAS 17–24 COIL ID, COIL PRES. 2
J8 J9
CAB COIL ID, COIL PRES. 2
MUX I/F
BD 1
J5 16 CHANNEL SWITCH IMAGE REJECT FILTER #2
J306 J56
17–24 (MG3 A36) MC 17–24 8 MC 17–24 OR 25–32, MC BIAS 25–32 8
J24 J7 J1
(MC17–24) J10 MC BIAS 25–32 J6 MC BIAS 25–32
J17 J2
J11
MUX MC 17–24 OR 25–32 8 See Sheet 9B MC 17–24, MC BIAS 1–8 8
BD 2 J5 J22 J5 J3
J5
J1 (17–24) J19
for details
25–32 J307 J57
J8
J2 (25–32) MC BIAS 1–8
(MC25–32) 2
2
J8 & J19
REFER TO THE FOLLOWING PIN(S) . . . . . . . SIGNALS
FUNCTIONAL BLOCK DIAGRAM
MC PREAMP BIAS FILTER PINOUTS
FOR ADDITIONAL INFORMATION: 1,14 . . . . . . . . . –15V 3
4
J62 OR J3 & J77 J10 & J66
5
TESTPOINT . FUNCTION
2,15 . . . . . . . . . +15V PIN . . . . . SIGNAL NAME
NOTE: PIN(S) . . . . . SIGNAL
3, 4, 23–25 . . . GND
1) OPERATOR WORKSPACE TP1 . . . . . . . . SYSTEM PREAMP ENABLE (+15V OR 0V)
2) PATIENT HANDLING 5 . . . . . . . . . . . . MCD8 1 ....... XPT_DATA_POS 1–8 . . . . . . . . MCD1–8 (NOTE 1) TP2 . . . . . . . . PREAMP SELECT 1
6 . . . . . . . . . . . . MCD4 2 ....... XPT_STROBE_POS 9 .......... MC CABLE PRESENT_O IN (NOTE 2) TP3 . . . . . . . . PREAMP SELECT 2
7 . . . . . . . . . . . . MCD7 3 ....... XPT_OE_N_POS
NOTES: 10,11 . . . . . . NO CONNECT TP4 . . . . . . . . 8.5V_A
8 . . . . . . . . . . . . MCD3 4 ....... AGND 12–19 . . . . . . MCD9–16 (NOTE 3) TP5 . . . . . . . . +10V_B CNTRL
1 9 . . . . . . . . . . . . MCD6 5 ....... AGND 20–27 . . . . . . GND TP6 . . . . . . . . +15V
10 . . . . . . . . . . . MCD2 6 ....... +15V (NOTE 1) 29 . . . . . . . . . MC CABLE PRESENT_1 IN (NOTE 2) TP7 . . . . . . . . +5.1V
11 . . . . . . . . . . . MCD5 7 ....... +15V (NOTE 1) 30–37 . . . . . . GND TP8 . . . . . . . . +15V
12 . . . . . . . . . . . MCD1 8 ....... +15V (NOTE 1) TP9 . . . . . . . . +15V
13 . . . . . . . . . . . CTL_PREAMP (NOTE 1) 9 ....... XPT_DATA_NEG TP10 . . . . . . . 8.5V_B
16 . . . . . . . . . . . RED_LED 10 . . . . . . XPT_STROBE_NEG NOTE 1: MULTICOIL BIAS (+3V,+5V,+7V,–5V).
NOTE 2: THESE TWO PINS CONNECTED TOGETHER TP11 . . . . . . . . 8.5V_C
17 . . . . . . . . . . . YEL_LED 11 . . . . . . XPT_OE_N_NEG ON J10 FOR DIAGNOSTIC LOOPBACK. TP12 . . . . . . . –15V
18 . . . . . . . . . . . GRN_LED 12 . . . . . . AGND NOTE 3: NOT USED/CONNECTED AT J10 INSIDE TP13 . . . . . . . –8.5V
19 . . . . . . . . . . . COIL PRESENT #1 13 . . . . . . AGND CROSSPOINT SWITCH ASSEMBLY.
20 . . . . . . . . . . . COIL PRESENT #2 14 . . . . . . –15V (MC COILS)
21 . . . . . . . . . . . COIL ID #1 15 . . . . . . –15V (MC COILS)
22 . . . . . . . . . . . COIL ID #2
HDx (14.x) & HDxt (15.x) MGD/RRF/RF 6 Only 16 Channel Systems have a
SUBSYSTEM second MUX board. J201 not used
NOTE 1: PIN 13 DEFAULT LOW. NOTE 1: ANALOG POWER FOR
in 8 and 4 Channel systems.
32 CHANNEL MULTI–COIL LOW: PREAMP POWER ON. PREAMPS (MC & HEAD),
SHEET 9C OF 16 HIGH: PREAMP POWER OFF. CROSSPOINT & MC COILS.

”A” CONNECTOR PREAMP SELECT

PINS K9, K10
XMT
PIN E1
COIL ID ”A”, TX EN, MC SELECT, –15V, +10V, +15V
D4
See D3
MULTICOIL INTERFACE ASM
Sheet 12B D2
MC BOARD ASM 8
for details D1 MC BIAS 8 MOTHERBOARD
C4 8.5V_A COIL ID ”A”, TX ENABLE, MC SELECT
J8
C3
DS9
C2 GRN
T/R PROTECT HEAD TR BIAS 2 F1
C1 –15V
37 PIN SUB–D
& PHASE ADJ
J16 RF IN
DS8
J19
PREAMP 28dB PREAMP SEL 1 GRN
10V F2
SW CNTL 2 PREAMP SEL 2
J7 MC BOARD ASM 7 DS7

GRN
+15V F3
HEAD TR BIAS 2
J15
J6 J17
RF N
MC BOARD ASM 6 HEAD TR BIAS 2
HEAD TR BIAS 2
J14
J5 J18 FROM HEAD
RF N
MC BOARD ASM 5 HEAD TR BIAS 1
RF/TR IN
HEAD TR BIAS 2
BACKPLANE
J13
CABLE I/F
COIL ID ”A”, TX EN, MC SELECT, J2
MC BIAS 1–8 –15V, +10V, +15V, MC BIAS 1–8
TO J4 MC BOARD ASM 4
16 CHANNEL TP1
SWITCH HEAD TR BIAS 1 TP2
J21 J12 DS5 DS6
GRN GRN PREAMP SEL. 1
J3 MC BOARD ASM 3 PREAMP
TP3 SELECT
MOLEX
HEAD TR BIAS 1 DS3 DS4 J20
J11 CONTROL
GRN GRN PREAMP SEL. 2
J2 MC BOARD ASM 2 TP4 PREAMP

POWER TP5
HEAD TR BIAS 1
J10
37 PIN SUB–D
TP13 TP7
MC BOARD ASM 1 MC BIAS 1
J21 FROM
TP11 TP10
8.5V_A
16 CHANNEL
TESTPOINT . FUNCTION J1 SWITCH
RF IN 8.5V_A 5.1V 8.5V_C 8.5V_B
VREG UNREG VREG VREG J18
TP1 . . . . . . . . SYSTEM PREAMP ENABLE (+15V OR 0V)
T/R PROTECT HEAD TR BIAS 1 DS1
TP2 . . . . . . . . PREAMP SELECT 1 TP6 TP9 TP8
& PHASE ADJ GRN
TP3 . . . . . . . . PREAMP SELECT 2 RF OUT
J9 RF IN
+15V
TP4 . . . . . . . . 8.5V_A DS2
TP5 . . . . . . . . +10V_B CNTRL PREAMP 28dB PREAMP SEL 1 GRN
TP6 . . . . . . . . +15V TP12
SW CNTL 2 PREAMP SEL 2 –8.5V –15V
TP7 . . . . . . . . +5.1V VREG
TP8 . . . . . . . . +15V
TP9 . . . . . . . . +15V
TP10 . . . . . . . 8.5V_B
TP11 . . . . . . . . 8.5V_C
TP12 . . . . . . . –15V
TP13 . . . . . . . –8.5V
HDx (14.x) & HDxt (15.x, 16.x or Later) MGD/RRF/RF SUBSYSTEM

LPCA MULTI–COIL INTERFACE ASM
SHEET 9D OF 16

OR
1 (17–24)
NOTES:
1 MC BIAS is 17–24 on 14.x systems.
EXCITE HD (12.x) & HDx (14.x) MGD/RRF/RF SUBSYSTEM

MULTI–COIL ADAPTER (J10)
SHEET 9E OF 16

MAGNET ENCLOSURE
(MG2)
PHYSIOLOGICAL ACQUISITION CONTROLLER (PAC II) MODULE

(MG2A11)
PHYSIOLOGICAL ACQUISITION CONTROLLER (PAC II) MODULE
(MG2A11A1)
ECG SIGNAL ACQUISITION CIRCUIT
ISOLATED CIRCUIT TO
OPERATION/DIAG STIF BOARD VIA
ÎÎÎÎÎÎÎÎ
ÎÎ
LED DS2 J10 J1 PP1 A17 A1 J2
FROM PATIENT J2 4 SERIAL 0–5 P2(0) TXD OPTIC TXD PAC
GAIN LOW PASS OPTIC XMIT SHT 2
ECG LEADS DAC
ÎÎ
AMP FILTER ISOLATION 80C196
J9
P2(1) RXD RXD PAC
ÎÎ Î
CPU OPTIC
RCVR FROM
STIF BOARD VIA
J8
ÎÎ ÎÎÎÎÎÎÎ
Î Î Î
DBTXD PP1 A17 A1 J1
RESPIRATION SIGNAL ACQUISITION CIRCUIT DATA 0–15 1 SHT 2
DBRXD
ÎÎ ÎÎÎ
ÎÎ
ÎÎÎ
2
DBGND
3
DUAL
Î ÎÎ ÎÎ
ÎÎ
ÎÎÎÎ
J3 R12 LATCH VCC DEBUG
PRESSURE LEVER OUTPUT RESP UART/RS232 4
BELLOWS 100X DAC (16 BIT) DRVRS SPTXD TERMINAL
TRANSDUCER SHIFTER BUFFER BIT 6
Î ÎÎÎ Î ÎÎ
ÎÎ
ÎÎÎÎ ÎÎ
AUX 1 MAIN REVERSE PORT
ADC SPRXD
REGISTER 7
(MG2A11A2) P–PULSE
SPGND
Î ÎÎÎ Î ÎÎ
ÎÎÎ
ÎÎÎ ÎÎ
16KX16 8
BAR GRAPH J1 J4 J5 EPROM VCC
9
ÎÎ
ÎÎÎ ÎÎ
ÎÎ
ÎÎÎÎ ÎÎ
DATA 0–15
32KX8
ÎÎÎ
ÎÎ Î
ÎÎ
ÎÎÎÎÎÎÎÎ
Î ÎÎ
SRAM
AUX DATA ACQUISITION CIRCUIT
SERIAL 0–3
J6
Î ÎÎ
ÎÎ
ÎÎ Î
+5V ADDR 0–15
2
AUXIN
Î ÎÎÎÎÎ
ÎÎ Î
Î Î
3
NOT
USED AGND
4
ÎÎ ÎÎÎÎ
ADDR 0–15 1
AGND PAC
5 +15V
CONTROL 1 2
LOGIC +12V
J6 AUX DATA ACQUISITION CIRCUIT 12 13 14
–12V J7 J2
FROM FIBER OPTIC 4 5 FROM
LGN REAR I/F BOARD SSM J35
PLETH. PROBE I/F J5 6 7 8 15
OPTIC DS1 HIGH –15V IN SRFD OR SRFD II CABINET
RCVR 9 10 NOTE 1
J7 J1 PEAK LEVEL UP–DOWN* AGND OR FROM PHPS J89
LDRV COMP 3 11
2 LOW
A
COL 400X DAC 10X OUT
FROM 3
STANDARD B
PLETH.
ATTN 0–11
PROBE I/F GND

4
GND
5
J5
(MG2A11A3)
BAR GRAPH J4
J1
NOTES:
1 MULTIPLE WIRES/PINS WITH SAME SIGNAL ARE NOT SHOWN
REFER TO THE FOLLOWING FUNCTIONAL BLOCK DIAGRAM

NOTE:
1) PATIENT HANDLING
HDx (14.x) & HDxt (15.x, 16.x or Later) MGD/RRF/RF SUBSYSTEM

PHYSIOLOGICAL ACQUISITION CONTROLLER II
SHEET 10 OF 16

NOTES:
16 CHANNEL SWITCH
(MG2 A11) 1 Switch positions shown in 16
J21 Channel Receive mode.
16 CHANNEL SWITCH (3.0T) 2 More connector pinouts
CH. 1 (MG2A11) present on sheet 9A.
CH. 2 J17
+/– 15V 3 J5 PINS . SIGNALS
CH. 3 12.x: MC T/R BIAS 25–32 14.x MC T/R BIAS 9–16 OR 25–32
J11
1 ....... XPT_DATA_POS
CH. 4 FROM PEN PANEL J203
2 ....... XPT_STROBE_POS
TO “B” CONNECTOR
CH. 5 3 ....... XPT_OE_POS
4, 5 . . . . . OPEN
CH. 6 6, 7, 8 . . . +15V
CH. 7 9, 10 . . . . OPEN
J18
+/–15V
11, 12 . . . GND
CH. 8 13 . . . . . . OPEN
12.x: MC T/R BIAS 17–24 14.x MC T/R BIAS 1–8 4
14 . . . . . . XPT_DATA_N
15 . . . . . . XPT_STROBE_N
TO “A” CONNECTOR 16 . . . . . . XPT_OE_N_N
J22 17, 18 . . . OPEN
19, 20, 21 GND
CH. 1/9 22, 23 . . . OPEN
24, 25 . . . –15V
CH. 2/10 J19
+/–15V
J10 4
CH. 3/11 12.x: MC T/R BIAS 1–8 14.x MC T/R BIAS 17–24 OR 1–8
FROM PEN PANEL J78
LED’s
2
CH. 4/12 TO MC ASM
D COIL ID A GREEN D –15V POWER
D COIL ID A RED D +15V POWER
CH. 5/13 D COIL ID B GREEN D +24V POWER
D COIL ID B RED D J21 ON CH. 1–4
CH. 6/14 D COIL ID LEGACY GREEN D J22 ON CH. 1–4
J15 D COIL ID LEGACY RED D J23 ON CH. 1–4
CH. 7/15 COIL BODY TX HART EXT. MUX D COIL PRESENT A D J24 ON CH. 1–4
TO COIL LED’S COIL LED COIL ID
PRESENT ENABLE COIL ID CONTROL
CH. 8/16 J5
D COIL PRESENT B D J21 ON CH. 5–8
J20 D COIL PRESENT 1 D J22 ON CH. 5–8
3 D COIL PRESENT 2 D J23 ON CH. 5–8
D TX ENABLE A D J24 ON CH. 5–8
TO/FROM SRI–3 J20 D TX ENABLE B D J22 ON CH. 9–12
J23 VOLTAGE FROM PEN PANEL J77 D DIAG OUT D J22 ON CH. 13–16
REGULATOR +/–15V
D DIAG IN
SERIAL LOGIC INPUT
CH. 1 PLD
J35 J36
CH. 2 TO CABLE I/F 11.5dB FROM UTNS3 ANTENNA
16 CHANNEL SWITCH 1.5T
CH. 3 (MG2 A11)
J25
CH. 4 TO PEN PANEL J150 HEAD TX SWITCH CONTROL
J1
CH. 5 J21
A1:A8 IR 8 4 A1–A4 CH. 1
CH. 6 12.x: FROM “A” CONNECTOR
FILTER 4
(SEE ILLUSTRATION ON LEFT) x8 B1–B4
RCV1:RCV4 4
J1 CH. 2
CH. 7 14.x: FROM MC ASM J9–16 4 GAIN TO PEN PANEL J200
H1–H4 x4 (SEE ILLUSTRATION ON RIGHT) CH. 3
CH. 8 L1–L4
MC1,HEAD1=8dB
OR PEN PANEL J56
J22 IR B1–B8 8 ALL OTHERS=7dB (14.X: 32 CHANNEL ONLY)) CH. 4
B1:B8 FILTER 8 SP4T X 4
12.x: FROM “B” CONNECTOR #1
(SEE ILLUSTRATION ON LEFT) x8 B1–B8 4 CH. 5
14.x: FROM IMAGE REJECT FILTER J5 63.86 MHZ
J24 SP2T X 8 TEST OSC. CH. 6
63.86 MHZ
TEST OSC. CH. 7
J23 MC5=8dB
CH. 1 FROM HEAD T/R J4 H1(HEAD):H8(MNS) 4 4 A5–A8 ALL OTHERS=7dB CH. 8
AND
CH. 2 MNS RECEIVE J2
F
B5–B8
GAIN RCV5:RCV8 4
(SEE ILLUSTRATION ON LEFT) 8 8 H5–H8 x4
CH. 3 +15V
4 L5–L8
J2
CH. 4 J24 4
8 SP4T X 4
12.x: FROM MC ASM J1–J8 #2 CH. 9
CH. 5 (SEE ILLUSTRATION ON LEFT)
14.x FROM IMAGE REJECT FILTER J7 7dB J2 CH. 10
CH. 6 8
GAIN RCV9:RCV16 8 TO PEN PANEL J201
x8 (SEE ILLUSTRATION ON RIGHT) CH. 11
CH. 7 OR PEN PANEL J57
1
(14.X, 32 CHANNEL ONLY) CH. 12
CH. 8
CH. 13
CH. 14
CH. 15
CH. 16
16 CHANNEL SWITCH (1.5T)
SHEET 11A OF 16

NOTES:
DEPOPULATED 16 CHANNEL
SWITCH 1.5T (MG2 A11) 1 Switch positions shown in 8
Channel Receive mode.
DEPOPULATED 16 CHANNEL SWITCH (1.5T) 2 More connector pinouts
J21 (MG2A11) present on sheet 9A.
J17 3 J5 PINS . SIGNALS
+/– 15V
CH. 1 J11
12.x: MC T/R BIAS 25–32 14.x MC T/R BIAS 9–16 OR 25–32
CH. 2 1 ....... XPT_DATA_POS
FROM PEN PANEL J203
2 ....... XPT_STROBE_POS
CH. 3 3 ....... XPT_OE_POS
4, 5 . . . . . OPEN
CH. 4 6, 7, 8 . . . +15V
CH. 5 9, 10 . . . . OPEN
J18 11, 12 . . . GND
CH. 6 +/–15V
13 . . . . . . OPEN
12.x: MC T/R BIAS 17–24 14.x MC T/R BIAS 1–8 4
CH. 7 14 . . . . . . XPT_DATA_N
15 . . . . . . XPT_STROBE_N
CH. 8 TO “A” CONNECTOR 16 . . . . . . XPT_OE_N_N
17, 18 . . . OPEN
19, 20, 21 GND
22, 23 . . . OPEN
24, 25 . . . –15V
J19
+/–15V
J10 4
12.x: MC T/R BIAS 1–8 14.x MC T/R BIAS 17–24 OR 1–8 LED’s
D COIL ID A GREEN D –15V POWER
D COIL ID A RED D +15V POWER
D COIL PRESENT A D +24V POWER
D TX ENABLE A D J21 ON CH. 1–4
J15
TO COIL LED’S COIL LED COIL BODY TX COIL ID HART EXT. MUX
PRESENT ENABLE COIL ID CONTROL
J5
J20
3
TO/FROM SRI–3 J20 VOLTAGE FROM PEN PANEL J77

REGULATOR +/–15V
SERIAL LOGIC INPUT
PLD
J35 J36
TO CABLE I/F 11.5dB FROM UTNS3 ANTENNA
DEPOPULATED
J25 16 CHANNEL SWITCH 1.5T
TO PEN PANEL J150 HEAD TX SWITCH CONTROL
(MG2 A11)
J21
A1:A8 IR 8 4 A1–A4
12.x: FROM “A” CONNECTOR
FILTER
(SEE ILLUSTRATION ON LEFT) J1
14.x: FROM MC ASM J9–16
x8
GAIN RCV1:RCV4 4
TO PEN PANEL J200 J1
x4 (SEE ILLUSTRATION ON RIGHT)
OR PEN PANEL J56
MC1,HEAD1=8dB
(14.X: 32 CHANNEL ONLY))
CH. 1
SP4T X 4 ALL OTHERS=7dB
#1 CH. 2
63.86 MHZ CH. 3
TEST OSC.
63.86 MHZ
TEST OSC. CH. 4
MC5=8dB
4 A5–A8 ALL OTHERS=7dB CH. 5
RCV5:RCV8 4 CH. 6
GAIN
x4 CH. 7
CH. 8
SP4T X 4
#2
HDx (14.x) & HDxt (15.x, 16.x) MGD/RRF/RF SUBSYSTEM – 8 CHANNEL

16 CHANNEL SWITCH (1.5T)
SHEET 11B OF 16

View from pin side of Female Connector Assembly inside LPCA Contact Function Allocation
I1 H1 G1 F1 E5 E3 E1 D1 C1 B1 A1 Pin Twisted Description Comments
with
E1 n/a Transmit signal up to 2kw (1.5T) or 4kw (3.0T) PEP. “A” Connector only. Not present in “B” Connector
E2 n/a Key blocked in receptacle C
E3 n/a Key blocked in receptacle A Blocked for “A”
E4 n/a Key blocked in receptacle B Blocked for “B”
E5 n/a Key blocked in receptacle D
E6 n/a Reflected power to 50 ohm load 2.5kw PEP, 50w RMS. “A” Connector only. Not present in “B” Connector
F1 G1 MC bias 1 MC T/R Bias Line 17 for “A”, 25 for “B”
I10 H10 G10 F10 E6 E4 E2 D4 C4 B4 A10 F5 G5 MC bias 5 MC T/R Bias Line 21 for “A”, 29 for “B”
F9 F10 body transmit enable
F10 F9 body transmit enable return
Contact Function Allocation G1 F1 MC bias return 1 MC T/R Bias Line 17 for “A”, 25 for “B”
Pin Twisted Description Comments G2 F2 MC bias return 2 MC T/R Bias Line 18 for “A”, 26 for “B”
with
G3 F3 MC bias return 3 MC T/R Bias Line 19 for “A”, 27 for “B”
A1 A2 coil present
A2 A1 coil present return
A3 A4 multiplexerSelect0 RS–422+
A4 A3 multiplexerSelect0 return RS–422–
A5 A6 multiplexerSelect1 RS–422+ G7 F7 MC bias return 7 MC T/R Bias Line 23 for “A”, 31 for “B”
A6 A5 multiplexerSelect1 return RS–422– G8 F8 MC bias return 8 MC T/R Bias Line 24 for “A”, 32 for “B”
A7 A8 multiplexerSelect2 RS–422+ G9 n/a Reserved
A8 A7 multiplexerSelect2 return RS–422– G10 n/a Reserved
A9 A10 multiplexerSelect3 RS–422+ H1 n/a Reserved
A10 A9 multiplexerSelect3 return RS–422– H2 n/a Reserved
B1 n/a Key blocked in receptacle E H3 n/a Reserved
B2 n/a Key blocked in receptacle F H4 n/a Reserved
B3 n/a Key blocked in receptacle G H5 n/a Reserved
B4 n/a Key blocked in receptacle H H6 n/a Reserved
C1 n/a MC–1A,B or MC–9B Preamp out 1, no bias, DC blocked H7 n/a Reserved
D1 n/a MC–5A,B or MC–13B Preamp out 5, no bias, DC blocked I1 n/a Reserved
D2 n/a MC–6A,B or MC–14B Preamp out 6, no bias, DC blocked I2 I5 +15Vdc (auxiliary & preamp power)
D4 n/a MC–8A,B or MC–16B Preamp out 8, no bias, DC blocked I4 n/a –15Vdc (auxiliary power)
I5 I2 Return for aux power
I7 I8 coil ID (Dallas OneWire protocol) All coils MUST have coil ID.
I8 I7 coil ID return (Dallas OneWire protocol) All coils MUST have coil ID.
8 Channel Multicoil “A” and “B” Connector I9 I10 coil present’
SHEET 12A OF 16
I10 I9 coil present return’

View from pin side of Female Connector Assembly inside LPCA Contact Function Allocation
M1 L1 K1 J1 I1 H1 G1 F1 E1 D1 C1 B1 A1 Pin Twisted Description Comments
with
F2 n/a Transmit Signal up to 8kw PEP
H3 n/a Reflected power to 50 ohm load 2.5kw PEP, 50w RMS “A” connector only
J1 K1 MC bias 1
J2 K2 MC bias 2
J3 K3 MC bias 3
J4 K4 MC bias 4
J5 K5 MC bias 5
J6 K6 MC bias 6
J7 K7 MC bias 7
J8 K8 MC bias 8
M10 L10 K10 J10 I4 H4 G4 F4 E4 D4 C4 B4 A10
J9 J10 body transmit enable
J10 J9 body transmit enable return
K1 J1 MC bias return 1
Contact Function Allocation
Pin Twisted Description Comments
with K5 J5 MC bias return 5
A1 A2 coil present K6 J6 MC bias return 6
A2 A1 coil present return K7 J7 MC bias return 7
A3 A4 multiplexerSelect0 RS–422+ K8 J8 MC bias return 8
A4 A3 multiplexerSelect0 return RS–422– K9 K10 System preamp enable return
A5 A6 multiplexerSelect1 RS–422+ K10 K9 System preamp enable
A6 A5 multiplexerSelect1 return RS–422– L1 n/a Reserved
A7 A8 multiplexerSelect2 RS–422+ L2 n/a Reserved
L3 n/a Reserved
L4 n/a Reserved
L5 n/a Reserved
B1 n/a Key blocked in receptacle E
L6 n/a Reserved
B2 n/a Key blocked in receptacle F
B3 n/a Key blocked in receptacle G L7 n/a Reserved
B4 n/a Key blocked in receptacle H L8 n/a Reserved
C1 n/a MC–A1 Preamp out 1, no bias, DC blocked L9 n/a Reserved
C2 n/a MC–A2 Preamp out 2, no bias, DC blocked L10 n/a Reserved
C3 n/a MC–A3 Preamp out 3, no bias, DC blocked M1 n/a Reserved
C4 n/a MC–A4 Preamp out 4, no bias, DC blocked M2 M5 +15Vdc (auxiliary & preamp power)
D1 n/a MC–A5 Preamp out 5, no bias, DC blocked M3 M6 +10Vdc (auxiliary & preamp power)
D2 n/a MC–A6 Preamp out 6, no bias, DC blocked M4 n/a –15Vdc (auxiliary power)
D3 n/a MC–A7 Preamp out 7, no bias, DC blocked M5 M2 Return for aux power
D4 n/a MC–A8 Preamp out 8, no bias, DC blocked
M6 M3 Return for aux power
M7 M8 coil ID (Dallas OneWire protocol) All coils MUST have coil ID.
M8 M7 coil ID return (Dallas OneWire protocol) All coils MUST have coil ID.
M9 M10 coil present’
HDx (14.x) & HDxt (1.5.x, 16.x or Later) MGD/RRF/RF SUBSYSTEM M10 M9 coil present return’
Multicoil “A+” Connector – Forward Production
SHEET 12B OF 16

View from CONNECTOR SIDE of Connector Assembly Contact Function Allocation
with
F2 n/a
J1 K1 MC bias 1 (9)
J2 K2 MC bias 2 (10)
M10 L10 K10 J10 I4 H4 G4 F4 E4 D4 C4 B4 A10 J10 J9 body transmit enable return
K1 J1 MC bias return 1 (9)
Contact Function Allocation
Pin Twisted Description Comments
with K5 J5 MC bias return 5 (13)
A1 A2 coil present K6 J6 MC bias return 6 (14)
A2 A1 coil present return K7 J7 MC bias return 7 (15)
A3 A4 multiplexerSelect0 RS–422+ K8 J8 MC bias return 8 (16)
A4 A3 multiplexerSelect0 return RS–422– K9 K10 System preamp enable return
A5 A6 multiplexerSelect1 RS–422+ K10 K9 System preamp enable
A6 A5 multiplexerSelect1 return RS–422– L1 n/a Reserved
A7 A8 multiplexerSelect2 RS–422+ L2 n/a Reserved
L3 n/a Reserved
L4 n/a Reserved
L5 n/a Reserved
B1 n/a
L6 n/a Reserved
B2 n/a
B3 n/a L7 n/a Reserved
B4 n/a L8 n/a Reserved
C1 n/a MC–B1 Preamp out 1, MC bias 1 (9) L9 n/a Reserved
C2 n/a MC–B2 Preamp out 2, MC bias 2 (10) L10 n/a Reserved
C3 n/a MC–B3 Preamp out 3, MC bias 3 (11) M1 n/a Reserved
C4 n/a MC–B4 Preamp out 4, MC bias 4 (12) M2 M5 +15Vdc (auxiliary & preamp power)
D1 n/a MC–B5 Preamp out 5, MC bias 5 (13) M3 M6 +10Vdc (auxiliary & preamp power)
D2 n/a MC–B6 Preamp out 6, MC bias 6 (14) M4 n/a –15Vdc (auxiliary power)
D3 n/a MC–B7 Preamp out 7, MC bias 7 (15) M5 M2 Return for aux power
D4 n/a MC–B8 Preamp out 8, MC bias 8 (16) M6 M3 Return for aux power
M9 M10 coil present’
HDx (14.x) & HDxt (1.5.x, 16.x or Later) MGD/RRF/RF SUBSYSTEM M10 M9 coil present return’
Multicoil “B8” Connector – Forward Production
SHEET 12C OF 16

View from CONNECTOR SIDE of Connector Assembly Contact Function Allocation

with
J1 K1 MC bias 1 (9)–B / MC bias 1 (25)–C
J10 J9 body transmit enable return
M10 L10 K10 J10 I4 H4 G4 F4 E4 D4 C4 B4 A10 K1 J1 MC bias return 1 (25)–B / MC bias return 1 (1)–C
K2 J2 MC bias return 2 (26)–B / MC bias return 2 (2)–C
Contact Function Allocation K3 J3 MC bias return 3 (27)–B / MC bias return 3 (3)–C
Pin Twisted Description Comments K4 J4 MC bias return 4 (28)–B / MC bias return 4 (4)–C
with
A1 A2 coil present
K9 K10 System preamp enable return
K10 K9 System preamp enable
L1 n/a Reserved
L2 n/a Reserved
L3 n/a Reserved
L4 n/a Reserved
L5 n/a Reserved
C1 n/a MC–B1 or MC–C1, MC bias 1B (9), 1C (25) Preamp out 1, MC bias 1B (9), 1C (25)
L6 n/a Reserved
L7 n/a Reserved
L8 n/a Reserved
L9 n/a Reserved
D1 n/a MC–B5 or MC–C5, MC bias 5B (13), 5C (29) Preamp out 5, MC bias 5B (13), 5C (29)
L10 n/a Reserved
M1 n/a Reserved
M2 M5 +15Vdc (auxiliary & preamp power)
M3 M6 +10Vdc (auxiliary & preamp power)
G1 n/a MC–B9 or MC–C9, MC bias 9B (25), 9C (1) Preamp out 1, MC bias 9B (25), 9C (1)
M4 n/a –15Vdc (auxiliary power)
G2 n/a MC–B10 or MC–102, MC bias 10B (26), 10C (2) Preamp out 2, MC bias 10B (26), 10C (2)
H1 n/a MC–B13 or MC–C13, MC bias 13B (29), 13C (5) Preamp out 5, MC bias 13B (29), 13C (5)
H2 n/a MC–B14 or MC–C14, MC bias 14B (30), 14C (6) Preamp out 6, MC bias 14B (30), 14C (6)
H3 n/a MC–B15 or MC–C15, MC bias 15B (31), 15C (7) Preamp out 7, MC bias 15B (31), 15C (7) M9 M10 coil present’
H4 n/a MC–B16 or MC–C16, MC bias 16B (32), 16C (8) Preamp out 8, MC bias 16B (32), 16C (8) M10 M9 coil present return’

Multicoil “B16” and “C16” Connector – Forward Production
SHEET 12D OF 16

RF SYSTEM CABINET ASC CHASSIS or CAM CHASSIS
Î ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ Î ÎÎÎÎ ÎÎÎÎ
Î
RF MNS AMPLIFIER I/F (ASC–SLOT 6, CAM–SLOT 17U) (Optional) (ASC–SLOT 13, CAM–SLOT 19L) UPM1 MNS RF DETECTOR BD
(OPTIONAL) POWER MANAGEMENT CONTROL
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ
Î ÎÎÎÎ
Î
J4 J1
DEBUG CAN COMMUNICATION CH. 1 FORWARD
NOT USED REG AD RF 50Ω
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ
ÎÎÎÎÎÎÎ
Î Î
ÎÎÎÎ
J3 UNBLANK CONTROL FROM UPM (RF Lock) 1 FWD, 2 RFLCTD J2
CH. 1 REFLECTED 1
TO DRIVER MODULE J13 AD RF 50Ω
Î
ÎÎÎÎÎÎÎÎ Î Î Î
ÎÎÎ Î ÎÎÎÎ
Î
REG 1
SHT 5B OR 5D DSP
J5 CONNECTOR I/F TO AMP
COMM/CONTROL J3
TO MNS J7 AND STATUS CH. 1 REFLECTED 2
SHT 14 REG AD RF 50Ω
J65
OR CONTROL
ÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎÎÎ
Î Î
ÎÎÎÎ
J123 J48
RF AMPLIFIER I/F (ASC–SLOT 8, CAM–SLOT 17L) OR
J4 J104
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ
ÎÎÎÎÎÎÎ
Î ÎÎÎÎ
Î Î
POWER MANAGEMENT AD RF CH. 2 FORWARD FROM MNS J12
REG SHT 14A
J4 DEBUG CAN COMMUNICATION
Î
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ Î
ÎÎÎÎÎÎÎ ÎÎÎÎ
Î
NOT USED 1 FWD, 2 RFLCTD J5 J105
AD RF CH. 2 REFLECTED 1 FROM MNS J13
J3 UNBLANK CONTROL FROM UPM (RF Lock) REG SHT 14A
Î
ÎÎÎÎÎÎÎÎ Î Î Î
ÎÎÎ Î ÎÎÎÎ
Î
TO DRIVER MODULE J14
SHT 5B OR 5D DSP J6
J5 CH. 2 REFLECTED 2
CONNECTOR I/F TO AMP
COMM/CONTROL REG AD RF 50Ω 1
TO SRFD2 J18 AND STATUS
SHT 6B OR 7C
(ASC–SLOT 14, CAM–SLOT 20L) UPM1 NB RF DETECTOR BD

UPM2 MNS RF DETECTOR BD (ASC–SLOT 10, CAM–SLOT 19U)
ÎÎÎ
Î ÎÎÎÎÎÎÎÎ ÎÎÎÎ
Î Î
ÎÎÎÎ
(Optional) CONTROL
CONTROL J1
J1 CH. 1 FORWARD
ÎÎÎÎ
ÎÎ Î ÎÎÎÎÎÎÎ
ÎÎ Î ÎÎ
ÎÎÎÎÎÎÎ
Î Î
ÎÎÎÎ
CH. 1 FORWARD REG AD RF FROM SRFD2 J8
50Ω RF AD REG SHT 6B OR 7C
1 FWD, 2 RFLCTD J2
ÎÎÎÎÎ ÎÎÎ
ÎÎÎÎÎÎÎ
Î Î ÎÎÎÎ
Î
J2 1 FWD, 2 RFLCTD CH. 1 REFLECTED 1
1 CH. 1 REFLECTED 1 REG AD RF 50Ω
50Ω RF AD REG
1
ÎÎÎÎÎÎ Î Î ÎÎÎÎ
J3
CH. 1 REFLECTED 2 REG AD RF 50Ω
50Ω RF AD REG
ÎÎÎÎ ÎÎÎÎ
Î
CONTROL
CONTROL
J49
ÎÎÎ
ÎÎÎÎÎÎÎ ÎÎ Î
ÎÎÎÎ ÎÎÎÎ
Î
OR J4
J102 J4 AD RF CH. 2 FORWARD FROM SRFD2 J7
REG
BACKPLANE
FROM MNS J1 CH. 2 FORWARD
ÎÎÎÎÎ ÎÎÎÎÎÎÎ
ÎÎ Î ÎÎ
ÎÎÎÎÎÎÎ
Î Î
ÎÎÎÎ
RF AD REG SHT 6B OR 7C
SHT 14A 1 FWD, 2 RFLCTD J5
J103 J5 1 FWD, 2 RFLCTD CH. 2 REFLECTED 1
AD RF 50Ω
ÎÎÎ ÎÎÎ Î Î
ÎÎÎÎ
CH. 2 REFLECTED 1 REG
FROM MNS J11 RF AD REG
SHT 14A J6 1
ÎÎÎÎÎÎ
CH. 2 REFLECTED 2 REG AD RF 50Ω
1 50Ω RF AD REG
(ASC–SLOT 15, CAM–SLOT 21L) – UPM1 PROCESSOR BD
ÎÎÎ
ÎÎ ÎÎÎÎÎ ÎÎ Î
UPM2 NB RF DETECTOR BD (ASC–SLOT11, CAM–SLOT 20U)
CONTROL
CONTROL FPGA
ÎÎÎ
ÎÎÎÎÎÎÎ ÎÎ ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎ Î
J1
FROM SRFD2 J6 CH. 1 FORWARD RF 1 FWD, 2 RFLCTD 1 FWD, 2 RFLCTD
AD REG REG
SHT 6B OR 7C
ÎÎÎÎÎ ÎÎÎÎÎÎÎ
ÎÎ Î ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎ Î Î ÎÎÎ
Î
J2 1 FWD, 2 RFLCTD 1 FWD, 2 RFLCTD 1 FWD, 2 RFLCTD UNBLANK I/F J3
CH. 1 REFLECTED 1 REG POWER TO DRIVER MODULE J11
50Ω RF AD REG
ÎÎÎÎÎÎ ÎÎÎÎÎÎ
ÎÎÎÎÎÎÎ
Î ÎÎÎÎÎÎÎÎÎ
Î ÎÎÎÎÎÎÎ Î
1 FWD, 2 RFLCTD 1 FWD, 2 RFLCTD CONVERT & SHT 5B OR 5D
1 ACCUMILATE
J3 REG
ÎÎÎÎÎÎ
ÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î ÎÎÎÎÎÎÎÎÎ Î Î Î
ÎÎÎÎÎ
CH. 1 REFLECTED 2
50Ω RF AD REG 1 FWD, 2 RFLCTD 1 FWD, 2 RFLCTD DSP
REG
CONTROL J4
ÎÎÎ
Î ÎÎÎÎÎÎÎÎ ÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î
DEBUG
CAN COMMUNICATION
NOT USED
J4
ÎÎÎÎ
ÎÎ Î ÎÎÎÎÎÎÎ
ÎÎ Î
FROM SRFD2 J5 CH. 2 FORWARD RF AD REG
SHT 6B OR 7C
(ASC–SLOT 16 & 17, CAM N/A) – ASC POWER SUPPLY
ÎÎÎÎÎ Î ÎÎ ÎÎÎ
ÎÎÎÎÎÎÎ Î
J5 1 FWD, 2 RFLCTD
CH. 2 REFLECTED 1
50Ω RF AD REG
5V @ 25A
ÎÎÎÎÎÎ ÎÎ
Î
1 J6
CH. 2 REFLECTED 2
3.3V @ 30A
50Ω RF AD REG 12.0V @ 5.5A
–12V @ 0.5A
ÎÎ Î
UPM2 PROCESSOR BD (ASC–SLOT 12, CAM–SLOT 21U)
CONTROL
FPGA
ÎÎ
ÎÎ ÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ
Î ÎÎÎÎÎÎÎÎ
Î ÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
1 FWD, 2 RFLCTD 1 FWD, 2 RFLCTD (ASC–SLOT 18, CAM–SLOT 12R) INPUT PANEL
REG
ÎÎ
ÎÎÎÎÎÎÎÎ
Î ÎÎ ÎÎÎÎÎÎÎ
ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ
Î ÎÎÎÎÎÎÎ
Î ÎÎ
J2
J3 UNBLANK I/F 1 FWD, 2 RFLCTD 1 FWD, 2 RFLCTD FROM DRIVER MODULE J2
POWER REG CAN
SHT 5B OR 5D
ÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎ ÎÎ
TO DRIVER MODULE J12 CONVERT &
SHT 5B OR 5D ACCUMILATE 1 FWD, 2 RFLCTD 1 FWD, 2 RFLCTD
REG J3
ÎÎ
ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Î ÎÎ
ÎÎÎÎÎÎÎÎ ÎÎ Î
ÎÎÎÎÎ
DSP 1 FWD, 2 RFLCTD 1 FWD, 2 RFLCTD CAN RF–DIF J23
SHT 3A OR 3B
REG
J4 DEBUG
ÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î
CAN COMMUNICATION
NOT USED
EXCITE HD (12.x), HDx (14.x) & HDxt (1.5.x, 16.x or Later) MGD/RRF/RF
SUBSYSTEM NOTES:
ASC CHASSIS 1 Sections enclosed by dotted lines are not present with new Detector Board, part # 5250154.
SHEET 13 OF 16

1.5T MNS CABINET OR

1.5T SRF CABINET
MNS AMPLIFIER
J9 TR BIAS
FROM DRIVER MODULE J8
SHT 5A TO 5D
J8 AC POWER
FROM PDU
FROM RFS CABINET J52

OR
SYSTEM CABINET J52 J3 CPC MNS COUPLER 1 COUPLER 2 J2 TO PEN PANEL J83
RF OUTPUT
SHT 4A, 4B, OR 4C SHT 14B
RF AMPLIFIER
OR SPECTRO GAIN FWD1 RFLD1 FWD2 RFLD2
SYSTEM CABINET J50 ADJUST POT
SHT 2C
J13 TO RFS CABINET J105, SHT 13
J7 I/O CONTROL
(NO CONNECTION FOR SSM)
FROM RFS CABINET J123
SHT 13
OR J12 TO RFS CABINET J104, SHT 13
SSM J507 OR
SHT 6 OR 7B SSM J102 SHT 6 OR 7B
OR OR
SYSTEM CABINET J65 SYSTEM CABINET J48, SHT 13
SHT 13 J11
TO RFS CABINET J103, SHT 13
(NO CONNECTION FOR SSM)
J1 TO RFS CABINET J102, SHT 13

OR
SSM J101 SHT 6 OR 7B
OR
SYSTEM CABINET J49, SHT 13
EXCITE HD (12.x) & HDx (14.x) & HDxt (1.5.x, 16.x or Later) MGD/RRF/RF SUBSYSTEM
MNS RF Amplifier (Optional Forward Production MNS)
SHEET 14A OF 16

PEN CARRIAGE SPECTROSCOPY TR SWITCH MODULE

I/F (MG2 A16 A7)
PANEL (MG3 A17) COVER
(PP1) ASSEMBLY SPECTROSCOPY TR SWITCH BOARD (MG2 A16 A7 A1)
(MG2 A16)
1
J83 J3 J1 J1
FROM MNS AMP J2
SHT 14A (TX) MNS FLEX COIL
COIL ADAPTER
(A16 A7 A3)
J2 J2 COIL ID TRANSMIT LOAD
THESE PINS
NOT USED
1/2
RECEIVE LOAD
SPECTRO
SERVICE
COIL
PREAMPLIFIER BD
(MG2A16A7A2)
1/4
OUTPUT INPUT
J2 J3
TO 16 CHANNEL SWITCH J23 MNS:8
IR FILTER 34 dB
SHT 9A, 9B, OR 9C (RX)
NOTE: THICK LINES

DECOUPLER REPRESENT RF PATH
FILTER
(OPTIONAL)
NOTES:
1 SHV Thick Coax Pasternack PE–4194 connector.
MNS Interconnects (Optional Forward Production MNS)
SHEET 14B OF 16

MNS CABINET

3 1 64&M!)
2

M S 1
FROM PDU *3/ C&P 1 4 3 38&M!)
RF OUT 1 8 4
2 545
M S RF
FROM RFS CABINET J52 1 +1,B 2 IN 3
OR 5441 TT 5431 5 5 24&M!)
SYSTEM CABINET J52 6 6
SHT 4A, 4B, OR 4C
OR 54 REMOTE I/F
SYSTEM CABINET J50
SHT 2C 2
M S
BB 4 T&BS FROM DRIVER MODULE
5416 5444 *3/4 J8
REMOTE CONTROL IN/OUT SHT 5A TO 5D
6 T&BS
M S TO RFS CABINET J102
FROM SSM J507 M S SPCT 2 PM SHT 13
OR C T& 5446 *3/ OR
RFS CABINET J123 *3/. 5443 SPCT&UT& SSM J101 SHT 6 OR 7B
OR OR
SYSTEM CABINET J65
SYSTEM CABINET J49
M S SHT 13
# D& 0
0 544 3 PMB TO RFS CABINET J104
5445 *3/1 SHT 13
SPCT&UT&B OR
5&'(&123 SSM J102 SHT 6 OR 7B
OR
$15 1 SYSTEM CABINET J48
4 3 SHT 13
$15 2
#U D 5
C M S
UTST 1 5 &UT
544 *4/5
PS!D 11 1 2 /
T BS
U B"TBB 12 UT

ST1T 13
ST2T 14
ST3T 15
T 16
31P&SPCT
DUT% T 1 T&MDU
01 01 01 .
P T 18 ./ ./ .7
! T 1 2 1 3 83
TO 16 CHANNEL SWITCH J23 MNS:8
BS 2 # 456 # 473
SHT 9A, 9B, OR 9C
C DB" 21 -D
BDPS T 22
#U D 24
!"# $%&
2 '&$&(% #")#'*) +(

('& , -)!&
MNS Interconnects (Optional MNS Upgrade Only) 54*****
SHEET 14C OF 16

J1
PINS SIGNAL
1 MC Bias 1
2 MC Bias 2
3 MC Bias 3
4 MC Bias 4
5 MC Bias 5
6 MC Bias 6
MCR TOOL (1.5T) 7 MC Bias 7
(MG2A11) MC BIAS 1 LOAD 8 MC Bias 8
25 OHMS J1
BODY TRANSMIT EN
9 MC Select 0
MC BIAS 2 LOAD
25 OHMS
COIL PRESENT 1 10 MC Select 1
MC BIAS 3 LOAD
25 OHMS
COIL PRESENT 2 11 MC Select 2
TO 8 CHANNEL
MC BIAS 4 LOAD CONNECTOR 12 MC Select 3
MC BIAS IN
25 OHMS
13 Body Transmit Enable
MC BIAS 5 LOAD
25 OHMS COIL ID
14 Coil ID
MC BIAS 6 LOAD 15 Coil Present 15
25 OHMS
16 Coil Present 2
MC BIAS 7 LOAD
25 OHMS 17 +15VDC (Auxiliary Power)
J4
MC BIAS 8 LOAD 18 +10VDC (Auxiliary Power)
25 OHMS
CH. 1 19 –15VDC (Auxiliary Power)
CH. 2 20 MC Bias Return 1
MC SELECT 0
ATTENUATION TO 8 CHANNEL
MC SELECT 1 EN 63.86 MHz
AND CH. 4 22 MC Bias Return 3
MC SELECT OSCILLATOR 18dB FILTRATION CONNECTOR
MC SELECT 2 ENABLE CH. 5
–13.2dBm AMP
CIRCUITRY –25dBm EACH 23 MC Bias Return 4
MC SELECT 3
R28 CH. 6
24 MC Bias Return 5
CH. 7
25 MC Bias Return 6
DS2 – GREEN DS1 – YELLOW CH. 8
POWER OSCILLATOR ENABLE 26 MC Bias Return 7
J3
BNC RF OUT 27 MC Bias Return 8
ATTENUATOR
–50dBm
(NOT USED) 28 MC Select 0 Return
29 MC Select 1 Return
32 Body Transmit Enable Return
33 Coil ID Return
34 Coil Present Return 1
36 Auxiliary Power Return

MCR II Tool and Cable
SHEET 15A OF 16

J1 J4
PINS SIGNAL PINS SIGNAL
MCR TOOL (1.5T)
(MG2A11) 1 MC Bias 1 1 Preamp Enable
MC BIAS 1’ LOAD
50 OHMS
MC BIAS 1 LOAD
25 OHMS J1 2 MC Bias 2 2 Preamp Enable RTN
BODY TRANSMIT EN
MC BIAS 2’ LOAD MC BIAS 2 LOAD 3 MC Bias 3
50 OHMS 25 OHMS
COIL PRESENT 1 4 MC Bias 4
MC BIAS 3’ LOAD MC BIAS 3 LOAD COIL PRESENT 2
50 OHMS 25 OHMS TO 8 CHANNEL
5 MC Bias 5
MC BIAS 4’ LOAD MC BIAS 4 LOAD CONNECTOR 6 MC Bias 6
50 OHMS 25 OHMS MC BIAS IN
7 MC Bias 7
MC BIAS 5’ LOAD MC BIAS 5 LOAD
50 OHMS 25 OHMS COIL ID 8 MC Bias 8
MC BIAS 6’ LOAD
50 OHMS
MC BIAS 6 LOAD
25 OHMS
9 MC Select 0
10 MC Select 1
50 OHMS 25 OHMS
11 MC Select 2
50 OHMS 25 OHMS 12 MC Select 3
13 Body Transmit Enable
J4 14 Coil ID
15 Coil Present 15
CH. 1
16 Coil Present 2
CH. 2
17 +15VDC (Auxiliary Power)
MC SELECT 2 CH. 3
ATTENUATION TO 8 CHANNEL 18 +10VDC (Auxiliary Power)
MC SELECT 3 EN 63.86 MHz
AND CH. 4
MC SELECT OSCILLATOR 18dB FILTRATION CONNECTOR 19 –15VDC (Auxiliary Power)
ENABLE –13.2dBm AMP
CIRCUITRY CH. 5 RF SIGNAL OUT
R28 CH. 6
& MC BIAS IN 20 MC Bias Return 1
DS2 – GREEN DS1 – YELLOW CH. 8 22 MC Bias Return 3
POWER OSCILLATOR ENABLE
23 MC Bias Return 4
J3
36.8DB
ATTENUATOR
BNC RF OUT
–50dBm
24 MC Bias Return 5
(NOT USED) 25 MC Bias Return 6
PREAMP DISABLED
26 MC Bias Return 7
27 MC Bias Return 8
ATTENUATOR
PREAMP ENABLED 29 MC Select 1 Return
MC SELECT 0 PREAMP J4 30 MC Select 2 Return
SELECT PIN 2
MC SELECT 1 LOGIC 31 MC Select 3 Return
PIN 1
32 Body Transmit Enable Return
33 Coil ID Return

MCR III Tool and Cable
SHEET 15B OF 16

View from CONNECTOR SIDE of 8 Channel Connector Assembly Contact Function Allocation
A1 B1 C1 D1 E1 E3 E5 F1 G1 H1 I1 Pin Twisted Description Comments
with
E1 n/a Open Not used
A10 B4 C4 D4 E2 E4 E6 F10 G10 H10 I10
with
A1 A2 coil present
A7 A8 multiplexerSelect2 RS–422+ G9 n/a Reserved
A8 A7 multiplexerSelect2 return RS–422– G10 n/a Reserved
B1 n/a Not used H3 n/a Reserved
MCR II Tool – 8 Channel Connector I9 I10 coil present’
SHEET 16A OF 16

View from CONNECTOR SIDE of 8 Channel Connector Assembly Contact Function Allocation
A1 B1 C1 D1 E1 E3 E5 F1 G1 H1 I1 Pin Twisted Description Comments
with
A10 B4 C4 D4 E2 E4 E6 F10 G10 H10 I10
with
A1 A2 coil present G3 F3 MC bias return 3 MC T/R Bias Line 19 for “A”, 27 for “B”
A2 A1 coil present return G4 F4 MC bias return 4 MC T/R Bias Line 20 for “A”, 28 for “B”
A7 A8 multiplexerSelect2 RS–422+ G9 G10 Preamp Enable
A8 A7 multiplexerSelect2 return RS–422– G10 G9 Preamp Enable Return
MCR III Tool – 8 Channel Connector I9 I10 coil present’
SHEET 16B OF 16

SECTION 2 – MGD/RRF/RF SUBSYSTEM SUPPLEMENTAL SCHEMATICS (1.5T)
AG
AF WJK 8 JAN 96
PCN 186807
AG DRL 2 FEB 97
PCN 197402
EXCITE HD (12.x), HDx (14.x) & HDxt (15.x, 16.x) MGD/RRF/RF SUBSYSTEM

HV DYNAMIC DISABLE FILTER
FILTER 1
J92 J72
BD1
FRONT COIL
FILTER 2
J93 J73
BD2
FILTER 3
BODY HYBRID
FROM
J94 J74 DIRECT DRIVE
DRIVER MODULE DD
FILTER 4
J95 J75
BD3
REAR COIL
FILTER 5
J96 J76
BD4
NOTE: Connector shields are electrically isolated from

enclosure housing.











REV 15
COOLING SYSTEM
TABLE OF CONTENTS
Water Chillers Subsystem Group Interconnect Diagrams
ILLUSTRATION PAGE 1–1
1 OUTDOOR TSCC & RCP
2 INDOOR WATER COOLED TSCC
3 INDOOR AIR COOLED TSCC
4 OUTDOOR TGWC & RCP
5 INDOOR WATER COOLED TGWC
6 INDOOR AIR COOLED TGWC
7 DUAL INDOOR MRCC
8 INDOOR MRCC
9 DUAL OUTDOOR MRCC
10 OUTDOOR MRCC
11 INDOOR GWHX
Note:
For all Chillers and Cooling System variations (SEE Vendor Manuals on MR Service Methods CDROM)
COOLING SYSTEM i
NOTES:
EXTERNAL INTERNAL EXTERNAL INTERNAL
TO BUILDING TO BUILDING 1
CUSTOMER FURNISHED. TO BUILDING TO BUILDING NOTES:
1
2 THIS GROUP CONTAINS WATER LINES WHICH SHALL BE ROUTED CUSTOMER FURNISHED.
1 MAIN SEPARATE FROM ELECTRICAL LINES (I.E. POWER & SIGNAL). 2 THIS GROUP CONTAINS WATER LINES WHICH SHALL BE ROUTED
DISCONNECT 1 MAIN SEPARATE FROM ELECTRICAL LINES (I.E. POWER & SIGNAL).
PANEL 992 TAC DISCONNECT
OUTDOOR 1 OUTDOOR PANEL
RCP 992 TAC
TSCC TGWC
1
1 941 J11 MSM1 RCP
1 2 2
941 J11 MSM1
MS5
1 2 2
1 1
1 2 2
1 TO FACILITY
1 2 2 MAGNET WATER
TO 1 2 2
1 2
MS5
MAGNET 1 SUPPLY
1 2 2
NOTE: 1 NOTE: 2
D ONLY INTERCONNECTS SPECIFIC TO TSCC D ONLY INTERCONNECTS SPECIFIC TO TGWC
SUBSYSTEM EQUIPMENT SHOWN HERE. SUBSYSTEM EQUIPMENT SHOWN HERE.
ILLUSTRATION 1 – OUTDOOR TSCC & RCP SUBSYSTEM GROUP INTERCONNECT DIAGRAM ILLUSTRATION 4 – OUTDOOR TGWC & RCP SUBSYSTEM GROUP INTERCONNECT DIAGRAM
NOTES: NOTES:
1 CUSTOMER FURNISHED. 1 CUSTOMER FURNISHED.
2 THIS GROUP CONTAINS WATER LINES WHICH SHALL BE ROUTED 2 THIS GROUP CONTAINS WATER LINES WHICH SHALL BE ROUTED
FACILITY 1 MAIN SEPARATE FROM ELECTRICAL LINES (I.E. POWER & SIGNAL). SEPARATE FROM ELECTRICAL LINES (I.E. POWER & SIGNAL).
WATER 2 1 DISCONNECT
PANEL 3 FOR INDOOR WATER COOLED TSCC ONLY. 3 FOR INDOOR WATER COOLED TGWC ONLY.
SUPPLY FACILITY
INDOOR WATER 1 2 4 E&W PROVIDED CABLE.
3 WATER 992 TAC
SUPPLY
COOLED INDOOR
WATER 992 TAC
TSCC MSM1 3
941 J11 COOLED
TGWC 1
RCP 941 J11 MSM1
2
MS5 MR3
4
PD1 TO
TO 2
2 MAGNET FACILITY
MAGNET
WATER 1 2
NOTE: NOTE: MS5
SUPPLY
SUBSYSTEM EQUIPMENT SHOWN HERE. SUBSYSTEM EQUIPMENT SHOWN HERE. 2
ILLUSTRATION 2 – INDOOR WATER COOLED TSCC SUBSYSTEM GROUP INTERCONNECT DIAGRAM ILLUSTRATION 5 – INDOOR WATER COOLED TGWC SUBSYSTEM GROUP INTERCONNECT DIAGRAM
NOTES: NOTES:
1 CUSTOMER FURNISHED. 1 CUSTOMER FURNISHED.
1 MAIN 2 THIS GROUP CONTAINS WATER LINES WHICH SHALL BE ROUTED

1 MAIN 2 THIS GROUP CONTAINS WATER LINES WHICH SHALL BE ROUTED
DISCONNECT SEPARATE FROM ELECTRICAL LINES (I.E. POWER & SIGNAL). DISCONNECT SEPARATE FROM ELECTRICAL LINES (I.E. POWER & SIGNAL).
PANEL PANEL
INDOOR INDOOR
992 TAC AIR 992 TAC
AIR
COOLED COOLED
TSCC MSM1 TGWC MSM1
941 J11 941 J11
2
MS5
FACILITY
WATER 1 2
TO TO SUPPLY MS5
2 2
MAGNET MAGNET
2
NOTE: NOTE:
SUBSYSTEM EQUIPMENT SHOWN HERE. SUBSYSTEM EQUIPMENT SHOWN HERE.
ILLUSTRATION 3 – INDOOR AIR COOLED TSCC SUBSYSTEM GROUP INTERCONNECT DIAGRAM ILLUSTRATION 6 – INDOOR AIR COOLED TGWC SUBSYSTEM GROUP INTERCONNECT DIAGRAM
COOLING SYSTEM 1–1

REV15 DIRECTION 5133310
NOTES: EXTERNAL INTERNAL NOTES:

1 2 1
TO BUILDING TO BUILDING 1
CUSTOMER FURNISHED. CUSTOMER FURNISHED.
TO
GRADIENT
2 THIS GROUP CONTAINS WATER LINES WHICH 1 2
1
2
2 THIS GROUP CONTAINS WATER LINES WHICH
COIL SHALL BE ROUTED SEPARATE FROM SHALL BE ROUTED SEPARATE FROM
INDOOR 1 2 TO
ELECTRICAL LINES (I.E. POWER & SIGNAL). ELECTRICAL LINES (I.E. POWER & SIGNAL).
MRCC GRADIENT
1 NOTE: OUTDOOR 1 2
1
2 COIL NOTE:
RCP
D ONLY INTERCONNECTS SPECIFIC TO MRCC MRCC D ONLY INTERCONNECTS SPECIFIC TO MRCC
1 SUBSYSTEM EQUIPMENT SHOWN HERE. 1 SUBSYSTEM EQUIPMENT SHOWN HERE.
MAIN RCP
1
DISCONNECT 1
PANEL MAIN
1 1
DISCONNECT
RCP PANEL
INDOOR 1
RCP
MRCC 1 2
OUTDOOR
MRCC 1
MS5 1 2 2
1 2 ILLUSTRATION 9 –
MS5 DUAL OUTDOOR MRCC SUBSYSTEM
1 2 2
ILLUSTRATION 7 – DUAL INDOOR MRCC SUBSYSTEM GROUP INTERCONNECT DIAGRAM
1 GROUP INTERCONNECT DIAGRAM
NOTES:
NOTES: EXTERNAL INTERNAL
1 2 TO BUILDING TO BUILDING 1
1 CUSTOMER FURNISHED.
TO CUSTOMER FURNISHED.
GRADIENT
2 THIS GROUP CONTAINS WATER LINES WHICH
2 THIS GROUP CONTAINS WATER LINES WHICH 1
COIL 1 2 2 SHALL BE ROUTED SEPARATE FROM
INDOOR 1 2 SHALL BE ROUTED SEPARATE FROM
TO ELECTRICAL LINES (I.E. POWER & SIGNAL).
MRCC ELECTRICAL LINES (I.E. POWER & SIGNAL).
GRADIENT
1
2 2 COIL NOTE:
RCP NOTE: OUTDOOR 1
1
MRCC D ONLY INTERCONNECTS SPECIFIC TO MRCC
1 D ONLY INTERCONNECTS SPECIFIC TO MRCC SUBSYSTEM EQUIPMENT SHOWN HERE.
MAIN SUBSYSTEM EQUIPMENT SHOWN HERE. 1
RCP
DISCONNECT
PANEL 1
MAIN
DISCONNECT
PANEL
FACILITY
WATER 1 2
MS5
SUPPLY FACILITY
2 WATER 1 2
MS5 ILLUSTRATIONI 10 –
SUPPLY
OUTDOOR MRCC SUBSYSTEM
ILLUSTRATION 8 – INDOOR MRCC SUBSYSTEM GROUP INTERCONNECT DIAGRAM 2
GROUP INTERCONNECT DIAGRAM
MR3
TO
4 2 GRADIENT
PD1
INDOOR COIL
WATER
COOLED
GWHX NOTES:
FACILITY 1 CUSTOMER FURNISHED.
WATER 1 2
2 THIS GROUP CONTAINS WATER LINES WHICH SHALL
SUPPLY
BE ROUTED SEPARATE FROM ELECTRICAL LINES
3 (I.E. POWER & SIGNAL).
3 FOR INDOOR WATER COOLED GWHX ONLY.
4 GWHX PROVIDED CABLE.
FACILITY
WATER NOTE:
1 2
SUPPLY MS5 D ONLY INTERCONNECTS SPECIFIC TO GWHX
SUBSYSTEM EQUIPMENT SHOWN HERE.
2
ILLUSTRATION 11 – INDOOR GWHX SUBSYSTEM GROUP INTERCONNECT DIAGRAM
COOLING SYSTEM 1–2

Signa HD, HDX & HDXT 1.5T Block Diagrams OP23

Uploaded by

Copyright:

Available Formats

You might also like

Signa HD, HDX & HDXT 1.5T Block Diagrams OP23

Uploaded by

Document Information

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Signa HD, HDX & HDXT 1.5T Block Diagrams OP23

Uploaded by

Copyright:

Available Formats

GE Healthcare

Signa HD, HDx & HDxt 1.5T Block Diagrams &

File a report with

© 2004 – 2011, General Electric Company

      

LIST OF EFFECTIVE PAGES

2 – STANDARD CONVENTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–1

PATIENT HANDLING GRADIENT

SYSTEM OPERATOR WORKSPACE

TAB ORGANIZATION FOR THIS DIRECTION

SECTION 2 – STANDARD CONVENTIONS

BOLD, DASHED MODULE or INTERFACE

CPU = Central Processing Unit EFB = Envelop Feedback

G INS, INST, or INSTR = Instruction

PW = Pulse Width SEG = Segment

(GOC COMPUTER CABINET) OPERATOR WORKSPACE TABLE

1 Network connection available for external

Refer to the following functional block diagram for additional information:

(GOC COMPUTER CABINET) OPERATOR WORKSPACE TABLE

2 SERVICE PORT STEREO SPEAKERS

AUX INPUT STEREO RACK

Refer to the following functional block diagram for additional information:

EXCITE HD (12.x) OVERALL SYSTEM

(GOC COMPUTER CABINET) OPERATOR WORKSPACE TABLE

GRAPHIC LCD DISPLAY

1 Network connection available for external

Refer to the following functional block diagram for additional information:

(GOC COMPUTER CABINET)

GRAPHIC HOST MONITOR

(GOC COMPUTER CABINET)

GRAPHIC HOST MONITOR

(GOC COMPUTER CABINET)

GRAPHIC HOST MONITOR

(GOC COMPUTER CABINET)

GRAPHIC HOST MONITOR

SECURITY KEY LPT AUX IN

       

 #  

 $ #  

EXCITE HD (12.x)    – 4 Channel or 8 Channel

       

#   6

"+ 0.  &  .  8  GRADIENT CAB

EXCITE HD (12.x)    – 16 Channels

          

NOTE: Number of ICNs will vary between 1 and 2.

          

HDx & HDxt    – 8 Channel, IRF2b/RRF–DIF3 Hardware Configuration

          

   SRFD OR SRFD II 5337894–3 ICNs or (1) 5911000–4 ICNs.

NOTE: Number of ICNs will vary between 1 and 2.

          

   SRFD OR SRFD II

HDxt – 16 Channel, IRF2B/RRF–DIF3 Hardware Configuration

        NOTES:

#  0   ) 0. $ 11  

%.  & SHT 4A OR 4B

        NOTES:

#

$ #

EXCITE HD (12.x) – 4 Channel or 8 Channel

# 6

"+ 0. & . 8 GRADIENT CAB

EXCITE HD (12.x) – 16 Channels

HDx & HDxt – 8 Channel, IRF2b/RRF–DIF3 Hardware Configuration

SRFD OR SRFD II 5337894–3 ICNs or (1) 5911000–4 ICNs.

SRFD OR SRFD II

NOTES:

# 0 ) 0. $ 11

%. & SHT 4A OR 4B

NOTES:

7 CAN Line connected if PHPS or CAN–compatible HOS is present.

# 0 ) 0. $ 11

%. & SHT 4A OR 4B

HDx (14.x) & HDxt (15.x) – 32 Channel

# +

#

# +

#

HDx (14.x) & HDxt (15.x, 16.x) OVERALL SYSTEM -