Introduction to

Microelectronic Fabrication
by
Richard C. Jaeger
Distinguished University Professor
ECE Department

Auburn University

Chapter 8
Packaging and Yield

© 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. For the exclusive use of adopters of the book
This material is protected under all copyright laws as they currently exist. No Introduction to Microelectronic Fabrication,
portion of this material may be reproduced, in any form or by any means, Second Edition by Richard C. Jaeger. ISBN0-201-
without permission in writing from the publisher. 44494-1.
Copyright Notice

• © 2002 Pearson Education, Inc., Upper Saddle River, NJ. All

rights reserved. This material is protected under all copyright
laws as they currently exist. No portion of this material may be
reproduced, in any form or by any means, without permission in
writing from the publisher.

• For the exclusive use of adopters of the book Introduction to

Microelectronic Fabrication, Second Edition by Richard C.
Jaeger. ISBN0-201-44494-1.

© 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This For the exclusive use of adopters of the book
material is protected under all copyright laws as they currently exist. No portion of this Introduction to Microelectronic Fabrication, Second
material may be reproduced, in any form or by any means, without permission in writing Edition by Richard C. Jaeger. ISBN0-201-44494-1.
from the publisher.
Packaging
Processed Silicon Wafer
• 150-mm wafer ready
• Mounted on screen
ready for dicing saw
• Dice on wafer tested
by probing prior to
mounting
• Good dice will then be
packaged

© 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This For the exclusive use of adopters of the book
material is protected under all copyright laws as they currently exist. No portion of this Introduction to Microelectronic Fabrication, Second
material may be reproduced, in any form or by any means, without permission in writing Edition by Richard C. Jaeger. ISBN0-201-44494-1.
from the publisher.
Packaging
Bonding Pad Configurations

(a)Peripheral Bonding Pads

(b)Area Array Bonding Pads

Pads Range from 125 mm x

125 mm down to 25 mm x 25
mm

© 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This For the exclusive use of adopters of the book
material is protected under all copyright laws as they currently exist. No portion of this Introduction to Microelectronic Fabrication, Second
material may be reproduced, in any form or by any means, without permission in writing Edition by Richard C. Jaeger. ISBN0-201-44494-1.
from the publisher.
Packaging
“TO-Style” and Inline

© 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This For the exclusive use of adopters of the book
material is protected under all copyright laws as they currently exist. No portion of this Introduction to Microelectronic Fabrication, Second
material may be reproduced, in any form or by any means, without permission in writing Edition by Richard C. Jaeger. ISBN0-201-44494-1.
from the publisher.
Packaging
Gold Wire Bonding

(a) (c)

Figure 8.3
(a) An SEM of gold ball bonding (b) SEM of
high density gold ball bonding (c) SEM of
bonded die. Courtesy of Kulicke and Soffa
Industries, Inc. (K&S).
(b)

© 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This For the exclusive use of adopters of the book
material is protected under all copyright laws as they currently exist. No portion of this Introduction to Microelectronic Fabrication, Second
material may be reproduced, in any form or by any means, without permission in writing Edition by Richard C. Jaeger. ISBN0-201-44494-1.
from the publisher.
Packaging
Themosonic Ball-Wedge Bonding

© 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This For the exclusive use of adopters of the book
material is protected under all copyright laws as they currently exist. No portion of this Introduction to Microelectronic Fabrication, Second
material may be reproduced, in any form or by any means, without permission in writing Edition by Richard C. Jaeger. ISBN0-201-44494-1.
from the publisher.
Packaging
Ultrasonic Bonding

© 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This For the exclusive use of adopters of the book
material is protected under all copyright laws as they currently exist. No portion of this Introduction to Microelectronic Fabrication, Second
material may be reproduced, in any form or by any means, without permission in writing Edition by Richard C. Jaeger. ISBN0-201-44494-1.
from the publisher.
Packaging
Pin Grid Array

• Pin Grid Array (PGA)

Package with Upward
Facing Cavity
• PGAs also come with the
Cavity Facing Downward

Figure 8.7

© 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This For the exclusive use of adopters of the book
material is protected under all copyright laws as they currently exist. No portion of this Introduction to Microelectronic Fabrication, Second
material may be reproduced, in any form or by any means, without permission in writing Edition by Richard C. Jaeger. ISBN0-201-44494-1.
from the publisher.
Packaging
Leadless Chip Carriers

Figure 8.8
(a) Ceramic leadless chip carriers with top connections.
(b) LCC with edge connections in grooves on the side
of the package.

© 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This For the exclusive use of adopters of the book
material is protected under all copyright laws as they currently exist. No portion of this Introduction to Microelectronic Fabrication, Second
material may be reproduced, in any form or by any means, without permission in writing Edition by Richard C. Jaeger. ISBN0-201-44494-1.
from the publisher.
Packaging
Plastic Packaging
Gull wing J-lead surface
surface mount mount

Through hole

Surface Mount
© 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This For the exclusive use of adopters of the book
material is protected under all copyright laws as they currently exist. No portion of this Introduction to Microelectronic Fabrication, Second
material may be reproduced, in any form or by any means, without permission in writing Edition by Richard C. Jaeger. ISBN0-201-44494-1.
from the publisher.
Packaging
Solder Ball Formation
• Layers of chrome,
copper, lead and tin
are sequentially
deposited
• After heating for
reflow, the 5% tin -
95% lead solder ball
forms

© 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This For the exclusive use of adopters of the book
material is protected under all copyright laws as they currently exist. No portion of this Introduction to Microelectronic Fabrication, Second
material may be reproduced, in any form or by any means, without permission in writing Edition by Richard C. Jaeger. ISBN0-201-44494-1.
from the publisher.
Packaging
Solder Balls - Area Array

(a) (b)

Figure 8.10
(a) Cross section through a solder ball before and after reflowing. Copyright 1969
by International Business Machines Corporation. Reprinted with permission from
Ref. [4]. (b) Flip-chip Pb/Sn solder bumps in standard 250 mm pitch (right) and 50
mm. Courtesy of MCNC Optical and Electronic Packaging Group.

© 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This For the exclusive use of adopters of the book
material is protected under all copyright laws as they currently exist. No portion of this Introduction to Microelectronic Fabrication, Second
material may be reproduced, in any form or by any means, without permission in writing Edition by Richard C. Jaeger. ISBN0-201-44494-1.
from the publisher.
Packaging
Solder Bumps

Figure 8.11
Bumps formed by
modification of the wire-
bond process. Courtesy of
Kulicke and Soffa
Industiries, Inc. (K&S).

© 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This For the exclusive use of adopters of the book
material is protected under all copyright laws as they currently exist. No portion of this Introduction to Microelectronic Fabrication, Second
material may be reproduced, in any form or by any means, without permission in writing Edition by Richard C. Jaeger. ISBN0-201-44494-1.
from the publisher.
Packaging
Ball Grid Array

Figure 8.12
(a) Ball grid array cross section
(b) Intel microprocessor using
a BGA. Courtesy of Intel Corp.

© 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This For the exclusive use of adopters of the book
material is protected under all copyright laws as they currently exist. No portion of this Introduction to Microelectronic Fabrication, Second
material may be reproduced, in any form or by any means, without permission in writing Edition by Richard C. Jaeger. ISBN0-201-44494-1.
from the publisher.
Packaging
Gold Bumps on Aluminum

© 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This For the exclusive use of adopters of the book
material is protected under all copyright laws as they currently exist. No portion of this Introduction to Microelectronic Fabrication, Second
material may be reproduced, in any form or by any means, without permission in writing Edition by Richard C. Jaeger. ISBN0-201-44494-1.
from the publisher.
Packaging
Tape Automated Bonding

© 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This For the exclusive use of adopters of the book
material is protected under all copyright laws as they currently exist. No portion of this Introduction to Microelectronic Fabrication, Second
material may be reproduced, in any form or by any means, without permission in writing Edition by Richard C. Jaeger. ISBN0-201-44494-1.
from the publisher.
Packaging
Chip Scale Packages

Figure 8.15

(a) Chip scale package using wire

bonding
(b) Alternate form of CSP
(c) Chip-on-board packaging

© 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This For the exclusive use of adopters of the book
material is protected under all copyright laws as they currently exist. No portion of this Introduction to Microelectronic Fabrication, Second
material may be reproduced, in any form or by any means, without permission in writing Edition by Richard C. Jaeger. ISBN0-201-44494-1.
from the publisher.
Yield
Yield versus Area

Average number of defects per die:

l = n/N = DoA; Do =n/NA
Figure 8.16 Do :density of defects, N: Number of die, A: area of one die
Illustration of wafers showing effect of die size on yield. Dots indicate the
presence of a defective die location. (Die are inked at test.)
(a) For a particular die size, yield is 43%.
(b) If the die size were doubled, the yield would be only 22%

© 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This For the exclusive use of adopters of the book
material is protected under all copyright laws as they currently exist. No portion of this Introduction to Microelectronic Fabrication, Second
material may be reproduced, in any form or by any means, without permission in writing Edition by Richard C. Jaeger. ISBN0-201-44494-1.
from the publisher.
 Yield Modeling
Possible Defect Distributions
f(D) probability density for D
¥
Yield : Y= ò exp(-DA) f (D)dD
0

Impulse Distribution f (D) = d (D0 ) : Y = exp(-D0 A)

D0 = 4 /cm 2 A = 1 cm2 Y = 1.8%

Mature Process Y > 70%

Figure 8.17
(a) Impulse where every wafer has exactly the same number of defects (b) A triangular
approximation to a Gaussian density (c) A uniform density function

© 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This For the exclusive use of adopters of the book
material is protected under all copyright laws as they currently exist. No portion of this Introduction to Microelectronic Fabrication, Second
material may be reproduced, in any form or by any means, without permission in writing Edition by Richard C. Jaeger. ISBN0-201-44494-1.
from the publisher.
 Yield Modeling
Theory
¥
For more complicated probability distributions
Yield : Y= ò exp(-DA) f (D)dD
0 é D0 A ùa
Binomial/Gamma Distributions : Y = ê1 +
ë a úû
Impulse Distribution f (D) = d (D0 ) : Y = exp(-D0 A) a = clustering parameter (0.5 -10)

é1- exp(-D0 A)ù2

Triangular Distribution : Y =ê
�úû • ITRS 2010 (a = 5)
ë D0 A
– D0 ≤ 0.1/cm2
– Critical Defect Size < 30 nm
1- exp(-2D0 A)
Uniform Distribution : Y=
2D0 A

© 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This For the exclusive use of adopters of the book
material is protected under all copyright laws as they currently exist. No portion of this Introduction to Microelectronic Fabrication, Second
material may be reproduced, in any form or by any means, without permission in writing Edition by Richard C. Jaeger. ISBN0-201-44494-1.
from the publisher.
Yield Modeling
Yield Curves
• Theoretical yield curves versus
defect density - area product

• Yield drops off rapidly as die area

increases, but not as rapidly as
Poisson distribution predicts

• Early predictions were based upon

Y = exp(D0A). Fortunately, this
result was far too pessimistic.

Figure 8.18 ITRS Assumption

© 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This For the exclusive use of adopters of the book
material is protected under all copyright laws as they currently exist. No portion of this Introduction to Microelectronic Fabrication, Second
material may be reproduced, in any form or by any means, without permission in writing Edition by Richard C. Jaeger. ISBN0-201-44494-1.
from the publisher.
 End of Chapter 8

Example 8.1

Problems
8.3
8.5
8.9
8.11
8.13
8.17

© 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. For the exclusive use of adopters of the book
This material is protected under all copyright laws as they currently exist. No Introduction to Microelectronic Fabrication,
portion of this material may be reproduced, in any form or by any means, Second Edition by Richard C. Jaeger. ISBN0-201-
without permission in writing from the publisher. 44494-1.
Packaging and Yield
References

© 2002 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This For the exclusive use of adopters of the book
material is protected under all copyright laws as they currently exist. No portion of this Introduction to Microelectronic Fabrication, Second
material may be reproduced, in any form or by any means, without permission in writing Edition by Richard C. Jaeger. ISBN0-201-44494-1.
from the publisher.