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Design Issues in Hardware/Software Co-Design R. Ganesh

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International Journal of Research in Electronics & Communication Technology
Volume-2, Issue-1, January-February, 2014, pp. 01-05, © IASTER 2013
www.iaster.com, ISSN Online: 2347-6109, Print: 2348-0017

Design Issues in Hardware/Software Co-Design

R. Ganesh
Sr. Asst. Professor, ECE Department, CVR College of Engineering, Hyderabad, India

ABSTRACT
The complexity of designing electronic systems and products is constantly increasing. The increasing
complexity is due to the factors such as: portability, increased complexities of software and hardware,
low power and high speed applications etc. Due to all these factors the electronic system design is
moving towards System on Chip (SoC) with heterogeneous components like DSP, FPGA etc. This
concept of integrating hardware and software components together is moving towards Hardware-
Software co design (HSCD). The main focus of this paper is to provide an overview of hardware,
software design approaches and challenges to meet the requirements of HW/SW co design. All the
design issues are described by using design flows.

Keywords: Co-Design, Design flow, VLSI, Hardware

I. INTRODUCTION
Most engineering designs can be viewed as systems, i.e., as collections of several components whose
combined operation provides useful services. Components can be heterogeneous in nature and their
interaction may be regulated by some simple or complex means. Most examples of systems today are
either electronic in nature (e.g., information
processing systems) or contain an electronic
subsystem for monitoring and control (e.g., plant
control) [1]. Any system can be partitioned in to data
unit and control unit. The data unit performs different
operations on data elements like addition, subtraction
etc. The control unit controls the operations of data
unit by using control signals. The block diagram of a
general system is shown in Fig.1.
Fig.1: Block Diagram of a General System

The total design of data and control units can be done by using Software only, Hardware only or
Hardware/Software Co design methodologies. The selection of design methodology can be done by
using different non functional constraints like area, speed, power, cost etc. The software design
methodology can be selected for the systems with specifications as less timing related issues and less
area constraints. Using the software design system less area and low speed systems can be designed.
To design a system with high speed, timing issues need to be considered. The hardware design
methodology is one solution to design high speed systems with more area compared to software
designs. Because of present SoC designs, systems with high speed, less area, portability, low power
have created the need of combining the hardware and software design methodologies called as
Hardware/Software Co-Design. The co-design can be defined as the process of designing and
integrating different components on to a single IC or a system. The components can be a hardware
component like ASIC, software component like microprocessor, microcontroller, electrical
component or a mechanical component etc.
International Journal of Research in Electronics & Communication Technology (O) 2347-6109
ISSN
Volume-2, Issue-1, January-February, 2014, www.iaster.com (P) 2348-0017

The Software design methodology for a microprocessor with design flow is explained in section II
and the hardware design methodology for an FPGA with design flow is explained in section III. The
Hardware/Software Co-Design methodology issues are explained by using design flow in section IV
then conclusion and references.

II. SOFTWARE DESIGN METHODOLOGY

In general the design of a system with software based needs a design entry as
programming language like c, c++ etc. The design flow is shown in Fig.2.

In this methodology the constraints are with respect to area but not speed.
The system design information can be specified by using user requirements to
the system designer. The user requirements are verified according to the
target board (like processor), area, speed and other non functional constraints.
If the user requirements satisfy existing elements then the design will move
forward, otherwise user has to refine the requirements. General programming
languages like c, c++ etc can be used as the design entry and compilation will
be done to check the functionality is with respect to specifications or not.
Finally hex file or bit file is generated according to the target device.
Fig.2: Software Based Design Flow

The advantage of this design process is easy to design and implement with less area but timing issues
and speed cannot be improved. The timing issues and speed can be considered by using the hardware
based design methodology.

III. HARDWARE DESIGN METHODOLOGY

The systems with hardware components considering timing can be designed by using a programmable
devices like PLA, PAL, PGA, FPGA or a non programmable device like ASIC. The systems behavior
can be expressed by using a Hardware Description Language like Verilog HDL, VHDL etc. instead of
a programming language. These HDL languages describe the timing behavior of the hardware
elements. The design flow for an FPGA is shown in Fig.3.

The system design starts with the refined

specifications. The specifications are converted
into architecture. The architecture functionality
is expressed by using Hardware Description
Langue (HDL) like VHDL or Verilog HDL.
The functionality can be verified by using
simulation with the help of test bench. After
the functional verification the design can be
converted into gate level structural
interconnected form called as net list with the
help of synthesis. The synthesized net list will
be placed and routed on the selected target
FPGA board. A bit file will be generated to
load the designed system on to the target
FPGA.
Fig.3: FPGA Design Flow

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International Journal of Research in Electronics & Communication Technology (O) 2347-6109
ISSN
Volume-2, Issue-1, January-February, 2014, www.iaster.com (P) 2348-0017

The advantage of hardware based design methodology is the timing information can be specified by
using HDL and high speed systems can be designed compared to software based methods.

IV. HARDWARE/SOFTWARE CO-DESIGN METHODOLOGY

The systems with less area and simple elements can

be designed by using software and the systems with
timing/speed can be designed by using hardware.
Because of portability, battery based designs;
System on Chip concepts, low power high speed
issues there is a need to integrate hardware and
software components together. The integration of
hardware and software components together is
called as co-design. Designing of a co-design
system needs a generic co-design methodology. The
generic co-design flow is shown in below Fig.4.

The generic co-design flow for hardware software

co-design system consists of the following steps.

A. Specifications

The specifications can be refined from the user

requirements such that the target system can fit into
any one of the available hardware component or
software element. This caring of specifications is
not available in the HW or SW design
methodologies. Because of the HW/SW elements in
the target system specifications must be properly
selected.
Fig 4: Generic Co-Design Flow
B. Design Entry

The specifications can be expressed by using different types of models, languages etc. One best
method of design entry is combining some programming language features with hardware description
language features or vice versa. This combination of different languages leads to a new co-design
language. The design entry can be selected based on the following criteria.

If the specifications can not be partitioned /separated into hardware blocks or software blocks
then use this co-design language.
The languages can be combined based on the performance criteria i.e. primal approach or dual
approach.
The number of registers of the target processor is also a constraint in the language selection.
The language selection can be based on target compiler availability also.
Some of the co-design specification languages are like LOTOS, SDL, and HardwareC etc.

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International Journal of Research in Electronics & Communication Technology (O) 2347-6109
ISSN
Volume-2, Issue-1, January-February, 2014, www.iaster.com (P) 2348-0017

C. Co-Simulation

The system functionality of a hardware system can be verified by simulation; software system can be
verified by using compilation. But functionality of a system with both hardware and software parts
can not be verified by using simulation or compilation. This is due to the following reasons.

The system feature with HDL language elements can not be verified by using compilation.
The system feature with programming language can not be verified by using simulation.
The present available compilers can not be used for the verification because of register
widths, processor capacity and new features because of multiple systems integration.
Hence, to verify the HW/SW co-design system functionality a new tool called as co-simulation is
required. The design of a co-simulator is also a complex process. After the co simulation, the design
can be applied to HW/SW portioning block.

D. HW/SW Partitioning

After the co simulation of the system some of the elements can be portioned into hardware/software
elements. This partitioning consists of following three portions to avoid functionality mismatch.

Hardware Part
Software Part
Communication Synthesis
The system is partitioned into hardware part which consists of hardware elements and software part
which consists of software elements. The integration of these hardware and software parts to maintain
the functionality can be done by using communication synthesis.

E. Hardware Part
The hardware part consists of hardware specifications that can be observed from the given system
specifications. The hardware specifications can be converted into hardware elements by using
synthesis, placement and routing. This process is similar to normal hardware design methodology.

F. Software Part

The software part consists of software specifications that can be observed from the given system
specifications. The software specifications can be mapped to software elements by using compilation,
software implementation model with respect to the target processor. This process is similar to normal
software design methodology.

G. Communication Synthesis

The communication synthesis acts as a controller in between hardware part and software part. This block
integrates the signals of both hardware and software parts to avoid functionality mismatches. The design of
communication synthesis is complex because of communication between different blocks.

H. HW/SW System

The total system can be designed by generating the final bit file for the entire hardware block,
software block and communication synthesis blocks etc. This block generates combined bit file for the
entire system for the given specifications.

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 International Journal of Research in Electronics & Communication Technology (O) 2347-6109
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Volume-2, Issue-1, January-February, 2014, www.iaster.com (P) 2348-0017

The hardware software co design based system can be designed by using the partitioning of hardware
and software resources using partitioning techniques. After the partitioning the design uses hardware
flow and software flows for the concerned steps and at the end these two blocks are communicated to
complete the total system. The partitioning of the co design system is done based on the optimization
goal. The optimization goals can be area, speed, power etc. Two major approaches are used for
partitioning, i.e. Primal approach and Dual approach.

The research in hardware software co design presented different models for implementations like
COSYMA, LYCOS, and VULCAN etc. The applications of co design based systems include
embedded systems like banking and transaction processing applications, signal processing
applications, home appliances and mobile communications etc.

V. CONCLUSIONS

The Hardware/Software co design system can be designed by using the existing hardware design
tools, software design tools and procedures. The co design methodology is best suited for the portable,
battery based products to design SoC products. In this paper hardware design flow for FPGA,
software design flow for a processor is discussed. Some of the HW/SW co design system issues in
terms of HW/SW integration, design entry, compiler tool development, simulator design are
discussed. To design best HW/SW co design systems lot of research in terms of tool design, design
entry and prototyping elements is needed.

REFERENCES

[1] Adnan Shaout, Ali H. El-Mousa., and Khalid Mattar,”Specification and Modeling of HW/SW
Co-Design for Heterogeneous Embedded Systems”, Proceedings of the World Congress on
Engineering, London, U.K, Volume 1, July 1-3, 2009.

[2] “Hardware / software co- design Principles and Practice”, Kluwer academic publishers, 2002.

[3] Jorgen Staunstrup, Wayne Wolf, “Hardware / software co- design Principles and Practice”,
Springer, 2009.

[4] S. Tosun, N. MansouriE. Arvas, M Kandemir, Y. Xie, and W-L. Hung“Reliability-Centric

Hardware/Software Co-design” Proceedings of the Sixth International Symposium on Quality
Electronic Design (ISQED’05)

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