CompArchCh07L02PipelinesThradandProcessor Level Parallelism

Chapter 07: Instruction–Level Parallelism─
VLIW, Vector, Array and Multithreaded

Processors …
Lesson 02:
Pipeline level and higher level Parallelism
Concepts in Parallel Processing
Objective
• To learn effects of parallel pipelines

• To learn superscalar processors
• Understand pipeline and higher levels of
parallelisms
Schaum’s Outline of Theory and Problems of Computer Architecture 2

Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009
Pipeline Parallelism

Pipelining Parallelism Concepts - Superscalar
Processor
• Execute several instructions is parallel
• Two or more instructions execute in parallel as
well as in pipeline
• The instructions that make up a program are
handled in superscalar processors by the
instruction issue logic

Instruction issue logic
• The logic issues instructions to the units in

parallel
• This allows control flow changes, such as
branches, to occur simultaneously across all of
the units, making it much easier to write and
compile programs for instruction-level parallel
superscalar processors

Two or More Parallel Pipelines

Parallel pipelines

ARM7 pipelines in parallel
• Performance further improves in processors by

allowing independent instructions to execute
simultaneously (called instruction-level
parallelism)

Pipelining and instruction-level parallelism
combine in the superscalars
• Most modern processors (called superscalars) employ
both techniques to improve performance

Examples of pipelining and parallel
processing of instructions
• SunSparc
• Pentium,
• PowerPC
• ARM

Parallel processing techniques to exploit
instruction-level parallelism
• Superscalar
• VLIW processing
• Vector processing
• Array processing

Instruction Issue Logic and Four execution
units in a superscalar

VLIW Processing
• VLIW instruction-level parallelism relies on the

compiler to determine which instructions may be
executed in parallel and providing that
information to the processor hardware
(instruction issue logic)

VLIW Processing
• Require that programs be recompiled for the new

architecture, but achieve very good performance
on programs written in sequential languages
such as C or FORTRAN when these programs
are recompiled for a VLIW processor

Vector Processing
• The operations such as multiply are first divided

into several steps and a stream of operands
(called vectors) operated in for each step parallel
processing units

Vector Processing
• A vector processor functions for instruction level

parallelism by using instruction-parallel
architecture along with vector element operands
in the parallel processing pipelines
• It is most common special case of pipelining

Array Processing
• The operations are first divided into several streams of

operands (called array elements) and run for each
stream in the parallel processing units
• It is a special case of pipelining, where the parallel
pipelines operate on different streams of operands
• An array processor functions as data parallelism by
using data-parallel architecture. There is single
instruction processing multiple data in parallel
processing units

Array Processing
• An array processor functions as data parallelism

by using data-parallel architecture
• Single instruction processing multiple data in
parallel processing units

Multithreaded Processing
• The operations─ first divided into several

threads, and then each thread is divided into
instruction streams
• Instruction streams in parallel
• Concurrent execution of thread
• When a thread is blocked or delayed then
another thread instruction-streams run in the
pipelines
Thread-issue-logic in Multithreaded
Processing
• Can run different threads in time slicing mode or
in priority mode
• A special case of parallel processing, where the
parallel pipelines operate on instruction streams
of a thread

Multiprocessor Systems─ Highest level
Coarse-grained Parallelism
• Multiprocessors give parallelism at processor
level
• An application divided into number of processes
• Each process may be broken into threads each of
which processes by two or more processors or
processor cores on single chip

Multiprocessor Systems─ Highest level
Coarse-grained Parallelism
• Processors may be identical or heterogeneous
and distributed
• Inter-process communication between different
processors
• The ration of time spent in computation on one
processor << the inter-process communication
time

Summary

We Learnt
• Parallel Pipelines improves Performance

• Superscalars has special hardware techniques
to enable issue of instructions after resolving
conflicts by scheduling the instructions
dynamically and by predicting branches by
hardware in superscalar
• VLIW processor
• Vector processor
• Array processor
We Learnt
• Multithreaded processor
• Multiprocessor system

End of Lesson 02 on
Pipeline level and higher level Parallelism
Concepts in Parallel Processing


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Chapter 07: Instruction–Level Parallelism─

VLIW, Vector, Array and Multithreaded

• To learn effects of parallel pipelines

Schaum’s Outline of Theory and Problems of Computer Architecture 2

Schaum’s Outline of Theory and Problems of Computer Architecture 3

Schaum’s Outline of Theory and Problems of Computer Architecture 4

• The logic issues instructions to the units in

Schaum’s Outline of Theory and Problems of Computer Architecture 5

Schaum’s Outline of Theory and Problems of Computer Architecture 6

Schaum’s Outline of Theory and Problems of Computer Architecture 7

• Performance further improves in processors by

Schaum’s Outline of Theory and Problems of Computer Architecture 8

Schaum’s Outline of Theory and Problems of Computer Architecture 9

Schaum’s Outline of Theory and Problems of Computer Architecture 10

Schaum’s Outline of Theory and Problems of Computer Architecture 11

Schaum’s Outline of Theory and Problems of Computer Architecture 12

• VLIW instruction-level parallelism relies on the

Schaum’s Outline of Theory and Problems of Computer Architecture 13

• Require that programs be recompiled for the new

Schaum’s Outline of Theory and Problems of Computer Architecture 14

• The operations such as multiply are first divided

Schaum’s Outline of Theory and Problems of Computer Architecture 15

• A vector processor functions for instruction level

Schaum’s Outline of Theory and Problems of Computer Architecture 16

• The operations are first divided into several streams of

Schaum’s Outline of Theory and Problems of Computer Architecture 17

• An array processor functions as data parallelism

Schaum’s Outline of Theory and Problems of Computer Architecture 18

• The operations─ first divided into several

Schaum’s Outline of Theory and Problems of Computer Architecture 20

Schaum’s Outline of Theory and Problems of Computer Architecture 21

Schaum’s Outline of Theory and Problems of Computer Architecture 22

Schaum’s Outline of Theory and Problems of Computer Architecture 23

• Parallel Pipelines improves Performance

Schaum’s Outline of Theory and Problems of Computer Architecture 25

Schaum’s Outline of Theory and Problems of Computer Architecture 26

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