University Of Management and Technology Date: June 11, 2024
CS2031 Final Exam Spring 2024
Digital Logic Design Lab V19 Group 03 Name: ______________________ Student ID: ____________________________ Question#01[ CLO 1, CLO 2, CLO3, CLO 4]: Implement a 8x3 encoder, including its logical diagram and truth table. Question#02[CLO 4]: Design a circuit diagram for Full Adder using NAND Gates.