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MOSFET
MOSFET (metal oxide semiconductor field-effect transistor)
another category of field-effect transistor.
has no pn junction structure; instead, the gate of the MOSFET is insulated from the channel by a silicon
dioxide (SiO2) layer.
The two basic types of MOSFETs are enhancement (E) and depletion (D). Of the two types, the
enhancement MOSFET is more widely used.
hese devices are sometimes called IGFETs (insulated-gate FETs).

PREPARED BY NAIMA SULTANA ALAM SUPTI, LECTURER, DEPT. OF EEE, SUST 97

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DEPLETION-TYPE MOSFET

• A slab of p -type material is formed from a silicon =substrate.

• In some cases the substrate is internally connected to the source terminal.
However, many discrete devices provide an additional terminal labeled SS ,
resulting in a four-terminal device.
• The source and drain terminals are connected through metallic contacts to n
-doped regions linked by an n -channel.
• The gate is also connected to a metal contact surface but remains insulated
from the n -channel by a very thin silicon dioxide (SiO 2 ) layer.
• There is no direct electrical connection between the gate terminal and the
channel of a MOSFET.
• It is the insulating layer of SiO2 in the MOSFET construction that accounts
for the very desirable high input impedance of the device.

PREPARED BY NAIMA SULTANA ALAM SUPTI, LECTURER, DEPT. OF EEE, SUST 98

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ENHANCEMENT-TYPE MOSFET
This is the primary difference between the
construction of depletion-type and enhancement-
type MOSFETs—the absence of a channel as a
constructed component of the device.

PREPARED BY NAIMA SULTANA ALAM SUPTI, LECTURER, DEPT. OF EEE, SUST 99

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Operation
• When VGS = 0 V and a VDS >0 , absence of an n -channel will result in a
current of 0 A, there are two reverse-biased p – n junctions to oppose any
significant flow between drain and source.
• When both VGS and a VDS have been set at some positive voltage greater,
the positive potential at the gate will pressure the holes in the p -substrate &
attract the electrons to the positive gate and accumulate in the region near
the surface of the SiO 2 layer. The SiO 2 layer will prevent the negative
carriers from being absorbed at the gate terminal.
• As VGS increases in magnitude, the concentration of electrons near the SiO2
surface increases until eventually the induced n -type region can support a
measurable flow between drain and source.
• The level of VGS that results in the significant increase in drain current is
called the threshold voltage and is given the symbol VT .
• Since the channel is nonexistent with VGS = 0 V and “enhanced” by the
application of a positive VGS voltage, this type of MOSFET is called an
enhancement-type MOSFET.
• Both depletion- and enhancement type MOSFETs have enhancement-type
regions, but the label was applied to the latter since it is its only mode of
operation.

PREPARED BY NAIMA SULTANA ALAM SUPTI, LECTURER, DEPT. OF EEE, SUST 100

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• As VGS is increased beyond the

threshold level, the density of free
carriers in the induced channel will
increase, resulting in an increased
level of drain current (I D).
• if VGS is kept constant and increase
VDS, the drain current will
eventually reach a saturation level
as occurred for the JFET and
depletion-type MOSFET.
• The leveling off of ID is due to a • Applying Kirchhoff’s voltage law to the terminal
pinching-off process depicted by • If VGS is held fixed at some value such as 8 V and VDS is increased from 2 V to
the narrower channel at the drain 5 V, the voltage VDG will increase from -6 V to -3 V and the gate will become
end of the induced channel. less and less positive with respect to the drain.

PREPARED BY NAIMA SULTANA ALAM SUPTI, LECTURER, DEPT. OF EEE, SUST 101

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• This reduction in gate-to-drain

voltage will in turn reduce the
attractive forces for free
carriers (electrons) in this
region of the induced channel,
causing a reduction in the
effective channel width.
• Eventually, the channel will be
reduced to the point of pinch-
off and a saturation condition
will be established.

• The drain characteristics of Fig. 6.35 reveal that for the device of Fig. 6.34 with VGS = 8 V, saturation occurs at a
level of VDS = 6 V. In fact, the saturation level for VDS is related to the level of applied VGS by

• For a fixed value of V T , the higher the level of VGS , the greater is the saturation level for VDS , as shown in Fig.
6.34 by the locus of saturation levels.

PREPARED BY NAIMA SULTANA ALAM SUPTI, LECTURER, DEPT. OF EEE, SUST 102

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E-MOSFET Transfer Characteristic

PREPARED BY NAIMA SULTANA ALAM SUPTI, LECTURER, DEPT. OF EEE, SUST 103

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E-MOSFET Bias

Because E-MOSFETs must have a VGS greater than the threshold value,
VGS(th), zero bias cannot be used.

Figure shows two ways to bias an E-MOSFET. In either the voltage-divider

or drain-feedback bias arrangement, the purpose is to make the gate
voltage more positive than the source by an amount exceeding VGS(th).
Equations for the analysis of the voltage-divider bias in are as follows:
N-channel

In the drain-feedback bias circuit , there is negligible gate current and,
therefore, no voltage drop across RG. This makes VGS = VDS.

PREPARED BY NAIMA SULTANA ALAM SUPTI, LECTURER, DEPT. OF EEE, SUST 104

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PREPARED BY NAIMA SULTANA ALAM SUPTI, LECTURER, DEPT. OF EEE, SUST 105

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Body effect

The "body effect" in a MOSFET refers to a phenomenon where the threshold voltage (Vth) of the MOSFET
is affected by the voltage applied to the body terminal of the device. This effect is also known as the
"subthreshold slope" or "threshold voltage roll-off."
In many applications the source terminal is connected to the substrate (or body) terminal , which results in
the pn junction between the substrate and the induced channel having a constant zero (cutoff) bias. In such a
case the substrate does not play any role in circuit operation and its existence can be ignored altogether.

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MOSFET as Switch
MOSFET is commonly used as an electronic switch in various applications. Its ability to control the flow of current
between its source and drain terminals by varying the voltage applied to its gate terminal makes it an ideal choice for
switching purposes.
1. Operating Modes:
Enhancement-Mode MOSFET : In this mode, the MOSFET is normally off (non-conductive) until a voltage is applied to
the gate terminal, turning it on (making it conductive). The gate voltage (VGS) is typically positive.
Depletion-Mode MOSFET: In this mode, the MOSFET is normally on (conductive) until a voltage is applied to the gate
terminal, turning it off (making it non-conductive). The gate voltage (Vgs) is typically negative.
2. Switching On and Off:
To turn an enhancement-mode MOSFET on, you apply a positive voltage to the gate relative to the source
(VGS > Vth, where Vth is the threshold voltage).
To turn a depletion-mode MOSFET off, you apply a negative voltage to the gate relative to the source
( VGS < Vth).
** MOSFETs can switch on and off very quickly, making them suitable for high-frequency applications.

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CMOS(complementary MOSFET)

• constructing a p -channel and an n –channel MOSFET

on the same substrate.
• One very effective use of the complementary
arrangement is as an inverter. As introduced for
switching transistors, an inverter is a logic element that
“inverts” the applied signal.
• Note in Fig. 6.45 that both gates are connected to the
applied signal and both drain to the output V o .
• The source of the p -channel MOSFET (Q2) is
connected directly to the applied voltage VSS, whereas
the source of the n -channel MOSFET (Q1) is connected
to ground.
• For the logic levels defined above, the application of 5
V at the input should result in approximately 0 V at the
output.

PREPARED BY NAIMA SULTANA ALAM SUPTI, LECTURER, DEPT. OF EEE, SUST 110

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CMOS(complementary MOSFET)

Vin VGS1 Q1 VGS2 Q2 V out

5V Vi=5 on 0 off 0

0V 0 off 5 on V ss =5V

In NMOS, positive gate voltage ,turns on the MOSFET

In PMOS negative/zero gate voltage turns on the MOSFET

PREPARED BY NAIMA SULTANA ALAM SUPTI, LECTURER, DEPT. OF EEE, SUST 111

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