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\ \ FEATURES
On the Cover
EUV semiconductor wafer
exposure, artist impression
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W
elcome to the second vol- of ASML and by Winfried Kaiser of 2024), and on power semiconductor
ume of the IEEE Electron Carl Zeiss; Kurt Ronse of Interuniver- devices (December 2024). We are still
Devices Magazine! After sity Microelectronics Centre addresses welcoming submissions of excellent
a successful launch last the second aspect. More- contributed articles and columns relat-
year with its first three over, John Cressler shares ed to those topics.
issues, we now enter our his view on what it takes We have slightly revised our Guide-
second year, a full year to become a great teacher lines for Authors. In the future we want
with four issues. in an “Educator’s Desk” to give preference to papers not exceed-
In No. 1, we catch up column. In the “Women ing six printed pages in total. This will
with the topic of semi- in Electronic Devices” allow us to publish more articles and
conductor manufacturing column, Mukta Farooq, columns, particularly from contributed
from the previous issue the first female engineer submissions. Submissions can be on any
in December 2023 and to win the prestigious topic; we may publish articles that have
focus on the art of pho- J.J. Ebers Award of the successfully passed peer review either
tolithography from the perspective of Electron Devices Society, tells about next to one of the feature articles or by
equipment manufacturing and pro- her career path to become a leader in using them as an initiation of a new fea-
cess integration. On the first aspect microelectronics. ture topic.
we have two articles, by Jan van Schoot The next three issues will focus at We hope that you will enjoy the
large-area and flexible electronics (June present issue of the IEEE Electron
2024), the humanitarian impact of elec- Devices Magazine.
Digital Object Identifier 10.1109/MED.2024.3372348
Date of current version: 21 March 2024 tron device applications (September
T
his year, 2024, marks the 140th nical disciplines: from material science, reliable solutions. The efficiency of
anniversary of IEEE, an organiza- solid-state physics, quantum mechan- converting and safely operating renew-
tion that has been at the forefront ics, chemistry, chemical engineering, able energy sources, such as solar
of transformative break- and mechanical engineer- energy, has become a focal point, driv-
throughs, fundamentally ing to device architecture ing the development of new materials
changing human life. and modeling, fabrication and devices.
Within this incredible and process engineering, Interdisciplinary research is gain-
140-year history of tech- characterization and reli- ing prominence as the boundaries
nological innovations and ability, and the design and among information technology, intel-
advancements, the realm implementation of circuits ligent transportation, environmental
of electron devices has and systems. This diversity engineering, nanotechnology, biology,
played a pivotal role. Just is a testament to the funda- biomedical technology, healthcare, and
last year, we celebrated a mental and interdisciplinary traditional electrical and electronic engi-
significant milestone: the nature of electron devices, neering blur. This intersection creates
75th anniversary of the transistor. This continually evolving to meet the demands new opportunities for the development
invention has been the cornerstone of of our technologically advancing world. of innovative electron devices and tech-
the electronics and digital world, shap- The sustained need for high-speed nologies that can address complex chal-
ing our life through advancements in computing, greater communication band- lenges in diverse fields.
high-performance computing, Internet width, and expanded digital storage In the realm of emerging devices,
connectivity, mobile communications, capacity consistently propels advance- quantum technologies stand out as a
artificial intelligence, machine learn- ments in silicon and compound transformative frontier. Leveraging the
ing, and the captivating realm of semiconductor technology within the principles of quantum mechanics, these
the Metaverse. semiconductor industry. As we move innovations utilize quantum bits (qubits)
While we acknowledge and cel- forward, focusing on for unparalleled com-
ebrate the achievements of the past, refining semiconductor putational power, prom-
it’s imperative to gaze into the future. manufacturing process- \\\\ ising advancements in
The semiconductor industry has under- es, exploring innovative computing, sensing,
THE EFFICIENCY OF
gone dramatic shifts in the past decade. materials, and enhanc- and communication.
Today, only a select few IC manufactur- ing chip design and CONVERTING AND This trajectory pro-
ing companies can afford the immense packaging will be SAFELY OPERATING pels us to explore new
investment required to develop the most pivotal in meeting the RENEWABLE ENERGY materials and prin-
advanced technology nodes. On the evolving demands of SOURCES, SUCH AS ciples related to elec-
other hand, as we witness the emergence these technologies. SOLAR ENERGY, HAS trons, exploiting their
and evolution of many new applications, In response to the interaction with elec-
BECOME A FOCAL
the field of electron devices is diversify- global imperative for tromagnetic fields in
ing. Electron devices and technologies climate-conscious and POINT, DRIVING THE artificially fabricated
have been and will remain the founda- sustainable develop- DEVELOPMENT OF structures for innova-
tion of electronic circuits and systems. ment, the generation, NEW MATERIALS tive applications.
The domain of electron devices conversion, storage, AND DEVICES. Against this back-
encompasses a broad spectrum of tech- transmission, and appli- drop, the IEEE Electron
cation of energy are Devices Society (EDS)
undergoing a transformation toward clean, is actively refining its focus and enhanc-
Digital Object Identifier 10.1109/MED.2024.3369211
Date of current version: 21 March 2024 low-carbon, safe, efficient, flexible, and ing activities to champion excellence in
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My Story
T
o succeed in life, you need the studying diffusion barriers in Schottky
courage to fail and the humility to Mukta Farooq is the winner of the devices and it started a lifelong love of
learn. If you are lucky enough to 2023 J.J. Ebers Award. In its long semiconductors.
meet failures on your way, and are history, Mukta is the first woman I started at IBM Microelectronics as
plucky enough to carry on after meeting ever to win this prestigious award a staff engineer, working on advanced
them, you will be well on your way to of the IEEE Electron Devices packaging technology, creating innova-
achieving success. Society. tive thin film redistribution wiring on
As a precocious three-year old, packaging substrates in 1988. It was the
I had been trained by my parents to first of its kind technology, specially
answer the “What will you be when you just to survive but to flourish. All things developed to improve IBM System per-
grow up?” question with the response considered, I love my alma mater dear- formance. Within a year, I was given
“Madam Curie!” But behind the humor- ly for a top-notch education, lifelong the mantle of technology qualifications
ous punch line was the role model for friends, and especially for giving me first at the East Fishkill, NY site, and
women in science, the one and only my classmate, Shaji, whom I fell in love a few months later at the Sindelfingen,
Marie Curie, who had broken all barri- with and married (Figure 1)! Germany site. It was a very exciting time
ers at a time when women rarely entered My Master’s degree at Northwestern for a newcomer, a steep learning curve
the scientific arena. It was this encour- University was in the study of classical for sure, but one that set the tone for
agement and confidence that served as metallurgy. It was at Rensselaer Poly- my career. Once I had tasted the thrill
the springboard for all of my academic technic Institute in Troy, NY, where I of qualifying and productizing semi-
endeavors, including getting into the first studied electron device physics, conductor technology, I always wanted
Indian Institute of Technology Bombay which fascinated me and helped define to work on the next big thing and see
for my undergraduate degree. Being one my career path. My doctoral thesis was it come alive in IBM hardware. At one
of a handful of girls in a class of 300 point, I realized that the silicon back end
proved daunting at first. It was not just of line (BEOL) and lead-free C4 were
the discomfort of being stared at but headed for an epic clash, i.e., chip pack-
also the isolation of being a different age interaction failures. Realizing that
“species.” But it trained me for what lay the unyielding lead-free alloys compris-
ahead. As the first ever female under- ing mostly tin/silver were here to stay,
graduate in metallurgical engineering, and that this problem had to be dealt
I discovered that there was not a single with at a holistic level, I decided to move
women’s restroom in the entire build- to the BEOL group.
ing! I panicked first, then improvised Any change is scary, more so if
and ran over to the Humanities Depart- it happens midcareer and you have
ment, which I knew would have one. It to restart at the bottom. I had to work
was an inconvenience, but the way I saw hard and smart, so that I could catch up
it, at least there was a restroom for me and then some. Using my knowledge
in the next building rather than farther of packaging technology, I made some
away. Taking things in stride and look- critical materials’ changes and then suc-
ing at the bright side was important not cessfully ran the qualification for 65-nm
low k BEOL chips with lead-free C4.
Digital Object Identifier 10.1109/MED.2024.3372173 FIGURE 1. Shaji and Mukta with their
Date of current version: 21 March 2024 grandson Zain (August 2023). (continued on page 47)
Founded in 2000, TDMR publishes original papers and letters. The editor-in-chief together with the editorial team
also solicits review articles, invited papers for special issues on highly topical themes. TDMR is co-sponsored by
the IEEE Electron Devices and the IEEE Reliability Societies.
Nominations and applications are invited for the position of Editor-in-Chief (EiC) for TDMR for a 3-year term
beginning as soon as available, but no later than January 2025. The EiC’s ongoing duties include assigning
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makes the final decision regarding the disposition of each manuscript submitted to TDMR based upon the
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Ability and motivation to spend sufficient time to assign manuscripts and reviewing the acceptance or
rejection recommendations made by the editors;
Demonstrated technical leadership within the field of reliability evaluation and characterization;
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Please email the nomination materials to Laura Riello (l.riello@ieee.org), no later than May 15, 2024.
I
n modern high-end integrated circuits ously increasing number of elements This article is part of a series of three.
(ICs) one can find billions of active over time is called Moore’s law. The For the related articles, see [1] and [2].
elements. These ICs fuel devices like resolution itself is defined by the lithog-
mobile phones, complex graphical raphy tools. Over the years, the resolu- Smaller and Smaller
engines, servers, and high-end super- tion of these tools has improved from In 1965, Gordon Moore realized that,
computers. This would not be possible several micrometers in the early 1970s to with smaller transistors, “everything
without optical lithography, allowing for 13 nm in state-of-the-art extreme ultravi- became better”: smaller transistors con-
a continuous shrink in the dimensions of olet (EUV) tools [m = 13.5 nm, numeri- sume less energy, take up less space,
the individual active elements. Many cal aperture (NA) = 0.33] and will switch faster, use less material, are cheap-
technological developments over the last improve even further down to 8 nm in er, etc. The progress of available technol-
decades have enabled this. The continu- what are called high-NA EUV exposure ogy would dictate the speed of growth of
tools (NA = 0.55). There is an outlook the number of transistors on a single chip.
toward exposure tools allowing for even Based on his own o bservations, he
Digital Object Identifier 10.1109/MED.2023.3337129
Date of current version: 21 March 2024 smaller resolutions in the next decade. predicted in 1965 that the number of
r
10
ea
9
/Y
8
7
is key. In addition to this, other technolo-
2x
6
5
4
1959
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969
1970
1971
1972
1973
1974
1975
Year
1980 1990 2000 2010 2020 2030
The starting point of pushing down
the optical resolution is the Rayleigh or FIGURE 1. The graph that Gordon Moore made in 1965 is the basis for Moore’s law
Abbe equation, describing the minimum (inset). Today the trend is 2× more active components every two years, which has been
remarkably stable until today and shows no signs of slowing down [3], [4] and extended
feature size that can be resolved in a with public data.
diffraction-limited system:
trast. This contrast can partially be advanced techniques like source–
m
CD = k 1 $ . (1) gained back by techniques like mask optimization (SMO). Here
NA
coherent imaging and improved advanced illumination shapes are
Here critical dimension (CD) is the optical quality. Working in a lower combined with adaptations to the
resolution, m is the wavelength of the contrast regime will put stronger feature shapes on the mask to obtain
exposure light, NA the numerical aper- demands on process stability so as optimized image fidelity and process
ture of the projection optics, and k1 a not to end up with a lower device latitude on the wafer. For an exam-
so-called process parameter. The theo- yield, hence the term process param- ple, see Figure 3.
retical limit of k1 is 0.25 [5], [6]. eter. Reducing k1 is the most obvi- ■■ Increase NA: NA is the angular range
To achieve a smaller resolution, all ous method to reduce the resolution. that a lens can capture. It is defined as
three parameters are being utilized. It does not require a new lens design NA = n $ sin ^ah (2)
Here, an overview is given in the order or new materials and sources to cope
of impact for the industry. See also Fig- with different wavelengths. Improved where a is the maximum angle with
ure 2 for an overview of a series of expo- process control still involves the respect to the normal. The refractive
sure tools since 1985. exposure tool (e.g., tighter focus and index n is usually 1 in air or a vacuum.
■■ Reduce k1: Reducing k1 for a given dose control), add-ons like flexible Increasing the NA is a very effective way
NA and wavelength yields a smaller illuminators [1] to support off-axis to improve the resolving power of an
feature but at the cost of optical con- or incoherent illumination, and exposure tool. This has been done over
1,000
G-Line (436 nm) Wavelength (nm)
436 g-Line
355 i-Line
i-Line (365 nm) 248 KrF
XT:1400 193 ArF and Immersion
= k1x wavelength / NA
100 NA + 45%
Resolution (nm)
FIGURE 2. Lithography exposure tools evolution since 1985. Note that in the era of immersion, double patterning was introduced to
reduce the resolution, leading to an “effective” k1 smaller than the theoretical minimum value of 0.25.
TABLE 2. Overview of the large-field EUV projection systems. NXE:3100 was the first commercial system.
ADT NXE:3100 NXE:3300 NXE:3350 NXE:3400 NXE:3600 EXE:5000
POB
NA 0.25 0.25 0.33 0.33 0.33 0.33 0.55
Resolution [nm] 32 22 18 16 13 13 8
Demagnification 4 4 4 4 4 4 4x/8y
Illuminator
Type Fixed Fixed Variable Variable Variable Variable Variable
Sigma 0.5 0.8 0.2–0.9 0.2–0.9 0.06–1 0.06–1 0–1
Pupil fill ratio 100% 100% 40% 40% 20% 20% 20%
Source
Type DPP DPP/LPP LPP LPP LPP LPP LPP
Power [W] 4 10 70 125 300 350 350
Throughput [WhH] 1 6 60 95 145 185 185
ADT: Alpha Demo Tool; POB: projection optics box; DPP: discharge-produced plasma; LPP: laser-produced plasma; WhH: wafers/h.
(a) (b)
FIGURE 6. (a) The Alpha Demo Tool, with the source just visible on the left side, the mask hander on top, and the wafer handler on
the right side. The systems were installed in Albany, NY, USA, and Leuven, Belgium. (b) The 32-nm 1:1 lines and spaces printed with
this tool [11].
Measurement Exposure
Wafer
Mapping Fine
Coarse
Wafer Wafer
Align Align
Global
Level
Circle
Chuck
Swap Expose
Wafer
Stage
Align Unload
Wafer
Lot
Correction Reticle
Load Align
Wafer (1st Wafer
of Lot)
FIGURE 7. The dual-stage concept is introduced to maximize the utilization of the optics. All preparation steps to characterize the wafer
in three dimensions are done in parallel to the exposure of a different wafer.
Lens Field Stepper Image Step and Repeat: Step and Scan:
Scanner
Die Size
Scanner
Image
(a) (b) (c)
FIGURE 8. In Step & Repeat systems, the maximum square area of a circular-shaped image field of a lens is utilized. Step & Scan
systems utilize a smaller but wider area of the same lens. By scanning this slit over the mask field, a larger image field can be produced
at the wafer. This almost doubles the resulting die size, while utilizing the same optics.
Typically, 5 to 10% CD
Lines/Spaces
Variation is Allowed
Overlay
Contact Holes Overlay Requirement is
Between CD/3 and CD/6
(a) (b)
FIGURE 9. (a) SEM photograph of a part of a typical CMOS IC. The first two metal layers are shown on top of the active areas of the
active devices and the via’s connection of the different layers. (b) An abstraction of this photograph is depicted: lines and pillars. SEM:
scanning electron microscope.
accelerations is an effective method different exposure tools. The second was originally projected to be intro-
to further increase the productivity group includes the “global” errors: duced in 2010 with the NXE:3100,
of the exposure system. intrafield and intrawafer systematics 0.25 NA. However, it took until 2017,
For this reason, improved wafer and caused by, e.g., a nonuniform illumi- when EUV source power reached val-
mask stages are needed to allow for nation profile over the exposure field ues around 250 W and the industry
larger accelerations while keeping the leading to a degrading CD uniformity accepted EUV as the new standard for
mechanical disturbances to the optical (CDU), or placement errors caused by leading edge technology. In 2018 the
system minimal at the same time. lens and stages. The third term refers first commercial chips were released by
to the “local” errors. These are errors Samsung, shortly followed by TSMC.
Lithography: Key Metrics of a statistical nature due to the limited At this moment, increasing contrast
When designing exposure tools, it is number of photons that are being used. and exposure dose are driving design
important to understand what the rele- This is called photon shot noise (PSN) parameters for modern exposure tools.
vant design parameters are. A guide to [15]. Since at a smaller wavelength
these metrics is depicted in Figure 9. the energy per photon increases, PSN EUV 0.33 NA: The Current EUV
It is important that pillars and lines becomes increasingly important when Workhorse
make a solid electrical connection, printing smaller features.
while at the same time they do not EUV Source Developments
touch neighboring lines. The dimen- EPEmax = “systematics” + “global” Sufficient source power was the key
sion of features is typically denoted + “local”(3) enabler to get EUV into high-volume
by CD. The offset between the centers
of two features that should fall on top It is important to realize that, down EPE Margin EPE Margin
of each other is called the overlay. A to the wavelength of 193 nm, overlay
typical requirement for the uniformity and CDU play an important role. With
of the CD over a wafer is 10% of the the shift in wavelength toward 13.5 nm
feature size. Overlay requirements are (EUV), the energy per photon has
typically between CD/6 and CD/3. increased by a factor of 14. In other
A more generic way of describing words, the amount of photons for a
the behavior of different features on a given exposure dose has decreased 14 FIGURE 10. Schematic drawing of the
chip is called the edge placement error times. At the same time, the printed importance of EPE. In the figure, two lines
and a pillar are made on top of an earlier
(EPE) [14] (see Figure 10). It is an over- features are smaller, so this smaller area layer of lines. This is done by two subse-
arching parameter bringing overlay and will receive an even smaller number quent exposures of two masks: the first
CD errors together. of photons. As a result, when printing mask prints a set of parallel lines; the sec-
The contributions of the different with EUV light, PSN dominates this ond mask prints the connecting pillars. This
errors are summarized by three terms: equation. Together with the relatively second exposure should be well aligned
with respect to the first exposure to avoid
“systematic,” “global,” and “local.” “Sys- low reflection per multilayer (<70%), it unintended short circuits or to ensure that
tematic” points to terms like errors on the is not a surprise that the source power the pillar does not land on the line below.
mask and offsets in behavior between is key in making EUV a success. EUV The dashed patterns are the target shapes.
300
200
100
0
2010 2012 2014 2016 2018 2020 2022 Future
FIGURE 14. The EUV power produced by an LPP source over time. In 2015 powers exceeding 100 W were generated, as needed for
economically viable IC manufacturing.
FIGURE 15. (a) The NXE:3350 Exposure Tool, the first tool with an EUV power of 125 W and allowing for a throughput of ~100 wafers/h
at a dose of 20 mJ/cm2. The progress in industrialization is clearly shown, even without the covers. Pictures of (b) 16-nm and (c) 13-nm
1:1 lines and spaces.
Reflection
0.4 x y
4×/4× ed EUV for high-end mass production.
0.3
8×/8× The improved aberration levels of the
0.2
4×/8× projection lens and the flexible illumi-
0.1
nator helped to push down the k1, and
0 stage acceleration and available source
0 5 10 15 20
Angle of Incidence (°) power enable the required productivity.
(a) (b) The next step is to increase the NA of
the lens. For this, it is important to
FIGURE 18. In the heart of an exposure tool is the mask. On every point of the mask, understand the nature of the mirrors,
a cone of light is reflected. The reflection coefficient depends on the angle of incidence
and especially of the mask, which is
[20]. The angular range on the mask depends on the NA and the magnification of the
projection optics. The y value of the 4x/4x case exceeds the capability of the mask. also a mirror surface containing the pat-
tern information. The multilayer of the
mask has a limited angular reflection
range, as shown in Figure 18(b). On top
of that, the mask should be considered
Strong Shadowing Weak Shadowing
as a 3D structure, causing significant
“shadowing” to the reflected rays. See
Figure 19. A more thorough descrip-
tion of this so-called 3D mask effect is
W W
given in [21]. The consequence, howev-
er, is that rays at angles greater than
~11° with respect to the normal are
severely impacted by both effects.
FIGURE 19. Since the light is reflected on a virtual plane ~50 nm deep into the mul- In 0.25- and 0.33-NA systems, the
tilayer, shadowing effects limit the contrast in the reflected light. This is called the 3D image on the mask is projected on the
mask effect [21]. wafer with a demagnification of four.
Mask
~18° ~9°
~11° ~9°
~8° ~8°
Wafer
33 mm
33 mm
FIGURE 20. (a) The light cones for 0.33 NA, together with (b)–(d) three alternative configurations for 0.55 NA. The 4×/8× configuration
yields both proper throughput and imaging FF: full field, HF: half field, QF: quarter field.
so it will have an area that is four times High NA, QF, New Stages
120
smaller, assuming the same image size
at the mask. From Figures 18(b) and 100
High NA, QF, Current Stages
20(b) it is clear that the angles at the
mask will only exceed the mask capa- 80
bilities in the y direction. So one could
60
think of a lens that has a demagnifica-
tion of 8 in the y direction, and 4 in the 40
x direction. This so-called anamorphic
projection [22], [23], [24] results in an 20
image on the wafer that is only twice 0
as small [see Figure 20(b) and (c)]. 0 5 10 15 20 25 30 35
This larger field has important con- Source Power/Dose (W/mJ/cm2)
sequences for the design of the motors
driving the stages. In the case of the FIGURE 21. Throughput curves for the several configurations in Figure 20. On the
quarter field, four times as many images horizontal axis a normalized value of power/dose is used [25]. QF is the situation as
described in Figure 20(c). HF, as a result of anamorphic projection, yields the highest
have to be printed. At the same time, the productivity, see Figure 20(d).
wafer stage runs twice as fast because
the light is concentrated in a 13-mm-
wide slit; half the size of the original
26-mm-wide slit. At the same time,
the speed of the mask stage relative to
the wafer stage has to be doubled again
because of the double demagnification.
So to keep the overhead time equal when
going from 0.33 to 0.55 NA, the accel-
eration of the wafer stage has to be 4 × 2
= 8 times larger, and the acceleration of
the mask stage has to be 4 × 2 × 2 = 16
times larger. In the anamorphic case,
the slit is as wide as in the 0.33-NA
system, and only twice as many images
need to be printed. So the wafer stage
needs to be 2 × 1 = 2 times more pow-
erful, and the mask stage 2 × 1 × 2 = 4 FIGURE 22. The first 0.55-NA EUV exposure tool, ready to receive the first set of optics
times more powerful. From a techno- (status as of June 2023) [26].
150
and parts of the metrology system
(see Figure 25). As explained previous-
100
K2 = 1
ly, acceleration is key to ensure suffi-
50
0.33 NA cient productivity. The most obvious
thing to happen is the increase in
0.55 NA
0 power dissipation, typically in the
0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7 range ~10–100 kW. The dissipated
NA
power is given by
FIGURE 23. The DoF according to Rayleigh. For 0.55 NA, the value is around 45 nm.
The required focus control is depicted by the gray bars [27]. Power ~ I 2 $ R = k $ ^acc $ mass h2 $ R motor .
(5)
70°
Resist
esist Resist
esist HPD
BARC
ARC BARC
ARC
Hardmask
mask Hardmask
mask
Product Layer
ayer Product Layer
ayer
Silicon Substrate
rate Silicon Substrate
rate
30 30
25 25
SoC 1
20 20
HPD (a.u.)
HPD (a.u.)
SoC 2
15 SoC 3 15
10 SoC 4 10 SoC 1
SoC 5 SoC 2
5 5 SoC 3
SoC 6 SoC 4
SoC 7 SoC 5/6
0 0 SoC 7
0 50 100 150 200 0 50 100 150 200
Hardmask Thickness (nm) Hardmask Thickness (nm)
(a) (b)
a-C TiN
FIGURE 24. (a) The principle of height measurement and the origin of the unwanted ghost rays. (b) Suppressing these rays by a larger
angle reduces the measurement errors [25]. BARC: bottom antireflective coating; SoC: spin-on carbon.
Throughput (WhH)
sumption, as shown by the light gray 8× 160
line in Figure 26. The dark gray line
depicts the resulting throughput. 6× 140
The wafer stages were already fully
4× 120
inside the vacuum, and because of the
demagnification they don’t move as fast
2× 100
as the mask stage. A picture of the two
stages (one in the metrology position Values Relative to NXE:3400
0× 80
and one in the expose position) is shown 0 1× 2× 3× 4×
in Figure 27. Acceleration
Dynamics and Metrology FIGURE 26. Power consumption of the mask stage when increasing the acceleration for
With the large accelerations of the stag- different design strategies [25]. MS: mask stage.
es, it is important to take into account
the reaction forces on the rest of the
system, especially the optics. The fol-
lowing measures are taken to limit and
deal with the remaining disturbances.
See also Figure 28.
1) The stages are equipped with bal-
ance masses. As a result, the center
of gravity of the combined stage/bal-
ance mass stays at one position.
2) The system consists of a base frame
and a metro frame. This metro frame
is isolated from the base frame by
vibration isolators and serves as a
silent world.
3) The stages and the optics are refer-
enced to the metro frame, and stages
are continuously controlled in such FIGURE 27. Wafer-stage module of an EUV exposure system. Exposures are done on
a way that they move according to the stage at right; the other stage is used to map the next wafer in parallel.
Coils Magnets
z xy z Reticle Stage
Balance Mass Long-Stroke Motor Motor/Chuck Coupling
Short-Stroke Lorentz Motor
Optics Frame EU
Isolated From V
fro
Metroframe F m
Illu
Alignment System, x m
ina
Level Sensor to
r
POB Frame
Metroframe
Illuminator
Wafer Stage Wafer Stage Frame
IFM Vibration
F Isolators
Base Frame
FIGURE 28. Schematic diagram of an exposure tool, showing stages, lens, metrology, and measures to suppress the dynamic
disturbances to keep mask, lens, and wafer well positioned with respect to each other. The inset shows the principle of a long-stroke–
short-stroke motor combining a long travel range with high-bandwidth actuation [28]. POB: projection optics box.
Image 1 Image 1
Stitch
Stitch
Image 2 Image 2
FIGURE 29. Stitching results as obtained with a 0.33-NA exposure system. The two images in (a) will be overlapped to make the final
image of the 36-nm pitch lines and spaces, (b) as shown in the SEM figure. In (c) the stitched result of a contact hole pattern is shown.
such that a full field exposure tool can 18 Par Full Field Calculated 18 Par Half Field Calculated
deal with it. A successful application of 0.8
such a strategy is shown in Figure 30. 0.8
0.6 0.7 0.7
The Future 0.6
So far, the developments of the opti- 0.4
cal lithography systems have enabled
0.2
the shrink of features from several
microns all the way down to 8 nm—a 0
remarkable result of many decades of Full Field to Half Field Half Field to Full Field
investments and hard work. To con-
tinue, two questions need to be asked: Layer Full Field Layer Half Field
is it needed, and can it be done?
E
UV is currently the state-of-the-art This article is part of a series of three. of transistors based on cost reduction
lithography technology used to For the related articles, see [1] and [2]. through increased density or reduced
print the most critical layers of dimensions of the electronic compo-
ICs, specifically of advanced logic and The Evolvement of Lithography Optics nents of the ICs. Lithography enables
DRAM. It represents the highest achieve The phenomenal progress ICs have this progress by printing these compo-
ment in the industry after decades of demonstrated to this day is ruled by nents through imaging a patterned mask
development of optical lithography. “Moore’s law,” an observation and pre- on a wafer using a projection optics.
diction published by Gordon Moore in The resolution of this optical system
1965 [3], which became a self-fulfilling determines the minimal useable resolu-
Digital Object Identifier 10.1109/MED.2023.3343627
Date of current version: 21 March 2024 prophecy. It states the biennial doubling tion or critical dimension (CD) of these
FIGURE 1. A historic gallery of ZEISS projection optical systems from early g-line to the latest immersion optics, the Starlith 1900i.
N = 50 d = 61.91 nm
Rmax = 75.2% FWHM = 0.6 nm
0.8 0.8
AOI = 9° Rmax λ = 13.5 nm
0.7 0.7
0.6 0.6
ctw100
Reflectance
Reflectance
0.5 0.5
0.4 FWHM 0.4
0.3 0.3
0.2 0.2
ctw50
0.1 0.1
0 0
12.5 13 13.5 14 14.5 0 15 10 15 20 25
Wavelength (nm) Normal Angle of Incidence (°)
(a) (b)
FIGURE 3. The (a) spectral and (b) angular bandwidth of an EUV multilayer is quite limited [10].
Mask
EUV Source
Projection Optics
IR Laser Plasma
Intermediate
Collector
Focus
Illuminator
Design Scheme
Wafer
FIGURE 4. A design scheme of an EUV optical train consisting of a source, a collector, an illuminator, a mask, projection optics,
and a wafer.
Power (nm4)
to a more acceptable level of 8% by Figure
106
refined mirror polishing; finally, Aberrations
<6% was achieved (see Figure 13). 104
Simultaneously, these improved opti- 102 MSFR
cal processes allowed a reduction of 100 Flare, Contrast
in Field of View Scattering HSFR
the aberrations. A new interferometer 10–2
Reflectivity
was developed to measure the com- 10–4
plete POB under the conditions of use 105 104 103 102 101 100 10–1 10–2
for the full control of the aberrations Wavelength (µm)
caused by mirror deviations and sys-
tem adjustment. FIGURE 10. A schematic 2D isotropic PSD. The rms roughness is defined in a specific
spatial frequency band. HSFR: high spatial frequency roughness; MSFR: midspatial
frequency roughness.
The Second EUV Optics Generation:
The Breakthrough With NA 0.33
The Starlith 3300 POB (Figure 8) is
based on a different layout. The demag-
nification and field size remained
unchanged. The NA was increased in a
significant step to 0.33. This caused a
substantial growth of the optics: the
largest mirrors (Figure 9) have dimen-
sions of ~0.5 m Ø, and the POB weights
>1.5 tons, resulting from the extremely
stiff body with precise mirror mounting.
(a) (b)
Like for all optical lithography
systems, the key optical performance FIGURE 11. High-precision polishing: (a) CCP and (b) IBF.
parameters of an EUV projection
optics fall into the three categories of
aberrations, flare, and transmission.
Imperfections of an optical surface
are characterized by the power spec-
tral density (PSD) over the full surface
(Figure 10). Long-wave deviations are
called figure; they cause aberrations in
the image like astigmatism and coma
or distortion. Long-wave deviations
scale with the inverse of the wave-
length. Higher-order deviations are
summarized under finish and cause
scattering; they scale with the inverse
of the second power of the wave-
FIGURE 12. The full aperture interferometer for ZEISS High NA EUV surface figure me-
length. T he m idspatial frequency trology. The instrument works under advanced climate control in vacuum for the highest
roughness (MSFR) like surface ripples precision and accuracy. It must be capable of characterizing mirrors with 1 m diameter.
cause flare, a small-angle scattering The weight of the large mirrors requires robotic loading.
l
Small Ao
132 mm
the wafer. The patterns on the mask NA 0.33, x MAG 4×
33 mm
must be stretched in the one direction by CRA 6°
a factor of two to compensate the asym- Slit
metric demagnification. A clear conse- (a)
quence of the anamorphic imaging is a 104 mm
half field on the wafer, while the stan- y
26 mm
132 mm
NA 0.5,
dard mask format remains unchanged. x MAG 4×
CRA 6°
33 mm
The fidelity of anamorphic imaging
is proven by extensive critical simula-
tions (Figure 22). (b)
The price on the system level is 104 mm
an even higher complexity in the lens y
26 mm
132 mm
NA 0.5,
design and aspheric mirror manufactur- CRA 9°
x MAG 4×
33 mm
ing. In addition, this path implies also
big challenges for the exposure tool:
(c)
new solutions for the stage actuation are
required to compensate the productivity 104 mm
hit and for stitching the two half fields y
NA 0.5, 13 mm
to generate the standard size compat- 132 mm x MAG 8×
16.5 mm
CRA 6°
ible with all other scanner types with
adequate imaging performance. The
(d)
new solutions in the ASML EXE:5000
made this compromise attractive for the 104 mm
industry [15], [16], [17]. y 26 mm
16.5 mm
132 mm
By Kurt Ronse
E
UV lithography is currently the
state-of-the-art lithography technol-
ogy that is used for printing the
most critical layers in advanced logic and
DRAM chips. It uses a 13.5-nm wave-
length, and the projection optics have a
numerical aperture (NA) of 0.33. EUV
has taken over from 193-nm immersion
lithography where more and more multi-
ple patterning steps were needed to print
these critical layers, resulting in a higher
cost, longer turnaround time (TAT), and
reduced yield. The newest developments
in EUV lithography are to further push
the resolution by building a higher NA
lens. For that, ASML and Zeiss are
developing a new scanner [1] and new
0.55-NA optics [2]. XXXXX
60
Underlayer
50 ness (LER) from these pictures. Sev- Material properties, like nonh omo
40 eral solutions are underway to mitigate geneous distribution of material compo-
30 these effects. nents in the film, also lead to stochastic
20 ■■ The right choice of UL material effects.
10 can improve the metrology image
0 contrast. Stochastics and Roughness
48
44
40
36
32
28
24
20
16
12
8
FIGURE 2. Electron beam image contrast degrading when scaling film thickness (FT) down from 30 nm to 10 nm.
P36
P40 P60 P80
P60
5 6
P90
PTD-CAR Contact CD
5.5
Trench CD = Contacts 21 nm
4.5 22 nm
5
3σ LCDU (nm)
18 nm
LER (nm)
23 nm
4.5 24 nm
4
19 nm
4
20 nm
3.5 3.5
3 Dose = 46 mJ/cm2
3
30 60 90 120 150 180 40 50 60 70 80 90 100
Pitch (nm) Pitch (nm)
(a) (b)
FIGURE 4. (a) The LER of lines and spaces scaling to smaller dimensions. (b) The LCDU of contact holes and pillars scaling to smaller
dimensions.
Defects/µm2
Cl
ks
es
ea
Logic 2016 2017 2018 2019 2020 2021 2022 2023 2024 2025
Active I 93i SAQP + > 3 I 93i Cuts I 93i SAQP + 2 EUV Cuts (FinFET)
EUV SPT (Nanosheet)
Gate I 93i SADP + I 93i MPT Cuts I 93i SADP + EUV Cuts
EUV SPT (Exploration)
M0A I 93i MPT + I 93i Cuts EUV SPT EUV SPT + EUV Cuts
EUV
1×Metal I 93i MPT + I 93i Cuts
SPT
EUV DPT (SADP OR SALELE)
FIGURE 8. A logic scaling road map showing the transition from 193-nm immersion with multiple patterning to 0.33 NA for the most
critical layers (0.55 NA is not on the chart and is expected to start in 2025–2026). SPT: single patterning technology; DPT: double pat-
terning technology; MPT: multiple patterning technology; M0A: local Interconnect layer; C2C: center to center; NS: nanosheet; SAQP:
self aligned quadruple patterning; SADP: self aligned double patterning; SALELE: self aligned litho etch litho etch.
FIGURE 9. The imec AttoLab. CDI: coherent diffractive imaging; UPS: ultraviolet photoemission spectroscopy; XPS: X-ray photoemis-
sion spectroscopy; LEED: low-energy electron diffraction; RGA: residual gas analysis.
(patterning, defectivity, etc.). Many other Rigorous computer simulations can Low-n Masks
materials could be considered, all with easily predict the imaging properties Low-n materials [7], [8] lead to EUV
benefits but also challenges. Figure 11 of these materials. From these simu- attenuated phase shift masks, improv-
shows the refractive index (n) and lations, three classes are identified ing the contrast of the printed patterns
absorption coefficients (k) (at 13.5 nm) (Figure 12). on the wafer (Figure 13). They also
of many materials. Ta-based absorber ■■ low-n materials offer the possibility of reducing the
materials can be found in the middle of ■■ high-k materials EUV exposure dose by selecting the
the graph. ■■ n matching to vacuum materials. right mask bias. A lower dose means a
higher throughput, which has a direct
impact on the EUV lithography cost.
Typically, the mask bias can be tuned to
the lowest LCDU or to the lowest dose,
as illustrated for the hexagonal contact
holes in Figure 14.
Absorber Despite the advantages of low-n
Cr CAP masks, there are also some limita-
ML
PS Film tions that delay the introduction of
these masks in generic designs [9].
One of the problems is that the contrast
improvement works only for a certain
Substrate Substrate pitch range. At larger pitches, large
best-focus shifts are observed com-
pared to the standard Ta-based masks
(Figure 15). This can partly be com-
BS Coating
pensated for by mask CD retargeting or
EAPSM Optical Binary EUV inserting subresolution assist features
(a) (b) (SRAFs) but makes the data handling
more complex.
FIGURE 10. (a) Embedded optical mask cross-section with phase shift (PS) film: trans- The mask tonality (dark field ver-
missive. (b) EUV mask cross-section with multilayer (ML) and back side (BS) coating: sus bright field) also plays a role here.
reflective. Bright-field low-n masks suffer less
0.08 Ni
criteria need to be met to have a good PtTe Te
Co
mask absorber [10].
0.06 Pt Ni3AI
One of the biggest hurdles to intro-
Low n
ducing high-k absorbers is the ability Pt2Mo
0.04 TaBN TaTeN
to pattern these materials. Also, mask Pt2Mo n Matching
repair is difficult for the same reason. Ru3Re Ta to Vacuum
0.02 RuTa3
Ion beam etch techniques can etch the RuTa
Ru3Ta
material but are not selective to the Ru Ru
0 Mo
capping layer. Mask shops typically 0.88 0.91 0.94 0.97 1
prefer to use reactive ion etch, which Refraction Index (n)
they are more used to. The study in
[10] shows that TaCo may have some FIGURE 12. Three classes of absorber materials, with reference to Ta-based absorber.
2.5 1.5
NILS
NILS
2 NA 0.55 NA0.55
TaBN TaBN
1
RuTa RuTaO
1.5 Pt2Mo Pt2Mo
PtMo PtMo
0.5
1
20 30 40 50 60 70 80 90 100 20 30 40 50 60 70 80 90 100
Thickness (nm) Thickness (nm)
FIGURE 13. Simulated low-n mask (RuTa, Pt2Mo, and PtMo) improvements in contrast (NILS) compared to a Ta-based mask.
Lowest LCDU
4.5 3×5
TaBN
4 Low-n
LCDU (nm)
0×0
4×4
3.5 3×3
2×2 1×1
3 6×6 5×5
2×2
4×4
2.5 3×3
Lowest Dose
2
30 35 40 45 50 55 60 65 70 75 80
Dose (mJ/cm2)
FIGURE 14. Esperimentally verified low-n mask EUV dose reduction compared to a Ta-based absorber.
50 40
30
Best Focus Shift (nm)
10 20
Best Focus* (nm)
–10
0
–30
–50 Single Second
–20
–70 SRAF SRAF
–90 –40
–110 –60
–130
–150 –80 86 nm 68 nm 17 nm
20 30 40 50 60 70 80 90 100 28 40 56 84 112
Pitch (nm) Pitch (nm) Best Focus Range
LS Target CD 14 nm *F at Max NILS
FIGURE 15. (a) Best-focus shifts at larger pitches for dark-field (DF) and bright-field (BF) low-n masks. (b) The reduction of the
best-focus shift by inserting subresolution assist feature (SRAFs).
35 Low-n BF T2T 20 nm
30 contrast is virtually identical. Lower
25 TCEs lead to lower two-bar CD differ-
20 Target CD 20 nm+/–10% ences. This type of absorber material is
15 not widely investigated (Figure 18).
10 The industry is currently not aligned
5 on the best alternative absorber materi-
MRC Limit
0 als to replace the Ta-based reference
10 15 20 25 30 35
Mask T2T CD (nm)
absorber. Depending on the priorities of
the companies, low-n or high-k absorb-
Low-n DF Low-n BF ers get more focus, but given the advan-
Binary DF Binary BF tages and drawbacks of each type, it is
a difficult choice to make. For high-NA
FIGURE 16. Tip-to-tip (T2T) reduction for lines and spaces (LS). relaxing the MRC of initial insertion, it looks like Ta-based
mask shops. Rel.: relative. absorber masks will at least initially
2
tube pellicles (CNTs) have proven to be
10
1.5 a good candidate for EUV powers of
600 W and above [11], [12], [13]. CNT
1 0 pellicles are meeting the imaging and
20 40 60 80 100 20 40 60 80 100
Thickness (nm) Thickness (nm) handling requirements imposed by the
scanner, and optimizations are ongo-
Through Focus ing to demonstrate a pellicle lifetime of
4 10,000 300-mm wafer exposures.
y = 0.017x + 1.851
Lower-Upper Trench CD (nm)
3
Ta-Based
Mask
2
Pellicle
Low-n
0
y = 0.055x + 1.7401
–1
–50
–40
–30
–20
–10
0
10
20
30
40
50
10 nm
Thermal
Emissivity and CTE
Compatible With Exposure
(a) (b)
FIGURE 20. (a) The most important pellicle material requirements: transmission for throughput; mechanical strength to span a
complete 6-in mask; thermal resistance to withstand high EUV power; and chemicals to withstand the hydrogen radicals in the scanner.
(b) Full-size CNT pellicles have been fabricated with above 95% transparency for EUV light.
AWARDS
J.J. Ebers Award
Robert Bosch Micro and Nano
Electro Mechanical Systems Award
Education Award
Distinguished Service Award
Lester F. Eastman Award
George E. Smith Award
Paul Rappaport Award
Leo Esaki Award
William R. Cherry Award
Early Career Award
S
ome thoughts on what it takes to
be a great mentor.
Okay, let me reset the stage.
I earlier told you that you will require
two essential skills for long-term career
success—skills that, sadly, no class will
ever teach you. These are skills they
never tell you about. Skills hidden from
your view. Curious as to what they are?
1) You must be able to teach (I waxed
poetic on this topic in the September
2023 issue), and 2) you must be able to
mentor. And you will need to be able to
do them both very well. Very, very well.
So, here goes: the essentials of effec-
tive mentoring (see Figure 1).
Go ahead, try these on for size. Read
through the list slowly. Savor each one. FIGURE 1. The essentials of effective mentoring.
Check their heft in your hand. Roll ‘em
around in your mouth a time or two. told, I would rather have a clutch of bright then on off weeks I do short one-on-one
Ponder them. Extract some meaning. team players than a single off-the-charts meetings to just chat and catch up. In
Disagree if you’d like. A few supple- genius any day of the week. Hands down. between, I keep my door cracked open
mentary comments are in order. Strange as it may sound, I like my stu- almost all of the time so that they know
I am speaking here mostly about dents to like each other, to enjoy working I am there if needed. My students know
mentoring an effective research team. together, to look forward to coming to I am busy, and I know they are busy, but
You know, a bunch of scruffy-looking, work. I want them all to share the team I am never so busy that I can’t spare a
twenty-something grad students, with a vision. Okay, some repetition from my minute to act as a sounding board or
few undergrads thrown in the mix for teaching mantra. Students are the be-all provide help. New students need this
fun. Still, I would argue that the rules of and end-all of the mentoring enterprise. more frequently than veterans, to be
this mentoring game are quite general Inspire them. Share your vision. Know sure, since part of a grad student’s job is
and widely applicable. Ye olde granite? who they are and what makes them tick. to evolve into an efficient independent
Well, I have always put the “team vibe” Show them that you care about their problem solver, and like all things this
at the top of my list. Informal, collabora- well-being. Let them know you and what must be learned. To be successful, stu-
tive; dare I say, family-like. A place of makes you tick: the things you value, dents must find the way to marshal the
comfort and security. your successes and failures, what you do requisite forces needed to solve the task
It takes good “soft skills” to function for fun. Trust me, they are interested. Be at hand, be it a complex technical prob-
seamlessly in such a team, and truth be friendly and approachable. Be nice, say lem, an experimental rat’s nest, or even a
“hi.” Contact time with your students is personnel issue. It is just part of the grad
very important, but don’t smother them. student MO. Your students work hard,
Digital Object Identifier 10.1109/MED.2024.3364540
Date of current version: 21 March 2024 I do biweekly full-team meetings, and and so should you. I try to never ask a
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