PART NUMBER DESIGNATION

PART NUMBER DESIGNATION

Standard Product = 75G5-AAABBBCCCMMTEZ-XX
= 75G5-2-AAABBBCCCMMTEZ-XX*
AAA BBB CCC M M T E Z -XX
Module Slot 1 (See Available Function Modules)
Z00 = No Module (See Note 1)
Module Slot 2 (See Available Function Modules)
Z00 = No Module (See Note 2)
Module Slot 3 (See Available Function Modules)
Z00 = No Module (See Note 3)
Master/Slave – Debug Port (See Note 4)
0 = Slave (with Front Debug Port) 2 = Slave (with Rear Debug Port)
1 = Master (with Rear Debug Port) 3 = Master (with Front Debug Port)
Mechanical Options
F = Front Panel J3 & J4 I/O Only W = P with Wedgelocks
P = Rear J2 I/O Only B = Front & Rear I/O
Temperature/Environmental Options (All boards are Conformal Coated)
C = 0° to 70°C H = -40° C to 85°C
Ethernet Options
0 = No Ethernet 3 = MB Port A to Front, Port B to Rear
1 = MB Port A to Front 4 = MB Port A & Port B to Rear
2 = MB Port A to Rear
Special Options
0 = Not Fitted 9 = Special Configuration (requires special option code)
1 = IP Forwarding/Bridging 3 = QSPI pre-loaded w/ VxWorks 7 & NAI Ethernet
2 = Reserved protocol server (listener)
Special Option Code (or leave blank)
Specifications are subject to change without notice.
* Equivalent platform part numbering structure, effective 1/1/2017. Same form, fit and function.

Notes
Module Slot 1 (AAA)
1. Front I/O: 32 pins I/O standard. Rear I/O: 32 pins I/O standard
Module Slot 2 (BBB)
2.
Front I/O: 32 pins I/O standard. Rear I/O: 32 pins I/O with 1-channel Ethernet; 24 pins I/O with Dual Ethernet
Module Slot 3 (CCC)
3. Front I/O: 32 pins I/O standard. Rear I/O: 32 pins I/O standard (when Debug Port NOT specified (See Note 4.)
Front I/O: 32 pins I/O standard. Rear I/O: 24 pins I/O standard (when Debug Port specified (See Note 4.)
Master/Slave – Debug Port Option
The Debug Port provides a serial RS-232 console output for: GigE port IP address change and limited maintenance/debug
capabilities; I2C port (usage TBD) and an RTC backup / HW Write Enable (factory use/not used).
4. If the Rear Debug Port is selected, then Module Slot 3 is limited to 24-pins rear I/O availability.
If the Rear Debug Port is not selected, then Module Slot 3 provides the full 32-pin rear I/O availability, however, IP
address cannot be changed and no maintenance or debug capability is provided from rear I/O access.
5. The 75G5 is PXI chassis compatible with Front I/O option only (can be utilized in a PXI chassis without rear I/O connector option).

75G5 Part Number Designation North Atlantic Industries, Inc. 02-01-2024

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