eee eee eee Ordering numberiEN 3356 No. 3356 Overview ‘This 27MHz band, PLL frequency synthesizer LSI chip is designed specifically for CB transceivers, ‘The specificaitons are suited for use in Us Mos LSI LC7185-8750 CB Transceiver PLL Frequency Synthesizer and Controller (Fcc). ‘The LC7185-8750 incorporates PLL circultry and a controller for CB applications on a single CMOS chip. The controller handles the PLL circuitry, frequency data ROM, channel preset/recall RAM, and LED display drivers, It aiso supports channel scan, channel preset/recall, and emergency channel call. Features 1. A built-in programmable divider for the 16MHz VCO 2. Transmission is inhibited when the PLL is unlocked (digital lock monitor). Direct channel $ or 19 selection (sliding switch) A Tesegment, 2-character LED display "PA" is displayed in public announcement mode. Output beep-tone control circuitry a 4 5. 6 2 8 Up to 5 channet settings can be stored In memory. 4x 3 key matrix implementation Pin Assignment Lorias-8780 Nii lam fajee iva 60 gam ig nr fl bajrm faves [Bins fam fa eur fa eee Fa eos vee ew SANYO Electric Co.,Ltd. Semicor eee) Package Dimensions 3061-D30sNIC (unit: mm) 2 nooponnoanons ons il Sieren na (hel te Tarte raced SANYO: DIP308 BORE) S220TA No, 3368:1/131.C7185-8750 Block Diagram Ku Ki KIS KM KOI Moe KO TR SREY maT LL. | —~osa intenrace TI [}—~ose [+0 se en | —-ds0 rrp | TROL Lene cova Beet eee oseuer ny oAVER -———OsF rest [J [+> se j [1 ast Pub vo ot MEMORY OH OISPLAY [+902 ae fats now soy, aap oud Promaumnoce Z oy Ove ase : cer oes ano REFERENCE ONDER cer, OS Taina 04 our 80 4 J eer Descriptions 1%: Trarsmit/receive select Uniock detected output HOLD: Hold mode select, Charge pump output, INT Initial Input Nc pin test: Test point (input) Segment drivers (for eisplay) Yoowvssi.vssa: Power supply Digit output (for display) Pin: Programmable divider input Key inputs XINXOUT: Crystal oscillator input, Key scan outputs output (e.g. 10.2408H2) BEEP: Bagp-tone control output No, 39862/13L¢7185-8750 Absolute Maximum Ratings at Ts Maximum Supply Voltage Lees weeu Vote Veena vote Ovtot Vette Vortex ae iat cutout carent ttre itmer Baul a Slayer ronan SESE. Tome a Allowable Operating Conditions at Tae-40 to +85b, Vgs0V Supply Voltage voo "H"Level Input Voltage V(t) vei2) Vai3h "L-Level Input Voltage Vit) vere) vas) Outout Voltage voor.) vourt2) Input Frequency fun) face) Input Amplitude vow) vivid Required Oscillating — Xtal Frequency Electrical Characteristics at under Internal Feedback RE Resistance Ria) Pull-down Resistor RpdN "H-Level Input Current let) bl2) ma) mata) "ULevel Input Current i.(1) ne Wo may "-Level Qutput Voltage Voutt) Vout2) 30, Vggr0V Pino 0349.0 Pins FOLO, TK ~0.3~ 415 Input pins other then Vintt}mex -0.3~-Vo0+0.3 Pins SA.SB,SC,SD,SE.SF,SG.D1,02 03S 415, Pins OL BEEP —0.9~+15 PinPO -0.3~voo+0.3 Output pins other than mentioned above ~0-3~Voo+0.3 Pins SASB SC,S0,SE.SF.SS o~+30 Pins 01,02 O~+10 Pin o~ +20 Pingeee ow +10 (T9850) 350 ~~ +85 5~ +126 min typ max 5.0 a0 Pins HOUO,TR 0.7V00 W Pin NTT a2 Vo Pinskih K2KO.KIE 0.6Ve0 Voo Pins FIOLD, TR ° 0.3¥00 Pin iNT 0 13 Pins KI2, IG, Kt ° 0.ev00 PinsSA,S8.SC,S0,SE.S°,S6,01,02 0 8 PinsUC, BEEP 0 8 PinxiW (ine wave, capacitor coupled) 1.0 10.2845 PInPIN (sine wave, capacitor coupled) Ww 0 PinxiN (sine wave, capacitor coupled) 0.5 18 PinpIi(sine wave, capacitor covpiec) 0.15 18 Pirs xin xOUTCCES502 ) 50 10.28 4g allowsble operating conditions in ye max Pin xin 10 Pin PIN 500 Pins Kii.K2.KI3KI4, TEST x0 50 0 Pins OLO.TX vim i2v 5.0 PinitaT vim Voo 5.0 Pinxin Viewoo 26 PinPin vievoo 0 PinsHOLO. TX Vi=Vss 5.0 PinKTT —— VieVss 50 PinxIN —VieWss % PinPIN Vins 0 PinsKO1KOZKO3 lo=IMA VoO~2.0 Voo-1.0 Voo~0.6 PinPO fom0.5mA Voo=1.0 unit e % nz as Me PA > z Ka to M5 Mt MODE / 2 > Ka koa Koz Ko! cHS Emergency CH9 recall UP/ON/ME/MI~§ i Momentary Sw cua : Emergency CH19 recall CH /CHIS/PA Slide SW PA Public announcement display MODE / 2 Diode MODE! / 2 Display Mode uP CH up/scan ow £ CH down /scan me = Station Memory Enable Mi~M5 Station Memory recall No, 9358.4/13LC7185-8750 LED splay Configuration (Common anade/7 segment) = nee ss1008 En in ala fe] y [ er i etaeeoe af fe fh ieee Tart wo [se a ope lu |e a Becce shsesesosrsasa = ale 7 Pin Description Pin Name [Pin Nor Tipe Description 1% D “Tigran rocave select o> Keo" FO B 7 “Hold made select oo) FOLD="0"...Hotd mode select wT B Oe TEST @ “Fest point Gnpat) Tie to ground oF leave floating Veo a Power supply @ Normal mode: 5.0 to 6.0V Hold mode: 23.2¥ vss? a Channel display LED driver ground: PIN ry Programmable divider input 150mVems min i Hold mode: Programmable divider is disabled. xi oO xoUT 3 + Crystal osciliator Frequency: 10,242 Po Hold mode: Oscillator Is disables. oa Continued on next page. No, 33665/131LC7185-8750 Continued trom preceding page. Pin Name [Pin Now Tyee as Deseriation PO 7 “Charge pump output from the phase comparator = 1V js cbtained by dividing the PIN frequency input by N (programmable divider value) = th ie the telerence signal (reteronce divider cutout) 4 {W>1R OR loading: Poltve Pulses WVctR OR leading: Negative Pulses {vs1R and phace muched: High impedence 4 Hold mode: High impedance Vest @ “PLL circuit and controlier ground [NC a = No-connection w 18 “Unlock detected output Low level: See Uniock Detected Output (UL) for detail. Sse (Open: Locked BEEP 7 *Beep-tone contro! output ‘Open: See Beep-tone Control Output for detail. Low level: Hold moce. my SA 7 “Segment crivers for the dicplay to to (Common anode/? segments) sc 7 E 7 oF @ Digit outbut (18042) for the display oz 8 (Common anode/? segments) & 7 Hold mode: Tr goes off. Ki 10 + Key inputs to to Input from the key matrix Kid 13 Sopa KOT 1% “Key scan output (7542) to to Output to the key matrix Koa 16 Hold mode: Low (scanning stops) —p>—1 No, 3355-6/13L.C7185-8750 (1) Channel Selection (up/down) ‘The unlock detected line (UL) is asserted (low) when the UP (or DN) key Is pressed and deactivated 25ms after the key is released (sea diagram below). ‘The beep-tone control line (BEEP) Is asserted (open) for Sms after each new channel is selected (see diagram below). 4) Manual scanning (up/down) Pressing the UP key increments by one channel and pressing the DN key decrements by channel. ‘When scanning reaches the end of the band, it automatically wraps around to the beginning. 2) Auto scanning (up/down) Holding the UP (or ON) key down for S00ms oF longer starts auto scanning. For both up and down scanning, each channel takes 100msec to scan. ve/on “ ing E208 teste {| ei wy cet Ss "X3 ! Ee oe) Gee ia e pL (2) Selecting an Emergency Channel (CH9/CHI9) If the CH9 or CHI9 switch is turned on, the LO7185 does the following: Stores the value of the previous channel Asserts the beep-tone control line for Sms Disables the UP/ON, MI to M5, and ME switches Causes either "9" or "19" to blink on the display “Keep the emergency channel open until the CH9 or CH19 switch is turned off, After the CH9 or CH19 switch is turned back off the beep-tone control line is asserted for SOms and the LC7185 reopens the previous channel, Note the CH9 has a higher priority over CH19. As a result, if both switches are turned on, CH will be opened. ‘As shown in the diagram, the UL line is asserted for 25ms after the CH9 or CH19 switeh is turned off or on. cnsienie manne OH ora 78 a Sa ores cee I zo peers No, 9356.7/13.¢7185-8750 (3) Public Announcement (Pa) Mode When the PA switch is turned on, the LO7I85 does the following: Stores the value of the previous channel Disables all keys sCauses "PA" to be displayed “Stays in PA mode until the PA switch is turned off. When the PA switch Is turned back off, the LCT185 leaves PA mode and reopens the previous channel. ‘As shown in the diagram, the UL line is asserted while the PA switch is turned on. “ 4 sxe HF 1 (4) Transmit/Receive Selection ‘When the TX line is asserted, the LC7185 enters TX mode. The LC7185 will only leave this mode if the PA switch is pressed or the TX line is deactivated. ‘As shown in the diagram, the UL line is asserted for 25ms after the TX line is asserted or deactivated. beer (5) Channel Preset/Recall Facility 1. The LO7185 allows up to 5 channels to be preset (assigned to M1 to M5). After a reset, M1 to MS are assigned to CH33. 2. Recalling preset channels “A preset channel is recalled by pressing one of the preset memory keys (M1 ta MS}* to which the channel ‘was previously assigned. sPresetting channel (assigning keys) are covered in the next section, There are two different display modes as shown below. Mode 1 (without diode) Each time a key is pressed (2.9. Mt), the new channel is displayed. Example: Display 21——= 15 Key mw Mode 2 (with diode) Each time a key is pressed (e.g. M1), a key mnemonic (e.g. "P1") is displayed for 400msec, then the new channel is displayed. Example: Display 21—+P1—~15 400ms Key mm No, 39566713.C7185-8750 3 Presetting channels Presetting @ channel is done in the following way. First select the channel to be preset, then hold down the ME key and press the preset memory key (M1 to MS)* to which you would like to assign the current channel. In the following cases, a channel will not be preset: +9 seconds elapse after the ME key Is pressed and one of M1 to MS is pressed. “Emergency channels CH or CHI9 are currently selected, ‘The TX line is asserted, M3>a>M5: (8) Beep-tone Contro! Output After each of the following events, the BEEP line is asserted for SOmsect +A reset (e.g. battery replacement) “Any key press associated with the channel memory “Any emergency channel switch activation +A new channel is selected Leaving hold mode (7) Unlock Detected Output (TL) In the following cases, the UL line is asserted for the duration indicated. AR AR at Evie i a tes. — When the phase difference between the programmable and reference divider outputs exceeds 3.2us, The UL line is held low for Gms after the last out-of-range phase sample is detected, as shown below. “After a new transmit/receive or channel selection, The UL line is asserted for 25ms While the PA switch Is turned on, No. 3356/13LC7185.8750 (8) Key Matrix It is normal to put diodes in series with the key scanning lines to avoid creating a short with the output lines. But KO1, KO2 and KO3 lines don't need diodes. oN? Tem [min | be | mex 2 own Ko) ka RONN | 20 | 2 | 7 Reon | 30 50 7 fe andar etal et ara z aa 2s 48 é3 ‘The LC7185 enters hold mode when the HOCD line ig asserted. In this mode, the channel preset/recall RAM is cot affected. (1) System Status The LC7185 will remain in hold mode until the FOLD line Is deactivated or a reset occurs (RIT line is asserted). The programmable divider, crystal oscillator, end reference civider are all inhibited. Signal output levels are shown below. PD: High impedance ‘UE: vss (ground) D1, D2: High impedance BEEP: Vss KO1 to KO3: Ves When the LC7185 leaves hold mode, the previously selected channel is reopened. (2) Reset To reset the chip, assert the INIT tine, Reset stat “CHO is selected, ‘Preset memory keys are all set to CH93. Lina st power 200 Sw pe LIN seme see wv va fe ws z =e mt carry F 5 * we No, 3558:10/33L.C7185.8750 (2) Timing Requirements for Hold Mode a FOB en ae vonain sv — aay 0.3Ve0— (ov —== 1 ROB > 6.0ne * ae oe Yop must remain at $,0V or higher (crystal oscillator requirement) for 6.0msec (tHOLO) after the HOLD line is asserted (HOLD<0.9Vpp). After this VDD may go as low as 3.2V. There are no constraints on timing when the chip is leaving hold mode. The signals can be activated in one of two orders. 1) If HOLD is already deactivated (20.7Vpp), the LC7185 leaves hold mode within 2,0msec after VOD rises to °5.0V. 2) If VoD is >5.0V, the LC7185 enters normal mode within 2.0ms after HOLD is deactivated, (4) Reset Timing 1) Reset timing (e.g. battery replacement) Sov — 1a = (ov «ORT > tou Note: tiNTT should be greater than 1.dus 2) Reset caused by @ sudden voltage (Vpp) érop soy = av = fon Note: It VoD drops momentarily down to less than 3,0V and rises up to more than 5.0V (tr1.0us 2 reset may be generated. No. 8966-1113Frequency Table (U.S.A.; LO7185-8750) 17185-8750 FREQUENCY 1X RD) CHANNEL a x i nS 7 25.985 6608 16.27 Ec 1. 2 25.008 512 16.28 5395 19.4875 a 25.985 5516 16.29 5397 19.4826 4 27.005 624 16.31 5401 19.5008 5 27.018 6528 18.32 5403 13.5075 6 27.026 522 15.23 5405 19.5125 2 27.098 6536 15.34 5407 19.5175 5 27.085 50a 16.36 salt 13.525 9 27.088 6508 16.30 5413 13.5905 10 27.075 8552 16.38 55 13.536 1 77.088 6556 16.38 547 13.5005 ira 2.405 6660 16.41 Saat 13.5605 8 D118 6868 16.42 523 13.5595 in 21 e572 16.43 5825, 13.5625 6 21.195 856 16.48 seer 13.5675 6 27.185 sea 16.46 5a 13.575 ” 2.168 6588 18.47 5433 13.5825 1B 2.1% esa 15.48 5496 13.5875 19 2.185 6598 16.49 597 13.5905 20 21.206 804 16.51 sual 13.6005 zi 27.215 e808 | 16.82 Bea 13.6075 w 2.228 e612 16.53 545 19.6125 2 27.286 62a 16.56 5451 19.6275 a 27.296 e616 16.54 5a 13.6175 % 27.285 620 15.55, sug 13.6225 % 27.286 6608 18.57 5453 13.6325 2 28 662 15.58 5455 13.675, 8 2.285 6636 16.59 5487 19.6625 28 27.2% 6640 16.60 5459 19.6475, 30 21.305 5548 16.61 5461 10.655, 3 2.315 668 16.62 5669) 13.655 2 27.325 esse 16.63 5465 19.6825 3 27.935 6656 16.64 5467 13.6675 ut 27.345 6860 16.65 5469 13.6705 % 27.355 65 16.66 sant 13.675 6 27.385 8868 16.67 sera 13.6825 a 27.395 6672 16.58 5a78 13.6075 8 27.385 8696 16.69 sar 13.6925, 8 20.395 680 16.70 579 13.6975 “0 27.405 6604 18.71 5481 13.2025, Voo (TX) =RE+ 2 Voo (AX) =RF—10.895MHe (IF) CHI: Veo (Tx) =26.965+ 2 =19.4825 Veo (RX) =26.965—10.965— 18.27 No, 3856:12/1317185-8750 Sample Application Circuit [me | l ee a icetonl ; 2] tam FF me | i) . anon Shee ane fxs ale wae st Ht care Ha rt Meh a at np ae IM Ho products desorbed or contained herein aro intonded for use in surgical implants, Me-support systems, ‘aerospace equipment, nuclear power convo! systems, vehicles, disaster/erme-preventon equipment and the lke, the falure of which may deectly or idrectly cause muy, death or property loss. M Anyone purchasing any products described or conteined herein for an above-mentioned use shal ® Accept full responsibilty and indemnify and defend SANYO ELECTRIC CO, LTD, ite affitetes, subsidaties and distributors and all thei officers and employees, jonty and several, against any and all dims and litigation and all damages, cost and expenses’ associaad with such use ® Not impose any responsibility for any faut ot nagigence which may be cited in any such claim or Itgatin on SANYO ELECTRIC CO, LTD, ts alfiates, subsidiaries and distrbutors or any of thet officers and employees jointly 0° several M bofcrmation (inctung cicuit diagrams and circuit parameters) herein i for example only: it is not guarant- ‘eed for volume production. SANYO befeves information herein is acouate and relable, but no guarantees are made or impled ceparing is’ use oF any infingements of intaleotual property reghts or other nghts of thie parties, No, $356-19/13