BECE102L – Digital Systems Design

Module 3 – Design of Combinational Logic Circuits

Dr. Rohit Mathur

Assistant Professor Sr. Grade 1
School of Electronics Engineering

Digital System Design 1

 Combinational Circuits
• Digital Logic Circuits may be combinational or sequential.
• A combinational circuit consists of ‘n’ input variables, logic gates, and ‘m’ output variables.
• The outputs of the combinational circuits are determined by the present combinations of the
input variables.
• Adders, multipliers, comparators, multiplexers, demultiplexers, encoders, decoders are few
examples of combinational circuits.

Block diagram of combinational circuit

Digital System Design 2
 Design Procedure of Combinational Circuits

• Design of combinational circuit starts from the specification of the design and culminates to a set of
Boolean functions from which the logic diagram can be obtained.
• In general we have to do the following steps to design a combinational circuit
i. From the specification determine the required inputs and outputs and assign a symbol to each
inputs and outputs.
ii. Derive the truth table that defines the relation between the inputs and the outputs.
iii. Obtain the simplified Boolean function for each output as a function of input variables.
iv. Draw the logic circuit.

Digital System Design 3

 Design of Half Adder
• A combinational circuit that performs the addition of two bits is called a half adder.
• The two bit binary inputs are given the symbols x and y
• The two outputs are sum and carry with the symbols S and C respectively.

Block diagram of Half Adder Truth Table of Half Adder

S = x’y + xy’ = x ⊕ y
C = xy

Digital System Design Lab 4

Design of Half Adder

S = x’y + xy’ = x ⊕ y
C = xy

Digital System Design Lab 5

 Design of Full Adder
• A combinational circuit that performs the addition of three binary bits (two binary bits and a
previous carry) is called a full adder.
• The three binary inputs are given the symbols x , y and z
• The two outputs are sum and carry with the symbols S and C respectively.

S = ∑(1,2,4,7)
C = ∑(3,5,6,7)
Block diagram of Full Adder

Truth Table of Full Adder

Digital System Design Lab 6
K-Maps for Full Adder

Digital System Design Lab 7

 Implementation of Full Adder
Full-adder can be implemented with two half adders and one OR gate. Dotted block in the below circuit indicates a
half adder.
S = z ⊕ (x ⊕ y)
= z’(xy’ + x’y) + z(xy’ + x’y)’
= xy’z’ + x’yz’ + xyz + x’y’z
C = z(x ⊕ y) + xy = z(xy’ + x’y) + xy = xy’z + x’yz + xy

Digital System Design Lab 8

 Design of Half Subtractor
• A combinational circuit that performs the subtraction of two bits is called a half subtractor.
• The two bit binary inputs are given the symbols x and y
• The two outputs are Difference and Borrow with the symbols D and B respectively.

Block diagram of Half Subtractor Truth Table of Half Subtractor

D = x’y + xy’ = x ⊕ y
B = x’y

Digital System Design Lab 9

Design of Half Subtractor
D = x’y + xy’ = x ⊕ y
B = x’y

Digital System Design Lab 10

 Design of Full Subtractor
• A combinational circuit that performs the subtraction of three binary bits (two binary bits and a
previous borrow) is called a full subtractor.
• The three binary inputs are given the symbols x , y and z
• The two outputs are difference and borrow with the symbols D and B respectively.

D = x’y’z + x’yz’ + xy’z’ + xyz = ∑(1,2,4,7)

B = x’y’z + x’yz’ + x’yz + xyz = ∑(1,2,3,7)

Block diagram of Full Subtractor

Truth Table of Full Subtractor

Digital System Design Lab 11

K-Maps for Full Subtractor
K-map for D K-map for B

D = x’y’z + x’yz’ + xy’z’ + xyz = x ⊕ y ⊕ z

B = x’y’z + x’yz’ + x’yz + xyz = x’y + x’z + yz
Or
B = (x ⊕ y)’z + x’y
Digital System Design Lab 12
 Design of Full Subtractor
Circuit Diagram

Digital System Design Lab 13

 Adder-Subtractor

Addition and subtraction operation can be combined into one circuit with one binary
adder and XOR gate with each full adder.
M = 0 => Adder
M = 1 => Subtractor