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Interrupt Power Saving Memory Interfacing
Interrupt Power Saving Memory Interfacing
Interrupt Power Saving Memory Interfacing
Basics of Interrupts in 8051 IE – Interrupt Enable Register {Bit Addressable IE.7 to IE.0}
8051 has five interrupts and all are vectored interrupt.
Two Hardware interrupts : INT0 and INT𝟏𝟏
EA - ET2 ES ET1 EX1 ET0 EX0
a
Two Timer Overflow internal Interrupts : TF0 and TF1 EA – Enable All, ET2 – Reserved, ES – Enable Serial, ET1 – Enable
d
Serial Communication internal Interrupt : Common for RI and TI Timer 1, EX1 – Enable INT𝟏𝟏, ET0 – Enable Timer 0 and EX0 –
n
All the interrupts are controlled by IE and IP registers. Enable INT𝟎𝟎.
Program ISR Program
u
To Enable it, make it 1
F
To Disable it, make it 0
PUSH PC
i n g
IP – Interrupt Priority Register {Bit Addressable IP.7 to IP.0}
r
Interrupt
- - PT2 PS PT1 PX1 PT0 PX0
POP PC
e e PT2 – Reserved, PS – Priority Serial, PT1 – Priority Timer 1, PX1 –
in
Priority INT𝟏𝟏, PT0 – Priority Timer 0 and PX0 – Priority INT𝟎𝟎.
RETI
g
To have high Priority, make it 1
n
Priority and Vector Address of Interrupts in 8051 To have low Priority, make it 0
E
Interrupt Priority Vector Address
𝑰𝑰𝑰𝑰𝑰𝑰𝑰𝑰 1 0003H
TF0 2 000BH
𝑰𝑰𝑰𝑰𝑰𝑰𝑰𝑰 3 0013H
TF1 4 001BH
Serial (RI or TI) 5 0023H
Engineering Funda Android App 8051 YT Playlist
Power Saving Modes in 8051 𝝁𝝁C
Basics of Power Saving in 8051 Note: If PD and IDL, both are enabled by keeping them 1, then
8051 has two power saving modes: 8051 will consider PD Mode only.
1. Idle Mode Idle Mode of Power Saving in 8051
a
2. Power Down Mode PCON is not bit addressable register, so to turn ON Idle Mode, we
d
This power saving modes are controlled by PCON register.
n
can use ORL 87H, #01H {87H is Address of PCON register}
Advantages of Power Saving in 8051
u
In Idle Mode, Clock to CPU is Cut OFF, Hence CPU will go in Sleep
8051 is used in embedded systems operated with battery, So it
F
Mode.
saves cost of system. Because of It, we almost saves 80% of power supplied to 8051
g
No need of fans and cooling system due to this modes. microcontroller.
i n
It makes circuit compact, as we don’t need additional circuits for In Idle Mode, Clock is available to other On chip components like
r
cooling.
e
RAM, Timer, Ports, PC, SP, PSW etc.
It will increase life & reliability of entire system.
e
By Interrupt and RESET, we can terminate Idle Mode.
in
PCON – Power Control Register {No bit addressable} After RESET, we can not regain original state of Controller.
g
Power Down Mode of Power Saving in 8051
SMOD - - - GF1 GF0 PD IDL
n
PCON is not bit addressable register, so to turn ON Power Down
E
SMOD – Serial Baud rate. Mode, we can use ORL 87H, #02H {87H is Address of PCON
GF1 & GF0 – General Purpose, left for user to define it. register}
PD – Power Down Mode. In Power Down Mode, Clock to entire 8051 is Cut OFF.
If PD = 1, Power Down Mode is ON In this mode we save maximum Power.
If PD = 0, Power Down Mode is OFF By RESET only, we can terminate Power Down Mode.
After RESET, we can not regain original state of Controller.
IDL – Power Idle Mode.
If IDL = 1, Idle Mode is ON
If IDL = 0, Idle Mode is OFF
Power Saving in 8051 𝝁𝝁C
d a
u n
𝑰𝑰𝑰𝑰𝑰𝑰
g F
r i n
e
XLAT2 XLAT1 To CPU
Oscillator
in e
g
System
𝑷𝑷𝑷𝑷 E n Clock
Fosc/12
To Timer, RAM,
IO Ports etc.
a
2. 4KB EPROM using 2KB EPROM So it needs 11 address lines.
d
3. 8KB RAM using 4KB RAM Data Lines for 2KB = 8 [For Byte, it is 8 bits]
n
Control Lines for EPROM = Memory Read {𝑷𝑷𝑷𝑷𝑷𝑷𝑷𝑷 For 8051 ROM data read}
u
In Memory interfacing, we need to interface four
8KB RAM using 4KB RAM
F
categories of lines: Numbers of Chips = 2 chips of 4KB RAM
Address Lines
g
Address lines for 4KB Address = 𝟐𝟐𝟏𝟏𝟏𝟏 × 𝟐𝟐𝟐𝟐 = 𝟐𝟐𝟏𝟏𝟐𝟐
Data Lines
in
So it needs 12 address lines.
Control Lines
r
Data Lines for 4KB = 8 [For Byte, it is 8 bits]
e
Chip Select Control Lines for 4KB RAM = Memory Read 𝑹𝑹𝑹𝑹 & Memory Write 𝑾𝑾𝑾𝑾 for
e
RAM of 8051.
i n
Memory IC A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 Address
g
EPROM 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1000H
n
2KB 0 0 0 1 0 1 1 1 1 1 1 1 1 1 1 1 17FFH
EPROM 2
2KB
RAM 1
0
0
0
0
0
0
0
0
0
1
1
0
E 1
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
1800H
1FFFH
0000H
4KB 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 0FFFH
RAM 2 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1000H
4KB 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1FFFH
Can be used for Chip Select
XTAL1 P2 {A8-A15} {A8-A15}
12MHz
XTAL2 ALE STB
74LS373
a
{A0-A7}
8 bits Latch
d
P0 {AD0-AD7}
Microcontroller
un
F
{D0-D7}
8051 𝑷𝑷𝑷𝑷𝑷𝑷𝑷𝑷
in g
r
𝑹𝑹𝑹𝑹 A10-A0
e
𝑶𝑶𝑶𝑶 𝑷𝑷𝑷𝑷𝑷𝑷𝑷𝑷
e
𝑾𝑾𝑾𝑾
EPROM 1
i n
𝑬𝑬𝑬𝑬 Vcc
2KB
g
A12 𝑪𝑪𝑪𝑪 A11
n
D7-D0
A11-A0
D7-D0
𝑪𝑪𝑪𝑪
RAM 1 4KB
E A11-A0
RAM 2 4KB
𝑪𝑪𝑪𝑪
A10-A0
EPROM 2
𝑶𝑶𝑶𝑶 𝑷𝑷𝑷𝑷𝑷𝑷𝑷𝑷
D7-D0 2KB
𝑾𝑾𝑾𝑾 𝑶𝑶𝑶𝑶 𝑾𝑾𝑾𝑾 𝑶𝑶𝑶𝑶 D7-D0 𝑪𝑪𝑪𝑪